diff --git a/0035-cmd-compile-link-internal-runtime-support-buildmode-.patch b/0001-cmd-dist-cmd-link-internal-runtime-add-buildmode-plu.patch similarity index 69% rename from 0035-cmd-compile-link-internal-runtime-support-buildmode-.patch rename to 0001-cmd-dist-cmd-link-internal-runtime-add-buildmode-plu.patch index b841f5dfe6081c4d9a9ddfda13743e2258fe81ee..9931dd7b7568db314b07d6a285757d8118ab8f50 100644 --- a/0035-cmd-compile-link-internal-runtime-support-buildmode-.patch +++ b/0001-cmd-dist-cmd-link-internal-runtime-add-buildmode-plu.patch @@ -1,33 +1,51 @@ -From 87dbb8a1616793bd06dcdc43196ca8f887c0d918 Mon Sep 17 00:00:00 2001 +From 01cba1b97a827118d3e3e7171e7457d4e036f78c Mon Sep 17 00:00:00 2001 From: Guoqi Chen -Date: Wed, 22 Mar 2023 06:31:51 +0800 -Subject: [PATCH 35/62] cmd/{compile,link,internal},runtime: support - -buildmode=shared for loong64 +Date: Fri, 7 Jul 2023 07:18:59 +0800 +Subject: [PATCH 01/51] cmd/dist, cmd/link, internal, runtime: add + buildmode={plugin,shared} support for linux/loong64. Signed-off-by: Guoqi Chen -Change-Id: I1c02373496d5f6e13282a4055d294dc76db30518 +Change-Id: I0e7843c7d61420af1c59778ad1e0ecc8dc3bca57 --- - .../compile/internal/ssa/_gen/LOONG64.rules | 101 ++++------ + src/cmd/compile/internal/liveness/plive.go | 7 +- + .../compile/internal/ssa/_gen/LOONG64.rules | 85 +++----- src/cmd/compile/internal/ssa/regalloc.go | 2 + .../compile/internal/ssa/rewriteLOONG64.go | 190 +++++++++++------- + src/cmd/dist/test.go | 4 +- src/cmd/internal/obj/loong64/a.out.go | 1 + - src/cmd/internal/obj/loong64/asm.go | 75 ++++--- + src/cmd/internal/obj/loong64/asm.go | 21 ++ src/cmd/internal/obj/loong64/cnames.go | 1 + - src/cmd/internal/obj/loong64/obj.go | 116 +++++++++++ + src/cmd/internal/obj/loong64/obj.go | 123 ++++++++++++ src/cmd/internal/objabi/reloctype.go | 5 + - src/cmd/internal/objabi/reloctype_string.go | 20 +- - src/cmd/link/internal/ld/config.go | 2 +- - src/cmd/link/internal/loong64/asm.go | 57 +++++- - src/internal/platform/supported.go | 2 +- - src/runtime/asm_loong64.s | 10 + - src/runtime/internal/atomic/atomic_loong64.s | 6 +- - 14 files changed, 408 insertions(+), 180 deletions(-) + src/cmd/internal/objabi/reloctype_string.go | 22 +- + src/cmd/link/internal/loong64/asm.go | 59 +++++- + src/internal/platform/supported.go | 4 +- + src/runtime/asm_loong64.s | 11 + + 14 files changed, 382 insertions(+), 153 deletions(-) +diff --git a/src/cmd/compile/internal/liveness/plive.go b/src/cmd/compile/internal/liveness/plive.go +index 169467e6f5..38273db07d 100644 +--- a/src/cmd/compile/internal/liveness/plive.go ++++ b/src/cmd/compile/internal/liveness/plive.go +@@ -546,7 +546,12 @@ func (lv *liveness) markUnsafePoints() { + v = v.Args[0] + continue + } +- case ssa.Op386MOVLload, ssa.OpARM64MOVWUload, ssa.OpMIPS64MOVWUload, ssa.OpPPC64MOVWZload, ssa.OpWasmI64Load32U: ++ case ssa.Op386MOVLload, ++ ssa.OpARM64MOVWUload, ++ ssa.OpLOONG64MOVWUload, ++ ssa.OpMIPS64MOVWUload, ++ ssa.OpPPC64MOVWZload, ++ ssa.OpWasmI64Load32U: + // Args[0] is the address of the write + // barrier control. Ignore Args[1], + // which is the mem operand. diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -index 1caaf13600..f8c07f3024 100644 +index 4a47c4cd47..b9aaa3ff7f 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -@@ -453,66 +453,47 @@ +@@ -455,66 +455,31 @@ (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr)) && is32Bit(off1+int64(off2)) => (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr) // fold address into load/store @@ -91,68 +109,52 @@ index 1caaf13600..f8c07f3024 100644 - (MOVWstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -(MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => - (MOVVstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBload [off1+int32(off2)] {sym} ptr mem) -+(MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBUload [off1+int32(off2)] {sym} ptr mem) -+(MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHload [off1+int32(off2)] {sym} ptr mem) -+(MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHUload [off1+int32(off2)] {sym} ptr mem) -+(MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWload [off1+int32(off2)] {sym} ptr mem) -+(MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWUload [off1+int32(off2)] {sym} ptr mem) -+(MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVVload [off1+int32(off2)] {sym} ptr mem) -+(MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVFload [off1+int32(off2)] {sym} ptr mem) -+(MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVDload [off1+int32(off2)] {sym} ptr mem) ++// Do not fold global variable access in -dynlink mode, where it will be rewritten ++// to use the GOT via REGTMP, which currently cannot handle large offset. ++(MOV(B|BU|H|HU|W|WU|V|F|D)load [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) ++ && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => ++ (MOV(B|BU|H|HU|W|WU|V|F|D)load [off1+int32(off2)] {sym} ptr mem) + -+(MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBstore [off1+int32(off2)] {sym} ptr val mem) -+(MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHstore [off1+int32(off2)] {sym} ptr val mem) -+(MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWstore [off1+int32(off2)] {sym} ptr val mem) -+(MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVVstore [off1+int32(off2)] {sym} ptr val mem) -+(MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVFstore [off1+int32(off2)] {sym} ptr val mem) -+(MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVDstore [off1+int32(off2)] {sym} ptr val mem) -+(MOVBstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBstorezero [off1+int32(off2)] {sym} ptr mem) -+(MOVHstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHstorezero [off1+int32(off2)] {sym} ptr mem) -+(MOVWstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWstorezero [off1+int32(off2)] {sym} ptr mem) -+(MOVVstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVVstorezero [off1+int32(off2)] {sym} ptr mem) ++(MOV(B|H|W|V|F|D)store [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) ++ && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => ++ (MOV(B|H|W|V|F|D)store [off1+int32(off2)] {sym} ptr val mem) + -+(MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVVload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVFload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVDload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) ++(MOV(B|H|W|V)storezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) ++ && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => ++ (MOV(B|H|W|V)storezero [off1+int32(off2)] {sym} ptr mem) + -+(MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) -+(MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) -+(MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) -+(MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVVstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) -+(MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVFstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) -+(MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVDstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) -+(MOVBstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVBstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVHstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVHstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVWstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVWstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) -+(MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => (MOVVstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) ++(MOV(B|BU|H|HU|W|WU|V|F|D)load [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) ++ && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => ++ (MOV(B|BU|H|HU|W|WU|V|F|D)load [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) ++ ++(MOV(B|H|W|V|F|D)store [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) ++ && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => ++ (MOV(B|H|W|V|F|D)store [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) ++ ++(MOV(B|H|W|V)storezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) ++ && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) => ++ (MOV(B|H|W|V)storezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) (LoweredAtomicStore(32|64) ptr (MOVVconst [0]) mem) => (LoweredAtomicStorezero(32|64) ptr mem) (LoweredAtomicAdd32 ptr (MOVVconst [c]) mem) && is32Bit(c) => (LoweredAtomicAddconst32 [int32(c)] ptr mem) diff --git a/src/cmd/compile/internal/ssa/regalloc.go b/src/cmd/compile/internal/ssa/regalloc.go -index 294c522a90..db6b5a6eca 100644 +index c4d6e48cad..71fedd52cf 100644 --- a/src/cmd/compile/internal/ssa/regalloc.go +++ b/src/cmd/compile/internal/ssa/regalloc.go -@@ -640,6 +640,8 @@ func (s *regAllocState) init(f *Func) { +@@ -672,6 +672,8 @@ func (s *regAllocState) init(f *Func) { s.allocatable &^= 1 << 9 // R9 case "arm64": // nothing to do -+ case "loong64": ++ case "loong64": // R2 (aka TP) already reserved. + // nothing to do case "ppc64le": // R2 already reserved. // nothing to do case "riscv64": // X3 (aka GP) and X4 (aka TP) already reserved. diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -index f6da0b7ff0..1a2593ef55 100644 +index e88b74cb22..757524bdbb 100644 --- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go +++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -@@ -1674,8 +1674,10 @@ func rewriteValueLOONG64_OpLOONG64MASKNEZ(v *Value) bool { +@@ -1724,8 +1724,10 @@ func rewriteValueLOONG64_OpLOONG64MASKNEZ(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -164,7 +166,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBUload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -1686,7 +1688,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { +@@ -1736,7 +1738,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -173,7 +175,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBUload) -@@ -1696,7 +1698,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { +@@ -1746,7 +1748,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { return true } // match: (MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -182,7 +184,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -1708,7 +1710,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { +@@ -1758,7 +1760,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -191,7 +193,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBUload) -@@ -1759,8 +1761,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBUreg(v *Value) bool { +@@ -1809,8 +1811,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBUreg(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -203,7 +205,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -1771,7 +1775,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { +@@ -1821,7 +1825,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -212,7 +214,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBload) -@@ -1781,7 +1785,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { +@@ -1831,7 +1835,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { return true } // match: (MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -221,7 +223,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -1793,7 +1797,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { +@@ -1843,7 +1847,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -230,7 +232,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBload) -@@ -1845,8 +1849,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { +@@ -1895,8 +1899,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] @@ -242,7 +244,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -1858,7 +1864,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { +@@ -1908,7 +1914,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -251,7 +253,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBstore) -@@ -1868,7 +1874,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { +@@ -1918,7 +1924,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { return true } // match: (MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) @@ -260,7 +262,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -1881,7 +1887,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { +@@ -1931,7 +1937,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -269,7 +271,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBstore) -@@ -1997,8 +2003,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { +@@ -2047,8 +2053,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -281,7 +283,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBstorezero [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2009,7 +2017,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { +@@ -2059,7 +2067,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -290,7 +292,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBstorezero) -@@ -2019,7 +2027,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { +@@ -2069,7 +2077,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { return true } // match: (MOVBstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -299,7 +301,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVBstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2031,7 +2039,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { +@@ -2081,7 +2089,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -308,7 +310,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVBstorezero) -@@ -2045,8 +2053,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { +@@ -2095,8 +2103,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -320,7 +322,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVDload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2057,7 +2067,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { +@@ -2107,7 +2117,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -329,7 +331,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVDload) -@@ -2067,7 +2077,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { +@@ -2117,7 +2127,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { return true } // match: (MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -338,7 +340,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVDload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2079,7 +2089,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { +@@ -2129,7 +2139,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -347,7 +349,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVDload) -@@ -2094,8 +2104,10 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { +@@ -2144,8 +2154,10 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] @@ -359,7 +361,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2107,7 +2119,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { +@@ -2157,7 +2169,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -368,7 +370,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVDstore) -@@ -2117,7 +2129,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { +@@ -2167,7 +2179,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { return true } // match: (MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) @@ -377,7 +379,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVDstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2130,7 +2142,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { +@@ -2180,7 +2192,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -386,7 +388,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVDstore) -@@ -2144,8 +2156,10 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { +@@ -2194,8 +2206,10 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -398,7 +400,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVFload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2156,7 +2170,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { +@@ -2206,7 +2220,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -407,7 +409,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVFload) -@@ -2166,7 +2180,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { +@@ -2216,7 +2230,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { return true } // match: (MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -416,7 +418,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVFload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2178,7 +2192,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { +@@ -2228,7 +2242,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -425,7 +427,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVFload) -@@ -2193,8 +2207,10 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { +@@ -2243,8 +2257,10 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] @@ -437,7 +439,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVFstore [off1+int32(off2)] {sym} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2206,7 +2222,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { +@@ -2256,7 +2272,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -446,7 +448,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVFstore) -@@ -2216,7 +2232,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { +@@ -2266,7 +2282,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { return true } // match: (MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) @@ -455,7 +457,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVFstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2229,7 +2245,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { +@@ -2279,7 +2295,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -464,7 +466,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVFstore) -@@ -2243,8 +2259,10 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { +@@ -2293,8 +2309,10 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -476,7 +478,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHUload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2255,7 +2273,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { +@@ -2305,7 +2323,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -485,7 +487,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHUload) -@@ -2265,7 +2283,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { +@@ -2315,7 +2333,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { return true } // match: (MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -494,7 +496,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2277,7 +2295,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { +@@ -2327,7 +2345,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -503,7 +505,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHUload) -@@ -2350,8 +2368,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHUreg(v *Value) bool { +@@ -2400,8 +2418,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHUreg(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -515,7 +517,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2362,7 +2382,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { +@@ -2412,7 +2432,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -524,7 +526,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHload) -@@ -2372,7 +2392,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { +@@ -2422,7 +2442,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { return true } // match: (MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -533,7 +535,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2384,7 +2404,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { +@@ -2434,7 +2454,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -542,7 +544,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHload) -@@ -2480,8 +2500,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { +@@ -2530,8 +2550,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] @@ -554,7 +556,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2493,7 +2515,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { +@@ -2543,7 +2565,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -563,7 +565,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHstore) -@@ -2503,7 +2525,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { +@@ -2553,7 +2575,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { return true } // match: (MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) @@ -572,7 +574,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2516,7 +2538,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { +@@ -2566,7 +2588,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -581,7 +583,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHstore) -@@ -2598,8 +2620,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { +@@ -2648,8 +2670,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -593,7 +595,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHstorezero [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2610,7 +2634,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { +@@ -2660,7 +2684,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -602,7 +604,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHstorezero) -@@ -2620,7 +2644,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { +@@ -2670,7 +2694,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { return true } // match: (MOVHstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -611,7 +613,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVHstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2632,7 +2656,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { +@@ -2682,7 +2706,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -620,7 +622,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVHstorezero) -@@ -2646,8 +2670,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { +@@ -2696,8 +2720,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -632,7 +634,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVVload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2658,7 +2684,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { +@@ -2708,7 +2734,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -641,7 +643,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVVload) -@@ -2668,7 +2694,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { +@@ -2718,7 +2744,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { return true } // match: (MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -650,7 +652,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVVload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2680,7 +2706,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { +@@ -2730,7 +2756,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -659,7 +661,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVVload) -@@ -2722,8 +2748,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { +@@ -2772,8 +2798,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] @@ -671,7 +673,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVVstore [off1+int32(off2)] {sym} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2735,7 +2763,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { +@@ -2785,7 +2813,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -680,7 +682,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVVstore) -@@ -2745,7 +2773,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { +@@ -2795,7 +2823,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { return true } // match: (MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) @@ -689,7 +691,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVVstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2758,7 +2786,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { +@@ -2808,7 +2836,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -698,7 +700,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVVstore) -@@ -2772,8 +2800,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { +@@ -2822,8 +2850,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -710,7 +712,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVVstorezero [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2784,7 +2814,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { +@@ -2834,7 +2864,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -719,7 +721,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVVstorezero) -@@ -2794,7 +2824,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { +@@ -2844,7 +2874,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { return true } // match: (MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -728,7 +730,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVVstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2806,7 +2836,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { +@@ -2856,7 +2886,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -737,7 +739,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVVstorezero) -@@ -2820,8 +2850,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { +@@ -2870,8 +2900,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -749,7 +751,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWUload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2832,7 +2864,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { +@@ -2882,7 +2914,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -758,7 +760,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWUload) -@@ -2842,7 +2874,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { +@@ -2892,7 +2924,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { return true } // match: (MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -767,7 +769,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2854,7 +2886,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { +@@ -2904,7 +2936,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -776,7 +778,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWUload) -@@ -2949,8 +2981,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWUreg(v *Value) bool { +@@ -2999,8 +3031,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWUreg(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -788,7 +790,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWload [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2961,7 +2995,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { +@@ -3011,7 +3045,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -797,7 +799,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWload) -@@ -2971,7 +3005,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { +@@ -3021,7 +3055,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { return true } // match: (MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -806,7 +808,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -2983,7 +3017,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { +@@ -3033,7 +3067,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -815,7 +817,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWload) -@@ -3112,8 +3146,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { +@@ -3162,8 +3196,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] @@ -827,7 +829,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -3125,7 +3161,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { +@@ -3175,7 +3211,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -836,7 +838,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWstore) -@@ -3135,7 +3171,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { +@@ -3185,7 +3221,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { return true } // match: (MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) @@ -845,7 +847,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -3148,7 +3184,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { +@@ -3198,7 +3234,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { ptr := v_0.Args[0] val := v_1 mem := v_2 @@ -854,7 +856,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWstore) -@@ -3196,8 +3232,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { +@@ -3246,8 +3282,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] @@ -866,7 +868,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWstorezero [off1+int32(off2)] {sym} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -3208,7 +3246,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { +@@ -3258,7 +3296,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { off2 := auxIntToInt64(v_0.AuxInt) ptr := v_0.Args[0] mem := v_1 @@ -875,7 +877,7 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWstorezero) -@@ -3218,7 +3256,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { +@@ -3268,7 +3306,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { return true } // match: (MOVWstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) @@ -884,7 +886,7 @@ index f6da0b7ff0..1a2593ef55 100644 // result: (MOVWstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) for { off1 := auxIntToInt32(v.AuxInt) -@@ -3230,7 +3268,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { +@@ -3280,7 +3318,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { sym2 := auxToSym(v_0.Aux) ptr := v_0.Args[0] mem := v_1 @@ -893,6 +895,27 @@ index f6da0b7ff0..1a2593ef55 100644 break } v.reset(OpLOONG64MOVWstorezero) +diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go +index 36a20e8b2a..864060cbb2 100644 +--- a/src/cmd/dist/test.go ++++ b/src/cmd/dist/test.go +@@ -1613,14 +1613,14 @@ func buildModeSupported(compiler, buildmode, goos, goarch string) bool { + + case "shared": + switch platform { +- case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/s390x": ++ case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/loong64", "linux/ppc64le", "linux/s390x": + return true + } + return false + + case "plugin": + switch platform { +- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/s390x", "linux/ppc64le", ++ case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/loong64", "linux/s390x", "linux/ppc64le", + "android/amd64", "android/386", + "darwin/amd64", "darwin/arm64", + "freebsd/amd64": diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go index 99a7da388f..9527e99b56 100644 --- a/src/cmd/internal/obj/loong64/a.out.go @@ -906,19 +929,19 @@ index 99a7da388f..9527e99b56 100644 C_NCLASS // must be the last diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index eff60104ce..17c0539972 100644 +index 0ab0caafae..c8d00413a0 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go -@@ -344,6 +344,8 @@ var optab = []Optab{ - {AMOVBU, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, - {AMOVWU, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, +@@ -349,6 +349,8 @@ var optab = []Optab{ + {AWORD, C_LCON, C_NONE, C_NONE, C_NONE, C_NONE, 40, 4, 0, 0}, + {AWORD, C_DCON, C_NONE, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0}, -+ {AMOVV, C_GOTADDR, C_NONE, C_REG, C_NONE, 65, 8, 0, sys.Loong64, 0}, ++ {AMOVV, C_GOTADDR, C_NONE, C_NONE, C_REG, C_NONE, 65, 8, 0, 0}, + - {ATEQ, C_SCON, C_REG, C_REG, C_NONE, 15, 8, 0, 0, 0}, - {ATEQ, C_SCON, C_NONE, C_REG, C_NONE, 15, 8, 0, 0, 0}, + {ATEQ, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 15, 8, 0, 0}, + {ATEQ, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 15, 8, 0, 0}, -@@ -601,6 +603,9 @@ func (c *ctxt0) aclass(a *obj.Addr) int { +@@ -676,6 +678,9 @@ func (c *ctxt0) aclass(a *obj.Addr) int { return C_SOREG } return C_LOREG @@ -928,78 +951,12 @@ index eff60104ce..17c0539972 100644 } return C_GOK -@@ -1615,38 +1620,38 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - - case 56: // mov r, tlsvar IE model ==> (pcalau12i + ld.d)tlsvar@got + add.d + st.d - o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -- rel := obj.Addrel(c.cursym) -- rel.Off = int32(c.pc) -- rel.Siz = 4 -- rel.Sym = p.To.Sym -- rel.Add = 0x0 -- rel.Type = objabi.R_LOONG64_TLS_IE_PCREL_HI -+ rel := obj.Addrel(c.cursym) -+ rel.Off = int32(c.pc) -+ rel.Siz = 4 -+ rel.Sym = p.To.Sym -+ rel.Add = 0x0 -+ rel.Type = objabi.R_LOONG64_TLS_IE_PCREL_HI - o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -- rel2 := obj.Addrel(c.cursym) -- rel2.Off = int32(c.pc + 4) -- rel2.Siz = 4 -- rel2.Sym = p.To.Sym -- rel2.Add = 0x0 -- rel2.Type = objabi.R_LOONG64_TLS_IE_LO -+ rel2 := obj.Addrel(c.cursym) -+ rel2.Off = int32(c.pc + 4) -+ rel2.Siz = 4 -+ rel2.Sym = p.To.Sym -+ rel2.Add = 0x0 -+ rel2.Type = objabi.R_LOONG64_TLS_IE_LO - o3 = OP_RRR(c.oprrr(AADDVU), uint32(REGTMP), uint32(REG_R2), uint32(REGTMP)) - o4 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REGTMP), uint32(p.From.Reg)) - - case 57: // mov tlsvar, r IE model ==> (pcalau12i + ld.d)tlsvar@got + add.d + ld.d -- o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -- rel := obj.Addrel(c.cursym) -- rel.Off = int32(c.pc) -- rel.Siz = 4 -- rel.Sym = p.From.Sym -- rel.Add = 0x0 -- rel.Type = objabi.R_LOONG64_TLS_IE_PCREL_HI -- o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -- rel2 := obj.Addrel(c.cursym) -- rel2.Off = int32(c.pc + 4) -- rel2.Siz = 4 -- rel2.Sym = p.From.Sym -- rel2.Add = 0x0 -- rel2.Type = objabi.R_LOONG64_TLS_IE_LO -- o3 = OP_RRR(c.oprrr(AADDVU), uint32(REGTMP), uint32(REG_R2), uint32(REGTMP)) -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -+ rel := obj.Addrel(c.cursym) -+ rel.Off = int32(c.pc) -+ rel.Siz = 4 -+ rel.Sym = p.From.Sym -+ rel.Add = 0x0 -+ rel.Type = objabi.R_LOONG64_TLS_IE_PCREL_HI -+ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -+ rel2 := obj.Addrel(c.cursym) -+ rel2.Off = int32(c.pc + 4) -+ rel2.Siz = 4 -+ rel2.Sym = p.From.Sym -+ rel2.Add = 0x0 -+ rel2.Type = objabi.R_LOONG64_TLS_IE_LO -+ o3 = OP_RRR(c.oprrr(AADDVU), uint32(REGTMP), uint32(REG_R2), uint32(REGTMP)) - o4 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(p.To.Reg)) - - case 59: // mov $dcon,r -@@ -1682,6 +1687,22 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1776,6 +1781,22 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { case 64: // movv c_reg, c_fcc0 ==> movgr2cf cd, rj a := OP_TEN(8, 1334) o1 = OP_RR(a, uint32(p.From.Reg), uint32(p.To.Reg)) + -+ case 65: // mov sym@GOT, r ==> pcaddu12i + ld.d ++ case 65: // mov sym@GOT, r ==> pcalau12i + ld.d + o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(p.To.Reg)) + rel := obj.Addrel(c.cursym) + rel.Off = int32(c.pc) @@ -1030,10 +987,18 @@ index 8b8af6ba31..94b1b54c93 100644 "NCLASS", } diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go -index 0c1f5c029d..5d7213d8c7 100644 +index 1eedd46c69..38ab66b819 100644 --- a/src/cmd/internal/obj/loong64/obj.go +++ b/src/cmd/internal/obj/loong64/obj.go -@@ -84,6 +84,122 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) { +@@ -6,6 +6,7 @@ package loong64 + + import ( + "cmd/internal/obj" ++ "cmd/internal/objabi" + "cmd/internal/sys" + "internal/abi" + "log" +@@ -84,6 +85,128 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) { p.As = AADDVU } } @@ -1073,14 +1038,14 @@ index 0c1f5c029d..5d7213d8c7 100644 + p1.To.Type = obj.TYPE_REG + p1.To.Reg = REGTMP + p2 := obj.Appendp(p1, newprog) -+ p2.As = AJAL ++ p2.As = obj.ACALL + p2.To.Type = obj.TYPE_MEM + p2.To.Reg = REGTMP ++ return + } + -+ // We only care about global data: NAME_EXTERN means a global -+ // symbol in the Go sense, and p.Sym.Local is true for a few -+ // internally defined symbols. ++ // We only care about global data: NAME_EXTERN means a global symbol in the ++ // Go sense, and p.Sym.Local is true for a few internally defined symbols. + if p.From.Type == obj.TYPE_ADDR && p.From.Name == obj.NAME_EXTERN && !p.From.Sym.Local() { + // MOVV $sym, Rx becomes MOVV sym@GOT, Rx + // MOVV $sym+, Rx becomes MOVV sym@GOT, Rx; ADD , Rx @@ -1100,15 +1065,17 @@ index 0c1f5c029d..5d7213d8c7 100644 + q.To = p.To + p.From.Offset = 0 + } ++ return + } ++ + if p.GetFrom3() != nil && p.GetFrom3().Name == obj.NAME_EXTERN { + ctxt.Diag("don't know how to handle %v with -shared", p) + } + -+ var source *obj.Addr + // MOVx sym, Ry becomes MOVV sym@GOT, REGTMP; MOVx (REGTMP), Ry + // MOVx Ry, sym becomes MOVV sym@GOT, REGTMP; MOVx Ry, (REGTMP) + // An addition may be inserted between the two MOVs if there is an offset. ++ var source *obj.Addr + if p.From.Name == obj.NAME_EXTERN && !p.From.Sym.Local() { + if p.To.Name == obj.NAME_EXTERN && !p.To.Sym.Local() { + ctxt.Diag("cannot handle NAME_EXTERN on both sides in %v with -shared", p) @@ -1119,17 +1086,20 @@ index 0c1f5c029d..5d7213d8c7 100644 + } else { + return + } ++ + if p.As == obj.ATEXT || p.As == obj.AFUNCDATA || p.As == obj.ACALL || p.As == obj.ARET || p.As == obj.AJMP { + return + } ++ + if source.Sym.Type == objabi.STLSBSS { + return + } ++ + if source.Type != obj.TYPE_MEM { + ctxt.Diag("don't know how to handle %v with -shared", p) + } ++ + p1 := obj.Appendp(p, newprog) -+ p2 := obj.Appendp(p1, newprog) + p1.As = AMOVV + p1.From.Type = obj.TYPE_MEM + p1.From.Sym = source.Sym @@ -1137,6 +1107,7 @@ index 0c1f5c029d..5d7213d8c7 100644 + p1.To.Type = obj.TYPE_REG + p1.To.Reg = REGTMP + ++ p2 := obj.Appendp(p1, newprog) + p2.As = p.As + p2.From = p.From + p2.To = p.To @@ -1151,16 +1122,16 @@ index 0c1f5c029d..5d7213d8c7 100644 + } else { + return + } -+ obj.Nopout(p) + ++ obj.Nopout(p) } func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go -index 1a6a73fe12..aaefd15663 100644 +index 996c300d95..241a79817c 100644 --- a/src/cmd/internal/objabi/reloctype.go +++ b/src/cmd/internal/objabi/reloctype.go -@@ -315,6 +315,11 @@ const ( +@@ -316,6 +316,11 @@ const ( R_LOONG64_TLS_IE_PCREL_HI R_LOONG64_TLS_IE_LO @@ -1173,16 +1144,10 @@ index 1a6a73fe12..aaefd15663 100644 // by encoding the address into the instruction. R_JMPLOONG64 diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go -index 8cfff5ae8c..53104c76b3 100644 +index c7441efa28..e0649a5b0a 100644 --- a/src/cmd/internal/objabi/reloctype_string.go +++ b/src/cmd/internal/objabi/reloctype_string.go -@@ -1,4 +1,4 @@ --// Code generated by "stringer -type=RelocType cmd/internal/objabi/reloctype.go"; DO NOT EDIT. -+// Code generated by "stringer -type=RelocType"; DO NOT EDIT. - - package objabi - -@@ -81,17 +81,19 @@ func _() { +@@ -81,19 +81,21 @@ func _() { _ = x[R_CALLLOONG64-71] _ = x[R_LOONG64_TLS_IE_PCREL_HI-72] _ = x[R_LOONG64_TLS_IE_LO-73] @@ -1192,6 +1157,8 @@ index 8cfff5ae8c..53104c76b3 100644 - _ = x[R_ADDRCUOFF-77] - _ = x[R_WASMIMPORT-78] - _ = x[R_XCOFFREF-79] +- _ = x[R_PEIMAGEOFF-80] +- _ = x[R_INITORDER-81] + _ = x[R_LOONG64_GOTPCREL_HI-74] + _ = x[R_LOONG64_GOT_LO-75] + _ = x[R_JMPLOONG64-76] @@ -1200,34 +1167,23 @@ index 8cfff5ae8c..53104c76b3 100644 + _ = x[R_ADDRCUOFF-79] + _ = x[R_WASMIMPORT-80] + _ = x[R_XCOFFREF-81] ++ _ = x[R_PEIMAGEOFF-82] ++ _ = x[R_INITORDER-83] } --const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" -+const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" +-const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREFR_PEIMAGEOFFR_INITORDER" ++const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREFR_PEIMAGEOFFR_INITORDER" --var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 996, 1007, 1020, 1031, 1043, 1053} -+var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090} +-var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 996, 1007, 1020, 1031, 1043, 1053, 1065, 1076} ++var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090, 1102, 1113} func (i RelocType) String() string { i -= 1 -diff --git a/src/cmd/link/internal/ld/config.go b/src/cmd/link/internal/ld/config.go -index 129d30f35a..5809d7eb93 100644 ---- a/src/cmd/link/internal/ld/config.go -+++ b/src/cmd/link/internal/ld/config.go -@@ -84,7 +84,7 @@ func (mode *BuildMode) Set(s string) error { - switch buildcfg.GOOS { - case "linux": - switch buildcfg.GOARCH { -- case "386", "amd64", "arm", "arm64", "ppc64le", "s390x": -+ case "386", "amd64", "arm", "arm64", "loong64", "ppc64le", "s390x": - default: - return badmode() - } diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go -index 2f760fd231..a4c48e64cd 100644 +index 8f06068d78..d1296c3309 100644 --- a/src/cmd/link/internal/loong64/asm.go +++ b/src/cmd/link/internal/loong64/asm.go -@@ -14,7 +14,43 @@ import ( +@@ -14,7 +14,47 @@ import ( "log" ) @@ -1242,27 +1198,31 @@ index 2f760fd231..a4c48e64cd 100644 + initfunc.AddUint32(ctxt.Arch, op) + } + -+ // 0: pcalau12i r4, $0 -+ // -+ // 0: R_ADDRLOONG64U ++ // Emit the following function: + // -+ // 4: addi.d r4, r4, $0 -+ // -+ // 4: R_ADDRLOONG64 ++ // local.dso_init: ++ // la.pcrel $a0, local.moduledata ++ // b runtime.addmoduledata ++ ++ // 0000000000000000 : ++ // 0: 1a000004 pcalau12i $a0, 0 ++ // 0: R_LARCH_PCALA_HI20 local.moduledata + o(0x1a000004) + rel, _ := initfunc.AddRel(objabi.R_ADDRLOONG64U) + rel.SetOff(0) + rel.SetSiz(4) + rel.SetSym(ctxt.Moduledata) ++ ++ // 4: 02c00084 addi.d $a0, $a0, 0 ++ // 4: R_LARCH_PCALA_LO12 local.moduledata + o(0x02c00084) + rel2, _ := initfunc.AddRel(objabi.R_ADDRLOONG64) + rel2.SetOff(4) + rel2.SetSiz(4) + rel2.SetSym(ctxt.Moduledata) + -+ // 8: b $0 -+ // -+ // 8: R_CALLLOONG64 ++ // 8: 50000000 b 0 ++ // 8: R_LARCH_B26 runtime.addmoduledata + o(0x50000000) + rel3, _ := initfunc.AddRel(objabi.R_CALLLOONG64) + rel3.SetOff(8) @@ -1272,10 +1232,11 @@ index 2f760fd231..a4c48e64cd 100644 func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s loader.Sym, r loader.Reloc, rIdx int) bool { log.Fatalf("adddynrel not implemented") -@@ -69,6 +105,16 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, - out.Write64(uint64(elf.R_LARCH_TLS_IE_PC_LO12) | uint64(elfsym)<<32) - out.Write64(uint64(0x0)) - +@@ -78,6 +118,16 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, + out.Write64(uint64(sectoff)) + out.Write64(uint64(elf.R_LARCH_PCALA_HI20) | uint64(elfsym)<<32) + out.Write64(uint64(r.Xadd)) ++ + case objabi.R_LOONG64_GOTPCREL_HI: + out.Write64(uint64(sectoff)) + out.Write64(uint64(elf.R_LARCH_GOT_PC_HI20) | uint64(elfsym)<<32) @@ -1285,22 +1246,19 @@ index 2f760fd231..a4c48e64cd 100644 + out.Write64(uint64(sectoff)) + out.Write64(uint64(elf.R_LARCH_GOT_PC_LO12) | uint64(elfsym)<<32) + out.Write64(uint64(0x0)) -+ - // The pcaddu12i + addi.d instructions is used to obtain address of a symbol on Loong64. - // The low 12-bit of the symbol address need to be added. The addi.d instruction have - // signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced -@@ -116,7 +162,9 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade - objabi.R_CALLLOONG64, - objabi.R_JMPLOONG64, - objabi.R_LOONG64_TLS_IE_PCREL_HI, -- objabi.R_LOONG64_TLS_IE_LO: -+ objabi.R_LOONG64_GOTPCREL_HI, -+ objabi.R_LOONG64_TLS_IE_LO, -+ objabi.R_LOONG64_GOT_LO: - return val, 1, true - } } -@@ -161,7 +209,10 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant + + return true +@@ -98,6 +148,8 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade + default: + return val, 0, false + case objabi.R_ADDRLOONG64, ++ objabi.R_LOONG64_GOTPCREL_HI, ++ objabi.R_LOONG64_GOT_LO, + objabi.R_ADDRLOONG64U: + // set up addend for eventual relocation via outer symbol. + rs, _ := ld.FoldSubSymbolOffset(ldr, rs) +@@ -156,7 +208,10 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sym) (loader.ExtReloc, bool) { switch r.Type() { case objabi.R_ADDRLOONG64, @@ -1313,10 +1271,10 @@ index 2f760fd231..a4c48e64cd 100644 case objabi.R_ADDRLOONG64TLS, diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go -index f00f978eb7..8971edad94 100644 +index 230a952d2d..abab4b0541 100644 --- a/src/internal/platform/supported.go +++ b/src/internal/platform/supported.go -@@ -173,7 +173,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { +@@ -199,14 +199,14 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { case "shared": switch platform { @@ -1325,48 +1283,36 @@ index f00f978eb7..8971edad94 100644 return true } return false + + case "plugin": + switch platform { +- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/s390x", "linux/ppc64le", ++ case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/loong64", "linux/s390x", "linux/ppc64le", + "android/amd64", "android/386", + "darwin/amd64", "darwin/arm64", + "freebsd/amd64": diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index 3921091fea..ba06203fa1 100644 +index 6ffa1392c4..78a1a4d358 100644 --- a/src/runtime/asm_loong64.s +++ b/src/runtime/asm_loong64.s -@@ -618,6 +618,16 @@ TEXT runtime·goexit(SB),NOSPLIT|NOFRAME|TOPFRAME,$0-0 +@@ -642,6 +642,17 @@ TEXT runtime·goexit(SB),NOSPLIT|NOFRAME|TOPFRAME,$0-0 // traceback from goexit1 must hit code range of goexit - NOR R0, R0 // NOP + NOOP ++// This is called from .init_array and follows the platform, not Go, ABI. +TEXT runtime·addmoduledata(SB),NOSPLIT,$0-0 -+ ADDV $-16, R3 -+ MOVV R30, 8(R3) -+ MOVV runtime·lastmoduledatap(SB), R5 -+ MOVV R4, moduledata_next(R5) ++ ADDV $-0x10, R3 ++ MOVV R30, 8(R3) // The access to global variables below implicitly uses R30, which is callee-save ++ MOVV runtime·lastmoduledatap(SB), R12 ++ MOVV R4, moduledata_next(R12) + MOVV R4, runtime·lastmoduledatap(SB) + MOVV 8(R3), R30 -+ ADDV $16, R3 ++ ADDV $0x10, R3 + RET + TEXT ·checkASM(SB),NOSPLIT,$0-1 MOVW $1, R19 MOVB R19, ret+0(FP) -diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index 3d802beaa7..80ff980739 100644 ---- a/src/runtime/internal/atomic/atomic_loong64.s -+++ b/src/runtime/internal/atomic/atomic_loong64.s -@@ -294,13 +294,13 @@ TEXT ·Loadp(SB),NOSPLIT|NOFRAME,$0-16 - - // uint32 runtime∕internal∕atomic·LoadAcq(uint32 volatile* ptr) - TEXT ·LoadAcq(SB),NOSPLIT|NOFRAME,$0-12 -- JMP atomic·Load(SB) -+ JMP ·Load(SB) - - // uint64 ·LoadAcq64(uint64 volatile* ptr) - TEXT ·LoadAcq64(SB),NOSPLIT|NOFRAME,$0-16 -- JMP atomic·Load64(SB) -+ JMP ·Load64(SB) - - // uintptr ·LoadAcquintptr(uintptr volatile* ptr) - TEXT ·LoadAcquintptr(SB),NOSPLIT|NOFRAME,$0-16 -- JMP atomic·Load64(SB) -+ JMP ·Load64(SB) - -- 2.38.1 diff --git a/0001-cmd-go-use-aliyun-proxy-and-local-sumdb.patch b/0001-cmd-go-use-aliyun-proxy-and-local-sumdb.patch index c0c28be542942dcb040c99f4eb5fc98e1fe90ffc..fd474c77bba2a9781577866697035df4f72b41e3 100644 --- a/0001-cmd-go-use-aliyun-proxy-and-local-sumdb.patch +++ b/0001-cmd-go-use-aliyun-proxy-and-local-sumdb.patch @@ -12,12 +12,12 @@ diff --git a/src/cmd/go/internal/cfg/cfg.go b/src/cmd/go/internal/cfg/cfg.go index 57a3c1ff6f..e56c60e591 100644 --- a/src/cmd/go/internal/cfg/cfg.go +++ b/src/cmd/go/internal/cfg/cfg.go -@@ -266,8 +266,8 @@ var ( +@@ -417,8 +417,8 @@ var ( GOPPC64 = envOr("GOPPC64", fmt.Sprintf("%s%d", "power", buildcfg.GOPPC64)) GOWASM = envOr("GOWASM", fmt.Sprint(buildcfg.GOWASM)) -- GOPROXY = envOr("GOPROXY", "https://proxy.golang.org,direct") -- GOSUMDB = envOr("GOSUMDB", "sum.golang.org") +- GOPROXY = envOr("GOPROXY", "") +- GOSUMDB = envOr("GOSUMDB", "") + GOPROXY = envOr("GOPROXY", "https://mirrors.aliyun.com/goproxy/,direct") + GOSUMDB = envOr("GOSUMDB", "sum.golang.google.cn") GOPRIVATE = Getenv("GOPRIVATE") @@ -28,18 +28,18 @@ index becd88b52e..b2a1250372 100644 --- a/src/cmd/go/testdata/script/mod_sumdb_golang.txt +++ b/src/cmd/go/testdata/script/mod_sumdb_golang.txt @@ -2,12 +2,12 @@ - env GOPROXY= - env GOSUMDB= - go env GOPROXY --stdout '^https://proxy.golang.org,direct$' -+stdout '^https://mirrors.aliyun.com/goproxy/,direct$' - go env GOSUMDB --stdout '^sum.golang.org$' -+stdout '^sum.golang.google.cn$' - env GOPROXY=https://proxy.golang.org - go env GOSUMDB --stdout '^sum.golang.org$' -+stdout '^sum.golang.google.cn$' + [go-builder] env GOPROXY= + [go-builder] env GOSUMDB= + [go-builder] go env GOPROXY +-[go-builder] stdout '^https://proxy.golang.org,direct$' ++[go-builder] stdout '^https://mirrors.aliyun.com/goproxy/,direct$' + [go-builder] go env GOSUMDB +-[go-builder] stdout '^sum.golang.org$' ++[go-builder] stdout '^sum.golang.google.cn$' + [go-builder] env GOPROXY=https://proxy.golang.org + [go-builder] go env GOSUMDB +-[go-builder] stdout '^sum.golang.org$' ++[go-builder] stdout '^sum.golang.google.cn$' # Download direct from github. diff --git a/0038-runtime-enable-memory-sanitizer-on-loong64.patch b/0002-runtime-cmd-go-enable-memory-sanitizer-on-linux-loon.patch similarity index 67% rename from 0038-runtime-enable-memory-sanitizer-on-loong64.patch rename to 0002-runtime-cmd-go-enable-memory-sanitizer-on-linux-loon.patch index cc992af430b368f85b871380a8fbba2fd8e90f07..1dd74447e04d911936448b966fb271c43e206fb6 100644 --- a/0038-runtime-enable-memory-sanitizer-on-loong64.patch +++ b/0002-runtime-cmd-go-enable-memory-sanitizer-on-linux-loon.patch @@ -1,11 +1,13 @@ -From ccc075ea51518e51b15e64939d52c14d0bf271d3 Mon Sep 17 00:00:00 2001 +From 0ee3e3ece0f02f18211190d31a75118d236635e4 Mon Sep 17 00:00:00 2001 From: Xiaolin Zhao -Date: Wed, 14 Dec 2022 15:44:36 +0800 -Subject: [PATCH 38/62] runtime: enable memory sanitizer on loong64 +Date: Fri, 31 Mar 2023 15:36:59 +0800 +Subject: [PATCH 02/51] runtime, cmd/go: enable memory sanitizer on + linux/loong64 -Change-Id: I24364239d3dfe3ea9185bdbd0a525523ae50dfb7 +Change-Id: If537c5ffb1c9d4b3316b9b3794d411953bc5764b --- - misc/cgo/testsanitizers/cc_test.go | 2 +- + src/cmd/go/alldocs.go | 2 +- + src/cmd/go/internal/work/build.go | 2 +- src/internal/platform/supported.go | 2 +- src/runtime/cgo/gcc_mmap.c | 2 +- src/runtime/cgo/mmap.go | 2 +- @@ -13,28 +15,41 @@ Change-Id: I24364239d3dfe3ea9185bdbd0a525523ae50dfb7 src/runtime/mmap.go | 2 +- src/runtime/msan/msan.go | 2 +- src/runtime/msan_loong64.s | 72 ++++++++++++++++++++++++++++++ - src/runtime/sys_linux_loong64.s | 31 ++++++++++++- - 9 files changed, 108 insertions(+), 9 deletions(-) + src/runtime/sys_linux_loong64.s | 37 +++++++++++++-- + 10 files changed, 113 insertions(+), 12 deletions(-) create mode 100644 src/runtime/msan_loong64.s -diff --git a/misc/cgo/testsanitizers/cc_test.go b/misc/cgo/testsanitizers/cc_test.go -index 8eda1372f6..b9157d5f4a 100644 ---- a/misc/cgo/testsanitizers/cc_test.go -+++ b/misc/cgo/testsanitizers/cc_test.go -@@ -563,7 +563,7 @@ func hangProneCmd(name string, arg ...string) *exec.Cmd { - func mSanSupported(goos, goarch string) bool { - switch goos { - case "linux": -- return goarch == "amd64" || goarch == "arm64" -+ return goarch == "amd64" || goarch == "arm64" || goarch == "loong64" - case "freebsd": - return goarch == "amd64" - default: +diff --git a/src/cmd/go/alldocs.go b/src/cmd/go/alldocs.go +index bb28756133..d8377d1fd6 100644 +--- a/src/cmd/go/alldocs.go ++++ b/src/cmd/go/alldocs.go +@@ -119,7 +119,7 @@ + // linux/ppc64le and linux/arm64 (only for 48-bit VMA). + // -msan + // enable interoperation with memory sanitizer. +-// Supported only on linux/amd64, linux/arm64, freebsd/amd64 ++// Supported only on linux/amd64, linux/arm64, linux/loong64, freebsd/amd64 + // and only with Clang/LLVM as the host C compiler. + // PIE build mode will be used on all platforms except linux/amd64. + // -asan +diff --git a/src/cmd/go/internal/work/build.go b/src/cmd/go/internal/work/build.go +index e2e0e07299..05e300581c 100644 +--- a/src/cmd/go/internal/work/build.go ++++ b/src/cmd/go/internal/work/build.go +@@ -76,7 +76,7 @@ and test commands: + linux/ppc64le and linux/arm64 (only for 48-bit VMA). + -msan + enable interoperation with memory sanitizer. +- Supported only on linux/amd64, linux/arm64, freebsd/amd64 ++ Supported only on linux/amd64, linux/arm64, linux/loong64, freebsd/amd64 + and only with Clang/LLVM as the host C compiler. + PIE build mode will be used on all platforms except linux/amd64. + -asan diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go -index 8a0ff8372e..7aed873d41 100644 +index abab4b0541..b4f8bb5496 100644 --- a/src/internal/platform/supported.go +++ b/src/internal/platform/supported.go -@@ -28,7 +28,7 @@ func RaceDetectorSupported(goos, goarch string) bool { +@@ -38,7 +38,7 @@ func RaceDetectorSupported(goos, goarch string) bool { func MSanSupported(goos, goarch string) bool { switch goos { case "linux": @@ -44,20 +59,20 @@ index 8a0ff8372e..7aed873d41 100644 return goarch == "amd64" default: diff --git a/src/runtime/cgo/gcc_mmap.c b/src/runtime/cgo/gcc_mmap.c -index 83d857f0d1..bda5471340 100644 +index 1fbd5e82a4..eb710a039d 100644 --- a/src/runtime/cgo/gcc_mmap.c +++ b/src/runtime/cgo/gcc_mmap.c @@ -2,7 +2,7 @@ // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. --// +build linux,amd64 linux,arm64 linux,ppc64le freebsd,amd64 -+// +build linux,amd64 linux,arm64 linux,loong64 linux,ppc64le freebsd,amd64 +-//go:build (linux && (amd64 || arm64 || ppc64le)) || (freebsd && amd64) ++//go:build (linux && (amd64 || arm64 || loong64 || ppc64le)) || (freebsd && amd64) #include #include diff --git a/src/runtime/cgo/mmap.go b/src/runtime/cgo/mmap.go -index 2f7e83bcb7..716c1a3c8a 100644 +index 2f7e83bcb7..144af2b2ca 100644 --- a/src/runtime/cgo/mmap.go +++ b/src/runtime/cgo/mmap.go @@ -2,7 +2,7 @@ @@ -65,12 +80,12 @@ index 2f7e83bcb7..716c1a3c8a 100644 // license that can be found in the LICENSE file. -//go:build (linux && amd64) || (linux && arm64) || (freebsd && amd64) -+//go:build (linux && amd64) || (linux && arm64) || (linux && loong64) || (freebsd && amd64) ++//go:build (linux && (amd64 || arm64 || loong64)) || (freebsd && amd64) package cgo diff --git a/src/runtime/cgo_mmap.go b/src/runtime/cgo_mmap.go -index 30660f7784..014ce80d68 100644 +index 30660f7784..36d776e628 100644 --- a/src/runtime/cgo_mmap.go +++ b/src/runtime/cgo_mmap.go @@ -4,7 +4,7 @@ @@ -78,12 +93,12 @@ index 30660f7784..014ce80d68 100644 // Support for memory sanitizer. See runtime/cgo/mmap.go. -//go:build (linux && amd64) || (linux && arm64) || (freebsd && amd64) -+//go:build (linux && amd64) || (linux && arm64) || (linux && loong64) || (freebsd && amd64) ++//go:build (linux && (amd64 || arm64 || loong64)) || (freebsd && amd64) package runtime diff --git a/src/runtime/mmap.go b/src/runtime/mmap.go -index f0183f61cf..552aed22b3 100644 +index f0183f61cf..9a7b298562 100644 --- a/src/runtime/mmap.go +++ b/src/runtime/mmap.go @@ -2,7 +2,7 @@ @@ -91,7 +106,7 @@ index f0183f61cf..552aed22b3 100644 // license that can be found in the LICENSE file. -//go:build !aix && !darwin && !js && (!linux || !amd64) && (!linux || !arm64) && (!freebsd || !amd64) && !openbsd && !plan9 && !solaris && !windows -+//go:build !aix && !darwin && !js && (!linux || !amd64) && (!linux || !arm64) && (!linux || !loong64) && (!freebsd || !amd64) && !openbsd && !plan9 && !solaris && !windows ++//go:build !aix && !darwin && !js && !((linux && (amd64 || arm64 || loong64)) || (freebsd && amd64)) && !openbsd && !plan9 && !solaris && !windows package runtime @@ -110,11 +125,11 @@ index 4e41f8528d..7b3e8e608d 100644 diff --git a/src/runtime/msan_loong64.s b/src/runtime/msan_loong64.s new file mode 100644 -index 0000000000..56376a4f3b +index 0000000000..dcd7940ed8 --- /dev/null +++ b/src/runtime/msan_loong64.s @@ -0,0 +1,72 @@ -+// Copyright 2022 The Go Authors. All rights reserved. ++// Copyright 2023 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + @@ -187,24 +202,29 @@ index 0000000000..56376a4f3b + MOVV R23, R3 + RET diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s -index 2a16b4f01d..30a2a03389 100644 +index 12e5455345..eba8e1f24c 100644 --- a/src/runtime/sys_linux_loong64.s +++ b/src/runtime/sys_linux_loong64.s -@@ -465,7 +465,7 @@ TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0 +@@ -461,8 +461,8 @@ TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$168 + TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0 JMP runtime·sigtramp(SB) - // func mmap(addr unsafe.Pointer, n uintptr, prot, flags, fd int32, off uint32) (p unsafe.Pointer, err int) +-// func mmap(addr unsafe.Pointer, n uintptr, prot, flags, fd int32, off uint32) (p unsafe.Pointer, err int) -TEXT runtime·mmap(SB),NOSPLIT|NOFRAME,$0 ++// func sysMmap(addr unsafe.Pointer, n uintptr, prot, flags, fd int32, off uint32) (p unsafe.Pointer, err int) +TEXT runtime·sysMmap(SB),NOSPLIT|NOFRAME,$0 MOVV addr+0(FP), R4 MOVV n+8(FP), R5 MOVW prot+16(FP), R6 -@@ -486,8 +486,24 @@ ok: +@@ -483,8 +483,25 @@ ok: MOVV $0, err+40(FP) RET +-// func munmap(addr unsafe.Pointer, n uintptr) +-TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 +// Call the function stored in _cgo_mmap using the GCC calling convention. +// This must be called on the system stack. ++// func callCgoMmap(addr unsafe.Pointer, n uintptr, prot, flags, fd int32, off uint32) uintptr +TEXT runtime·callCgoMmap(SB),NOSPLIT,$0 + MOVV addr+0(FP), R4 + MOVV n+8(FP), R5 @@ -219,18 +239,18 @@ index 2a16b4f01d..30a2a03389 100644 + MOVV R4, ret+32(FP) + RET + - // func munmap(addr unsafe.Pointer, n uintptr) --TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 ++// func sysMunmap(addr unsafe.Pointer, n uintptr) +TEXT runtime·sysMunmap(SB),NOSPLIT|NOFRAME,$0 MOVV addr+0(FP), R4 MOVV n+8(FP), R5 MOVV $SYS_munmap, R11 -@@ -497,6 +513,17 @@ TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 +@@ -494,6 +511,18 @@ TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 MOVV R0, 0xf3(R0) // crash RET +// Call the function stored in _cgo_munmap using the GCC calling convention. +// This must be called on the system stack. ++// func callCgoMunmap(addr unsafe.Pointer, n uintptr) +TEXT runtime·callCgoMunmap(SB),NOSPLIT,$0 + MOVV addr+0(FP), R4 + MOVV n+8(FP), R5 diff --git a/0039-runtime-enable-address-sanitizer-on-loong64.patch b/0003-runtime-cmd-go-enable-address-sanitizer-on-linux-loo.patch similarity index 62% rename from 0039-runtime-enable-address-sanitizer-on-loong64.patch rename to 0003-runtime-cmd-go-enable-address-sanitizer-on-linux-loo.patch index 0549cdb7bf23c7ce8b04ff7dfb81ac96b147e125..9b08485e90084e583d89bbe87801aeb9bd70c905 100644 --- a/0039-runtime-enable-address-sanitizer-on-loong64.patch +++ b/0003-runtime-cmd-go-enable-address-sanitizer-on-linux-loo.patch @@ -1,35 +1,58 @@ -From 2ed9a97b517e6eb6f5e8f4114f7f26d08edf3072 Mon Sep 17 00:00:00 2001 +From bab2e6e8ee28692e81f9397b4c6fc92df6e3ae43 Mon Sep 17 00:00:00 2001 From: Xiaolin Zhao -Date: Wed, 14 Dec 2022 16:10:24 +0800 -Subject: [PATCH 39/62] runtime: enable address sanitizer on loong64 +Date: Fri, 31 Mar 2023 17:08:44 +0800 +Subject: [PATCH 03/51] runtime, cmd/go: enable address sanitizer on + linux/loong64 -Change-Id: I73e9f1112fdb80b70b0d18880424d055be965fff +Change-Id: I48a65f2f10e3dc488acd9c02ea1a1f37de192be0 --- - misc/cgo/testsanitizers/cc_test.go | 2 +- + src/cmd/go/alldocs.go | 5 +- + src/cmd/go/internal/work/build.go | 5 +- src/internal/platform/supported.go | 2 +- src/runtime/asan/asan.go | 2 +- src/runtime/asan_loong64.s | 75 ++++++++++++++++++++++++++++++ - 4 files changed, 78 insertions(+), 3 deletions(-) + 5 files changed, 83 insertions(+), 6 deletions(-) create mode 100644 src/runtime/asan_loong64.s -diff --git a/misc/cgo/testsanitizers/cc_test.go b/misc/cgo/testsanitizers/cc_test.go -index b9157d5f4a..275b067345 100644 ---- a/misc/cgo/testsanitizers/cc_test.go -+++ b/misc/cgo/testsanitizers/cc_test.go -@@ -576,7 +576,7 @@ func mSanSupported(goos, goarch string) bool { - func aSanSupported(goos, goarch string) bool { - switch goos { - case "linux": -- return goarch == "amd64" || goarch == "arm64" || goarch == "riscv64" || goarch == "ppc64le" -+ return goarch == "amd64" || goarch == "arm64" || goarch == "loong64" || goarch == "riscv64" || goarch == "ppc64le" - default: - return false - } +diff --git a/src/cmd/go/alldocs.go b/src/cmd/go/alldocs.go +index d8377d1fd6..7de5a066dd 100644 +--- a/src/cmd/go/alldocs.go ++++ b/src/cmd/go/alldocs.go +@@ -124,9 +124,10 @@ + // PIE build mode will be used on all platforms except linux/amd64. + // -asan + // enable interoperation with address sanitizer. +-// Supported only on linux/arm64, linux/amd64. +-// Supported only on linux/amd64 or linux/arm64 and only with GCC 7 and higher ++// Supported only on linux/arm64, linux/amd64, linux/loong64. ++// Supported on linux/amd64 or linux/arm64 and only with GCC 7 and higher + // or Clang/LLVM 9 and higher. ++// And supported on linux/loong64 only with Clang/LLVM 16 and higher. + // -cover + // enable code coverage instrumentation. + // -covermode set,count,atomic +diff --git a/src/cmd/go/internal/work/build.go b/src/cmd/go/internal/work/build.go +index 05e300581c..8cb53b95d9 100644 +--- a/src/cmd/go/internal/work/build.go ++++ b/src/cmd/go/internal/work/build.go +@@ -81,9 +81,10 @@ and test commands: + PIE build mode will be used on all platforms except linux/amd64. + -asan + enable interoperation with address sanitizer. +- Supported only on linux/arm64, linux/amd64. +- Supported only on linux/amd64 or linux/arm64 and only with GCC 7 and higher ++ Supported only on linux/arm64, linux/amd64, linux/loong64. ++ Supported on linux/amd64 or linux/arm64 and only with GCC 7 and higher + or Clang/LLVM 9 and higher. ++ And supported on linux/loong64 only with Clang/LLVM 16 and higher. + -cover + enable code coverage instrumentation. + -covermode set,count,atomic diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go -index 7aed873d41..d8e64dea78 100644 +index b4f8bb5496..715bfb5e48 100644 --- a/src/internal/platform/supported.go +++ b/src/internal/platform/supported.go -@@ -42,7 +42,7 @@ func MSanSupported(goos, goarch string) bool { +@@ -51,7 +51,7 @@ func MSanSupported(goos, goarch string) bool { func ASanSupported(goos, goarch string) bool { switch goos { case "linux": @@ -53,11 +76,11 @@ index 25f15ae45b..ef70b0145b 100644 diff --git a/src/runtime/asan_loong64.s b/src/runtime/asan_loong64.s new file mode 100644 -index 0000000000..fe6742fffc +index 0000000000..8cef686217 --- /dev/null +++ b/src/runtime/asan_loong64.s @@ -0,0 +1,75 @@ -+// Copyright 2021 The Go Authors. All rights reserved. ++// Copyright 2023 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + diff --git a/0004-cmd-link-use-gold-on-ARM-ARM64-only-if-gold-is-avail.patch b/0004-cmd-link-use-gold-on-ARM-ARM64-only-if-gold-is-avail.patch index d0a714976dc42f63c3f301321883dfc6444213f4..5341d6d6a87bfcee82bb3bf80fc0512bbfdb3577 100644 --- a/0004-cmd-link-use-gold-on-ARM-ARM64-only-if-gold-is-avail.patch +++ b/0004-cmd-link-use-gold-on-ARM-ARM64-only-if-gold-is-avail.patch @@ -1,38 +1,20 @@ -From 5ccf9f47bf4f5ba53e0ab7338a7fd4626714cfb2 Mon Sep 17 00:00:00 2001 -From: Jeffery To -Date: Tue, 23 Nov 2021 15:05:37 +0800 -Subject: [PATCH] cmd/link: use gold on ARM/ARM64 only if gold is available +From 7506da0af38aa307f45664f0c787b5767cc7a87f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Alejandro=20S=C3=A1ez?= +Date: Thu, 22 Jun 2023 17:19:00 +0200 +Subject: [PATCH] Force gold in aarch64 until binutils 2.41 is on Fedora -COPY relocation handling on ARM/ARM64 has been fixed in recent versions -of the GNU linker. This switches to gold only if gold is available. - -Fixes #22040. --- - src/cmd/link/internal/ld/lib.go | 19 +++++++------------ - 1 file changed, 7 insertions(+), 12 deletions(-) + src/cmd/link/internal/ld/lib.go | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/src/cmd/link/internal/ld/lib.go b/src/cmd/link/internal/ld/lib.go -index 9e13db7b71..2b379259a2 100644 +index 91e2d5149c..99c305530b 100644 --- a/src/cmd/link/internal/ld/lib.go +++ b/src/cmd/link/internal/ld/lib.go -@@ -1390,25 +1390,20 @@ func (ctxt *Link) hostlink() { - } +@@ -1605,15 +1605,13 @@ func (ctxt *Link) hostlink() { + // https://go.dev/issue/22040 + altLinker = "gold" - if ctxt.Arch.InFamily(sys.ARM, sys.ARM64) && buildcfg.GOOS == "linux" { -- // On ARM, the GNU linker will generate COPY relocations -- // even with -znocopyreloc set. -+ // On ARM, older versions of the GNU linker will generate -+ // COPY relocations even with -znocopyreloc set. - // https://sourceware.org/bugzilla/show_bug.cgi?id=19962 - // -- // On ARM64, the GNU linker will fail instead of -- // generating COPY relocations. -+ // On ARM64, older versions of the GNU linker will fail -+ // instead of generating COPY relocations. - // -- // In both cases, switch to gold. -- altLinker = "gold" -- - // If gold is not installed, gcc will silently switch - // back to ld.bfd. So we parse the version information - // and provide a useful error if gold is missing. @@ -42,12 +24,12 @@ index 9e13db7b71..2b379259a2 100644 cmd := exec.Command(name, args...) if out, err := cmd.CombinedOutput(); err == nil { - if !bytes.Contains(out, []byte("GNU gold")) { -- log.Fatalf("ARM external linker must be gold (issue #15696), but is not: %s", out) +- log.Fatalf("ARM64 external linker must be gold (issue #15696, 22040), but is not: %s", out) + if bytes.Contains(out, []byte("GNU gold")) { + altLinker = "gold" } } } -- -2.32.0 +2.40.1 diff --git a/0004-internal-sysinfo-print-cpu-type-from-cpuinfo-when-in.patch b/0004-internal-sysinfo-print-cpu-type-from-cpuinfo-when-in.patch new file mode 100644 index 0000000000000000000000000000000000000000..ed506bd76e2e616d6a31254dc6e54aaade147af7 --- /dev/null +++ b/0004-internal-sysinfo-print-cpu-type-from-cpuinfo-when-in.patch @@ -0,0 +1,194 @@ +From 51a11cb75d60f68f4e8edc7a244c10feaf26b33a Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Tue, 11 Jul 2023 05:11:26 +0800 +Subject: [PATCH 04/51] internal/sysinfo: print cpu type from cpuinfo when + internal cpu name is empty on Linux + +Supports 386,amd64 and loong64 architectures on linux operating systems. + +Example output: +$ go test -bench=.* +goos: linux +goarch: loong64 +pkg: runtime +cpu: Loongson-3A5000-HV @ 2500.00MHz +BenchmarkSemTable/OneAddrCollision/n=1000 19261 62302 ns/op + ... + +Change-Id: I02db12d70c11327e4625bb6e59f30dfaf37c2db0 +--- + src/go/build/deps_test.go | 2 +- + src/internal/sysinfo/generic_os_cpuinfo.go | 11 +++++ + src/internal/sysinfo/proc_cpuinfo_linux.go | 41 +++++++++++++++++++ + .../sysinfo/proc_cpuinfo_linux_loong64.go | 33 +++++++++++++++ + .../sysinfo/proc_cpuinfo_linux_x84.go | 22 ++++++++++ + src/internal/sysinfo/sysinfo.go | 5 +++ + 6 files changed, 113 insertions(+), 1 deletion(-) + create mode 100644 src/internal/sysinfo/generic_os_cpuinfo.go + create mode 100644 src/internal/sysinfo/proc_cpuinfo_linux.go + create mode 100644 src/internal/sysinfo/proc_cpuinfo_linux_loong64.go + create mode 100644 src/internal/sysinfo/proc_cpuinfo_linux_x84.go + +diff --git a/src/go/build/deps_test.go b/src/go/build/deps_test.go +index 592f2fd72a..cd99bd2a63 100644 +--- a/src/go/build/deps_test.go ++++ b/src/go/build/deps_test.go +@@ -562,7 +562,7 @@ var depsRules = ` + < net/rpc/jsonrpc; + + # System Information +- internal/cpu, sync ++ internal/cpu, io, os, strings, sync + < internal/sysinfo; + + # Test-only +diff --git a/src/internal/sysinfo/generic_os_cpuinfo.go b/src/internal/sysinfo/generic_os_cpuinfo.go +new file mode 100644 +index 0000000000..ec3047bd3d +--- /dev/null ++++ b/src/internal/sysinfo/generic_os_cpuinfo.go +@@ -0,0 +1,11 @@ ++// Copyright 2023 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++//go:build !(linux && (386 || amd64 || loong64)) ++ ++package sysinfo ++ ++func osCpuInfoName() string { ++ return "" ++} +diff --git a/src/internal/sysinfo/proc_cpuinfo_linux.go b/src/internal/sysinfo/proc_cpuinfo_linux.go +new file mode 100644 +index 0000000000..cbe56fdae0 +--- /dev/null ++++ b/src/internal/sysinfo/proc_cpuinfo_linux.go +@@ -0,0 +1,41 @@ ++// Copyright 2023 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++package sysinfo ++ ++import ( ++ "io" ++ "os" ++ "strings" ++) ++ ++func readLinuxProcCPUInfo(buf []byte) error { ++ f, err := os.Open("/proc/cpuinfo") ++ if err != nil { ++ return err ++ } ++ defer f.Close() ++ ++ _, err = io.ReadFull(f, buf) ++ if err != nil && err != io.ErrUnexpectedEOF { ++ return err ++ } ++ ++ return nil ++} ++ ++func findCPUInfoField(buf []byte, fieldName string) string { ++ filedValue := string(buf[:len(buf)]) ++ n := strings.Index(filedValue, fieldName) ++ if n == -1 { ++ return "" ++ } ++ ++ filedValue = filedValue[n+len(fieldName):] ++ if n := strings.Index(filedValue, "\n"); n != -1 { ++ filedValue = filedValue[:n] ++ } ++ ++ return filedValue ++} +diff --git a/src/internal/sysinfo/proc_cpuinfo_linux_loong64.go b/src/internal/sysinfo/proc_cpuinfo_linux_loong64.go +new file mode 100644 +index 0000000000..3592998de6 +--- /dev/null ++++ b/src/internal/sysinfo/proc_cpuinfo_linux_loong64.go +@@ -0,0 +1,33 @@ ++// Copyright 2023 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++package sysinfo ++ ++const ( ++ // cpuinfo filed name ++ ModelName = "\nModel Name\t\t: " ++ CPUMHz = "\nCPU MHz\t\t\t: " ++) ++ ++func osCpuInfoName() string { ++ // The 512-byte buffer is enough to hold the contents of CPU0 ++ buf := make([]byte, 512) ++ err := readLinuxProcCPUInfo(buf) ++ if err != nil { ++ return "" ++ } ++ ++ modelName := findCPUInfoField(buf, ModelName) ++ cpuMHz := findCPUInfoField(buf, CPUMHz) ++ ++ if modelName == "" { ++ return "" ++ } ++ ++ if cpuMHz == "" { ++ return modelName ++ } ++ ++ return modelName + " @ " + cpuMHz + "MHz" ++} +diff --git a/src/internal/sysinfo/proc_cpuinfo_linux_x84.go b/src/internal/sysinfo/proc_cpuinfo_linux_x84.go +new file mode 100644 +index 0000000000..7b5d5b88f2 +--- /dev/null ++++ b/src/internal/sysinfo/proc_cpuinfo_linux_x84.go +@@ -0,0 +1,22 @@ ++// Copyright 2023 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++//go:build linux && (386 || amd64) ++ ++package sysinfo ++ ++const ( ++ // cpuinfo filed name ++ ModelName = "model name\t: " ++) ++ ++func osCpuInfoName() string { ++ buf := make([]byte, 512) ++ err := readLinuxProcCPUInfo(buf) ++ if err != nil { ++ return "" ++ } ++ ++ return findCPUInfoField(buf, ModelName) ++} +diff --git a/src/internal/sysinfo/sysinfo.go b/src/internal/sysinfo/sysinfo.go +index 961be7abae..19e841fb16 100644 +--- a/src/internal/sysinfo/sysinfo.go ++++ b/src/internal/sysinfo/sysinfo.go +@@ -26,6 +26,11 @@ func (cpu *cpuInfo) Name() string { + return + } + // TODO(martisch): use /proc/cpuinfo and /sys/devices/system/cpu/ on Linux as fallback. ++ if name := osCpuInfoName(); name != "" { ++ cpu.name = name ++ return ++ } + }) ++ + return cpu.name + } +-- +2.38.1 + diff --git a/0005-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch b/0005-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch deleted file mode 100644 index 0e70c96a56eff810093c9a50bca7f48bdb26c7e7..0000000000000000000000000000000000000000 --- a/0005-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch +++ /dev/null @@ -1,858 +0,0 @@ -From eacad4aa5e48cef5fc9ed83a53214c2b28bb10db Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Thu, 4 Aug 2022 18:13:59 +0800 -Subject: [PATCH 05/62] cmd/asm: add RDTIME{L,H}.W, RDTIME.D support for - loong64 - -Instruction formats: rdtime rd, rj - -The RDTIME family of instructions are used to read constant frequency timer -information, the stable counter value is written into the general register -rd, and the counter id information is written into the general register rj. -(Note: both of its register operands are outputs). - -Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html - -Change-Id: Ida5bbb28316ef70b5f616dac3e6fa6f2e77875b5 -Reviewed-on: https://go-review.googlesource.com/c/go/+/421655 -Reviewed-by: xiaodong liu -Reviewed-by: WANG Xuerui -Reviewed-by: Wayne Zuo -Reviewed-by: Cherry Mui -Reviewed-by: Michael Knyszek -Run-TryBot: Wayne Zuo -TryBot-Result: Gopher Robot -Reviewed-by: Meidan Li ---- - src/cmd/asm/internal/arch/loong64.go | 11 + - src/cmd/asm/internal/asm/asm.go | 12 + - .../asm/internal/asm/testdata/loong64enc1.s | 4 + - src/cmd/internal/obj/loong64/a.out.go | 5 + - src/cmd/internal/obj/loong64/anames.go | 3 + - src/cmd/internal/obj/loong64/asm.go | 647 +++++++++--------- - src/cmd/internal/obj/util.go | 1 + - 7 files changed, 373 insertions(+), 310 deletions(-) - -diff --git a/src/cmd/asm/internal/arch/loong64.go b/src/cmd/asm/internal/arch/loong64.go -index ebf842c1f2..2958ee1a86 100644 ---- a/src/cmd/asm/internal/arch/loong64.go -+++ b/src/cmd/asm/internal/arch/loong64.go -@@ -44,6 +44,17 @@ func IsLoong64MUL(op obj.As) bool { - return false - } - -+// IsLoong64RDTIME reports whether the op (as defined by an loong64.A* -+// constant) is one of the RDTIMELW/RDTIMEHW/RDTIMED instructions that -+// require special handling. -+func IsLoong64RDTIME(op obj.As) bool { -+ switch op { -+ case loong64.ARDTIMELW, loong64.ARDTIMEHW, loong64.ARDTIMED: -+ return true -+ } -+ return false -+} -+ - func loong64RegisterNumber(name string, n int16) (int16, bool) { - switch name { - case "F": -diff --git a/src/cmd/asm/internal/asm/asm.go b/src/cmd/asm/internal/asm/asm.go -index 00fb7f417f..4d0eeacc74 100644 ---- a/src/cmd/asm/internal/asm/asm.go -+++ b/src/cmd/asm/internal/asm/asm.go -@@ -642,6 +642,18 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) { - prog.Reg = p.getRegister(prog, op, &a[1]) - break - } -+ -+ if arch.IsLoong64RDTIME(op) { -+ // The Loong64 RDTIME family of instructions is a bit special, -+ // in that both its register operands are outputs -+ prog.To = a[0] -+ if a[1].Type != obj.TYPE_REG { -+ p.errorf("invalid addressing modes for 2nd operand to %s instruction, must be register", op) -+ return -+ } -+ prog.RegTo2 = a[1].Reg -+ break -+ } - } - prog.From = a[0] - prog.To = a[1] -diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -index 83bb6ec078..0cc077c091 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -@@ -218,3 +218,7 @@ lable2: - CMPGEF F4, R5 // a090130c - CMPGED F4, R5 // a090230c - CMPEQD F4, R5 // a010220c -+ -+ RDTIMELW R4, R0 // 80600000 -+ RDTIMEHW R4, R0 // 80640000 -+ RDTIMED R4, R5 // 85680000 -diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go -index 88bf714c5f..10cf396669 100644 ---- a/src/cmd/internal/obj/loong64/a.out.go -+++ b/src/cmd/internal/obj/loong64/a.out.go -@@ -391,6 +391,11 @@ const ( - AMOVVF - AMOVVD - -+ // 2.2.10. Other Miscellaneous Instructions -+ ARDTIMELW -+ ARDTIMEHW -+ ARDTIMED -+ - ALAST - - // aliases -diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go -index 20e7465556..eb13da20c3 100644 ---- a/src/cmd/internal/obj/loong64/anames.go -+++ b/src/cmd/internal/obj/loong64/anames.go -@@ -130,5 +130,8 @@ var Anames = []string{ - "MOVDV", - "MOVVF", - "MOVVD", -+ "RDTIMELW", -+ "RDTIMEHW", -+ "RDTIMED", - "LAST", - } -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index df3e9bf866..982ddd8103 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -33,9 +33,10 @@ const ( - - type Optab struct { - as obj.As -- a1 uint8 -- a2 uint8 -- a3 uint8 -+ a1 uint8 // first source operand -+ a2 uint8 // 2nd source operand -+ a3 uint8 // first destination operand -+ a4 uint8 // 2nd destination operand - type_ int8 - size int8 - param int16 -@@ -48,308 +49,312 @@ const ( - ) - - var optab = []Optab{ -- {obj.ATEXT, C_ADDR, C_NONE, C_TEXTSIZE, 0, 0, 0, 0, 0}, -- -- {AMOVW, C_REG, C_NONE, C_REG, 1, 4, 0, 0, 0}, -- {AMOVV, C_REG, C_NONE, C_REG, 1, 4, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_REG, 12, 8, 0, 0, NOTUSETMP}, -- {AMOVBU, C_REG, C_NONE, C_REG, 13, 4, 0, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_REG, 14, 8, 0, sys.Loong64, NOTUSETMP}, -- -- {ASUB, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, -- {ASUBV, C_REG, C_REG, C_REG, 2, 4, 0, sys.Loong64, 0}, -- {AADD, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, -- {AADDV, C_REG, C_REG, C_REG, 2, 4, 0, sys.Loong64, 0}, -- {AAND, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, -- {ASUB, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0}, -- {ASUBV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.Loong64, 0}, -- {AADD, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0}, -- {AADDV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.Loong64, 0}, -- {AAND, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0}, -- {ANEGW, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0}, -- {ANEGV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.Loong64, 0}, -- {AMASKEQZ, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, -- -- {ASLL, C_REG, C_NONE, C_REG, 9, 4, 0, 0, 0}, -- {ASLL, C_REG, C_REG, C_REG, 9, 4, 0, 0, 0}, -- {ASLLV, C_REG, C_NONE, C_REG, 9, 4, 0, sys.Loong64, 0}, -- {ASLLV, C_REG, C_REG, C_REG, 9, 4, 0, sys.Loong64, 0}, -- {ACLO, C_REG, C_NONE, C_REG, 9, 4, 0, 0, 0}, -- -- {AADDF, C_FREG, C_NONE, C_FREG, 32, 4, 0, 0, 0}, -- {AADDF, C_FREG, C_REG, C_FREG, 32, 4, 0, 0, 0}, -- {ACMPEQF, C_FREG, C_REG, C_NONE, 32, 4, 0, 0, 0}, -- {AABSF, C_FREG, C_NONE, C_FREG, 33, 4, 0, 0, 0}, -- {AMOVVF, C_FREG, C_NONE, C_FREG, 33, 4, 0, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_FREG, 33, 4, 0, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_FREG, 33, 4, 0, 0, 0}, -- -- {AMOVW, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVWL, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVVL, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0}, -- {AMOVWL, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0}, -- {AMOVVL, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0}, -- {AMOVWL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0}, -- {AMOVVL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.Loong64, 0}, -- {ASC, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0}, -- {ASCV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.Loong64, 0}, -- -- {AMOVW, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVWU, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVB, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVBU, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVWL, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVVL, C_SEXT, C_NONE, C_REG, 8, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0}, -- {AMOVWU, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, sys.Loong64, 0}, -- {AMOVV, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, sys.Loong64, 0}, -- {AMOVB, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0}, -- {AMOVBU, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0}, -- {AMOVWL, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0}, -- {AMOVVL, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, sys.Loong64, 0}, -- {AMOVW, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0}, -- {AMOVWU, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0}, -- {AMOVBU, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0}, -- {AMOVWL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0}, -- {AMOVVL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.Loong64, 0}, -- {ALL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0}, -- {ALLV, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.Loong64, 0}, -- -- {AMOVW, C_REG, C_NONE, C_LEXT, 35, 12, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_LEXT, 35, 12, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_LEXT, 35, 12, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_LEXT, 35, 12, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_LEXT, 35, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, 0, 0}, -- {AMOVW, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0}, -- {ASC, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0}, -- {AMOVW, C_REG, C_NONE, C_ADDR, 50, 8, 0, 0, 0}, -- {AMOVW, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_ADDR, 50, 8, 0, 0, 0}, -- {AMOVB, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_ADDR, 50, 8, 0, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_TLS, 53, 16, 0, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_TLS, 53, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_TLS, 53, 16, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_TLS, 53, 16, 0, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_TLS, 53, 16, 0, 0, 0}, -- -- {AMOVW, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, -- {AMOVWU, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, -- {AMOVV, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, -- {AMOVB, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, -- {AMOVBU, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, 0, 0}, -- {AMOVWU, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, sys.Loong64, 0}, -- {AMOVV, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, sys.Loong64, 0}, -- {AMOVB, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, 0, 0}, -- {AMOVBU, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, 0, 0}, -- {AMOVW, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, 0, 0}, -- {AMOVWU, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, 0, 0}, -- {AMOVBU, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, 0, 0}, -- {AMOVW, C_ADDR, C_NONE, C_REG, 51, 8, 0, 0, 0}, -- {AMOVW, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, -- {AMOVWU, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, -- {AMOVV, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, -- {AMOVB, C_ADDR, C_NONE, C_REG, 51, 8, 0, 0, 0}, -- {AMOVB, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, -- {AMOVBU, C_ADDR, C_NONE, C_REG, 51, 8, 0, 0, 0}, -- {AMOVBU, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_TLS, C_NONE, C_REG, 54, 16, 0, 0, 0}, -- {AMOVWU, C_TLS, C_NONE, C_REG, 54, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_TLS, C_NONE, C_REG, 54, 16, 0, sys.Loong64, 0}, -- {AMOVB, C_TLS, C_NONE, C_REG, 54, 16, 0, 0, 0}, -- {AMOVBU, C_TLS, C_NONE, C_REG, 54, 16, 0, 0, 0}, -- -- {AMOVW, C_SECON, C_NONE, C_REG, 3, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_SECON, C_NONE, C_REG, 3, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_SACON, C_NONE, C_REG, 3, 4, REGSP, 0, 0}, -- {AMOVV, C_SACON, C_NONE, C_REG, 3, 4, REGSP, sys.Loong64, 0}, -- {AMOVW, C_LECON, C_NONE, C_REG, 52, 8, 0, 0, NOTUSETMP}, -- {AMOVW, C_LECON, C_NONE, C_REG, 52, 8, 0, sys.Loong64, NOTUSETMP}, -- {AMOVV, C_LECON, C_NONE, C_REG, 52, 8, 0, sys.Loong64, NOTUSETMP}, -- -- {AMOVW, C_LACON, C_NONE, C_REG, 26, 12, REGSP, 0, 0}, -- {AMOVV, C_LACON, C_NONE, C_REG, 26, 12, REGSP, sys.Loong64, 0}, -- {AMOVW, C_ADDCON, C_NONE, C_REG, 3, 4, REGZERO, 0, 0}, -- {AMOVV, C_ADDCON, C_NONE, C_REG, 3, 4, REGZERO, sys.Loong64, 0}, -- {AMOVW, C_ANDCON, C_NONE, C_REG, 3, 4, REGZERO, 0, 0}, -- {AMOVV, C_ANDCON, C_NONE, C_REG, 3, 4, REGZERO, sys.Loong64, 0}, -- {AMOVW, C_STCON, C_NONE, C_REG, 55, 12, 0, 0, 0}, -- {AMOVV, C_STCON, C_NONE, C_REG, 55, 12, 0, sys.Loong64, 0}, -- -- {AMOVW, C_UCON, C_NONE, C_REG, 24, 4, 0, 0, 0}, -- {AMOVV, C_UCON, C_NONE, C_REG, 24, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_LCON, C_NONE, C_REG, 19, 8, 0, 0, NOTUSETMP}, -- {AMOVV, C_LCON, C_NONE, C_REG, 19, 8, 0, sys.Loong64, NOTUSETMP}, -- {AMOVV, C_DCON, C_NONE, C_REG, 59, 16, 0, sys.Loong64, NOTUSETMP}, -- -- {AMUL, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0}, -- {AMUL, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0}, -- {AMULV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.Loong64, 0}, -- {AMULV, C_REG, C_REG, C_REG, 2, 4, 0, sys.Loong64, 0}, -- -- {AADD, C_ADD0CON, C_REG, C_REG, 4, 4, 0, 0, 0}, -- {AADD, C_ADD0CON, C_NONE, C_REG, 4, 4, 0, 0, 0}, -- {AADD, C_ANDCON, C_REG, C_REG, 10, 8, 0, 0, 0}, -- {AADD, C_ANDCON, C_NONE, C_REG, 10, 8, 0, 0, 0}, -- -- {AADDV, C_ADD0CON, C_REG, C_REG, 4, 4, 0, sys.Loong64, 0}, -- {AADDV, C_ADD0CON, C_NONE, C_REG, 4, 4, 0, sys.Loong64, 0}, -- {AADDV, C_ANDCON, C_REG, C_REG, 10, 8, 0, sys.Loong64, 0}, -- {AADDV, C_ANDCON, C_NONE, C_REG, 10, 8, 0, sys.Loong64, 0}, -- -- {AAND, C_AND0CON, C_REG, C_REG, 4, 4, 0, 0, 0}, -- {AAND, C_AND0CON, C_NONE, C_REG, 4, 4, 0, 0, 0}, -- {AAND, C_ADDCON, C_REG, C_REG, 10, 8, 0, 0, 0}, -- {AAND, C_ADDCON, C_NONE, C_REG, 10, 8, 0, 0, 0}, -- -- {AADD, C_UCON, C_REG, C_REG, 25, 8, 0, 0, 0}, -- {AADD, C_UCON, C_NONE, C_REG, 25, 8, 0, 0, 0}, -- {AADDV, C_UCON, C_REG, C_REG, 25, 8, 0, sys.Loong64, 0}, -- {AADDV, C_UCON, C_NONE, C_REG, 25, 8, 0, sys.Loong64, 0}, -- {AAND, C_UCON, C_REG, C_REG, 25, 8, 0, 0, 0}, -- {AAND, C_UCON, C_NONE, C_REG, 25, 8, 0, 0, 0}, -- -- {AADD, C_LCON, C_NONE, C_REG, 23, 12, 0, 0, 0}, -- {AADDV, C_LCON, C_NONE, C_REG, 23, 12, 0, sys.Loong64, 0}, -- {AAND, C_LCON, C_NONE, C_REG, 23, 12, 0, 0, 0}, -- {AADD, C_LCON, C_REG, C_REG, 23, 12, 0, 0, 0}, -- {AADDV, C_LCON, C_REG, C_REG, 23, 12, 0, sys.Loong64, 0}, -- {AAND, C_LCON, C_REG, C_REG, 23, 12, 0, 0, 0}, -- -- {AADDV, C_DCON, C_NONE, C_REG, 60, 20, 0, sys.Loong64, 0}, -- {AADDV, C_DCON, C_REG, C_REG, 60, 20, 0, sys.Loong64, 0}, -- -- {ASLL, C_SCON, C_REG, C_REG, 16, 4, 0, 0, 0}, -- {ASLL, C_SCON, C_NONE, C_REG, 16, 4, 0, 0, 0}, -- -- {ASLLV, C_SCON, C_REG, C_REG, 16, 4, 0, sys.Loong64, 0}, -- {ASLLV, C_SCON, C_NONE, C_REG, 16, 4, 0, sys.Loong64, 0}, -- -- {ASYSCALL, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, -- -- {ABEQ, C_REG, C_REG, C_SBRA, 6, 4, 0, 0, 0}, -- {ABEQ, C_REG, C_NONE, C_SBRA, 6, 4, 0, 0, 0}, -- {ABLEZ, C_REG, C_NONE, C_SBRA, 6, 4, 0, 0, 0}, -- {ABFPT, C_NONE, C_NONE, C_SBRA, 6, 4, 0, 0, NOTUSETMP}, -- -- {AJMP, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0}, // b -- {AJAL, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0}, // bl -- -- {AJMP, C_NONE, C_NONE, C_ZOREG, 18, 4, REGZERO, 0, 0}, // jirl r0, rj, 0 -- {AJAL, C_NONE, C_NONE, C_ZOREG, 18, 4, REGLINK, 0, 0}, // jirl r1, rj, 0 -- -- {AMOVW, C_SEXT, C_NONE, C_FREG, 27, 4, 0, sys.Loong64, 0}, -- {AMOVF, C_SEXT, C_NONE, C_FREG, 27, 4, 0, sys.Loong64, 0}, -- {AMOVD, C_SEXT, C_NONE, C_FREG, 27, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_SAUTO, C_NONE, C_FREG, 27, 4, REGSP, sys.Loong64, 0}, -- {AMOVF, C_SAUTO, C_NONE, C_FREG, 27, 4, REGSP, 0, 0}, -- {AMOVD, C_SAUTO, C_NONE, C_FREG, 27, 4, REGSP, 0, 0}, -- {AMOVW, C_SOREG, C_NONE, C_FREG, 27, 4, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_SOREG, C_NONE, C_FREG, 27, 4, REGZERO, 0, 0}, -- {AMOVD, C_SOREG, C_NONE, C_FREG, 27, 4, REGZERO, 0, 0}, -- -- {AMOVW, C_LEXT, C_NONE, C_FREG, 27, 12, 0, sys.Loong64, 0}, -- {AMOVF, C_LEXT, C_NONE, C_FREG, 27, 12, 0, sys.Loong64, 0}, -- {AMOVD, C_LEXT, C_NONE, C_FREG, 27, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_LAUTO, C_NONE, C_FREG, 27, 12, REGSP, sys.Loong64, 0}, -- {AMOVF, C_LAUTO, C_NONE, C_FREG, 27, 12, REGSP, 0, 0}, -- {AMOVD, C_LAUTO, C_NONE, C_FREG, 27, 12, REGSP, 0, 0}, -- {AMOVW, C_LOREG, C_NONE, C_FREG, 27, 12, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_LOREG, C_NONE, C_FREG, 27, 12, REGZERO, 0, 0}, -- {AMOVD, C_LOREG, C_NONE, C_FREG, 27, 12, REGZERO, 0, 0}, -- {AMOVF, C_ADDR, C_NONE, C_FREG, 51, 8, 0, 0, 0}, -- {AMOVF, C_ADDR, C_NONE, C_FREG, 51, 8, 0, sys.Loong64, 0}, -- {AMOVD, C_ADDR, C_NONE, C_FREG, 51, 8, 0, 0, 0}, -- {AMOVD, C_ADDR, C_NONE, C_FREG, 51, 8, 0, sys.Loong64, 0}, -- -- {AMOVW, C_FREG, C_NONE, C_SEXT, 28, 4, 0, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_SEXT, 28, 4, 0, sys.Loong64, 0}, -- {AMOVD, C_FREG, C_NONE, C_SEXT, 28, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP, 0, 0}, -- {AMOVW, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO, 0, 0}, -- -- {AMOVW, C_FREG, C_NONE, C_LEXT, 28, 12, 0, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_LEXT, 28, 12, 0, sys.Loong64, 0}, -- {AMOVD, C_FREG, C_NONE, C_LEXT, 28, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_FREG, C_NONE, C_LAUTO, 28, 12, REGSP, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_LAUTO, 28, 12, REGSP, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_LAUTO, 28, 12, REGSP, 0, 0}, -- {AMOVW, C_FREG, C_NONE, C_LOREG, 28, 12, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_LOREG, 28, 12, REGZERO, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_LOREG, 28, 12, REGZERO, 0, 0}, -- {AMOVF, C_FREG, C_NONE, C_ADDR, 50, 8, 0, 0, 0}, -- {AMOVF, C_FREG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- {AMOVD, C_FREG, C_NONE, C_ADDR, 50, 8, 0, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, -- -- {AMOVW, C_REG, C_NONE, C_FREG, 30, 4, 0, 0, 0}, -- {AMOVW, C_FREG, C_NONE, C_REG, 31, 4, 0, 0, 0}, -- {AMOVV, C_REG, C_NONE, C_FREG, 47, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_FREG, C_NONE, C_REG, 48, 4, 0, sys.Loong64, 0}, -- -- {AMOVW, C_ADDCON, C_NONE, C_FREG, 34, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_ANDCON, C_NONE, C_FREG, 34, 8, 0, sys.Loong64, 0}, -- -- {AWORD, C_LCON, C_NONE, C_NONE, 40, 4, 0, 0, 0}, -- {AWORD, C_DCON, C_NONE, C_NONE, 61, 4, 0, 0, 0}, -- -- {ATEQ, C_SCON, C_REG, C_REG, 15, 8, 0, 0, 0}, -- {ATEQ, C_SCON, C_NONE, C_REG, 15, 8, 0, 0, 0}, -- -- {ABREAK, C_REG, C_NONE, C_SEXT, 7, 4, 0, sys.Loong64, 0}, // really CACHE instruction -- {ABREAK, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.Loong64, 0}, -- {ABREAK, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.Loong64, 0}, -- {ABREAK, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, -- -- {obj.AUNDEF, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0}, -- {obj.APCDATA, C_LCON, C_NONE, C_LCON, 0, 0, 0, 0, 0}, -- {obj.APCDATA, C_DCON, C_NONE, C_DCON, 0, 0, 0, 0, 0}, -- {obj.AFUNCDATA, C_SCON, C_NONE, C_ADDR, 0, 0, 0, 0, 0}, -- {obj.ANOP, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ANOP, C_LCON, C_NONE, C_NONE, 0, 0, 0, 0, 0}, // nop variants, see #40689 -- {obj.ANOP, C_DCON, C_NONE, C_NONE, 0, 0, 0, 0, 0}, // nop variants, see #40689 -- {obj.ANOP, C_REG, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ANOP, C_FREG, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ADUFFZERO, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0}, // same as AJMP -- {obj.ADUFFCOPY, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0}, // same as AJMP -- -- {obj.AXXX, C_NONE, C_NONE, C_NONE, 0, 4, 0, 0, 0}, -+ {obj.ATEXT, C_ADDR, C_NONE, C_TEXTSIZE, C_NONE, 0, 0, 0, 0, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_REG, C_NONE, 1, 4, 0, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_REG, C_NONE, 1, 4, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_REG, C_NONE, 12, 8, 0, 0, NOTUSETMP}, -+ {AMOVBU, C_REG, C_NONE, C_REG, C_NONE, 13, 4, 0, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_REG, C_NONE, 14, 8, 0, sys.Loong64, NOTUSETMP}, -+ -+ {ASUB, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {ASUBV, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ {AADD, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {AADDV, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ {AAND, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {ASUB, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {ASUBV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ {AADD, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {AADDV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ {AAND, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {ANEGW, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {ANEGV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ {AMASKEQZ, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ -+ {ASLL, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, 0, 0}, -+ {ASLL, C_REG, C_REG, C_REG, C_NONE, 9, 4, 0, 0, 0}, -+ {ASLLV, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, sys.Loong64, 0}, -+ {ASLLV, C_REG, C_REG, C_REG, C_NONE, 9, 4, 0, sys.Loong64, 0}, -+ {ACLO, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, 0, 0}, -+ -+ {AADDF, C_FREG, C_NONE, C_FREG, C_NONE, 32, 4, 0, 0, 0}, -+ {AADDF, C_FREG, C_REG, C_FREG, C_NONE, 32, 4, 0, 0, 0}, -+ {ACMPEQF, C_FREG, C_REG, C_NONE, C_NONE, 32, 4, 0, 0, 0}, -+ {AABSF, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0, 0}, -+ {AMOVVF, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVWU, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVBU, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVWL, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVVL, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -+ {AMOVW, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -+ {AMOVWL, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -+ {AMOVVL, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -+ {AMOVW, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -+ {AMOVWL, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -+ {AMOVVL, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -+ {ASC, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -+ {ASCV, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -+ -+ {AMOVW, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVWU, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVV, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVB, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVBU, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVWL, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVVL, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -+ {AMOVW, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -+ {AMOVWU, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, sys.Loong64, 0}, -+ {AMOVV, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, sys.Loong64, 0}, -+ {AMOVB, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -+ {AMOVBU, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -+ {AMOVWL, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -+ {AMOVVL, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, sys.Loong64, 0}, -+ {AMOVW, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -+ {AMOVWU, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVV, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVB, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -+ {AMOVBU, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -+ {AMOVWL, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -+ {AMOVVL, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -+ {ALL, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -+ {ALLV, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -+ {AMOVWU, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -+ {AMOVBU, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -+ {AMOVW, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -+ {ASC, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ {AMOVWU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ {AMOVBU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ {AMOVW, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, 0, 0}, -+ -+ {AMOVW, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -+ {AMOVWU, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -+ {AMOVV, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -+ {AMOVB, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -+ {AMOVBU, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -+ {AMOVW, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0, 0}, -+ {AMOVWU, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, sys.Loong64, 0}, -+ {AMOVV, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, sys.Loong64, 0}, -+ {AMOVB, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0, 0}, -+ {AMOVBU, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0, 0}, -+ {AMOVW, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0, 0}, -+ {AMOVWU, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, sys.Loong64, 0}, -+ {AMOVV, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, sys.Loong64, 0}, -+ {AMOVB, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0, 0}, -+ {AMOVBU, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0, 0}, -+ {AMOVW, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, -+ {AMOVW, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ {AMOVWU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ {AMOVV, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ {AMOVB, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, -+ {AMOVB, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ {AMOVBU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, -+ {AMOVBU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ {AMOVW, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -+ {AMOVWU, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -+ {AMOVV, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -+ {AMOVB, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -+ {AMOVBU, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -+ -+ {AMOVW, C_SECON, C_NONE, C_REG, C_NONE, 3, 4, 0, sys.Loong64, 0}, -+ {AMOVV, C_SECON, C_NONE, C_REG, C_NONE, 3, 4, 0, sys.Loong64, 0}, -+ {AMOVW, C_SACON, C_NONE, C_REG, C_NONE, 3, 4, REGSP, 0, 0}, -+ {AMOVV, C_SACON, C_NONE, C_REG, C_NONE, 3, 4, REGSP, sys.Loong64, 0}, -+ {AMOVW, C_LECON, C_NONE, C_REG, C_NONE, 52, 8, 0, 0, NOTUSETMP}, -+ {AMOVW, C_LECON, C_NONE, C_REG, C_NONE, 52, 8, 0, sys.Loong64, NOTUSETMP}, -+ {AMOVV, C_LECON, C_NONE, C_REG, C_NONE, 52, 8, 0, sys.Loong64, NOTUSETMP}, -+ -+ {AMOVW, C_LACON, C_NONE, C_REG, C_NONE, 26, 12, REGSP, 0, 0}, -+ {AMOVV, C_LACON, C_NONE, C_REG, C_NONE, 26, 12, REGSP, sys.Loong64, 0}, -+ {AMOVW, C_ADDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0, 0}, -+ {AMOVV, C_ADDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVW, C_ANDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0, 0}, -+ {AMOVV, C_ANDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVW, C_STCON, C_NONE, C_REG, C_NONE, 55, 12, 0, 0, 0}, -+ {AMOVV, C_STCON, C_NONE, C_REG, C_NONE, 55, 12, 0, sys.Loong64, 0}, -+ -+ {AMOVW, C_UCON, C_NONE, C_REG, C_NONE, 24, 4, 0, 0, 0}, -+ {AMOVV, C_UCON, C_NONE, C_REG, C_NONE, 24, 4, 0, sys.Loong64, 0}, -+ {AMOVW, C_LCON, C_NONE, C_REG, C_NONE, 19, 8, 0, 0, NOTUSETMP}, -+ {AMOVV, C_LCON, C_NONE, C_REG, C_NONE, 19, 8, 0, sys.Loong64, NOTUSETMP}, -+ {AMOVV, C_DCON, C_NONE, C_REG, C_NONE, 59, 16, 0, sys.Loong64, NOTUSETMP}, -+ -+ {AMUL, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {AMUL, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -+ {AMULV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ {AMULV, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -+ -+ {AADD, C_ADD0CON, C_REG, C_REG, C_NONE, 4, 4, 0, 0, 0}, -+ {AADD, C_ADD0CON, C_NONE, C_REG, C_NONE, 4, 4, 0, 0, 0}, -+ {AADD, C_ANDCON, C_REG, C_REG, C_NONE, 10, 8, 0, 0, 0}, -+ {AADD, C_ANDCON, C_NONE, C_REG, C_NONE, 10, 8, 0, 0, 0}, -+ -+ {AADDV, C_ADD0CON, C_REG, C_REG, C_NONE, 4, 4, 0, sys.Loong64, 0}, -+ {AADDV, C_ADD0CON, C_NONE, C_REG, C_NONE, 4, 4, 0, sys.Loong64, 0}, -+ {AADDV, C_ANDCON, C_REG, C_REG, C_NONE, 10, 8, 0, sys.Loong64, 0}, -+ {AADDV, C_ANDCON, C_NONE, C_REG, C_NONE, 10, 8, 0, sys.Loong64, 0}, -+ -+ {AAND, C_AND0CON, C_REG, C_REG, C_NONE, 4, 4, 0, 0, 0}, -+ {AAND, C_AND0CON, C_NONE, C_REG, C_NONE, 4, 4, 0, 0, 0}, -+ {AAND, C_ADDCON, C_REG, C_REG, C_NONE, 10, 8, 0, 0, 0}, -+ {AAND, C_ADDCON, C_NONE, C_REG, C_NONE, 10, 8, 0, 0, 0}, -+ -+ {AADD, C_UCON, C_REG, C_REG, C_NONE, 25, 8, 0, 0, 0}, -+ {AADD, C_UCON, C_NONE, C_REG, C_NONE, 25, 8, 0, 0, 0}, -+ {AADDV, C_UCON, C_REG, C_REG, C_NONE, 25, 8, 0, sys.Loong64, 0}, -+ {AADDV, C_UCON, C_NONE, C_REG, C_NONE, 25, 8, 0, sys.Loong64, 0}, -+ {AAND, C_UCON, C_REG, C_REG, C_NONE, 25, 8, 0, 0, 0}, -+ {AAND, C_UCON, C_NONE, C_REG, C_NONE, 25, 8, 0, 0, 0}, -+ -+ {AADD, C_LCON, C_NONE, C_REG, C_NONE, 23, 12, 0, 0, 0}, -+ {AADDV, C_LCON, C_NONE, C_REG, C_NONE, 23, 12, 0, sys.Loong64, 0}, -+ {AAND, C_LCON, C_NONE, C_REG, C_NONE, 23, 12, 0, 0, 0}, -+ {AADD, C_LCON, C_REG, C_REG, C_NONE, 23, 12, 0, 0, 0}, -+ {AADDV, C_LCON, C_REG, C_REG, C_NONE, 23, 12, 0, sys.Loong64, 0}, -+ {AAND, C_LCON, C_REG, C_REG, C_NONE, 23, 12, 0, 0, 0}, -+ -+ {AADDV, C_DCON, C_NONE, C_REG, C_NONE, 60, 20, 0, sys.Loong64, 0}, -+ {AADDV, C_DCON, C_REG, C_REG, C_NONE, 60, 20, 0, sys.Loong64, 0}, -+ -+ {ASLL, C_SCON, C_REG, C_REG, C_NONE, 16, 4, 0, 0, 0}, -+ {ASLL, C_SCON, C_NONE, C_REG, C_NONE, 16, 4, 0, 0, 0}, -+ -+ {ASLLV, C_SCON, C_REG, C_REG, C_NONE, 16, 4, 0, sys.Loong64, 0}, -+ {ASLLV, C_SCON, C_NONE, C_REG, C_NONE, 16, 4, 0, sys.Loong64, 0}, -+ -+ {ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, -+ -+ {ABEQ, C_REG, C_REG, C_SBRA, C_NONE, 6, 4, 0, 0, 0}, -+ {ABEQ, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0, 0}, -+ {ABLEZ, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0, 0}, -+ {ABFPT, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0, NOTUSETMP}, -+ -+ {AJMP, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // b -+ {AJAL, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // bl -+ -+ {AJMP, C_NONE, C_NONE, C_ZOREG, C_NONE, 18, 4, REGZERO, 0, 0}, // jirl r0, rj, 0 -+ {AJAL, C_NONE, C_NONE, C_ZOREG, C_NONE, 18, 4, REGLINK, 0, 0}, // jirl r1, rj, 0 -+ -+ {AMOVW, C_SEXT, C_NONE, C_FREG, C_NONE, 27, 4, 0, sys.Loong64, 0}, -+ {AMOVF, C_SEXT, C_NONE, C_FREG, C_NONE, 27, 4, 0, sys.Loong64, 0}, -+ {AMOVD, C_SEXT, C_NONE, C_FREG, C_NONE, 27, 4, 0, sys.Loong64, 0}, -+ {AMOVW, C_SAUTO, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, sys.Loong64, 0}, -+ {AMOVF, C_SAUTO, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0, 0}, -+ {AMOVD, C_SAUTO, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0, 0}, -+ {AMOVW, C_SOREG, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVF, C_SOREG, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0, 0}, -+ {AMOVD, C_SOREG, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0, 0}, -+ -+ {AMOVW, C_LEXT, C_NONE, C_FREG, C_NONE, 27, 12, 0, sys.Loong64, 0}, -+ {AMOVF, C_LEXT, C_NONE, C_FREG, C_NONE, 27, 12, 0, sys.Loong64, 0}, -+ {AMOVD, C_LEXT, C_NONE, C_FREG, C_NONE, 27, 12, 0, sys.Loong64, 0}, -+ {AMOVW, C_LAUTO, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, sys.Loong64, 0}, -+ {AMOVF, C_LAUTO, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0, 0}, -+ {AMOVD, C_LAUTO, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0, 0}, -+ {AMOVW, C_LOREG, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, sys.Loong64, 0}, -+ {AMOVF, C_LOREG, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0, 0}, -+ {AMOVD, C_LOREG, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0, 0}, -+ {AMOVF, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0, 0}, -+ {AMOVF, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ {AMOVD, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0, 0}, -+ {AMOVD, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -+ -+ {AMOVW, C_FREG, C_NONE, C_SEXT, C_NONE, 28, 4, 0, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_SEXT, C_NONE, 28, 4, 0, sys.Loong64, 0}, -+ {AMOVD, C_FREG, C_NONE, C_SEXT, C_NONE, 28, 4, 0, sys.Loong64, 0}, -+ {AMOVW, C_FREG, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0, 0}, -+ {AMOVW, C_FREG, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0, 0}, -+ -+ {AMOVW, C_FREG, C_NONE, C_LEXT, C_NONE, 28, 12, 0, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_LEXT, C_NONE, 28, 12, 0, sys.Loong64, 0}, -+ {AMOVD, C_FREG, C_NONE, C_LEXT, C_NONE, 28, 12, 0, sys.Loong64, 0}, -+ {AMOVW, C_FREG, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0, 0}, -+ {AMOVW, C_FREG, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, sys.Loong64, 0}, -+ {AMOVF, C_FREG, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0, 0}, -+ {AMOVF, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -+ {AMOVF, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ {AMOVD, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_FREG, C_NONE, 30, 4, 0, 0, 0}, -+ {AMOVW, C_FREG, C_NONE, C_REG, C_NONE, 31, 4, 0, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_FREG, C_NONE, 47, 4, 0, sys.Loong64, 0}, -+ {AMOVV, C_FREG, C_NONE, C_REG, C_NONE, 48, 4, 0, sys.Loong64, 0}, -+ -+ {AMOVW, C_ADDCON, C_NONE, C_FREG, C_NONE, 34, 8, 0, sys.Loong64, 0}, -+ {AMOVW, C_ANDCON, C_NONE, C_FREG, C_NONE, 34, 8, 0, sys.Loong64, 0}, -+ -+ {AWORD, C_LCON, C_NONE, C_NONE, C_NONE, 40, 4, 0, 0, 0}, -+ {AWORD, C_DCON, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0, 0}, -+ -+ {ATEQ, C_SCON, C_REG, C_REG, C_NONE, 15, 8, 0, 0, 0}, -+ {ATEQ, C_SCON, C_NONE, C_REG, C_NONE, 15, 8, 0, 0, 0}, -+ -+ {ABREAK, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, // really CACHE instruction -+ {ABREAK, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -+ {ABREAK, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -+ {ABREAK, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, -+ -+ {ARDTIMELW, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0, 0}, -+ {ARDTIMEHW, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0, 0}, -+ {ARDTIMED, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0, 0}, -+ -+ {obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0}, -+ {obj.APCDATA, C_LCON, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0, 0}, -+ {obj.APCDATA, C_DCON, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0, 0}, -+ {obj.AFUNCDATA, C_SCON, C_NONE, C_ADDR, C_NONE, 0, 0, 0, 0, 0}, -+ {obj.ANOP, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -+ {obj.ANOP, C_LCON, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, // nop variants, see #40689 -+ {obj.ANOP, C_DCON, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, // nop variants, see #40689 -+ {obj.ANOP, C_REG, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -+ {obj.ANOP, C_FREG, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -+ {obj.ADUFFZERO, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // same as AJMP -+ {obj.ADUFFCOPY, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // same as AJMP -+ -+ {obj.AXXX, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0, 0, 0}, - } - - var oprange [ALAST & obj.AMask][]Optab -@@ -698,40 +703,50 @@ func (c *ctxt0) oplook(p *obj.Prog) *Optab { - if a1 != 0 { - return &optab[a1-1] - } -+ -+ // first source operand - a1 = int(p.From.Class) - if a1 == 0 { - a1 = c.aclass(&p.From) + 1 - p.From.Class = int8(a1) - } -- - a1-- -+ -+ // first destination operand - a3 := int(p.To.Class) - if a3 == 0 { - a3 = c.aclass(&p.To) + 1 - p.To.Class = int8(a3) - } -- - a3-- -+ -+ // 2nd source operand - a2 := C_NONE - if p.Reg != 0 { - a2 = C_REG - } - -+ // 2nd destination operand -+ a4 := C_NONE -+ if p.RegTo2 != 0 { -+ a4 = C_REG -+ } -+ - ops := oprange[p.As&obj.AMask] - c1 := &xcmp[a1] - c3 := &xcmp[a3] - for i := range ops { - op := &ops[i] -- if int(op.a2) == a2 && c1[op.a1] && c3[op.a3] && (op.family == 0 || c.ctxt.Arch.Family == op.family) { -+ if (int(op.a2) == a2) && c1[op.a1] && c3[op.a3] && (int(op.a4) == a4) { - p.Optab = uint16(cap(optab) - cap(ops) + i + 1) - return op - } - } - -- c.ctxt.Diag("illegal combination %v %v %v %v", p.As, DRconv(a1), DRconv(a2), DRconv(a3)) -+ c.ctxt.Diag("illegal combination %v %v %v %v %v", p.As, DRconv(a1), DRconv(a2), DRconv(a3), DRconv(a4)) - prasm(p) - // Turn illegal instruction into an UNDEF, avoid crashing in asmout. -- return &Optab{obj.AUNDEF, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0} -+ return &Optab{obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0} - } - - func cmp(a int, b int) bool { -@@ -1030,6 +1045,9 @@ func buildop(ctxt *obj.Link) { - ANEGW, - ANEGV, - AWORD, -+ ARDTIMELW, -+ ARDTIMEHW, -+ ARDTIMED, - obj.ANOP, - obj.ATEXT, - obj.AUNDEF, -@@ -1604,6 +1622,9 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - case 61: // word C_DCON - o1 = uint32(c.vregoff(&p.From)) - o2 = uint32(c.vregoff(&p.From) >> 32) -+ -+ case 62: // rdtimex rd, rj -+ o1 = OP_RR(c.oprr(p.As), uint32(p.To.Reg), uint32(p.RegTo2)) - } - - out[0] = o1 -@@ -1811,6 +1832,12 @@ func (c *ctxt0) oprr(a obj.As) uint32 { - return 0x4 << 10 - case ACLZ: - return 0x5 << 10 -+ case ARDTIMELW: -+ return 0x18 << 10 -+ case ARDTIMEHW: -+ return 0x19 << 10 -+ case ARDTIMED: -+ return 0x1a << 10 - } - - c.ctxt.Diag("bad rr opcode %v", a) -diff --git a/src/cmd/internal/obj/util.go b/src/cmd/internal/obj/util.go -index b219a07063..f0955039c0 100644 ---- a/src/cmd/internal/obj/util.go -+++ b/src/cmd/internal/obj/util.go -@@ -202,6 +202,7 @@ func (p *Prog) WriteInstructionString(w io.Writer) { - if p.To.Type != TYPE_NONE { - io.WriteString(w, sep) - WriteDconv(w, p, &p.To) -+ sep = ", " - } - if p.RegTo2 != REG_NONE { - fmt.Fprintf(w, "%s%v", sep, Rconv(int(p.RegTo2))) --- -2.38.1 - diff --git a/0033-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch b/0005-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch similarity index 99% rename from 0033-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch rename to 0005-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch index f952c3ea6f57d8ba53f5ba43ca8fa7b6171b73e5..5870609b2a7ed6678c489cec39b72d622b5fe2c7 100644 --- a/0033-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch +++ b/0005-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch @@ -1,7 +1,7 @@ -From 4643f2407c658b965d3b0350f0de66b9fd4b05f6 Mon Sep 17 00:00:00 2001 -From: Xiaodong Liu +From fe1fa12ff48cf3abd0fe78812b8df4bb86860a41 Mon Sep 17 00:00:00 2001 +From: chenguoqi Date: Fri, 10 Feb 2023 15:00:12 +0800 -Subject: [PATCH 33/62] cmd,cmd/vendor: pick up updates for +Subject: [PATCH 05/51] cmd,cmd/vendor: pick up updates for golang.org/x/arch/loong64 Bring in updates to golang.org/x/arch/ to support loong64 disassembler @@ -14,7 +14,7 @@ from CL 358854. go mod tidy go mod vendor -Change-Id: I448f653ca8d530303d0cd05fba1c380b3e0cd6f2 +Change-Id: Ida0721ebd11caf4f116bb54a277606eaa38dc8ba --- .../x/arch/loong64/loong64asm/arg.go | 93 + .../x/arch/loong64/loong64asm/decode.go | 269 +++ diff --git a/0034-cmd-internal-objfile-add-loong64-disassembler-suppor.patch b/0006-cmd-internal-objfile-add-loong64-disassembler-suppor.patch similarity index 89% rename from 0034-cmd-internal-objfile-add-loong64-disassembler-suppor.patch rename to 0006-cmd-internal-objfile-add-loong64-disassembler-suppor.patch index 42573eebafc216156901bd2a709452731f3573ae..d62d49627f55ceb471c8a4db4d134cbc3dcd3a77 100644 --- a/0034-cmd-internal-objfile-add-loong64-disassembler-suppor.patch +++ b/0006-cmd-internal-objfile-add-loong64-disassembler-suppor.patch @@ -1,9 +1,9 @@ -From 96e128b3aa87a849210e7eb5212e3607abf2254b Mon Sep 17 00:00:00 2001 -From: Xiaodong Liu +From 7941fee1ffb6c3560ec3507514c254bd98eeda28 Mon Sep 17 00:00:00 2001 +From: chenguoqi Date: Fri, 10 Feb 2023 15:10:48 +0800 -Subject: [PATCH 34/62] cmd/internal/objfile: add loong64 disassembler support +Subject: [PATCH 06/51] cmd/internal/objfile: add loong64 disassembler support -Change-Id: I5628436209aa58f1ba781db15ca6e78b62123065 +Change-Id: Id29c2de9e592a07a9f932a4aa3718c6b25788082 --- src/cmd/internal/objfile/disasm.go | 14 ++++++++++++++ src/cmd/internal/objfile/elf.go | 2 ++ @@ -56,7 +56,7 @@ index c298d7e1a9..129741fe01 100644 "ppc64le": binary.LittleEndian, "s390x": binary.BigEndian, diff --git a/src/cmd/internal/objfile/elf.go b/src/cmd/internal/objfile/elf.go -index c64c2540f4..2ad0465170 100644 +index f25e4a65d6..9048be7d73 100644 --- a/src/cmd/internal/objfile/elf.go +++ b/src/cmd/internal/objfile/elf.go @@ -120,6 +120,8 @@ func (f *elfFile) goarch() string { diff --git a/0006-runtime-implement-cputicks-with-the-stable-counter-o.patch b/0006-runtime-implement-cputicks-with-the-stable-counter-o.patch deleted file mode 100644 index 4ff9d2dd65fa8fe5ec4899c69c9920efcba66c1d..0000000000000000000000000000000000000000 --- a/0006-runtime-implement-cputicks-with-the-stable-counter-o.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 8e84405201ae877dd2eb1d5ceddb90b076e50b8f Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Fri, 5 Aug 2022 13:32:08 +0800 -Subject: [PATCH 06/62] runtime: implement cputicks with the stable counter on - loong64 - -The stable counter is described in Section 2.2.10.4, LoongArch Reference Manual Volume 1. - -Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html - -Change-Id: I160b695a8c0e38ef49b21fb8b41460fd23d9538c ---- - src/runtime/asm_loong64.s | 6 ++++++ - src/runtime/cputicks.go | 2 +- - src/runtime/os_linux_loong64.go | 7 ------- - 3 files changed, 7 insertions(+), 8 deletions(-) - -diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index a6ccd196c9..c97371fefd 100644 ---- a/src/runtime/asm_loong64.s -+++ b/src/runtime/asm_loong64.s -@@ -86,6 +86,12 @@ TEXT runtime·mstart(SB),NOSPLIT|TOPFRAME,$0 - JAL runtime·mstart0(SB) - RET // not reached - -+// func cputicks() int64 -+TEXT runtime·cputicks(SB),NOSPLIT,$0-8 -+ RDTIMED R0, R4 -+ MOVV R4, ret+0(FP) -+ RET -+ - /* - * go-routine - */ -diff --git a/src/runtime/cputicks.go b/src/runtime/cputicks.go -index 91270617fc..2cf3240333 100644 ---- a/src/runtime/cputicks.go -+++ b/src/runtime/cputicks.go -@@ -2,7 +2,7 @@ - // Use of this source code is governed by a BSD-style - // license that can be found in the LICENSE file. - --//go:build !arm && !arm64 && !loong64 && !mips64 && !mips64le && !mips && !mipsle && !wasm -+//go:build !arm && !arm64 && !mips64 && !mips64le && !mips && !mipsle && !wasm - - package runtime - -diff --git a/src/runtime/os_linux_loong64.go b/src/runtime/os_linux_loong64.go -index 3d84e9accb..61213dadf8 100644 ---- a/src/runtime/os_linux_loong64.go -+++ b/src/runtime/os_linux_loong64.go -@@ -9,10 +9,3 @@ package runtime - func archauxv(tag, val uintptr) {} - - func osArchInit() {} -- --//go:nosplit --func cputicks() int64 { -- // Currently cputicks() is used in blocking profiler and to seed fastrand(). -- // nanotime() is a poor approximation of CPU ticks that is enough for the profiler. -- return nanotime() --} --- -2.38.1 - diff --git a/0007-runtime-remove-the-fake-mstart-caller-in-systemstack.patch b/0007-runtime-remove-the-fake-mstart-caller-in-systemstack.patch deleted file mode 100644 index 6b83336ab0e3c544c2d555586fefbac47754f9bc..0000000000000000000000000000000000000000 --- a/0007-runtime-remove-the-fake-mstart-caller-in-systemstack.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 72ff0fd9e69a0f9a9c17fd5b9320c660e1d59a64 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Mon, 4 Jul 2022 14:29:52 +0800 -Subject: [PATCH 07/62] runtime: remove the fake mstart caller in systemstack - on linux/loong64 - -The backtrace knows to stop in the system stack due to writing to the SP, -so here the fake mstart caller in the system stack is no longer needed and -can be removed - -ref. CL 288799 - -Change-Id: I0841e75fd515cf6a0d98abe4cffc3f63fc275e0e ---- - src/runtime/asm_loong64.s | 5 ----- - 1 file changed, 5 deletions(-) - -diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index c97371fefd..b934fab1ca 100644 ---- a/src/runtime/asm_loong64.s -+++ b/src/runtime/asm_loong64.s -@@ -128,7 +128,6 @@ TEXT runtime·mcall(SB), NOSPLIT|NOFRAME, $0-8 - MOVV R3, (g_sched+gobuf_sp)(g) - MOVV R1, (g_sched+gobuf_pc)(g) - MOVV R0, (g_sched+gobuf_lr)(g) -- MOVV g, (g_sched+gobuf_g)(g) - - // Switch to m->g0 & its stack, call fn. - MOVV g, R19 -@@ -186,10 +185,6 @@ switch: - MOVV R5, g - JAL runtime·save_g(SB) - MOVV (g_sched+gobuf_sp)(g), R19 -- // make it look like mstart called systemstack on g0, to stop traceback -- ADDV $-8, R19 -- MOVV $runtime·mstart(SB), R6 -- MOVV R6, 0(R19) - MOVV R19, R3 - - // call target function --- -2.38.1 - diff --git a/0041-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch b/0007-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch similarity index 95% rename from 0041-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch rename to 0007-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch index efb728c7751bb63d148f309fef53e26c1fbb9b47..ebb0d9c756cc273848b70d738b87965c4891c980 100644 --- a/0041-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch +++ b/0007-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch @@ -1,14 +1,14 @@ -From ceace0927f4cb2e7a70eee964d0735e505abfb32 Mon Sep 17 00:00:00 2001 +From a65d14af4e335b9b51b1c7bfd6536f68b9d62c1a Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Fri, 21 Apr 2023 11:08:09 +0800 -Subject: [PATCH 41/62] runtime: remove the meaningless offset of 8 for +Subject: [PATCH 07/51] runtime: remove the meaningless offset of 8 for duffzero on loong64 Currently we subtract 8 from offset when calling duffzero because 8 is added to offset in the duffzero implementation. This operation is meaningless, so remove it. -Change-Id: I7e451d04d7e98ccafe711645d81d3aadf376766f +Change-Id: I22da26e19353275a9bfae523a9e37f8e4ec26041 --- src/cmd/compile/internal/loong64/ggen.go | 23 +- src/cmd/compile/internal/loong64/ssa.go | 10 +- @@ -19,7 +19,7 @@ Change-Id: I7e451d04d7e98ccafe711645d81d3aadf376766f 6 files changed, 148 insertions(+), 149 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ggen.go b/src/cmd/compile/internal/loong64/ggen.go -index c6fd1a65a1..2f94aad912 100644 +index 8a24d2f295..27d318a8bb 100644 --- a/src/cmd/compile/internal/loong64/ggen.go +++ b/src/cmd/compile/internal/loong64/ggen.go @@ -5,6 +5,7 @@ @@ -79,10 +79,10 @@ index c6fd1a65a1..2f94aad912 100644 return p diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 59f9e189bd..5726396e4a 100644 +index 8193b4e321..574217fd92 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -390,14 +390,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -340,14 +340,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { p.To.Type = obj.TYPE_REG p.To.Reg = v.Reg() case ssa.OpLOONG64DUFFZERO: @@ -100,10 +100,10 @@ index 59f9e189bd..5726396e4a 100644 p.To.Name = obj.NAME_EXTERN p.To.Sym = ir.Syms.Duffzero diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 22a83fb300..3a594dd6f7 100644 +index 23f20fddeb..b715b36542 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -@@ -288,7 +288,7 @@ func init() { +@@ -289,7 +289,7 @@ func init() { aux: "Int64", argLength: 2, reg: regInfo{ @@ -113,10 +113,10 @@ index 22a83fb300..3a594dd6f7 100644 }, faultOnNilArg0: true, diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 407ecbb250..8b9df4043e 100644 +index e7caf9050c..e95cb250d9 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -24181,7 +24181,7 @@ var opcodeTable = [...]opInfo{ +@@ -24266,7 +24266,7 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -520,7 +520,7 @@ index 7f78e4fa9f..63fa3bcca1 100644 RET diff --git a/src/runtime/mkduff.go b/src/runtime/mkduff.go -index 6b42b8524b..eb2b9c07ba 100644 +index cc58558a56..e8d4fcc93e 100644 --- a/src/runtime/mkduff.go +++ b/src/runtime/mkduff.go @@ -179,11 +179,11 @@ func copyARM64(w io.Writer) { diff --git a/0042-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch b/0008-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch similarity index 93% rename from 0042-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch rename to 0008-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch index 18fc51ac83e445ae79fe46453fa36e00c1624d54..8808734541bda774264ee97cce035b29a66f72ca 100644 --- a/0042-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch +++ b/0008-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch @@ -1,7 +1,7 @@ -From 7d2ecbb18f7032f634a40c05af8cc46931afb886 Mon Sep 17 00:00:00 2001 +From d954f762b52f269fcc009334bb5209e854696dab Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 25 Apr 2023 03:27:23 +0800 -Subject: [PATCH 42/62] cmd/compiler: remove the meaningless offset of 8 for +Subject: [PATCH 08/51] cmd/compiler: remove the meaningless offset of 8 for Lowered{Zero,Move} on loong64 Like the CL 487295, remove the meaningless +/- offset operation in the @@ -9,7 +9,7 @@ LoweredZero and LoweredMove implementation. Change LoweredMove's Rarg0 register to R20, consistent with duffcopy. -Change-Id: Ia3f3c8b25e1e93c97ab72328651de78ca9dec016 +Change-Id: I19203c428ab25e7ecf657e2ea8ebb0bca77f49ee --- src/cmd/compile/internal/loong64/ssa.go | 168 ++++++++---------- .../compile/internal/ssa/_gen/LOONG64Ops.go | 28 ++- @@ -17,7 +17,7 @@ Change-Id: Ia3f3c8b25e1e93c97ab72328651de78ca9dec016 3 files changed, 91 insertions(+), 111 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 5726396e4a..75eb732df8 100644 +index 574217fd92..f74f90fb5f 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go @@ -80,6 +80,28 @@ func storeByType(t *types.Type, r int16) obj.As { @@ -49,7 +49,7 @@ index 5726396e4a..75eb732df8 100644 func ssaGenValue(s *ssagen.State, v *ssa.Value) { switch v.Op { case ssa.OpCopy, ssa.OpLOONG64MOVVreg: -@@ -397,49 +419,29 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -347,49 +369,29 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { p.To.Sym = ir.Syms.Duffzero p.To.Offset = v.AuxInt case ssa.OpLOONG64LoweredZero: @@ -122,7 +122,7 @@ index 5726396e4a..75eb732df8 100644 case ssa.OpLOONG64DUFFCOPY: p := s.Prog(obj.ADUFFCOPY) p.To.Type = obj.TYPE_MEM -@@ -447,61 +449,43 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -397,61 +399,43 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { p.To.Sym = ir.Syms.Duffcopy p.To.Offset = v.AuxInt case ssa.OpLOONG64LoweredMove: @@ -216,10 +216,10 @@ index 5726396e4a..75eb732df8 100644 s.Call(v) case ssa.OpLOONG64CALLtail: diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 3a594dd6f7..aca1bd7358 100644 +index b715b36542..cb058f45c0 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -@@ -318,10 +318,9 @@ func init() { +@@ -319,10 +319,9 @@ func init() { // arg2 = mem // auxint = alignment // returns mem @@ -233,7 +233,7 @@ index 3a594dd6f7..aca1bd7358 100644 { name: "LoweredZero", aux: "Int64", -@@ -330,32 +329,31 @@ func init() { +@@ -331,32 +330,31 @@ func init() { inputs: []regMask{buildReg("R19"), gp}, clobbers: buildReg("R19"), }, @@ -277,10 +277,10 @@ index 3a594dd6f7..aca1bd7358 100644 faultOnNilArg1: true, }, diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 8b9df4043e..57cd6d6931 100644 +index e95cb250d9..2b712a1189 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -24204,7 +24204,6 @@ var opcodeTable = [...]opInfo{ +@@ -24289,7 +24289,6 @@ var opcodeTable = [...]opInfo{ name: "LoweredZero", auxType: auxInt64, argLen: 3, @@ -288,7 +288,7 @@ index 8b9df4043e..57cd6d6931 100644 faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ -@@ -24218,16 +24217,15 @@ var opcodeTable = [...]opInfo{ +@@ -24303,16 +24302,15 @@ var opcodeTable = [...]opInfo{ name: "LoweredMove", auxType: auxInt64, argLen: 4, diff --git a/0008-cmd-internal-obj-loong64-save-LR-after-decrementing-.patch b/0008-cmd-internal-obj-loong64-save-LR-after-decrementing-.patch deleted file mode 100644 index 925701a80efc5573752653a599a898b29ae8aae7..0000000000000000000000000000000000000000 --- a/0008-cmd-internal-obj-loong64-save-LR-after-decrementing-.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 3f4c5d2a5633cddb6f90fc6024a0b95965a91f79 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Tue, 5 Jul 2022 19:41:27 +0800 -Subject: [PATCH 08/62] cmd/internal/obj/loong64: save LR after decrementing SP - -Refer to CL 413428 and 412474, for loong64, like mips, s390x and riscv, there -is no single instruction that saves the LR and decrements the SP, so we also -need to insert an instruction to save the LR after decrementing the SP. - -Fixes #56623. -Updates #53374. - -Change-Id: I3de040792f0a041d3d2a98ea89c23a2dd2f4ad10 ---- - src/cmd/asm/internal/asm/testdata/loong64.s | 4 ++-- - src/cmd/internal/obj/loong64/obj.go | 14 ++++++++++++++ - 2 files changed, 16 insertions(+), 2 deletions(-) - -diff --git a/src/cmd/asm/internal/asm/testdata/loong64.s b/src/cmd/asm/internal/asm/testdata/loong64.s -index 133cf48db4..6c44d2208a 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64.s -@@ -6,6 +6,6 @@ - // TODO: cover more instruction - - TEXT foo(SB),DUPOK|NOSPLIT,$0 -- JAL 1(PC) //CALL 1(PC) //000c0054 -+ JAL 1(PC) //CALL 1(PC) //00100054 - JAL (R4) //CALL (R4) //8100004c -- JAL foo(SB) //CALL foo(SB) //00100054 -+ JAL foo(SB) //CALL foo(SB) //00140054 -diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go -index dc05e18c7d..0c1f5c029d 100644 ---- a/src/cmd/internal/obj/loong64/obj.go -+++ b/src/cmd/internal/obj/loong64/obj.go -@@ -260,6 +260,20 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - q.Spadj = +autosize - - q = c.ctxt.EndUnsafePoint(q, c.newprog, -1) -+ -+ // On Linux, in a cgo binary we may get a SIGSETXID signal early on -+ // before the signal stack is set, as glibc doesn't allow us to block -+ // SIGSETXID. So a signal may land on the current stack and clobber -+ // the content below the SP. We store the LR again after the SP is -+ // decremented. -+ q = obj.Appendp(q, newprog) -+ q.As = mov -+ q.Pos = p.Pos -+ q.From.Type = obj.TYPE_REG -+ q.From.Reg = REGLINK -+ q.To.Type = obj.TYPE_MEM -+ q.To.Offset = 0 -+ q.To.Reg = REGSP - } - - if c.cursym.Func().Text.From.Sym.Wrapper() && c.cursym.Func().Text.Mark&LEAF == 0 { --- -2.38.1 - diff --git a/0056-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch b/0009-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch similarity index 93% rename from 0056-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch rename to 0009-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch index d02f3dca9bc3640a471de77bfe395c0446a09804..89ac785d99132693a331e0daa5dd706dee171e55 100644 --- a/0056-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch +++ b/0009-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch @@ -1,7 +1,7 @@ -From 964026d0bfad09ee9d54290e3140aae97d8821dc Mon Sep 17 00:00:00 2001 +From 0d50a1538d5834f9e94d8c781727d97ce1b3af5f Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Sat, 1 Apr 2023 03:43:20 +0800 -Subject: [PATCH 56/62] cmd/internal/obj/loong64: add atomic memory access +Subject: [PATCH 09/51] cmd/internal/obj/loong64: add atomic memory access instructions support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -23,8 +23,7 @@ Equivalent platform assembler syntax: am{max/min}[_db].{wu/du} rd, rk, rj Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html - -Change-Id: I99ea4553ae731675180d63691c19ef334e7e7817 +Change-Id: I1707c484c3b2a0cf523255c80f566480a77432fb --- src/cmd/asm/internal/arch/loong64.go | 4 ++ src/cmd/asm/internal/asm/asm.go | 14 +++- @@ -50,7 +49,7 @@ index 2958ee1a86..bf34a94f07 100644 switch name { case "F": diff --git a/src/cmd/asm/internal/asm/asm.go b/src/cmd/asm/internal/asm/asm.go -index 4d0eeacc74..ee988734f0 100644 +index 563e794706..c8fff8e574 100644 --- a/src/cmd/asm/internal/asm/asm.go +++ b/src/cmd/asm/internal/asm/asm.go @@ -664,9 +664,17 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) { @@ -217,7 +216,7 @@ index f61756e7a8..d48ff8a281 100644 "RDTIMEHW", "RDTIMED", diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index c785adf8af..2b505ad749 100644 +index c8d00413a0..638bd1139f 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go @@ -363,6 +363,8 @@ var optab = []Optab{ @@ -278,10 +277,10 @@ index c785adf8af..2b505ad749 100644 + return ok +} + - // align code to a certain length by padding bytes. - func pcAlignPadLength(pc int64, alignedValue int64, ctxt *obj.Link) int { - if !((alignedValue&(alignedValue-1) == 0) && 8 <= alignedValue && alignedValue <= 2048) { -@@ -1167,6 +1214,14 @@ func buildop(ctxt *obj.Link) { + // pcAlignPadLength returns the number of bytes required to align pc to alignedValue, + // reporting an error if alignedValue is not a power of two or is out of range. + func pcAlignPadLength(ctxt *obj.Link, pc int64, alignedValue int64) int { +@@ -1172,6 +1219,14 @@ func buildop(ctxt *obj.Link) { case AMASKEQZ: opset(AMASKNEZ, r0) @@ -296,7 +295,7 @@ index c785adf8af..2b505ad749 100644 } } } -@@ -1790,6 +1845,18 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1797,6 +1852,18 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel2.Sym = p.From.Sym rel2.Type = objabi.R_LOONG64_GOT_LO rel2.Add = 0x0 diff --git a/0009-runtime-refactor-the-linux-loong64-entrypoint.patch b/0009-runtime-refactor-the-linux-loong64-entrypoint.patch deleted file mode 100644 index 17fb6a781d2b4ff23b206985955f9e31a74da7ff..0000000000000000000000000000000000000000 --- a/0009-runtime-refactor-the-linux-loong64-entrypoint.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 57af8cb85970fade444d787b26dc77e22adfbe0c Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Mon, 25 Jul 2022 15:30:53 +0800 -Subject: [PATCH 09/62] runtime: refactor the linux/loong64 entrypoint - -Remove the meaningless jump, and add the missing NOFRAME flag to _rt0_loong64_linux. - -Change-Id: I1aec68c556615b42042684bd176dfc2a8af094d1 ---- - src/runtime/rt0_linux_loong64.s | 9 +++------ - 1 file changed, 3 insertions(+), 6 deletions(-) - -diff --git a/src/runtime/rt0_linux_loong64.s b/src/runtime/rt0_linux_loong64.s -index b23ae7837a..b9aaa510e1 100644 ---- a/src/runtime/rt0_linux_loong64.s -+++ b/src/runtime/rt0_linux_loong64.s -@@ -4,16 +4,13 @@ - - #include "textflag.h" - --TEXT _rt0_loong64_linux(SB),NOSPLIT,$0 -- JMP _main<>(SB) -- --TEXT _main<>(SB),NOSPLIT|NOFRAME,$0 -+TEXT _rt0_loong64_linux(SB),NOSPLIT|NOFRAME,$0 - // In a statically linked binary, the stack contains argc, - // argv as argc string pointers followed by a NULL, envv as a - // sequence of string pointers followed by a NULL, and auxv. - // There is no TLS base pointer. -- MOVW 0(R3), R4 // argc -- ADDV $8, R3, R5 // argv -+ MOVW 0(R3), R4 // argc -+ ADDV $8, R3, R5 // argv - JMP main(SB) - - TEXT main(SB),NOSPLIT|NOFRAME,$0 --- -2.38.1 - diff --git a/0057-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch b/0010-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch similarity index 93% rename from 0057-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch rename to 0010-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch index 85dec4e1c0e608d4d3a95f3058559466e8f021cb..01abe54f915f7a919380eae1f68ec2a4a6e7abd3 100644 --- a/0057-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch +++ b/0010-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch @@ -1,7 +1,7 @@ -From 73d1e0ee8acb2a3d4eb8030fa62473a8df7c43e8 Mon Sep 17 00:00:00 2001 +From 88bc9d7c907c3312d6ff6079aca176471f6d3e5d Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Sat, 1 Apr 2023 08:49:58 +0800 -Subject: [PATCH 57/62] cmd/compiler,runtime/internal/atomic: optimize xchg and +Subject: [PATCH 10/51] cmd/compiler,runtime/internal/atomic: optimize xchg and xchg64 on loong64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -28,7 +28,7 @@ geomean 36.54n 25.65n -28.61% Updates #59120. -Change-Id: Ied74fc20338b63799c6d6eeb122c31b42cff0f7e +Change-Id: I1f78f547b818ea6ead9480254c05745e2eee4d68 --- src/cmd/compile/internal/loong64/ssa.go | 38 ++++--------------- .../compile/internal/ssa/_gen/LOONG64Ops.go | 6 --- @@ -36,10 +36,10 @@ Change-Id: Ied74fc20338b63799c6d6eeb122c31b42cff0f7e 3 files changed, 22 insertions(+), 52 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 18abe06966..26534ccf40 100644 +index f74f90fb5f..e103c896e6 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -494,40 +494,18 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -495,40 +495,18 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { p.To.Reg = v.Args[0].Reg() s.Prog(loong64.ADBAR) case ssa.OpLOONG64LoweredAtomicExchange32, ssa.OpLOONG64LoweredAtomicExchange64: @@ -89,7 +89,7 @@ index 18abe06966..26534ccf40 100644 // DBAR // LL (Rarg0), Rout diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index f2b9ac9ccd..350e624adc 100644 +index cb058f45c0..09c3df6af2 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -377,12 +377,6 @@ func init() { @@ -106,7 +106,7 @@ index f2b9ac9ccd..350e624adc 100644 {name: "LoweredAtomicExchange64", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true}, diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index 80ff980739..e8ffdee70e 100644 +index 34193add3e..ec34d254fc 100644 --- a/src/runtime/internal/atomic/atomic_loong64.s +++ b/src/runtime/internal/atomic/atomic_loong64.s @@ -121,35 +121,33 @@ TEXT ·Xadd64(SB), NOSPLIT, $0-24 diff --git a/0010-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch b/0010-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch deleted file mode 100644 index 03e26f285a348baadd58cd397d64899fdc17d70b..0000000000000000000000000000000000000000 --- a/0010-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch +++ /dev/null @@ -1,28 +0,0 @@ -From a43da65cdbbe17430534a74a2a27d57fa67c6196 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 3 Aug 2022 17:45:02 +0800 -Subject: [PATCH 10/62] cmd/internal/obj/loong64: remove invalid branch delay - slots - -Change-Id: I222717771019f7aefa547971b2d94ef4677a42c9 ---- - src/cmd/internal/obj/loong64/asm.go | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 982ddd8103..02e44ee0a1 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -435,9 +435,6 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - q.Pos = p.Pos - q.To.Type = obj.TYPE_BRANCH - q.To.SetTarget(q.Link.Link) -- -- c.addnop(p.Link) -- c.addnop(p) - bflag = 1 - } - } --- -2.38.1 - diff --git a/0058-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch b/0011-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch similarity index 93% rename from 0058-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch rename to 0011-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch index ea75e610b2e6ebf640a4e5a71c74d6e0ca080db4..f6e1c91220fee855c3d3c55ac666b15d9fed7ed7 100644 --- a/0058-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch +++ b/0011-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch @@ -1,7 +1,7 @@ -From 6e2b9551333ec2dfd66c294f09c9aedbaea23be2 Mon Sep 17 00:00:00 2001 +From 3cff40986c3a3f46a0f5bd8ed6b40638e6702226 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Mon, 3 Apr 2023 12:11:46 +0800 -Subject: [PATCH 58/62] cmd/compiler,runtime/internal/atomic: optimize xadd and +Subject: [PATCH 11/51] cmd/compiler,runtime/internal/atomic: optimize xadd and xadd64 on loong64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -34,10 +34,10 @@ Change-Id: I982539c2aa04680e9dd11b099ba8d5f215bf9b32 3 files changed, 27 insertions(+), 60 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 26534ccf40..b49a140e03 100644 +index e103c896e6..f809fbac5f 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -507,48 +507,27 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -508,48 +508,27 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { p.RegTo2 = v.Reg0() case ssa.OpLOONG64LoweredAtomicAdd32, ssa.OpLOONG64LoweredAtomicAdd64: @@ -102,7 +102,7 @@ index 26534ccf40..b49a140e03 100644 // DBAR // LL (Rarg0), Rout diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 350e624adc..effd02b9e7 100644 +index 09c3df6af2..b83a7b0128 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -382,13 +382,6 @@ func init() { @@ -120,7 +120,7 @@ index 350e624adc..effd02b9e7 100644 {name: "LoweredAtomicAdd64", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true}, // *arg0 += auxint. arg1=mem. returns . auxint is 32-bit. diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index e8ffdee70e..c36e549d33 100644 +index ec34d254fc..eadd031553 100644 --- a/src/runtime/internal/atomic/atomic_loong64.s +++ b/src/runtime/internal/atomic/atomic_loong64.s @@ -78,6 +78,9 @@ TEXT ·Xadduintptr(SB), NOSPLIT, $0-24 @@ -135,14 +135,14 @@ index e8ffdee70e..c36e549d33 100644 @@ -91,34 +94,26 @@ TEXT ·Xaddint64(SB), NOSPLIT, $0-24 TEXT ·Casp1(SB), NOSPLIT, $0-25 - JMP runtime∕internal∕atomic·Cas64(SB) + JMP ·Cas64(SB) -// uint32 xadd(uint32 volatile *ptr, int32 delta) // Atomically: // *val += delta; // return *val; +// -+//func Xadd(ptr *uint32, delta int32) uint32 ++// func Xadd(ptr *uint32, delta int32) uint32 TEXT ·Xadd(SB), NOSPLIT, $0-20 MOVV ptr+0(FP), R4 MOVW delta+8(FP), R5 diff --git a/0011-runtime-calculate-nanoseconds-in-usleep-on-linux-loo.patch b/0011-runtime-calculate-nanoseconds-in-usleep-on-linux-loo.patch deleted file mode 100644 index 441d2076ccdd60e74d6b96d70398a3dd358ca0bb..0000000000000000000000000000000000000000 --- a/0011-runtime-calculate-nanoseconds-in-usleep-on-linux-loo.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 47da5877393a5e1e4eeb7f196099f4a1e3f5939b Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 24 Aug 2022 02:44:22 +0800 -Subject: [PATCH 11/62] runtime: calculate nanoseconds in usleep on - linux/loong64 - -Change-Id: Ia4cfdea3df8834e6260527ce8e6e894a0547070f ---- - src/runtime/sys_linux_loong64.s | 27 +++++++++++++++------------ - 1 file changed, 15 insertions(+), 12 deletions(-) - -diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s -index 9ce5e72256..72eaac3c40 100644 ---- a/src/runtime/sys_linux_loong64.s -+++ b/src/runtime/sys_linux_loong64.s -@@ -113,20 +113,23 @@ TEXT runtime·pipe2(SB),NOSPLIT|NOFRAME,$0-20 - RET - - TEXT runtime·usleep(SB),NOSPLIT,$16-4 -- MOVWU usec+0(FP), R6 -- MOVV R6, R5 -- MOVW $1000000, R4 -- DIVVU R4, R6, R6 -- MOVV R6, 8(R3) -- MOVW $1000, R4 -- MULVU R6, R4, R4 -- SUBVU R4, R5 -- MOVV R5, 16(R3) -+ MOVWU usec+0(FP), R6 -+ MOVV $1000, R4 -+ MULVU R4, R6, R6 -+ MOVV $1000000000, R4 -+ -+ // ts->tv_sec -+ DIVVU R4, R6, R5 -+ MOVV R5, 8(R3) -+ -+ // ts->tv_nsec -+ REMVU R4, R6, R5 -+ MOVV R5, 16(R3) - - // nanosleep(&ts, 0) -- ADDV $8, R3, R4 -- MOVW $0, R5 -- MOVV $SYS_nanosleep, R11 -+ ADDV $8, R3, R4 -+ MOVV R0, R5 -+ MOVV $SYS_nanosleep, R11 - SYSCALL - RET - --- -2.38.1 - diff --git a/0059-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch b/0012-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch similarity index 90% rename from 0059-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch rename to 0012-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch index d5840fdd0fc0d17c638f80fa76aa8f66d2b14620..2a37ca83f98a19b152d96e4464b29f9d32c0923a 100644 --- a/0059-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch +++ b/0012-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch @@ -1,7 +1,7 @@ -From 4acb0344ea4db6528c59b61a69f96f270a5d2b20 Mon Sep 17 00:00:00 2001 +From fe590f50bffe5cc7a2f99d558e34a02f2ede6c8c Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 5 Apr 2023 22:15:46 +0800 -Subject: [PATCH 59/62] cmd/compiler,runtime/internal/atomic: optimize +Subject: [PATCH 12/51] cmd/compiler,runtime/internal/atomic: optimize And{32,8} and Or{32,8} on loong64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -59,7 +59,7 @@ geomean 38.98n 21.45n -44.96% Updates #59120. -Change-Id: If008ff6a08b51905076f8ddb6e92f8e214d3f7b3 +Change-Id: Ib998a26613adaa5ed2c23ed528245a4e83d10eca --- src/cmd/compile/internal/loong64/ssa.go | 8 ++ .../compile/internal/ssa/_gen/LOONG64.rules | 19 +++++ @@ -71,10 +71,10 @@ Change-Id: If008ff6a08b51905076f8ddb6e92f8e214d3f7b3 7 files changed, 155 insertions(+), 30 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index b49a140e03..b992024bca 100644 +index f809fbac5f..8d305c4f57 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -506,6 +506,14 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -507,6 +507,14 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { p.To.Reg = v.Args[0].Reg() p.RegTo2 = v.Reg0() @@ -90,10 +90,10 @@ index b49a140e03..b992024bca 100644 // AMADDx Rarg1, (Rarg0), Rout // ADDxU Rarg1, Rout, Rout diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -index dc1a76dc93..b4bce73637 100644 +index b9aaa3ff7f..25caad4406 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -@@ -404,6 +404,25 @@ +@@ -405,6 +405,25 @@ (AtomicCompareAndSwap32 ptr old new mem) => (LoweredAtomicCas32 ptr (SignExt32to64 old) new mem) (AtomicCompareAndSwap64 ...) => (LoweredAtomicCas64 ...) @@ -120,7 +120,7 @@ index dc1a76dc93..b4bce73637 100644 (NilCheck ...) => (LoweredNilCheck ...) (IsNonNil ptr) => (SGTU ptr (MOVVconst [0])) diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index effd02b9e7..8043ad2aa7 100644 +index b83a7b0128..41cc431e8b 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -380,6 +380,11 @@ func init() { @@ -136,10 +136,10 @@ index effd02b9e7..8043ad2aa7 100644 // *arg0 += arg1. arg2=mem. returns . {name: "LoweredAtomicAdd32", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true}, diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 5a001573ea..6ba5fe891a 100644 +index 2b712a1189..55a42ae782 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -1824,6 +1824,8 @@ const ( +@@ -1827,6 +1827,8 @@ const ( OpLOONG64LoweredAtomicStorezero64 OpLOONG64LoweredAtomicExchange32 OpLOONG64LoweredAtomicExchange64 @@ -148,7 +148,7 @@ index 5a001573ea..6ba5fe891a 100644 OpLOONG64LoweredAtomicAdd32 OpLOONG64LoweredAtomicAdd64 OpLOONG64LoweredAtomicAddconst32 -@@ -24401,6 +24403,38 @@ var opcodeTable = [...]opInfo{ +@@ -24444,6 +24446,38 @@ var opcodeTable = [...]opInfo{ }, }, }, @@ -188,10 +188,10 @@ index 5a001573ea..6ba5fe891a 100644 name: "LoweredAtomicAdd32", argLen: 3, diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -index 08e0d6f6c2..5c1d30b0bb 100644 +index 757524bdbb..bb09bd2e58 100644 --- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go +++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -@@ -51,6 +51,11 @@ func rewriteValueLOONG64(v *Value) bool { +@@ -50,6 +50,11 @@ func rewriteValueLOONG64(v *Value) bool { case OpAtomicAdd64: v.Op = OpLOONG64LoweredAtomicAdd64 return true @@ -203,7 +203,7 @@ index 08e0d6f6c2..5c1d30b0bb 100644 case OpAtomicCompareAndSwap32: return rewriteValueLOONG64_OpAtomicCompareAndSwap32(v) case OpAtomicCompareAndSwap64: -@@ -74,6 +79,11 @@ func rewriteValueLOONG64(v *Value) bool { +@@ -73,6 +78,11 @@ func rewriteValueLOONG64(v *Value) bool { case OpAtomicLoadPtr: v.Op = OpLOONG64LoweredAtomicLoad64 return true @@ -215,7 +215,7 @@ index 08e0d6f6c2..5c1d30b0bb 100644 case OpAtomicStore32: v.Op = OpLOONG64LoweredAtomicStore32 return true -@@ -719,6 +729,46 @@ func rewriteValueLOONG64_OpAddr(v *Value) bool { +@@ -718,6 +728,46 @@ func rewriteValueLOONG64_OpAddr(v *Value) bool { return true } } @@ -262,7 +262,7 @@ index 08e0d6f6c2..5c1d30b0bb 100644 func rewriteValueLOONG64_OpAtomicCompareAndSwap32(v *Value) bool { v_3 := v.Args[3] v_2 := v.Args[2] -@@ -740,6 +790,37 @@ func rewriteValueLOONG64_OpAtomicCompareAndSwap32(v *Value) bool { +@@ -739,6 +789,37 @@ func rewriteValueLOONG64_OpAtomicCompareAndSwap32(v *Value) bool { return true } } @@ -301,41 +301,41 @@ index 08e0d6f6c2..5c1d30b0bb 100644 v_1 := v.Args[1] v_0 := v.Args[0] diff --git a/src/cmd/compile/internal/ssagen/ssa.go b/src/cmd/compile/internal/ssagen/ssa.go -index 526332294c..6bdb4a9ea5 100644 +index e994577c64..02a69cc44a 100644 --- a/src/cmd/compile/internal/ssagen/ssa.go +++ b/src/cmd/compile/internal/ssagen/ssa.go -@@ -4238,25 +4238,25 @@ func InitTables() { +@@ -4352,25 +4352,25 @@ func InitTables() { s.vars[memVar] = s.newValue3(ssa.OpAtomicAnd8, types.TypeMem, args[0], args[1], s.mem()) return nil }, -- sys.AMD64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) -+ sys.AMD64, sys.Loong64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) +- sys.AMD64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) ++ sys.AMD64, sys.Loong64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) addF("runtime/internal/atomic", "And", func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value { s.vars[memVar] = s.newValue3(ssa.OpAtomicAnd32, types.TypeMem, args[0], args[1], s.mem()) return nil }, -- sys.AMD64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) -+ sys.AMD64, sys.Loong64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) +- sys.AMD64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) ++ sys.AMD64, sys.Loong64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) addF("runtime/internal/atomic", "Or8", func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value { s.vars[memVar] = s.newValue3(ssa.OpAtomicOr8, types.TypeMem, args[0], args[1], s.mem()) return nil }, -- sys.AMD64, sys.ARM64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) -+ sys.AMD64, sys.ARM64, sys.Loong64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) +- sys.AMD64, sys.ARM64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) ++ sys.AMD64, sys.ARM64, sys.Loong64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) addF("runtime/internal/atomic", "Or", func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value { s.vars[memVar] = s.newValue3(ssa.OpAtomicOr32, types.TypeMem, args[0], args[1], s.mem()) return nil }, -- sys.AMD64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) -+ sys.AMD64, sys.Loong64, sys.MIPS, sys.PPC64, sys.RISCV64, sys.S390X) +- sys.AMD64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) ++ sys.AMD64, sys.Loong64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.RISCV64, sys.S390X) atomicAndOrEmitterARM64 := func(s *state, n *ir.CallExpr, args []*ssa.Value, op ssa.Op, typ types.Kind) { s.vars[memVar] = s.newValue3(op, types.TypeMem, args[0], args[1], s.mem()) diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index c36e549d33..1d4d4b4b37 100644 +index eadd031553..092eb70c06 100644 --- a/src/runtime/internal/atomic/atomic_loong64.s +++ b/src/runtime/internal/atomic/atomic_loong64.s @@ -191,13 +191,7 @@ TEXT ·Or8(SB), NOSPLIT, $0-9 diff --git a/0012-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch b/0012-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch deleted file mode 100644 index 7eb2b7d8571269d29050169d533660a376d8ddac..0000000000000000000000000000000000000000 --- a/0012-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 079c0391caf2b30e9347cadee78c9741001323db Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 24 Aug 2022 09:22:36 +0800 -Subject: [PATCH 12/62] cmd/internal/obj: remove redundant cnames on loong64 - -Change-Id: I5aa6328a12e74b2801ab60b5a5bb8571d382d5ef ---- - src/cmd/internal/obj/loong64/cnames.go | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/cmd/internal/obj/loong64/cnames.go b/src/cmd/internal/obj/loong64/cnames.go -index f3970777bb..00f6136603 100644 ---- a/src/cmd/internal/obj/loong64/cnames.go -+++ b/src/cmd/internal/obj/loong64/cnames.go -@@ -4,11 +4,11 @@ - - package loong64 - -+// This order should be strictly consistent to that in a.out.go. - var cnames0 = []string{ - "NONE", - "REG", - "FREG", -- "FCREG", - "FCSRREG", - "FCCREG", - "ZCON", --- -2.38.1 - diff --git a/0063-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch b/0013-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch similarity index 82% rename from 0063-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch rename to 0013-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch index 43a338fd2f33fc0bb28f4c1be03475aef1b9f18f..c66bb247dd3df12b623dec152b5f780c433d6eef 100644 --- a/0063-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch +++ b/0013-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch @@ -1,20 +1,20 @@ -From b8c48ca3b93279f5a20006695eebe94ce604c92b Mon Sep 17 00:00:00 2001 +From 005a1a3c1fc5a668f1311cb27d0be6257983063f Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Thu, 15 Jun 2023 12:34:55 +0800 -Subject: [PATCH 01/30] cmd/compiler,runtime/internal/atomic: Implementing +Subject: [PATCH 13/51] cmd/compiler,runtime/internal/atomic: Implementing xchg{,64} using amswapdb{w,d} on loong64 -Change-Id: If9cb20c2388b0e5de012d01ce45c49a80c902947 +Change-Id: Ib8acb6f0f1a91e50c67064dae19c085f01341e08 --- src/cmd/compile/internal/loong64/ssa.go | 4 ++-- src/runtime/internal/atomic/atomic_loong64.s | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index b992024bca..d3fe1d1441 100644 +index 8d305c4f57..74489fe13a 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -495,9 +495,9 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -496,9 +496,9 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { s.Prog(loong64.ADBAR) case ssa.OpLOONG64LoweredAtomicExchange32, ssa.OpLOONG64LoweredAtomicExchange64: // AMSWAPx Rarg1, (Rarg0), Rout @@ -27,7 +27,7 @@ index b992024bca..d3fe1d1441 100644 p := s.Prog(amswapx) p.From.Type = obj.TYPE_REG diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index 1d4d4b4b37..e3f2d07858 100644 +index 092eb70c06..215bb0382c 100644 --- a/src/runtime/internal/atomic/atomic_loong64.s +++ b/src/runtime/internal/atomic/atomic_loong64.s @@ -120,7 +120,7 @@ TEXT ·Xadd64(SB), NOSPLIT, $0-24 diff --git a/0013-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch b/0013-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch deleted file mode 100644 index e94166d911fba9313b21c8486ca97a2f8cd9b334..0000000000000000000000000000000000000000 --- a/0013-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 8439e407e44770a149a13941341f724760f01a27 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Fri, 26 Aug 2022 14:01:27 +0800 -Subject: [PATCH 13/62] runtime: save/fetch g register during VDSO on loong64 - -Change-Id: Iaffa8cce4f0ef8ef74225c355ec3c20ed238025f ---- - src/runtime/signal_unix.go | 2 +- - src/runtime/sys_linux_loong64.s | 44 ++++++++++++++++++++++++++++++--- - 2 files changed, 41 insertions(+), 5 deletions(-) - -diff --git a/src/runtime/signal_unix.go b/src/runtime/signal_unix.go -index c1abe62cb3..d0551021e5 100644 ---- a/src/runtime/signal_unix.go -+++ b/src/runtime/signal_unix.go -@@ -397,7 +397,7 @@ func preemptM(mp *m) { - //go:nosplit - func sigFetchG(c *sigctxt) *g { - switch GOARCH { -- case "arm", "arm64", "ppc64", "ppc64le", "riscv64", "s390x": -+ case "arm", "arm64", "loong64", "ppc64", "ppc64le", "riscv64", "s390x": - if !iscgo && inVDSOPage(c.sigpc()) { - // When using cgo, we save the g on TLS and load it from there - // in sigtramp. Just use that. -diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s -index 72eaac3c40..4d00fd0ca3 100644 ---- a/src/runtime/sys_linux_loong64.s -+++ b/src/runtime/sys_linux_loong64.s -@@ -10,7 +10,9 @@ - #include "go_tls.h" - #include "textflag.h" - --#define AT_FDCWD -100 -+#define AT_FDCWD -100 -+#define CLOCK_REALTIME 0 -+#define CLOCK_MONOTONIC 1 - - #define SYS_exit 93 - #define SYS_read 63 -@@ -219,7 +221,7 @@ TEXT runtime·mincore(SB),NOSPLIT|NOFRAME,$0-28 - RET - - // func walltime() (sec int64, nsec int32) --TEXT runtime·walltime(SB),NOSPLIT,$16-12 -+TEXT runtime·walltime(SB),NOSPLIT,$24-12 - MOVV R3, R23 // R23 is unchanged by C code - MOVV R3, R25 - -@@ -249,12 +251,29 @@ noswitch: - AND $~15, R25 // Align for C code - MOVV R25, R3 - -- MOVW $0, R4 // CLOCK_REALTIME=0 -+ MOVW $CLOCK_REALTIME, R4 - MOVV $0(R3), R5 - - MOVV runtime·vdsoClockgettimeSym(SB), R20 - BEQ R20, fallback - -+ // Store g on gsignal's stack, see sys_linux_arm64.s for detail -+ MOVBU runtime·iscgo(SB), R25 -+ BNE R0, R25, nosaveg -+ -+ MOVV m_gsignal(R24), R25 // g.m.gsignal -+ BEQ R25, nosaveg -+ BEQ g, R25, nosaveg -+ -+ MOVV (g_stack+stack_lo)(R25), R25 // g.m.gsignal.stack.lo -+ MOVV g, (R25) -+ -+ JAL (R20) -+ -+ MOVV R0, (R25) -+ JMP finish -+ -+nosaveg: - JAL (R20) - - finish: -@@ -311,12 +330,29 @@ noswitch: - AND $~15, R25 // Align for C code - MOVV R25, R3 - -- MOVW $1, R4 // CLOCK_MONOTONIC=1 -+ MOVW $CLOCK_MONOTONIC, R4 - MOVV $0(R3), R5 - - MOVV runtime·vdsoClockgettimeSym(SB), R20 - BEQ R20, fallback - -+ // Store g on gsignal's stack, see sys_linux_arm64.s for detail -+ MOVBU runtime·iscgo(SB), R25 -+ BNE R0, R25, nosaveg -+ -+ MOVV m_gsignal(R24), R25 // g.m.gsignal -+ BEQ R25, nosaveg -+ BEQ g, R25, nosaveg -+ -+ MOVV (g_stack+stack_lo)(R25), R25 // g.m.gsignal.stack.lo -+ MOVV g, (R25) -+ -+ JAL (R20) -+ -+ MOVV R0, (R25) -+ JMP finish -+ -+nosaveg: - JAL (R20) - - finish: --- -2.38.1 - diff --git a/0064-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch b/0014-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch similarity index 82% rename from 0064-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch rename to 0014-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch index 93a228b8bbaefd859f964f431626dd282965164d..8dac5fde681bb55919814947b12864e86e193984 100644 --- a/0064-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch +++ b/0014-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch @@ -1,20 +1,20 @@ -From c0349ed75465b9cc9ba428591e0bb6e6f5477fc7 Mon Sep 17 00:00:00 2001 +From c9167e5fddcc9c01dce504382df32c33765dcb25 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Thu, 15 Jun 2023 12:37:00 +0800 -Subject: [PATCH 02/30] cmd/compiler,runtime/internal/atomic: Implementing +Subject: [PATCH 14/51] cmd/compiler,runtime/internal/atomic: Implementing xadd{,64} using amadddb{w,d} on loong64 -Change-Id: Ie1f2f1e6861c1805cc562f87cb7ee13dba4f63d1 +Change-Id: If58d4bcc1b367af5daf9f753bde61de4a7f690f1 --- src/cmd/compile/internal/loong64/ssa.go | 4 ++-- src/runtime/internal/atomic/atomic_loong64.s | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index d3fe1d1441..f81152c7b5 100644 +index 74489fe13a..0e8683ba81 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -517,10 +517,10 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { +@@ -518,10 +518,10 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { case ssa.OpLOONG64LoweredAtomicAdd32, ssa.OpLOONG64LoweredAtomicAdd64: // AMADDx Rarg1, (Rarg0), Rout // ADDxU Rarg1, Rout, Rout @@ -28,7 +28,7 @@ index d3fe1d1441..f81152c7b5 100644 } p := s.Prog(amaddx) diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index e3f2d07858..531993e8b7 100644 +index 215bb0382c..1ea85b1944 100644 --- a/src/runtime/internal/atomic/atomic_loong64.s +++ b/src/runtime/internal/atomic/atomic_loong64.s @@ -102,7 +102,7 @@ TEXT ·Casp1(SB), NOSPLIT, $0-25 diff --git a/0014-runtime-save-restore-callee-saved-registers-in-loong.patch b/0014-runtime-save-restore-callee-saved-registers-in-loong.patch deleted file mode 100644 index 46da1dde95cfb3941e38bd0e8a6a709d6434a7be..0000000000000000000000000000000000000000 --- a/0014-runtime-save-restore-callee-saved-registers-in-loong.patch +++ /dev/null @@ -1,222 +0,0 @@ -From 1dbd1cf5134a9e357d6752b050e445237e8b333f Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Fri, 26 Aug 2022 14:05:31 +0800 -Subject: [PATCH 14/62] runtime: save/restore callee-saved registers in - loong64's sigtramp - -Loong64's R22-R31 and F24-F31 are callee saved registers, which -should be saved in the beginning of sigtramp, and restored at -the end. - -In reviewing comments about sigtramp in sys_linux_arm64 it was -noted that a previous issue in arm64 due to missing callee save -registers could also be a problem on loong64, so code was added -to save and restore those. - -Updates #31827 - -Change-Id: I3ae58fe8a64ddb052d0a89b63e82c01ad328dd15 ---- - src/runtime/cgo/abi_loong64.h | 60 +++++++++++++++++++++++++++++++++ - src/runtime/cgo/asm_loong64.s | 55 ++++++++---------------------- - src/runtime/sys_linux_loong64.s | 28 ++++++++++----- - 3 files changed, 94 insertions(+), 49 deletions(-) - create mode 100644 src/runtime/cgo/abi_loong64.h - -diff --git a/src/runtime/cgo/abi_loong64.h b/src/runtime/cgo/abi_loong64.h -new file mode 100644 -index 0000000000..b10d83732f ---- /dev/null -+++ b/src/runtime/cgo/abi_loong64.h -@@ -0,0 +1,60 @@ -+// Copyright 2022 The Go Authors. All rights reserved. -+// Use of this source code is governed by a BSD-style -+// license that can be found in the LICENSE file. -+ -+// Macros for transitioning from the host ABI to Go ABI0. -+// -+// These macros save and restore the callee-saved registers -+// from the stack, but they don't adjust stack pointer, so -+// the user should prepare stack space in advance. -+// SAVE_R22_TO_R31(offset) saves R22 ~ R31 to the stack space -+// of ((offset)+0*8)(R3) ~ ((offset)+9*8)(R3). -+// -+// SAVE_F24_TO_F31(offset) saves F24 ~ F31 to the stack space -+// of ((offset)+0*8)(R3) ~ ((offset)+7*8)(R3). -+// -+// Note: g is R22 -+ -+#define SAVE_R22_TO_R31(offset) \ -+ MOVV g, ((offset)+(0*8))(R3) \ -+ MOVV R23, ((offset)+(1*8))(R3) \ -+ MOVV R24, ((offset)+(2*8))(R3) \ -+ MOVV R25, ((offset)+(3*8))(R3) \ -+ MOVV R26, ((offset)+(4*8))(R3) \ -+ MOVV R27, ((offset)+(5*8))(R3) \ -+ MOVV R28, ((offset)+(6*8))(R3) \ -+ MOVV R29, ((offset)+(7*8))(R3) \ -+ MOVV R30, ((offset)+(8*8))(R3) \ -+ MOVV R31, ((offset)+(9*8))(R3) -+ -+#define SAVE_F24_TO_F31(offset) \ -+ MOVD F24, ((offset)+(0*8))(R3) \ -+ MOVD F25, ((offset)+(1*8))(R3) \ -+ MOVD F26, ((offset)+(2*8))(R3) \ -+ MOVD F27, ((offset)+(3*8))(R3) \ -+ MOVD F28, ((offset)+(4*8))(R3) \ -+ MOVD F29, ((offset)+(5*8))(R3) \ -+ MOVD F30, ((offset)+(6*8))(R3) \ -+ MOVD F31, ((offset)+(7*8))(R3) -+ -+#define RESTORE_R22_TO_R31(offset) \ -+ MOVV ((offset)+(0*8))(R3), g \ -+ MOVV ((offset)+(1*8))(R3), R23 \ -+ MOVV ((offset)+(2*8))(R3), R24 \ -+ MOVV ((offset)+(3*8))(R3), R25 \ -+ MOVV ((offset)+(4*8))(R3), R26 \ -+ MOVV ((offset)+(5*8))(R3), R27 \ -+ MOVV ((offset)+(6*8))(R3), R28 \ -+ MOVV ((offset)+(7*8))(R3), R29 \ -+ MOVV ((offset)+(8*8))(R3), R30 \ -+ MOVV ((offset)+(9*8))(R3), R31 -+ -+#define RESTORE_F24_TO_F31(offset) \ -+ MOVD ((offset)+(0*8))(R3), F24 \ -+ MOVD ((offset)+(1*8))(R3), F25 \ -+ MOVD ((offset)+(2*8))(R3), F26 \ -+ MOVD ((offset)+(3*8))(R3), F27 \ -+ MOVD ((offset)+(4*8))(R3), F28 \ -+ MOVD ((offset)+(5*8))(R3), F29 \ -+ MOVD ((offset)+(6*8))(R3), F30 \ -+ MOVD ((offset)+(7*8))(R3), F31 -diff --git a/src/runtime/cgo/asm_loong64.s b/src/runtime/cgo/asm_loong64.s -index 961a3dd484..aea4f8e6b9 100644 ---- a/src/runtime/cgo/asm_loong64.s -+++ b/src/runtime/cgo/asm_loong64.s -@@ -3,6 +3,7 @@ - // license that can be found in the LICENSE file. - - #include "textflag.h" -+#include "abi_loong64.h" - - // Called by C code generated by cmd/cgo. - // func crosscall2(fn, a unsafe.Pointer, n int32, ctxt uintptr) -@@ -16,52 +17,24 @@ TEXT crosscall2(SB),NOSPLIT|NOFRAME,$0 - * first arg. - */ - -- ADDV $(-8*22), R3 -- MOVV R4, (8*1)(R3) // fn unsafe.Pointer -- MOVV R5, (8*2)(R3) // a unsafe.Pointer -- MOVV R7, (8*3)(R3) // ctxt uintptr -- MOVV R23, (8*4)(R3) -- MOVV R24, (8*5)(R3) -- MOVV R25, (8*6)(R3) -- MOVV R26, (8*7)(R3) -- MOVV R27, (8*8)(R3) -- MOVV R28, (8*9)(R3) -- MOVV R29, (8*10)(R3) -- MOVV R30, (8*11)(R3) -- MOVV g, (8*12)(R3) -- MOVV R1, (8*13)(R3) -- MOVD F24, (8*14)(R3) -- MOVD F25, (8*15)(R3) -- MOVD F26, (8*16)(R3) -- MOVD F27, (8*17)(R3) -- MOVD F28, (8*18)(R3) -- MOVD F29, (8*19)(R3) -- MOVD F30, (8*20)(R3) -- MOVD F31, (8*21)(R3) -+ ADDV $(-23*8), R3 -+ MOVV R4, (1*8)(R3) // fn unsafe.Pointer -+ MOVV R5, (2*8)(R3) // a unsafe.Pointer -+ MOVV R7, (3*8)(R3) // ctxt uintptr -+ -+ SAVE_R22_TO_R31((4*8)) -+ SAVE_F24_TO_F31((14*8)) -+ MOVV R1, (22*8)(R3) - - // Initialize Go ABI environment - JAL runtime·load_g(SB) - - JAL runtime·cgocallback(SB) - -- MOVV (8*4)(R3), R23 -- MOVV (8*5)(R3), R24 -- MOVV (8*6)(R3), R25 -- MOVV (8*7)(R3), R26 -- MOVV (8*8)(R3), R27 -- MOVV (8*9)(R3), R28 -- MOVV (8*10)(R3), R29 -- MOVV (8*11)(R3), R30 -- MOVV (8*12)(R3), g -- MOVV (8*13)(R3), R1 -- MOVD (8*14)(R3), F24 -- MOVD (8*15)(R3), F25 -- MOVD (8*16)(R3), F26 -- MOVD (8*17)(R3), F27 -- MOVD (8*18)(R3), F28 -- MOVD (8*19)(R3), F29 -- MOVD (8*20)(R3), F30 -- MOVD (8*21)(R3), F31 -- ADDV $(8*22), R3 -+ RESTORE_R22_TO_R31((4*8)) -+ RESTORE_F24_TO_F31((14*8)) -+ MOVV (22*8)(R3), R1 -+ -+ ADDV $(23*8), R3 - - RET -diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s -index 4d00fd0ca3..053bdd7f52 100644 ---- a/src/runtime/sys_linux_loong64.s -+++ b/src/runtime/sys_linux_loong64.s -@@ -9,6 +9,7 @@ - #include "go_asm.h" - #include "go_tls.h" - #include "textflag.h" -+#include "cgo/abi_loong64.h" - - #define AT_FDCWD -100 - #define CLOCK_REALTIME 0 -@@ -413,18 +414,29 @@ TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 - JAL (R20) - RET - --TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$64 -+TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$182 -+ MOVW R4, (1*8)(R3) -+ MOVV R5, (2*8)(R3) -+ MOVV R6, (3*8)(R3) -+ -+ // Save callee-save registers in the case of signal forwarding. -+ // Please refer to https://golang.org/issue/31827 . -+ SAVE_R22_TO_R31((4*8)) -+ SAVE_F24_TO_F31((14*8)) -+ - // this might be called in external code context, - // where g is not set. -- MOVB runtime·iscgo(SB), R19 -- BEQ R19, 2(PC) -+ MOVB runtime·iscgo(SB), R4 -+ BEQ R4, 2(PC) - JAL runtime·load_g(SB) - -- MOVW R4, 8(R3) -- MOVV R5, 16(R3) -- MOVV R6, 24(R3) -- MOVV $runtime·sigtrampgo(SB), R19 -- JAL (R19) -+ MOVV $runtime·sigtrampgo(SB), R4 -+ JAL (R4) -+ -+ // Restore callee-save registers. -+ RESTORE_R22_TO_R31((4*8)) -+ RESTORE_F24_TO_F31((14*8)) -+ - RET - - TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0 --- -2.38.1 - diff --git a/0065-cmd-compiler-runtime-internal-atomic-Implementing-An.patch b/0015-cmd-compiler-runtime-internal-atomic-Implementing-An.patch similarity index 88% rename from 0065-cmd-compiler-runtime-internal-atomic-Implementing-An.patch rename to 0015-cmd-compiler-runtime-internal-atomic-Implementing-An.patch index 57fec4df00b9834ea660cd2b96b18fd92c6e1353..ccb452f0fec10db3d2cd7a0f364a3265d1f50f81 100644 --- a/0065-cmd-compiler-runtime-internal-atomic-Implementing-An.patch +++ b/0015-cmd-compiler-runtime-internal-atomic-Implementing-An.patch @@ -1,10 +1,10 @@ -From 6556d808f7e31d8b64c4fdb37cd8f543dcd2ee3e Mon Sep 17 00:00:00 2001 +From b9a8c32cd18ace66c2e3dda750cab21842231a37 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Thu, 15 Jun 2023 12:40:55 +0800 -Subject: [PATCH 03/30] cmd/compiler,runtime/internal/atomic: Implementing +Subject: [PATCH 15/51] cmd/compiler,runtime/internal/atomic: Implementing {And,Or}{32,8} using am{and,or}dbw on loong64 -Change-Id: I15a3adaf97a90deaf5fc2faf66e912431f20c852 +Change-Id: Ic5ce31d240ef04f09e9c00623b0a7aa799cd7bf4 --- src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go | 4 ++-- src/cmd/compile/internal/ssa/opGen.go | 4 ++-- @@ -12,7 +12,7 @@ Change-Id: I15a3adaf97a90deaf5fc2faf66e912431f20c852 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 8043ad2aa7..14ffb542cf 100644 +index 41cc431e8b..ce08346a4a 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -382,8 +382,8 @@ func init() { @@ -27,10 +27,10 @@ index 8043ad2aa7..14ffb542cf 100644 // atomic add. // *arg0 += arg1. arg2=mem. returns . diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 6ba5fe891a..ff0e1c6ca7 100644 +index 55a42ae782..fc735c48b5 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -24408,7 +24408,7 @@ var opcodeTable = [...]opInfo{ +@@ -24451,7 +24451,7 @@ var opcodeTable = [...]opInfo{ argLen: 3, faultOnNilArg0: true, hasSideEffects: true, @@ -39,7 +39,7 @@ index 6ba5fe891a..ff0e1c6ca7 100644 reg: regInfo{ inputs: []inputInfo{ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -@@ -24424,7 +24424,7 @@ var opcodeTable = [...]opInfo{ +@@ -24467,7 +24467,7 @@ var opcodeTable = [...]opInfo{ argLen: 3, faultOnNilArg0: true, hasSideEffects: true, @@ -49,7 +49,7 @@ index 6ba5fe891a..ff0e1c6ca7 100644 inputs: []inputInfo{ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 diff --git a/src/runtime/internal/atomic/atomic_loong64.s b/src/runtime/internal/atomic/atomic_loong64.s -index 531993e8b7..c36b603793 100644 +index 1ea85b1944..7eee52ddb8 100644 --- a/src/runtime/internal/atomic/atomic_loong64.s +++ b/src/runtime/internal/atomic/atomic_loong64.s @@ -191,7 +191,7 @@ TEXT ·Or8(SB), NOSPLIT, $0-9 diff --git a/0015-runtime-add-comment-for-sys_linux_loong64.patch b/0015-runtime-add-comment-for-sys_linux_loong64.patch deleted file mode 100644 index 783a9a670b4f8045d9dc1c7d8036f4ea1bc1ef11..0000000000000000000000000000000000000000 --- a/0015-runtime-add-comment-for-sys_linux_loong64.patch +++ /dev/null @@ -1,243 +0,0 @@ -From b17915a7a4e8c513641f9e4c27fb613165ec6f73 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Fri, 26 Aug 2022 14:19:06 +0800 -Subject: [PATCH 15/62] runtime: add comment for sys_linux_loong64 - -Change-Id: I617d6d788cb213c1405f81d9f689fd6846ee105a ---- - src/runtime/sys_linux_loong64.s | 31 +++++++++++++++++++++++++++++-- - 1 file changed, 29 insertions(+), 2 deletions(-) - -diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s -index 053bdd7f52..2a16b4f01d 100644 ---- a/src/runtime/sys_linux_loong64.s -+++ b/src/runtime/sys_linux_loong64.s -@@ -46,6 +46,7 @@ - #define SYS_timer_settime 110 - #define SYS_timer_delete 111 - -+// func exit(code int32) - TEXT runtime·exit(SB),NOSPLIT|NOFRAME,$0-4 - MOVW code+0(FP), R4 - MOVV $SYS_exit_group, R11 -@@ -65,6 +66,7 @@ TEXT runtime·exitThread(SB),NOSPLIT|NOFRAME,$0-8 - SYSCALL - JMP 0(PC) - -+// func open(name *byte, mode, perm int32) int32 - TEXT runtime·open(SB),NOSPLIT|NOFRAME,$0-20 - MOVW $AT_FDCWD, R4 // AT_FDCWD, so this acts like open - MOVV name+0(FP), R5 -@@ -78,6 +80,7 @@ TEXT runtime·open(SB),NOSPLIT|NOFRAME,$0-20 - MOVW R4, ret+16(FP) - RET - -+// func closefd(fd int32) int32 - TEXT runtime·closefd(SB),NOSPLIT|NOFRAME,$0-12 - MOVW fd+0(FP), R4 - MOVV $SYS_close, R11 -@@ -88,6 +91,7 @@ TEXT runtime·closefd(SB),NOSPLIT|NOFRAME,$0-12 - MOVW R4, ret+8(FP) - RET - -+// func write1(fd uintptr, p unsafe.Pointer, n int32) int32 - TEXT runtime·write1(SB),NOSPLIT|NOFRAME,$0-28 - MOVV fd+0(FP), R4 - MOVV p+8(FP), R5 -@@ -97,6 +101,7 @@ TEXT runtime·write1(SB),NOSPLIT|NOFRAME,$0-28 - MOVW R4, ret+24(FP) - RET - -+// func read(fd int32, p unsafe.Pointer, n int32) int32 - TEXT runtime·read(SB),NOSPLIT|NOFRAME,$0-28 - MOVW fd+0(FP), R4 - MOVV p+8(FP), R5 -@@ -115,6 +120,7 @@ TEXT runtime·pipe2(SB),NOSPLIT|NOFRAME,$0-20 - MOVW R4, errno+16(FP) - RET - -+// func usleep(usec uint32) - TEXT runtime·usleep(SB),NOSPLIT,$16-4 - MOVWU usec+0(FP), R6 - MOVV $1000, R4 -@@ -136,12 +142,14 @@ TEXT runtime·usleep(SB),NOSPLIT,$16-4 - SYSCALL - RET - -+// func gettid() uint32 - TEXT runtime·gettid(SB),NOSPLIT,$0-4 - MOVV $SYS_gettid, R11 - SYSCALL - MOVW R4, ret+0(FP) - RET - -+// func raise(sig uint32) - TEXT runtime·raise(SB),NOSPLIT|NOFRAME,$0 - MOVV $SYS_getpid, R11 - SYSCALL -@@ -155,6 +163,7 @@ TEXT runtime·raise(SB),NOSPLIT|NOFRAME,$0 - SYSCALL - RET - -+// func raiseproc(sig uint32) - TEXT runtime·raiseproc(SB),NOSPLIT|NOFRAME,$0 - MOVV $SYS_getpid, R11 - SYSCALL -@@ -164,12 +173,14 @@ TEXT runtime·raiseproc(SB),NOSPLIT|NOFRAME,$0 - SYSCALL - RET - -+// func getpid() int - TEXT ·getpid(SB),NOSPLIT|NOFRAME,$0-8 - MOVV $SYS_getpid, R11 - SYSCALL - MOVV R4, ret+0(FP) - RET - -+// func tgkill(tgid, tid, sig int) - TEXT ·tgkill(SB),NOSPLIT|NOFRAME,$0-24 - MOVV tgid+0(FP), R4 - MOVV tid+8(FP), R5 -@@ -178,6 +189,7 @@ TEXT ·tgkill(SB),NOSPLIT|NOFRAME,$0-24 - SYSCALL - RET - -+// func setitimer(mode int32, new, old *itimerval) - TEXT runtime·setitimer(SB),NOSPLIT|NOFRAME,$0-24 - MOVW mode+0(FP), R4 - MOVV new+8(FP), R5 -@@ -186,6 +198,7 @@ TEXT runtime·setitimer(SB),NOSPLIT|NOFRAME,$0-24 - SYSCALL - RET - -+// func timer_create(clockid int32, sevp *sigevent, timerid *int32) int32 - TEXT runtime·timer_create(SB),NOSPLIT,$0-28 - MOVW clockid+0(FP), R4 - MOVV sevp+8(FP), R5 -@@ -195,6 +208,7 @@ TEXT runtime·timer_create(SB),NOSPLIT,$0-28 - MOVW R4, ret+24(FP) - RET - -+// func timer_settime(timerid int32, flags int32, new, old *itimerspec) int32 - TEXT runtime·timer_settime(SB),NOSPLIT,$0-28 - MOVW timerid+0(FP), R4 - MOVW flags+4(FP), R5 -@@ -205,6 +219,7 @@ TEXT runtime·timer_settime(SB),NOSPLIT,$0-28 - MOVW R4, ret+24(FP) - RET - -+// func timer_delete(timerid int32) int32 - TEXT runtime·timer_delete(SB),NOSPLIT,$0-12 - MOVW timerid+0(FP), R4 - MOVV $SYS_timer_delete, R11 -@@ -212,6 +227,7 @@ TEXT runtime·timer_delete(SB),NOSPLIT,$0-12 - MOVW R4, ret+8(FP) - RET - -+// func mincore(addr unsafe.Pointer, n uintptr, dst *byte) int32 - TEXT runtime·mincore(SB),NOSPLIT|NOFRAME,$0-28 - MOVV addr+0(FP), R4 - MOVV n+8(FP), R5 -@@ -301,6 +317,7 @@ fallback: - SYSCALL - JMP finish - -+// func nanotime1() int64 - TEXT runtime·nanotime1(SB),NOSPLIT,$16-8 - MOVV R3, R23 // R23 is unchanged by C code - MOVV R3, R25 -@@ -384,6 +401,7 @@ fallback: - SYSCALL - JMP finish - -+// func rtsigprocmask(how int32, new, old *sigset, size int32) - TEXT runtime·rtsigprocmask(SB),NOSPLIT|NOFRAME,$0-28 - MOVW how+0(FP), R4 - MOVV new+8(FP), R5 -@@ -396,6 +414,7 @@ TEXT runtime·rtsigprocmask(SB),NOSPLIT|NOFRAME,$0-28 - MOVV R0, 0xf1(R0) // crash - RET - -+// func rt_sigaction(sig uintptr, new, old *sigactiont, size uintptr) int32 - TEXT runtime·rt_sigaction(SB),NOSPLIT|NOFRAME,$0-36 - MOVV sig+0(FP), R4 - MOVV new+8(FP), R5 -@@ -406,6 +425,7 @@ TEXT runtime·rt_sigaction(SB),NOSPLIT|NOFRAME,$0-36 - MOVW R4, ret+32(FP) - RET - -+// func sigfwd(fn uintptr, sig uint32, info *siginfo, ctx unsafe.Pointer) - TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 - MOVW sig+8(FP), R4 - MOVV info+16(FP), R5 -@@ -414,6 +434,7 @@ TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 - JAL (R20) - RET - -+// func sigtramp(signo, ureg, ctxt unsafe.Pointer) - TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$182 - MOVW R4, (1*8)(R3) - MOVV R5, (2*8)(R3) -@@ -439,9 +460,11 @@ TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$182 - - RET - -+// func cgoSigtramp() - TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0 - JMP runtime·sigtramp(SB) - -+// func mmap(addr unsafe.Pointer, n uintptr, prot, flags, fd int32, off uint32) (p unsafe.Pointer, err int) - TEXT runtime·mmap(SB),NOSPLIT|NOFRAME,$0 - MOVV addr+0(FP), R4 - MOVV n+8(FP), R5 -@@ -463,6 +486,7 @@ ok: - MOVV $0, err+40(FP) - RET - -+// func munmap(addr unsafe.Pointer, n uintptr) - TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 - MOVV addr+0(FP), R4 - MOVV n+8(FP), R5 -@@ -473,6 +497,7 @@ TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 - MOVV R0, 0xf3(R0) // crash - RET - -+// func madvise(addr unsafe.Pointer, n uintptr, flags int32) - TEXT runtime·madvise(SB),NOSPLIT|NOFRAME,$0 - MOVV addr+0(FP), R4 - MOVV n+8(FP), R5 -@@ -482,8 +507,7 @@ TEXT runtime·madvise(SB),NOSPLIT|NOFRAME,$0 - MOVW R4, ret+24(FP) - RET - --// int64 futex(int32 *uaddr, int32 op, int32 val, --// struct timespec *timeout, int32 *uaddr2, int32 val2); -+// func futex(addr unsafe.Pointer, op int32, val uint32, ts, addr2 unsafe.Pointer, val3 uint32) int32 - TEXT runtime·futex(SB),NOSPLIT|NOFRAME,$0 - MOVV addr+0(FP), R4 - MOVW op+8(FP), R5 -@@ -557,6 +581,7 @@ nog: - SYSCALL - JMP -3(PC) // keep exiting - -+// func sigaltstack(new, old *stackt) - TEXT runtime·sigaltstack(SB),NOSPLIT|NOFRAME,$0 - MOVV new+0(FP), R4 - MOVV old+8(FP), R5 -@@ -567,11 +592,13 @@ TEXT runtime·sigaltstack(SB),NOSPLIT|NOFRAME,$0 - MOVV R0, 0xf1(R0) // crash - RET - -+// func osyield() - TEXT runtime·osyield(SB),NOSPLIT|NOFRAME,$0 - MOVV $SYS_sched_yield, R11 - SYSCALL - RET - -+// func sched_getaffinity(pid, len uintptr, buf *uintptr) int32 - TEXT runtime·sched_getaffinity(SB),NOSPLIT|NOFRAME,$0 - MOVV pid+0(FP), R4 - MOVV len+8(FP), R5 --- -2.38.1 - diff --git a/0062-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch b/0016-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch similarity index 83% rename from 0062-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch rename to 0016-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch index 5e99a2acb1fac6c253db187609022d07b93a0496..38bc86b36f88dd4bbad33a82294f7dffdb82f6ea 100644 --- a/0062-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch +++ b/0016-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch @@ -1,7 +1,7 @@ -From 55c430fa956299a1056b79a0fe7da893f05a6364 Mon Sep 17 00:00:00 2001 +From bc400fff755f7c3fe853cf23a7e070a15b6259a9 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Mon, 8 May 2023 06:20:21 +0800 -Subject: [PATCH 62/62] cmd/internal/obj/loong64: remove the invalid plan9 +Subject: [PATCH 16/51] cmd/internal/obj/loong64: remove the invalid plan9 format of the BREAK instruction In the three formats corresponding to case 7 of the function asmout, BREAK actually @@ -34,7 +34,7 @@ index 288408b010..701515cf4c 100644 UNDEF // 00002a00 diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 2b505ad749..c2efe0eef1 100644 +index 638bd1139f..77eaa628e8 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go @@ -354,11 +354,6 @@ var optab = []Optab{ @@ -49,8 +49,8 @@ index 2b505ad749..c2efe0eef1 100644 {ARDTIMELW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, {ARDTIMEHW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, {ARDTIMED, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, -@@ -596,7 +591,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - v := pcAlignPadLength(p.Pc, alignedValue, c.ctxt) +@@ -601,7 +596,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + v := pcAlignPadLength(c.ctxt, p.Pc, alignedValue) for i = 0; i < int32(v/4); i++ { // emit ANOOP instruction by the padding size - c.ctxt.Arch.ByteOrder.PutUint32(bp, c.oprrr(ANOOP)) @@ -58,7 +58,7 @@ index 2b505ad749..c2efe0eef1 100644 bp = bp[4:] } continue -@@ -1160,6 +1155,7 @@ func buildop(ctxt *obj.Link) { +@@ -1165,6 +1160,7 @@ func buildop(ctxt *obj.Link) { case ASYSCALL: opset(ADBAR, r0) opset(ANOOP, r0) @@ -66,7 +66,7 @@ index 2b505ad749..c2efe0eef1 100644 case ACMPEQF: opset(ACMPGTF, r0) -@@ -1181,7 +1177,6 @@ func buildop(ctxt *obj.Link) { +@@ -1186,7 +1182,6 @@ func buildop(ctxt *obj.Link) { AMOVD, AMOVF, AMOVV, @@ -74,7 +74,7 @@ index 2b505ad749..c2efe0eef1 100644 ARFE, AJAL, AJMP, -@@ -1267,6 +1262,10 @@ func OP_IR(op uint32, i uint32, r2 uint32) uint32 { +@@ -1272,6 +1267,10 @@ func OP_IR(op uint32, i uint32, r2 uint32) uint32 { return op | (i&0xFFFFF)<<5 | (r2&0x1F)<<0 // ui20, rd5 } @@ -85,7 +85,7 @@ index 2b505ad749..c2efe0eef1 100644 // Encoding for the 'b' or 'bl' instruction. func OP_B_BL(op uint32, i uint32) uint32 { return op | ((i & 0xFFFF) << 10) | ((i >> 16) & 0x3FF) -@@ -1332,7 +1331,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1337,7 +1336,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { o1 = OP_12IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg)) case 5: // syscall @@ -94,7 +94,7 @@ index 2b505ad749..c2efe0eef1 100644 case 6: // beq r1,[r2],sbra v := int32(0) -@@ -1476,7 +1475,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1481,7 +1480,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { } else { // ATNE o1 = OP_16IRR(c.opirr(ABEQ), uint32(2), uint32(r), uint32(p.To.Reg)) } @@ -103,7 +103,7 @@ index 2b505ad749..c2efe0eef1 100644 case 16: // sll $c,[r1],r2 v := c.regoff(&p.From) -@@ -1647,7 +1646,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1652,7 +1651,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { o1 = OP_RR(a, uint32(p.From.Reg), uint32(p.To.Reg)) case 49: // undef @@ -112,7 +112,7 @@ index 2b505ad749..c2efe0eef1 100644 // relocation operations case 50: // mov r,addr ==> pcalau12i + sw -@@ -1965,10 +1964,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 { +@@ -1972,10 +1971,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 { case AJAL: return (0x13 << 26) | 1 // jirl r1, rj, 0 @@ -123,7 +123,7 @@ index 2b505ad749..c2efe0eef1 100644 case ADIVF: return 0x20d << 15 case ADIVD: -@@ -2042,12 +2037,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 { +@@ -2049,12 +2044,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 { return 0x4511 << 10 case ASQRTD: return 0x4512 << 10 @@ -136,7 +136,7 @@ index 2b505ad749..c2efe0eef1 100644 } if a < 0 { -@@ -2076,6 +2065,24 @@ func (c *ctxt0) oprr(a obj.As) uint32 { +@@ -2083,6 +2072,24 @@ func (c *ctxt0) oprr(a obj.As) uint32 { return 0 } @@ -161,7 +161,7 @@ index 2b505ad749..c2efe0eef1 100644 func (c *ctxt0) opir(a obj.As) uint32 { switch a { case ALU12IW: -@@ -2172,10 +2179,6 @@ func (c *ctxt0) opirr(a obj.As) uint32 { +@@ -2179,10 +2186,6 @@ func (c *ctxt0) opirr(a obj.As) uint32 { return 0x0be << 22 case AMOVVR: return 0x0bf << 22 diff --git a/0016-runtime-mark-morestack_noctxt-SPWRITE-for-linux-loon.patch b/0016-runtime-mark-morestack_noctxt-SPWRITE-for-linux-loon.patch deleted file mode 100644 index e3170231e55011aab0bd416182f4350034bd51e4..0000000000000000000000000000000000000000 --- a/0016-runtime-mark-morestack_noctxt-SPWRITE-for-linux-loon.patch +++ /dev/null @@ -1,36 +0,0 @@ -From db9cbb5d295846ee7da8f33106e208f4ed90998b Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Fri, 4 Nov 2022 13:27:23 +0800 -Subject: [PATCH 16/62] runtime: mark morestack_noctxt SPWRITE for - linux/loong64 - -ref. CL 425396 - -Updates #54332. - -Change-Id: I1a235b0cca4dbf79cf61cf5f40b594fc2d940857 ---- - src/runtime/asm_loong64.s | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index b934fab1ca..3921091fea 100644 ---- a/src/runtime/asm_loong64.s -+++ b/src/runtime/asm_loong64.s -@@ -261,6 +261,13 @@ TEXT runtime·morestack(SB),NOSPLIT|NOFRAME,$0-0 - UNDEF - - TEXT runtime·morestack_noctxt(SB),NOSPLIT|NOFRAME,$0-0 -+ // Force SPWRITE. This function doesn't actually write SP, -+ // but it is called with a special calling convention where -+ // the caller doesn't save LR on stack but passes it as a -+ // register (R5), and the unwinder currently doesn't understand. -+ // Make it SPWRITE to stop unwinding. (See issue 54332) -+ MOVV R3, R3 -+ - MOVV R0, REGCTXT - JMP runtime·morestack(SB) - --- -2.38.1 - diff --git a/0017-cmd-internal-obj-loong64-add-the-PCALAU12I-instructi.patch b/0017-cmd-internal-obj-loong64-add-the-PCALAU12I-instructi.patch deleted file mode 100644 index a20e7073dc6a5227a90fd82368bc198bf2dfb9c4..0000000000000000000000000000000000000000 --- a/0017-cmd-internal-obj-loong64-add-the-PCALAU12I-instructi.patch +++ /dev/null @@ -1,62 +0,0 @@ -From fd0d94c6691299f6abba31407952e6c1e88b30ee Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Sat, 3 Dec 2022 20:57:52 +0800 -Subject: [PATCH 17/62] cmd/internal/obj/loong64: add the PCALAU12I instruction - for reloc use - -The LoongArch ELF psABI v2.00 revamped the relocation design, largely -moving to using the `pcalau12i + addi/ld/st` pair for PC-relative -addressing within +/- 32 bits. The "pcala" in `pcalau12i` stands for -"PC-aligned add"; the instruction's semantics is actually the same as -arm64's `adrp`. - -Add support for emitting this instruction as part of the relevant -addressing ops, for use with new reloc types later. - -Change-Id: Ic1747cd9745aad0d1abb9bd78400cd5ff5978bc8 ---- - src/cmd/internal/obj/loong64/a.out.go | 1 + - src/cmd/internal/obj/loong64/anames.go | 1 + - src/cmd/internal/obj/loong64/asm.go | 2 ++ - 3 files changed, 4 insertions(+) - -diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go -index 10cf396669..e7ac592b8b 100644 ---- a/src/cmd/internal/obj/loong64/a.out.go -+++ b/src/cmd/internal/obj/loong64/a.out.go -@@ -265,6 +265,7 @@ const ( - ALU12IW - ALU32ID - ALU52ID -+ APCALAU12I - APCADDU12I - AJIRL - ABGE -diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go -index eb13da20c3..f61756e7a8 100644 ---- a/src/cmd/internal/obj/loong64/anames.go -+++ b/src/cmd/internal/obj/loong64/anames.go -@@ -33,6 +33,7 @@ var Anames = []string{ - "LU12IW", - "LU32ID", - "LU52ID", -+ "PCALAU12I", - "PCADDU12I", - "JIRL", - "BGE", -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 02e44ee0a1..f4311c4c07 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1847,6 +1847,8 @@ func (c *ctxt0) opir(a obj.As) uint32 { - return 0x0a << 25 - case ALU32ID: - return 0x0b << 25 -+ case APCALAU12I: -+ return 0x0d << 25 - case APCADDU12I: - return 0x0e << 25 - } --- -2.38.1 - diff --git a/0066-cmd-internal-obj-loong64-correct-the-instruction-for.patch b/0017-cmd-internal-obj-loong64-correct-the-instruction-for.patch similarity index 70% rename from 0066-cmd-internal-obj-loong64-correct-the-instruction-for.patch rename to 0017-cmd-internal-obj-loong64-correct-the-instruction-for.patch index a8409f171b77e735a392e0ef064182780ee3a871..11e10591a3d7ef0d1a65f8e4e31097d0207cfae6 100644 --- a/0066-cmd-internal-obj-loong64-correct-the-instruction-for.patch +++ b/0017-cmd-internal-obj-loong64-correct-the-instruction-for.patch @@ -1,21 +1,20 @@ -From aaf5a5199e2f2babf26c0ed0445a67beefdca60f Mon Sep 17 00:00:00 2001 +From 3e403151f2f8aeec8dfa69b49f0e5380194ada87 Mon Sep 17 00:00:00 2001 From: chenguoqi -Date: Thu, 27 Jul 2023 15:57:16 +0800 -Subject: [PATCH 04/30] cmd/internal/obj/loong64: correct the instruction +Date: Thu, 27 Jul 2023 11:01:16 +0800 +Subject: [PATCH 17/51] cmd/internal/obj/loong64: correct the instruction format of plan9 assembly NOOP -Signed-off-by: chenguoqi -Change-Id: I54bcf1b6a75715a351471195096695ab8e529bd9 +Change-Id: Icbaa925775d8fb8978a6e0cf7caa1f4be8ebf7f4 --- src/cmd/internal/obj/loong64/asm.go | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index c2efe0eef1..70a804f7ea 100644 +index 77eaa628e8..c6c28002d1 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go -@@ -591,7 +591,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - v := pcAlignPadLength(p.Pc, alignedValue, c.ctxt) +@@ -596,7 +596,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + v := pcAlignPadLength(c.ctxt, p.Pc, alignedValue) for i = 0; i < int32(v/4); i++ { // emit ANOOP instruction by the padding size - c.ctxt.Arch.ByteOrder.PutUint32(bp, c.opi(ANOOP)) @@ -23,7 +22,7 @@ index c2efe0eef1..70a804f7ea 100644 bp = bp[4:] } continue -@@ -1331,7 +1331,13 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1336,7 +1336,13 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { o1 = OP_12IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg)) case 5: // syscall @@ -38,7 +37,7 @@ index c2efe0eef1..70a804f7ea 100644 case 6: // beq r1,[r2],sbra v := int32(0) -@@ -2065,6 +2071,18 @@ func (c *ctxt0) oprr(a obj.As) uint32 { +@@ -2072,6 +2078,18 @@ func (c *ctxt0) oprr(a obj.As) uint32 { return 0 } @@ -57,7 +56,7 @@ index c2efe0eef1..70a804f7ea 100644 func (c *ctxt0) opi(a obj.As) uint32 { switch a { case ASYSCALL: -@@ -2073,12 +2091,9 @@ func (c *ctxt0) opi(a obj.As) uint32 { +@@ -2080,12 +2098,9 @@ func (c *ctxt0) opi(a obj.As) uint32 { return 0x54 << 15 case ADBAR: return 0x70e4 << 15 diff --git a/0018-cmd-internal-obj-loong64-cmd-link-internal-loong64-s.patch b/0018-cmd-internal-obj-loong64-cmd-link-internal-loong64-s.patch deleted file mode 100644 index 44c8dd28e5c13e5640005f15b13318ab479de6d4..0000000000000000000000000000000000000000 --- a/0018-cmd-internal-obj-loong64-cmd-link-internal-loong64-s.patch +++ /dev/null @@ -1,316 +0,0 @@ -From e51fac967c418dda93dbc7c8b057252ef4cfa29e Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Sat, 3 Dec 2022 21:16:49 +0800 -Subject: [PATCH 18/62] cmd/internal/obj/loong64, cmd/link/internal/loong64: - switch to LoongArch ELF psABI v2 relocs - -The LoongArch ELF psABI v2 [1] relocs are vastly simplified from the v1 -which involved a stack machine for computing the reloc values, but the -details of PC-relative addressing are changed as well. Specifically, the -`pcaddu12i` instruction is substituted with the `pcalau12i`, which has -the same semantics as the arm64's `adrp` -- meaning the lower bits of a -symbol's address now have to be absolute and not PC-relative. However, -the little bit of added complexity apart, the obvious advantage is that -only 1 reloc needs to be emitted for every kind of external reloc we -care about, and no open-coded stack ops has to remain any more. - -[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html - -Change-Id: I5c13bc710eaf58293a32e930dd33feff2ef14c28 ---- - .../asm/internal/asm/testdata/loong64enc2.s | 38 ++--- - src/cmd/internal/obj/loong64/asm.go | 10 +- - src/cmd/link/internal/ld/elf.go | 2 +- - src/cmd/link/internal/loong64/asm.go | 136 ++++++------------ - 4 files changed, 68 insertions(+), 118 deletions(-) - -diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc2.s b/src/cmd/asm/internal/asm/testdata/loong64enc2.s -index 3b5e3cb81a..00768365b6 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64enc2.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64enc2.s -@@ -61,22 +61,22 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 - XOR $-1, R4 // 1efcbf0284f81500 - MOVH R4, R5 // 85c04000a5c04800 - -- // relocation instructions -- MOVW R4, name(SB) // 1e00001cc4038029 -- MOVWU R4, name(SB) // 1e00001cc4038029 -- MOVV R4, name(SB) // 1e00001cc403c029 -- MOVB R4, name(SB) // 1e00001cc4030029 -- MOVBU R4, name(SB) // 1e00001cc4030029 -- MOVF F4, name(SB) // 1e00001cc403402b -- MOVD F4, name(SB) // 1e00001cc403c02b -- MOVW name(SB), R4 // 1e00001cc4038028 -- MOVWU name(SB), R4 // 1e00001cc403802a -- MOVV name(SB), R4 // 1e00001cc403c028 -- MOVB name(SB), R4 // 1e00001cc4030028 -- MOVBU name(SB), R4 // 1e00001cc403002a -- MOVF name(SB), F4 // 1e00001cc403002b -- MOVD name(SB), F4 // 1e00001cc403802b -- MOVH R4, name(SB) // 1e00001cc4034029 -- MOVH name(SB), R4 // 1e00001cc4034028 -- MOVHU R4, name(SB) // 1e00001cc4034029 -- MOVHU name(SB), R4 // 1e00001cc403402a -+ // relocation instructions -+ MOVW R4, name(SB) // 1e00001ac4038029 -+ MOVWU R4, name(SB) // 1e00001ac4038029 -+ MOVV R4, name(SB) // 1e00001ac403c029 -+ MOVB R4, name(SB) // 1e00001ac4030029 -+ MOVBU R4, name(SB) // 1e00001ac4030029 -+ MOVF F4, name(SB) // 1e00001ac403402b -+ MOVD F4, name(SB) // 1e00001ac403c02b -+ MOVW name(SB), R4 // 1e00001ac4038028 -+ MOVWU name(SB), R4 // 1e00001ac403802a -+ MOVV name(SB), R4 // 1e00001ac403c028 -+ MOVB name(SB), R4 // 1e00001ac4030028 -+ MOVBU name(SB), R4 // 1e00001ac403002a -+ MOVF name(SB), F4 // 1e00001ac403002b -+ MOVD name(SB), F4 // 1e00001ac403802b -+ MOVH R4, name(SB) // 1e00001ac4034029 -+ MOVH name(SB), R4 // 1e00001ac4034028 -+ MOVHU R4, name(SB) // 1e00001ac4034029 -+ MOVHU name(SB), R4 // 1e00001ac403402a -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index f4311c4c07..d3c34def73 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1485,8 +1485,8 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - o1 = c.oprrr(ABREAK) - - // relocation operations -- case 50: // mov r,addr ==> pcaddu12i + sw -- o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP)) -+ case 50: // mov r,addr ==> pcalau12i + sw -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) - rel := obj.Addrel(c.cursym) - rel.Off = int32(c.pc) - rel.Siz = 4 -@@ -1502,8 +1502,8 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - rel2.Add = p.To.Offset - rel2.Type = objabi.R_ADDRLOONG64 - -- case 51: // mov addr,r ==> pcaddu12i + lw -- o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP)) -+ case 51: // mov addr,r ==> pcalau12i + lw -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) - rel := obj.Addrel(c.cursym) - rel.Off = int32(c.pc) - rel.Siz = 4 -@@ -1521,7 +1521,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - case 52: // mov $lext, r - // NOTE: this case does not use REGTMP. If it ever does, - // remove the NOTUSETMP flag in optab. -- o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(p.To.Reg)) -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(p.To.Reg)) - rel := obj.Addrel(c.cursym) - rel.Off = int32(c.pc) - rel.Siz = 4 -diff --git a/src/cmd/link/internal/ld/elf.go b/src/cmd/link/internal/ld/elf.go -index a1ae7eab57..2931d94c98 100644 ---- a/src/cmd/link/internal/ld/elf.go -+++ b/src/cmd/link/internal/ld/elf.go -@@ -229,7 +229,7 @@ func Elfinit(ctxt *Link) { - ehdr.Flags = 0x20000004 /* MIPS 3 CPIC */ - } - if ctxt.Arch.Family == sys.Loong64 { -- ehdr.Flags = 0x3 /* LoongArch lp64d */ -+ ehdr.Flags = 0x43 /* LoongArch ABI v1, lp64d */ - } - if ctxt.Arch.Family == sys.RISCV64 { - ehdr.Flags = 0x4 /* RISCV Float ABI Double */ -diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go -index 0eb3a813b2..e9cf07023f 100644 ---- a/src/cmd/link/internal/loong64/asm.go -+++ b/src/cmd/link/internal/loong64/asm.go -@@ -46,100 +46,28 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, - } - case objabi.R_ADDRLOONG64TLS: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_TPREL) | uint64(elfsym)<<32) -+ out.Write64(uint64(elf.R_LARCH_TLS_LE_LO12) | uint64(elfsym)<<32) - out.Write64(uint64(r.Xadd)) - -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) -- out.Write64(uint64(0xfff)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_AND)) -- out.Write64(uint64(0x0)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_POP_32_U_10_12)) -- out.Write64(uint64(0x0)) -- - case objabi.R_ADDRLOONG64TLSU: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_TPREL) | uint64(elfsym)<<32) -+ out.Write64(uint64(elf.R_LARCH_TLS_LE_HI20) | uint64(elfsym)<<32) - out.Write64(uint64(r.Xadd)) - -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) -- out.Write64(uint64(0xc)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_SR)) -- out.Write64(uint64(0x0)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_5_20) | uint64(0)<<32) -- out.Write64(uint64(0x0)) -- - case objabi.R_CALLLOONG64: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PLT_PCREL) | uint64(elfsym)<<32) -+ out.Write64(uint64(elf.R_LARCH_B26) | uint64(elfsym)<<32) - out.Write64(uint64(r.Xadd)) - -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_0_10_10_16_S2)) -- out.Write64(uint64(0x0)) -- // The pcaddu12i + addi.d instructions is used to obtain address of a symbol on Loong64. -- // The low 12-bit of the symbol address need to be added. The addi.d instruction have -- // signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced -- // to do sign extending from 12 bits. The 0x804 is 0x800 + 4, 4 is instruction bit -- // width on Loong64 and is used to correct the PC of the addi.d instruction. - case objabi.R_ADDRLOONG64: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32) -- out.Write64(uint64(r.Xadd + 0x4)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32) -- out.Write64(uint64(r.Xadd + 0x804)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) -- out.Write64(uint64(0xc)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_SR)) -- out.Write64(uint64(0x0)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) -- out.Write64(uint64(0xc)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_SL)) -- out.Write64(uint64(0x0)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_SUB)) -- out.Write64(uint64(0x0)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_10_12)) -- out.Write64(uint64(0x0)) -+ out.Write64(uint64(elf.R_LARCH_PCALA_LO12) | uint64(elfsym)<<32) -+ out.Write64(uint64(r.Xadd)) - - case objabi.R_ADDRLOONG64U: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32) -- out.Write64(uint64(r.Xadd + 0x800)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) -- out.Write64(uint64(0xc)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_SR)) -- out.Write64(uint64(0x0)) -- -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_5_20) | uint64(0)<<32) -- out.Write64(uint64(0x0)) -+ out.Write64(uint64(elf.R_LARCH_PCALA_HI20) | uint64(elfsym)<<32) -+ out.Write64(uint64(r.Xadd)) - } - - return true -@@ -156,7 +84,6 @@ func machoreloc1(*sys.Arch, *ld.OutBuf, *loader.Loader, loader.Sym, loader.ExtRe - func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loader.Reloc, s loader.Sym, val int64) (o int64, nExtReloc int, ok bool) { - rs := r.Sym() - if target.IsExternal() { -- nExtReloc := 0 - switch r.Type() { - default: - return val, 0, false -@@ -168,20 +95,12 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade - if rst != sym.SHOSTOBJ && rst != sym.SDYNIMPORT && ldr.SymSect(rs) == nil { - ldr.Errorf(s, "missing section for %s", ldr.SymName(rs)) - } -- nExtReloc = 8 // need 8 ELF relocations. see elfreloc1 -- if r.Type() == objabi.R_ADDRLOONG64U { -- nExtReloc = 4 -- } -- return val, nExtReloc, true -+ return val, 1, true - case objabi.R_ADDRLOONG64TLS, - objabi.R_ADDRLOONG64TLSU, - objabi.R_CALLLOONG64, - objabi.R_JMPLOONG64: -- nExtReloc = 4 -- if r.Type() == objabi.R_CALLLOONG64 || r.Type() == objabi.R_JMPLOONG64 { -- nExtReloc = 2 -- } -- return val, nExtReloc, true -+ return val, 1, true - } - } - -@@ -196,11 +115,11 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade - case objabi.R_ADDRLOONG64, - objabi.R_ADDRLOONG64U: - pc := ldr.SymValue(s) + int64(r.Off()) -- t := ldr.SymAddr(rs) + r.Add() - pc -+ t := calculatePCAlignedReloc(r.Type(), ldr.SymAddr(rs)+r.Add(), pc) - if r.Type() == objabi.R_ADDRLOONG64 { -- return int64(val&0xffc003ff | (((t + 4 - ((t + 4 + 1<<11) >> 12 << 12)) << 10) & 0x3ffc00)), noExtReloc, isOk -+ return int64(val&0xffc003ff | (t << 10)), noExtReloc, isOk - } -- return int64(val&0xfe00001f | (((t + 1<<11) >> 12 << 5) & 0x1ffffe0)), noExtReloc, isOk -+ return int64(val&0xfe00001f | (t << 5)), noExtReloc, isOk - case objabi.R_ADDRLOONG64TLS, - objabi.R_ADDRLOONG64TLSU: - t := ldr.SymAddr(rs) + r.Add() -@@ -238,3 +157,34 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy - } - return loader.ExtReloc{}, false - } -+ -+func isRequestingLowPageBits(t objabi.RelocType) bool { -+ switch t { -+ case objabi.R_ADDRLOONG64: -+ return true -+ } -+ return false -+} -+ -+// Calculates the value to put into the immediate slot, according to the -+// desired relocation type, target and PC. -+// The value to use varies based on the reloc type, because of the arm64-like -+// design of the LoongArch ELF psABI v2 relocs. Namely, the absolute low bits of -+// the target are to be used for the low part, while the page-aligned offset is -+// to be used for the higher part. A "page" here is not related to the system's -+// actual page size, but rather a fixed 12-bit range, just like the semantics of -+// arm64's adrp. -+func calculatePCAlignedReloc(t objabi.RelocType, tgt int64, pc int64) int64 { -+ if isRequestingLowPageBits(t) { -+ // corresponding immediate field is 12 bits wide -+ return tgt & 0xfff -+ } -+ -+ pageDelta := (tgt >> 12) - (pc >> 12) -+ if tgt&0xfff >= 0x800 { -+ // adjust for sign-extended addition of the low bits -+ pageDelta += 1 -+ } -+ // corresponding immediate field is 20 bits wide -+ return pageDelta & 0xfffff -+} --- -2.38.1 - diff --git a/0067-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch b/0018-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch similarity index 59% rename from 0067-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch rename to 0018-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch index 58790eb4d263c0d41aae4693aa8cacf29570b154..ee279081714536578fb3db4c867cf6fda08855e2 100644 --- a/0067-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch +++ b/0018-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch @@ -1,7 +1,7 @@ -From a4221e4ce2563eceb06d9b2d1eccf1430f0282ad Mon Sep 17 00:00:00 2001 -From: chenguoqi -Date: Thu, 17 Aug 2023 08:35:15 +0800 -Subject: [PATCH 05/30] cmd/internal/obj/loong64: recheck jump offset boundary +From 17adab69b89265c9d24cb454afb66430e58b6533 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 16 Aug 2023 02:09:49 +0800 +Subject: [PATCH 18/51] cmd/internal/obj/loong64: recheck jump offset boundary after auto-aligning loop heads After the alignment of the loop header is performed, the offset of the checked @@ -16,37 +16,47 @@ Fixes #61819 Change-Id: Ica4c4ade43bf106c7035a1c02b89d3347a414b41 --- - src/cmd/internal/obj/loong64/asm.go | 32 ++++++++++++++++++----------- - 1 file changed, 20 insertions(+), 12 deletions(-) + src/cmd/internal/obj/loong64/asm.go | 30 +++++++++++++++++++---------- + 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 70a804f7ea..34b0ff94e4 100644 +index c6c28002d1..74ee2b6cea 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go -@@ -495,18 +495,14 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - * generate extra passes putting branches - * around jmps to fix. this is rare. - */ +@@ -491,11 +491,8 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + } + + // Run these passes until convergence. - bflag := 1 -- - var otxt int64 - var q *obj.Prog - iters := 0 - for bflag != 0 { +- bflag = 0 + for { + rescan := false - iters++ - if iters > 200 { - ctxt.Diag("layout pass doesn't converge") - break - } -- bflag = 0 pc = 0 prev := c.cursym.Func().Text for p = prev.Link; p != nil; prev, p = p, p.Link { -@@ -515,9 +511,16 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -510,7 +507,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + // because pc will be adjusted if padding happens. + if p.Mark&branchLoopHead != 0 && pc&(loopAlign-1) != 0 && + !(prev.As == obj.APCALIGN && prev.From.Offset >= loopAlign) { +- q = c.newprog() ++ q := c.newprog() + prev.Link = q + q.Link = p + q.Pc = pc +@@ -526,6 +523,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + // since this loop iteration is for p. + pc += int64(pcAlignPadLength(ctxt, pc, loopAlign)) + p.Pc = pc ++ rescan = true + } // very large conditional branches +@@ -535,9 +533,16 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + // generate extra passes putting branches + // around jmps to fix. this is rare. if o.type_ == 6 && p.To.Target() != nil { - otxt = p.To.Target().Pc - pc - if otxt < -(1<<17)+10 || otxt >= (1<<17)-10 { @@ -64,7 +74,7 @@ index 70a804f7ea..34b0ff94e4 100644 q.Link = p.Link p.Link = q q.As = AJMP -@@ -532,14 +535,14 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -552,7 +557,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { q.Pos = p.Pos q.To.Type = obj.TYPE_BRANCH q.To.SetTarget(q.Link.Link) @@ -73,24 +83,7 @@ index 70a804f7ea..34b0ff94e4 100644 } } - // loop heads that need padding - // prepend a PCALIGN $16 to such progs - if p.Mark&branchLoopHead != 0 && pc&(loopAlign-1) != 0 { -- q = c.newprog() -+ q := c.newprog() - prev.Link = q - q.Link = p - q.As = obj.APCALIGN -@@ -548,7 +551,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - // don't associate the synthesized PCALIGN - // with the original source position - // q.Pos = p.Pos -- bflag = 1 -+ rescan = true - } - - m = int(o.size) -@@ -569,7 +572,12 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -574,7 +579,12 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { } c.cursym.Size = pc diff --git a/0068-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch b/0019-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch similarity index 52% rename from 0068-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch rename to 0019-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch index ce5b03733c0227bd37595e0b1888c3b014dcd489..ab43c8d1b9d30e6d04ade9360fbd20afc423a37f 100644 --- a/0068-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch +++ b/0019-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch @@ -1,7 +1,7 @@ -From 89943b95e053ed6e8adcbf0cd9e668608b33cdc9 Mon Sep 17 00:00:00 2001 +From f55a403e2b1195958d950cda6111982d3c474f9e Mon Sep 17 00:00:00 2001 From: limeidan -Date: Fri, 8 Sep 2023 00:37:17 +0800 -Subject: [PATCH 06/30] cmd/link/internal/loong64: correct the glibc dynamic +Date: Wed, 6 Sep 2023 17:09:35 +0800 +Subject: [PATCH 19/51] cmd/link/internal/loong64: correct the glibc dynamic linker path. Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html#_program_interpreter_path @@ -12,18 +12,18 @@ Change-Id: Ic2598110cc091362cb09f877b6b86433cacf32c6 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cmd/link/internal/loong64/obj.go b/src/cmd/link/internal/loong64/obj.go -index 4865c695b9..c82504176e 100644 +index c3f6ed9386..fd193a2445 100644 --- a/src/cmd/link/internal/loong64/obj.go +++ b/src/cmd/link/internal/loong64/obj.go -@@ -31,7 +31,7 @@ func Init() (*sys.Arch, ld.Arch) { - Machoreloc1: machoreloc1, +@@ -29,7 +29,7 @@ func Init() (*sys.Arch, ld.Arch) { Gentext: gentext, -- Linuxdynld: "/lib64/ld.so.1", -+ Linuxdynld: "/lib64/ld-linux-loongarch-lp64d.so.1", - LinuxdynldMusl: "/lib64/ld-musl-loongarch.so.1", - Freebsddynld: "XXX", - Openbsddynld: "XXX", + ELF: ld.ELFArch{ +- Linuxdynld: "/lib64/ld.so.1", ++ Linuxdynld: "/lib64/ld-linux-loongarch-lp64d.so.1", + LinuxdynldMusl: "/lib64/ld-musl-loongarch.so.1", + Freebsddynld: "XXX", + Openbsddynld: "XXX", -- 2.38.1 diff --git a/0019-runtime-add-support-for-buildmode-c-shared-on-loong6.patch b/0019-runtime-add-support-for-buildmode-c-shared-on-loong6.patch deleted file mode 100644 index 192b62b2f426d4f63e5e0b7f98ba47257fcf4ed4..0000000000000000000000000000000000000000 --- a/0019-runtime-add-support-for-buildmode-c-shared-on-loong6.patch +++ /dev/null @@ -1,147 +0,0 @@ -From 17e47970aefce364c926605006a0ba2b15ea7b3b Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Thu, 25 Aug 2022 11:07:25 +0800 -Subject: [PATCH 19/62] runtime: add support for --buildmode=c-shared on - loong64 - -These c-shared related CLs are follow up of CLs 455016, 455017, 455018. Here we -follow the LoongArch ELF psABI v2 standard, which requires the support of the -PCALAU12I instruction. - -Updates #53301 - -Change-Id: I7f1ddbf3b2470d610f12069d147aa9b3a6a96f32 ---- - src/runtime/rt0_linux_loong64.s | 51 +++++++++++++++++++++++++++++++++ - src/runtime/tls_loong64.s | 37 ++++++++++++++++++++++-- - 2 files changed, 86 insertions(+), 2 deletions(-) - -diff --git a/src/runtime/rt0_linux_loong64.s b/src/runtime/rt0_linux_loong64.s -index b9aaa510e1..2075a0b590 100644 ---- a/src/runtime/rt0_linux_loong64.s -+++ b/src/runtime/rt0_linux_loong64.s -@@ -3,6 +3,7 @@ - // license that can be found in the LICENSE file. - - #include "textflag.h" -+#include "cgo/abi_loong64.h" - - TEXT _rt0_loong64_linux(SB),NOSPLIT|NOFRAME,$0 - // In a statically linked binary, the stack contains argc, -@@ -13,6 +14,56 @@ TEXT _rt0_loong64_linux(SB),NOSPLIT|NOFRAME,$0 - ADDV $8, R3, R5 // argv - JMP main(SB) - -+// When building with -buildmode=c-shared, this symbol is called when the shared -+// library is loaded. -+TEXT _rt0_loong64_linux_lib(SB),NOSPLIT,$232 -+ // Preserve callee-save registers. -+ SAVE_R22_TO_R31(24) -+ SAVE_F24_TO_F31(104) -+ -+ // Initialize g as null in case of using g later e.g. sigaction in cgo_sigaction.go -+ MOVV R0, g -+ -+ MOVV R4, _rt0_loong64_linux_lib_argc<>(SB) -+ MOVV R5, _rt0_loong64_linux_lib_argv<>(SB) -+ -+ // Synchronous initialization. -+ MOVV $runtime·libpreinit(SB), R19 -+ JAL (R19) -+ -+ // Create a new thread to do the runtime initialization and return. -+ MOVV _cgo_sys_thread_create(SB), R19 -+ BEQ R19, nocgo -+ MOVV $_rt0_loong64_linux_lib_go(SB), R4 -+ MOVV $0, R5 -+ JAL (R19) -+ JMP restore -+ -+nocgo: -+ MOVV $0x800000, R4 // stacksize = 8192KB -+ MOVV $_rt0_loong64_linux_lib_go(SB), R5 -+ MOVV R4, 8(R3) -+ MOVV R5, 16(R3) -+ MOVV $runtime·newosproc0(SB), R19 -+ JAL (R19) -+ -+restore: -+ // Restore callee-save registers. -+ RESTORE_R22_TO_R31(24) -+ RESTORE_F24_TO_F31(104) -+ RET -+ -+TEXT _rt0_loong64_linux_lib_go(SB),NOSPLIT,$0 -+ MOVV _rt0_loong64_linux_lib_argc<>(SB), R4 -+ MOVV _rt0_loong64_linux_lib_argv<>(SB), R5 -+ MOVV $runtime·rt0_go(SB),R19 -+ JMP (R19) -+ -+DATA _rt0_loong64_linux_lib_argc<>(SB)/8, $0 -+GLOBL _rt0_loong64_linux_lib_argc<>(SB),NOPTR, $8 -+DATA _rt0_loong64_linux_lib_argv<>(SB)/8, $0 -+GLOBL _rt0_loong64_linux_lib_argv<>(SB),NOPTR, $8 -+ - TEXT main(SB),NOSPLIT|NOFRAME,$0 - // in external linking, glibc jumps to main with argc in R4 - // and argv in R5 -diff --git a/src/runtime/tls_loong64.s b/src/runtime/tls_loong64.s -index bc3be3da1b..100f28b5ca 100644 ---- a/src/runtime/tls_loong64.s -+++ b/src/runtime/tls_loong64.s -@@ -10,17 +10,50 @@ - // If !iscgo, this is a no-op. - // - // NOTE: mcall() assumes this clobbers only R30 (REGTMP). --TEXT runtime·save_g(SB),NOSPLIT|NOFRAME,$0-0 -+TEXT runtime·save_g(SB),NOSPLIT,$0-0 - MOVB runtime·iscgo(SB), R30 - BEQ R30, nocgo - -+ // here use the func __tls_get_addr to get the address of tls_g, which clobbers these regs below. -+ ADDV $-56, R3 -+ MOVV R1, 0(R3) -+ MOVV R4, 8(R3) -+ MOVV R5, 16(R3) -+ MOVV R6, 24(R3) -+ MOVV R12, 32(R3) -+ MOVV R13, 40(R3) -+ MOVV R30, 48(R3) - MOVV g, runtime·tls_g(SB) -+ MOVV 0(R3), R1 -+ MOVV 8(R3), R4 -+ MOVV 16(R3), R5 -+ MOVV 24(R3), R6 -+ MOVV 32(R3), R12 -+ MOVV 40(R3), R13 -+ MOVV 48(R3), R30 -+ ADDV $56, R3 - - nocgo: - RET - --TEXT runtime·load_g(SB),NOSPLIT|NOFRAME,$0-0 -+TEXT runtime·load_g(SB),NOSPLIT,$0-0 -+ ADDV $-56, R3 -+ MOVV R1, 0(R3) -+ MOVV R4, 8(R3) -+ MOVV R5, 16(R3) -+ MOVV R6, 24(R3) -+ MOVV R12, 32(R3) -+ MOVV R13, 40(R3) -+ MOVV R30, 48(R3) - MOVV runtime·tls_g(SB), g -+ MOVV 0(R3), R1 -+ MOVV 8(R3), R4 -+ MOVV 16(R3), R5 -+ MOVV 24(R3), R6 -+ MOVV 32(R3), R12 -+ MOVV 40(R3), R13 -+ MOVV 48(R3), R30 -+ ADDV $56, R3 - RET - - GLOBL runtime·tls_g(SB), TLSBSS, $8 --- -2.38.1 - diff --git a/0020-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch b/0020-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch deleted file mode 100644 index 37a2edc6b9c6c31d6c480586f0cbc1c32214eda3..0000000000000000000000000000000000000000 --- a/0020-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 5f4517d443d699a1798917900368d19bdb1fb025 Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Thu, 25 Aug 2022 11:09:22 +0800 -Subject: [PATCH 20/62] cmd/compile: add support for --buildmode=c-shared on - loong64 - -Updates #53301 - -Change-Id: I78a90155b17d7d8be04e8ba5e4d75e27d15b3311 ---- - src/cmd/compile/internal/base/flag.go | 2 +- - src/cmd/compile/internal/liveness/plive.go | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/cmd/compile/internal/base/flag.go b/src/cmd/compile/internal/base/flag.go -index be555c3d06..a09740f736 100644 ---- a/src/cmd/compile/internal/base/flag.go -+++ b/src/cmd/compile/internal/base/flag.go -@@ -204,7 +204,7 @@ func ParseFlags() { - if Flag.Race && !platform.RaceDetectorSupported(buildcfg.GOOS, buildcfg.GOARCH) { - log.Fatalf("%s/%s does not support -race", buildcfg.GOOS, buildcfg.GOARCH) - } -- if (*Flag.Shared || *Flag.Dynlink || *Flag.LinkShared) && !Ctxt.Arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.I386, sys.PPC64, sys.RISCV64, sys.S390X) { -+ if (*Flag.Shared || *Flag.Dynlink || *Flag.LinkShared) && !Ctxt.Arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.Loong64, sys.I386, sys.PPC64, sys.RISCV64, sys.S390X) { - log.Fatalf("%s/%s does not support -shared", buildcfg.GOOS, buildcfg.GOARCH) - } - parseSpectre(Flag.Spectre) // left as string for RecordFlags -diff --git a/src/cmd/compile/internal/liveness/plive.go b/src/cmd/compile/internal/liveness/plive.go -index 689b5286c6..ab79843ad8 100644 ---- a/src/cmd/compile/internal/liveness/plive.go -+++ b/src/cmd/compile/internal/liveness/plive.go -@@ -513,7 +513,7 @@ func (lv *liveness) markUnsafePoints() { - v = v.Args[0] - continue - } -- case ssa.Op386MOVLload, ssa.OpARM64MOVWUload, ssa.OpPPC64MOVWZload, ssa.OpWasmI64Load32U: -+ case ssa.Op386MOVLload, ssa.OpARM64MOVWUload, ssa.OpLOONG64MOVWUload, ssa.OpPPC64MOVWZload, ssa.OpWasmI64Load32U: - // Args[0] is the address of the write - // barrier control. Ignore Args[1], - // which is the mem operand. --- -2.38.1 - diff --git a/0069-cmd-link-internal-loadelf-correct-the-relocation-siz.patch b/0020-cmd-link-internal-loadelf-correct-the-relocation-siz.patch similarity index 72% rename from 0069-cmd-link-internal-loadelf-correct-the-relocation-siz.patch rename to 0020-cmd-link-internal-loadelf-correct-the-relocation-siz.patch index 85e55df5c89408b4cb0baf4b542c5b95cf499d05..34f5d29d7cd64c94fc18f6a4c72be331238c9b07 100644 --- a/0069-cmd-link-internal-loadelf-correct-the-relocation-siz.patch +++ b/0020-cmd-link-internal-loadelf-correct-the-relocation-siz.patch @@ -1,20 +1,19 @@ -From 9cb2c9498325eda8ce76a22e16fab5916ab4def0 Mon Sep 17 00:00:00 2001 +From 236eadf7de8e5fcb81bdf03cba85dcf8e7c00d41 Mon Sep 17 00:00:00 2001 From: limeidan Date: Thu, 14 Sep 2023 20:11:07 +0800 -Subject: [PATCH 07/30] cmd/link/internal/loadelf: correct the relocation size +Subject: [PATCH 20/51] cmd/link/internal/loadelf: correct the relocation size of R_LARCH_64 -(cherry picked from commit 55c5e3a84e77430b692cdac16082ab1b46a232ef) -Change-Id: I693dc0115a030cee202e5ece39563fe80c6782b3 +Change-Id: If3eaca8b92e8f5265c7763d13021a6353b9df9b6 --- src/cmd/link/internal/loadelf/ldelf.go | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go -index 7ac7699996..156d9a5616 100644 +index 942d54c06c..5ab7cf2204 100644 --- a/src/cmd/link/internal/loadelf/ldelf.go +++ b/src/cmd/link/internal/loadelf/ldelf.go -@@ -1007,11 +1007,13 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { +@@ -1012,11 +1012,13 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { LOONG64 | uint32(elf.R_LARCH_SOP_PUSH_ABSOLUTE)<<16, LOONG64 | uint32(elf.R_LARCH_MARK_LA)<<16, LOONG64 | uint32(elf.R_LARCH_SOP_POP_32_S_0_10_10_16_S2)<<16, diff --git a/0070-cmd-compile-cmd-internal-runtime-change-the-register.patch b/0021-cmd-compile-cmd-internal-runtime-change-the-register.patch similarity index 94% rename from 0070-cmd-compile-cmd-internal-runtime-change-the-register.patch rename to 0021-cmd-compile-cmd-internal-runtime-change-the-register.patch index 206d8b83508b53963623d8b906503be1f399ee58..35059918c02944fc5aff8e3173c57d698545df6e 100644 --- a/0070-cmd-compile-cmd-internal-runtime-change-the-register.patch +++ b/0021-cmd-compile-cmd-internal-runtime-change-the-register.patch @@ -1,13 +1,16 @@ -From e31062143c39a13705b26c653942ea78049d8beb Mon Sep 17 00:00:00 2001 +From 3ba838091015878918265cd0c8d224588a875b17 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Thu, 17 Aug 2023 03:58:10 +0800 -Subject: [PATCH 08/30] cmd/compile, cmd/internal, runtime: change the +Subject: [PATCH 21/51] cmd/compile, cmd/internal, runtime: change the registers used by the duff device for loong64 Add R21 to the allocatable registers, use R20 and R21 in duff device. This CL is in preparation for subsequent regABI support. -Change-Id: I81384ddf769520f005fb9da1d24e98801e9a64d0 +Updates #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I6d18e94a96e7598f0700855fd07ae7c3ad86737d --- src/cmd/compile/internal/loong64/ssa.go | 2 +- .../compile/internal/ssa/_gen/LOONG64Ops.go | 44 +- @@ -18,7 +21,7 @@ Change-Id: I81384ddf769520f005fb9da1d24e98801e9a64d0 6 files changed, 891 insertions(+), 891 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index f81152c7b5..68fc5d105c 100644 +index 0e8683ba81..199fd4ce33 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go @@ -362,7 +362,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { @@ -31,7 +34,7 @@ index f81152c7b5..68fc5d105c 100644 p.To.Type = obj.TYPE_MEM p.To.Name = obj.NAME_EXTERN diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 14ffb542cf..d2beaa1193 100644 +index ce08346a4a..9950619baf 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -123,7 +123,7 @@ func init() { @@ -141,10 +144,10 @@ index 14ffb542cf..d2beaa1193 100644 typ: "Mem", faultOnNilArg0: true, diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index ff0e1c6ca7..63c8cc329a 100644 +index fc735c48b5..2c17801ea4 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -22867,11 +22867,11 @@ var opcodeTable = [...]opInfo{ +@@ -22910,11 +22910,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AADDVU, reg: regInfo{ inputs: []inputInfo{ @@ -159,7 +162,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22882,10 +22882,10 @@ var opcodeTable = [...]opInfo{ +@@ -22925,10 +22925,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AADDVU, reg: regInfo{ inputs: []inputInfo{ @@ -172,7 +175,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22895,11 +22895,11 @@ var opcodeTable = [...]opInfo{ +@@ -22938,11 +22938,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASUBVU, reg: regInfo{ inputs: []inputInfo{ @@ -187,7 +190,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22910,10 +22910,10 @@ var opcodeTable = [...]opInfo{ +@@ -22953,10 +22953,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASUBVU, reg: regInfo{ inputs: []inputInfo{ @@ -200,7 +203,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22924,11 +22924,11 @@ var opcodeTable = [...]opInfo{ +@@ -22967,11 +22967,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMULV, reg: regInfo{ inputs: []inputInfo{ @@ -215,7 +218,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22939,11 +22939,11 @@ var opcodeTable = [...]opInfo{ +@@ -22982,11 +22982,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMULHV, reg: regInfo{ inputs: []inputInfo{ @@ -230,7 +233,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22954,11 +22954,11 @@ var opcodeTable = [...]opInfo{ +@@ -22997,11 +22997,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMULHVU, reg: regInfo{ inputs: []inputInfo{ @@ -245,7 +248,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22968,11 +22968,11 @@ var opcodeTable = [...]opInfo{ +@@ -23011,11 +23011,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ADIVV, reg: regInfo{ inputs: []inputInfo{ @@ -260,7 +263,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22982,11 +22982,11 @@ var opcodeTable = [...]opInfo{ +@@ -23025,11 +23025,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ADIVVU, reg: regInfo{ inputs: []inputInfo{ @@ -275,7 +278,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -22996,11 +22996,11 @@ var opcodeTable = [...]opInfo{ +@@ -23039,11 +23039,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AREMV, reg: regInfo{ inputs: []inputInfo{ @@ -290,7 +293,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23010,11 +23010,11 @@ var opcodeTable = [...]opInfo{ +@@ -23053,11 +23053,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AREMVU, reg: regInfo{ inputs: []inputInfo{ @@ -305,7 +308,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23141,11 +23141,11 @@ var opcodeTable = [...]opInfo{ +@@ -23184,11 +23184,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AAND, reg: regInfo{ inputs: []inputInfo{ @@ -320,7 +323,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23156,10 +23156,10 @@ var opcodeTable = [...]opInfo{ +@@ -23199,10 +23199,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AAND, reg: regInfo{ inputs: []inputInfo{ @@ -333,7 +336,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23170,11 +23170,11 @@ var opcodeTable = [...]opInfo{ +@@ -23213,11 +23213,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AOR, reg: regInfo{ inputs: []inputInfo{ @@ -348,7 +351,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23185,10 +23185,10 @@ var opcodeTable = [...]opInfo{ +@@ -23228,10 +23228,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AOR, reg: regInfo{ inputs: []inputInfo{ @@ -361,7 +364,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23199,11 +23199,11 @@ var opcodeTable = [...]opInfo{ +@@ -23242,11 +23242,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AXOR, reg: regInfo{ inputs: []inputInfo{ @@ -376,7 +379,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23214,10 +23214,10 @@ var opcodeTable = [...]opInfo{ +@@ -23257,10 +23257,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AXOR, reg: regInfo{ inputs: []inputInfo{ @@ -389,7 +392,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23228,11 +23228,11 @@ var opcodeTable = [...]opInfo{ +@@ -23271,11 +23271,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ANOR, reg: regInfo{ inputs: []inputInfo{ @@ -404,7 +407,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23243,10 +23243,10 @@ var opcodeTable = [...]opInfo{ +@@ -23286,10 +23286,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ANOR, reg: regInfo{ inputs: []inputInfo{ @@ -417,7 +420,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23255,10 +23255,10 @@ var opcodeTable = [...]opInfo{ +@@ -23298,10 +23298,10 @@ var opcodeTable = [...]opInfo{ argLen: 1, reg: regInfo{ inputs: []inputInfo{ @@ -430,7 +433,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23320,11 +23320,11 @@ var opcodeTable = [...]opInfo{ +@@ -23363,11 +23363,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMASKEQZ, reg: regInfo{ inputs: []inputInfo{ @@ -445,7 +448,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23334,11 +23334,11 @@ var opcodeTable = [...]opInfo{ +@@ -23377,11 +23377,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMASKNEZ, reg: regInfo{ inputs: []inputInfo{ @@ -460,7 +463,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23348,11 +23348,11 @@ var opcodeTable = [...]opInfo{ +@@ -23391,11 +23391,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASLLV, reg: regInfo{ inputs: []inputInfo{ @@ -475,7 +478,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23363,10 +23363,10 @@ var opcodeTable = [...]opInfo{ +@@ -23406,10 +23406,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASLLV, reg: regInfo{ inputs: []inputInfo{ @@ -488,7 +491,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23376,11 +23376,11 @@ var opcodeTable = [...]opInfo{ +@@ -23419,11 +23419,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASRLV, reg: regInfo{ inputs: []inputInfo{ @@ -503,7 +506,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23391,10 +23391,10 @@ var opcodeTable = [...]opInfo{ +@@ -23434,10 +23434,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASRLV, reg: regInfo{ inputs: []inputInfo{ @@ -516,7 +519,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23404,11 +23404,11 @@ var opcodeTable = [...]opInfo{ +@@ -23447,11 +23447,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASRAV, reg: regInfo{ inputs: []inputInfo{ @@ -531,7 +534,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23419,10 +23419,10 @@ var opcodeTable = [...]opInfo{ +@@ -23462,10 +23462,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASRAV, reg: regInfo{ inputs: []inputInfo{ @@ -544,7 +547,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23432,11 +23432,11 @@ var opcodeTable = [...]opInfo{ +@@ -23475,11 +23475,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AROTR, reg: regInfo{ inputs: []inputInfo{ @@ -559,7 +562,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23446,11 +23446,11 @@ var opcodeTable = [...]opInfo{ +@@ -23489,11 +23489,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AROTRV, reg: regInfo{ inputs: []inputInfo{ @@ -574,7 +577,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23461,10 +23461,10 @@ var opcodeTable = [...]opInfo{ +@@ -23504,10 +23504,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AROTR, reg: regInfo{ inputs: []inputInfo{ @@ -587,7 +590,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23475,10 +23475,10 @@ var opcodeTable = [...]opInfo{ +@@ -23518,10 +23518,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AROTRV, reg: regInfo{ inputs: []inputInfo{ @@ -600,7 +603,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23488,11 +23488,11 @@ var opcodeTable = [...]opInfo{ +@@ -23531,11 +23531,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASGT, reg: regInfo{ inputs: []inputInfo{ @@ -615,7 +618,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23503,10 +23503,10 @@ var opcodeTable = [...]opInfo{ +@@ -23546,10 +23546,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASGT, reg: regInfo{ inputs: []inputInfo{ @@ -628,7 +631,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23516,11 +23516,11 @@ var opcodeTable = [...]opInfo{ +@@ -23559,11 +23559,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASGTU, reg: regInfo{ inputs: []inputInfo{ @@ -643,7 +646,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23531,10 +23531,10 @@ var opcodeTable = [...]opInfo{ +@@ -23574,10 +23574,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.ASGTU, reg: regInfo{ inputs: []inputInfo{ @@ -656,7 +659,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23612,7 +23612,7 @@ var opcodeTable = [...]opInfo{ +@@ -23655,7 +23655,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVV, reg: regInfo{ outputs: []outputInfo{ @@ -665,7 +668,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23652,7 +23652,7 @@ var opcodeTable = [...]opInfo{ +@@ -23695,7 +23695,7 @@ var opcodeTable = [...]opInfo{ {0, 4611686018427387908}, // SP SB }, outputs: []outputInfo{ @@ -674,7 +677,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23665,10 +23665,10 @@ var opcodeTable = [...]opInfo{ +@@ -23708,10 +23708,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVB, reg: regInfo{ inputs: []inputInfo{ @@ -687,7 +690,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23681,10 +23681,10 @@ var opcodeTable = [...]opInfo{ +@@ -23724,10 +23724,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVBU, reg: regInfo{ inputs: []inputInfo{ @@ -700,7 +703,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23697,10 +23697,10 @@ var opcodeTable = [...]opInfo{ +@@ -23740,10 +23740,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVH, reg: regInfo{ inputs: []inputInfo{ @@ -713,7 +716,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23713,10 +23713,10 @@ var opcodeTable = [...]opInfo{ +@@ -23756,10 +23756,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVHU, reg: regInfo{ inputs: []inputInfo{ @@ -726,7 +729,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23729,10 +23729,10 @@ var opcodeTable = [...]opInfo{ +@@ -23772,10 +23772,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVW, reg: regInfo{ inputs: []inputInfo{ @@ -739,7 +742,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23745,10 +23745,10 @@ var opcodeTable = [...]opInfo{ +@@ -23788,10 +23788,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVWU, reg: regInfo{ inputs: []inputInfo{ @@ -752,7 +755,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23761,10 +23761,10 @@ var opcodeTable = [...]opInfo{ +@@ -23804,10 +23804,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVV, reg: regInfo{ inputs: []inputInfo{ @@ -765,7 +768,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23777,7 +23777,7 @@ var opcodeTable = [...]opInfo{ +@@ -23820,7 +23820,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVF, reg: regInfo{ inputs: []inputInfo{ @@ -774,7 +777,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, outputs: []outputInfo{ {0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 -@@ -23793,7 +23793,7 @@ var opcodeTable = [...]opInfo{ +@@ -23836,7 +23836,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVD, reg: regInfo{ inputs: []inputInfo{ @@ -783,7 +786,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, outputs: []outputInfo{ {0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 -@@ -23809,8 +23809,8 @@ var opcodeTable = [...]opInfo{ +@@ -23852,8 +23852,8 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVB, reg: regInfo{ inputs: []inputInfo{ @@ -794,7 +797,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23823,8 +23823,8 @@ var opcodeTable = [...]opInfo{ +@@ -23866,8 +23866,8 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVH, reg: regInfo{ inputs: []inputInfo{ @@ -805,7 +808,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23837,8 +23837,8 @@ var opcodeTable = [...]opInfo{ +@@ -23880,8 +23880,8 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVW, reg: regInfo{ inputs: []inputInfo{ @@ -816,7 +819,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23851,8 +23851,8 @@ var opcodeTable = [...]opInfo{ +@@ -23894,8 +23894,8 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVV, reg: regInfo{ inputs: []inputInfo{ @@ -827,7 +830,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23865,7 +23865,7 @@ var opcodeTable = [...]opInfo{ +@@ -23908,7 +23908,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVF, reg: regInfo{ inputs: []inputInfo{ @@ -836,7 +839,7 @@ index ff0e1c6ca7..63c8cc329a 100644 {1, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, -@@ -23879,7 +23879,7 @@ var opcodeTable = [...]opInfo{ +@@ -23922,7 +23922,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVD, reg: regInfo{ inputs: []inputInfo{ @@ -845,7 +848,7 @@ index ff0e1c6ca7..63c8cc329a 100644 {1, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, -@@ -23893,7 +23893,7 @@ var opcodeTable = [...]opInfo{ +@@ -23936,7 +23936,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVB, reg: regInfo{ inputs: []inputInfo{ @@ -854,7 +857,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23906,7 +23906,7 @@ var opcodeTable = [...]opInfo{ +@@ -23949,7 +23949,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVH, reg: regInfo{ inputs: []inputInfo{ @@ -863,7 +866,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23919,7 +23919,7 @@ var opcodeTable = [...]opInfo{ +@@ -23962,7 +23962,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVW, reg: regInfo{ inputs: []inputInfo{ @@ -872,7 +875,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23932,7 +23932,7 @@ var opcodeTable = [...]opInfo{ +@@ -23975,7 +23975,7 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVV, reg: regInfo{ inputs: []inputInfo{ @@ -881,7 +884,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23942,10 +23942,10 @@ var opcodeTable = [...]opInfo{ +@@ -23985,10 +23985,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVB, reg: regInfo{ inputs: []inputInfo{ @@ -894,7 +897,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23955,10 +23955,10 @@ var opcodeTable = [...]opInfo{ +@@ -23998,10 +23998,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVBU, reg: regInfo{ inputs: []inputInfo{ @@ -907,7 +910,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23968,10 +23968,10 @@ var opcodeTable = [...]opInfo{ +@@ -24011,10 +24011,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVH, reg: regInfo{ inputs: []inputInfo{ @@ -920,7 +923,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23981,10 +23981,10 @@ var opcodeTable = [...]opInfo{ +@@ -24024,10 +24024,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVHU, reg: regInfo{ inputs: []inputInfo{ @@ -933,7 +936,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -23994,10 +23994,10 @@ var opcodeTable = [...]opInfo{ +@@ -24037,10 +24037,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVW, reg: regInfo{ inputs: []inputInfo{ @@ -946,7 +949,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24007,10 +24007,10 @@ var opcodeTable = [...]opInfo{ +@@ -24050,10 +24050,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVWU, reg: regInfo{ inputs: []inputInfo{ @@ -959,7 +962,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24020,10 +24020,10 @@ var opcodeTable = [...]opInfo{ +@@ -24063,10 +24063,10 @@ var opcodeTable = [...]opInfo{ asm: loong64.AMOVV, reg: regInfo{ inputs: []inputInfo{ @@ -972,7 +975,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24033,10 +24033,10 @@ var opcodeTable = [...]opInfo{ +@@ -24076,10 +24076,10 @@ var opcodeTable = [...]opInfo{ resultInArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -985,7 +988,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24177,7 +24177,7 @@ var opcodeTable = [...]opInfo{ +@@ -24220,7 +24220,7 @@ var opcodeTable = [...]opInfo{ clobberFlags: true, call: true, reg: regInfo{ @@ -994,7 +997,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24188,7 +24188,7 @@ var opcodeTable = [...]opInfo{ +@@ -24231,7 +24231,7 @@ var opcodeTable = [...]opInfo{ call: true, tailCall: true, reg: regInfo{ @@ -1003,7 +1006,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24200,9 +24200,9 @@ var opcodeTable = [...]opInfo{ +@@ -24243,9 +24243,9 @@ var opcodeTable = [...]opInfo{ reg: regInfo{ inputs: []inputInfo{ {1, 268435456}, // R29 @@ -1015,7 +1018,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24213,9 +24213,9 @@ var opcodeTable = [...]opInfo{ +@@ -24256,9 +24256,9 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ @@ -1027,7 +1030,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24225,9 +24225,9 @@ var opcodeTable = [...]opInfo{ +@@ -24268,9 +24268,9 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -1039,7 +1042,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24238,10 +24238,10 @@ var opcodeTable = [...]opInfo{ +@@ -24281,10 +24281,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg1: true, reg: regInfo{ inputs: []inputInfo{ @@ -1053,7 +1056,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24251,10 +24251,10 @@ var opcodeTable = [...]opInfo{ +@@ -24294,10 +24294,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -1067,7 +1070,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24265,11 +24265,11 @@ var opcodeTable = [...]opInfo{ +@@ -24308,11 +24308,11 @@ var opcodeTable = [...]opInfo{ faultOnNilArg1: true, reg: regInfo{ inputs: []inputInfo{ @@ -1083,7 +1086,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, { -@@ -24278,10 +24278,10 @@ var opcodeTable = [...]opInfo{ +@@ -24321,10 +24321,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -1096,7 +1099,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24291,10 +24291,10 @@ var opcodeTable = [...]opInfo{ +@@ -24334,10 +24334,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -1109,7 +1112,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24304,10 +24304,10 @@ var opcodeTable = [...]opInfo{ +@@ -24347,10 +24347,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -1122,7 +1125,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24318,8 +24318,8 @@ var opcodeTable = [...]opInfo{ +@@ -24361,8 +24361,8 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ @@ -1133,7 +1136,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24330,8 +24330,8 @@ var opcodeTable = [...]opInfo{ +@@ -24373,8 +24373,8 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ @@ -1144,7 +1147,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24342,8 +24342,8 @@ var opcodeTable = [...]opInfo{ +@@ -24385,8 +24385,8 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ @@ -1155,7 +1158,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24354,7 +24354,7 @@ var opcodeTable = [...]opInfo{ +@@ -24397,7 +24397,7 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ @@ -1164,7 +1167,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24365,7 +24365,7 @@ var opcodeTable = [...]opInfo{ +@@ -24408,7 +24408,7 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ @@ -1173,7 +1176,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24378,11 +24378,11 @@ var opcodeTable = [...]opInfo{ +@@ -24421,11 +24421,11 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1188,7 +1191,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24395,11 +24395,11 @@ var opcodeTable = [...]opInfo{ +@@ -24438,11 +24438,11 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1203,7 +1206,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24411,11 +24411,11 @@ var opcodeTable = [...]opInfo{ +@@ -24454,11 +24454,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AAMANDDBW, reg: regInfo{ inputs: []inputInfo{ @@ -1218,7 +1221,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24427,11 +24427,11 @@ var opcodeTable = [...]opInfo{ +@@ -24470,11 +24470,11 @@ var opcodeTable = [...]opInfo{ asm: loong64.AAMORDBW, reg: regInfo{ inputs: []inputInfo{ @@ -1233,7 +1236,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24444,11 +24444,11 @@ var opcodeTable = [...]opInfo{ +@@ -24487,11 +24487,11 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1248,7 +1251,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24461,11 +24461,11 @@ var opcodeTable = [...]opInfo{ +@@ -24504,11 +24504,11 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1263,7 +1266,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24479,10 +24479,10 @@ var opcodeTable = [...]opInfo{ +@@ -24522,10 +24522,10 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1276,7 +1279,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24496,10 +24496,10 @@ var opcodeTable = [...]opInfo{ +@@ -24539,10 +24539,10 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1289,7 +1292,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24512,12 +24512,12 @@ var opcodeTable = [...]opInfo{ +@@ -24555,12 +24555,12 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1306,7 +1309,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24530,12 +24530,12 @@ var opcodeTable = [...]opInfo{ +@@ -24573,12 +24573,12 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ @@ -1323,7 +1326,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24546,7 +24546,7 @@ var opcodeTable = [...]opInfo{ +@@ -24589,7 +24589,7 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ @@ -1332,7 +1335,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24555,7 +24555,7 @@ var opcodeTable = [...]opInfo{ +@@ -24598,7 +24598,7 @@ var opcodeTable = [...]opInfo{ argLen: 1, reg: regInfo{ outputs: []outputInfo{ @@ -1341,7 +1344,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24564,7 +24564,7 @@ var opcodeTable = [...]opInfo{ +@@ -24607,7 +24607,7 @@ var opcodeTable = [...]opInfo{ argLen: 1, reg: regInfo{ outputs: []outputInfo{ @@ -1350,7 +1353,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24584,7 +24584,7 @@ var opcodeTable = [...]opInfo{ +@@ -24627,7 +24627,7 @@ var opcodeTable = [...]opInfo{ rematerializeable: true, reg: regInfo{ outputs: []outputInfo{ @@ -1359,7 +1362,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -24594,7 +24594,7 @@ var opcodeTable = [...]opInfo{ +@@ -24637,7 +24637,7 @@ var opcodeTable = [...]opInfo{ rematerializeable: true, reg: regInfo{ outputs: []outputInfo{ @@ -1368,7 +1371,7 @@ index ff0e1c6ca7..63c8cc329a 100644 }, }, }, -@@ -39976,16 +39976,16 @@ var registersLOONG64 = [...]Register{ +@@ -40189,16 +40189,16 @@ var registersLOONG64 = [...]Register{ {17, loong64.REG_R18, 14, "R18"}, {18, loong64.REG_R19, 15, "R19"}, {19, loong64.REG_R20, 16, "R20"}, @@ -1394,7 +1397,7 @@ index ff0e1c6ca7..63c8cc329a 100644 {30, loong64.REG_F0, -1, "F0"}, {31, loong64.REG_F1, -1, "F1"}, {32, loong64.REG_F2, -1, "F2"}, -@@ -40022,7 +40022,7 @@ var registersLOONG64 = [...]Register{ +@@ -40235,7 +40235,7 @@ var registersLOONG64 = [...]Register{ } var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10} var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37} @@ -2975,7 +2978,7 @@ index 63fa3bcca1..df8b653965 100644 RET diff --git a/src/runtime/mkduff.go b/src/runtime/mkduff.go -index eb2b9c07ba..982321ead7 100644 +index e8d4fcc93e..77674254d4 100644 --- a/src/runtime/mkduff.go +++ b/src/runtime/mkduff.go @@ -183,8 +183,8 @@ func zeroLOONG64(w io.Writer) { diff --git a/0021-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch b/0021-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch deleted file mode 100644 index 87a98038473f948ba3529a950e0eecd25b5b40f9..0000000000000000000000000000000000000000 --- a/0021-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch +++ /dev/null @@ -1,269 +0,0 @@ -From d5dd17f6c07f5de36f53bfd50bfb71889166f75b Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Thu, 25 Aug 2022 11:13:10 +0800 -Subject: [PATCH 21/62] cmd/internal/obj/loong64, cmd/internal/objabi: add - c-shared relocations on loong64 - -Updates #53301 - -Change-Id: Ifcb40871f609531dfd8b568db9ac14da9b451742 ---- - src/cmd/internal/obj/loong64/a.out.go | 3 +- - src/cmd/internal/obj/loong64/asm.go | 105 +++++++++++++++++--- - src/cmd/internal/obj/loong64/cnames.go | 3 +- - src/cmd/internal/objabi/reloctype.go | 11 ++ - src/cmd/internal/objabi/reloctype_string.go | 20 ++-- - 5 files changed, 120 insertions(+), 22 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go -index e7ac592b8b..29aa746951 100644 ---- a/src/cmd/internal/obj/loong64/a.out.go -+++ b/src/cmd/internal/obj/loong64/a.out.go -@@ -225,7 +225,8 @@ const ( - C_LOREG - C_GOK - C_ADDR -- C_TLS -+ C_TLS_LE -+ C_TLS_GD - C_TEXTSIZE - - C_NCLASS // must be the last -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index d3c34def73..b0a5cd6cec 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -157,11 +157,11 @@ var optab = []Optab{ - {AMOVB, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, - {AMOVBU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, - {AMOVBU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_TLS, C_NONE, 53, 16, 0, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0, 0}, - - {AMOVW, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, - {AMOVWU, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -@@ -186,11 +186,11 @@ var optab = []Optab{ - {AMOVB, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, - {AMOVBU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, - {AMOVBU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -- {AMOVWU, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -- {AMOVB, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -- {AMOVBU, C_TLS, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -+ {AMOVW, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -+ {AMOVWU, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -+ {AMOVV, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -+ {AMOVB, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -+ {AMOVBU, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, - - {AMOVW, C_SECON, C_NONE, C_REG, C_NONE, 3, 4, 0, sys.Loong64, 0}, - {AMOVV, C_SECON, C_NONE, C_REG, C_NONE, 3, 4, 0, sys.Loong64, 0}, -@@ -329,6 +329,17 @@ var optab = []Optab{ - - {AWORD, C_LCON, C_NONE, C_NONE, C_NONE, 40, 4, 0, 0, 0}, - {AWORD, C_DCON, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -+ {AMOVW, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -+ {AMOVBU, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -+ {AMOVWU, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -+ -+ {AMOVB, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -+ {AMOVW, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -+ {AMOVV, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -+ {AMOVBU, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -+ {AMOVWU, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, - - {ATEQ, C_SCON, C_REG, C_REG, C_NONE, 15, 8, 0, 0, 0}, - {ATEQ, C_SCON, C_NONE, C_REG, C_NONE, 15, 8, 0, 0, 0}, -@@ -461,7 +472,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - - bp := c.cursym.P - var i int32 -- var out [5]uint32 -+ var out [6]uint32 - for p := c.cursym.Func().Text.Link; p != nil; p = p.Link { - c.pc = p.Pc - o = c.oplook(p) -@@ -544,7 +555,11 @@ func (c *ctxt0) aclass(a *obj.Addr) int { - c.instoffset = a.Offset - if a.Sym != nil { // use relocation - if a.Sym.Type == objabi.STLSBSS { -- return C_TLS -+ if c.ctxt.Flag_shared { -+ return C_TLS_GD -+ } else { -+ return C_TLS_LE -+ } - } - return C_ADDR - } -@@ -1118,6 +1133,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - o3 := uint32(0) - o4 := uint32(0) - o5 := uint32(0) -+ o6 := uint32(0) - - add := AADDU - add = AADDVU -@@ -1595,6 +1611,70 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - rel2.Type = objabi.R_ADDRLOONG64TLS - o3 = OP_RRR(c.oprrr(AADDV), uint32(REG_R2), uint32(REGTMP), uint32(p.To.Reg)) - -+ case 56: // mov r, tlsvar GD model ==> (pcalau12i + ld.d)__tls_get_addr + (pcalau12i + addi.d)tlsvar@got + jirl + st.d -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -+ rel := obj.Addrel(c.cursym) -+ rel.Off = int32(c.pc) -+ rel.Siz = 4 -+ rel.Sym = c.ctxt.Lookup("__tls_get_addr") -+ rel.Add = 0x0 -+ rel.Type = objabi.R_LOONG64_GOTPCREL_HI -+ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -+ rel2 := obj.Addrel(c.cursym) -+ rel2.Off = int32(c.pc + 4) -+ rel2.Siz = 4 -+ rel2.Sym = c.ctxt.Lookup("__tls_get_addr") -+ rel2.Add = 0x0 -+ rel2.Type = objabi.R_LOONG64_GOT_LO -+ o3 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REG_R4)) -+ rel3 := obj.Addrel(c.cursym) -+ rel3.Off = int32(c.pc + 8) -+ rel3.Siz = 4 -+ rel3.Sym = p.To.Sym -+ rel3.Add = 0x0 -+ rel3.Type = objabi.R_LOONG64_TLS_GD_PCREL_HI -+ o4 = OP_12IRR(c.opirr(AADDV), uint32(0), uint32(REG_R4), uint32(REG_R4)) -+ rel4 := obj.Addrel(c.cursym) -+ rel4.Off = int32(c.pc + 12) -+ rel4.Siz = 4 -+ rel4.Sym = p.To.Sym -+ rel4.Add = 0x0 -+ rel4.Type = objabi.R_LOONG64_TLS_GD_LO -+ o5 = OP_16IRR(c.opirr(AJIRL), uint32(0), uint32(REGTMP), uint32(REGLINK)) -+ o6 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REG_R4), uint32(p.From.Reg)) -+ -+ case 57: // mov tlsvar, r GD model ==> (pcalau12i + ld.d)__tls_get_addr + (pcalau12i + addi.d)tlsvar@got + jirl + ld.d -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -+ rel := obj.Addrel(c.cursym) -+ rel.Off = int32(c.pc) -+ rel.Siz = 4 -+ rel.Sym = c.ctxt.Lookup("__tls_get_addr") -+ rel.Add = 0x0 -+ rel.Type = objabi.R_LOONG64_GOTPCREL_HI -+ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -+ rel2 := obj.Addrel(c.cursym) -+ rel2.Off = int32(c.pc + 4) -+ rel2.Siz = 4 -+ rel2.Sym = c.ctxt.Lookup("__tls_get_addr") -+ rel2.Add = 0x0 -+ rel2.Type = objabi.R_LOONG64_GOT_LO -+ o3 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REG_R4)) -+ rel3 := obj.Addrel(c.cursym) -+ rel3.Off = int32(c.pc + 8) -+ rel3.Siz = 4 -+ rel3.Sym = p.From.Sym -+ rel3.Type = objabi.R_LOONG64_TLS_GD_PCREL_HI -+ rel3.Add = 0x0 -+ o4 = OP_12IRR(c.opirr(AADDV), uint32(0), uint32(REG_R4), uint32(REG_R4)) -+ rel4 := obj.Addrel(c.cursym) -+ rel4.Off = int32(c.pc + 12) -+ rel4.Siz = 4 -+ rel4.Sym = p.From.Sym -+ rel4.Type = objabi.R_LOONG64_TLS_GD_LO -+ rel4.Add = 0x0 -+ o5 = OP_16IRR(c.opirr(AJIRL), uint32(0), uint32(REGTMP), uint32(REGLINK)) -+ o6 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REG_R4), uint32(p.To.Reg)) -+ - case 59: // mov $dcon,r - // NOTE: this case does not use REGTMP. If it ever does, - // remove the NOTUSETMP flag in optab. -@@ -1629,6 +1709,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - out[2] = o3 - out[3] = o4 - out[4] = o5 -+ out[5] = o6 - } - - func (c *ctxt0) vregoff(a *obj.Addr) int64 { -diff --git a/src/cmd/internal/obj/loong64/cnames.go b/src/cmd/internal/obj/loong64/cnames.go -index 00f6136603..393d0a007d 100644 ---- a/src/cmd/internal/obj/loong64/cnames.go -+++ b/src/cmd/internal/obj/loong64/cnames.go -@@ -37,7 +37,8 @@ var cnames0 = []string{ - "LOREG", - "GOK", - "ADDR", -- "TLS", -+ "TLS_LE", -+ "TLS_GD", - "TEXTSIZE", - "NCLASS", - } -diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go -index 2bc7b2dd7a..f7a2af5ccc 100644 ---- a/src/cmd/internal/objabi/reloctype.go -+++ b/src/cmd/internal/objabi/reloctype.go -@@ -310,6 +310,17 @@ const ( - // instruction, by encoding the address into the instruction. - R_CALLLOONG64 - -+ // R_LOONG64_TLS_GD_PCREL_HI and R_LOONG64_TLS_GD_LO relocates an pcalau12i, addi.d pair to compute -+ // the address of the GOT slot of the tls symbol, the address will be passed to __tls_get_addr to -+ // get the true address of tlsvar. -+ R_LOONG64_TLS_GD_PCREL_HI -+ R_LOONG64_TLS_GD_LO -+ -+ // R_LOONG64_GOTPCREL_HI and R_LOONG64_GOT_LO relocates an pcalau12i, ld.d pair to compute -+ // the address of the GOT slot of the referenced symbol. -+ R_LOONG64_GOTPCREL_HI -+ R_LOONG64_GOT_LO -+ - // R_JMPLOONG64 resolves to non-PC-relative target address of a JMP instruction, - // by encoding the address into the instruction. - R_JMPLOONG64 -diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go -index 9ce37d00de..ad4258c4a3 100644 ---- a/src/cmd/internal/objabi/reloctype_string.go -+++ b/src/cmd/internal/objabi/reloctype_string.go -@@ -79,17 +79,21 @@ func _() { - _ = x[R_ADDRLOONG64TLS-69] - _ = x[R_ADDRLOONG64TLSU-70] - _ = x[R_CALLLOONG64-71] -- _ = x[R_JMPLOONG64-72] -- _ = x[R_ADDRMIPSU-73] -- _ = x[R_ADDRMIPSTLS-74] -- _ = x[R_ADDRCUOFF-75] -- _ = x[R_WASMIMPORT-76] -- _ = x[R_XCOFFREF-77] -+ _ = x[R_LOONG64_TLS_GD_PCREL_HI-72] -+ _ = x[R_LOONG64_TLS_GD_LO-73] -+ _ = x[R_LOONG64_GOTPCREL_HI-74] -+ _ = x[R_LOONG64_GOT_LO-75] -+ _ = x[R_JMPLOONG64-76] -+ _ = x[R_ADDRMIPSU-77] -+ _ = x[R_ADDRMIPSTLS-78] -+ _ = x[R_ADDRCUOFF-79] -+ _ = x[R_WASMIMPORT-80] -+ _ = x[R_XCOFFREF-81] - } - --const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" -+const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_GD_PCREL_HIR_LOONG64_TLS_GD_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" - --var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 952, 963, 976, 987, 999, 1009} -+var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090} - - func (i RelocType) String() string { - i -= 1 --- -2.38.1 - diff --git a/0071-cmd-compile-add-ABI-register-definations-for-loong64.patch b/0022-cmd-compile-add-ABI-register-definations-for-loong64.patch similarity index 90% rename from 0071-cmd-compile-add-ABI-register-definations-for-loong64.patch rename to 0022-cmd-compile-add-ABI-register-definations-for-loong64.patch index f500ac23282cba076c3776588f4ffe7a3a95795a..d1bc59e30d1e2f43f0a5960366e1423b9ec06b13 100644 --- a/0071-cmd-compile-add-ABI-register-definations-for-loong64.patch +++ b/0022-cmd-compile-add-ABI-register-definations-for-loong64.patch @@ -1,9 +1,12 @@ -From 60a2d7c5551282cfff88fe94d276ae42712d7aa7 Mon Sep 17 00:00:00 2001 +From b7e8567db8b4f939176c3ef9fcff4772cec291df Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 17:11:19 +0800 -Subject: [PATCH 09/30] cmd/compile: add ABI register definations for loong64 +Subject: [PATCH 22/51] cmd/compile: add ABI register definations for loong64 -Change-Id: If919cb5427f47a764afa8fca1765092411ba9ed6 +Updates #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Idc30393487077e5c2bdffab447e3d8c33d4c8925 --- src/cmd/compile/abi-internal.md | 50 +++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/0022-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch b/0022-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch deleted file mode 100644 index b6c7d95cd7c0c51087933dafead2e0ac1ab031c3..0000000000000000000000000000000000000000 --- a/0022-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch +++ /dev/null @@ -1,98 +0,0 @@ -From e3d3e76b19e44157fbcf1fc3620f59056c6148cf Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Thu, 25 Aug 2022 11:13:41 +0800 -Subject: [PATCH 22/62] cmd/link: add support for --buildmode=c-shared on - loong64 - -Updates #53301 - -Change-Id: I4b726b0cc09e5e008b92b3e0a8a7bdd103b062c4 ---- - src/cmd/link/internal/ld/config.go | 2 +- - src/cmd/link/internal/loong64/asm.go | 36 +++++++++++++++++++++++++++- - 2 files changed, 36 insertions(+), 2 deletions(-) - -diff --git a/src/cmd/link/internal/ld/config.go b/src/cmd/link/internal/ld/config.go -index ba74b6fc96..129d30f35a 100644 ---- a/src/cmd/link/internal/ld/config.go -+++ b/src/cmd/link/internal/ld/config.go -@@ -75,7 +75,7 @@ func (mode *BuildMode) Set(s string) error { - *mode = BuildModeCArchive - case "c-shared": - switch buildcfg.GOARCH { -- case "386", "amd64", "arm", "arm64", "ppc64le", "riscv64", "s390x": -+ case "386", "amd64", "arm", "arm64", "loong64", "ppc64le", "riscv64", "s390x": - default: - return badmode() - } -diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go -index e9cf07023f..238d77a610 100644 ---- a/src/cmd/link/internal/loong64/asm.go -+++ b/src/cmd/link/internal/loong64/asm.go -@@ -59,6 +59,31 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, - out.Write64(uint64(elf.R_LARCH_B26) | uint64(elfsym)<<32) - out.Write64(uint64(r.Xadd)) - -+ case objabi.R_LOONG64_TLS_GD_PCREL_HI: -+ out.Write64(uint64(sectoff)) -+ out.Write64(uint64(elf.R_LARCH_TLS_GD_PC_HI20) | uint64(elfsym)<<32) -+ out.Write64(uint64(0x0)) -+ -+ case objabi.R_LOONG64_TLS_GD_LO: -+ out.Write64(uint64(sectoff)) -+ out.Write64(uint64(elf.R_LARCH_GOT_PC_LO12) | uint64(elfsym)<<32) -+ out.Write64(uint64(0x0)) -+ -+ case objabi.R_LOONG64_GOTPCREL_HI: -+ out.Write64(uint64(sectoff)) -+ out.Write64(uint64(elf.R_LARCH_GOT_PC_HI20) | uint64(elfsym)<<32) -+ out.Write64(uint64(0x0)) -+ -+ case objabi.R_LOONG64_GOT_LO: -+ out.Write64(uint64(sectoff)) -+ out.Write64(uint64(elf.R_LARCH_GOT_PC_LO12) | uint64(elfsym)<<32) -+ out.Write64(uint64(0x0)) -+ -+ // The pcaddu12i + addi.d instructions is used to obtain address of a symbol on Loong64. -+ // The low 12-bit of the symbol address need to be added. The addi.d instruction have -+ // signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced -+ // to do sign extending from 12 bits. The 0x804 is 0x800 + 4, 4 is instruction bit -+ // width on Loong64 and is used to correct the PC of the addi.d instruction. - case objabi.R_ADDRLOONG64: - out.Write64(uint64(sectoff)) - out.Write64(uint64(elf.R_LARCH_PCALA_LO12) | uint64(elfsym)<<32) -@@ -101,6 +126,11 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade - objabi.R_CALLLOONG64, - objabi.R_JMPLOONG64: - return val, 1, true -+ case objabi.R_LOONG64_TLS_GD_PCREL_HI, -+ objabi.R_LOONG64_GOTPCREL_HI, -+ objabi.R_LOONG64_TLS_GD_LO, -+ objabi.R_LOONG64_GOT_LO: -+ return val, 1, true - } - } - -@@ -144,6 +174,8 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant - func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sym) (loader.ExtReloc, bool) { - switch r.Type() { - case objabi.R_ADDRLOONG64, -+ objabi.R_LOONG64_GOTPCREL_HI, -+ objabi.R_LOONG64_GOT_LO, - objabi.R_ADDRLOONG64U: - return ld.ExtrelocViaOuterSym(ldr, r, s), true - -@@ -152,7 +184,9 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy - objabi.R_CONST, - objabi.R_GOTOFF, - objabi.R_CALLLOONG64, -- objabi.R_JMPLOONG64: -+ objabi.R_JMPLOONG64, -+ objabi.R_LOONG64_TLS_GD_PCREL_HI, -+ objabi.R_LOONG64_TLS_GD_LO: - return ld.ExtrelocSimple(ldr, r), true - } - return loader.ExtReloc{}, false --- -2.38.1 - diff --git a/0072-cmd-compile-cmd-internal-runtime-change-registers-on.patch b/0023-cmd-compile-cmd-internal-runtime-change-registers-on.patch similarity index 88% rename from 0072-cmd-compile-cmd-internal-runtime-change-registers-on.patch rename to 0023-cmd-compile-cmd-internal-runtime-change-registers-on.patch index 1440c50e7285aa179686c7c152fe88d856818591..37cecfd4fed02112427c9964e2fd969bee1ea8f5 100644 --- a/0072-cmd-compile-cmd-internal-runtime-change-registers-on.patch +++ b/0023-cmd-compile-cmd-internal-runtime-change-registers-on.patch @@ -1,10 +1,13 @@ -From 19f263cb7f34f02da0d226278d785b82a0713a62 Mon Sep 17 00:00:00 2001 +From eff24b2f636fe822a7e4c7d382bb4c8e7fe5bee6 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 19:23:51 +0800 -Subject: [PATCH 10/30] cmd/compile,cmd/internal,runtime: change registers on +Subject: [PATCH 23/51] cmd/compile,cmd/internal,runtime: change registers on loong64 to avoid regABI arguments -Change-Id: Id05d498df2b4f83fda4772bccbf93f5be03b13a0 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I2be59a7300aa4f0ee9af509e2cc7201a968f7228 --- .../compile/internal/ssa/_gen/LOONG64Ops.go | 8 +- src/cmd/compile/internal/ssa/opGen.go | 12 +-- @@ -13,7 +16,7 @@ Change-Id: Id05d498df2b4f83fda4772bccbf93f5be03b13a0 4 files changed, 81 insertions(+), 81 deletions(-) diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index d2beaa1193..3a30d9645d 100644 +index 9950619baf..0d0f475a5b 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -130,10 +130,10 @@ func init() { @@ -32,10 +35,10 @@ index d2beaa1193..3a30d9645d 100644 // Common regInfo var ( diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 63c8cc329a..6df524fef3 100644 +index 2c17801ea4..6643aef21a 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -24619,8 +24619,8 @@ var opcodeTable = [...]opInfo{ +@@ -24660,8 +24660,8 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ @@ -46,7 +49,7 @@ index 63c8cc329a..6df524fef3 100644 }, }, }, -@@ -24631,8 +24631,8 @@ var opcodeTable = [...]opInfo{ +@@ -24672,8 +24672,8 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ @@ -57,7 +60,7 @@ index 63c8cc329a..6df524fef3 100644 }, }, }, -@@ -24643,8 +24643,8 @@ var opcodeTable = [...]opInfo{ +@@ -24684,8 +24684,8 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ @@ -69,10 +72,10 @@ index 63c8cc329a..6df524fef3 100644 }, }, diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go -index 5d7213d8c7..803dd45de7 100644 +index 38ab66b819..b0f5ac3087 100644 --- a/src/cmd/internal/obj/loong64/obj.go +++ b/src/cmd/internal/obj/loong64/obj.go -@@ -395,13 +395,13 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -402,13 +402,13 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { if c.cursym.Func().Text.From.Sym.Wrapper() && c.cursym.Func().Text.Mark&LEAF == 0 { // if(g->panic != nil && g->panic->argp == FP) g->panic->argp = bottom-of-frame // @@ -93,7 +96,7 @@ index 5d7213d8c7..803dd45de7 100644 // end: // NOP // -@@ -418,12 +418,12 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -425,12 +425,12 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { q.From.Reg = REGG q.From.Offset = 4 * int64(c.ctxt.Arch.PtrSize) // G.panic q.To.Type = obj.TYPE_REG @@ -108,7 +111,7 @@ index 5d7213d8c7..803dd45de7 100644 q.To.Type = obj.TYPE_BRANCH q.Mark |= BRANCH p1 = q -@@ -431,10 +431,10 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -438,10 +438,10 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { q = obj.Appendp(q, newprog) q.As = mov q.From.Type = obj.TYPE_MEM @@ -121,7 +124,7 @@ index 5d7213d8c7..803dd45de7 100644 q = obj.Appendp(q, newprog) q.As = add -@@ -442,13 +442,13 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -449,13 +449,13 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { q.From.Offset = int64(autosize) + ctxt.Arch.FixedFrameSize q.Reg = REGSP q.To.Type = obj.TYPE_REG @@ -138,7 +141,7 @@ index 5d7213d8c7..803dd45de7 100644 q.To.Type = obj.TYPE_BRANCH q.Mark |= BRANCH p2 = q -@@ -459,14 +459,14 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { +@@ -466,14 +466,14 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { q.From.Offset = ctxt.Arch.FixedFrameSize q.Reg = REGSP q.To.Type = obj.TYPE_REG @@ -156,7 +159,7 @@ index 5d7213d8c7..803dd45de7 100644 q.To.Offset = 0 // Panic.argp q = obj.Appendp(q, newprog) -@@ -689,7 +689,7 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -696,7 +696,7 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { // Jump back to here after morestack returns. startPred := p @@ -165,7 +168,7 @@ index 5d7213d8c7..803dd45de7 100644 p = obj.Appendp(p, c.newprog) p.As = mov -@@ -700,7 +700,7 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -707,7 +707,7 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { p.From.Offset = 3 * int64(c.ctxt.Arch.PtrSize) // G.stackguard1 } p.To.Type = obj.TYPE_REG @@ -174,9 +177,9 @@ index 5d7213d8c7..803dd45de7 100644 // Mark the stack bound check and morestack call async nonpreemptible. // If we get preempted here, when resumed the preemption request is -@@ -711,15 +711,15 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -718,15 +718,15 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { var q *obj.Prog - if framesize <= objabi.StackSmall { + if framesize <= abi.StackSmall { // small stack: SP < stackguard - // AGTU SP, stackguard, R19 + // AGTU SP, stackguard, R20 @@ -192,8 +195,8 @@ index 5d7213d8c7..803dd45de7 100644 + p.To.Reg = REG_R20 } else { // large stack: SP-framesize < stackguard-StackSmall - offset := int64(framesize) - objabi.StackSmall -@@ -731,8 +731,8 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { + offset := int64(framesize) - abi.StackSmall +@@ -738,8 +738,8 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { // stack guard to incorrectly succeed. We explicitly // guard against underflow. // @@ -204,7 +207,7 @@ index 5d7213d8c7..803dd45de7 100644 p = obj.Appendp(p, c.newprog) p.As = ASGTU -@@ -740,13 +740,13 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -747,13 +747,13 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { p.From.Offset = offset p.Reg = REGSP p.To.Type = obj.TYPE_REG @@ -220,7 +223,7 @@ index 5d7213d8c7..803dd45de7 100644 p.To.Type = obj.TYPE_BRANCH p.Mark |= BRANCH } -@@ -758,35 +758,35 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -765,35 +765,35 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { p.From.Offset = -offset p.Reg = REGSP p.To.Type = obj.TYPE_REG @@ -265,7 +268,7 @@ index 5d7213d8c7..803dd45de7 100644 q.To.SetTarget(p) p.Mark |= LABEL diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index d82c688925..4a21860316 100644 +index 78a1a4d358..23cbd09947 100644 --- a/src/runtime/asm_loong64.s +++ b/src/runtime/asm_loong64.s @@ -214,7 +214,7 @@ noswitch: @@ -292,7 +295,7 @@ index d82c688925..4a21860316 100644 MOVV R3, (m_morebuf+gobuf_sp)(R7) // f's caller's SP MOVV g, (m_morebuf+gobuf_g)(R7) -@@ -741,70 +741,70 @@ flush: +@@ -786,70 +786,70 @@ TEXT runtime·gcWriteBarrier8(SB),NOSPLIT,$0 // then tail call to the corresponding runtime handler. // The tail call makes these stubs disappear in backtraces. TEXT runtime·panicIndex(SB),NOSPLIT,$0-16 diff --git a/0023-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch b/0023-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch deleted file mode 100644 index 9427e24f4edca064480c72f53e968173a741813a..0000000000000000000000000000000000000000 --- a/0023-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 9cdedaf304f96f360aef36006218be3fda77c6ea Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Thu, 25 Aug 2022 11:14:15 +0800 -Subject: [PATCH 23/62] cmd/internal/sys: enable c-shared feature on loong64 - -Updates #53301 - -Change-Id: I4e0be140a71b86f4626ed39d76cf3ac78f842018 ---- - src/internal/platform/supported.go | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go -index 046352f34c..e6d8adb40e 100644 ---- a/src/internal/platform/supported.go -+++ b/src/internal/platform/supported.go -@@ -143,7 +143,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { - - case "c-shared": - switch platform { -- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/ppc64le", "linux/riscv64", "linux/s390x", -+ case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/loong64", "linux/ppc64le", "linux/riscv64", "linux/s390x", - "android/amd64", "android/arm", "android/arm64", "android/386", - "freebsd/amd64", - "darwin/amd64", "darwin/arm64", --- -2.38.1 - diff --git a/0024-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch b/0024-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch deleted file mode 100644 index 4541136b9f8d9d35f71e31880635d71323d26a87..0000000000000000000000000000000000000000 --- a/0024-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 72247b5bde442deaf8dbd03d6ffa865ed5ccaa7e Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Thu, 25 Aug 2022 11:14:28 +0800 -Subject: [PATCH 24/62] cmd/dist, misc/cgo/testcshared: enable c-shared test on - loong64 - -Updates #53301 - -Change-Id: I68357e420f0920d6609d399cee40cd44af018385 ---- - misc/cgo/testcshared/testdata/libgo2/dup2.go | 2 +- - misc/cgo/testcshared/testdata/libgo2/dup3.go | 2 +- - src/cmd/dist/test.go | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/misc/cgo/testcshared/testdata/libgo2/dup2.go b/misc/cgo/testcshared/testdata/libgo2/dup2.go -index d343aa54d9..73ef600ecb 100644 ---- a/misc/cgo/testcshared/testdata/libgo2/dup2.go -+++ b/misc/cgo/testcshared/testdata/libgo2/dup2.go -@@ -2,7 +2,7 @@ - // Use of this source code is governed by a BSD-style - // license that can be found in the LICENSE file. - --// +build darwin dragonfly freebsd linux,!arm64,!riscv64 netbsd openbsd -+// +build darwin dragonfly freebsd linux,!arm64,!riscv64,!loong64 netbsd openbsd - - package main - -diff --git a/misc/cgo/testcshared/testdata/libgo2/dup3.go b/misc/cgo/testcshared/testdata/libgo2/dup3.go -index 459f0dc196..f83b96778b 100644 ---- a/misc/cgo/testcshared/testdata/libgo2/dup3.go -+++ b/misc/cgo/testcshared/testdata/libgo2/dup3.go -@@ -2,7 +2,7 @@ - // Use of this source code is governed by a BSD-style - // license that can be found in the LICENSE file. - --// +build linux,arm64 linux,riscv64 -+// +build linux,arm64 linux,riscv64 linux,loong64 - - package main - -diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go -index 9f2660631d..ac93194165 100644 ---- a/src/cmd/dist/test.go -+++ b/src/cmd/dist/test.go -@@ -1191,7 +1191,7 @@ func (t *tester) supportedBuildmode(mode string) bool { - return false - case "c-shared": - switch pair { -- case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-ppc64le", "linux-riscv64", "linux-s390x", -+ case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-loong64", "linux-ppc64le", "linux-riscv64", "linux-s390x", - "darwin-amd64", "darwin-arm64", - "freebsd-amd64", - "android-arm", "android-arm64", "android-386", --- -2.38.1 - diff --git a/0073-internal-abi-define-loong64-regABI-constants.patch b/0024-internal-abi-define-loong64-regABI-constants.patch similarity index 76% rename from 0073-internal-abi-define-loong64-regABI-constants.patch rename to 0024-internal-abi-define-loong64-regABI-constants.patch index c591d732b7fd0fef583449334d35c885e8e2fea6..45686971d2b9c4e245da2c3db5d9d2189e1d3b75 100644 --- a/0073-internal-abi-define-loong64-regABI-constants.patch +++ b/0024-internal-abi-define-loong64-regABI-constants.patch @@ -1,9 +1,12 @@ -From 77cb007971a25238c6a3dc5e9344ce5b4a4e85ff Mon Sep 17 00:00:00 2001 +From 8a07acf3eefab6311d0b38ef560ae3e7d500ac09 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 19:38:33 +0800 -Subject: [PATCH 11/30] internal/abi: define loong64 regABI constants +Subject: [PATCH 24/51] internal/abi: define loong64 regABI constants -Change-Id: Ie927aafc5d2ebb42fb9c59a1f4c3a1323da4c27a +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Id580d9e22a562adee2ae02a467ac38a54949e737 --- src/internal/abi/abi_loong64.go | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/0074-cmd-compile-internal-add-register-info-for-loong64-r.patch b/0025-cmd-compile-internal-add-register-info-for-loong64-r.patch similarity index 83% rename from 0074-cmd-compile-internal-add-register-info-for-loong64-r.patch rename to 0025-cmd-compile-internal-add-register-info-for-loong64-r.patch index 5fd208a87e21c588ba6d456d8e96f591347d2822..f4a705663e6f2a918c06396049d33d6c85ce5a0b 100644 --- a/0074-cmd-compile-internal-add-register-info-for-loong64-r.patch +++ b/0025-cmd-compile-internal-add-register-info-for-loong64-r.patch @@ -1,10 +1,13 @@ -From 537f7393b3d52214a5be503e2efc2c27bea20414 Mon Sep 17 00:00:00 2001 +From f49b0e4d8eb7b6c0afbe7f3d4fa104564a52999a Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 19:54:51 +0800 -Subject: [PATCH 12/30] cmd/compile/internal: add register info for loong64 +Subject: [PATCH 25/51] cmd/compile/internal: add register info for loong64 regABI -Change-Id: I178c1a706bde9158a1ab05b12c5c228e24b36962 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I4b40d0c17c479392ceaef65a8fd40a9117b87b4f --- src/cmd/compile/internal/loong64/ssa.go | 2 ++ src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go | 4 ++-- @@ -13,7 +16,7 @@ Change-Id: I178c1a706bde9158a1ab05b12c5c228e24b36962 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 68fc5d105c..98685ca43b 100644 +index 199fd4ce33..f348f396b8 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go @@ -144,6 +144,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { @@ -26,10 +29,10 @@ index 68fc5d105c..98685ca43b 100644 ssa.OpLOONG64SUBV, ssa.OpLOONG64AND, diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 3a30d9645d..722d69e8e3 100644 +index 0d0f475a5b..8e3f3ce720 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -@@ -465,8 +465,8 @@ func init() { +@@ -466,8 +466,8 @@ func init() { blocks: blocks, regnames: regNamesLOONG64, // TODO: support register ABI on loong64 @@ -41,10 +44,10 @@ index 3a30d9645d..722d69e8e3 100644 fpregmask: fp, framepointerreg: -1, // not used diff --git a/src/cmd/compile/internal/ssa/config.go b/src/cmd/compile/internal/ssa/config.go -index ed844306c1..98a78e0c4a 100644 +index 43f9f0affc..31a6ee1af8 100644 --- a/src/cmd/compile/internal/ssa/config.go +++ b/src/cmd/compile/internal/ssa/config.go -@@ -278,6 +278,8 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize, softfloat boo +@@ -296,6 +296,8 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize, softfloat boo c.registers = registersLOONG64[:] c.gpRegMask = gpRegMaskLOONG64 c.fpRegMask = fpRegMaskLOONG64 @@ -54,10 +57,10 @@ index ed844306c1..98a78e0c4a 100644 c.LinkReg = linkRegLOONG64 c.hasGReg = true diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 6df524fef3..8893df9140 100644 +index 6643aef21a..482046f016 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -40020,8 +40020,8 @@ var registersLOONG64 = [...]Register{ +@@ -40233,8 +40233,8 @@ var registersLOONG64 = [...]Register{ {61, loong64.REG_F31, -1, "F31"}, {62, 0, -1, "SB"}, } diff --git a/0025-cmd-link-cmd-internal-in-shared-mode-change-to-use-I.patch b/0025-cmd-link-cmd-internal-in-shared-mode-change-to-use-I.patch deleted file mode 100644 index 6335bc11724c557d7b521c8bdebaa5b076baa87a..0000000000000000000000000000000000000000 --- a/0025-cmd-link-cmd-internal-in-shared-mode-change-to-use-I.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 06335c8600a8964468efd090bae7ade0b610d166 Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Wed, 8 Mar 2023 01:56:16 +0800 -Subject: [PATCH 25/62] cmd/link, cmd/internal: in shared mode, change to use - IE mode to access TLS variables - -Change-Id: I097a1b1a48e18c3d517142199b32fb14cca1f590 ---- - src/cmd/internal/obj/loong64/a.out.go | 2 +- - src/cmd/internal/obj/loong64/asm.go | 118 ++++++++------------ - src/cmd/internal/obj/loong64/cnames.go | 2 +- - src/cmd/internal/objabi/reloctype.go | 6 +- - src/cmd/internal/objabi/reloctype_string.go | 6 +- - src/cmd/link/internal/loong64/asm.go | 16 +-- - 6 files changed, 61 insertions(+), 89 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go -index 29aa746951..99a7da388f 100644 ---- a/src/cmd/internal/obj/loong64/a.out.go -+++ b/src/cmd/internal/obj/loong64/a.out.go -@@ -226,7 +226,7 @@ const ( - C_GOK - C_ADDR - C_TLS_LE -- C_TLS_GD -+ C_TLS_IE - C_TEXTSIZE - - C_NCLASS // must be the last -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index b0a5cd6cec..792ed22a02 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -329,17 +329,17 @@ var optab = []Optab{ - - {AWORD, C_LCON, C_NONE, C_NONE, C_NONE, 40, 4, 0, 0, 0}, - {AWORD, C_DCON, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0, 0}, -- {AMOVB, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_TLS_GD, C_NONE, 56, 24, 0, sys.Loong64, 0}, -- -- {AMOVB, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -- {AMOVW, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -- {AMOVV, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -- {AMOVBU, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -- {AMOVWU, C_TLS_GD, C_NONE, C_REG, C_NONE, 57, 24, 0, sys.Loong64, 0}, -+ {AMOVB, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -+ {AMOVW, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -+ {AMOVBU, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -+ {AMOVWU, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -+ -+ {AMOVB, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -+ {AMOVW, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -+ {AMOVV, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -+ {AMOVBU, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -+ {AMOVWU, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, - - {ATEQ, C_SCON, C_REG, C_REG, C_NONE, 15, 8, 0, 0, 0}, - {ATEQ, C_SCON, C_NONE, C_REG, C_NONE, 15, 8, 0, 0, 0}, -@@ -556,7 +556,7 @@ func (c *ctxt0) aclass(a *obj.Addr) int { - if a.Sym != nil { // use relocation - if a.Sym.Type == objabi.STLSBSS { - if c.ctxt.Flag_shared { -- return C_TLS_GD -+ return C_TLS_IE - } else { - return C_TLS_LE - } -@@ -1611,69 +1611,41 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - rel2.Type = objabi.R_ADDRLOONG64TLS - o3 = OP_RRR(c.oprrr(AADDV), uint32(REG_R2), uint32(REGTMP), uint32(p.To.Reg)) - -- case 56: // mov r, tlsvar GD model ==> (pcalau12i + ld.d)__tls_get_addr + (pcalau12i + addi.d)tlsvar@got + jirl + st.d -+ case 56: // mov r, tlsvar IE model ==> (pcalau12i + ld.d)tlsvar@got + add.d + st.d - o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -- rel := obj.Addrel(c.cursym) -- rel.Off = int32(c.pc) -- rel.Siz = 4 -- rel.Sym = c.ctxt.Lookup("__tls_get_addr") -- rel.Add = 0x0 -- rel.Type = objabi.R_LOONG64_GOTPCREL_HI -+ rel := obj.Addrel(c.cursym) -+ rel.Off = int32(c.pc) -+ rel.Siz = 4 -+ rel.Sym = p.To.Sym -+ rel.Add = 0x0 -+ rel.Type = objabi.R_LOONG64_TLS_IE_PCREL_HI - o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -- rel2 := obj.Addrel(c.cursym) -- rel2.Off = int32(c.pc + 4) -- rel2.Siz = 4 -- rel2.Sym = c.ctxt.Lookup("__tls_get_addr") -- rel2.Add = 0x0 -- rel2.Type = objabi.R_LOONG64_GOT_LO -- o3 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REG_R4)) -- rel3 := obj.Addrel(c.cursym) -- rel3.Off = int32(c.pc + 8) -- rel3.Siz = 4 -- rel3.Sym = p.To.Sym -- rel3.Add = 0x0 -- rel3.Type = objabi.R_LOONG64_TLS_GD_PCREL_HI -- o4 = OP_12IRR(c.opirr(AADDV), uint32(0), uint32(REG_R4), uint32(REG_R4)) -- rel4 := obj.Addrel(c.cursym) -- rel4.Off = int32(c.pc + 12) -- rel4.Siz = 4 -- rel4.Sym = p.To.Sym -- rel4.Add = 0x0 -- rel4.Type = objabi.R_LOONG64_TLS_GD_LO -- o5 = OP_16IRR(c.opirr(AJIRL), uint32(0), uint32(REGTMP), uint32(REGLINK)) -- o6 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REG_R4), uint32(p.From.Reg)) -- -- case 57: // mov tlsvar, r GD model ==> (pcalau12i + ld.d)__tls_get_addr + (pcalau12i + addi.d)tlsvar@got + jirl + ld.d -- o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -- rel := obj.Addrel(c.cursym) -- rel.Off = int32(c.pc) -- rel.Siz = 4 -- rel.Sym = c.ctxt.Lookup("__tls_get_addr") -- rel.Add = 0x0 -- rel.Type = objabi.R_LOONG64_GOTPCREL_HI -- o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -- rel2 := obj.Addrel(c.cursym) -- rel2.Off = int32(c.pc + 4) -- rel2.Siz = 4 -- rel2.Sym = c.ctxt.Lookup("__tls_get_addr") -- rel2.Add = 0x0 -- rel2.Type = objabi.R_LOONG64_GOT_LO -- o3 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REG_R4)) -- rel3 := obj.Addrel(c.cursym) -- rel3.Off = int32(c.pc + 8) -- rel3.Siz = 4 -- rel3.Sym = p.From.Sym -- rel3.Type = objabi.R_LOONG64_TLS_GD_PCREL_HI -- rel3.Add = 0x0 -- o4 = OP_12IRR(c.opirr(AADDV), uint32(0), uint32(REG_R4), uint32(REG_R4)) -- rel4 := obj.Addrel(c.cursym) -- rel4.Off = int32(c.pc + 12) -- rel4.Siz = 4 -- rel4.Sym = p.From.Sym -- rel4.Type = objabi.R_LOONG64_TLS_GD_LO -- rel4.Add = 0x0 -- o5 = OP_16IRR(c.opirr(AJIRL), uint32(0), uint32(REGTMP), uint32(REGLINK)) -- o6 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REG_R4), uint32(p.To.Reg)) -+ rel2 := obj.Addrel(c.cursym) -+ rel2.Off = int32(c.pc + 4) -+ rel2.Siz = 4 -+ rel2.Sym = p.To.Sym -+ rel2.Add = 0x0 -+ rel2.Type = objabi.R_LOONG64_TLS_IE_LO -+ o3 = OP_RRR(c.oprrr(AADDVU), uint32(REGTMP), uint32(REG_R2), uint32(REGTMP)) -+ o4 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REGTMP), uint32(p.From.Reg)) -+ -+ case 57: // mov tlsvar, r IE model ==> (pcalau12i + ld.d)tlsvar@got + add.d + ld.d -+ o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -+ rel := obj.Addrel(c.cursym) -+ rel.Off = int32(c.pc) -+ rel.Siz = 4 -+ rel.Sym = p.From.Sym -+ rel.Add = 0x0 -+ rel.Type = objabi.R_LOONG64_TLS_IE_PCREL_HI -+ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) -+ rel2 := obj.Addrel(c.cursym) -+ rel2.Off = int32(c.pc + 4) -+ rel2.Siz = 4 -+ rel2.Sym = p.From.Sym -+ rel2.Add = 0x0 -+ rel2.Type = objabi.R_LOONG64_TLS_IE_LO -+ o3 = OP_RRR(c.oprrr(AADDVU), uint32(REGTMP), uint32(REG_R2), uint32(REGTMP)) -+ o4 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(p.To.Reg)) - - case 59: // mov $dcon,r - // NOTE: this case does not use REGTMP. If it ever does, -diff --git a/src/cmd/internal/obj/loong64/cnames.go b/src/cmd/internal/obj/loong64/cnames.go -index 393d0a007d..8b8af6ba31 100644 ---- a/src/cmd/internal/obj/loong64/cnames.go -+++ b/src/cmd/internal/obj/loong64/cnames.go -@@ -38,7 +38,7 @@ var cnames0 = []string{ - "GOK", - "ADDR", - "TLS_LE", -- "TLS_GD", -+ "TLS_IE", - "TEXTSIZE", - "NCLASS", - } -diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go -index f7a2af5ccc..db061632cf 100644 ---- a/src/cmd/internal/objabi/reloctype.go -+++ b/src/cmd/internal/objabi/reloctype.go -@@ -310,11 +310,11 @@ const ( - // instruction, by encoding the address into the instruction. - R_CALLLOONG64 - -- // R_LOONG64_TLS_GD_PCREL_HI and R_LOONG64_TLS_GD_LO relocates an pcalau12i, addi.d pair to compute -+ // R_LOONG64_TLS_IE_PCREL_HI and R_LOONG64_TLS_IE_LO relocates an pcalau12i, addi.d pair to compute - // the address of the GOT slot of the tls symbol, the address will be passed to __tls_get_addr to - // get the true address of tlsvar. -- R_LOONG64_TLS_GD_PCREL_HI -- R_LOONG64_TLS_GD_LO -+ R_LOONG64_TLS_IE_PCREL_HI -+ R_LOONG64_TLS_IE_LO - - // R_LOONG64_GOTPCREL_HI and R_LOONG64_GOT_LO relocates an pcalau12i, ld.d pair to compute - // the address of the GOT slot of the referenced symbol. -diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go -index ad4258c4a3..53104c76b3 100644 ---- a/src/cmd/internal/objabi/reloctype_string.go -+++ b/src/cmd/internal/objabi/reloctype_string.go -@@ -79,8 +79,8 @@ func _() { - _ = x[R_ADDRLOONG64TLS-69] - _ = x[R_ADDRLOONG64TLSU-70] - _ = x[R_CALLLOONG64-71] -- _ = x[R_LOONG64_TLS_GD_PCREL_HI-72] -- _ = x[R_LOONG64_TLS_GD_LO-73] -+ _ = x[R_LOONG64_TLS_IE_PCREL_HI-72] -+ _ = x[R_LOONG64_TLS_IE_LO-73] - _ = x[R_LOONG64_GOTPCREL_HI-74] - _ = x[R_LOONG64_GOT_LO-75] - _ = x[R_JMPLOONG64-76] -@@ -91,7 +91,7 @@ func _() { - _ = x[R_XCOFFREF-81] - } - --const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_GD_PCREL_HIR_LOONG64_TLS_GD_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" -+const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" - - var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090} - -diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go -index 238d77a610..de2e93f757 100644 ---- a/src/cmd/link/internal/loong64/asm.go -+++ b/src/cmd/link/internal/loong64/asm.go -@@ -59,14 +59,14 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, - out.Write64(uint64(elf.R_LARCH_B26) | uint64(elfsym)<<32) - out.Write64(uint64(r.Xadd)) - -- case objabi.R_LOONG64_TLS_GD_PCREL_HI: -+ case objabi.R_LOONG64_TLS_IE_PCREL_HI: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_TLS_GD_PC_HI20) | uint64(elfsym)<<32) -+ out.Write64(uint64(elf.R_LARCH_TLS_IE_PC_HI20) | uint64(elfsym)<<32) - out.Write64(uint64(0x0)) - -- case objabi.R_LOONG64_TLS_GD_LO: -+ case objabi.R_LOONG64_TLS_IE_LO: - out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_GOT_PC_LO12) | uint64(elfsym)<<32) -+ out.Write64(uint64(elf.R_LARCH_TLS_IE_PC_LO12) | uint64(elfsym)<<32) - out.Write64(uint64(0x0)) - - case objabi.R_LOONG64_GOTPCREL_HI: -@@ -126,9 +126,9 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade - objabi.R_CALLLOONG64, - objabi.R_JMPLOONG64: - return val, 1, true -- case objabi.R_LOONG64_TLS_GD_PCREL_HI, -+ case objabi.R_LOONG64_TLS_IE_PCREL_HI, - objabi.R_LOONG64_GOTPCREL_HI, -- objabi.R_LOONG64_TLS_GD_LO, -+ objabi.R_LOONG64_TLS_IE_LO, - objabi.R_LOONG64_GOT_LO: - return val, 1, true - } -@@ -185,8 +185,8 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy - objabi.R_GOTOFF, - objabi.R_CALLLOONG64, - objabi.R_JMPLOONG64, -- objabi.R_LOONG64_TLS_GD_PCREL_HI, -- objabi.R_LOONG64_TLS_GD_LO: -+ objabi.R_LOONG64_TLS_IE_PCREL_HI, -+ objabi.R_LOONG64_TLS_IE_LO: - return ld.ExtrelocSimple(ldr, r), true - } - return loader.ExtReloc{}, false --- -2.38.1 - diff --git a/0026-cmd-compile-cmd-dist-cmd-go-internal-enable-buildmod.patch b/0026-cmd-compile-cmd-dist-cmd-go-internal-enable-buildmod.patch deleted file mode 100644 index 9c2632ac89557a589ad03ac8bc107a8d4b8523d3..0000000000000000000000000000000000000000 --- a/0026-cmd-compile-cmd-dist-cmd-go-internal-enable-buildmod.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 7ced8f3799641fb3b75f5fe8b7157ff0143d1435 Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Sun, 4 Dec 2022 15:06:45 +0800 -Subject: [PATCH 26/62] cmd/compile, cmd/dist, cmd/go, internal: enable - buildmode=pie for linux/loong64 - -Only external linking is supported for now, due to missing adddynrel -implementation for loong64. Enable the corresponding tests while at it. - -Change-Id: I6906d9eb4bd8655c685b059283e200cb7e210369 ---- - src/cmd/compile/internal/base/flag.go | 2 +- - src/cmd/dist/test.go | 2 +- - src/cmd/go/go_test.go | 2 +- - src/internal/platform/supported.go | 2 +- - 4 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/src/cmd/compile/internal/base/flag.go b/src/cmd/compile/internal/base/flag.go -index a09740f736..a18da88717 100644 ---- a/src/cmd/compile/internal/base/flag.go -+++ b/src/cmd/compile/internal/base/flag.go -@@ -204,7 +204,7 @@ func ParseFlags() { - if Flag.Race && !platform.RaceDetectorSupported(buildcfg.GOOS, buildcfg.GOARCH) { - log.Fatalf("%s/%s does not support -race", buildcfg.GOOS, buildcfg.GOARCH) - } -- if (*Flag.Shared || *Flag.Dynlink || *Flag.LinkShared) && !Ctxt.Arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.Loong64, sys.I386, sys.PPC64, sys.RISCV64, sys.S390X) { -+ if (*Flag.Shared || *Flag.Dynlink || *Flag.LinkShared) && !Ctxt.Arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.I386, sys.Loong64, sys.PPC64, sys.RISCV64, sys.S390X) { - log.Fatalf("%s/%s does not support -shared", buildcfg.GOOS, buildcfg.GOARCH) - } - parseSpectre(Flag.Spectre) // left as string for RecordFlags -diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go -index ac93194165..04c7fabcaa 100644 ---- a/src/cmd/dist/test.go -+++ b/src/cmd/dist/test.go -@@ -1218,7 +1218,7 @@ func (t *tester) supportedBuildmode(mode string) bool { - case "pie": - switch pair { - case "aix/ppc64", -- "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-ppc64le", "linux-riscv64", "linux-s390x", -+ "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-loong64", "linux-ppc64le", "linux-riscv64", "linux-s390x", - "android-amd64", "android-arm", "android-arm64", "android-386": - return true - case "darwin-amd64", "darwin-arm64": -diff --git a/src/cmd/go/go_test.go b/src/cmd/go/go_test.go -index 6b6620feeb..182ca02a24 100644 ---- a/src/cmd/go/go_test.go -+++ b/src/cmd/go/go_test.go -@@ -2129,7 +2129,7 @@ func TestBuildmodePIE(t *testing.T) { - - platform := fmt.Sprintf("%s/%s", runtime.GOOS, runtime.GOARCH) - switch platform { -- case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/riscv64", "linux/s390x", -+ case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/loong64", "linux/ppc64le", "linux/riscv64", "linux/s390x", - "android/amd64", "android/arm", "android/arm64", "android/386", - "freebsd/amd64", - "windows/386", "windows/amd64", "windows/arm", "windows/arm64": -diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go -index e6d8adb40e..f00f978eb7 100644 ---- a/src/internal/platform/supported.go -+++ b/src/internal/platform/supported.go -@@ -160,7 +160,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { - - case "pie": - switch platform { -- case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/riscv64", "linux/s390x", -+ case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/loong64", "linux/ppc64le", "linux/riscv64", "linux/s390x", - "android/amd64", "android/arm", "android/arm64", "android/386", - "freebsd/amd64", - "darwin/amd64", "darwin/arm64", --- -2.38.1 - diff --git a/0075-cmd-compile-internal-add-spill-support-for-loong64-r.patch b/0026-cmd-compile-internal-add-spill-support-for-loong64-r.patch similarity index 88% rename from 0075-cmd-compile-internal-add-spill-support-for-loong64-r.patch rename to 0026-cmd-compile-internal-add-spill-support-for-loong64-r.patch index 3d3d05dc0c33b3d5cdab9cc85b510cfe7ef05bf8..e2bce1f458eca5581343a427cd7242d35a5c810a 100644 --- a/0075-cmd-compile-internal-add-spill-support-for-loong64-r.patch +++ b/0026-cmd-compile-internal-add-spill-support-for-loong64-r.patch @@ -1,10 +1,13 @@ -From a67c19b91b764e21106876cf859b14aeca62ac0c Mon Sep 17 00:00:00 2001 +From 6220821537490f266d3fbb3bdd36271aaeddc87c Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 20:10:33 +0800 -Subject: [PATCH 13/30] cmd/compile/internal: add spill support for loong64 +Subject: [PATCH 26/51] cmd/compile/internal: add spill support for loong64 regABI -Change-Id: I9fef78e5ff1b7518142bcf62aa79e666c10d3442 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I4a194177562dd1f15add5c32696bd69b027d88d7 --- src/cmd/compile/internal/loong64/galign.go | 2 ++ src/cmd/compile/internal/loong64/ssa.go | 30 ++++++++++++++++++++++ @@ -22,7 +25,7 @@ index 99ab7bdfb5..a613165054 100644 + arch.SpillArgReg = spillArgReg } diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 98685ca43b..3453e7bf06 100644 +index f348f396b8..278f30649f 100644 --- a/src/cmd/compile/internal/loong64/ssa.go +++ b/src/cmd/compile/internal/loong64/ssa.go @@ -10,6 +10,7 @@ import ( @@ -50,7 +53,7 @@ index 98685ca43b..3453e7bf06 100644 ssagen.CheckArgReg(v) case ssa.OpLOONG64ADDV, ssa.OpLOONG64SUBV, -@@ -762,3 +773,22 @@ func ssaGenBlock(s *ssagen.State, b, next *ssa.Block) { +@@ -763,3 +774,22 @@ func ssaGenBlock(s *ssagen.State, b, next *ssa.Block) { b.Fatalf("branch not implemented: %s", b.LongString()) } } diff --git a/0076-cmd-compile-update-loong64-CALL-ops.patch b/0027-cmd-compile-update-loong64-CALL-ops.patch similarity index 87% rename from 0076-cmd-compile-update-loong64-CALL-ops.patch rename to 0027-cmd-compile-update-loong64-CALL-ops.patch index 0fe200ab313a24b7b6b0859b09978b33917ce8e2..0d2326c33b70d1c0b934ee5560df55bdee527108 100644 --- a/0076-cmd-compile-update-loong64-CALL-ops.patch +++ b/0027-cmd-compile-update-loong64-CALL-ops.patch @@ -1,18 +1,21 @@ -From e9dc5fa492dbe9859b3a34657ac5e40749ec25bb Mon Sep 17 00:00:00 2001 +From 8ae8fa8d7878f23e47e4e8082260892ee7b6e211 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 20:23:46 +0800 -Subject: [PATCH 14/30] cmd/compile: update loong64 CALL* ops +Subject: [PATCH 27/51] cmd/compile: update loong64 CALL* ops allow the loong64 CALL* ops to take variable number of args -Change-Id: I405e418a2084ec14f9d3b0f776a7454e198e3281 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I117c6b48e0fbbe3ed8fd4c133895178c2cf288b1 --- src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go | 8 ++++---- src/cmd/compile/internal/ssa/opGen.go | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index 722d69e8e3..90e8832c71 100644 +index 8e3f3ce720..9a83965493 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go @@ -273,10 +273,10 @@ func init() { @@ -31,10 +34,10 @@ index 722d69e8e3..90e8832c71 100644 // duffzero // arg0 = address of memory to zero diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 8893df9140..eef5087061 100644 +index 482046f016..290ad2682c 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -24173,7 +24173,7 @@ var opcodeTable = [...]opInfo{ +@@ -24216,7 +24216,7 @@ var opcodeTable = [...]opInfo{ { name: "CALLstatic", auxType: auxCallOff, @@ -43,7 +46,7 @@ index 8893df9140..eef5087061 100644 clobberFlags: true, call: true, reg: regInfo{ -@@ -24183,7 +24183,7 @@ var opcodeTable = [...]opInfo{ +@@ -24226,7 +24226,7 @@ var opcodeTable = [...]opInfo{ { name: "CALLtail", auxType: auxCallOff, @@ -52,7 +55,7 @@ index 8893df9140..eef5087061 100644 clobberFlags: true, call: true, tailCall: true, -@@ -24194,7 +24194,7 @@ var opcodeTable = [...]opInfo{ +@@ -24237,7 +24237,7 @@ var opcodeTable = [...]opInfo{ { name: "CALLclosure", auxType: auxCallOff, @@ -61,7 +64,7 @@ index 8893df9140..eef5087061 100644 clobberFlags: true, call: true, reg: regInfo{ -@@ -24208,7 +24208,7 @@ var opcodeTable = [...]opInfo{ +@@ -24251,7 +24251,7 @@ var opcodeTable = [...]opInfo{ { name: "CALLinter", auxType: auxCallOff, diff --git a/0027-net-disable-TestLookupDotsWithRemoteSource-and-TestL.patch b/0027-net-disable-TestLookupDotsWithRemoteSource-and-TestL.patch deleted file mode 100644 index 2d64381d8ad9cf23eb52739361dcea8ce9837761..0000000000000000000000000000000000000000 --- a/0027-net-disable-TestLookupDotsWithRemoteSource-and-TestL.patch +++ /dev/null @@ -1,51 +0,0 @@ -From c9ef559e66fb064b435e45915829c2a93c7541c0 Mon Sep 17 00:00:00 2001 -From: Michael Anthony Knyszek -Date: Fri, 11 Nov 2022 17:26:45 +0000 -Subject: [PATCH 27/62] net: disable TestLookupDotsWithRemoteSource and - TestLookupGoogleSRV - -These tests fail consistently due to a DNS change causing widespread -trybot outages. - -Fixes #56707. - -Reviewed-on: https://go-review.googlesource.com/c/go/+/449640 -Reviewed-by: Carlos Amedee -Reviewed-by: Bryan Mills -Run-TryBot: Michael Knyszek -TryBot-Result: Gopher Robot -Reviewed-by: Damien Neil -Change-Id: I7ea7ed1f701ce5a5f930885a9c817fdebd6aee4d ---- - src/net/lookup_test.go | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/src/net/lookup_test.go b/src/net/lookup_test.go -index fa1a706c78..cb2b64f0b5 100644 ---- a/src/net/lookup_test.go -+++ b/src/net/lookup_test.go -@@ -71,6 +71,10 @@ var lookupGoogleSRVTests = []struct { - var backoffDuration = [...]time.Duration{time.Second, 5 * time.Second, 30 * time.Second} - - func TestLookupGoogleSRV(t *testing.T) { -+ // TODO(mknyszek): Figure out next steps for this test. This is just -+ // a quick fix. -+ t.Skip("fails consistently due to an upstream DNS change; see #56707.") -+ - t.Parallel() - mustHaveExternalNetwork(t) - -@@ -633,6 +637,10 @@ func TestLookupDotsWithLocalSource(t *testing.T) { - } - - func TestLookupDotsWithRemoteSource(t *testing.T) { -+ // TODO(mknyszek): Figure out next steps for this test. This is just -+ // a quick fix. -+ t.Skip("fails consistently due to an upstream DNS change; see #56707.") -+ - if runtime.GOOS == "darwin" || runtime.GOOS == "ios" { - testenv.SkipFlaky(t, 27992) - } --- -2.38.1 - diff --git a/0028-enable-c-archive-test-on-linux-loong64.patch b/0028-enable-c-archive-test-on-linux-loong64.patch deleted file mode 100644 index f515e441cc79f2802bf0baf6789cda65c2425a4e..0000000000000000000000000000000000000000 --- a/0028-enable-c-archive-test-on-linux-loong64.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 580019af2e1c2f6e0bf62aa19115208594e4f7d2 Mon Sep 17 00:00:00 2001 -From: Xiaolin Zhao -Date: Fri, 10 Mar 2023 14:15:30 +0800 -Subject: [PATCH 28/62] enable c-archive test on linux/loong64 - -Since c-shared is already supported, c-archive can be used. - -Change-Id: I34e15ed4206d9b58f3c7768f654aff147342fa07 ---- - src/cmd/dist/test.go | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go -index 04c7fabcaa..920018721d 100644 ---- a/src/cmd/dist/test.go -+++ b/src/cmd/dist/test.go -@@ -1183,7 +1183,7 @@ func (t *tester) supportedBuildmode(mode string) bool { - switch pair { - case "aix-ppc64", - "darwin-amd64", "darwin-arm64", "ios-arm64", -- "linux-amd64", "linux-386", "linux-ppc64le", "linux-riscv64", "linux-s390x", -+ "linux-amd64", "linux-386", "linux-loong64", "linux-ppc64le", "linux-riscv64", "linux-s390x", - "freebsd-amd64", - "windows-amd64", "windows-386": - return true --- -2.38.1 - diff --git a/0077-runtime-make-duff-device-as-ABIInternal-for-loong64.patch b/0028-runtime-make-duff-device-as-ABIInternal-for-loong64.patch similarity index 86% rename from 0077-runtime-make-duff-device-as-ABIInternal-for-loong64.patch rename to 0028-runtime-make-duff-device-as-ABIInternal-for-loong64.patch index 4e7c925b2a554b30ffb37785f491bf79bbc56db6..1d719712a7d0fc0570ff1415c34c49eb1a7b1abb 100644 --- a/0077-runtime-make-duff-device-as-ABIInternal-for-loong64.patch +++ b/0028-runtime-make-duff-device-as-ABIInternal-for-loong64.patch @@ -1,9 +1,12 @@ -From 5c0b0651374fada6fd94984df8cfecc6e0fe9f9c Mon Sep 17 00:00:00 2001 +From 46396817e001306224c5b821c691f92a68e4a598 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 20:54:16 +0800 -Subject: [PATCH 15/30] runtime: make duff device as ABIInternal for loong64 +Subject: [PATCH 28/51] runtime: make duff device as ABIInternal for loong64 -Change-Id: I822ed1e88e7acbeaf8b321ad79036a940c0f9711 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Iaf7a7b7cb1897da859f59fafdedc4a249f867e98 --- src/runtime/duff_loong64.s | 4 ++-- src/runtime/mkduff.go | 4 ++-- @@ -32,7 +35,7 @@ index df8b653965..b05502d91d 100644 ADDV $8, R20 MOVV R30, (R21) diff --git a/src/runtime/mkduff.go b/src/runtime/mkduff.go -index 982321ead7..5fee3f95b6 100644 +index 77674254d4..b7f07b5087 100644 --- a/src/runtime/mkduff.go +++ b/src/runtime/mkduff.go @@ -181,7 +181,7 @@ func zeroLOONG64(w io.Writer) { diff --git a/0029-cmd-internal-cmd-link-remove-invalid-GOT-relative-re.patch b/0029-cmd-internal-cmd-link-remove-invalid-GOT-relative-re.patch deleted file mode 100644 index 854bffe6190ee9b0fd5ed6b636bf7e4343852f19..0000000000000000000000000000000000000000 --- a/0029-cmd-internal-cmd-link-remove-invalid-GOT-relative-re.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 75f79b2ed8a053edfacb52ca0231f076b48aa943 Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Fri, 10 Mar 2023 10:48:24 +0800 -Subject: [PATCH 29/62] cmd/internal, cmd/link: remove invalid GOT relative - relocations - -Change-Id: I14bf211cb3760d4d1f8e9e2e486cdca45c64889a ---- - src/cmd/internal/obj/loong64/asm.go | 2 -- - src/cmd/internal/objabi/reloctype.go | 10 ++-------- - src/cmd/internal/objabi/reloctype_string.go | 20 +++++++++----------- - src/cmd/link/internal/loong64/asm.go | 21 +++------------------ - 4 files changed, 14 insertions(+), 39 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 792ed22a02..ca82986bb3 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1133,7 +1133,6 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - o3 := uint32(0) - o4 := uint32(0) - o5 := uint32(0) -- o6 := uint32(0) - - add := AADDU - add = AADDVU -@@ -1681,7 +1680,6 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - out[2] = o3 - out[3] = o4 - out[4] = o5 -- out[5] = o6 - } - - func (c *ctxt0) vregoff(a *obj.Addr) int64 { -diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go -index db061632cf..1a6a73fe12 100644 ---- a/src/cmd/internal/objabi/reloctype.go -+++ b/src/cmd/internal/objabi/reloctype.go -@@ -310,17 +310,11 @@ const ( - // instruction, by encoding the address into the instruction. - R_CALLLOONG64 - -- // R_LOONG64_TLS_IE_PCREL_HI and R_LOONG64_TLS_IE_LO relocates an pcalau12i, addi.d pair to compute -- // the address of the GOT slot of the tls symbol, the address will be passed to __tls_get_addr to -- // get the true address of tlsvar. -+ // R_LOONG64_TLS_IE_PCREL_HI and R_LOONG64_TLS_IE_LO relocates an pcalau12i, ld.d pair to compute -+ // the address of the GOT slot of the tls symbol. - R_LOONG64_TLS_IE_PCREL_HI - R_LOONG64_TLS_IE_LO - -- // R_LOONG64_GOTPCREL_HI and R_LOONG64_GOT_LO relocates an pcalau12i, ld.d pair to compute -- // the address of the GOT slot of the referenced symbol. -- R_LOONG64_GOTPCREL_HI -- R_LOONG64_GOT_LO -- - // R_JMPLOONG64 resolves to non-PC-relative target address of a JMP instruction, - // by encoding the address into the instruction. - R_JMPLOONG64 -diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go -index 53104c76b3..8cfff5ae8c 100644 ---- a/src/cmd/internal/objabi/reloctype_string.go -+++ b/src/cmd/internal/objabi/reloctype_string.go -@@ -1,4 +1,4 @@ --// Code generated by "stringer -type=RelocType"; DO NOT EDIT. -+// Code generated by "stringer -type=RelocType cmd/internal/objabi/reloctype.go"; DO NOT EDIT. - - package objabi - -@@ -81,19 +81,17 @@ func _() { - _ = x[R_CALLLOONG64-71] - _ = x[R_LOONG64_TLS_IE_PCREL_HI-72] - _ = x[R_LOONG64_TLS_IE_LO-73] -- _ = x[R_LOONG64_GOTPCREL_HI-74] -- _ = x[R_LOONG64_GOT_LO-75] -- _ = x[R_JMPLOONG64-76] -- _ = x[R_ADDRMIPSU-77] -- _ = x[R_ADDRMIPSTLS-78] -- _ = x[R_ADDRCUOFF-79] -- _ = x[R_WASMIMPORT-80] -- _ = x[R_XCOFFREF-81] -+ _ = x[R_JMPLOONG64-74] -+ _ = x[R_ADDRMIPSU-75] -+ _ = x[R_ADDRMIPSTLS-76] -+ _ = x[R_ADDRCUOFF-77] -+ _ = x[R_WASMIMPORT-78] -+ _ = x[R_XCOFFREF-79] - } - --const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" -+const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" - --var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090} -+var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 996, 1007, 1020, 1031, 1043, 1053} - - func (i RelocType) String() string { - i -= 1 -diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go -index de2e93f757..2f760fd231 100644 ---- a/src/cmd/link/internal/loong64/asm.go -+++ b/src/cmd/link/internal/loong64/asm.go -@@ -69,16 +69,6 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, - out.Write64(uint64(elf.R_LARCH_TLS_IE_PC_LO12) | uint64(elfsym)<<32) - out.Write64(uint64(0x0)) - -- case objabi.R_LOONG64_GOTPCREL_HI: -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_GOT_PC_HI20) | uint64(elfsym)<<32) -- out.Write64(uint64(0x0)) -- -- case objabi.R_LOONG64_GOT_LO: -- out.Write64(uint64(sectoff)) -- out.Write64(uint64(elf.R_LARCH_GOT_PC_LO12) | uint64(elfsym)<<32) -- out.Write64(uint64(0x0)) -- - // The pcaddu12i + addi.d instructions is used to obtain address of a symbol on Loong64. - // The low 12-bit of the symbol address need to be added. The addi.d instruction have - // signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced -@@ -124,12 +114,9 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade - case objabi.R_ADDRLOONG64TLS, - objabi.R_ADDRLOONG64TLSU, - objabi.R_CALLLOONG64, -- objabi.R_JMPLOONG64: -- return val, 1, true -- case objabi.R_LOONG64_TLS_IE_PCREL_HI, -- objabi.R_LOONG64_GOTPCREL_HI, -- objabi.R_LOONG64_TLS_IE_LO, -- objabi.R_LOONG64_GOT_LO: -+ objabi.R_JMPLOONG64, -+ objabi.R_LOONG64_TLS_IE_PCREL_HI, -+ objabi.R_LOONG64_TLS_IE_LO: - return val, 1, true - } - } -@@ -174,8 +161,6 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant - func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sym) (loader.ExtReloc, bool) { - switch r.Type() { - case objabi.R_ADDRLOONG64, -- objabi.R_LOONG64_GOTPCREL_HI, -- objabi.R_LOONG64_GOT_LO, - objabi.R_ADDRLOONG64U: - return ld.ExtrelocViaOuterSym(ldr, r, s), true - --- -2.38.1 - diff --git a/0078-runtime-support-regABI-and-add-spill-functions-in-ru.patch b/0029-runtime-support-regABI-and-add-spill-functions-in-ru.patch similarity index 90% rename from 0078-runtime-support-regABI-and-add-spill-functions-in-ru.patch rename to 0029-runtime-support-regABI-and-add-spill-functions-in-ru.patch index c86b7c410a9f04bd48e5d5c2d69c778f74108465..9ed7653d7d1acbaa0c481888da1b2377b01e4711 100644 --- a/0078-runtime-support-regABI-and-add-spill-functions-in-ru.patch +++ b/0029-runtime-support-regABI-and-add-spill-functions-in-ru.patch @@ -1,17 +1,20 @@ -From 1687b48c49d741fa04cfd90fbe737320f761e8f5 Mon Sep 17 00:00:00 2001 +From 895275eb4c8bb5d168c2d426b7ec04ca18abd743 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 15 Aug 2023 21:09:16 +0800 -Subject: [PATCH 16/30] runtime: support regABI and add spill functions in +Subject: [PATCH 29/51] runtime: support regABI and add spill functions in runtime for loong64 -Change-Id: I9786ffeaa3ca587280b4a4126f6f6409067f6c1d +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Ib5b0868664521035f33c1c488dccd24a5ace2186 --- - src/runtime/asm_loong64.s | 293 ++++++++++++++++++++++++++++------- - src/runtime/stubs_loong64.go | 8 + - 2 files changed, 243 insertions(+), 58 deletions(-) + src/runtime/asm_loong64.s | 295 ++++++++++++++++++++++++++++------- + src/runtime/stubs_loong64.go | 7 + + 2 files changed, 243 insertions(+), 59 deletions(-) diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index 4a21860316..cda90ca473 100644 +index 23cbd09947..0a970ef20c 100644 --- a/src/runtime/asm_loong64.s +++ b/src/runtime/asm_loong64.s @@ -72,7 +72,7 @@ nocgo: @@ -126,7 +129,16 @@ index 4a21860316..cda90ca473 100644 JAL runtime·reflectcallmove(SB) RET -@@ -580,14 +592,14 @@ TEXT runtime·abort(SB),NOSPLIT|NOFRAME,$0-0 +@@ -567,7 +579,7 @@ havem: + // If the m on entry wasn't nil, + // 1. the thread might be a Go thread, + // 2. or it wasn't the first call from a C thread on pthread platforms, +- // since then we skip dropm to reuse the m in the first call. ++ // since then we skip dropm to resue the m in the first call. + MOVV savedm-8(SP), R12 + BNE R12, droppedm + +@@ -604,14 +616,14 @@ TEXT runtime·abort(SB),NOSPLIT|NOFRAME,$0-0 UNDEF // AES hashing not implemented for loong64 @@ -149,7 +161,7 @@ index 4a21860316..cda90ca473 100644 TEXT runtime·return0(SB), NOSPLIT, $0 MOVW $0, R19 -@@ -633,6 +645,86 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 +@@ -658,6 +670,86 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 MOVB R19, ret+0(FP) RET @@ -233,10 +245,10 @@ index 4a21860316..cda90ca473 100644 + RET +#endif + - // gcWriteBarrier performs a heap pointer write and informs the GC. + // gcWriteBarrier informs the GC about heap pointer writes. // - // gcWriteBarrier does NOT follow the Go ABI. It takes two arguments: -@@ -740,71 +832,156 @@ flush: + // gcWriteBarrier does NOT follow the Go ABI. It accepts the +@@ -785,71 +877,156 @@ TEXT runtime·gcWriteBarrier8(SB),NOSPLIT,$0 // in the caller's stack frame. These stubs write the args into that stack space and // then tail call to the corresponding runtime handler. // The tail call makes these stubs disappear in backtraces. @@ -428,14 +440,13 @@ index 4a21860316..cda90ca473 100644 +#endif + JMP runtime·goPanicSliceConvert(SB) diff --git a/src/runtime/stubs_loong64.go b/src/runtime/stubs_loong64.go -index 22366f508c..bb3df20421 100644 +index 556983cad1..4576089b0b 100644 --- a/src/runtime/stubs_loong64.go +++ b/src/runtime/stubs_loong64.go -@@ -9,3 +9,11 @@ package runtime - // Called from assembly only; declared for go vet. +@@ -10,6 +10,13 @@ package runtime func load_g() func save_g() -+ + +// Used by reflectcall and the reflect package. +// +// Spills/loads arguments in registers to/from an internal/abi.RegArgs @@ -443,6 +454,9 @@ index 22366f508c..bb3df20421 100644 +func spillArgs() +func unspillArgs() + + // getfp returns the frame pointer register of its caller or 0 if not implemented. + // TODO: Make this a compiler intrinsic + func getfp() uintptr { return 0 } -- 2.38.1 diff --git a/0079-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch b/0030-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch similarity index 93% rename from 0079-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch rename to 0030-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch index 6de96fc68884f7913285f9db1fa6a40d5b2a4607..647e64151dd2d9522ae235d4628970dce59b714a 100644 --- a/0079-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch +++ b/0030-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch @@ -1,10 +1,13 @@ -From 5ff9ea06431efd6b35461e925b558cd426c99a73 Mon Sep 17 00:00:00 2001 +From bd62b7384c43a0c7ea49428092dc6ddc0e19096a Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 16 Aug 2023 08:28:28 +0800 -Subject: [PATCH 17/30] reflect, runtime: add reflect support for regABI on +Subject: [PATCH 30/51] reflect, runtime: add reflect support for regABI on loong64 -Change-Id: If355469bd716dbf08033d42319462b6cedaab884 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I9fd6eb122db91c0ac89e9d919d5d56a106d79fe4 --- src/reflect/asm_loong64.s | 77 ++++++++++++++++++++++++++++++++------- src/runtime/stkframe.go | 2 +- @@ -113,7 +116,7 @@ index 341a6d55c1..520f0afdd5 100644 + JAL runtime·unspillArgs(SB) RET diff --git a/src/runtime/stkframe.go b/src/runtime/stkframe.go -index 3ecf3a828c..527db75b88 100644 +index 5caacbacba..eca419c674 100644 --- a/src/runtime/stkframe.go +++ b/src/runtime/stkframe.go @@ -234,7 +234,7 @@ func (frame *stkframe) getStackMap(cache *pcvalueCache, debug bool) (locals, arg diff --git a/0030-runtime-no-need-to-save-these-registers-in-load_g-sa.patch b/0030-runtime-no-need-to-save-these-registers-in-load_g-sa.patch deleted file mode 100644 index 7d6f0ad69463c30e16cace0222516f5e3277b894..0000000000000000000000000000000000000000 --- a/0030-runtime-no-need-to-save-these-registers-in-load_g-sa.patch +++ /dev/null @@ -1,77 +0,0 @@ -From bc8d803c39c483059572013ce248059737aafe7e Mon Sep 17 00:00:00 2001 -From: limeidan -Date: Fri, 10 Mar 2023 10:49:08 +0800 -Subject: [PATCH 30/62] runtime: no need to save these registers in - load_g&save_g - -Change-Id: I69d7db05010e61e76fbbfb89ee8c4b90393f1367 ---- - src/runtime/tls_loong64.s | 39 --------------------------------------- - 1 file changed, 39 deletions(-) - -diff --git a/src/runtime/tls_loong64.s b/src/runtime/tls_loong64.s -index 100f28b5ca..9d43c60556 100644 ---- a/src/runtime/tls_loong64.s -+++ b/src/runtime/tls_loong64.s -@@ -2,58 +2,19 @@ - // Use of this source code is governed by a BSD-style - // license that can be found in the LICENSE file. - --#include "go_asm.h" --#include "go_tls.h" --#include "funcdata.h" - #include "textflag.h" - - // If !iscgo, this is a no-op. --// --// NOTE: mcall() assumes this clobbers only R30 (REGTMP). - TEXT runtime·save_g(SB),NOSPLIT,$0-0 - MOVB runtime·iscgo(SB), R30 - BEQ R30, nocgo -- -- // here use the func __tls_get_addr to get the address of tls_g, which clobbers these regs below. -- ADDV $-56, R3 -- MOVV R1, 0(R3) -- MOVV R4, 8(R3) -- MOVV R5, 16(R3) -- MOVV R6, 24(R3) -- MOVV R12, 32(R3) -- MOVV R13, 40(R3) -- MOVV R30, 48(R3) - MOVV g, runtime·tls_g(SB) -- MOVV 0(R3), R1 -- MOVV 8(R3), R4 -- MOVV 16(R3), R5 -- MOVV 24(R3), R6 -- MOVV 32(R3), R12 -- MOVV 40(R3), R13 -- MOVV 48(R3), R30 -- ADDV $56, R3 - - nocgo: - RET - - TEXT runtime·load_g(SB),NOSPLIT,$0-0 -- ADDV $-56, R3 -- MOVV R1, 0(R3) -- MOVV R4, 8(R3) -- MOVV R5, 16(R3) -- MOVV R6, 24(R3) -- MOVV R12, 32(R3) -- MOVV R13, 40(R3) -- MOVV R30, 48(R3) - MOVV runtime·tls_g(SB), g -- MOVV 0(R3), R1 -- MOVV 8(R3), R4 -- MOVV 16(R3), R5 -- MOVV 24(R3), R6 -- MOVV 32(R3), R12 -- MOVV 40(R3), R13 -- MOVV 48(R3), R30 -- ADDV $56, R3 - RET - - GLOBL runtime·tls_g(SB), TLSBSS, $8 --- -2.38.1 - diff --git a/0031-cmd-internal-obj-loong64-add-support-for-movgr2cf-an.patch b/0031-cmd-internal-obj-loong64-add-support-for-movgr2cf-an.patch deleted file mode 100644 index b72d439ad12dbba8d83a33c49d15482de9d680c4..0000000000000000000000000000000000000000 --- a/0031-cmd-internal-obj-loong64-add-support-for-movgr2cf-an.patch +++ /dev/null @@ -1,53 +0,0 @@ -From cc76b5e8c5e10adc8e3a187571ee2f996fb1f8f1 Mon Sep 17 00:00:00 2001 -From: huangqiqi -Date: Thu, 16 Mar 2023 13:16:06 +0800 -Subject: [PATCH 31/62] cmd/internal/obj/loong64: add support for movgr2cf and - movcf2gr instructions - -Change-Id: I223154d86a1034546a72c100125f33754737208e ---- - src/cmd/asm/internal/asm/testdata/loong64enc1.s | 3 +++ - src/cmd/internal/obj/loong64/asm.go | 9 +++++++++ - 2 files changed, 12 insertions(+) - -diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -index 0cc077c091..4f3cb2b2ee 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -@@ -222,3 +222,6 @@ lable2: - RDTIMELW R4, R0 // 80600000 - RDTIMEHW R4, R0 // 80640000 - RDTIMED R4, R5 // 85680000 -+ -+ MOVV FCC0, R4 // 04dc1401 -+ MOVV R4, FCC0 // 80d81401 -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index ca82986bb3..eff60104ce 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -324,6 +324,9 @@ var optab = []Optab{ - {AMOVV, C_REG, C_NONE, C_FREG, C_NONE, 47, 4, 0, sys.Loong64, 0}, - {AMOVV, C_FREG, C_NONE, C_REG, C_NONE, 48, 4, 0, sys.Loong64, 0}, - -+ {AMOVV, C_FCCREG, C_NONE, C_REG, C_NONE, 63, 4, 0, sys.Loong64, 0}, -+ {AMOVV, C_REG, C_NONE, C_FCCREG, C_NONE, 64, 4, 0, sys.Loong64, 0}, -+ - {AMOVW, C_ADDCON, C_NONE, C_FREG, C_NONE, 34, 8, 0, sys.Loong64, 0}, - {AMOVW, C_ANDCON, C_NONE, C_FREG, C_NONE, 34, 8, 0, sys.Loong64, 0}, - -@@ -1673,6 +1676,12 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - - case 62: // rdtimex rd, rj - o1 = OP_RR(c.oprr(p.As), uint32(p.To.Reg), uint32(p.RegTo2)) -+ case 63: // movv c_fcc0, c_reg ==> movcf2gr rd, cj -+ a := OP_TEN(8, 1335) -+ o1 = OP_RR(a, uint32(p.From.Reg), uint32(p.To.Reg)) -+ case 64: // movv c_reg, c_fcc0 ==> movgr2cf cd, rj -+ a := OP_TEN(8, 1334) -+ o1 = OP_RR(a, uint32(p.From.Reg), uint32(p.To.Reg)) - } - - out[0] = o1 --- -2.38.1 - diff --git a/0080-internal-bytealg-add-regABI-support-in-bytealg-funct.patch b/0031-internal-bytealg-add-regABI-support-in-bytealg-funct.patch similarity index 96% rename from 0080-internal-bytealg-add-regABI-support-in-bytealg-funct.patch rename to 0031-internal-bytealg-add-regABI-support-in-bytealg-funct.patch index 52eb4ce5e388f49302b796be9b1067e73f31db14..df472c2ef7eb1ba83c7381891576469a20822f2e 100644 --- a/0080-internal-bytealg-add-regABI-support-in-bytealg-funct.patch +++ b/0031-internal-bytealg-add-regABI-support-in-bytealg-funct.patch @@ -1,10 +1,13 @@ -From b34e459cedf1f60c0ce708519150c3b07e943f84 Mon Sep 17 00:00:00 2001 +From e6ad49b3e094b709db872b1694f918bff73ea13e Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 16 Aug 2023 08:55:13 +0800 -Subject: [PATCH 18/30] internal/bytealg: add regABI support in bytealg +Subject: [PATCH 31/51] internal/bytealg: add regABI support in bytealg functions on loong64 -Change-Id: I4b71cffc9352a099b25879d64128fdc6e337e792 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Ie9d5c39e8a1e011ed90ad78bc5bfa98a9cff3a0d --- src/internal/bytealg/compare_loong64.s | 95 ++++++++++++++---------- src/internal/bytealg/equal_loong64.s | 21 +++++- diff --git a/0081-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch b/0032-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch similarity index 89% rename from 0081-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch rename to 0032-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch index 9a5df539ad4a48aa58d81b0b02662eeabd192f31..85a30ee7e87fdf195bd009229d3c2e514ca7f269 100644 --- a/0081-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch +++ b/0032-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch @@ -1,10 +1,13 @@ -From 56fdf60cc13f6257bd82fd433c1001007b91b71b Mon Sep 17 00:00:00 2001 +From df4dd7ce9dd12599e48424014bb86fb319838d1b Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 16 Aug 2023 09:05:30 +0800 -Subject: [PATCH 19/30] runtime: add regABI support in memclr and memmove +Subject: [PATCH 32/51] runtime: add regABI support in memclr and memmove functions on loong64 -Change-Id: Iae416015604826cd5e0c4573b64bfab8efa6017a +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I2ff3421da41de4e1a88538e67c9baa26bcf6ffc0 --- src/runtime/memclr_loong64.s | 32 +++++++++++++++++--------------- src/runtime/memmove_loong64.s | 4 +++- diff --git a/0032-runtime-save-and-restore-fcc-registers-in-async-pree.patch b/0032-runtime-save-and-restore-fcc-registers-in-async-pree.patch deleted file mode 100644 index e623972a22b12070a89ea08dde251745d3c5ccfb..0000000000000000000000000000000000000000 --- a/0032-runtime-save-and-restore-fcc-registers-in-async-pree.patch +++ /dev/null @@ -1,72 +0,0 @@ -From d0b675c714413babaea745164c5d1db0ee6a33bf Mon Sep 17 00:00:00 2001 -From: huangqiqi -Date: Thu, 16 Mar 2023 13:16:38 +0800 -Subject: [PATCH 32/62] runtime: save and restore fcc registers in async - preempt on loong64 - -During the context switch of goroutine scheduling, the value of the -fcc0 register needs to be saved on the stack. - -Change-Id: Id390611cf891ca080187815607127493682fd6e2 ---- - src/runtime/mkpreempt.go | 6 ++++++ - src/runtime/preempt_loong64.s | 12 ++++++++---- - 2 files changed, 14 insertions(+), 4 deletions(-) - -diff --git a/src/runtime/mkpreempt.go b/src/runtime/mkpreempt.go -index 61d2d0247e..70eca7c7e2 100644 ---- a/src/runtime/mkpreempt.go -+++ b/src/runtime/mkpreempt.go -@@ -483,6 +483,12 @@ func genLoong64() { - l.add(movf, reg, regsize) - } - -+ // save and restore FCC0 -+ l.addSpecial( -+ mov+" FCC0, R4\n"+mov+" R4, %d(R3)", -+ mov+" %d(R3), R4\n"+mov+" R4, FCC0", -+ regsize) -+ - // allocate frame, save PC of interrupted instruction (in LR) - p(mov+" R1, -%d(R3)", l.stack) - p(sub+" $%d, R3", l.stack) -diff --git a/src/runtime/preempt_loong64.s b/src/runtime/preempt_loong64.s -index ba59a07b7f..999e72c470 100644 ---- a/src/runtime/preempt_loong64.s -+++ b/src/runtime/preempt_loong64.s -@@ -4,8 +4,8 @@ - #include "textflag.h" - - TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 -- MOVV R1, -472(R3) -- SUBV $472, R3 -+ MOVV R1, -480(R3) -+ SUBV $480, R3 - MOVV R4, 8(R3) - MOVV R5, 16(R3) - MOVV R6, 24(R3) -@@ -64,7 +64,11 @@ TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 - MOVD F29, 448(R3) - MOVD F30, 456(R3) - MOVD F31, 464(R3) -+ MOVV FCC0, R4 -+ MOVV R4, 472(R3) - CALL ·asyncPreempt2(SB) -+ MOVV 472(R3), R4 -+ MOVV R4, FCC0 - MOVD 464(R3), F31 - MOVD 456(R3), F30 - MOVD 448(R3), F29 -@@ -123,7 +127,7 @@ TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 - MOVV 24(R3), R6 - MOVV 16(R3), R5 - MOVV 8(R3), R4 -- MOVV 472(R3), R1 -+ MOVV 480(R3), R1 - MOVV (R3), R30 -- ADDV $480, R3 -+ ADDV $488, R3 - JMP (R30) --- -2.38.1 - diff --git a/0082-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch b/0033-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch similarity index 71% rename from 0082-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch rename to 0033-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch index 050643507e2311b5d974e588fdc35ca848e59be6..a90a3525ae782bda8eee72158be129ccce172518 100644 --- a/0082-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch +++ b/0033-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch @@ -1,19 +1,22 @@ -From 6845fd9e11557565de8f1d465963c3aaa8088957 Mon Sep 17 00:00:00 2001 +From 42077138313613c83730ec5bbb8839f2ad334373 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 16 Aug 2023 09:16:21 +0800 -Subject: [PATCH 20/30] cmd/internal/obj: set morestack arg spilling and regabi +Subject: [PATCH 33/51] cmd/internal/obj: set morestack arg spilling and regabi prologue on loong64 -Change-Id: If963fa399c4a44be0c0d7856c653863f7b163506 +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I60bd80818d7f308b05a3f11d71a552ddf6fa5086 --- src/cmd/internal/obj/loong64/obj.go | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go -index 803dd45de7..3e133c0c5a 100644 +index b0f5ac3087..ed5165418d 100644 --- a/src/cmd/internal/obj/loong64/obj.go +++ b/src/cmd/internal/obj/loong64/obj.go -@@ -619,6 +619,10 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -626,6 +626,10 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { p = c.ctxt.StartUnsafePoint(p, c.newprog) @@ -24,7 +27,7 @@ index 803dd45de7..3e133c0c5a 100644 // MOV REGLINK, -8/-16(SP) p = obj.Appendp(p, c.newprog) p.As = mov -@@ -683,6 +687,8 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -690,6 +694,8 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { p.To.Reg = REGSP p.Spadj = int32(-frameSize) @@ -33,7 +36,7 @@ index 803dd45de7..3e133c0c5a 100644 p = c.ctxt.EndUnsafePoint(p, c.newprog, -1) } -@@ -794,6 +800,10 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -801,6 +807,10 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { p = c.ctxt.EmitEntryStackMap(c.cursym, p, c.newprog) @@ -44,7 +47,7 @@ index 803dd45de7..3e133c0c5a 100644 // JAL runtime.morestack(SB) p = obj.Appendp(p, c.newprog) -@@ -808,6 +818,7 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { +@@ -815,6 +825,7 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { } p.Mark |= BRANCH diff --git a/0083-cmd-compile-fix-If-lowering-on-loong64.patch b/0034-cmd-compile-fix-If-lowering-on-loong64.patch similarity index 80% rename from 0083-cmd-compile-fix-If-lowering-on-loong64.patch rename to 0034-cmd-compile-fix-If-lowering-on-loong64.patch index 13bf9d79dd67b6d608bfc4faacd5de0aae6537a0..1b9007c1b1fa2d258f9399d9a6d7186ad7a03145 100644 --- a/0083-cmd-compile-fix-If-lowering-on-loong64.patch +++ b/0034-cmd-compile-fix-If-lowering-on-loong64.patch @@ -1,19 +1,22 @@ -From 035d2523f37bfd4d2aab041b2df19a5b2d410c13 Mon Sep 17 00:00:00 2001 +From 16b02f64637d3196c8bdafd9c830e68e16193705 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 16 Aug 2023 10:22:13 +0800 -Subject: [PATCH 21/30] cmd/compile: fix If lowering on loong64 +Subject: [PATCH 34/51] cmd/compile: fix If lowering on loong64 -Change-Id: I859e9d534fdf8b7e4d3aa16b330dbe09a2477eae +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Ib1f2130e382191a487325a064fec5c5c9f89016c --- .../compile/internal/ssa/_gen/LOONG64.rules | 3 ++- .../compile/internal/ssa/rewriteLOONG64.go | 27 +++++++++++++++++-- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -index b4bce73637..820193a256 100644 +index 25caad4406..c02434c53e 100644 --- a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules +++ b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -@@ -434,7 +434,7 @@ +@@ -435,7 +435,7 @@ (GetCallerSP ...) => (LoweredGetCallerSP ...) (GetCallerPC ...) => (LoweredGetCallerPC ...) @@ -22,7 +25,7 @@ index b4bce73637..820193a256 100644 // Write barrier. (WB ...) => (LoweredWB ...) -@@ -468,6 +468,7 @@ +@@ -469,6 +469,7 @@ (EQ (SGTconst [0] x) yes no) => (GEZ x yes no) (NE (SGT x (MOVVconst [0])) yes no) => (GTZ x yes no) (EQ (SGT x (MOVVconst [0])) yes no) => (LEZ x yes no) @@ -31,10 +34,10 @@ index b4bce73637..820193a256 100644 // fold offset into address (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr)) && is32Bit(off1+int64(off2)) => (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr) diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -index 5c1d30b0bb..a3f41b31b7 100644 +index bb09bd2e58..a279831747 100644 --- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go +++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -@@ -1823,6 +1823,26 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { +@@ -1854,6 +1854,26 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { } func rewriteValueLOONG64_OpLOONG64MOVBUreg(v *Value) bool { v_0 := v.Args[0] @@ -61,7 +64,7 @@ index 5c1d30b0bb..a3f41b31b7 100644 // match: (MOVBUreg x:(MOVBUload _ _)) // result: (MOVVreg x) for { -@@ -7695,6 +7715,7 @@ func rewriteValueLOONG64_OpZero(v *Value) bool { +@@ -7689,6 +7709,7 @@ func rewriteValueLOONG64_OpZero(v *Value) bool { return false } func rewriteBlockLOONG64(b *Block) bool { @@ -69,7 +72,7 @@ index 5c1d30b0bb..a3f41b31b7 100644 switch b.Kind { case BlockLOONG64EQ: // match: (EQ (FPFlagTrue cmp) yes no) -@@ -7894,10 +7915,12 @@ func rewriteBlockLOONG64(b *Block) bool { +@@ -7888,10 +7909,12 @@ func rewriteBlockLOONG64(b *Block) bool { } case BlockIf: // match: (If cond yes no) diff --git a/0084-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch b/0035-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch similarity index 89% rename from 0084-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch rename to 0035-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch index c4006b15424c2769876cb18aa22cdd7214650f31..70d343ba9dc670f705af7489da2ad5f770c6c580 100644 --- a/0084-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch +++ b/0035-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch @@ -1,10 +1,13 @@ -From 52326434c2d584ef3f762e50722aaee64bdb3b47 Mon Sep 17 00:00:00 2001 +From a2d7a462c2c5a642e062088b302ae80fce7f2c66 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Tue, 22 Aug 2023 19:50:03 +0800 -Subject: [PATCH 22/30] runtime/internal/syscall: use ABIInternal for Syscall6 +Subject: [PATCH 35/51] runtime/internal/syscall: use ABIInternal for Syscall6 on loong64 -Change-Id: I472b673e4f0d6de5c524c19936d4164971f7764b +Updates #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: I9ff50a2e5060f99826e2e8e1d99d86f9bca10e0c --- .../internal/syscall/asm_linux_loong64.s | 41 ++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/0036-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch b/0036-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch new file mode 100644 index 0000000000000000000000000000000000000000..dfb9a1cbb6a74b2221a0a56893e959b61fcad4ba --- /dev/null +++ b/0036-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch @@ -0,0 +1,132 @@ +From 973c47b829abcf41b6ad05167d3ef3ac8974e81b Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 16 Aug 2023 10:39:38 +0800 +Subject: [PATCH 36/51] cmd/compile, internal/buildcfg: enable regABI on + loong64, and add loong64 in test func hasRegisterABI +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +goos: linux +goarch: loong64 +pkg: test/bench/go1 +cpu: Loongson-3A5000 @ 2500.00MHz + │ bench.old │ bench.new │ + │ sec/op │ sec/op vs base │ +Template 116.4m ± 1% 101.3m ± 0% -12.94% (p=0.000 n=20) +Gzip 417.2m ± 0% 419.4m ± 0% +0.53% (p=0.000 n=20) +Gunzip 87.41m ± 0% 84.61m ± 0% -3.20% (p=0.000 n=20) +FmtFprintfEmpty 97.87n ± 0% 81.05n ± 0% -17.19% (p=0.000 n=20) +FmtFprintfString 151.1n ± 0% 140.9n ± 0% -6.75% (p=0.000 n=20) +FmtFprintfInt 155.6n ± 0% 143.0n ± 0% -8.10% (p=0.000 n=20) +FmtFprintfIntInt 236.9n ± 0% 225.1n ± 0% -5.00% (p=0.000 n=20) +FmtFprintfPrefixedInt 316.8n ± 0% 331.9n ± 0% +4.77% (p=0.000 n=20) +FmtFprintfFloat 401.5n ± 0% 380.0n ± 0% -5.35% (p=0.000 n=20) +FmtManyArgs 925.3n ± 0% 910.1n ± 0% -1.64% (p=0.000 n=20) +BinaryTree17 14.04 ± 1% 12.84 ± 0% -8.52% (p=0.000 n=20) +RegexpMatchEasy0_32 133.1n ± 0% 121.3n ± 0% -8.87% (p=0.000 n=20) +RegexpMatchEasy0_1K 1.363µ ± 0% 1.337µ ± 0% -1.91% (p=0.000 n=20) +RegexpMatchEasy1_32 162.7n ± 0% 152.6n ± 0% -6.24% (p=0.000 n=20) +RegexpMatchEasy1_1K 1.505µ ± 0% 1.740µ ± 0% +15.61% (p=0.000 n=20) +RegexpMatchMedium_32 1.429µ ± 0% 1.299µ ± 0% -9.10% (p=0.000 n=20) +RegexpMatchMedium_1K 41.76µ ± 0% 38.16µ ± 0% -8.61% (p=0.000 n=20) +RegexpMatchHard_32 2.094µ ± 0% 2.157µ ± 0% +3.01% (p=0.000 n=20) +RegexpMatchHard_1K 63.25µ ± 0% 64.72µ ± 0% +2.33% (p=0.000 n=20) +JSONEncode 18.00m ± 1% 17.46m ± 1% -3.05% (p=0.000 n=20) +JSONDecode 79.49m ± 0% 72.42m ± 0% -8.89% (p=0.000 n=20) +Revcomp 1.147 ± 0% 1.255 ± 0% +9.39% (p=0.000 n=20) +Fannkuch11 3.623 ± 0% 3.410 ± 0% -5.87% (p=0.000 n=20) +Fannkuch11 3.623 ± 0% 3.410 ± 0% -5.87% (p=0.000 n=20) +GobDecode 14.26m ± 0% 12.92m ± 0% -9.36% (p=0.000 n=20) +GobEncode 16.86m ± 1% 14.96m ± 0% -11.28% (p=0.000 n=20) +GoParse 8.721m ± 0% 8.125m ± 1% -6.84% (p=0.000 n=20) +Mandelbrot200 7.203m ± 0% 7.171m ± 0% -0.44% (p=0.000 n=20) +HTTPClientServer 83.96µ ± 0% 80.83µ ± 0% -3.72% (p=0.000 n=20) +TimeParse 415.3n ± 0% 389.1n ± 0% -6.31% (p=0.000 n=20) +TimeFormat 506.4n ± 0% 495.9n ± 0% -2.06% (p=0.000 n=20) +geomean 102.6µ 98.04µ -4.40% + + │ bench.old │ bench.new │ + │ B/s │ B/s vs base │ +Template 15.90Mi ± 1% 18.26Mi ± 0% +14.88% (p=0.000 n=20) +Gzip 44.36Mi ± 0% 44.12Mi ± 0% -0.53% (p=0.000 n=20) +Gunzip 211.7Mi ± 0% 218.7Mi ± 0% +3.31% (p=0.000 n=20) +RegexpMatchEasy0_32 229.3Mi ± 0% 251.6Mi ± 0% +9.72% (p=0.000 n=20) +RegexpMatchEasy0_1K 716.4Mi ± 0% 730.3Mi ± 0% +1.94% (p=0.000 n=20) +RegexpMatchEasy1_32 187.6Mi ± 0% 200.0Mi ± 0% +6.64% (p=0.000 n=20) +RegexpMatchEasy1_1K 649.1Mi ± 0% 561.3Mi ± 0% -13.52% (p=0.000 n=20) +RegexpMatchMedium_32 21.35Mi ± 0% 23.50Mi ± 0% +10.05% (p=0.000 n=20) +RegexpMatchMedium_1K 23.38Mi ± 0% 25.59Mi ± 0% +9.42% (p=0.000 n=20) +RegexpMatchHard_32 14.57Mi ± 0% 14.14Mi ± 0% -2.95% (p=0.000 n=20) +RegexpMatchHard_1K 15.44Mi ± 0% 15.09Mi ± 0% -2.29% (p=0.000 n=20) +JSONEncode 102.8Mi ± 1% 106.0Mi ± 1% +3.15% (p=0.000 n=20) +JSONDecode 23.28Mi ± 0% 25.55Mi ± 0% +9.75% (p=0.000 n=20) +Revcomp 211.3Mi ± 0% 193.1Mi ± 0% -8.58% (p=0.000 n=20) +GobDecode 51.34Mi ± 0% 56.64Mi ± 0% +10.33% (p=0.000 n=20) +GobEncode 43.42Mi ± 1% 48.93Mi ± 0% +12.71% (p=0.000 n=20) +GoParse 6.337Mi ± 0% 6.800Mi ± 1% +7.30% (p=0.000 n=20) +geomean 61.24Mi 63.63Mi +3.91% + +Update #40724 + +Co-authored-by: Xiaolin Zhao +Change-Id: Ica823b5fbe5b95705d07e9968cb9395fb51b97e4 +--- + src/cmd/compile/internal/ssa/config.go | 4 ++-- + src/cmd/compile/internal/ssa/debug_lines_test.go | 2 +- + src/internal/buildcfg/exp.go | 4 +++- + 3 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/src/cmd/compile/internal/ssa/config.go b/src/cmd/compile/internal/ssa/config.go +index 31a6ee1af8..2d90457379 100644 +--- a/src/cmd/compile/internal/ssa/config.go ++++ b/src/cmd/compile/internal/ssa/config.go +@@ -296,8 +296,8 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize, softfloat boo + c.registers = registersLOONG64[:] + c.gpRegMask = gpRegMaskLOONG64 + c.fpRegMask = fpRegMaskLOONG64 +- // c.intParamRegs = paramIntRegLOONG64 +- // c.floatParamRegs = paramFloatRegLOONG64 ++ c.intParamRegs = paramIntRegLOONG64 ++ c.floatParamRegs = paramFloatRegLOONG64 + c.FPReg = framepointerRegLOONG64 + c.LinkReg = linkRegLOONG64 + c.hasGReg = true +diff --git a/src/cmd/compile/internal/ssa/debug_lines_test.go b/src/cmd/compile/internal/ssa/debug_lines_test.go +index cf115107a1..af9e2a34cf 100644 +--- a/src/cmd/compile/internal/ssa/debug_lines_test.go ++++ b/src/cmd/compile/internal/ssa/debug_lines_test.go +@@ -44,7 +44,7 @@ func testGoArch() string { + + func hasRegisterABI() bool { + switch testGoArch() { +- case "amd64", "arm64", "ppc64", "ppc64le", "riscv": ++ case "amd64", "arm64", "loong64", "ppc64", "ppc64le", "riscv": + return true + } + return false +diff --git a/src/internal/buildcfg/exp.go b/src/internal/buildcfg/exp.go +index 513070c8af..0f29233fb3 100644 +--- a/src/internal/buildcfg/exp.go ++++ b/src/internal/buildcfg/exp.go +@@ -65,6 +65,8 @@ func ParseGOEXPERIMENT(goos, goarch, goexp string) (*ExperimentFlags, error) { + case "amd64", "arm64", "ppc64le", "ppc64", "riscv64": + regabiAlwaysOn = true + regabiSupported = true ++ case "loong64": ++ regabiSupported = true + } + + baseline := goexperiment.Flags{ +@@ -129,7 +131,7 @@ func ParseGOEXPERIMENT(goos, goarch, goexp string) (*ExperimentFlags, error) { + flags.RegabiWrappers = true + flags.RegabiArgs = true + } +- // regabi is only supported on amd64, arm64, riscv64, ppc64 and ppc64le. ++ // regabi is only supported on amd64, arm64, loong64, riscv64, ppc64 and ppc64le. + if !regabiSupported { + flags.RegabiWrappers = false + flags.RegabiArgs = false +-- +2.38.1 + diff --git a/0036-cmd-link-internal-support-buildmode-plugin-for-loong.patch b/0036-cmd-link-internal-support-buildmode-plugin-for-loong.patch deleted file mode 100644 index 79fc0af05853c9e1a87e0c087f09cb0500e33d51..0000000000000000000000000000000000000000 --- a/0036-cmd-link-internal-support-buildmode-plugin-for-loong.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 22b9666742538ee0a074b43ab18fbcd35d5fc673 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 22 Mar 2023 07:03:06 +0800 -Subject: [PATCH 36/62] cmd/{link,internal}: support -buildmode=plugin for - loong64 - -Signed-off-by: Guoqi Chen -Change-Id: I889409080d5f9f78d2fe78dd5373c428f031b587 ---- - src/cmd/link/internal/ld/config.go | 2 +- - src/internal/platform/supported.go | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/cmd/link/internal/ld/config.go b/src/cmd/link/internal/ld/config.go -index 5809d7eb93..cf516ad955 100644 ---- a/src/cmd/link/internal/ld/config.go -+++ b/src/cmd/link/internal/ld/config.go -@@ -96,7 +96,7 @@ func (mode *BuildMode) Set(s string) error { - switch buildcfg.GOOS { - case "linux": - switch buildcfg.GOARCH { -- case "386", "amd64", "arm", "arm64", "s390x", "ppc64le": -+ case "386", "amd64", "arm", "arm64", "loong64", "s390x", "ppc64le": - default: - return badmode() - } -diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go -index 8971edad94..8a0ff8372e 100644 ---- a/src/internal/platform/supported.go -+++ b/src/internal/platform/supported.go -@@ -180,7 +180,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { - - case "plugin": - switch platform { -- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/s390x", "linux/ppc64le", -+ case "linux/amd64", "linux/arm", "linux/arm64", "linux/loong64", "linux/386", "linux/s390x", "linux/ppc64le", - "android/amd64", "android/arm", "android/arm64", "android/386", - "darwin/amd64", "darwin/arm64", - "freebsd/amd64": --- -2.38.1 - diff --git a/0037-cmd-dist-test-enable-buildmode-shared-plugin-test-fo.patch b/0037-cmd-dist-test-enable-buildmode-shared-plugin-test-fo.patch deleted file mode 100644 index 53609321be19ec4ede1d39120a29699ea8c3f367..0000000000000000000000000000000000000000 --- a/0037-cmd-dist-test-enable-buildmode-shared-plugin-test-fo.patch +++ /dev/null @@ -1,35 +0,0 @@ -From e615b7408358f7faab8413d883c654b5a3653a95 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 22 Mar 2023 07:03:39 +0800 -Subject: [PATCH 37/62] cmd/dist/test: enable buildmode={shared,plugin} test - for loong64 - -Signed-off-by: Guoqi Chen -Change-Id: I6a215459ebbc153f5b0efeaeb3821fa54c24befe ---- - src/cmd/dist/test.go | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go -index 920018721d..f31e613711 100644 ---- a/src/cmd/dist/test.go -+++ b/src/cmd/dist/test.go -@@ -1201,13 +1201,13 @@ func (t *tester) supportedBuildmode(mode string) bool { - return false - case "shared": - switch pair { -- case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-ppc64le", "linux-s390x": -+ case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-loong64", "linux-ppc64le", "linux-s390x": - return true - } - return false - case "plugin": - switch pair { -- case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-s390x", "linux-ppc64le": -+ case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-loong64", "linux-s390x", "linux-ppc64le": - return true - case "darwin-amd64", "darwin-arm64": - return true --- -2.38.1 - diff --git a/0037-internal-abi-internal-buildcfg-always-enable-registe.patch b/0037-internal-abi-internal-buildcfg-always-enable-registe.patch new file mode 100644 index 0000000000000000000000000000000000000000..cab468180028409043f4642d3be3ce271cf26787 --- /dev/null +++ b/0037-internal-abi-internal-buildcfg-always-enable-registe.patch @@ -0,0 +1,121 @@ +From aa48248b897254b759d0587287b1e276da3ea549 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 30 Aug 2023 17:08:22 +0800 +Subject: [PATCH 37/51] internal/abi, internal/buildcfg: always enable register + ABI on loong64 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +goos: linux +goarch: loong64 +pkg: test/bench/go1 +cpu: Loongson-3C5000 @ 2200.00MHz + │ old.bench │ new.bench │ + │ sec/op │ sec/op vs base │ +BinaryTree17 14.48 ± 1% 12.71 ± 1% -12.19% (p=0.000 n=20) +Fannkuch11 3.873 ± 0% 4.117 ± 0% +6.28% (p=0.000 n=20) +FmtFprintfEmpty 110.00n ± 0% 91.88n ± 0% -16.47% (p=0.000 n=20) +FmtFprintfString 178.4n ± 0% 153.8n ± 0% -13.79% (p=0.000 n=20) +FmtFprintfInt 179.2n ± 0% 163.2n ± 0% -8.93% (p=0.000 n=20) +FmtFprintfIntInt 272.9n ± 0% 258.1n ± 0% -5.42% (p=0.000 n=20) +FmtFprintfPrefixedInt 382.8n ± 0% 344.1n ± 0% -10.11% (p=0.000 n=20) +FmtFprintfFloat 453.5n ± 0% 426.8n ± 0% -5.89% (p=0.000 n=20) +FmtManyArgs 1.052µ ± 0% 1.024µ ± 0% -2.71% (p=0.000 n=20) +GobDecode 15.96m ± 1% 13.77m ± 0% -13.72% (p=0.000 n=20) +GobEncode 17.95m ± 3% 15.25m ± 3% -15.03% (p=0.000 n=20) +Gzip 478.5m ± 0% 476.6m ± 0% -0.40% (p=0.000 n=20) +Gunzip 106.55m ± 0% 90.42m ± 0% -15.14% (p=0.000 n=20) +HTTPClientServer 109.4µ ± 0% 105.3µ ± 1% -3.75% (p=0.000 n=20) +JSONEncode 21.12m ± 0% 19.41m ± 0% -8.10% (p=0.000 n=20) +JSONDecode 83.09m ± 0% 77.81m ± 0% -6.35% (p=0.000 n=20) +Mandelbrot200 8.180m ± 0% 8.149m ± 0% -0.37% (p=0.000 n=20) +GoParse 9.657m ± 0% 8.913m ± 0% -7.70% (p=0.000 n=20) +RegexpMatchEasy0_32 152.4n ± 0% 136.5n ± 0% -10.43% (p=0.000 n=20) +RegexpMatchEasy0_1K 1.748µ ± 0% 1.713µ ± 0% -2.00% (p=0.000 n=20) +RegexpMatchEasy1_32 201.0n ± 0% 184.4n ± 0% -8.26% (p=0.000 n=20) +RegexpMatchEasy1_1K 1.852µ ± 0% 1.806µ ± 0% -2.48% (p=0.000 n=20) +RegexpMatchMedium_32 1.577µ ± 0% 1.525µ ± 0% -3.30% (p=0.000 n=20) +RegexpMatchMedium_1K 46.34µ ± 0% 45.22µ ± 0% -2.41% (p=0.000 n=20) +RegexpMatchHard_32 2.364µ ± 0% 2.458µ ± 0% +3.98% (p=0.000 n=20) +RegexpMatchHard_1K 71.53µ ± 0% 73.89µ ± 0% +3.30% (p=0.000 n=20) +Revcomp 1.474 ± 0% 1.308 ± 0% -11.21% (p=0.000 n=20) +Template 135.0m ± 0% 121.9m ± 0% -9.72% (p=0.000 n=20) +TimeParse 470.9n ± 0% 441.8n ± 0% -6.18% (p=0.000 n=20) +TimeFormat 584.6n ± 0% 563.3n ± 0% -3.63% (p=0.000 n=20) +geomean 118.1µ 110.3µ -6.58% + + │ old.bench │ new.bench │ + │ B/s │ B/s vs base │ +GobDecode 45.86Mi ± 1% 53.15Mi ± 0% +15.90% (p=0.000 n=20) +GobEncode 40.79Mi ± 3% 48.00Mi ± 3% +17.69% (p=0.000 n=20) +Gzip 38.68Mi ± 0% 38.83Mi ± 0% +0.41% (p=0.000 n=20) +Gunzip 173.7Mi ± 0% 204.7Mi ± 0% +17.84% (p=0.000 n=20) +JSONEncode 87.62Mi ± 0% 95.34Mi ± 0% +8.81% (p=0.000 n=20) +JSONDecode 22.27Mi ± 0% 23.78Mi ± 0% +6.79% (p=0.000 n=20) +GoParse 5.717Mi ± 0% 6.199Mi ± 0% +8.42% (p=0.000 n=20) +RegexpMatchEasy0_32 200.3Mi ± 0% 223.6Mi ± 0% +11.68% (p=0.000 n=20) +RegexpMatchEasy0_1K 558.5Mi ± 0% 570.2Mi ± 0% +2.10% (p=0.000 n=20) +RegexpMatchEasy1_32 151.8Mi ± 0% 165.5Mi ± 0% +9.02% (p=0.000 n=20) +RegexpMatchEasy1_1K 527.2Mi ± 0% 540.8Mi ± 0% +2.57% (p=0.000 n=20) +RegexpMatchMedium_32 19.35Mi ± 0% 20.02Mi ± 0% +3.45% (p=0.000 n=20) +RegexpMatchMedium_1K 21.08Mi ± 0% 21.59Mi ± 0% +2.44% (p=0.000 n=20) +RegexpMatchHard_32 12.91Mi ± 0% 12.42Mi ± 0% -3.84% (p=0.000 n=20) +RegexpMatchHard_1K 13.66Mi ± 0% 13.22Mi ± 0% -3.21% (p=0.000 n=20) +Revcomp 164.5Mi ± 0% 185.3Mi ± 0% +12.62% (p=0.000 n=20) +Template 13.71Mi ± 0% 15.19Mi ± 0% +10.78% (p=0.000 n=20) +geomean 52.97Mi 56.71Mi +7.06% + +Change-Id: I31497848e1fea6beb289a8f4d9a36795ee03253f +--- + src/internal/abi/abi_generic.go | 2 +- + src/internal/abi/abi_loong64.go | 2 -- + src/internal/buildcfg/exp.go | 4 +--- + 3 files changed, 2 insertions(+), 6 deletions(-) + +diff --git a/src/internal/abi/abi_generic.go b/src/internal/abi/abi_generic.go +index 76ef2e2898..a08d3208d4 100644 +--- a/src/internal/abi/abi_generic.go ++++ b/src/internal/abi/abi_generic.go +@@ -2,7 +2,7 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-//go:build !goexperiment.regabiargs && !amd64 && !arm64 && !ppc64 && !ppc64le && !riscv64 ++//go:build !goexperiment.regabiargs && !amd64 && !arm64 && !loong64 && !ppc64 && !ppc64le && !riscv64 + + package abi + +diff --git a/src/internal/abi/abi_loong64.go b/src/internal/abi/abi_loong64.go +index c2306ae8d8..10ad89815b 100644 +--- a/src/internal/abi/abi_loong64.go ++++ b/src/internal/abi/abi_loong64.go +@@ -2,8 +2,6 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-//go:build goexperiment.regabiargs +- + package abi + + const ( +diff --git a/src/internal/buildcfg/exp.go b/src/internal/buildcfg/exp.go +index 0f29233fb3..7c7cefba7b 100644 +--- a/src/internal/buildcfg/exp.go ++++ b/src/internal/buildcfg/exp.go +@@ -62,11 +62,9 @@ func ParseGOEXPERIMENT(goos, goarch, goexp string) (*ExperimentFlags, error) { + // always on. + var regabiSupported, regabiAlwaysOn bool + switch goarch { +- case "amd64", "arm64", "ppc64le", "ppc64", "riscv64": ++ case "amd64", "arm64", "loong64", "ppc64le", "ppc64", "riscv64": + regabiAlwaysOn = true + regabiSupported = true +- case "loong64": +- regabiSupported = true + } + + baseline := goexperiment.Flags{ +-- +2.38.1 + diff --git a/0087-all-delete-loong64-non-register-ABI-fallback-path.patch b/0038-all-delete-loong64-non-register-ABI-fallback-path.patch similarity index 96% rename from 0087-all-delete-loong64-non-register-ABI-fallback-path.patch rename to 0038-all-delete-loong64-non-register-ABI-fallback-path.patch index cbb0281a22b1968576b1ea1fbae3a6ae1ce4a5e9..321602af25e6795477365c22b3ce37bdb0ee4046 100644 --- a/0087-all-delete-loong64-non-register-ABI-fallback-path.patch +++ b/0038-all-delete-loong64-non-register-ABI-fallback-path.patch @@ -1,9 +1,9 @@ -From b2df2cb1acaa382cbf8d796c4f4487331e28261d Mon Sep 17 00:00:00 2001 +From f923c49a1b0b731d5db787e951d05df1f6d9f848 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 30 Aug 2023 17:49:55 +0800 -Subject: [PATCH 25/30] all: delete loong64 non-register ABI fallback path +Subject: [PATCH 38/51] all: delete loong64 non-register ABI fallback path -Change-Id: Iff4daa8d8d60765aa1f78c8c9f984214ea9c9159 +Change-Id: I6f292cbdd184c584b8a8c8af005b446be3e03a67 --- src/internal/bytealg/compare_loong64.s | 18 ---- src/internal/bytealg/equal_loong64.s | 24 ----- @@ -211,7 +211,7 @@ index 520f0afdd5..c0dc244497 100644 MOVV 32(R3), REGCTXT // restore REGCTXT MOVV REGCTXT, 8(R3) diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index cda90ca473..11ff884d43 100644 +index 0a970ef20c..3c24e33cb3 100644 --- a/src/runtime/asm_loong64.s +++ b/src/runtime/asm_loong64.s @@ -124,12 +124,7 @@ TEXT gogo<>(SB), NOSPLIT|NOFRAME, $0 @@ -227,7 +227,7 @@ index cda90ca473..11ff884d43 100644 // Save caller state in g->sched MOVV R3, (g_sched+gobuf_sp)(g) MOVV R1, (g_sched+gobuf_pc)(g) -@@ -645,7 +640,6 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 +@@ -670,7 +665,6 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 MOVB R19, ret+0(FP) RET @@ -235,7 +235,7 @@ index cda90ca473..11ff884d43 100644 // spillArgs stores return values from registers to a *internal/abi.RegArgs in R25. TEXT ·spillArgs(SB),NOSPLIT,$0-0 MOVV R4, (0*8)(R25) -@@ -717,13 +711,6 @@ TEXT ·unspillArgs(SB),NOSPLIT,$0-0 +@@ -742,13 +736,6 @@ TEXT ·unspillArgs(SB),NOSPLIT,$0-0 MOVD (30*8)(R25), F14 MOVD (31*8)(R25), F15 RET @@ -247,9 +247,9 @@ index cda90ca473..11ff884d43 100644 - RET -#endif - // gcWriteBarrier performs a heap pointer write and informs the GC. + // gcWriteBarrier informs the GC about heap pointer writes. // -@@ -833,155 +820,70 @@ flush: +@@ -878,155 +865,70 @@ TEXT runtime·gcWriteBarrier8(SB),NOSPLIT,$0 // then tail call to the corresponding runtime handler. // The tail call makes these stubs disappear in backtraces. TEXT runtime·panicIndex(SB),NOSPLIT,$0-16 diff --git a/0088-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch b/0039-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch similarity index 68% rename from 0088-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch rename to 0039-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch index c37e68f8df9fbdd76e37415958b6a2b422717ec7..b199d863440541130101f135e0dbd8b3bbe57dbe 100644 --- a/0088-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch +++ b/0039-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch @@ -1,22 +1,22 @@ -From 06572760d04e774572a0bee9713df70aa29b08bd Mon Sep 17 00:00:00 2001 -From: chenguoqi -Date: Mon, 9 Oct 2023 16:07:01 +0800 -Subject: [PATCH 26/30] cmd/internal/obj/loong64: using LookupABI to find +From 9135ea504d0f3c80c78fc8a7d91d329e070b127f Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Sun, 8 Oct 2023 08:36:19 +0800 +Subject: [PATCH 39/51] cmd/internal/obj/loong64: using LookupABI to find duff{copy,zero} when rewriting GOT Because register-passing parameters have been enabled, using Lookup to find duffcopy and duffzero fails and returns incorrect values. -Change-Id: Ic041bf0f830fa01f245e248c7fa85a1facb38b9e +Change-Id: I67ddec30c4a61ec1a0c7f7c27df682c0b5c36068 --- src/cmd/internal/obj/loong64/obj.go | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go -index 3e133c0c5a..513917d58a 100644 +index ed5165418d..f1850f1caa 100644 --- a/src/cmd/internal/obj/loong64/obj.go +++ b/src/cmd/internal/obj/loong64/obj.go -@@ -99,9 +99,9 @@ func rewriteToUseGot(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) { +@@ -100,9 +100,9 @@ func rewriteToUseGot(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) { if p.As == obj.ADUFFCOPY || p.As == obj.ADUFFZERO { var sym *obj.LSym if p.As == obj.ADUFFZERO { diff --git a/0089-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch b/0040-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch similarity index 84% rename from 0089-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch rename to 0040-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch index fcfdef415b0c7753abed53c9cbd507b9b195b008..fe4beb365d2cd15178865295910f074a7dd789f0 100644 --- a/0089-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch +++ b/0040-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch @@ -1,22 +1,22 @@ -From 32139d3ee893387fa694d26d3c9e67342d1aa816 Mon Sep 17 00:00:00 2001 +From 2ce8a854ea6f8859f3a40bbf4b626b8d6fcb5974 Mon Sep 17 00:00:00 2001 From: limeidan Date: Wed, 11 Oct 2023 18:01:59 +0800 -Subject: [PATCH 27/30] cmd/internal, cmd/link: unify the relocation naming +Subject: [PATCH 40/51] cmd/internal, cmd/link: unify the relocation naming style of loong64 Change-Id: Ica24a7c351b26a4375bbc52b719c69b78e89c5df --- - src/cmd/internal/obj/loong64/asm.go | 30 +++++----- - src/cmd/internal/objabi/reloctype.go | 30 +++++----- - src/cmd/internal/objabi/reloctype_string.go | 16 +++--- - src/cmd/link/internal/loong64/asm.go | 62 ++++++++++----------- - 4 files changed, 68 insertions(+), 70 deletions(-) + src/cmd/internal/obj/loong64/asm.go | 30 +++++------ + src/cmd/internal/objabi/reloctype.go | 28 +++++------ + src/cmd/internal/objabi/reloctype_string.go | 18 +++---- + src/cmd/link/internal/loong64/asm.go | 56 ++++++++++----------- + 4 files changed, 65 insertions(+), 67 deletions(-) diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 34b0ff94e4..fe091b72ae 100644 +index 74ee2b6cea..0034f7bdb9 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1670,7 +1670,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1677,7 +1677,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.To.Sym rel.Add = p.To.Offset @@ -25,7 +25,7 @@ index 34b0ff94e4..fe091b72ae 100644 o2 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REGTMP), uint32(p.From.Reg)) rel2 := obj.Addrel(c.cursym) -@@ -1678,7 +1678,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1685,7 +1685,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel2.Siz = 4 rel2.Sym = p.To.Sym rel2.Add = p.To.Offset @@ -34,7 +34,7 @@ index 34b0ff94e4..fe091b72ae 100644 case 51: // mov addr,r ==> pcalau12i + lw o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) -@@ -1687,14 +1687,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1694,14 +1694,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.From.Sym rel.Add = p.From.Offset @@ -51,7 +51,7 @@ index 34b0ff94e4..fe091b72ae 100644 case 52: // mov $lext, r // NOTE: this case does not use REGTMP. If it ever does, -@@ -1705,14 +1705,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1712,14 +1712,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.From.Sym rel.Add = p.From.Offset @@ -68,7 +68,7 @@ index 34b0ff94e4..fe091b72ae 100644 case 53: // mov r, tlsvar ==> lu12i.w + ori + add r2, regtmp + sw o(regtmp) // NOTE: this case does not use REGTMP. If it ever does, -@@ -1723,14 +1723,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1730,14 +1730,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.To.Sym rel.Add = p.To.Offset @@ -85,7 +85,7 @@ index 34b0ff94e4..fe091b72ae 100644 o3 = OP_RRR(c.oprrr(AADDV), uint32(REG_R2), uint32(REGTMP), uint32(REGTMP)) o4 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REGTMP), uint32(p.From.Reg)) -@@ -1743,14 +1743,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1750,14 +1750,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.From.Sym rel.Add = p.From.Offset @@ -102,7 +102,7 @@ index 34b0ff94e4..fe091b72ae 100644 o3 = OP_RRR(c.oprrr(AADDV), uint32(REG_R2), uint32(REGTMP), uint32(REGTMP)) o4 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(p.To.Reg)) -@@ -1763,14 +1763,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1770,14 +1770,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.From.Sym rel.Add = p.From.Offset @@ -119,7 +119,7 @@ index 34b0ff94e4..fe091b72ae 100644 o3 = OP_RRR(c.oprrr(AADDV), uint32(REG_R2), uint32(REGTMP), uint32(p.To.Reg)) case 56: // mov r, tlsvar IE model ==> (pcalau12i + ld.d)tlsvar@got + add.d + st.d -@@ -1780,7 +1780,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1787,7 +1787,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.To.Sym rel.Add = 0x0 @@ -128,7 +128,7 @@ index 34b0ff94e4..fe091b72ae 100644 o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) rel2 := obj.Addrel(c.cursym) rel2.Off = int32(c.pc + 4) -@@ -1798,7 +1798,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1805,7 +1805,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Siz = 4 rel.Sym = p.From.Sym rel.Add = 0x0 @@ -137,7 +137,7 @@ index 34b0ff94e4..fe091b72ae 100644 o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) rel2 := obj.Addrel(c.cursym) rel2.Off = int32(c.pc + 4) -@@ -1849,7 +1849,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { +@@ -1858,7 +1858,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { rel.Off = int32(c.pc) rel.Siz = 4 rel.Sym = p.From.Sym @@ -147,10 +147,10 @@ index 34b0ff94e4..fe091b72ae 100644 o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(p.To.Reg), uint32(p.To.Reg)) rel2 := obj.Addrel(c.cursym) diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go -index aaefd15663..e481d6c803 100644 +index 241a79817c..b1934e424f 100644 --- a/src/cmd/internal/objabi/reloctype.go +++ b/src/cmd/internal/objabi/reloctype.go -@@ -290,34 +290,32 @@ const ( +@@ -291,34 +291,32 @@ const ( // Loong64. @@ -183,11 +183,10 @@ index aaefd15663..e481d6c803 100644 // instruction, by encoding the address into the instruction. R_CALLLOONG64 -- // R_LOONG64_TLS_IE_PCREL_HI and R_LOONG64_TLS_IE_LO relocates an pcalau12i, ld.d pair to compute -- // the address of the GOT slot of the tls symbol. -- R_LOONG64_TLS_IE_PCREL_HI +- // R_LOONG64_TLS_IE_PCREL_HI and R_LOONG64_TLS_IE_LO relocates a pcalau12i, ld.d + // R_LOONG64_TLS_IE_HI and R_LOONG64_TLS_IE_LO relocates a pcalau12i, ld.d -+ // pair to compute the address of the GOT slot of the tls symbol. + // pair to compute the address of the GOT slot of the tls symbol. +- R_LOONG64_TLS_IE_PCREL_HI + R_LOONG64_TLS_IE_HI R_LOONG64_TLS_IE_LO @@ -200,9 +199,15 @@ index aaefd15663..e481d6c803 100644 // R_JMPLOONG64 resolves to non-PC-relative target address of a JMP instruction, diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go -index 53104c76b3..132cc12d8b 100644 +index e0649a5b0a..3e61c77dc0 100644 --- a/src/cmd/internal/objabi/reloctype_string.go +++ b/src/cmd/internal/objabi/reloctype_string.go +@@ -1,4 +1,4 @@ +-// Code generated by "stringer -type=RelocType"; DO NOT EDIT. ++// Code generated by "stringer -type=RelocType cmd/internal/objabi/reloctype.go"; DO NOT EDIT. + + package objabi + @@ -74,14 +74,14 @@ func _() { _ = x[R_RISCV_TLS_IE_ITYPE-64] _ = x[R_RISCV_TLS_IE_STYPE-65] @@ -224,46 +229,41 @@ index 53104c76b3..132cc12d8b 100644 _ = x[R_LOONG64_GOT_LO-75] _ = x[R_JMPLOONG64-76] _ = x[R_ADDRMIPSU-77] -@@ -91,9 +91,9 @@ func _() { - _ = x[R_XCOFFREF-81] +@@ -93,9 +93,9 @@ func _() { + _ = x[R_INITORDER-83] } --const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" -+const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_LOONG64_ADDR_HIR_LOONG64_ADDR_LOR_LOONG64_TLS_LE_HIR_LOONG64_TLS_LE_LOR_CALLLOONG64R_LOONG64_TLS_IE_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOT_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" +-const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_LOONG64_TLS_IE_PCREL_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREFR_PEIMAGEOFFR_INITORDER" ++const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_LOONG64_ADDR_HIR_LOONG64_ADDR_LOR_LOONG64_TLS_LE_HIR_LOONG64_TLS_LE_LOR_CALLLOONG64R_LOONG64_TLS_IE_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOT_HIR_LOONG64_GOT_LOR_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREFR_PEIMAGEOFFR_INITORDER" --var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090} -+var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 884, 901, 920, 939, 952, 971, 990, 1006, 1022, 1034, 1045, 1058, 1069, 1081, 1091} +-var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 965, 984, 1005, 1021, 1033, 1044, 1057, 1068, 1080, 1090, 1102, 1113} ++var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 884, 901, 920, 939, 952, 971, 990, 1006, 1022, 1034, 1045, 1058, 1069, 1081, 1091, 1103, 1114} func (i RelocType) String() string { i -= 1 diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go -index a4c48e64cd..7f7872a28c 100644 +index d1296c3309..99b568cfbb 100644 --- a/src/cmd/link/internal/loong64/asm.go +++ b/src/cmd/link/internal/loong64/asm.go -@@ -26,18 +26,18 @@ func gentext(ctxt *ld.Link, ldr *loader.Loader) { - - // 0: pcalau12i r4, $0 - // -- // 0: R_ADDRLOONG64U -+ // 0: R_LOONG64_ADDR_HI - // - // 4: addi.d r4, r4, $0 - // -- // 4: R_ADDRLOONG64 -+ // 4: R_LOONG64_ADDR_LO +@@ -34,7 +34,7 @@ func gentext(ctxt *ld.Link, ldr *loader.Loader) { + // 0: 1a000004 pcalau12i $a0, 0 + // 0: R_LARCH_PCALA_HI20 local.moduledata o(0x1a000004) - rel, _ := initfunc.AddRel(objabi.R_ADDRLOONG64U) + rel, _ := initfunc.AddRel(objabi.R_LOONG64_ADDR_HI) rel.SetOff(0) rel.SetSiz(4) rel.SetSym(ctxt.Moduledata) +@@ -42,7 +42,7 @@ func gentext(ctxt *ld.Link, ldr *loader.Loader) { + // 4: 02c00084 addi.d $a0, $a0, 0 + // 4: R_LARCH_PCALA_LO12 local.moduledata o(0x02c00084) - rel2, _ := initfunc.AddRel(objabi.R_ADDRLOONG64) + rel2, _ := initfunc.AddRel(objabi.R_LOONG64_ADDR_LO) rel2.SetOff(4) rel2.SetSiz(4) rel2.SetSym(ctxt.Moduledata) -@@ -80,12 +80,12 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, +@@ -84,12 +84,12 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, default: return false } @@ -278,7 +278,7 @@ index a4c48e64cd..7f7872a28c 100644 out.Write64(uint64(sectoff)) out.Write64(uint64(elf.R_LARCH_TLS_LE_HI20) | uint64(elfsym)<<32) out.Write64(uint64(r.Xadd)) -@@ -95,7 +95,7 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, +@@ -99,7 +99,7 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, out.Write64(uint64(elf.R_LARCH_B26) | uint64(elfsym)<<32) out.Write64(uint64(r.Xadd)) @@ -287,19 +287,10 @@ index a4c48e64cd..7f7872a28c 100644 out.Write64(uint64(sectoff)) out.Write64(uint64(elf.R_LARCH_TLS_IE_PC_HI20) | uint64(elfsym)<<32) out.Write64(uint64(0x0)) -@@ -105,7 +105,7 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, +@@ -109,17 +109,17 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, out.Write64(uint64(elf.R_LARCH_TLS_IE_PC_LO12) | uint64(elfsym)<<32) out.Write64(uint64(0x0)) -- case objabi.R_LOONG64_GOTPCREL_HI: -+ case objabi.R_LOONG64_GOT_HI: - out.Write64(uint64(sectoff)) - out.Write64(uint64(elf.R_LARCH_GOT_PC_HI20) | uint64(elfsym)<<32) - out.Write64(uint64(0x0)) -@@ -120,12 +120,12 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, - // signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced - // to do sign extending from 12 bits. The 0x804 is 0x800 + 4, 4 is instruction bit - // width on Loong64 and is used to correct the PC of the addi.d instruction. - case objabi.R_ADDRLOONG64: + case objabi.R_LOONG64_ADDR_LO: out.Write64(uint64(sectoff)) @@ -311,18 +302,28 @@ index a4c48e64cd..7f7872a28c 100644 out.Write64(uint64(sectoff)) out.Write64(uint64(elf.R_LARCH_PCALA_HI20) | uint64(elfsym)<<32) out.Write64(uint64(r.Xadd)) -@@ -148,8 +148,8 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade + +- case objabi.R_LOONG64_GOTPCREL_HI: ++ case objabi.R_LOONG64_GOT_HI: + out.Write64(uint64(sectoff)) + out.Write64(uint64(elf.R_LARCH_GOT_PC_HI20) | uint64(elfsym)<<32) + out.Write64(uint64(0x0)) +@@ -147,10 +147,10 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade switch r.Type() { default: return val, 0, false - case objabi.R_ADDRLOONG64, +- objabi.R_LOONG64_GOTPCREL_HI, +- objabi.R_LOONG64_GOT_LO, - objabi.R_ADDRLOONG64U: + case objabi.R_LOONG64_ADDR_HI, -+ objabi.R_LOONG64_ADDR_LO: ++ objabi.R_LOONG64_ADDR_LO, ++ objabi.R_LOONG64_GOT_HI, ++ objabi.R_LOONG64_GOT_LO: // set up addend for eventual relocation via outer symbol. rs, _ := ld.FoldSubSymbolOffset(ldr, rs) rst := ldr.SymType(rs) -@@ -157,14 +157,14 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade +@@ -158,11 +158,11 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade ldr.Errorf(s, "missing section for %s", ldr.SymName(rs)) } return val, 1, true @@ -333,17 +334,11 @@ index a4c48e64cd..7f7872a28c 100644 objabi.R_CALLLOONG64, objabi.R_JMPLOONG64, - objabi.R_LOONG64_TLS_IE_PCREL_HI, -- objabi.R_LOONG64_GOTPCREL_HI, -- objabi.R_LOONG64_TLS_IE_LO, -- objabi.R_LOONG64_GOT_LO: -+ objabi.R_LOONG64_GOT_HI, -+ objabi.R_LOONG64_GOT_LO, + objabi.R_LOONG64_TLS_IE_HI, -+ objabi.R_LOONG64_TLS_IE_LO: + objabi.R_LOONG64_TLS_IE_LO: return val, 1, true } - } -@@ -177,18 +177,18 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade +@@ -176,18 +176,18 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade return r.Add(), noExtReloc, isOk case objabi.R_GOTOFF: return ldr.SymValue(r.Sym()) + r.Add() - ldr.SymValue(syms.GOT), noExtReloc, isOk @@ -368,7 +363,7 @@ index a4c48e64cd..7f7872a28c 100644 return int64(val&0xffc003ff | ((t & 0xfff) << 10)), noExtReloc, isOk } return int64(val&0xfe00001f | (((t) >> 12 << 5) & 0x1ffffe0)), noExtReloc, isOk -@@ -208,20 +208,20 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant +@@ -207,20 +207,20 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sym) (loader.ExtReloc, bool) { switch r.Type() { @@ -395,7 +390,7 @@ index a4c48e64cd..7f7872a28c 100644 objabi.R_LOONG64_TLS_IE_LO: return ld.ExtrelocSimple(ldr, r), true } -@@ -230,7 +230,7 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy +@@ -229,7 +229,7 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy func isRequestingLowPageBits(t objabi.RelocType) bool { switch t { diff --git a/0040-cmd-link-workaround-linkshared-test-errors-on-loong6.patch b/0040-cmd-link-workaround-linkshared-test-errors-on-loong6.patch deleted file mode 100644 index ad87625b39bfd59f7771cdf8a1fc81eb0d576316..0000000000000000000000000000000000000000 --- a/0040-cmd-link-workaround-linkshared-test-errors-on-loong6.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 0f40e3e826f43d7c8ab54ddf7bb75228b64b2e85 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Mon, 27 Mar 2023 19:06:21 +0800 -Subject: [PATCH 40/62] cmd/link: workaround linkshared test errors on loong64. - -Signed-off-by: Guoqi Chen -Change-Id: Iee95ec29c348b1944d79954aba976ec2300ec28c ---- - src/cmd/link/internal/ld/lib.go | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/src/cmd/link/internal/ld/lib.go b/src/cmd/link/internal/ld/lib.go -index 03b9f11608..54672c0686 100644 ---- a/src/cmd/link/internal/ld/lib.go -+++ b/src/cmd/link/internal/ld/lib.go -@@ -1790,6 +1790,12 @@ func (ctxt *Link) hostlink() { - argv = append(argv, peimporteddlls()...) - } - -+ if ctxt.Arch.Family == sys.Loong64 { -+ if (ctxt.BuildMode != BuildModeShared) && ctxt.linkShared { -+ argv = append(argv, "-pie") -+ } -+ } -+ - if ctxt.Debugvlog != 0 { - ctxt.Logf("host link:") - for _, v := range argv { --- -2.38.1 - diff --git a/0090-cmd-link-internal-loadelf-remove-useless-relocation-.patch b/0041-cmd-link-internal-loadelf-remove-useless-relocation-.patch similarity index 74% rename from 0090-cmd-link-internal-loadelf-remove-useless-relocation-.patch rename to 0041-cmd-link-internal-loadelf-remove-useless-relocation-.patch index 9dcc0ceff91b9a354d7ad0d42c28fb3c22f47478..ff0c600382513bb104aef0a9820aad1dfd07faee 100644 --- a/0090-cmd-link-internal-loadelf-remove-useless-relocation-.patch +++ b/0041-cmd-link-internal-loadelf-remove-useless-relocation-.patch @@ -1,19 +1,19 @@ -From 753953758b77b325ddf3edba216c49de35663141 Mon Sep 17 00:00:00 2001 +From 42188b511e4b16720defa3fe9178df3f6e130bfa Mon Sep 17 00:00:00 2001 From: limeidan -Date: Tue, 24 Oct 2023 19:48:36 +0800 -Subject: [PATCH 28/30] cmd/link/internal/loadelf: remove useless relocation +Date: Tue, 24 Oct 2023 19:50:32 +0800 +Subject: [PATCH 41/51] cmd/link/internal/loadelf: remove useless relocation size information of loong64 -Change-Id: I7e9d04b1961e11583e97e759a6f6fa636bedc6a2 +Change-Id: I86de74df2b6a205b454e3fee55607dcf28fb4a5f --- src/cmd/link/internal/loadelf/ldelf.go | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go -index 156d9a5616..2e88b43c24 100644 +index 5ab7cf2204..1dc6a3f1f3 100644 --- a/src/cmd/link/internal/loadelf/ldelf.go +++ b/src/cmd/link/internal/loadelf/ldelf.go -@@ -1002,11 +1002,7 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { +@@ -1007,11 +1007,7 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { MIPS64 | uint32(elf.R_MIPS_GOT_DISP)<<16: return 4, 4, nil diff --git a/0091-cmd-link-internal-loadelf-add-additional-relocations.patch b/0042-cmd-link-internal-loadelf-add-additional-relocations.patch similarity index 78% rename from 0091-cmd-link-internal-loadelf-add-additional-relocations.patch rename to 0042-cmd-link-internal-loadelf-add-additional-relocations.patch index f7cd8c3dc945c3985ed2312fb7c09f8b1f1d0c3e..6283e406b6e4fad5ec16d87d106001d9c90bcbc4 100644 --- a/0091-cmd-link-internal-loadelf-add-additional-relocations.patch +++ b/0042-cmd-link-internal-loadelf-add-additional-relocations.patch @@ -1,7 +1,7 @@ -From 1c8bc36ba2dbfa37a8584d0b6e10e07d081183a0 Mon Sep 17 00:00:00 2001 +From 5abed3380e38a302aaf57a07ad6850630a28fbc8 Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Wed, 25 Oct 2023 17:54:51 +0800 -Subject: [PATCH 29/30] cmd/link/internal/loadelf: add additional relocations +Subject: [PATCH 42/51] cmd/link/internal/loadelf: add additional relocations for loong64 The Linker Relaxation feature on Loong64 is already supported in binutils 2.41. @@ -15,16 +15,16 @@ elf.R_LARCH_SUB32 Fixes #63725 Signed-off-by: Guoqi Chen -Change-Id: I7643a9aa4891356340ea26b1256b5f8e62c8938d +Change-Id: I53a000d99049a14a7eb9497909c8d4d8b8913757 --- src/cmd/link/internal/loadelf/ldelf.go | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go -index 2e88b43c24..e32db7ddcc 100644 +index 1dc6a3f1f3..dcb34b871b 100644 --- a/src/cmd/link/internal/loadelf/ldelf.go +++ b/src/cmd/link/internal/loadelf/ldelf.go -@@ -1004,6 +1004,9 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { +@@ -1009,6 +1009,9 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { case LOONG64 | uint32(elf.R_LARCH_MARK_LA)<<16, LOONG64 | uint32(elf.R_LARCH_MARK_PCREL)<<16, diff --git a/0043-cmd-compile-internal-runtime-use-NOOP-for-hardware-N.patch b/0043-cmd-compile-internal-runtime-use-NOOP-for-hardware-N.patch deleted file mode 100644 index d2f59cc1b85bf3f0ab8bed61e001342244dda0de..0000000000000000000000000000000000000000 --- a/0043-cmd-compile-internal-runtime-use-NOOP-for-hardware-N.patch +++ /dev/null @@ -1,61 +0,0 @@ -From b125d0fc1d38e775218666f88cb4a8b2b9cf3b1e Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Sat, 11 Mar 2023 22:26:39 +0800 -Subject: [PATCH 43/62] cmd/compile/internal, runtime: use NOOP for hardware - NOPs on loong64 - -The canonical LoongArch NOP instruction form is "andi r0, r0, 0", as -described in the LoongArch Reference Manual Volume 1, Section 2.2.1.10. -We currently use NOR instead, which may or may not change anything (e.g. -performance on less capable micro-architectures) but is deviation from -upstream standards nevertheless. Fix them to use the explicit hardware -NOP which happens to be supported as `NOOP`. - -Change-Id: I0a799a1da959e9c3b582feb88202df2bab0ab23a -Reviewed-on: https://go-review.googlesource.com/c/go/+/475615 -Reviewed-by: abner chenc -TryBot-Result: Gopher Robot -Run-TryBot: Wayne Zuo -Reviewed-by: Ian Lance Taylor -Reviewed-by: Cherry Mui ---- - src/cmd/compile/internal/loong64/ggen.go | 6 +----- - src/runtime/asm_loong64.s | 4 ++-- - 2 files changed, 3 insertions(+), 7 deletions(-) - -diff --git a/src/cmd/compile/internal/loong64/ggen.go b/src/cmd/compile/internal/loong64/ggen.go -index 2f94aad912..27d318a8bb 100644 ---- a/src/cmd/compile/internal/loong64/ggen.go -+++ b/src/cmd/compile/internal/loong64/ggen.go -@@ -55,10 +55,6 @@ func zerorange(pp *objw.Progs, p *obj.Prog, off, cnt int64, _ *uint32) *obj.Prog - } - - func ginsnop(pp *objw.Progs) *obj.Prog { -- p := pp.Prog(loong64.ANOR) -- p.From.Type = obj.TYPE_REG -- p.From.Reg = loong64.REG_R0 -- p.To.Type = obj.TYPE_REG -- p.To.Reg = loong64.REG_R0 -+ p := pp.Prog(loong64.ANOOP) - return p - } -diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s -index ba06203fa1..d82c688925 100644 ---- a/src/runtime/asm_loong64.s -+++ b/src/runtime/asm_loong64.s -@@ -613,10 +613,10 @@ TEXT _cgo_topofstack(SB),NOSPLIT,$16 - // The top-most function running on a goroutine - // returns to goexit+PCQuantum. - TEXT runtime·goexit(SB),NOSPLIT|NOFRAME|TOPFRAME,$0-0 -- NOR R0, R0 // NOP -+ NOOP - JAL runtime·goexit1(SB) // does not return - // traceback from goexit1 must hit code range of goexit -- NOR R0, R0 // NOP -+ NOOP - - TEXT runtime·addmoduledata(SB),NOSPLIT,$0-0 - ADDV $-16, R3 --- -2.38.1 - diff --git a/0092-cmd-link-add-new-relocations-numbered-101-to-109-for.patch b/0043-cmd-link-add-new-relocations-numbered-101-to-109-for.patch similarity index 87% rename from 0092-cmd-link-add-new-relocations-numbered-101-to-109-for.patch rename to 0043-cmd-link-add-new-relocations-numbered-101-to-109-for.patch index 364c0770c9c8ea291314f40da7aa10bcea54d806..ef0bcc033e1e59b683df4a501dab32a12122f3c3 100644 --- a/0092-cmd-link-add-new-relocations-numbered-101-to-109-for.patch +++ b/0043-cmd-link-add-new-relocations-numbered-101-to-109-for.patch @@ -1,21 +1,21 @@ -From 0e57010dbc158c196cf8ba1f98a0519280094ee0 Mon Sep 17 00:00:00 2001 +From 913dd677b2f47cdd5ae2284f9c98e35b405ec80b Mon Sep 17 00:00:00 2001 From: Guoqi Chen Date: Thu, 26 Oct 2023 15:12:29 +0800 -Subject: [PATCH 30/30] cmd/link: add new relocations numbered 101 to 109 for +Subject: [PATCH 43/51] cmd/link: add new relocations numbered 101 to 109 for loong64 Signed-off-by: Guoqi Chen -Change-Id: Ib9b9ad922a4b561ca7261bd90107d746fd9f298f +Change-Id: Ieb845ce03a039f7ee9a39f243145193b5f9ab1dc --- src/cmd/link/internal/loadelf/ldelf.go | 15 ++++++++++++++- src/debug/elf/elf.go | 18 ++++++++++++++++++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go -index e32db7ddcc..825ebb35e9 100644 +index dcb34b871b..2a013dde0d 100644 --- a/src/cmd/link/internal/loadelf/ldelf.go +++ b/src/cmd/link/internal/loadelf/ldelf.go -@@ -1002,15 +1002,28 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { +@@ -1007,15 +1007,28 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { MIPS64 | uint32(elf.R_MIPS_GOT_DISP)<<16: return 4, 4, nil @@ -46,10 +46,10 @@ index e32db7ddcc..825ebb35e9 100644 case S390X | uint32(elf.R_390_8)<<16: diff --git a/src/debug/elf/elf.go b/src/debug/elf/elf.go -index 02cda16510..8712764607 100644 +index c982c684ba..63acddc166 100644 --- a/src/debug/elf/elf.go +++ b/src/debug/elf/elf.go -@@ -2245,6 +2245,15 @@ const ( +@@ -2365,6 +2365,15 @@ const ( R_LARCH_TLS_GD_HI20 R_LARCH = 98 R_LARCH_32_PCREL R_LARCH = 99 R_LARCH_RELAX R_LARCH = 100 @@ -65,7 +65,7 @@ index 02cda16510..8712764607 100644 ) var rlarchStrings = []intName{ -@@ -2337,6 +2346,15 @@ var rlarchStrings = []intName{ +@@ -2457,6 +2466,15 @@ var rlarchStrings = []intName{ {98, "R_LARCH_TLS_GD_HI20"}, {99, "R_LARCH_32_PCREL"}, {100, "R_LARCH_RELAX"}, diff --git a/0093-api-add-new-relocations-numbered-101-to-109-for-loon.patch b/0044-api-add-new-relocations-numbered-101-to-109-for-loon.patch similarity index 87% rename from 0093-api-add-new-relocations-numbered-101-to-109-for-loon.patch rename to 0044-api-add-new-relocations-numbered-101-to-109-for-loon.patch index 261cc0011062f7c13a11d471314837ae42c641d2..230988c443f0efa0407c4a4fa21bcab3d466a3f2 100644 --- a/0093-api-add-new-relocations-numbered-101-to-109-for-loon.patch +++ b/0044-api-add-new-relocations-numbered-101-to-109-for-loon.patch @@ -1,16 +1,17 @@ -From a532a9af590b57661436e42bc0f718cb8d02b79f Mon Sep 17 00:00:00 2001 +From e352e1eb642a64b0656d25f7c279544702da6e22 Mon Sep 17 00:00:00 2001 From: chenguoqi Date: Fri, 27 Oct 2023 16:10:20 +0800 -Subject: [PATCH] api: add new relocations numbered 101 to 109 for loong64 +Subject: [PATCH 44/51] api: add new relocations numbered 101 to 109 for + loong64 Signed-off-by: chenguoqi -Change-Id: I1fc6718b1906d3b9371bdc10bdef592764e448ce +Change-Id: If078f7865e8d5c5ae963e79cf7157eca7e7a0817 --- api/go1.20.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/api/go1.20.txt b/api/go1.20.txt -index fd6800ee26..936a6cef8a 100644 +index 8deb435a68..6fe543d3e8 100644 --- a/api/go1.20.txt +++ b/api/go1.20.txt @@ -118,6 +118,24 @@ pkg debug/elf, const R_LARCH_TLS_LE_HI20 = 83 #54222 diff --git a/0044-cmd-link-internal-loong64-use-BREAK-0-as-the-code-pa.patch b/0044-cmd-link-internal-loong64-use-BREAK-0-as-the-code-pa.patch deleted file mode 100644 index 0e59b1ce60f611424daa893dc3d51298bcc0606a..0000000000000000000000000000000000000000 --- a/0044-cmd-link-internal-loong64-use-BREAK-0-as-the-code-pa.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 9a232dba55a847ef5c19667e083af9f19a160e7c Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Sat, 11 Mar 2023 22:38:01 +0800 -Subject: [PATCH 44/62] cmd/link/internal/loong64: use BREAK 0 as the code pad - sequence - -As the comment on CodePad goes, we "might want to pad with a trap -instruction to catch wayward programs". The current behavior of -zero-padding is equivalent to padding with an instruction of 0x00000000, -which is invalid according to the LoongArch manuals nevertheless, but -rumor has it that some early and/or engineering samples of Loongson -3A5000 recognized it (maybe behaving like NOP). It is better to avoid -undocumented behavior and ensure execution flow would not overflow the -pads. - -Change-Id: I531b1eabeb355e9ad4a2d5340e61f2fe71349297 -Reviewed-on: https://go-review.googlesource.com/c/go/+/475616 -Reviewed-by: abner chenc -Reviewed-by: Ian Lance Taylor -Run-TryBot: Cherry Mui -TryBot-Result: Gopher Robot -Reviewed-by: Cherry Mui ---- - src/cmd/link/internal/loong64/obj.go | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/src/cmd/link/internal/loong64/obj.go b/src/cmd/link/internal/loong64/obj.go -index 0a5bb0ac6d..4865c695b9 100644 ---- a/src/cmd/link/internal/loong64/obj.go -+++ b/src/cmd/link/internal/loong64/obj.go -@@ -19,6 +19,7 @@ func Init() (*sys.Arch, ld.Arch) { - Minalign: minAlign, - Dwarfregsp: dwarfRegSP, - Dwarfreglr: dwarfRegLR, -+ CodePad: []byte{0x00, 0x00, 0x2a, 0x00}, // BREAK 0 - Adddynrel: adddynrel, - Archinit: archinit, - Archreloc: archreloc, --- -2.38.1 - diff --git a/0045-cmd-asm-runtime-remove-the-RSB-register-from-loong64.patch b/0045-cmd-asm-runtime-remove-the-RSB-register-from-loong64.patch deleted file mode 100644 index 2c96f25505c9f1d4ac1f8c47ef244d55187ae4fc..0000000000000000000000000000000000000000 --- a/0045-cmd-asm-runtime-remove-the-RSB-register-from-loong64.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 9e07f2b06c05648aa551ea1967dac9ddaf9fd1db Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Mon, 13 Mar 2023 16:20:50 +0800 -Subject: [PATCH 45/62] cmd/asm, runtime: remove the RSB register from loong64 - -It was carryover from the mips64 port (where it represented the platform -GP register) but LoongArch platform ABI doesn't have the GP concept. - -Change-Id: Iea326ae13676e95b040b52aaadc08d311b507bd3 ---- - src/cmd/asm/internal/arch/arch.go | 1 - - src/cmd/asm/internal/asm/operand_test.go | 4 ++-- - src/runtime/mkpreempt.go | 8 +++----- - src/runtime/preempt_loong64.s | 4 ++-- - src/runtime/signal_loong64.go | 4 +--- - 5 files changed, 8 insertions(+), 13 deletions(-) - -diff --git a/src/cmd/asm/internal/arch/arch.go b/src/cmd/asm/internal/arch/arch.go -index 740711c40c..11bb7af899 100644 ---- a/src/cmd/asm/internal/arch/arch.go -+++ b/src/cmd/asm/internal/arch/arch.go -@@ -536,7 +536,6 @@ func archLoong64(linkArch *obj.LinkArch) *Arch { - // Avoid unintentionally clobbering g using R22. - delete(register, "R22") - register["g"] = loong64.REG_R22 -- register["RSB"] = loong64.REG_R31 - registerPrefix := map[string]bool{ - "F": true, - "FCSR": true, -diff --git a/src/cmd/asm/internal/asm/operand_test.go b/src/cmd/asm/internal/asm/operand_test.go -index 29371d6199..c7e251f50f 100644 ---- a/src/cmd/asm/internal/asm/operand_test.go -+++ b/src/cmd/asm/internal/asm/operand_test.go -@@ -915,8 +915,9 @@ var loong64OperandTests = []operandTest{ - {"R27", "R27"}, - {"R28", "R28"}, - {"R29", "R29"}, -- {"R30", "R30"}, - {"R3", "R3"}, -+ {"R30", "R30"}, -+ {"R31", "R31"}, - {"R4", "R4"}, - {"R5", "R5"}, - {"R6", "R6"}, -@@ -925,7 +926,6 @@ var loong64OperandTests = []operandTest{ - {"R9", "R9"}, - {"a(FP)", "a(FP)"}, - {"g", "g"}, -- {"RSB", "R31"}, - {"ret+8(FP)", "ret+8(FP)"}, - {"runtime·abort(SB)", "runtime.abort(SB)"}, - {"·AddUint32(SB)", "\"\".AddUint32(SB)"}, -diff --git a/src/runtime/mkpreempt.go b/src/runtime/mkpreempt.go -index 70eca7c7e2..043fb3e4ef 100644 ---- a/src/runtime/mkpreempt.go -+++ b/src/runtime/mkpreempt.go -@@ -462,20 +462,18 @@ func genLoong64() { - movf := "MOVD" - add := "ADDV" - sub := "SUBV" -- r31 := "RSB" - regsize := 8 - - // Add integer registers r4-r21 r23-r29 r31 - // R0 (zero), R30 (REGTMP), R2 (tp), R3 (SP), R22 (g), R1 (LR) are special, - var l = layout{sp: "R3", stack: regsize} // add slot to save PC of interrupted instruction (in LR) -- for i := 4; i <= 29; i++ { -- if i == 22 { -- continue // R3 is REGSP R22 is g -+ for i := 4; i <= 31; i++ { -+ if i == 22 || i == 30 { -+ continue - } - reg := fmt.Sprintf("R%d", i) - l.add(mov, reg, regsize) - } -- l.add(mov, r31, regsize) - - // Add floating point registers F0-F31. - for i := 0; i <= 31; i++ { -diff --git a/src/runtime/preempt_loong64.s b/src/runtime/preempt_loong64.s -index 999e72c470..bb9c948365 100644 ---- a/src/runtime/preempt_loong64.s -+++ b/src/runtime/preempt_loong64.s -@@ -31,7 +31,7 @@ TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 - MOVV R27, 184(R3) - MOVV R28, 192(R3) - MOVV R29, 200(R3) -- MOVV RSB, 208(R3) -+ MOVV R31, 208(R3) - MOVD F0, 216(R3) - MOVD F1, 224(R3) - MOVD F2, 232(R3) -@@ -101,7 +101,7 @@ TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 - MOVD 232(R3), F2 - MOVD 224(R3), F1 - MOVD 216(R3), F0 -- MOVV 208(R3), RSB -+ MOVV 208(R3), R31 - MOVV 200(R3), R29 - MOVV 192(R3), R28 - MOVV 184(R3), R27 -diff --git a/src/runtime/signal_loong64.go b/src/runtime/signal_loong64.go -index 26717a6e59..ac842c0c94 100644 ---- a/src/runtime/signal_loong64.go -+++ b/src/runtime/signal_loong64.go -@@ -77,10 +77,8 @@ func (c *sigctxt) preparePanic(sig uint32, gp *g) { - } - - // In case we are panicking from external C code -- sigpanicPC := uint64(abi.FuncPCABIInternal(sigpanic)) -- c.set_r31(sigpanicPC >> 32 << 32) // RSB register - c.set_r22(uint64(uintptr(unsafe.Pointer(gp)))) -- c.set_pc(sigpanicPC) -+ c.set_pc(uint64(abi.FuncPCABIInternal(sigpanic))) - } - - func (c *sigctxt) pushCall(targetPC, resumePC uintptr) { --- -2.38.1 - diff --git a/0045-cmd-internal-obj-loong64-remove-unused-register-alia.patch b/0045-cmd-internal-obj-loong64-remove-unused-register-alia.patch new file mode 100644 index 0000000000000000000000000000000000000000..d413f1ffbf5ac68a1cbf77ec11df64faa0f66a29 --- /dev/null +++ b/0045-cmd-internal-obj-loong64-remove-unused-register-alia.patch @@ -0,0 +1,26 @@ +From 26000403c06ba6d7d7cd3ad9719b8bde71886dd3 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Thu, 16 Nov 2023 19:55:47 +0800 +Subject: [PATCH 45/51] cmd/internal/obj/loong64: remove unused register alias + +Change-Id: Id6447437ba5492f22417231badac4805fcac4474 +--- + src/cmd/internal/obj/loong64/a.out.go | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go +index 8df48a1e01..156dfda8b6 100644 +--- a/src/cmd/internal/obj/loong64/a.out.go ++++ b/src/cmd/internal/obj/loong64/a.out.go +@@ -157,8 +157,6 @@ const ( + REGZERO = REG_R0 // set to zero + REGLINK = REG_R1 + REGSP = REG_R3 +- REGRET = REG_R20 // not use +- REGARG = -1 // -1 disables passing the first argument in register + REGRT1 = REG_R20 // reserved for runtime, duffzero and duffcopy + REGRT2 = REG_R21 // reserved for runtime, duffcopy + REGCTXT = REG_R29 // context for closures +-- +2.38.1 + diff --git a/0046-cmd-internal-obj-loong64-realize-all-unconditional-j.patch b/0046-cmd-internal-obj-loong64-realize-all-unconditional-j.patch deleted file mode 100644 index b1c9b9d53d929cd3078294c73e0d98e9479e3eca..0000000000000000000000000000000000000000 --- a/0046-cmd-internal-obj-loong64-realize-all-unconditional-j.patch +++ /dev/null @@ -1,169 +0,0 @@ -From 3c6467474e6a4fd8596af462f38b6631eb511baf Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Tue, 21 Mar 2023 18:23:44 +0800 -Subject: [PATCH 46/62] cmd/internal/obj/loong64: realize all unconditional - jumps with B/BL -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The current practice of using the "PC-relative" `BEQ ZERO, ZERO` for -short jumps is inherited from the MIPS port, where the pre-R6 long -jumps are PC-regional instead of PC-relative. This quirk is not -present in LoongArch from the very beginning so there is no reason to -keep the behavior any more. - -While at it, simplify the code to not place anything in the jump offset -field if a relocation is to take place. (It may be relic of a previous -REL-era treatment where the addend is to be stored in the instruction -word, but again, loong64 is exclusively RELA from day 1 so no point in -doing so either.) - -Benchmark shows very slight improvement on a 3A5000 box, indicating the -LA464 micro-architecture presumably *not* seeing the always-true BEQs as -equivalent to B: - -goos: linux -goarch: loong64 -pkg: test/bench/go1 - │ 2ef70d9d0f │ this CL │ - │ sec/op │ sec/op vs base │ -BinaryTree17 14.57 ± 4% 14.54 ± 1% ~ (p=0.353 n=10) -Fannkuch11 3.570 ± 0% 3.570 ± 0% ~ (p=0.529 n=10) -FmtFprintfEmpty 92.84n ± 0% 92.84n ± 0% ~ (p=0.970 n=10) -FmtFprintfString 150.0n ± 0% 149.9n ± 0% ~ (p=0.350 n=10) -FmtFprintfInt 153.3n ± 0% 153.3n ± 0% ~ (p=1.000 n=10) ¹ -FmtFprintfIntInt 235.8n ± 0% 235.8n ± 0% ~ (p=0.963 n=10) -FmtFprintfPrefixedInt 318.5n ± 0% 318.5n ± 0% ~ (p=0.474 n=10) -FmtFprintfFloat 410.4n ± 0% 410.4n ± 0% ~ (p=0.628 n=10) -FmtManyArgs 944.9n ± 0% 945.0n ± 0% ~ (p=0.240 n=10) -GobDecode 13.97m ± 12% 12.83m ± 21% ~ (p=0.165 n=10) -GobEncode 17.84m ± 5% 18.60m ± 4% ~ (p=0.123 n=10) -Gzip 421.0m ± 0% 421.0m ± 0% ~ (p=0.579 n=10) -Gunzip 89.80m ± 0% 89.77m ± 0% ~ (p=0.529 n=10) -HTTPClientServer 86.54µ ± 1% 86.25µ ± 0% -0.33% (p=0.003 n=10) -JSONEncode 18.57m ± 0% 18.57m ± 0% ~ (p=0.353 n=10) -JSONDecode 77.48m ± 0% 77.30m ± 0% -0.23% (p=0.035 n=10) -Mandelbrot200 7.217m ± 0% 7.217m ± 0% ~ (p=0.436 n=10) -GoParse 7.599m ± 2% 7.632m ± 1% ~ (p=0.353 n=10) -RegexpMatchEasy0_32 140.1n ± 0% 140.1n ± 0% ~ (p=0.582 n=10) -RegexpMatchEasy0_1K 1.538µ ± 0% 1.538µ ± 0% ~ (p=1.000 n=10) ¹ -RegexpMatchEasy1_32 161.7n ± 0% 161.7n ± 0% ~ (p=1.000 n=10) ¹ -RegexpMatchEasy1_1K 1.632µ ± 0% 1.632µ ± 0% ~ (p=1.000 n=10) ¹ -RegexpMatchMedium_32 1.369µ ± 0% 1.369µ ± 0% ~ (p=1.000 n=10) -RegexpMatchMedium_1K 39.96µ ± 0% 39.96µ ± 0% +0.01% (p=0.010 n=10) -RegexpMatchHard_32 2.099µ ± 0% 2.099µ ± 0% ~ (p=1.000 n=10) ¹ -RegexpMatchHard_1K 62.50µ ± 0% 62.50µ ± 0% ~ (p=0.099 n=10) -Revcomp 1.349 ± 0% 1.347 ± 0% -0.14% (p=0.001 n=10) -Template 118.4m ± 0% 118.0m ± 0% -0.36% (p=0.023 n=10) -TimeParse 407.8n ± 0% 407.9n ± 0% +0.02% (p=0.000 n=10) -TimeFormat 508.0n ± 0% 507.9n ± 0% ~ (p=0.421 n=10) -geomean 103.5µ 103.3µ -0.17% -¹ all samples are equal - - │ 2ef70d9d0f │ this CL │ - │ B/s │ B/s vs base │ -GobDecode 52.67Mi ± 11% 57.04Mi ± 17% ~ (p=0.149 n=10) -GobEncode 41.03Mi ± 4% 39.35Mi ± 4% ~ (p=0.118 n=10) -Gzip 43.95Mi ± 0% 43.95Mi ± 0% ~ (p=0.428 n=10) -Gunzip 206.1Mi ± 0% 206.1Mi ± 0% ~ (p=0.399 n=10) -JSONEncode 99.64Mi ± 0% 99.66Mi ± 0% ~ (p=0.304 n=10) -JSONDecode 23.88Mi ± 0% 23.94Mi ± 0% +0.22% (p=0.030 n=10) -GoParse 7.267Mi ± 2% 7.238Mi ± 1% ~ (p=0.360 n=10) -RegexpMatchEasy0_32 217.8Mi ± 0% 217.8Mi ± 0% -0.00% (p=0.006 n=10) -RegexpMatchEasy0_1K 635.0Mi ± 0% 635.0Mi ± 0% ~ (p=0.194 n=10) -RegexpMatchEasy1_32 188.7Mi ± 0% 188.7Mi ± 0% ~ (p=0.338 n=10) -RegexpMatchEasy1_1K 598.5Mi ± 0% 598.5Mi ± 0% -0.00% (p=0.000 n=10) -RegexpMatchMedium_32 22.30Mi ± 0% 22.30Mi ± 0% ~ (p=0.211 n=10) -RegexpMatchMedium_1K 24.43Mi ± 0% 24.43Mi ± 0% ~ (p=1.000 n=10) -RegexpMatchHard_32 14.54Mi ± 0% 14.54Mi ± 0% ~ (p=0.474 n=10) -RegexpMatchHard_1K 15.62Mi ± 0% 15.62Mi ± 0% ~ (p=1.000 n=10) ¹ -Revcomp 179.7Mi ± 0% 180.0Mi ± 0% +0.14% (p=0.001 n=10) -Template 15.63Mi ± 0% 15.68Mi ± 0% +0.34% (p=0.022 n=10) -geomean 60.29Mi 60.44Mi +0.24% -¹ all samples are equal - -Change-Id: I112dd663c49567386ea75dd4966a9f8127ffb90e -Reviewed-on: https://go-review.googlesource.com/c/go/+/478075 -Run-TryBot: Ian Lance Taylor -Reviewed-by: Ian Lance Taylor -Run-TryBot: Cherry Mui -Auto-Submit: Ian Lance Taylor -Reviewed-by: Cherry Mui -Reviewed-by: Heschi Kreinick -TryBot-Result: Gopher Robot ---- - src/cmd/asm/internal/asm/testdata/loong64.s | 5 +++-- - .../asm/internal/asm/testdata/loong64enc1.s | 6 ++++-- - src/cmd/internal/obj/loong64/asm.go | 20 +++++-------------- - 3 files changed, 12 insertions(+), 19 deletions(-) - -diff --git a/src/cmd/asm/internal/asm/testdata/loong64.s b/src/cmd/asm/internal/asm/testdata/loong64.s -index 6c44d2208a..51b195b4b0 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64.s -@@ -6,6 +6,7 @@ - // TODO: cover more instruction - - TEXT foo(SB),DUPOK|NOSPLIT,$0 -- JAL 1(PC) //CALL 1(PC) //00100054 -+ JAL 1(PC) //CALL 1(PC) //00040054 - JAL (R4) //CALL (R4) //8100004c -- JAL foo(SB) //CALL foo(SB) //00140054 -+ // relocation in play so the assembled offset should be 0 -+ JAL foo(SB) //CALL foo(SB) //00000054 -diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -index 4f3cb2b2ee..f5a80d5d17 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -@@ -13,9 +13,11 @@ lable2: - BFPF 1(PC) // 00040048 - BFPF lable2 // BFPF 4 // 1ffcff4b - -- JMP foo(SB) // 00100050 -+ // relocation in play so the assembled offset should be 0 -+ JMP foo(SB) // 00000050 -+ - JMP (R4) // 8000004c -- JMP 1(PC) // 00040058 -+ JMP 1(PC) // 00040050 - MOVW $65536, R4 // 04020014 - MOVW $4096, R4 // 24000014 - MOVV $65536, R4 // 04020014 -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 17c0539972..a2e25dfa71 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1263,24 +1263,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - - case 11: // jmp lbra - v := int32(0) -- if c.aclass(&p.To) == C_SBRA && p.To.Sym == nil && p.As == AJMP { -- // use PC-relative branch for short branches -- // BEQ R0, R0, sbra -- if p.To.Target() != nil { -- v = int32(p.To.Target().Pc-p.Pc) >> 2 -- } -- if (v<<16)>>16 == v { -- o1 = OP_16IRR(c.opirr(ABEQ), uint32(v), uint32(REGZERO), uint32(REGZERO)) -- break -- } -- } -- if p.To.Target() == nil { -- v = int32(p.Pc) >> 2 -- } else { -- v = int32(p.To.Target().Pc) >> 2 -+ if p.To.Target() != nil { -+ v = int32(p.To.Target().Pc-p.Pc) >> 2 - } - o1 = OP_B_BL(c.opirr(p.As), uint32(v)) - if p.To.Sym == nil { -+ if p.As == AJMP { -+ break -+ } - p.To.Sym = c.cursym.Func().Text.From.Sym - p.To.Offset = p.To.Target().Pc - } --- -2.38.1 - diff --git a/0046-cmd-internal-runtime-change-the-LR-parameter-registe.patch b/0046-cmd-internal-runtime-change-the-LR-parameter-registe.patch new file mode 100644 index 0000000000000000000000000000000000000000..c5090b6b4f27f9116ba1b3fa12458256cebf1e77 --- /dev/null +++ b/0046-cmd-internal-runtime-change-the-LR-parameter-registe.patch @@ -0,0 +1,64 @@ +From 732fba1be44d6c2f5e1462ff785ffecb378f01ad Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Fri, 17 Nov 2023 17:41:18 +0800 +Subject: [PATCH 46/51] cmd/internal,runtime: change the LR parameter register + convention when calling morestack to R31 + +Change-Id: I7e74ad8caf63f60a8caace3cb638bf88ea4630e9 +--- + src/cmd/internal/obj/loong64/obj.go | 4 ++-- + src/runtime/asm_loong64.s | 6 +++--- + 2 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go +index f1850f1caa..5033982cbc 100644 +--- a/src/cmd/internal/obj/loong64/obj.go ++++ b/src/cmd/internal/obj/loong64/obj.go +@@ -792,14 +792,14 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { + p.To.Type = obj.TYPE_BRANCH + p.Mark |= BRANCH + +- // MOV LINK, R30 ++ // MOV LINK, R31 + p = obj.Appendp(p, c.newprog) + + p.As = mov + p.From.Type = obj.TYPE_REG + p.From.Reg = REGLINK + p.To.Type = obj.TYPE_REG +- p.To.Reg = REG_R30 ++ p.To.Reg = REG_R31 + if q != nil { + q.To.SetTarget(p) + p.Mark |= LABEL +diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s +index 3c24e33cb3..af41d57553 100644 +--- a/src/runtime/asm_loong64.s ++++ b/src/runtime/asm_loong64.s +@@ -214,7 +214,7 @@ noswitch: + + // Called during function prolog when more stack is needed. + // Caller has already loaded: +-// loong64: R30: LR ++// loong64: R31: LR + // + // The traceback routines see morestack on a g0 as being + // the top of a stack (for example, morestack calling newstack +@@ -238,12 +238,12 @@ TEXT runtime·morestack(SB),NOSPLIT|NOFRAME,$0-0 + // Set g->sched to context in f. + MOVV R3, (g_sched+gobuf_sp)(g) + MOVV R1, (g_sched+gobuf_pc)(g) +- MOVV R30, (g_sched+gobuf_lr)(g) ++ MOVV R31, (g_sched+gobuf_lr)(g) + MOVV REGCTXT, (g_sched+gobuf_ctxt)(g) + + // Called from f. + // Set m->morebuf to f's caller. +- MOVV R30, (m_morebuf+gobuf_pc)(R7) // f's caller's PC ++ MOVV R31, (m_morebuf+gobuf_pc)(R7) // f's caller's PC + MOVV R3, (m_morebuf+gobuf_sp)(R7) // f's caller's SP + MOVV g, (m_morebuf+gobuf_g)(R7) + +-- +2.38.1 + diff --git a/0047-cmd-internal-obj-loong64-clean-up-code-for-short-con.patch b/0047-cmd-internal-obj-loong64-clean-up-code-for-short-con.patch deleted file mode 100644 index fdf888b1d13a6b13b14b7d9a7ce03cc05c77f815..0000000000000000000000000000000000000000 --- a/0047-cmd-internal-obj-loong64-clean-up-code-for-short-con.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 6ad6916ddb2a1e374c66f78464b0368389fe843a Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Wed, 22 Mar 2023 13:28:08 +0800 -Subject: [PATCH 47/62] cmd/internal/obj/loong64: clean up code for short - conditional branches - -Untangle the logic so the preparation of operands and actual assembling -(branch range checking included) are properly separated, making future -changes easier to review and maintain. No functional change intended. - -Change-Id: I1f73282f9d92ff23d84846453d3597ba66d207d1 ---- - src/cmd/internal/obj/loong64/asm.go | 30 ++++++++++++++--------------- - 1 file changed, 15 insertions(+), 15 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index a2e25dfa71..7d40b927f8 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1199,26 +1199,26 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - - case 6: // beq r1,[r2],sbra - v := int32(0) -- vcmp := int32(0) - if p.To.Target() != nil { - v = int32(p.To.Target().Pc-p.Pc) >> 2 - } -- if v < 0 { -- vcmp = -v -- } -- if (p.As == ABFPT || p.As == ABFPF) && ((uint32(vcmp))>>21)&0x7FF != 0 { -- c.ctxt.Diag("21 bit-width, short branch too far\n%v", p) -- } else if p.As != ABFPT && p.As != ABFPF && (v<<16)>>16 != v { -- c.ctxt.Diag("16 bit-width, short branch too far\n%v", p) -- } -+ rd, rj := p.Reg, p.From.Reg - if p.As == ABGTZ || p.As == ABLEZ { -- o1 = OP_16IRR(c.opirr(p.As), uint32(v), uint32(p.Reg), uint32(p.From.Reg)) -- } else if p.As == ABFPT || p.As == ABFPF { -- // BCNEZ cj offset21 ,cj = fcc0 -- // BCEQZ cj offset21 ,cj = fcc0 -+ rd, rj = rj, rd -+ } -+ switch p.As { -+ case ABFPT, ABFPF: -+ if (v<<11)>>11 != v { -+ c.ctxt.Diag("21 bit-width, short branch too far\n%v", p) -+ } -+ // FCC0 is the implicit source operand, now that we -+ // don't register-allocate from the FCC bank. - o1 = OP_16IR_5I(c.opirr(p.As), uint32(v), uint32(REG_FCC0)) -- } else { -- o1 = OP_16IRR(c.opirr(p.As), uint32(v), uint32(p.From.Reg), uint32(p.Reg)) -+ default: -+ if (v<<16)>>16 != v { -+ c.ctxt.Diag("16 bit-width, short branch too far\n%v", p) -+ } -+ o1 = OP_16IRR(c.opirr(p.As), uint32(v), uint32(rj), uint32(rd)) - } - - case 7: // mov r, soreg --- -2.38.1 - diff --git a/0047-cmd-runtime-enable-race-detector-on-loong64.patch b/0047-cmd-runtime-enable-race-detector-on-loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..fe80f1f910ad836e5866d2ca6cd7bd358467d379 --- /dev/null +++ b/0047-cmd-runtime-enable-race-detector-on-loong64.patch @@ -0,0 +1,590 @@ +From ee2afe75e0c3197818eb861dd8db85eeeef31de7 Mon Sep 17 00:00:00 2001 +From: Xiaolin Zhao +Date: Sat, 19 Aug 2023 09:22:34 +0800 +Subject: [PATCH 47/51] cmd,runtime: enable race detector on loong64 + +Change-Id: If389318215476890295ed771297c6c088cfc84b3 +--- + src/cmd/dist/test.go | 2 +- + src/internal/platform/supported.go | 2 +- + src/race.bash | 3 +- + src/runtime/asm_loong64.s | 1 + + src/runtime/race/README | 1 + + src/runtime/race/race.go | 2 +- + src/runtime/race_loong64.s | 480 +++++++++++++++++++++++ + 8 files changed, 487 insertions(+), 4 deletions(-) + create mode 100644 src/runtime/race_loong64.s + +diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go +index 864060cbb2..8a1568c068 100644 +--- a/src/cmd/dist/test.go ++++ b/src/cmd/dist/test.go +@@ -1533,7 +1533,7 @@ func (t *tester) makeGOROOTUnwritable() (undo func()) { + func raceDetectorSupported(goos, goarch string) bool { + switch goos { + case "linux": +- return goarch == "amd64" || goarch == "ppc64le" || goarch == "arm64" || goarch == "s390x" ++ return goarch == "amd64" || goarch == "ppc64le" || goarch == "arm64" || goarch == "s390x" || goarch == "loong64" + case "darwin": + return goarch == "amd64" || goarch == "arm64" + case "freebsd", "netbsd", "openbsd", "windows": +diff --git a/src/internal/platform/supported.go b/src/internal/platform/supported.go +index 715bfb5e48..1589a1ebd5 100644 +--- a/src/internal/platform/supported.go ++++ b/src/internal/platform/supported.go +@@ -23,7 +23,7 @@ func (p OSArch) String() string { + func RaceDetectorSupported(goos, goarch string) bool { + switch goos { + case "linux": +- return goarch == "amd64" || goarch == "ppc64le" || goarch == "arm64" || goarch == "s390x" ++ return goarch == "amd64" || goarch == "ppc64le" || goarch == "arm64" || goarch == "s390x" || goarch == "loong64" + case "darwin": + return goarch == "amd64" || goarch == "arm64" + case "freebsd", "netbsd", "openbsd", "windows": +diff --git a/src/race.bash b/src/race.bash +index f1a168bfbb..ae9f57ffd7 100755 +--- a/src/race.bash ++++ b/src/race.bash +@@ -9,7 +9,7 @@ + set -e + + function usage { +- echo 'race detector is only supported on linux/amd64, linux/ppc64le, linux/arm64, linux/s390x, freebsd/amd64, netbsd/amd64, openbsd/amd64, darwin/amd64, and darwin/arm64' 1>&2 ++ echo 'race detector is only supported on linux/amd64, linux/ppc64le, linux/arm64, linux/loong64, linux/s390x, freebsd/amd64, netbsd/amd64, openbsd/amd64, darwin/amd64, and darwin/arm64' 1>&2 + exit 1 + } + +@@ -19,6 +19,7 @@ case $(uname -s -m) in + "Linux x86_64") ;; + "Linux ppc64le") ;; + "Linux aarch64") ;; ++ "Linux loongarch64") ;; + "Linux s390x") ;; + "FreeBSD amd64") ;; + "NetBSD amd64") ;; +diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s +index af41d57553..e36bc10a2c 100644 +--- a/src/runtime/asm_loong64.s ++++ b/src/runtime/asm_loong64.s +@@ -37,6 +37,7 @@ TEXT runtime·rt0_go(SB),NOSPLIT|TOPFRAME,$0 + JAL (R25) + + nocgo: ++ //JAL runtime·save_g(SB) + // update stackguard after _cgo_init + MOVV (g_stack+stack_lo)(g), R19 + ADDV $const_stackGuard, R19 +diff --git a/src/runtime/race/README b/src/runtime/race/README +index acd8b84838..fc0b56ec69 100644 +--- a/src/runtime/race/README ++++ b/src/runtime/race/README +@@ -12,6 +12,7 @@ race_windows_amd64.syso built with LLVM b6374437af39af66896da74a1dc1b8a0ece26bee + race_linux_arm64.syso built with LLVM 41cb504b7c4b18ac15830107431a0c1eec73a6b2 and Go 851ecea4cc99ab276109493477b2c7e30c253ea8. + race_darwin_arm64.syso built with LLVM 41cb504b7c4b18ac15830107431a0c1eec73a6b2 and Go 851ecea4cc99ab276109493477b2c7e30c253ea8. + race_openbsd_amd64.syso built with LLVM fcf6ae2f070eba73074b6ec8d8281e54d29dbeeb and Go 8f2db14cd35bbd674cb2988a508306de6655e425. ++//TODO race_linux_loong64.syso built with ... + race_linux_s390x.syso built with LLVM 41cb504b7c4b18ac15830107431a0c1eec73a6b2 and Go 851ecea4cc99ab276109493477b2c7e30c253ea8. + internal/amd64v3/race_linux.syso built with LLVM 74c2d4f6024c8f160871a2baa928d0b42415f183 and Go c0f27eb3d580c8b9efd73802678eba4c6c9461be. + internal/amd64v1/race_linux.syso built with LLVM 74c2d4f6024c8f160871a2baa928d0b42415f183 and Go c0f27eb3d580c8b9efd73802678eba4c6c9461be. +diff --git a/src/runtime/race/race.go b/src/runtime/race/race.go +index 9c508ebc2b..9fd75424ca 100644 +--- a/src/runtime/race/race.go ++++ b/src/runtime/race/race.go +@@ -2,7 +2,7 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-//go:build race && ((linux && (amd64 || arm64 || ppc64le || s390x)) || ((freebsd || netbsd || openbsd || windows) && amd64)) ++//go:build race && ((linux && (amd64 || arm64 || loong64 || ppc64le || s390x)) || ((freebsd || netbsd || openbsd || windows) && amd64)) + + package race + +diff --git a/src/runtime/race_loong64.s b/src/runtime/race_loong64.s +new file mode 100644 +index 0000000000..5e7bd6d716 +--- /dev/null ++++ b/src/runtime/race_loong64.s +@@ -0,0 +1,480 @@ ++// Copyright 2023 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++//go:build race ++ ++#include "go_asm.h" ++#include "funcdata.h" ++#include "textflag.h" ++#include "cgo/abi_loong64.h" ++ ++// The following thunks allow calling the gcc-compiled race runtime directly ++// from Go code without going all the way through cgo. ++// First, it's much faster (up to 50% speedup for real Go programs). ++// Second, it eliminates race-related special cases from cgocall and scheduler. ++// Third, in long-term it will allow to remove cyclic runtime/race dependency on cmd/go. ++ ++// A brief recap of the loong64 calling convention. ++// Arguments are passed in R4...R11, the rest is on stack. ++// Callee-saved registers are: R23...R30. ++// Temporary registers are: R12...R20 ++// SP must be 16-byte aligned. ++ ++// When calling racecalladdr, R20 is the call target address. ++ ++// The race ctx, ThreadState *thr below, is passed in R4 and loaded in racecalladdr. ++ ++// Load g from TLS. (See tls_loong64.s) ++#define load_g \ ++ MOVV runtime·tls_g(SB), g ++ ++#define RARG0 R4 ++#define RARG1 R5 ++#define RARG2 R6 ++#define RARG3 R7 ++#define RCALL R20 ++ ++// func runtime·raceread(addr uintptr) ++// Called from instrumented code. ++// Defined as ABIInternal so as to avoid introducing a wrapper, ++// which would make caller's PC ineffective. ++TEXT runtime·raceread(SB), NOSPLIT, $0-8 ++ MOVV addr+0(FP), RARG1 ++ MOVV R1, RARG2 ++ // void __tsan_read(ThreadState *thr, void *addr, void *pc); ++ MOVV $__tsan_read(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·RaceRead(addr uintptr) ++TEXT runtime·RaceRead(SB), NOSPLIT, $0-8 ++ // This needs to be a tail call, because raceread reads caller pc. ++ JMP runtime·raceread(SB) ++ ++// func runtime·racereadpc(void *addr, void *callpc, void *pc) ++TEXT runtime·racereadpc(SB), NOSPLIT, $0-24 ++ MOVV addr+0(FP), RARG1 ++ MOVV callpc+8(FP), RARG2 ++ MOVV pc+16(FP), RARG3 ++ // void __tsan_read_pc(ThreadState *thr, void *addr, void *callpc, void *pc); ++ MOVV $__tsan_read_pc(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·racewrite(addr uintptr) ++// Called from instrumented code. ++// Defined as ABIInternal so as to avoid introducing a wrapper, ++// which would make caller's PC ineffective. ++TEXT runtime·racewrite(SB), NOSPLIT, $0-8 ++ MOVV addr+0(FP), RARG1 ++ MOVV R1, RARG2 ++ // void __tsan_write(ThreadState *thr, void *addr, void *pc); ++ MOVV $__tsan_write(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·RaceWrite(addr uintptr) ++TEXT runtime·RaceWrite(SB), NOSPLIT, $0-8 ++ // This needs to be a tail call, because racewrite reads caller pc. ++ JMP runtime·racewrite(SB) ++ ++// func runtime·racewritepc(void *addr, void *callpc, void *pc) ++TEXT runtime·racewritepc(SB), NOSPLIT, $0-24 ++ MOVV addr+0(FP), RARG1 ++ MOVV callpc+8(FP), RARG2 ++ MOVV pc+16(FP), RARG3 ++ // void __tsan_write_pc(ThreadState *thr, void *addr, void *callpc, void *pc); ++ MOVV $__tsan_write_pc(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·racereadrange(addr, size uintptr) ++// Called from instrumented code. ++// Defined as ABIInternal so as to avoid introducing a wrapper, ++// which would make caller's PC ineffective. ++TEXT runtime·racereadrange(SB), NOSPLIT, $0-16 ++ MOVV addr+0(FP), RARG1 ++ MOVV size+8(FP), RARG2 ++ MOVV R1, RARG3 ++ // void __tsan_read_range(ThreadState *thr, void *addr, uintptr size, void *pc); ++ MOVV $__tsan_read_range(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·RaceReadRange(addr, size uintptr) ++TEXT runtime·RaceReadRange(SB), NOSPLIT, $0-16 ++ // This needs to be a tail call, because racereadrange reads caller pc. ++ JMP runtime·racereadrange(SB) ++ ++// func runtime·racereadrangepc1(void *addr, uintptr sz, void *pc) ++TEXT runtime·racereadrangepc1(SB), NOSPLIT, $0-24 ++ MOVV addr+0(FP), RARG1 ++ MOVV size+8(FP), RARG2 ++ MOVV pc+16(FP), RARG3 ++ ADDV $4, RARG3 // pc is function start, tsan wants return address. ++ // void __tsan_read_range(ThreadState *thr, void *addr, uintptr size, void *pc); ++ MOVV $__tsan_read_range(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·racewriterange(addr, size uintptr) ++// Called from instrumented code. ++// Defined as ABIInternal so as to avoid introducing a wrapper, ++// which would make caller's PC ineffective. ++TEXT runtime·racewriterange(SB), NOSPLIT, $0-16 ++ MOVV addr+0(FP), RARG1 ++ MOVV size+8(FP), RARG2 ++ MOVV R1, RARG3 ++ // void __tsan_write_range(ThreadState *thr, void *addr, uintptr size, void *pc); ++ MOVV $__tsan_write_range(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// func runtime·RaceWriteRange(addr, size uintptr) ++TEXT runtime·RaceWriteRange(SB), NOSPLIT, $0-16 ++ // This needs to be a tail call, because racewriterange reads caller pc. ++ JMP runtime·racewriterange(SB) ++ ++// func runtime·racewriterangepc1(void *addr, uintptr sz, void *pc) ++TEXT runtime·racewriterangepc1(SB), NOSPLIT, $0-24 ++ MOVV addr+0(FP), RARG1 ++ MOVV size+8(FP), RARG2 ++ MOVV pc+16(FP), RARG3 ++ ADDV $4, RARG3 // pc is function start, tsan wants return address. ++ // void __tsan_write_range(ThreadState *thr, void *addr, uintptr size, void *pc); ++ MOVV $__tsan_write_range(SB), RCALL ++ JMP racecalladdr<>(SB) ++ ++// Call a __tsan function from Go code. ++// ++// RCALL = tsan function address ++// RARG0 = *ThreadState a.k.a. g_racectx from g ++// RARG1 = addr passed to __tsan function ++// ++// If addr (RARG1) is out of range, do nothing. Otherwise, setup goroutine ++// context and invoke racecall. Other arguments already set. ++TEXT racecalladdr<>(SB), NOSPLIT, $0-0 ++ // Check that addr is within [arenastart, arenaend) or within [racedatastart, racedataend). ++ MOVV runtime·racearenastart(SB), R12 ++ BLT RARG1, R12, data ++ MOVV runtime·racearenaend(SB), R12 ++ BLT RARG1, R12, call ++data: ++ MOVV runtime·racedatastart(SB), R12 ++ BLT RARG1, R12, ret ++ MOVV runtime·racedataend(SB), R12 ++ BGE RARG1, R12, ret ++call: ++ load_g ++ MOVV g_racectx(g), RARG0 ++ JMP racecall<>(SB) ++ret: ++ RET ++ ++// func runtime·racefuncenter(pc uintptr) ++// Called from instrumented code. ++TEXT runtime·racefuncenter(SB), NOSPLIT, $0-8 ++ MOVV callpc+0(FP), RCALL ++ JMP racefuncenter<>(SB) ++ ++// Common code for racefuncenter ++// RCALL = caller's return address ++TEXT racefuncenter<>(SB), NOSPLIT, $0-0 ++ load_g ++ MOVV g_racectx(g), RARG0 // goroutine racectx ++ MOVV RCALL, RARG1 ++ // void __tsan_func_enter(ThreadState *thr, void *pc); ++ MOVV $__tsan_func_enter(SB), RCALL ++ JAL racecall<>(SB) ++ RET ++ ++// func runtime·racefuncexit() ++// Called from instrumented code. ++TEXT runtime·racefuncexit(SB), NOSPLIT, $0-0 ++ load_g ++ MOVV g_racectx(g), RARG0 // race context ++ // void __tsan_func_exit(ThreadState *thr); ++ MOVV $__tsan_func_exit(SB), RCALL ++ JMP racecall<>(SB) ++ ++// Atomic operations for sync/atomic package. ++// R7 = addr of arguments passed to this function, it can ++// be fetched at 24(R3) in racecallatomic after two times JAL ++// RARG0, RARG1, RARG2 set in racecallatomic ++ ++// Load ++TEXT sync∕atomic·LoadInt32(SB), NOSPLIT, $0-12 ++ GO_ARGS ++ MOVV $__tsan_go_atomic32_load(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·LoadInt64(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ MOVV $__tsan_go_atomic64_load(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·LoadUint32(SB), NOSPLIT, $0-12 ++ GO_ARGS ++ JMP sync∕atomic·LoadInt32(SB) ++ ++TEXT sync∕atomic·LoadUint64(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ JMP sync∕atomic·LoadInt64(SB) ++ ++TEXT sync∕atomic·LoadUintptr(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ JMP sync∕atomic·LoadInt64(SB) ++ ++TEXT sync∕atomic·LoadPointer(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ JMP sync∕atomic·LoadInt64(SB) ++ ++// Store ++TEXT sync∕atomic·StoreInt32(SB), NOSPLIT, $0-12 ++ GO_ARGS ++ MOVV $__tsan_go_atomic32_store(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·StoreInt64(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ MOVV $__tsan_go_atomic64_store(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·StoreUint32(SB), NOSPLIT, $0-12 ++ GO_ARGS ++ JMP sync∕atomic·StoreInt32(SB) ++ ++TEXT sync∕atomic·StoreUint64(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ JMP sync∕atomic·StoreInt64(SB) ++ ++TEXT sync∕atomic·StoreUintptr(SB), NOSPLIT, $0-16 ++ GO_ARGS ++ JMP sync∕atomic·StoreInt64(SB) ++ ++// Swap ++TEXT sync∕atomic·SwapInt32(SB), NOSPLIT, $0-20 ++ GO_ARGS ++ MOVV $__tsan_go_atomic32_exchange(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·SwapInt64(SB), NOSPLIT, $0-24 ++ GO_ARGS ++ MOVV $__tsan_go_atomic64_exchange(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·SwapUint32(SB), NOSPLIT, $0-20 ++ GO_ARGS ++ JMP sync∕atomic·SwapInt32(SB) ++ ++TEXT sync∕atomic·SwapUint64(SB), NOSPLIT, $0-24 ++ GO_ARGS ++ JMP sync∕atomic·SwapInt64(SB) ++ ++TEXT sync∕atomic·SwapUintptr(SB), NOSPLIT, $0-24 ++ GO_ARGS ++ JMP sync∕atomic·SwapInt64(SB) ++ ++// Add ++TEXT sync∕atomic·AddInt32(SB), NOSPLIT, $0-20 ++ GO_ARGS ++ MOVV $__tsan_go_atomic32_fetch_add(SB), RCALL ++ JAL racecallatomic<>(SB) ++ MOVW add+8(FP), RARG0 // convert fetch_add to add_fetch ++ MOVW ret+16(FP), RARG1 ++ ADD RARG0, RARG1, RARG0 ++ MOVW RARG0, ret+16(FP) ++ RET ++ ++TEXT sync∕atomic·AddInt64(SB), NOSPLIT, $0-24 ++ GO_ARGS ++ MOVV $__tsan_go_atomic64_fetch_add(SB), RCALL ++ JAL racecallatomic<>(SB) ++ MOVV add+8(FP), RARG0 // convert fetch_add to add_fetch ++ MOVV ret+16(FP), RARG1 ++ ADDV RARG0, RARG1, RARG0 ++ MOVV RARG0, ret+16(FP) ++ RET ++ ++TEXT sync∕atomic·AddUint32(SB), NOSPLIT, $0-20 ++ GO_ARGS ++ JMP sync∕atomic·AddInt32(SB) ++ ++TEXT sync∕atomic·AddUint64(SB), NOSPLIT, $0-24 ++ GO_ARGS ++ JMP sync∕atomic·AddInt64(SB) ++ ++TEXT sync∕atomic·AddUintptr(SB), NOSPLIT, $0-24 ++ GO_ARGS ++ JMP sync∕atomic·AddInt64(SB) ++ ++// CompareAndSwap ++TEXT sync∕atomic·CompareAndSwapInt32(SB), NOSPLIT, $0-17 ++ GO_ARGS ++ MOVV $__tsan_go_atomic32_compare_exchange(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·CompareAndSwapInt64(SB), NOSPLIT, $0-25 ++ GO_ARGS ++ MOVV $__tsan_go_atomic64_compare_exchange(SB), RCALL ++ JAL racecallatomic<>(SB) ++ RET ++ ++TEXT sync∕atomic·CompareAndSwapUint32(SB), NOSPLIT, $0-17 ++ GO_ARGS ++ JMP sync∕atomic·CompareAndSwapInt32(SB) ++ ++TEXT sync∕atomic·CompareAndSwapUint64(SB), NOSPLIT, $0-25 ++ GO_ARGS ++ JMP sync∕atomic·CompareAndSwapInt64(SB) ++ ++TEXT sync∕atomic·CompareAndSwapUintptr(SB), NOSPLIT, $0-25 ++ GO_ARGS ++ JMP sync∕atomic·CompareAndSwapInt64(SB) ++ ++// Generic atomic operation implementation. ++// RCALL = addr of target function ++TEXT racecallatomic<>(SB), NOSPLIT, $0 ++ // Set up these registers ++ // RARG0 = *ThreadState ++ // RARG1 = caller pc ++ // RARG2 = pc ++ // RARG3 = addr of incoming arg list ++ ++ // Trigger SIGSEGV early. ++ MOVV 24(R3), RARG3 // 1st arg is addr. after two times JAL, get it at 24(R3) ++ MOVB (RARG3), R12 // segv here if addr is bad ++ ++ // Check that addr is within [arenastart, arenaend) or within [racedatastart, racedataend). ++ MOVV runtime·racearenastart(SB), R12 ++ BLT RARG3, R12, racecallatomic_data ++ MOVV runtime·racearenaend(SB), R12 ++ BLT RARG3, R12, racecallatomic_ok ++ ++racecallatomic_data: ++ MOVV runtime·racedatastart(SB), R12 ++ BLT RARG3, R12, racecallatomic_ignore ++ MOVV runtime·racedataend(SB), R12 ++ BGE RARG3, R12, racecallatomic_ignore ++ ++racecallatomic_ok: ++ // Addr is within the good range, call the atomic function. ++ load_g ++ MOVV g_racectx(g), RARG0 // goroutine context ++ MOVV 8(R3), RARG1 // caller pc ++ MOVV RCALL, RARG2 // pc ++ ADDV $24, R3, RARG3 ++ JAL racecall<>(SB) // does not return ++ RET ++ ++racecallatomic_ignore: ++ // Addr is outside the good range. ++ // Call __tsan_go_ignore_sync_begin to ignore synchronization during the atomic op. ++ // An attempt to synchronize on the address would cause crash. ++ MOVV RCALL, R25 // remember the original function ++ MOVV $__tsan_go_ignore_sync_begin(SB), RCALL ++ load_g ++ MOVV g_racectx(g), RARG0 // goroutine context ++ JAL racecall<>(SB) ++ MOVV R25, RCALL // restore the original function ++ ++ // Call the atomic function. ++ // racecall will call LLVM race code which might clobber R22 (g) ++ load_g ++ MOVV g_racectx(g), RARG0 // goroutine context ++ MOVV 8(R3), RARG1 // caller pc ++ MOVV RCALL, RARG2 // pc ++ ADDV $24, R3, RARG3 // arguments ++ JAL racecall<>(SB) ++ ++ // Call __tsan_go_ignore_sync_end. ++ MOVV $__tsan_go_ignore_sync_end(SB), RCALL ++ MOVV g_racectx(g), RARG0 // goroutine context ++ JAL racecall<>(SB) ++ RET ++ ++// func runtime·racecall(void(*f)(...), ...) ++// Calls C function f from race runtime and passes up to 4 arguments to it. ++// The arguments are never heap-object-preserving pointers, so we pretend there are no arguments. ++TEXT runtime·racecall(SB), NOSPLIT, $0-0 ++ MOVV fn+0(FP), RCALL ++ MOVV arg0+8(FP), RARG0 ++ MOVV arg1+16(FP), RARG1 ++ MOVV arg2+24(FP), RARG2 ++ MOVV arg3+32(FP), RARG3 ++ JMP racecall<>(SB) ++ ++// Switches SP to g0 stack and calls (RCALL). Arguments already set. ++TEXT racecall<>(SB), NOSPLIT|NOFRAME, $0-0 ++ MOVV g_m(g), R12 ++ // Switch to g0 stack. ++ MOVV R3, R23 // callee-saved, preserved across the CALL ++ MOVV R1, R24 // callee-saved, preserved across the CALL ++ MOVV m_g0(R12), R13 ++ BEQ R13, g, call // already on g0 ++ MOVV (g_sched+gobuf_sp)(R13), R3 ++call: ++ JAL (RCALL) ++ MOVV R23, R3 ++ JAL (R24) ++ RET ++ ++// C->Go callback thunk that allows to call runtime·racesymbolize from C code. ++// Direct Go->C race call has only switched SP, finish g->g0 switch by setting correct g. ++// The overall effect of Go->C->Go call chain is similar to that of mcall. ++// RARG0 contains command code. RARG1 contains command-specific context. ++// See racecallback for command codes. ++TEXT runtime·racecallbackthunk(SB), NOSPLIT|NOFRAME, $0 ++ // Handle command raceGetProcCmd (0) here. ++ // First, code below assumes that we are on curg, while raceGetProcCmd ++ // can be executed on g0. Second, it is called frequently, so will ++ // benefit from this fast path. ++ BNE RARG0, R0, rest ++ MOVV g, R15 ++ load_g ++ MOVV g_m(g), RARG0 ++ MOVV m_p(RARG0), RARG0 ++ MOVV p_raceprocctx(RARG0), RARG0 ++ MOVV RARG0, (RARG1) ++ MOVV R15, g ++ JMP (R1) ++rest: ++ // Save callee-saved registers (Go code won't respect that). ++ // 8(R3) and 16(R3) are for args passed through racecallback ++ ADDV $-176, R3 ++ MOVV R1, 0(R3) ++ ++ SAVE_R22_TO_R31(8*3) ++ SAVE_F24_TO_F31(8*13) ++ // Set g = g0. ++ load_g ++ MOVV g_m(g), R15 ++ MOVV m_g0(R15), R14 ++ BEQ R14, g, noswitch // branch if already on g0 ++ MOVV R14, g ++ ++ MOVV RARG0, 8(R3) // func arg ++ MOVV RARG1, 16(R3) // func arg ++ JAL runtime·racecallback(SB) ++ ++ // All registers are smashed after Go code, reload. ++ MOVV g_m(g), R15 ++ MOVV m_curg(R15), g // g = m->curg ++ret: ++ // Restore callee-saved registers. ++ MOVV 0(R3), R1 ++ RESTORE_F24_TO_F31(8*13) ++ RESTORE_R22_TO_R31(8*3) ++ ADDV $176, R3 ++ JMP (R1) ++ ++noswitch: ++ // already on g0 ++ MOVV RARG0, 8(R3) // func arg ++ MOVV RARG1, 16(R3) // func arg ++ JAL runtime·racecallback(SB) ++ JMP ret ++ ++// tls_g, g value for each thread in TLS ++GLOBL runtime·tls_g+0(SB), TLSBSS+DUPOK, $8 +-- +2.38.1 + diff --git a/0048-cmd-internal-obj-loong64-assemble-BEQ-BNEs-comparing.patch b/0048-cmd-internal-obj-loong64-assemble-BEQ-BNEs-comparing.patch deleted file mode 100644 index b732fc2dab2853c5c20b0b06ca052d2eff8cdd75..0000000000000000000000000000000000000000 --- a/0048-cmd-internal-obj-loong64-assemble-BEQ-BNEs-comparing.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 08108cdba9826583a1b6f7c32d7c378de1d336ad Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Wed, 22 Mar 2023 13:56:38 +0800 -Subject: [PATCH 48/62] cmd/internal/obj/loong64: assemble BEQ/BNEs comparing - with 0 as beqz/bnez - -LoongArch (except for the extremely reduced LA32 Primary subset) has -dedicated beqz/bnez instructions as alternative encodings for beq/bne -with one of the source registers being R0, that allow the offset field -to occupy 5 more bits, giving 21 bits in total (equal to the FP -branches). Make use of them instead of beq/bne if one source operand is -omitted in asm, or if one of the registers being compared is R0. - -Multiple go1 benchmark runs indicate the change is not perf-sensitive. - -Change-Id: If6267623c82092e81d75578091fb4e013658b9f3 ---- - .../asm/internal/asm/testdata/loong64enc1.s | 8 +++- - src/cmd/internal/obj/loong64/asm.go | 39 ++++++++++++++----- - 2 files changed, 36 insertions(+), 11 deletions(-) - -diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -index f5a80d5d17..ea6c569f9d 100644 ---- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s -+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s -@@ -116,7 +116,13 @@ lable2: - ROTRV $4, R4 // 84104d00 - SYSCALL // 00002b00 - BEQ R4, R5, 1(PC) // 85040058 -- BEQ R4, 1(PC) // 80040058 -+ BEQ R4, 1(PC) // 80040040 -+ BEQ R4, R0, 1(PC) // 80040040 -+ BEQ R0, R4, 1(PC) // 80040040 -+ BNE R4, R5, 1(PC) // 8504005c -+ BNE R4, 1(PC) // 80040044 -+ BNE R4, R0, 1(PC) // 80040044 -+ BNE R0, R4, 1(PC) // 80040044 - BLTU R4, 1(PC) // 80040068 - MOVW y+8(FP), F4 // 6440002b - MOVF y+8(FP), F4 // 6440002b -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 7d40b927f8..3973674998 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -1115,7 +1115,7 @@ func OP_RR(op uint32, r2 uint32, r3 uint32) uint32 { - } - - func OP_16IR_5I(op uint32, i uint32, r2 uint32) uint32 { -- return op | (i&0xFFFF)<<10 | (r2&0x7)<<5 | ((i >> 16) & 0x1F) -+ return op | (i&0xFFFF)<<10 | (r2&0x1F)<<5 | ((i >> 16) & 0x1F) - } - - func OP_16IRR(op uint32, i uint32, r2 uint32, r3 uint32) uint32 { -@@ -1202,23 +1202,38 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - if p.To.Target() != nil { - v = int32(p.To.Target().Pc-p.Pc) >> 2 - } -- rd, rj := p.Reg, p.From.Reg -- if p.As == ABGTZ || p.As == ABLEZ { -+ as, rd, rj, width := p.As, p.Reg, p.From.Reg, 16 -+ switch as { -+ case ABGTZ, ABLEZ: - rd, rj = rj, rd -- } -- switch p.As { - case ABFPT, ABFPF: -+ width = 21 -+ // FCC0 is the implicit source operand, now that we -+ // don't register-allocate from the FCC bank. -+ rd = REG_FCC0 -+ case ABEQ, ABNE: -+ if rd == 0 || rd == REGZERO || rj == REGZERO { -+ // BEQZ/BNEZ can be encoded with 21-bit offsets. -+ width = 21 -+ as = -as -+ if rj == 0 || rj == REGZERO { -+ rj = rd -+ } -+ } -+ } -+ switch width { -+ case 21: - if (v<<11)>>11 != v { - c.ctxt.Diag("21 bit-width, short branch too far\n%v", p) - } -- // FCC0 is the implicit source operand, now that we -- // don't register-allocate from the FCC bank. -- o1 = OP_16IR_5I(c.opirr(p.As), uint32(v), uint32(REG_FCC0)) -- default: -+ o1 = OP_16IR_5I(c.opirr(as), uint32(v), uint32(rj)) -+ case 16: - if (v<<16)>>16 != v { - c.ctxt.Diag("16 bit-width, short branch too far\n%v", p) - } -- o1 = OP_16IRR(c.opirr(p.As), uint32(v), uint32(rj), uint32(rd)) -+ o1 = OP_16IRR(c.opirr(as), uint32(v), uint32(rj), uint32(rd)) -+ default: -+ c.ctxt.Diag("unexpected branch encoding\n%v", p) - } - - case 7: // mov r, soreg -@@ -1972,6 +1987,10 @@ func (c *ctxt0) opirr(a obj.As) uint32 { - return 0x1b << 26 - case ABGE, ABGEZ, ABLEZ: - return 0x19 << 26 -+ case -ABEQ: // beqz -+ return 0x10 << 26 -+ case -ABNE: // bnez -+ return 0x11 << 26 - case ABEQ: - return 0x16 << 26 - case ABNE: --- -2.38.1 - diff --git a/0048-runtime-Mark-race-functions-on-loong64-as-ABInternal.patch b/0048-runtime-Mark-race-functions-on-loong64-as-ABInternal.patch new file mode 100644 index 0000000000000000000000000000000000000000..d01d45501b62e6d52133596aa9428f649e6ecb51 --- /dev/null +++ b/0048-runtime-Mark-race-functions-on-loong64-as-ABInternal.patch @@ -0,0 +1,132 @@ +From d2ea24ad8cd398ad1a4401b1996726d405cf96a0 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Thu, 2 Nov 2023 20:57:03 +0800 +Subject: [PATCH 48/51] runtime: Mark race functions on loong64 as ABInternal + +This adds ABIInternal to the race function declarations. + +Signed-off-by: Guoqi Chen +Change-Id: I123de85437344138c1942f5c5490d0bf7e27565d +--- + src/runtime/race_loong64.s | 43 +++++++++++++++++++++++++++++++------- + 1 file changed, 36 insertions(+), 7 deletions(-) + +diff --git a/src/runtime/race_loong64.s b/src/runtime/race_loong64.s +index 5e7bd6d716..0512efc045 100644 +--- a/src/runtime/race_loong64.s ++++ b/src/runtime/race_loong64.s +@@ -39,8 +39,12 @@ + // Called from instrumented code. + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. +-TEXT runtime·raceread(SB), NOSPLIT, $0-8 ++TEXT runtime·raceread(SB), NOSPLIT, $0-8 ++#ifdef GOEXPERIMENT_regabiargs ++ MOVV R4, RARG1 ++#else + MOVV addr+0(FP), RARG1 ++#endif + MOVV R1, RARG2 + // void __tsan_read(ThreadState *thr, void *addr, void *pc); + MOVV $__tsan_read(SB), RCALL +@@ -64,8 +68,12 @@ TEXT runtime·racereadpc(SB), NOSPLIT, $0-24 + // Called from instrumented code. + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. +-TEXT runtime·racewrite(SB), NOSPLIT, $0-8 ++TEXT runtime·racewrite(SB), NOSPLIT, $0-8 ++#ifdef GOEXPERIMENT_regabiargs ++ MOVV R4, RARG1 ++#else + MOVV addr+0(FP), RARG1 ++#endif + MOVV R1, RARG2 + // void __tsan_write(ThreadState *thr, void *addr, void *pc); + MOVV $__tsan_write(SB), RCALL +@@ -89,9 +97,14 @@ TEXT runtime·racewritepc(SB), NOSPLIT, $0-24 + // Called from instrumented code. + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. +-TEXT runtime·racereadrange(SB), NOSPLIT, $0-16 ++TEXT runtime·racereadrange(SB), NOSPLIT, $0-16 ++#ifdef GOEXPERIMENT_regabiargs ++ MOVV R5, RARG2 ++ MOVV R4, RARG1 ++#else + MOVV addr+0(FP), RARG1 + MOVV size+8(FP), RARG2 ++#endif + MOVV R1, RARG3 + // void __tsan_read_range(ThreadState *thr, void *addr, uintptr size, void *pc); + MOVV $__tsan_read_range(SB), RCALL +@@ -116,9 +129,14 @@ TEXT runtime·racereadrangepc1(SB), NOSPLIT, $0-24 + // Called from instrumented code. + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. +-TEXT runtime·racewriterange(SB), NOSPLIT, $0-16 ++TEXT runtime·racewriterange(SB), NOSPLIT, $0-16 ++#ifdef GOEXPERIMENT_regabiargs ++ MOVV R5, RARG2 ++ MOVV R4, RARG1 ++#else + MOVV addr+0(FP), RARG1 + MOVV size+8(FP), RARG2 ++#endif + MOVV R1, RARG3 + // void __tsan_write_range(ThreadState *thr, void *addr, uintptr size, void *pc); + MOVV $__tsan_write_range(SB), RCALL +@@ -167,8 +185,12 @@ ret: + + // func runtime·racefuncenter(pc uintptr) + // Called from instrumented code. +-TEXT runtime·racefuncenter(SB), NOSPLIT, $0-8 ++TEXT runtime·racefuncenter(SB), NOSPLIT, $0-8 ++#ifdef GOEXPERIMENT_regabiargs ++ MOVV R4, RCALL ++#else + MOVV callpc+0(FP), RCALL ++#endif + JMP racefuncenter<>(SB) + + // Common code for racefuncenter +@@ -184,7 +206,7 @@ TEXT racefuncenter<>(SB), NOSPLIT, $0-0 + + // func runtime·racefuncexit() + // Called from instrumented code. +-TEXT runtime·racefuncexit(SB), NOSPLIT, $0-0 ++TEXT runtime·racefuncexit(SB), NOSPLIT, $0-0 + load_g + MOVV g_racectx(g), RARG0 // race context + // void __tsan_func_exit(ThreadState *thr); +@@ -454,10 +476,13 @@ rest: + BEQ R14, g, noswitch // branch if already on g0 + MOVV R14, g + ++#ifdef GOEXPERIMENT_regabiargs ++ JAL runtime·racecallback(SB) ++#else + MOVV RARG0, 8(R3) // func arg + MOVV RARG1, 16(R3) // func arg + JAL runtime·racecallback(SB) +- ++#endif + // All registers are smashed after Go code, reload. + MOVV g_m(g), R15 + MOVV m_curg(R15), g // g = m->curg +@@ -471,9 +496,13 @@ ret: + + noswitch: + // already on g0 ++#ifdef GOEXPERIMENT_regabiargs ++ JAL runtime·racecallback(SB) ++#else + MOVV RARG0, 8(R3) // func arg + MOVV RARG1, 16(R3) // func arg + JAL runtime·racecallback(SB) ++#endif + JMP ret + + // tls_g, g value for each thread in TLS +-- +2.38.1 + diff --git a/0049-cmd-internal-obj-loong64-remove-Optab.family-and-reo.patch b/0049-cmd-internal-obj-loong64-remove-Optab.family-and-reo.patch deleted file mode 100644 index 0ffb7149a68a13371a4a2cccd441048561e118ea..0000000000000000000000000000000000000000 --- a/0049-cmd-internal-obj-loong64-remove-Optab.family-and-reo.patch +++ /dev/null @@ -1,822 +0,0 @@ -From 8119503dbdd4d444b9c89cd21d3e67bcf9750c80 Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Thu, 16 Mar 2023 18:18:04 +0800 -Subject: [PATCH 49/62] cmd/internal/obj/loong64: remove Optab.family and - reorganize operand class fields - -There is currently no support for GOARCH=loong32, so the Optab.family -field is unused so far. Remove it to simplify the optab; the loong -assembler backend would likely already be overhauled into a sufficiently -different shape by the time we start to care for loong32, that the data -we have today would be useless anyway. - -While at it, add a operand class slot for the 3rd source operand -(support for which will arrive in later commits), and rename the other -operand class fields to be self-documenting. The changes are being -merged into this patch for sake of reducing code churn. - -Change-Id: Icf0988e34ff1c0f762c8e0708cfcef2e7954760c -Reviewed-on: https://go-review.googlesource.com/c/go/+/477715 -Reviewed-by: abner chenc -Run-TryBot: Ben Shi -Reviewed-by: Matthew Dempsky -TryBot-Result: Gopher Robot -Reviewed-by: Cherry Mui -Auto-Submit: Wayne Zuo ---- - src/cmd/internal/obj/loong64/asm.go | 709 ++++++++++++++-------------- - 1 file changed, 360 insertions(+), 349 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 3973674998..0bc3f9c75e 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -7,7 +7,6 @@ package loong64 - import ( - "cmd/internal/obj" - "cmd/internal/objabi" -- "cmd/internal/sys" - "fmt" - "log" - "sort" -@@ -32,16 +31,16 @@ const ( - ) - - type Optab struct { -- as obj.As -- a1 uint8 // first source operand -- a2 uint8 // 2nd source operand -- a3 uint8 // first destination operand -- a4 uint8 // 2nd destination operand -- type_ int8 -- size int8 -- param int16 -- family sys.ArchFamily -- flag uint8 -+ as obj.As -+ from1 uint8 -+ reg uint8 -+ from3 uint8 -+ to1 uint8 -+ to2 uint8 -+ type_ int8 -+ size int8 -+ param int16 -+ flag uint8 - } - - const ( -@@ -49,328 +48,329 @@ const ( - ) - - var optab = []Optab{ -- {obj.ATEXT, C_ADDR, C_NONE, C_TEXTSIZE, C_NONE, 0, 0, 0, 0, 0}, -- -- {AMOVW, C_REG, C_NONE, C_REG, C_NONE, 1, 4, 0, 0, 0}, -- {AMOVV, C_REG, C_NONE, C_REG, C_NONE, 1, 4, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_REG, C_NONE, 12, 8, 0, 0, NOTUSETMP}, -- {AMOVBU, C_REG, C_NONE, C_REG, C_NONE, 13, 4, 0, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_REG, C_NONE, 14, 8, 0, sys.Loong64, NOTUSETMP}, -- -- {ASUB, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {ASUBV, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- {AADD, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {AADDV, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- {AAND, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {ASUB, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {ASUBV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- {AADD, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {AADDV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- {AAND, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {ANEGW, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {ANEGV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- {AMASKEQZ, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- -- {ASLL, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, 0, 0}, -- {ASLL, C_REG, C_REG, C_REG, C_NONE, 9, 4, 0, 0, 0}, -- {ASLLV, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, sys.Loong64, 0}, -- {ASLLV, C_REG, C_REG, C_REG, C_NONE, 9, 4, 0, sys.Loong64, 0}, -- {ACLO, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, 0, 0}, -- -- {AADDF, C_FREG, C_NONE, C_FREG, C_NONE, 32, 4, 0, 0, 0}, -- {AADDF, C_FREG, C_REG, C_FREG, C_NONE, 32, 4, 0, 0, 0}, -- {ACMPEQF, C_FREG, C_REG, C_NONE, C_NONE, 32, 4, 0, 0, 0}, -- {AABSF, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0, 0}, -- {AMOVVF, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0, 0}, -- -- {AMOVW, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVWL, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVVL, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -- {AMOVWL, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0, 0}, -- {AMOVVL, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -- {AMOVWL, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -- {AMOVVL, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -- {ASC, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0, 0}, -- {ASCV, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -- -- {AMOVW, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVWU, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVB, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVBU, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVWL, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVVL, C_SEXT, C_NONE, C_REG, C_NONE, 8, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -- {AMOVWU, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, sys.Loong64, 0}, -- {AMOVV, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, sys.Loong64, 0}, -- {AMOVB, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -- {AMOVBU, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -- {AMOVWL, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0, 0}, -- {AMOVVL, C_SAUTO, C_NONE, C_REG, C_NONE, 8, 4, REGSP, sys.Loong64, 0}, -- {AMOVW, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -- {AMOVWU, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -- {AMOVBU, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -- {AMOVWL, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -- {AMOVVL, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -- {ALL, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0, 0}, -- {ALLV, C_SOREG, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, sys.Loong64, 0}, -- -- {AMOVW, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_LEXT, C_NONE, 35, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0, 0}, -- {AMOVW, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -- {ASC, C_REG, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0, 0}, -- {AMOVW, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -- {AMOVW, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -- {AMOVB, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0, 0}, -- {AMOVWU, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, sys.Loong64, 0}, -- {AMOVB, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0, 0}, -- {AMOVBU, C_REG, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0, 0}, -- -- {AMOVW, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -- {AMOVWU, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -- {AMOVV, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -- {AMOVB, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -- {AMOVBU, C_LEXT, C_NONE, C_REG, C_NONE, 36, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0, 0}, -- {AMOVWU, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, sys.Loong64, 0}, -- {AMOVV, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, sys.Loong64, 0}, -- {AMOVB, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0, 0}, -- {AMOVBU, C_LAUTO, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0, 0}, -- {AMOVW, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0, 0}, -- {AMOVWU, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, sys.Loong64, 0}, -- {AMOVV, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, sys.Loong64, 0}, -- {AMOVB, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0, 0}, -- {AMOVBU, C_LOREG, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0, 0}, -- {AMOVW, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, -- {AMOVW, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVWU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVV, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVB, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, -- {AMOVB, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVBU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, 0, 0}, -- {AMOVBU, C_ADDR, C_NONE, C_REG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -- {AMOVWU, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, sys.Loong64, 0}, -- {AMOVB, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -- {AMOVBU, C_TLS_LE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0, 0}, -- -- {AMOVW, C_SECON, C_NONE, C_REG, C_NONE, 3, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_SECON, C_NONE, C_REG, C_NONE, 3, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_SACON, C_NONE, C_REG, C_NONE, 3, 4, REGSP, 0, 0}, -- {AMOVV, C_SACON, C_NONE, C_REG, C_NONE, 3, 4, REGSP, sys.Loong64, 0}, -- {AMOVW, C_LECON, C_NONE, C_REG, C_NONE, 52, 8, 0, 0, NOTUSETMP}, -- {AMOVW, C_LECON, C_NONE, C_REG, C_NONE, 52, 8, 0, sys.Loong64, NOTUSETMP}, -- {AMOVV, C_LECON, C_NONE, C_REG, C_NONE, 52, 8, 0, sys.Loong64, NOTUSETMP}, -- -- {AMOVW, C_LACON, C_NONE, C_REG, C_NONE, 26, 12, REGSP, 0, 0}, -- {AMOVV, C_LACON, C_NONE, C_REG, C_NONE, 26, 12, REGSP, sys.Loong64, 0}, -- {AMOVW, C_ADDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0, 0}, -- {AMOVV, C_ADDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, sys.Loong64, 0}, -- {AMOVW, C_ANDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0, 0}, -- {AMOVV, C_ANDCON, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, sys.Loong64, 0}, -- {AMOVW, C_STCON, C_NONE, C_REG, C_NONE, 55, 12, 0, 0, 0}, -- {AMOVV, C_STCON, C_NONE, C_REG, C_NONE, 55, 12, 0, sys.Loong64, 0}, -- -- {AMOVW, C_UCON, C_NONE, C_REG, C_NONE, 24, 4, 0, 0, 0}, -- {AMOVV, C_UCON, C_NONE, C_REG, C_NONE, 24, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_LCON, C_NONE, C_REG, C_NONE, 19, 8, 0, 0, NOTUSETMP}, -- {AMOVV, C_LCON, C_NONE, C_REG, C_NONE, 19, 8, 0, sys.Loong64, NOTUSETMP}, -- {AMOVV, C_DCON, C_NONE, C_REG, C_NONE, 59, 16, 0, sys.Loong64, NOTUSETMP}, -- -- {AMUL, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {AMUL, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, 0, 0}, -- {AMULV, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- {AMULV, C_REG, C_REG, C_REG, C_NONE, 2, 4, 0, sys.Loong64, 0}, -- -- {AADD, C_ADD0CON, C_REG, C_REG, C_NONE, 4, 4, 0, 0, 0}, -- {AADD, C_ADD0CON, C_NONE, C_REG, C_NONE, 4, 4, 0, 0, 0}, -- {AADD, C_ANDCON, C_REG, C_REG, C_NONE, 10, 8, 0, 0, 0}, -- {AADD, C_ANDCON, C_NONE, C_REG, C_NONE, 10, 8, 0, 0, 0}, -- -- {AADDV, C_ADD0CON, C_REG, C_REG, C_NONE, 4, 4, 0, sys.Loong64, 0}, -- {AADDV, C_ADD0CON, C_NONE, C_REG, C_NONE, 4, 4, 0, sys.Loong64, 0}, -- {AADDV, C_ANDCON, C_REG, C_REG, C_NONE, 10, 8, 0, sys.Loong64, 0}, -- {AADDV, C_ANDCON, C_NONE, C_REG, C_NONE, 10, 8, 0, sys.Loong64, 0}, -- -- {AAND, C_AND0CON, C_REG, C_REG, C_NONE, 4, 4, 0, 0, 0}, -- {AAND, C_AND0CON, C_NONE, C_REG, C_NONE, 4, 4, 0, 0, 0}, -- {AAND, C_ADDCON, C_REG, C_REG, C_NONE, 10, 8, 0, 0, 0}, -- {AAND, C_ADDCON, C_NONE, C_REG, C_NONE, 10, 8, 0, 0, 0}, -- -- {AADD, C_UCON, C_REG, C_REG, C_NONE, 25, 8, 0, 0, 0}, -- {AADD, C_UCON, C_NONE, C_REG, C_NONE, 25, 8, 0, 0, 0}, -- {AADDV, C_UCON, C_REG, C_REG, C_NONE, 25, 8, 0, sys.Loong64, 0}, -- {AADDV, C_UCON, C_NONE, C_REG, C_NONE, 25, 8, 0, sys.Loong64, 0}, -- {AAND, C_UCON, C_REG, C_REG, C_NONE, 25, 8, 0, 0, 0}, -- {AAND, C_UCON, C_NONE, C_REG, C_NONE, 25, 8, 0, 0, 0}, -- -- {AADD, C_LCON, C_NONE, C_REG, C_NONE, 23, 12, 0, 0, 0}, -- {AADDV, C_LCON, C_NONE, C_REG, C_NONE, 23, 12, 0, sys.Loong64, 0}, -- {AAND, C_LCON, C_NONE, C_REG, C_NONE, 23, 12, 0, 0, 0}, -- {AADD, C_LCON, C_REG, C_REG, C_NONE, 23, 12, 0, 0, 0}, -- {AADDV, C_LCON, C_REG, C_REG, C_NONE, 23, 12, 0, sys.Loong64, 0}, -- {AAND, C_LCON, C_REG, C_REG, C_NONE, 23, 12, 0, 0, 0}, -- -- {AADDV, C_DCON, C_NONE, C_REG, C_NONE, 60, 20, 0, sys.Loong64, 0}, -- {AADDV, C_DCON, C_REG, C_REG, C_NONE, 60, 20, 0, sys.Loong64, 0}, -- -- {ASLL, C_SCON, C_REG, C_REG, C_NONE, 16, 4, 0, 0, 0}, -- {ASLL, C_SCON, C_NONE, C_REG, C_NONE, 16, 4, 0, 0, 0}, -- -- {ASLLV, C_SCON, C_REG, C_REG, C_NONE, 16, 4, 0, sys.Loong64, 0}, -- {ASLLV, C_SCON, C_NONE, C_REG, C_NONE, 16, 4, 0, sys.Loong64, 0}, -- -- {ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, -- -- {ABEQ, C_REG, C_REG, C_SBRA, C_NONE, 6, 4, 0, 0, 0}, -- {ABEQ, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0, 0}, -- {ABLEZ, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0, 0}, -- {ABFPT, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0, NOTUSETMP}, -- -- {AJMP, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // b -- {AJAL, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // bl -- -- {AJMP, C_NONE, C_NONE, C_ZOREG, C_NONE, 18, 4, REGZERO, 0, 0}, // jirl r0, rj, 0 -- {AJAL, C_NONE, C_NONE, C_ZOREG, C_NONE, 18, 4, REGLINK, 0, 0}, // jirl r1, rj, 0 -- -- {AMOVW, C_SEXT, C_NONE, C_FREG, C_NONE, 27, 4, 0, sys.Loong64, 0}, -- {AMOVF, C_SEXT, C_NONE, C_FREG, C_NONE, 27, 4, 0, sys.Loong64, 0}, -- {AMOVD, C_SEXT, C_NONE, C_FREG, C_NONE, 27, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_SAUTO, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, sys.Loong64, 0}, -- {AMOVF, C_SAUTO, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0, 0}, -- {AMOVD, C_SAUTO, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0, 0}, -- {AMOVW, C_SOREG, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_SOREG, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0, 0}, -- {AMOVD, C_SOREG, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0, 0}, -- -- {AMOVW, C_LEXT, C_NONE, C_FREG, C_NONE, 27, 12, 0, sys.Loong64, 0}, -- {AMOVF, C_LEXT, C_NONE, C_FREG, C_NONE, 27, 12, 0, sys.Loong64, 0}, -- {AMOVD, C_LEXT, C_NONE, C_FREG, C_NONE, 27, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_LAUTO, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, sys.Loong64, 0}, -- {AMOVF, C_LAUTO, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0, 0}, -- {AMOVD, C_LAUTO, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0, 0}, -- {AMOVW, C_LOREG, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_LOREG, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0, 0}, -- {AMOVD, C_LOREG, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0, 0}, -- {AMOVF, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0, 0}, -- {AMOVF, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- {AMOVD, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0, 0}, -- {AMOVD, C_ADDR, C_NONE, C_FREG, C_NONE, 51, 8, 0, sys.Loong64, 0}, -- -- {AMOVW, C_FREG, C_NONE, C_SEXT, C_NONE, 28, 4, 0, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_SEXT, C_NONE, 28, 4, 0, sys.Loong64, 0}, -- {AMOVD, C_FREG, C_NONE, C_SEXT, C_NONE, 28, 4, 0, sys.Loong64, 0}, -- {AMOVW, C_FREG, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0, 0}, -- {AMOVW, C_FREG, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0, 0}, -- -- {AMOVW, C_FREG, C_NONE, C_LEXT, C_NONE, 28, 12, 0, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_LEXT, C_NONE, 28, 12, 0, sys.Loong64, 0}, -- {AMOVD, C_FREG, C_NONE, C_LEXT, C_NONE, 28, 12, 0, sys.Loong64, 0}, -- {AMOVW, C_FREG, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0, 0}, -- {AMOVW, C_FREG, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, sys.Loong64, 0}, -- {AMOVF, C_FREG, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0, 0}, -- {AMOVF, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -- {AMOVF, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- {AMOVD, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0, 0}, -- {AMOVD, C_FREG, C_NONE, C_ADDR, C_NONE, 50, 8, 0, sys.Loong64, 0}, -- -- {AMOVW, C_REG, C_NONE, C_FREG, C_NONE, 30, 4, 0, 0, 0}, -- {AMOVW, C_FREG, C_NONE, C_REG, C_NONE, 31, 4, 0, 0, 0}, -- {AMOVV, C_REG, C_NONE, C_FREG, C_NONE, 47, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_FREG, C_NONE, C_REG, C_NONE, 48, 4, 0, sys.Loong64, 0}, -- -- {AMOVV, C_FCCREG, C_NONE, C_REG, C_NONE, 63, 4, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_FCCREG, C_NONE, 64, 4, 0, sys.Loong64, 0}, -- -- {AMOVW, C_ADDCON, C_NONE, C_FREG, C_NONE, 34, 8, 0, sys.Loong64, 0}, -- {AMOVW, C_ANDCON, C_NONE, C_FREG, C_NONE, 34, 8, 0, sys.Loong64, 0}, -- -- {AWORD, C_LCON, C_NONE, C_NONE, C_NONE, 40, 4, 0, 0, 0}, -- {AWORD, C_DCON, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0, 0}, -- {AMOVB, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -- {AMOVW, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -- {AMOVBU, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -- {AMOVWU, C_REG, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, sys.Loong64, 0}, -- -- {AMOVB, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -- {AMOVW, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -- {AMOVV, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -- {AMOVBU, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -- {AMOVWU, C_TLS_IE, C_NONE, C_REG, C_NONE, 57, 16, 0, sys.Loong64, 0}, -- -- {AMOVV, C_GOTADDR, C_NONE, C_REG, C_NONE, 65, 8, 0, sys.Loong64, 0}, -- -- {ATEQ, C_SCON, C_REG, C_REG, C_NONE, 15, 8, 0, 0, 0}, -- {ATEQ, C_SCON, C_NONE, C_REG, C_NONE, 15, 8, 0, 0, 0}, -- -- {ABREAK, C_REG, C_NONE, C_SEXT, C_NONE, 7, 4, 0, sys.Loong64, 0}, // really CACHE instruction -- {ABREAK, C_REG, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, sys.Loong64, 0}, -- {ABREAK, C_REG, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, sys.Loong64, 0}, -- {ABREAK, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, -- -- {ARDTIMELW, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0, 0}, -- {ARDTIMEHW, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0, 0}, -- {ARDTIMED, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0, 0}, -- -- {obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0}, -- {obj.APCDATA, C_LCON, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0, 0}, -- {obj.APCDATA, C_DCON, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0, 0}, -- {obj.AFUNCDATA, C_SCON, C_NONE, C_ADDR, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ANOP, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ANOP, C_LCON, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, // nop variants, see #40689 -- {obj.ANOP, C_DCON, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, // nop variants, see #40689 -- {obj.ANOP, C_REG, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ANOP, C_FREG, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0}, -- {obj.ADUFFZERO, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // same as AJMP -- {obj.ADUFFCOPY, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0, 0}, // same as AJMP -- -- {obj.AXXX, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0, 0, 0}, -+ {obj.ATEXT, C_ADDR, C_NONE, C_NONE, C_TEXTSIZE, C_NONE, 0, 0, 0, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 1, 4, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 1, 4, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 12, 8, 0, NOTUSETMP}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 13, 4, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 14, 8, 0, NOTUSETMP}, -+ -+ {ASUB, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {ASUBV, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AADD, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AADDV, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AAND, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {ASUB, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {ASUBV, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AADD, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AADDV, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AAND, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {ANEGW, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {ANEGV, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AMASKEQZ, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ -+ {ASLL, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 9, 4, 0, 0}, -+ {ASLL, C_REG, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, 0}, -+ {ASLLV, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 9, 4, 0, 0}, -+ {ASLLV, C_REG, C_REG, C_NONE, C_REG, C_NONE, 9, 4, 0, 0}, -+ {ACLO, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 9, 4, 0, 0}, -+ -+ {AADDF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 32, 4, 0, 0}, -+ {AADDF, C_FREG, C_REG, C_NONE, C_FREG, C_NONE, 32, 4, 0, 0}, -+ {ACMPEQF, C_FREG, C_REG, C_NONE, C_NONE, C_NONE, 32, 4, 0, 0}, -+ {AABSF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0}, -+ {AMOVVF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVWL, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVVL, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVWL, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVVL, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {AMOVWL, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {AMOVVL, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {ASC, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {ASCV, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ -+ {AMOVW, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVWU, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVV, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVB, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVBU, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVWL, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVVL, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, -+ {AMOVW, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVWU, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVV, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVB, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVBU, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVWL, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVVL, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, -+ {AMOVW, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {AMOVWU, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {AMOVV, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {AMOVB, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {AMOVBU, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {AMOVWL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {AMOVVL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {ALL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ {ALLV, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_NONE, C_LEXT, C_NONE, 35, 12, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_LEXT, C_NONE, 35, 12, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_LEXT, C_NONE, 35, 12, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_LEXT, C_NONE, 35, 12, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_LEXT, C_NONE, 35, 12, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_LAUTO, C_NONE, 35, 12, REGSP, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0}, -+ {ASC, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 35, 12, REGZERO, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0}, -+ {AMOVB, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0}, -+ -+ {AMOVW, C_LEXT, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, 0, 0}, -+ {AMOVWU, C_LEXT, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, 0, 0}, -+ {AMOVV, C_LEXT, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, 0, 0}, -+ {AMOVB, C_LEXT, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, 0, 0}, -+ {AMOVBU, C_LEXT, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, 0, 0}, -+ {AMOVW, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0}, -+ {AMOVWU, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0}, -+ {AMOVV, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0}, -+ {AMOVB, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0}, -+ {AMOVBU, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0}, -+ {AMOVW, C_LOREG, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0}, -+ {AMOVWU, C_LOREG, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0}, -+ {AMOVV, C_LOREG, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0}, -+ {AMOVB, C_LOREG, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0}, -+ {AMOVBU, C_LOREG, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGZERO, 0}, -+ {AMOVW, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVW, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVWU, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVV, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVB, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVB, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVBU, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVBU, C_ADDR, C_NONE, C_NONE, C_REG, C_NONE, 51, 8, 0, 0}, -+ {AMOVW, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0}, -+ {AMOVWU, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0}, -+ {AMOVV, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0}, -+ {AMOVB, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0}, -+ {AMOVBU, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0}, -+ -+ {AMOVW, C_SECON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, 0, 0}, -+ {AMOVV, C_SECON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, 0, 0}, -+ {AMOVW, C_SACON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGSP, 0}, -+ {AMOVV, C_SACON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGSP, 0}, -+ {AMOVW, C_LECON, C_NONE, C_NONE, C_REG, C_NONE, 52, 8, 0, NOTUSETMP}, -+ {AMOVW, C_LECON, C_NONE, C_NONE, C_REG, C_NONE, 52, 8, 0, NOTUSETMP}, -+ {AMOVV, C_LECON, C_NONE, C_NONE, C_REG, C_NONE, 52, 8, 0, NOTUSETMP}, -+ -+ {AMOVW, C_LACON, C_NONE, C_NONE, C_REG, C_NONE, 26, 12, REGSP, 0}, -+ {AMOVV, C_LACON, C_NONE, C_NONE, C_REG, C_NONE, 26, 12, REGSP, 0}, -+ {AMOVW, C_ADDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0}, -+ {AMOVV, C_ADDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0}, -+ {AMOVW, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0}, -+ {AMOVV, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0}, -+ {AMOVW, C_STCON, C_NONE, C_NONE, C_REG, C_NONE, 55, 12, 0, 0}, -+ {AMOVV, C_STCON, C_NONE, C_NONE, C_REG, C_NONE, 55, 12, 0, 0}, -+ -+ {AMOVW, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 24, 4, 0, 0}, -+ {AMOVV, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 24, 4, 0, 0}, -+ {AMOVW, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 19, 8, 0, NOTUSETMP}, -+ {AMOVV, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 19, 8, 0, NOTUSETMP}, -+ {AMOVV, C_DCON, C_NONE, C_NONE, C_REG, C_NONE, 59, 16, 0, NOTUSETMP}, -+ -+ {AMUL, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AMUL, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AMULV, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ {AMULV, C_REG, C_REG, C_NONE, C_REG, C_NONE, 2, 4, 0, 0}, -+ -+ {AADD, C_ADD0CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0}, -+ {AADD, C_ADD0CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0}, -+ {AADD, C_ANDCON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0}, -+ {AADD, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0}, -+ -+ {AADDV, C_ADD0CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0}, -+ {AADDV, C_ADD0CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0}, -+ {AADDV, C_ANDCON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0}, -+ {AADDV, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0}, -+ -+ {AAND, C_AND0CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0}, -+ {AAND, C_AND0CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0}, -+ {AAND, C_ADDCON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0}, -+ {AAND, C_ADDCON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0}, -+ -+ {AADD, C_UCON, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0}, -+ {AADD, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0}, -+ {AADDV, C_UCON, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0}, -+ {AADDV, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0}, -+ {AAND, C_UCON, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0}, -+ {AAND, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0}, -+ -+ {AADD, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0}, -+ {AADDV, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0}, -+ {AAND, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0}, -+ {AADD, C_LCON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0}, -+ {AADDV, C_LCON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0}, -+ {AAND, C_LCON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0}, -+ -+ {AADDV, C_DCON, C_NONE, C_NONE, C_REG, C_NONE, 60, 20, 0, 0}, -+ {AADDV, C_DCON, C_REG, C_NONE, C_REG, C_NONE, 60, 20, 0, 0}, -+ -+ {ASLL, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0}, -+ {ASLL, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0}, -+ -+ {ASLLV, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0}, -+ {ASLLV, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0}, -+ -+ {ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0}, -+ -+ {ABEQ, C_REG, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0}, -+ {ABEQ, C_REG, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0}, -+ {ABLEZ, C_REG, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0}, -+ {ABFPT, C_NONE, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, NOTUSETMP}, -+ -+ {AJMP, C_NONE, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0}, // b -+ {AJAL, C_NONE, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0}, // bl -+ -+ {AJMP, C_NONE, C_NONE, C_NONE, C_ZOREG, C_NONE, 18, 4, REGZERO, 0}, // jirl r0, rj, 0 -+ {AJAL, C_NONE, C_NONE, C_NONE, C_ZOREG, C_NONE, 18, 4, REGLINK, 0}, // jirl r1, rj, 0 -+ -+ {AMOVW, C_SEXT, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, 0, 0}, -+ {AMOVF, C_SEXT, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, 0, 0}, -+ {AMOVD, C_SEXT, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, 0, 0}, -+ {AMOVW, C_SAUTO, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0}, -+ {AMOVF, C_SAUTO, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0}, -+ {AMOVD, C_SAUTO, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, REGSP, 0}, -+ {AMOVW, C_SOREG, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0}, -+ {AMOVF, C_SOREG, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0}, -+ {AMOVD, C_SOREG, C_NONE, C_NONE, C_FREG, C_NONE, 27, 4, REGZERO, 0}, -+ -+ {AMOVW, C_LEXT, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, 0, 0}, -+ {AMOVF, C_LEXT, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, 0, 0}, -+ {AMOVD, C_LEXT, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, 0, 0}, -+ {AMOVW, C_LAUTO, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0}, -+ {AMOVF, C_LAUTO, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0}, -+ {AMOVD, C_LAUTO, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, REGSP, 0}, -+ {AMOVW, C_LOREG, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0}, -+ {AMOVF, C_LOREG, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0}, -+ {AMOVD, C_LOREG, C_NONE, C_NONE, C_FREG, C_NONE, 27, 12, REGZERO, 0}, -+ {AMOVF, C_ADDR, C_NONE, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0}, -+ {AMOVF, C_ADDR, C_NONE, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0}, -+ {AMOVD, C_ADDR, C_NONE, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0}, -+ {AMOVD, C_ADDR, C_NONE, C_NONE, C_FREG, C_NONE, 51, 8, 0, 0}, -+ -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_SEXT, C_NONE, 28, 4, 0, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_SEXT, C_NONE, 28, 4, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_SEXT, C_NONE, 28, 4, 0, 0}, -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_SAUTO, C_NONE, 28, 4, REGSP, 0}, -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_SOREG, C_NONE, 28, 4, REGZERO, 0}, -+ -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_LEXT, C_NONE, 28, 12, 0, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_LEXT, C_NONE, 28, 12, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_LEXT, C_NONE, 28, 12, 0, 0}, -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_LAUTO, C_NONE, 28, 12, REGSP, 0}, -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_LOREG, C_NONE, 28, 12, REGZERO, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVF, C_FREG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ {AMOVD, C_FREG, C_NONE, C_NONE, C_ADDR, C_NONE, 50, 8, 0, 0}, -+ -+ {AMOVW, C_REG, C_NONE, C_NONE, C_FREG, C_NONE, 30, 4, 0, 0}, -+ {AMOVW, C_FREG, C_NONE, C_NONE, C_REG, C_NONE, 31, 4, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_FREG, C_NONE, 47, 4, 0, 0}, -+ {AMOVV, C_FREG, C_NONE, C_NONE, C_REG, C_NONE, 48, 4, 0, 0}, -+ -+ {AMOVV, C_FCCREG, C_NONE, C_NONE, C_REG, C_NONE, 63, 4, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_FCCREG, C_NONE, 64, 4, 0, 0}, -+ -+ {AMOVW, C_ADDCON, C_NONE, C_NONE, C_FREG, C_NONE, 34, 8, 0, 0}, -+ {AMOVW, C_ANDCON, C_NONE, C_NONE, C_FREG, C_NONE, 34, 8, 0, 0}, -+ -+ {AMOVB, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0}, -+ {AMOVW, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0}, -+ {AMOVV, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0}, -+ {AMOVBU, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0}, -+ {AMOVWU, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0}, -+ -+ {AMOVB, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0}, -+ {AMOVW, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0}, -+ {AMOVV, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0}, -+ {AMOVBU, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0}, -+ {AMOVWU, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0}, -+ -+ {AWORD, C_LCON, C_NONE, C_NONE, C_NONE, C_NONE, 40, 4, 0, 0}, -+ {AWORD, C_DCON, C_NONE, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0}, -+ -+ {AMOVV, C_GOTADDR, C_NONE, C_NONE, C_REG, C_NONE, 65, 8, 0, 0}, -+ -+ {ATEQ, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 15, 8, 0, 0}, -+ {ATEQ, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 15, 8, 0, 0}, -+ -+ {ABREAK, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, // really CACHE instruction -+ {ABREAK, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, -+ {ABREAK, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, -+ {ABREAK, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0}, -+ -+ {ARDTIMELW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, -+ {ARDTIMEHW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, -+ {ARDTIMED, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, -+ -+ {obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0}, -+ {obj.APCDATA, C_LCON, C_NONE, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0}, -+ {obj.APCDATA, C_DCON, C_NONE, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0}, -+ {obj.AFUNCDATA, C_SCON, C_NONE, C_NONE, C_ADDR, C_NONE, 0, 0, 0, 0}, -+ {obj.ANOP, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, -+ {obj.ANOP, C_LCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, // nop variants, see #40689 -+ {obj.ANOP, C_DCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, // nop variants, see #40689 -+ {obj.ANOP, C_REG, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, -+ {obj.ANOP, C_FREG, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, -+ {obj.ADUFFZERO, C_NONE, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0}, // same as AJMP -+ {obj.ADUFFCOPY, C_NONE, C_NONE, C_NONE, C_LBRA, C_NONE, 11, 4, 0, 0}, // same as AJMP -+ -+ {obj.AXXX, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0, 0}, - } - - var oprange [ALAST & obj.AMask][]Optab -@@ -733,12 +733,12 @@ func (c *ctxt0) oplook(p *obj.Prog) *Optab { - a1-- - - // first destination operand -- a3 := int(p.To.Class) -- if a3 == 0 { -- a3 = c.aclass(&p.To) + 1 -- p.To.Class = int8(a3) -+ a4 := int(p.To.Class) -+ if a4 == 0 { -+ a4 = c.aclass(&p.To) + 1 -+ p.To.Class = int8(a4) - } -- a3-- -+ a4-- - - // 2nd source operand - a2 := C_NONE -@@ -747,26 +747,37 @@ func (c *ctxt0) oplook(p *obj.Prog) *Optab { - } - - // 2nd destination operand -- a4 := C_NONE -+ a5 := C_NONE - if p.RegTo2 != 0 { -- a4 = C_REG -+ a5 = C_REG -+ } -+ -+ // 3rd source operand -+ a3 := C_NONE -+ if len(p.RestArgs) > 0 { -+ a3 = int(p.RestArgs[0].Class) -+ if a3 == 0 { -+ a3 = c.aclass(&p.RestArgs[0].Addr) + 1 -+ p.RestArgs[0].Class = int8(a3) -+ } -+ a3-- - } - - ops := oprange[p.As&obj.AMask] - c1 := &xcmp[a1] -- c3 := &xcmp[a3] -+ c4 := &xcmp[a4] - for i := range ops { - op := &ops[i] -- if (int(op.a2) == a2) && c1[op.a1] && c3[op.a3] && (int(op.a4) == a4) { -+ if (int(op.reg) == a2) && int(op.from3) == a3 && c1[op.from1] && c4[op.to1] && (int(op.to2) == a5) { - p.Optab = uint16(cap(optab) - cap(ops) + i + 1) - return op - } - } - -- c.ctxt.Diag("illegal combination %v %v %v %v %v", p.As, DRconv(a1), DRconv(a2), DRconv(a3), DRconv(a4)) -+ c.ctxt.Diag("illegal combination %v %v %v %v %v %v", p.As, DRconv(a1), DRconv(a2), DRconv(a3), DRconv(a4), DRconv(a5)) - prasm(p) - // Turn illegal instruction into an UNDEF, avoid crashing in asmout. -- return &Optab{obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0} -+ return &Optab{obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0} - } - - func cmp(a int, b int) bool { -@@ -872,15 +883,15 @@ func (x ocmp) Less(i, j int) bool { - if n != 0 { - return n < 0 - } -- n = int(p1.a1) - int(p2.a1) -+ n = int(p1.from1) - int(p2.from1) - if n != 0 { - return n < 0 - } -- n = int(p1.a2) - int(p2.a2) -+ n = int(p1.reg) - int(p2.reg) - if n != 0 { - return n < 0 - } -- n = int(p1.a3) - int(p2.a3) -+ n = int(p1.to1) - int(p2.to1) - if n != 0 { - return n < 0 - } -@@ -1178,7 +1189,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - r = int(o.param) - } - a := add -- if o.a1 == C_ANDCON { -+ if o.from1 == C_ANDCON { - a = AOR - } - -@@ -1472,7 +1483,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { - case 34: // mov $con,fr - v := c.regoff(&p.From) - a := AADDU -- if o.a1 == C_ANDCON { -+ if o.from1 == C_ANDCON { - a = AOR - } - o1 = OP_12IRR(c.opirr(a), uint32(v), uint32(0), uint32(REGTMP)) --- -2.38.1 - diff --git a/0049-runtime-delete-on-register-ABI-fallback-path-for-rac.patch b/0049-runtime-delete-on-register-ABI-fallback-path-for-rac.patch new file mode 100644 index 0000000000000000000000000000000000000000..e03716fef55a32d013d149ff8d8de3992ab90877 --- /dev/null +++ b/0049-runtime-delete-on-register-ABI-fallback-path-for-rac.patch @@ -0,0 +1,110 @@ +From 0ec91508644b2900fc51dd9f9ac7f122e1bd467e Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Mon, 6 Nov 2023 17:13:43 +0800 +Subject: [PATCH 49/51] runtime: delete on-register ABI fallback path for race + of loong64 + +Change-Id: I0769bdd12c8c458870a4bc6bbf731de4c3bbd997 +--- + src/runtime/race_loong64.s | 34 ---------------------------------- + 1 file changed, 34 deletions(-) + +diff --git a/src/runtime/race_loong64.s b/src/runtime/race_loong64.s +index 0512efc045..04f264b21b 100644 +--- a/src/runtime/race_loong64.s ++++ b/src/runtime/race_loong64.s +@@ -40,11 +40,7 @@ + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. + TEXT runtime·raceread(SB), NOSPLIT, $0-8 +-#ifdef GOEXPERIMENT_regabiargs + MOVV R4, RARG1 +-#else +- MOVV addr+0(FP), RARG1 +-#endif + MOVV R1, RARG2 + // void __tsan_read(ThreadState *thr, void *addr, void *pc); + MOVV $__tsan_read(SB), RCALL +@@ -69,11 +65,7 @@ TEXT runtime·racereadpc(SB), NOSPLIT, $0-24 + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. + TEXT runtime·racewrite(SB), NOSPLIT, $0-8 +-#ifdef GOEXPERIMENT_regabiargs + MOVV R4, RARG1 +-#else +- MOVV addr+0(FP), RARG1 +-#endif + MOVV R1, RARG2 + // void __tsan_write(ThreadState *thr, void *addr, void *pc); + MOVV $__tsan_write(SB), RCALL +@@ -98,13 +90,8 @@ TEXT runtime·racewritepc(SB), NOSPLIT, $0-24 + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. + TEXT runtime·racereadrange(SB), NOSPLIT, $0-16 +-#ifdef GOEXPERIMENT_regabiargs + MOVV R5, RARG2 + MOVV R4, RARG1 +-#else +- MOVV addr+0(FP), RARG1 +- MOVV size+8(FP), RARG2 +-#endif + MOVV R1, RARG3 + // void __tsan_read_range(ThreadState *thr, void *addr, uintptr size, void *pc); + MOVV $__tsan_read_range(SB), RCALL +@@ -130,13 +117,8 @@ TEXT runtime·racereadrangepc1(SB), NOSPLIT, $0-24 + // Defined as ABIInternal so as to avoid introducing a wrapper, + // which would make caller's PC ineffective. + TEXT runtime·racewriterange(SB), NOSPLIT, $0-16 +-#ifdef GOEXPERIMENT_regabiargs + MOVV R5, RARG2 + MOVV R4, RARG1 +-#else +- MOVV addr+0(FP), RARG1 +- MOVV size+8(FP), RARG2 +-#endif + MOVV R1, RARG3 + // void __tsan_write_range(ThreadState *thr, void *addr, uintptr size, void *pc); + MOVV $__tsan_write_range(SB), RCALL +@@ -186,11 +168,7 @@ ret: + // func runtime·racefuncenter(pc uintptr) + // Called from instrumented code. + TEXT runtime·racefuncenter(SB), NOSPLIT, $0-8 +-#ifdef GOEXPERIMENT_regabiargs + MOVV R4, RCALL +-#else +- MOVV callpc+0(FP), RCALL +-#endif + JMP racefuncenter<>(SB) + + // Common code for racefuncenter +@@ -476,13 +454,7 @@ rest: + BEQ R14, g, noswitch // branch if already on g0 + MOVV R14, g + +-#ifdef GOEXPERIMENT_regabiargs + JAL runtime·racecallback(SB) +-#else +- MOVV RARG0, 8(R3) // func arg +- MOVV RARG1, 16(R3) // func arg +- JAL runtime·racecallback(SB) +-#endif + // All registers are smashed after Go code, reload. + MOVV g_m(g), R15 + MOVV m_curg(R15), g // g = m->curg +@@ -496,13 +468,7 @@ ret: + + noswitch: + // already on g0 +-#ifdef GOEXPERIMENT_regabiargs + JAL runtime·racecallback(SB) +-#else +- MOVV RARG0, 8(R3) // func arg +- MOVV RARG1, 16(R3) // func arg +- JAL runtime·racecallback(SB) +-#endif + JMP ret + + // tls_g, g value for each thread in TLS +-- +2.38.1 + diff --git a/0050-cmd-asm-support-the-PCALIGN-directive-on-loong64.patch b/0050-cmd-asm-support-the-PCALIGN-directive-on-loong64.patch deleted file mode 100644 index a3373d6461174099da36c9906735421157ce3011..0000000000000000000000000000000000000000 --- a/0050-cmd-asm-support-the-PCALIGN-directive-on-loong64.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 60c85687ed353267fb33684275edc9fd0152f8fe Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Tue, 28 Mar 2023 19:30:04 +0800 -Subject: [PATCH 50/62] cmd/asm: support the PCALIGN directive on loong64 - -This could be useful for both asm performance hand-tuning, and future -scenarios where a certain bigger alignment might be required. - -Change-Id: Iad6244669a3d5adea88eceb0dc7be1af4f0d4fc9 ---- - src/cmd/internal/obj/loong64/asm.go | 44 ++++++++++++++++++++++++++--- - src/cmd/link/link_test.go | 25 ++++++++++++---- - 2 files changed, 60 insertions(+), 9 deletions(-) - -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index 0bc3f9c75e..fa1a877eab 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -359,6 +359,7 @@ var optab = []Optab{ - {ARDTIMED, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, - - {obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0}, -+ {obj.APCALIGN, C_SCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, - {obj.APCDATA, C_LCON, C_NONE, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0}, - {obj.APCDATA, C_DCON, C_NONE, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0}, - {obj.AFUNCDATA, C_SCON, C_NONE, C_NONE, C_ADDR, C_NONE, 0, 0, 0, 0}, -@@ -373,6 +374,14 @@ var optab = []Optab{ - {obj.AXXX, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0, 0}, - } - -+// align code to a certain length by padding bytes. -+func pcAlignPadLength(pc int64, alignedValue int64, ctxt *obj.Link) int { -+ if !((alignedValue&(alignedValue-1) == 0) && 8 <= alignedValue && alignedValue <= 2048) { -+ ctxt.Diag("alignment value of an instruction must be a power of two and in the range [8, 2048], got %d\n", alignedValue) -+ } -+ return int(-pc & (alignedValue - 1)) -+} -+ - var oprange [ALAST & obj.AMask][]Optab - - var xcmp [C_NCLASS][C_NCLASS]bool -@@ -404,10 +413,20 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - o = c.oplook(p) - m = int(o.size) - if m == 0 { -- if p.As != obj.ANOP && p.As != obj.AFUNCDATA && p.As != obj.APCDATA { -+ switch p.As { -+ case obj.APCALIGN: -+ alignedValue := p.From.Offset -+ m = pcAlignPadLength(pc, alignedValue, ctxt) -+ // Update the current text symbol alignment value. -+ if int32(alignedValue) > cursym.Func().Align { -+ cursym.Func().Align = int32(alignedValue) -+ } -+ break -+ case obj.ANOP, obj.AFUNCDATA, obj.APCDATA: -+ continue -+ default: - c.ctxt.Diag("zero-width instruction\n%v", p) - } -- continue - } - - pc += int64(m) -@@ -457,10 +476,16 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - - m = int(o.size) - if m == 0 { -- if p.As != obj.ANOP && p.As != obj.AFUNCDATA && p.As != obj.APCDATA { -+ switch p.As { -+ case obj.APCALIGN: -+ alignedValue := p.From.Offset -+ m = pcAlignPadLength(pc, alignedValue, ctxt) -+ break -+ case obj.ANOP, obj.AFUNCDATA, obj.APCDATA: -+ continue -+ default: - c.ctxt.Diag("zero-width instruction\n%v", p) - } -- continue - } - - pc += int64(m) -@@ -484,6 +509,16 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - if int(o.size) > 4*len(out) { - log.Fatalf("out array in span0 is too small, need at least %d for %v", o.size/4, p) - } -+ if p.As == obj.APCALIGN { -+ alignedValue := p.From.Offset -+ v := pcAlignPadLength(p.Pc, alignedValue, c.ctxt) -+ for i = 0; i < int32(v/4); i++ { -+ // emit ANOOP instruction by the padding size -+ c.ctxt.Arch.ByteOrder.PutUint32(bp, c.oprrr(ANOOP)) -+ bp = bp[4:] -+ } -+ continue -+ } - c.asmout(p, o, out[:]) - for i = 0; i < int32(o.size/4); i++ { - c.ctxt.Arch.ByteOrder.PutUint32(bp, out[i]) -@@ -1083,6 +1118,7 @@ func buildop(ctxt *obj.Link) { - obj.ATEXT, - obj.AUNDEF, - obj.AFUNCDATA, -+ obj.APCALIGN, - obj.APCDATA, - obj.ADUFFZERO, - obj.ADUFFCOPY: -diff --git a/src/cmd/link/link_test.go b/src/cmd/link/link_test.go -index a770c91936..1e02a3dfa3 100644 ---- a/src/cmd/link/link_test.go -+++ b/src/cmd/link/link_test.go -@@ -570,7 +570,8 @@ func main() { - } - ` - --const testFuncAlignAsmSrc = ` -+var testFuncAlignAsmSources = map[string]string{ -+ "arm64": ` - #include "textflag.h" - - TEXT ·alignPc(SB),NOSPLIT, $0-0 -@@ -581,13 +582,27 @@ TEXT ·alignPc(SB),NOSPLIT, $0-0 - - GLOBL ·alignPcFnAddr(SB),RODATA,$8 - DATA ·alignPcFnAddr(SB)/8,$·alignPc(SB) --` -+`, -+ "loong64": ` -+#include "textflag.h" -+ -+TEXT ·alignPc(SB),NOSPLIT, $0-0 -+ MOVV $2, R4 -+ PCALIGN $512 -+ MOVV $3, R5 -+ RET -+ -+GLOBL ·alignPcFnAddr(SB),RODATA,$8 -+DATA ·alignPcFnAddr(SB)/8,$·alignPc(SB) -+`, -+} - - // TestFuncAlign verifies that the address of a function can be aligned --// with a specific value on arm64. -+// with a specific value on arm64 and loong64. - func TestFuncAlign(t *testing.T) { -- if runtime.GOARCH != "arm64" || runtime.GOOS != "linux" { -- t.Skip("skipping on non-linux/arm64 platform") -+ testFuncAlignAsmSrc := testFuncAlignAsmSources[runtime.GOARCH] -+ if len(testFuncAlignAsmSrc) == 0 || runtime.GOOS != "linux" { -+ t.Skip("skipping on non-linux/{arm64,loong64} platform") - } - testenv.MustHaveGoBuild(t) - --- -2.38.1 - diff --git a/0050-cmd-dist-update-isUnsupportedVMASize-test-skip.patch b/0050-cmd-dist-update-isUnsupportedVMASize-test-skip.patch new file mode 100644 index 0000000000000000000000000000000000000000..b12578e3328cb4e26dc89c95ff7419b37c1d2c8e --- /dev/null +++ b/0050-cmd-dist-update-isUnsupportedVMASize-test-skip.patch @@ -0,0 +1,35 @@ +From 18b864d77a801bc1e3fdfac259c8e45253f9a321 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Mon, 11 Dec 2023 15:17:30 +0800 +Subject: [PATCH 50/51] cmd/dist: update isUnsupportedVMASize test skip + +Change-Id: Iba08f2c0bcc09fca34079e7f4c183d97b3f21ca3 +--- + src/cmd/dist/test.go | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go +index 8a1568c068..3822c5f949 100644 +--- a/src/cmd/dist/test.go ++++ b/src/cmd/dist/test.go +@@ -1526,7 +1526,7 @@ func (t *tester) makeGOROOTUnwritable() (undo func()) { + // internal/platform.RaceDetectorSupported, which can't be used here + // because cmd/dist can not import internal packages during bootstrap. + // The race detector only supports 48-bit VMA on arm64. But we don't have +-// a good solution to check VMA size(See https://golang.org/issue/29948) ++// a good solution to check VMA size(See https://go.dev/issue/29948) + // raceDetectorSupported will always return true for arm64. But race + // detector tests may abort on non 48-bit VMA configuration, the tests + // will be marked as "skipped" in this case. +@@ -1638,7 +1638,7 @@ func buildModeSupported(compiler, buildmode, goos, goarch string) bool { + // arm64 machine configured with 39-bit VMA) + func isUnsupportedVMASize(w *work) bool { + unsupportedVMA := []byte("unsupported VMA range") +- return w.dt.name == "race" && bytes.Contains(w.out.Bytes(), unsupportedVMA) ++ return strings.Contains(w.dt.name, "race") && bytes.Contains(w.out.Bytes(), unsupportedVMA) + } + + // isEnvSet reports whether the environment variable evar is +-- +2.38.1 + diff --git a/0051-internal-bytealg-runtime-align-some-loong64-asm-loop.patch b/0051-internal-bytealg-runtime-align-some-loong64-asm-loop.patch deleted file mode 100644 index 1ddffed06d01edd4a3b9c9b675b149ea6c940d80..0000000000000000000000000000000000000000 --- a/0051-internal-bytealg-runtime-align-some-loong64-asm-loop.patch +++ /dev/null @@ -1,175 +0,0 @@ -From d25610dc2fdae0eb9af71d47a50685b7ecbc971f Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Tue, 28 Mar 2023 19:58:17 +0800 -Subject: [PATCH 51/62] internal/bytealg, runtime: align some loong64 asm loops - to 16-byte boundaries -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The LA464 micro-architecture is very sensitive to alignment of loops, -so the final performance of linked binaries can vary wildly due to -uncontrolled alignment of certain performance-critical loops. Now that -PCALIGN is available on loong64, let's make use of it and manually align -some assembly loops. The functions are identified based on perf records -of some easily regressed go1 benchmark cases (e.g. FmtFprintfPrefixedInt, -RegexpMatchEasy0_1K and Revcomp are particularly sensitive; even those -optimizations purely reducing dynamic instruction counts can regress -those cases by 6~12%, making the numbers almost useless). - -Benchmark results on Loongson 3A5000 (which is an LA464 implementation): - -goos: linux -goarch: loong64 -pkg: test/bench/go1 - │ CL 416154 │ this CL │ - │ sec/op │ sec/op vs base │ -BinaryTree17 14.10 ± 1% 14.10 ± 1% ~ (p=1.000 n=10) -Fannkuch11 3.672 ± 0% 3.579 ± 0% -2.53% (p=0.000 n=10) -FmtFprintfEmpty 94.72n ± 0% 94.73n ± 0% +0.01% (p=0.000 n=10) -FmtFprintfString 149.9n ± 0% 151.9n ± 0% +1.33% (p=0.000 n=10) -FmtFprintfInt 154.1n ± 0% 158.3n ± 0% +2.73% (p=0.000 n=10) -FmtFprintfIntInt 236.2n ± 0% 241.4n ± 0% +2.20% (p=0.000 n=10) -FmtFprintfPrefixedInt 314.2n ± 0% 320.2n ± 0% +1.91% (p=0.000 n=10) -FmtFprintfFloat 405.0n ± 0% 414.3n ± 0% +2.30% (p=0.000 n=10) -FmtManyArgs 933.6n ± 0% 949.9n ± 0% +1.75% (p=0.000 n=10) -GobDecode 15.51m ± 1% 15.24m ± 0% -1.77% (p=0.000 n=10) -GobEncode 18.42m ± 4% 18.10m ± 2% ~ (p=0.631 n=10) -Gzip 423.6m ± 0% 429.9m ± 0% +1.49% (p=0.000 n=10) -Gunzip 88.75m ± 0% 88.31m ± 0% -0.50% (p=0.000 n=10) -HTTPClientServer 85.44µ ± 0% 85.71µ ± 0% +0.31% (p=0.035 n=10) -JSONEncode 18.65m ± 0% 19.74m ± 0% +5.81% (p=0.000 n=10) -JSONDecode 77.75m ± 0% 78.60m ± 1% +1.09% (p=0.000 n=10) -Mandelbrot200 7.214m ± 0% 7.208m ± 0% ~ (p=0.481 n=10) -GoParse 7.616m ± 2% 7.616m ± 1% ~ (p=0.739 n=10) -RegexpMatchEasy0_32 142.9n ± 0% 133.0n ± 0% -6.93% (p=0.000 n=10) -RegexpMatchEasy0_1K 1.535µ ± 0% 1.362µ ± 0% -11.27% (p=0.000 n=10) -RegexpMatchEasy1_32 161.8n ± 0% 161.8n ± 0% ~ (p=0.628 n=10) -RegexpMatchEasy1_1K 1.635µ ± 0% 1.497µ ± 0% -8.41% (p=0.000 n=10) -RegexpMatchMedium_32 1.429µ ± 0% 1.420µ ± 0% -0.63% (p=0.000 n=10) -RegexpMatchMedium_1K 41.86µ ± 0% 42.25µ ± 0% +0.93% (p=0.000 n=10) -RegexpMatchHard_32 2.144µ ± 0% 2.108µ ± 0% -1.68% (p=0.000 n=10) -RegexpMatchHard_1K 63.83µ ± 0% 62.65µ ± 0% -1.86% (p=0.000 n=10) -Revcomp 1.337 ± 0% 1.192 ± 0% -10.89% (p=0.000 n=10) -Template 116.4m ± 1% 115.6m ± 2% ~ (p=0.579 n=10) -TimeParse 421.4n ± 2% 418.1n ± 1% -0.78% (p=0.001 n=10) -TimeFormat 515.1n ± 0% 517.9n ± 0% +0.54% (p=0.001 n=10) -geomean 104.5µ 103.5µ -0.99% - - │ CL 416154 │ this CL │ - │ B/s │ B/s vs base │ -GobDecode 47.19Mi ± 1% 48.04Mi ± 0% +1.80% (p=0.000 n=10) -GobEncode 39.73Mi ± 4% 40.44Mi ± 2% ~ (p=0.631 n=10) -Gzip 43.68Mi ± 0% 43.04Mi ± 0% -1.47% (p=0.000 n=10) -Gunzip 208.5Mi ± 0% 209.6Mi ± 0% +0.50% (p=0.000 n=10) -JSONEncode 99.21Mi ± 0% 93.76Mi ± 0% -5.49% (p=0.000 n=10) -JSONDecode 23.80Mi ± 0% 23.55Mi ± 1% -1.08% (p=0.000 n=10) -GoParse 7.253Mi ± 2% 7.253Mi ± 1% ~ (p=0.810 n=10) -RegexpMatchEasy0_32 213.6Mi ± 0% 229.4Mi ± 0% +7.41% (p=0.000 n=10) -RegexpMatchEasy0_1K 636.3Mi ± 0% 717.3Mi ± 0% +12.73% (p=0.000 n=10) -RegexpMatchEasy1_32 188.6Mi ± 0% 188.6Mi ± 0% ~ (p=0.810 n=10) -RegexpMatchEasy1_1K 597.4Mi ± 0% 652.2Mi ± 0% +9.17% (p=0.000 n=10) -RegexpMatchMedium_32 21.35Mi ± 0% 21.49Mi ± 0% +0.63% (p=0.000 n=10) -RegexpMatchMedium_1K 23.33Mi ± 0% 23.11Mi ± 0% -0.94% (p=0.000 n=10) -RegexpMatchHard_32 14.24Mi ± 0% 14.48Mi ± 0% +1.67% (p=0.000 n=10) -RegexpMatchHard_1K 15.30Mi ± 0% 15.59Mi ± 0% +1.93% (p=0.000 n=10) -Revcomp 181.3Mi ± 0% 203.4Mi ± 0% +12.21% (p=0.000 n=10) -Template 15.89Mi ± 1% 16.00Mi ± 2% ~ (p=0.542 n=10) -geomean 59.33Mi 60.72Mi +2.33% - -Change-Id: I9ac28d936e03d21c46bb19fa100018f61ace6b42 -Reviewed-on: https://go-review.googlesource.com/c/go/+/479816 -TryBot-Result: Gopher Robot -Reviewed-by: Ian Lance Taylor -Auto-Submit: Ian Lance Taylor -Run-TryBot: WANG Xuerui -Reviewed-by: Keith Randall -Run-TryBot: Ian Lance Taylor -Reviewed-by: Keith Randall ---- - src/internal/bytealg/compare_loong64.s | 1 + - src/internal/bytealg/equal_loong64.s | 1 + - src/internal/bytealg/indexbyte_loong64.s | 2 ++ - src/runtime/memclr_loong64.s | 1 + - src/runtime/memmove_loong64.s | 2 ++ - 5 files changed, 7 insertions(+) - -diff --git a/src/internal/bytealg/compare_loong64.s b/src/internal/bytealg/compare_loong64.s -index 54c2daba69..c89c5a9256 100644 ---- a/src/internal/bytealg/compare_loong64.s -+++ b/src/internal/bytealg/compare_loong64.s -@@ -48,6 +48,7 @@ entry: - AND $7, R15 - BNE R0, R15, byte_loop - -+ PCALIGN $16 - chunk16_loop: - BEQ R0, R14, byte_loop - MOVV (R6), R8 -diff --git a/src/internal/bytealg/equal_loong64.s b/src/internal/bytealg/equal_loong64.s -index dcdde89b25..ba2a5578c3 100644 ---- a/src/internal/bytealg/equal_loong64.s -+++ b/src/internal/bytealg/equal_loong64.s -@@ -14,6 +14,7 @@ TEXT runtime·memequal(SB),NOSPLIT|NOFRAME,$0-25 - BEQ R4, R5, eq - MOVV size+16(FP), R6 - ADDV R4, R6, R7 -+ PCALIGN $16 - loop: - BNE R4, R7, test - MOVV $1, R4 -diff --git a/src/internal/bytealg/indexbyte_loong64.s b/src/internal/bytealg/indexbyte_loong64.s -index baa9c86be2..604970549f 100644 ---- a/src/internal/bytealg/indexbyte_loong64.s -+++ b/src/internal/bytealg/indexbyte_loong64.s -@@ -13,6 +13,7 @@ TEXT ·IndexByte(SB),NOSPLIT,$0-40 - ADDV R4, R5 // end - ADDV $-1, R4 - -+ PCALIGN $16 - loop: - ADDV $1, R4 - BEQ R4, R5, notfound -@@ -36,6 +37,7 @@ TEXT ·IndexByteString(SB),NOSPLIT,$0-32 - ADDV R4, R5 // end - ADDV $-1, R4 - -+ PCALIGN $16 - loop: - ADDV $1, R4 - BEQ R4, R5, notfound -diff --git a/src/runtime/memclr_loong64.s b/src/runtime/memclr_loong64.s -index e4f20587b7..7bb6f3dfc9 100644 ---- a/src/runtime/memclr_loong64.s -+++ b/src/runtime/memclr_loong64.s -@@ -26,6 +26,7 @@ words: - // do 8 bytes at a time if there is room - ADDV $-7, R4, R7 - -+ PCALIGN $16 - SGTU R7, R6, R8 - BEQ R8, out - MOVV R0, (R6) -diff --git a/src/runtime/memmove_loong64.s b/src/runtime/memmove_loong64.s -index b7b9c56627..0f139bcc13 100644 ---- a/src/runtime/memmove_loong64.s -+++ b/src/runtime/memmove_loong64.s -@@ -42,6 +42,7 @@ words: - // do 8 bytes at a time if there is room - ADDV $-7, R9, R6 // R6 is end pointer-7 - -+ PCALIGN $16 - SGTU R6, R4, R8 - BEQ R8, out - MOVV (R5), R7 -@@ -86,6 +87,7 @@ words1: - // do 8 bytes at a time if there is room - ADDV $7, R4, R6 // R6 is start pointer+7 - -+ PCALIGN $16 - SGTU R9, R6, R8 - BEQ R8, out1 - ADDV $-8, R5 --- -2.38.1 - diff --git a/0051-runtime-race-update-race_linux_loong64.syso.patch b/0051-runtime-race-update-race_linux_loong64.syso.patch new file mode 100644 index 0000000000000000000000000000000000000000..15b999d6be1193015556105c25991c4cc8e19fde --- /dev/null +++ b/0051-runtime-race-update-race_linux_loong64.syso.patch @@ -0,0 +1,1946 @@ +From 8dbb24c31e04c972924da2cdf1523f6675b15e92 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Tue, 12 Dec 2023 08:57:42 +0800 +Subject: [PATCH 51/51] runtime/race: update race_linux_loong64.syso + +Signed-off-by: Guoqi Chen +Change-Id: I74fcc442d307384adb16bf5c6698722390dc4d00 +--- + src/runtime/race/race_linux_loong64.syso | Bin 644528 -> 645456 bytes + 1 file changed, 0 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19d90f4ed3e664a5e212ff7f47d7384818dbabbb..0000000000000000000000000000000000000000 --- a/0052-cmd-link-bump-loong64-function-alignment-to-16-bytes.patch +++ /dev/null @@ -1,48 +0,0 @@ -From ec655da9ecb0d1f016b1d385a397de28116f07be Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Tue, 4 Apr 2023 16:35:06 +0800 -Subject: [PATCH 52/62] cmd/link: bump loong64 function alignment to 16 bytes - -The loong64 PCALIGN directive works with PCs relative to beginning of -functions. So if the function alignment is less than that requested by -PCALIGN, the following code may in fact not be aligned as such, leading -to unexpected performance. - -The current function alignment on loong64 is 8 bytes, which seems to -stem from mips64 or riscv64. In order to make performance more -predictable on loong64, it is raised to 16 bytes to ensure that at -least `PCALIGN $16` works. - -As alignment of loops written in Go is yet to be tackled, and the -codegen is not otherwise touched, benchmark numbers for this change are -not going to be meaningful, and not included. - -Change-Id: I2120ef3746ce067e274920c82091810073bfa3be -Reviewed-on: https://go-review.googlesource.com/c/go/+/481936 -Auto-Submit: Ian Lance Taylor -TryBot-Result: Gopher Robot -Reviewed-by: Ian Lance Taylor -Run-TryBot: Ian Lance Taylor -Run-TryBot: WANG Xuerui -Reviewed-by: Keith Randall -Reviewed-by: Keith Randall ---- - src/cmd/link/internal/loong64/l.go | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/cmd/link/internal/loong64/l.go b/src/cmd/link/internal/loong64/l.go -index e97a8686bf..a6309f1a3a 100644 ---- a/src/cmd/link/internal/loong64/l.go -+++ b/src/cmd/link/internal/loong64/l.go -@@ -7,7 +7,7 @@ package loong64 - const ( - maxAlign = 32 // max data alignment - minAlign = 1 // min data alignment -- funcAlign = 8 -+ funcAlign = 16 - ) - - /* Used by ../../internal/ld/dwarf.go */ --- -2.38.1 - diff --git a/0053-cmd-compile-optimize-multiplication-on-loong64.patch b/0053-cmd-compile-optimize-multiplication-on-loong64.patch deleted file mode 100644 index 00843e896dc4d3657b8b8fcc50f2a4d839d1eb49..0000000000000000000000000000000000000000 --- a/0053-cmd-compile-optimize-multiplication-on-loong64.patch +++ /dev/null @@ -1,761 +0,0 @@ -From c7370fa1f2fa5440c706872923cff4f68408193f Mon Sep 17 00:00:00 2001 -From: Wayne Zuo -Date: Thu, 2 Mar 2023 13:33:21 +0800 -Subject: [PATCH 53/62] cmd/compile: optimize multiplication on loong64 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Previously, multiplication on loong64 architecture was performed using -MULV and MULHVU instructions to calculate the low 64-bit and high -64-bit of a multiplication respectively. However, in most cases, only -the low 64-bits are needed. This commit enalbes only computating the low -64-bit result with the MULV instruction. - -Reduce the binary size slightly. - -file before after Δ % -addr2line 2833777 2833849 +72 +0.003% -asm 5267499 5266963 -536 -0.010% -buildid 2579706 2579402 -304 -0.012% -cgo 4798260 4797444 -816 -0.017% -compile 25247419 25175030 -72389 -0.287% -cover 4973091 4972027 -1064 -0.021% -dist 3631013 3565653 -65360 -1.800% -doc 4076036 4074004 -2032 -0.050% -fix 3496378 3496066 -312 -0.009% -link 6984102 6983214 -888 -0.013% -nm 2743820 2743516 -304 -0.011% -objdump 4277171 4277035 -136 -0.003% -pack 2379248 2378872 -376 -0.016% -pprof 14419090 14419874 +784 +0.005% -test2json 2684386 2684018 -368 -0.014% -trace 13640018 13631034 -8984 -0.066% -vet 7748918 7752630 +3712 +0.048% -go 15643850 15638098 -5752 -0.037% -total 127423782 127268729 -155053 -0.122% - -Change-Id: Ifce4a9a3ed1d03c170681e39cb6f3541db9882dc -Reviewed-on: https://go-review.googlesource.com/c/go/+/472775 -TryBot-Result: Gopher Robot -Reviewed-by: Dmitri Shuralyov -Run-TryBot: Wayne Zuo -Reviewed-by: David Chase ---- - src/cmd/compile/internal/loong64/ssa.go | 29 +- - .../compile/internal/ssa/_gen/LOONG64.rules | 27 +- - .../compile/internal/ssa/_gen/LOONG64Ops.go | 9 +- - src/cmd/compile/internal/ssa/opGen.go | 44 +- - .../compile/internal/ssa/rewriteLOONG64.go | 392 +++++++----------- - 5 files changed, 192 insertions(+), 309 deletions(-) - -diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 75eb732df8..1c84dccb11 100644 ---- a/src/cmd/compile/internal/loong64/ssa.go -+++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -162,7 +162,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { - ssa.OpLOONG64MULF, - ssa.OpLOONG64MULD, - ssa.OpLOONG64DIVF, -- ssa.OpLOONG64DIVD: -+ ssa.OpLOONG64DIVD, -+ ssa.OpLOONG64MULV, ssa.OpLOONG64MULHV, ssa.OpLOONG64MULHVU: - p := s.Prog(v.Op.Asm()) - p.From.Type = obj.TYPE_REG - p.From.Reg = v.Args[1].Reg() -@@ -196,32 +197,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { - p.Reg = v.Args[0].Reg() - p.To.Type = obj.TYPE_REG - p.To.Reg = v.Reg() -- case ssa.OpLOONG64MULV: -- p := s.Prog(loong64.AMULV) -- p.From.Type = obj.TYPE_REG -- p.From.Reg = v.Args[1].Reg() -- p.Reg = v.Args[0].Reg() -- p.To.Type = obj.TYPE_REG -- p.To.Reg = v.Reg1() -- p1 := s.Prog(loong64.AMULHV) -- p1.From.Type = obj.TYPE_REG -- p1.From.Reg = v.Args[1].Reg() -- p1.Reg = v.Args[0].Reg() -- p1.To.Type = obj.TYPE_REG -- p1.To.Reg = v.Reg0() -- case ssa.OpLOONG64MULVU: -- p := s.Prog(loong64.AMULV) -- p.From.Type = obj.TYPE_REG -- p.From.Reg = v.Args[1].Reg() -- p.Reg = v.Args[0].Reg() -- p.To.Type = obj.TYPE_REG -- p.To.Reg = v.Reg1() -- p1 := s.Prog(loong64.AMULHVU) -- p1.From.Type = obj.TYPE_REG -- p1.From.Reg = v.Args[1].Reg() -- p1.Reg = v.Args[0].Reg() -- p1.To.Type = obj.TYPE_REG -- p1.To.Reg = v.Reg0() - case ssa.OpLOONG64DIVV: - p := s.Prog(loong64.ADIVV) - p.From.Type = obj.TYPE_REG -diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -index f8c07f3024..8c81b7a3f6 100644 ---- a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -+++ b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -@@ -8,16 +8,17 @@ - (Sub(Ptr|64|32|16|8) ...) => (SUBV ...) - (Sub(32|64)F ...) => (SUB(F|D) ...) - --(Mul(64|32|16|8) x y) => (Select1 (MULVU x y)) -+(Mul(64|32|16|8) ...) => (MULV ...) - (Mul(32|64)F ...) => (MUL(F|D) ...) --(Mul64uhilo ...) => (MULVU ...) --(Select0 (Mul64uover x y)) => (Select1 (MULVU x y)) --(Select1 (Mul64uover x y)) => (SGTU (Select0 (MULVU x y)) (MOVVconst [0])) -+(Select0 (Mul64uhilo x y)) => (MULHVU x y) -+(Select1 (Mul64uhilo x y)) => (MULV x y) -+(Select0 (Mul64uover x y)) => (MULV x y) -+(Select1 (Mul64uover x y)) => (SGTU (MULHVU x y) (MOVVconst [0])) - --(Hmul64 x y) => (Select0 (MULV x y)) --(Hmul64u x y) => (Select0 (MULVU x y)) --(Hmul32 x y) => (SRAVconst (Select1 (MULV (SignExt32to64 x) (SignExt32to64 y))) [32]) --(Hmul32u x y) => (SRLVconst (Select1 (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32]) -+(Hmul64 ...) => (MULHV ...) -+(Hmul64u ...) => (MULHVU ...) -+(Hmul32 x y) => (SRAVconst (MULV (SignExt32to64 x) (SignExt32to64 y)) [32]) -+(Hmul32u x y) => (SRLVconst (MULV (ZeroExt32to64 x) (ZeroExt32to64 y)) [32]) - - (Div64 x y) => (Select1 (DIVV x y)) - (Div64u x y) => (Select1 (DIVVU x y)) -@@ -571,10 +572,10 @@ - (SGTU (MOVVconst [c]) x) && is32Bit(c) => (SGTUconst [c] x) - - // mul by constant --(Select1 (MULVU x (MOVVconst [-1]))) => (NEGV x) --(Select1 (MULVU _ (MOVVconst [0]))) => (MOVVconst [0]) --(Select1 (MULVU x (MOVVconst [1]))) => x --(Select1 (MULVU x (MOVVconst [c]))) && isPowerOfTwo64(c) => (SLLVconst [log64(c)] x) -+(MULV x (MOVVconst [-1])) => (NEGV x) -+(MULV _ (MOVVconst [0])) => (MOVVconst [0]) -+(MULV x (MOVVconst [1])) => x -+(MULV x (MOVVconst [c])) && isPowerOfTwo64(c) => (SLLVconst [log64(c)] x) - - // div by constant - (Select1 (DIVVU x (MOVVconst [1]))) => x -@@ -612,7 +613,7 @@ - (SLLVconst [c] (MOVVconst [d])) => (MOVVconst [d< (MOVVconst [int64(uint64(d)>>uint64(c))]) - (SRAVconst [c] (MOVVconst [d])) => (MOVVconst [d>>uint64(c)]) --(Select1 (MULVU (MOVVconst [c]) (MOVVconst [d]))) => (MOVVconst [c*d]) -+(MULV (MOVVconst [c]) (MOVVconst [d])) => (MOVVconst [c*d]) - (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [c/d]) - (Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [int64(uint64(c)/uint64(d))]) - (Select0 (DIVV (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [c%d]) // mod -diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index aca1bd7358..e40354e526 100644 ---- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -+++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -@@ -163,10 +163,11 @@ func init() { - {name: "SUBV", argLength: 2, reg: gp21, asm: "SUBVU"}, // arg0 - arg1 - {name: "SUBVconst", argLength: 1, reg: gp11, asm: "SUBVU", aux: "Int64"}, // arg0 - auxInt - -- {name: "MULV", argLength: 2, reg: gp22, resultNotInArgs: true, commutative: true, typ: "(Int64,Int64)"}, // arg0 * arg1, signed -- {name: "MULVU", argLength: 2, reg: gp22, resultNotInArgs: true, commutative: true, typ: "(UInt64,UInt64)"}, // arg0 * arg1, unsigned -- {name: "DIVV", argLength: 2, reg: gp22, resultNotInArgs: true, typ: "(Int64,Int64)"}, // arg0 / arg1, signed -- {name: "DIVVU", argLength: 2, reg: gp22, resultNotInArgs: true, typ: "(UInt64,UInt64)"}, // arg0 / arg1, unsigned -+ {name: "MULV", argLength: 2, reg: gp21, asm: "MULV", commutative: true, typ: "Int64"}, // arg0 * arg1 -+ {name: "MULHV", argLength: 2, reg: gp21, asm: "MULHV", commutative: true, typ: "Int64"}, // (arg0 * arg1) >> 64, signed -+ {name: "MULHVU", argLength: 2, reg: gp21, asm: "MULHVU", commutative: true, typ: "UInt64"}, // (arg0 * arg1) >> 64, unsigned -+ {name: "DIVV", argLength: 2, reg: gp22, resultNotInArgs: true, typ: "(Int64,Int64)"}, // arg0 / arg1, signed -+ {name: "DIVVU", argLength: 2, reg: gp22, resultNotInArgs: true, typ: "(UInt64,UInt64)"}, // arg0 / arg1, unsigned - - {name: "ADDF", argLength: 2, reg: fp21, asm: "ADDF", commutative: true}, // arg0 + arg1 - {name: "ADDD", argLength: 2, reg: fp21, asm: "ADDD", commutative: true}, // arg0 + arg1 -diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 57cd6d6931..33b05a09bc 100644 ---- a/src/cmd/compile/internal/ssa/opGen.go -+++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -1716,7 +1716,8 @@ const ( - OpLOONG64SUBV - OpLOONG64SUBVconst - OpLOONG64MULV -- OpLOONG64MULVU -+ OpLOONG64MULHV -+ OpLOONG64MULHVU - OpLOONG64DIVV - OpLOONG64DIVVU - OpLOONG64ADDF -@@ -22913,34 +22914,47 @@ var opcodeTable = [...]opInfo{ - }, - }, - { -- name: "MULV", -- argLen: 2, -- commutative: true, -- resultNotInArgs: true, -+ name: "MULV", -+ argLen: 2, -+ commutative: true, -+ asm: loong64.AMULV, - reg: regInfo{ - inputs: []inputInfo{ -- {0, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 - }, - outputs: []outputInfo{ - {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 - }, - }, - }, - { -- name: "MULVU", -- argLen: 2, -- commutative: true, -- resultNotInArgs: true, -+ name: "MULHV", -+ argLen: 2, -+ commutative: true, -+ asm: loong64.AMULHV, - reg: regInfo{ - inputs: []inputInfo{ -- {0, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ }, -+ outputs: []outputInfo{ -+ {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -+ }, -+ }, -+ }, -+ { -+ name: "MULHVU", -+ argLen: 2, -+ commutative: true, -+ asm: loong64.AMULHVU, -+ reg: regInfo{ -+ inputs: []inputInfo{ -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 - }, - outputs: []outputInfo{ - {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 - }, - }, - }, -diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -index 1a2593ef55..49122c5feb 100644 ---- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go -+++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -@@ -202,9 +202,11 @@ func rewriteValueLOONG64(v *Value) bool { - case OpHmul32u: - return rewriteValueLOONG64_OpHmul32u(v) - case OpHmul64: -- return rewriteValueLOONG64_OpHmul64(v) -+ v.Op = OpLOONG64MULHV -+ return true - case OpHmul64u: -- return rewriteValueLOONG64_OpHmul64u(v) -+ v.Op = OpLOONG64MULHVU -+ return true - case OpInterCall: - v.Op = OpLOONG64CALLinter - return true -@@ -286,6 +288,8 @@ func rewriteValueLOONG64(v *Value) bool { - return rewriteValueLOONG64_OpLOONG64MOVWstore(v) - case OpLOONG64MOVWstorezero: - return rewriteValueLOONG64_OpLOONG64MOVWstorezero(v) -+ case OpLOONG64MULV: -+ return rewriteValueLOONG64_OpLOONG64MULV(v) - case OpLOONG64NEGV: - return rewriteValueLOONG64_OpLOONG64NEGV(v) - case OpLOONG64NOR: -@@ -423,22 +427,23 @@ func rewriteValueLOONG64(v *Value) bool { - case OpMove: - return rewriteValueLOONG64_OpMove(v) - case OpMul16: -- return rewriteValueLOONG64_OpMul16(v) -+ v.Op = OpLOONG64MULV -+ return true - case OpMul32: -- return rewriteValueLOONG64_OpMul32(v) -+ v.Op = OpLOONG64MULV -+ return true - case OpMul32F: - v.Op = OpLOONG64MULF - return true - case OpMul64: -- return rewriteValueLOONG64_OpMul64(v) -+ v.Op = OpLOONG64MULV -+ return true - case OpMul64F: - v.Op = OpLOONG64MULD - return true -- case OpMul64uhilo: -- v.Op = OpLOONG64MULVU -- return true - case OpMul8: -- return rewriteValueLOONG64_OpMul8(v) -+ v.Op = OpLOONG64MULV -+ return true - case OpNeg16: - v.Op = OpLOONG64NEGV - return true -@@ -1229,20 +1234,18 @@ func rewriteValueLOONG64_OpHmul32(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Hmul32 x y) -- // result: (SRAVconst (Select1 (MULV (SignExt32to64 x) (SignExt32to64 y))) [32]) -+ // result: (SRAVconst (MULV (SignExt32to64 x) (SignExt32to64 y)) [32]) - for { - x := v_0 - y := v_1 - v.reset(OpLOONG64SRAVconst) - v.AuxInt = int64ToAuxInt(32) -- v0 := b.NewValue0(v.Pos, OpSelect1, typ.Int64) -- v1 := b.NewValue0(v.Pos, OpLOONG64MULV, types.NewTuple(typ.Int64, typ.Int64)) -+ v0 := b.NewValue0(v.Pos, OpLOONG64MULV, typ.Int64) -+ v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -+ v1.AddArg(x) - v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -- v2.AddArg(x) -- v3 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -- v3.AddArg(y) -- v1.AddArg2(v2, v3) -- v0.AddArg(v1) -+ v2.AddArg(y) -+ v0.AddArg2(v1, v2) - v.AddArg(v0) - return true - } -@@ -1253,54 +1256,18 @@ func rewriteValueLOONG64_OpHmul32u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Hmul32u x y) -- // result: (SRLVconst (Select1 (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32]) -+ // result: (SRLVconst (MULV (ZeroExt32to64 x) (ZeroExt32to64 y)) [32]) - for { - x := v_0 - y := v_1 - v.reset(OpLOONG64SRLVconst) - v.AuxInt = int64ToAuxInt(32) -- v0 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64) -- v1 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v0 := b.NewValue0(v.Pos, OpLOONG64MULV, typ.Int64) -+ v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -+ v1.AddArg(x) - v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -- v2.AddArg(x) -- v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -- v3.AddArg(y) -- v1.AddArg2(v2, v3) -- v0.AddArg(v1) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpHmul64(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Hmul64 x y) -- // result: (Select0 (MULV x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64MULV, types.NewTuple(typ.Int64, typ.Int64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpHmul64u(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Hmul64u x y) -- // result: (Select0 (MULVU x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -+ v2.AddArg(y) -+ v0.AddArg2(v1, v2) - v.AddArg(v0) - return true - } -@@ -3279,6 +3246,89 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { - } - return false - } -+func rewriteValueLOONG64_OpLOONG64MULV(v *Value) bool { -+ v_1 := v.Args[1] -+ v_0 := v.Args[0] -+ // match: (MULV x (MOVVconst [-1])) -+ // result: (NEGV x) -+ for { -+ for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { -+ x := v_0 -+ if v_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_1.AuxInt) != -1 { -+ continue -+ } -+ v.reset(OpLOONG64NEGV) -+ v.AddArg(x) -+ return true -+ } -+ break -+ } -+ // match: (MULV _ (MOVVconst [0])) -+ // result: (MOVVconst [0]) -+ for { -+ for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { -+ if v_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_1.AuxInt) != 0 { -+ continue -+ } -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(0) -+ return true -+ } -+ break -+ } -+ // match: (MULV x (MOVVconst [1])) -+ // result: x -+ for { -+ for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { -+ x := v_0 -+ if v_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_1.AuxInt) != 1 { -+ continue -+ } -+ v.copyOf(x) -+ return true -+ } -+ break -+ } -+ // match: (MULV x (MOVVconst [c])) -+ // cond: isPowerOfTwo64(c) -+ // result: (SLLVconst [log64(c)] x) -+ for { -+ for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { -+ x := v_0 -+ if v_1.Op != OpLOONG64MOVVconst { -+ continue -+ } -+ c := auxIntToInt64(v_1.AuxInt) -+ if !(isPowerOfTwo64(c)) { -+ continue -+ } -+ v.reset(OpLOONG64SLLVconst) -+ v.AuxInt = int64ToAuxInt(log64(c)) -+ v.AddArg(x) -+ return true -+ } -+ break -+ } -+ // match: (MULV (MOVVconst [c]) (MOVVconst [d])) -+ // result: (MOVVconst [c*d]) -+ for { -+ for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { -+ if v_0.Op != OpLOONG64MOVVconst { -+ continue -+ } -+ c := auxIntToInt64(v_0.AuxInt) -+ if v_1.Op != OpLOONG64MOVVconst { -+ continue -+ } -+ d := auxIntToInt64(v_1.AuxInt) -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(c * d) -+ return true -+ } -+ break -+ } -+ return false -+} - func rewriteValueLOONG64_OpLOONG64NEGV(v *Value) bool { - v_0 := v.Args[0] - // match: (NEGV (MOVVconst [c])) -@@ -5671,74 +5721,6 @@ func rewriteValueLOONG64_OpMove(v *Value) bool { - } - return false - } --func rewriteValueLOONG64_OpMul16(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Mul16 x y) -- // result: (Select1 (MULVU x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpMul32(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Mul32 x y) -- // result: (Select1 (MULVU x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpMul64(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Mul64 x y) -- // result: (Select1 (MULVU x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpMul8(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Mul8 x y) -- // result: (Select1 (MULVU x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} - func rewriteValueLOONG64_OpNeq16(v *Value) bool { - v_1 := v.Args[1] - v_0 := v.Args[0] -@@ -6925,20 +6907,28 @@ func rewriteValueLOONG64_OpRsh8x8(v *Value) bool { - func rewriteValueLOONG64_OpSelect0(v *Value) bool { - v_0 := v.Args[0] - b := v.Block -- typ := &b.Func.Config.Types -+ // match: (Select0 (Mul64uhilo x y)) -+ // result: (MULHVU x y) -+ for { -+ if v_0.Op != OpMul64uhilo { -+ break -+ } -+ y := v_0.Args[1] -+ x := v_0.Args[0] -+ v.reset(OpLOONG64MULHVU) -+ v.AddArg2(x, y) -+ return true -+ } - // match: (Select0 (Mul64uover x y)) -- // result: (Select1 (MULVU x y)) -+ // result: (MULV x y) - for { - if v_0.Op != OpMul64uover { - break - } - y := v_0.Args[1] - x := v_0.Args[0] -- v.reset(OpSelect1) -- v.Type = typ.UInt64 -- v0 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -+ v.reset(OpLOONG64MULV) -+ v.AddArg2(x, y) - return true - } - // match: (Select0 (Add64carry x y c)) -@@ -7066,8 +7056,20 @@ func rewriteValueLOONG64_OpSelect1(v *Value) bool { - v_0 := v.Args[0] - b := v.Block - typ := &b.Func.Config.Types -+ // match: (Select1 (Mul64uhilo x y)) -+ // result: (MULV x y) -+ for { -+ if v_0.Op != OpMul64uhilo { -+ break -+ } -+ y := v_0.Args[1] -+ x := v_0.Args[0] -+ v.reset(OpLOONG64MULV) -+ v.AddArg2(x, y) -+ return true -+ } - // match: (Select1 (Mul64uover x y)) -- // result: (SGTU (Select0 (MULVU x y)) (MOVVconst [0])) -+ // result: (SGTU (MULHVU x y) (MOVVconst [0])) - for { - if v_0.Op != OpMul64uover { - break -@@ -7076,13 +7078,11 @@ func rewriteValueLOONG64_OpSelect1(v *Value) bool { - x := v_0.Args[0] - v.reset(OpLOONG64SGTU) - v.Type = typ.Bool -- v0 := b.NewValue0(v.Pos, OpSelect0, typ.UInt64) -- v1 := b.NewValue0(v.Pos, OpLOONG64MULVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v1.AddArg2(x, y) -- v0.AddArg(v1) -- v2 := b.NewValue0(v.Pos, OpLOONG64MOVVconst, typ.UInt64) -- v2.AuxInt = int64ToAuxInt(0) -- v.AddArg2(v0, v2) -+ v0 := b.NewValue0(v.Pos, OpLOONG64MULHVU, typ.UInt64) -+ v0.AddArg2(x, y) -+ v1 := b.NewValue0(v.Pos, OpLOONG64MOVVconst, typ.UInt64) -+ v1.AuxInt = int64ToAuxInt(0) -+ v.AddArg2(v0, v1) - return true - } - // match: (Select1 (Add64carry x y c)) -@@ -7129,90 +7129,6 @@ func rewriteValueLOONG64_OpSelect1(v *Value) bool { - v.AddArg2(v0, v2) - return true - } -- // match: (Select1 (MULVU x (MOVVconst [-1]))) -- // result: (NEGV x) -- for { -- if v_0.Op != OpLOONG64MULVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 { -- x := v_0_0 -- if v_0_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != -1 { -- continue -- } -- v.reset(OpLOONG64NEGV) -- v.AddArg(x) -- return true -- } -- break -- } -- // match: (Select1 (MULVU _ (MOVVconst [0]))) -- // result: (MOVVconst [0]) -- for { -- if v_0.Op != OpLOONG64MULVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 { -- if v_0_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 0 { -- continue -- } -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(0) -- return true -- } -- break -- } -- // match: (Select1 (MULVU x (MOVVconst [1]))) -- // result: x -- for { -- if v_0.Op != OpLOONG64MULVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 { -- x := v_0_0 -- if v_0_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 1 { -- continue -- } -- v.copyOf(x) -- return true -- } -- break -- } -- // match: (Select1 (MULVU x (MOVVconst [c]))) -- // cond: isPowerOfTwo64(c) -- // result: (SLLVconst [log64(c)] x) -- for { -- if v_0.Op != OpLOONG64MULVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 { -- x := v_0_0 -- if v_0_1.Op != OpLOONG64MOVVconst { -- continue -- } -- c := auxIntToInt64(v_0_1.AuxInt) -- if !(isPowerOfTwo64(c)) { -- continue -- } -- v.reset(OpLOONG64SLLVconst) -- v.AuxInt = int64ToAuxInt(log64(c)) -- v.AddArg(x) -- return true -- } -- break -- } - // match: (Select1 (DIVVU x (MOVVconst [1]))) - // result: x - for { -@@ -7250,30 +7166,6 @@ func rewriteValueLOONG64_OpSelect1(v *Value) bool { - v.AddArg(x) - return true - } -- // match: (Select1 (MULVU (MOVVconst [c]) (MOVVconst [d]))) -- // result: (MOVVconst [c*d]) -- for { -- if v_0.Op != OpLOONG64MULVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 { -- if v_0_0.Op != OpLOONG64MOVVconst { -- continue -- } -- c := auxIntToInt64(v_0_0.AuxInt) -- if v_0_1.Op != OpLOONG64MOVVconst { -- continue -- } -- d := auxIntToInt64(v_0_1.AuxInt) -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(c * d) -- return true -- } -- break -- } - // match: (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) - // cond: d != 0 - // result: (MOVVconst [c/d]) --- -2.38.1 - diff --git a/0054-cmd-compile-split-DIVV-DIVVU-op-on-loong64.patch b/0054-cmd-compile-split-DIVV-DIVVU-op-on-loong64.patch deleted file mode 100644 index b31b3e9cf0bdd1d9be95f3bdc4db5120cea408cc..0000000000000000000000000000000000000000 --- a/0054-cmd-compile-split-DIVV-DIVVU-op-on-loong64.patch +++ /dev/null @@ -1,1038 +0,0 @@ -From a4ae935430449401f42427818790e9d2e2398518 Mon Sep 17 00:00:00 2001 -From: Wayne Zuo -Date: Thu, 2 Mar 2023 15:55:03 +0800 -Subject: [PATCH 54/62] cmd/compile: split DIVV/DIVVU op on loong64 - -Previously, we need calculate both quotient and remainder together. -However, in most cases, only one result is needed. By separating these -instructions, we can save one instruction in most cases. - -Change-Id: I0a2d4167cda68ab606783ba1aa2720ede19d6b53 -Reviewed-on: https://go-review.googlesource.com/c/go/+/475315 -Reviewed-by: Than McIntosh -Run-TryBot: Wayne Zuo -Reviewed-by: abner chenc -TryBot-Result: Gopher Robot -Reviewed-by: David Chase ---- - src/cmd/compile/internal/loong64/ssa.go | 29 +- - .../compile/internal/ssa/_gen/LOONG64.rules | 48 +- - .../compile/internal/ssa/_gen/LOONG64Ops.go | 8 +- - src/cmd/compile/internal/ssa/opGen.go | 52 +- - .../compile/internal/ssa/rewriteLOONG64.go | 560 ++++++++---------- - 5 files changed, 310 insertions(+), 387 deletions(-) - -diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go -index 1c84dccb11..18abe06966 100644 ---- a/src/cmd/compile/internal/loong64/ssa.go -+++ b/src/cmd/compile/internal/loong64/ssa.go -@@ -163,7 +163,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { - ssa.OpLOONG64MULD, - ssa.OpLOONG64DIVF, - ssa.OpLOONG64DIVD, -- ssa.OpLOONG64MULV, ssa.OpLOONG64MULHV, ssa.OpLOONG64MULHVU: -+ ssa.OpLOONG64MULV, ssa.OpLOONG64MULHV, ssa.OpLOONG64MULHVU, -+ ssa.OpLOONG64DIVV, ssa.OpLOONG64REMV, ssa.OpLOONG64DIVVU, ssa.OpLOONG64REMVU: - p := s.Prog(v.Op.Asm()) - p.From.Type = obj.TYPE_REG - p.From.Reg = v.Args[1].Reg() -@@ -197,32 +198,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { - p.Reg = v.Args[0].Reg() - p.To.Type = obj.TYPE_REG - p.To.Reg = v.Reg() -- case ssa.OpLOONG64DIVV: -- p := s.Prog(loong64.ADIVV) -- p.From.Type = obj.TYPE_REG -- p.From.Reg = v.Args[1].Reg() -- p.Reg = v.Args[0].Reg() -- p.To.Type = obj.TYPE_REG -- p.To.Reg = v.Reg1() -- p1 := s.Prog(loong64.AREMV) -- p1.From.Type = obj.TYPE_REG -- p1.From.Reg = v.Args[1].Reg() -- p1.Reg = v.Args[0].Reg() -- p1.To.Type = obj.TYPE_REG -- p1.To.Reg = v.Reg0() -- case ssa.OpLOONG64DIVVU: -- p := s.Prog(loong64.ADIVVU) -- p.From.Type = obj.TYPE_REG -- p.From.Reg = v.Args[1].Reg() -- p.Reg = v.Args[0].Reg() -- p.To.Type = obj.TYPE_REG -- p.To.Reg = v.Reg1() -- p1 := s.Prog(loong64.AREMVU) -- p1.From.Type = obj.TYPE_REG -- p1.From.Reg = v.Args[1].Reg() -- p1.Reg = v.Args[0].Reg() -- p1.To.Type = obj.TYPE_REG -- p1.To.Reg = v.Reg0() - case ssa.OpLOONG64MOVVconst: - r := v.Reg() - p := s.Prog(v.Op.Asm()) -diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -index 8c81b7a3f6..dc1a76dc93 100644 ---- a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -+++ b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules -@@ -20,24 +20,24 @@ - (Hmul32 x y) => (SRAVconst (MULV (SignExt32to64 x) (SignExt32to64 y)) [32]) - (Hmul32u x y) => (SRLVconst (MULV (ZeroExt32to64 x) (ZeroExt32to64 y)) [32]) - --(Div64 x y) => (Select1 (DIVV x y)) --(Div64u x y) => (Select1 (DIVVU x y)) --(Div32 x y) => (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y))) --(Div32u x y) => (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))) --(Div16 x y) => (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y))) --(Div16u x y) => (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))) --(Div8 x y) => (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y))) --(Div8u x y) => (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))) -+(Div64 x y) => (DIVV x y) -+(Div64u ...) => (DIVVU ...) -+(Div32 x y) => (DIVV (SignExt32to64 x) (SignExt32to64 y)) -+(Div32u x y) => (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)) -+(Div16 x y) => (DIVV (SignExt16to64 x) (SignExt16to64 y)) -+(Div16u x y) => (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)) -+(Div8 x y) => (DIVV (SignExt8to64 x) (SignExt8to64 y)) -+(Div8u x y) => (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)) - (Div(32|64)F ...) => (DIV(F|D) ...) - --(Mod64 x y) => (Select0 (DIVV x y)) --(Mod64u x y) => (Select0 (DIVVU x y)) --(Mod32 x y) => (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y))) --(Mod32u x y) => (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))) --(Mod16 x y) => (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y))) --(Mod16u x y) => (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))) --(Mod8 x y) => (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y))) --(Mod8u x y) => (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))) -+(Mod64 x y) => (REMV x y) -+(Mod64u ...) => (REMVU ...) -+(Mod32 x y) => (REMV (SignExt32to64 x) (SignExt32to64 y)) -+(Mod32u x y) => (REMVU (ZeroExt32to64 x) (ZeroExt32to64 y)) -+(Mod16 x y) => (REMV (SignExt16to64 x) (SignExt16to64 y)) -+(Mod16u x y) => (REMVU (ZeroExt16to64 x) (ZeroExt16to64 y)) -+(Mod8 x y) => (REMV (SignExt8to64 x) (SignExt8to64 y)) -+(Mod8u x y) => (REMVU (ZeroExt8to64 x) (ZeroExt8to64 y)) - - (Select0 (Add64carry x y c)) => (ADDV (ADDV x y) c) - (Select1 (Add64carry x y c)) => -@@ -578,10 +578,10 @@ - (MULV x (MOVVconst [c])) && isPowerOfTwo64(c) => (SLLVconst [log64(c)] x) - - // div by constant --(Select1 (DIVVU x (MOVVconst [1]))) => x --(Select1 (DIVVU x (MOVVconst [c]))) && isPowerOfTwo64(c) => (SRLVconst [log64(c)] x) --(Select0 (DIVVU _ (MOVVconst [1]))) => (MOVVconst [0]) // mod --(Select0 (DIVVU x (MOVVconst [c]))) && isPowerOfTwo64(c) => (ANDconst [c-1] x) // mod -+(DIVVU x (MOVVconst [1])) => x -+(DIVVU x (MOVVconst [c])) && isPowerOfTwo64(c) => (SRLVconst [log64(c)] x) -+(REMVU _ (MOVVconst [1])) => (MOVVconst [0]) // mod -+(REMVU x (MOVVconst [c])) && isPowerOfTwo64(c) => (ANDconst [c-1] x) // mod - - // generic simplifications - (ADDV x (NEGV y)) => (SUBV x y) -@@ -614,10 +614,10 @@ - (SRLVconst [c] (MOVVconst [d])) => (MOVVconst [int64(uint64(d)>>uint64(c))]) - (SRAVconst [c] (MOVVconst [d])) => (MOVVconst [d>>uint64(c)]) - (MULV (MOVVconst [c]) (MOVVconst [d])) => (MOVVconst [c*d]) --(Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [c/d]) --(Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [int64(uint64(c)/uint64(d))]) --(Select0 (DIVV (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [c%d]) // mod --(Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) && d != 0 => (MOVVconst [int64(uint64(c)%uint64(d))]) // mod -+(DIVV (MOVVconst [c]) (MOVVconst [d])) && d != 0 => (MOVVconst [c/d]) -+(DIVVU (MOVVconst [c]) (MOVVconst [d])) && d != 0 => (MOVVconst [int64(uint64(c)/uint64(d))]) -+(REMV (MOVVconst [c]) (MOVVconst [d])) && d != 0 => (MOVVconst [c%d]) // mod -+(REMVU (MOVVconst [c]) (MOVVconst [d])) && d != 0 => (MOVVconst [int64(uint64(c)%uint64(d))]) // mod - (ANDconst [c] (MOVVconst [d])) => (MOVVconst [c&d]) - (ANDconst [c] (ANDconst [d] x)) => (ANDconst [c&d] x) - (ORconst [c] (MOVVconst [d])) => (MOVVconst [c|d]) -diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -index e40354e526..f2b9ac9ccd 100644 ---- a/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -+++ b/src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go -@@ -124,7 +124,6 @@ func init() { - // Common individual register masks - var ( - gp = buildReg("R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31") // R1 is LR, R2 is thread pointer, R3 is stack pointer, R21-unused, R22 is g, R30 is REGTMP -- gps = buildReg("R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31") | buildReg("g") - gpg = gp | buildReg("g") - gpsp = gp | buildReg("SP") - gpspg = gpg | buildReg("SP") -@@ -142,7 +141,6 @@ func init() { - gp11 = regInfo{inputs: []regMask{gpg}, outputs: []regMask{gp}} - gp11sp = regInfo{inputs: []regMask{gpspg}, outputs: []regMask{gp}} - gp21 = regInfo{inputs: []regMask{gpg, gpg}, outputs: []regMask{gp}} -- gp22 = regInfo{inputs: []regMask{gps, gps}, outputs: []regMask{gp, gp}} - gpload = regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}} - gpstore = regInfo{inputs: []regMask{gpspsbg, gpg}} - gpstore0 = regInfo{inputs: []regMask{gpspsbg}} -@@ -166,8 +164,10 @@ func init() { - {name: "MULV", argLength: 2, reg: gp21, asm: "MULV", commutative: true, typ: "Int64"}, // arg0 * arg1 - {name: "MULHV", argLength: 2, reg: gp21, asm: "MULHV", commutative: true, typ: "Int64"}, // (arg0 * arg1) >> 64, signed - {name: "MULHVU", argLength: 2, reg: gp21, asm: "MULHVU", commutative: true, typ: "UInt64"}, // (arg0 * arg1) >> 64, unsigned -- {name: "DIVV", argLength: 2, reg: gp22, resultNotInArgs: true, typ: "(Int64,Int64)"}, // arg0 / arg1, signed -- {name: "DIVVU", argLength: 2, reg: gp22, resultNotInArgs: true, typ: "(UInt64,UInt64)"}, // arg0 / arg1, unsigned -+ {name: "DIVV", argLength: 2, reg: gp21, asm: "DIVV", typ: "Int64"}, // arg0 / arg1, signed -+ {name: "DIVVU", argLength: 2, reg: gp21, asm: "DIVVU", typ: "UInt64"}, // arg0 / arg1, unsigned -+ {name: "REMV", argLength: 2, reg: gp21, asm: "REMV", typ: "Int64"}, // arg0 / arg1, signed -+ {name: "REMVU", argLength: 2, reg: gp21, asm: "REMVU", typ: "UInt64"}, // arg0 / arg1, unsigned - - {name: "ADDF", argLength: 2, reg: fp21, asm: "ADDF", commutative: true}, // arg0 + arg1 - {name: "ADDD", argLength: 2, reg: fp21, asm: "ADDD", commutative: true}, // arg0 + arg1 -diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go -index 33b05a09bc..5a001573ea 100644 ---- a/src/cmd/compile/internal/ssa/opGen.go -+++ b/src/cmd/compile/internal/ssa/opGen.go -@@ -1720,6 +1720,8 @@ const ( - OpLOONG64MULHVU - OpLOONG64DIVV - OpLOONG64DIVVU -+ OpLOONG64REMV -+ OpLOONG64REMVU - OpLOONG64ADDF - OpLOONG64ADDD - OpLOONG64SUBF -@@ -22959,32 +22961,58 @@ var opcodeTable = [...]opInfo{ - }, - }, - { -- name: "DIVV", -- argLen: 2, -- resultNotInArgs: true, -+ name: "DIVV", -+ argLen: 2, -+ asm: loong64.ADIVV, - reg: regInfo{ - inputs: []inputInfo{ -- {0, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 - }, - outputs: []outputInfo{ - {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 - }, - }, - }, - { -- name: "DIVVU", -- argLen: 2, -- resultNotInArgs: true, -+ name: "DIVVU", -+ argLen: 2, -+ asm: loong64.ADIVVU, - reg: regInfo{ - inputs: []inputInfo{ -- {0, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1072496632}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ }, -+ outputs: []outputInfo{ -+ {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -+ }, -+ }, -+ }, -+ { -+ name: "REMV", -+ argLen: 2, -+ asm: loong64.AREMV, -+ reg: regInfo{ -+ inputs: []inputInfo{ -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ }, -+ outputs: []outputInfo{ -+ {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -+ }, -+ }, -+ }, -+ { -+ name: "REMVU", -+ argLen: 2, -+ asm: loong64.AREMVU, -+ reg: regInfo{ -+ inputs: []inputInfo{ -+ {0, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 -+ {1, 1072693240}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 g R23 R24 R25 R26 R27 R28 R29 R31 - }, - outputs: []outputInfo{ - {0, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 -- {1, 1070596088}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R23 R24 R25 R26 R27 R28 R29 R31 - }, - }, - }, -diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -index 49122c5feb..08e0d6f6c2 100644 ---- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go -+++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go -@@ -167,7 +167,8 @@ func rewriteValueLOONG64(v *Value) bool { - v.Op = OpLOONG64DIVD - return true - case OpDiv64u: -- return rewriteValueLOONG64_OpDiv64u(v) -+ v.Op = OpLOONG64DIVVU -+ return true - case OpDiv8: - return rewriteValueLOONG64_OpDiv8(v) - case OpDiv8u: -@@ -224,6 +225,10 @@ func rewriteValueLOONG64(v *Value) bool { - return rewriteValueLOONG64_OpLOONG64AND(v) - case OpLOONG64ANDconst: - return rewriteValueLOONG64_OpLOONG64ANDconst(v) -+ case OpLOONG64DIVV: -+ return rewriteValueLOONG64_OpLOONG64DIVV(v) -+ case OpLOONG64DIVVU: -+ return rewriteValueLOONG64_OpLOONG64DIVVU(v) - case OpLOONG64LoweredAtomicAdd32: - return rewriteValueLOONG64_OpLOONG64LoweredAtomicAdd32(v) - case OpLOONG64LoweredAtomicAdd64: -@@ -300,6 +305,10 @@ func rewriteValueLOONG64(v *Value) bool { - return rewriteValueLOONG64_OpLOONG64OR(v) - case OpLOONG64ORconst: - return rewriteValueLOONG64_OpLOONG64ORconst(v) -+ case OpLOONG64REMV: -+ return rewriteValueLOONG64_OpLOONG64REMV(v) -+ case OpLOONG64REMVU: -+ return rewriteValueLOONG64_OpLOONG64REMVU(v) - case OpLOONG64ROTR: - return rewriteValueLOONG64_OpLOONG64ROTR(v) - case OpLOONG64ROTRV: -@@ -419,7 +428,8 @@ func rewriteValueLOONG64(v *Value) bool { - case OpMod64: - return rewriteValueLOONG64_OpMod64(v) - case OpMod64u: -- return rewriteValueLOONG64_OpMod64u(v) -+ v.Op = OpLOONG64REMVU -+ return true - case OpMod8: - return rewriteValueLOONG64_OpMod8(v) - case OpMod8u: -@@ -916,18 +926,16 @@ func rewriteValueLOONG64_OpDiv16(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Div16 x y) -- // result: (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y))) -+ // result: (DIVV (SignExt16to64 x) (SignExt16to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -+ v.reset(OpLOONG64DIVV) -+ v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -937,18 +945,16 @@ func rewriteValueLOONG64_OpDiv16u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Div16u x y) -- // result: (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))) -+ // result: (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v.reset(OpLOONG64DIVVU) -+ v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -958,18 +964,16 @@ func rewriteValueLOONG64_OpDiv32(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Div32 x y) -- // result: (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y))) -+ // result: (DIVV (SignExt32to64 x) (SignExt32to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -+ v.reset(OpLOONG64DIVV) -+ v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -979,52 +983,29 @@ func rewriteValueLOONG64_OpDiv32u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Div32u x y) -- // result: (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))) -+ // result: (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v.reset(OpLOONG64DIVVU) -+ v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } - func rewriteValueLOONG64_OpDiv64(v *Value) bool { - v_1 := v.Args[1] - v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types - // match: (Div64 x y) -- // result: (Select1 (DIVV x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpDiv64u(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Div64u x y) -- // result: (Select1 (DIVVU x y)) -+ // result: (DIVV x y) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -+ v.reset(OpLOONG64DIVV) -+ v.AddArg2(x, y) - return true - } - } -@@ -1034,18 +1015,16 @@ func rewriteValueLOONG64_OpDiv8(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Div8 x y) -- // result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y))) -+ // result: (DIVV (SignExt8to64 x) (SignExt8to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -+ v.reset(OpLOONG64DIVV) -+ v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -1055,18 +1034,16 @@ func rewriteValueLOONG64_OpDiv8u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Div8u x y) -- // result: (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))) -+ // result: (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect1) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v.reset(OpLOONG64DIVVU) -+ v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -1526,6 +1503,81 @@ func rewriteValueLOONG64_OpLOONG64ANDconst(v *Value) bool { - } - return false - } -+func rewriteValueLOONG64_OpLOONG64DIVV(v *Value) bool { -+ v_1 := v.Args[1] -+ v_0 := v.Args[0] -+ // match: (DIVV (MOVVconst [c]) (MOVVconst [d])) -+ // cond: d != 0 -+ // result: (MOVVconst [c/d]) -+ for { -+ if v_0.Op != OpLOONG64MOVVconst { -+ break -+ } -+ c := auxIntToInt64(v_0.AuxInt) -+ if v_1.Op != OpLOONG64MOVVconst { -+ break -+ } -+ d := auxIntToInt64(v_1.AuxInt) -+ if !(d != 0) { -+ break -+ } -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(c / d) -+ return true -+ } -+ return false -+} -+func rewriteValueLOONG64_OpLOONG64DIVVU(v *Value) bool { -+ v_1 := v.Args[1] -+ v_0 := v.Args[0] -+ // match: (DIVVU x (MOVVconst [1])) -+ // result: x -+ for { -+ x := v_0 -+ if v_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_1.AuxInt) != 1 { -+ break -+ } -+ v.copyOf(x) -+ return true -+ } -+ // match: (DIVVU x (MOVVconst [c])) -+ // cond: isPowerOfTwo64(c) -+ // result: (SRLVconst [log64(c)] x) -+ for { -+ x := v_0 -+ if v_1.Op != OpLOONG64MOVVconst { -+ break -+ } -+ c := auxIntToInt64(v_1.AuxInt) -+ if !(isPowerOfTwo64(c)) { -+ break -+ } -+ v.reset(OpLOONG64SRLVconst) -+ v.AuxInt = int64ToAuxInt(log64(c)) -+ v.AddArg(x) -+ return true -+ } -+ // match: (DIVVU (MOVVconst [c]) (MOVVconst [d])) -+ // cond: d != 0 -+ // result: (MOVVconst [int64(uint64(c)/uint64(d))]) -+ for { -+ if v_0.Op != OpLOONG64MOVVconst { -+ break -+ } -+ c := auxIntToInt64(v_0.AuxInt) -+ if v_1.Op != OpLOONG64MOVVconst { -+ break -+ } -+ d := auxIntToInt64(v_1.AuxInt) -+ if !(d != 0) { -+ break -+ } -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(int64(uint64(c) / uint64(d))) -+ return true -+ } -+ return false -+} - func rewriteValueLOONG64_OpLOONG64LoweredAtomicAdd32(v *Value) bool { - v_2 := v.Args[2] - v_1 := v.Args[1] -@@ -3474,6 +3526,81 @@ func rewriteValueLOONG64_OpLOONG64ORconst(v *Value) bool { - } - return false - } -+func rewriteValueLOONG64_OpLOONG64REMV(v *Value) bool { -+ v_1 := v.Args[1] -+ v_0 := v.Args[0] -+ // match: (REMV (MOVVconst [c]) (MOVVconst [d])) -+ // cond: d != 0 -+ // result: (MOVVconst [c%d]) -+ for { -+ if v_0.Op != OpLOONG64MOVVconst { -+ break -+ } -+ c := auxIntToInt64(v_0.AuxInt) -+ if v_1.Op != OpLOONG64MOVVconst { -+ break -+ } -+ d := auxIntToInt64(v_1.AuxInt) -+ if !(d != 0) { -+ break -+ } -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(c % d) -+ return true -+ } -+ return false -+} -+func rewriteValueLOONG64_OpLOONG64REMVU(v *Value) bool { -+ v_1 := v.Args[1] -+ v_0 := v.Args[0] -+ // match: (REMVU _ (MOVVconst [1])) -+ // result: (MOVVconst [0]) -+ for { -+ if v_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_1.AuxInt) != 1 { -+ break -+ } -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(0) -+ return true -+ } -+ // match: (REMVU x (MOVVconst [c])) -+ // cond: isPowerOfTwo64(c) -+ // result: (ANDconst [c-1] x) -+ for { -+ x := v_0 -+ if v_1.Op != OpLOONG64MOVVconst { -+ break -+ } -+ c := auxIntToInt64(v_1.AuxInt) -+ if !(isPowerOfTwo64(c)) { -+ break -+ } -+ v.reset(OpLOONG64ANDconst) -+ v.AuxInt = int64ToAuxInt(c - 1) -+ v.AddArg(x) -+ return true -+ } -+ // match: (REMVU (MOVVconst [c]) (MOVVconst [d])) -+ // cond: d != 0 -+ // result: (MOVVconst [int64(uint64(c)%uint64(d))]) -+ for { -+ if v_0.Op != OpLOONG64MOVVconst { -+ break -+ } -+ c := auxIntToInt64(v_0.AuxInt) -+ if v_1.Op != OpLOONG64MOVVconst { -+ break -+ } -+ d := auxIntToInt64(v_1.AuxInt) -+ if !(d != 0) { -+ break -+ } -+ v.reset(OpLOONG64MOVVconst) -+ v.AuxInt = int64ToAuxInt(int64(uint64(c) % uint64(d))) -+ return true -+ } -+ return false -+} - func rewriteValueLOONG64_OpLOONG64ROTR(v *Value) bool { - v_1 := v.Args[1] - v_0 := v.Args[0] -@@ -5143,18 +5270,16 @@ func rewriteValueLOONG64_OpMod16(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Mod16 x y) -- // result: (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y))) -+ // result: (REMV (SignExt16to64 x) (SignExt16to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -+ v.reset(OpLOONG64REMV) -+ v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -5164,18 +5289,16 @@ func rewriteValueLOONG64_OpMod16u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Mod16u x y) -- // result: (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))) -+ // result: (REMVU (ZeroExt16to64 x) (ZeroExt16to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v.reset(OpLOONG64REMVU) -+ v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -5185,18 +5308,16 @@ func rewriteValueLOONG64_OpMod32(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Mod32 x y) -- // result: (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y))) -+ // result: (REMV (SignExt32to64 x) (SignExt32to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -+ v.reset(OpLOONG64REMV) -+ v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -5206,52 +5327,29 @@ func rewriteValueLOONG64_OpMod32u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Mod32u x y) -- // result: (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))) -+ // result: (REMVU (ZeroExt32to64 x) (ZeroExt32to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v.reset(OpLOONG64REMVU) -+ v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } - func rewriteValueLOONG64_OpMod64(v *Value) bool { - v_1 := v.Args[1] - v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types - // match: (Mod64 x y) -- // result: (Select0 (DIVV x y)) -+ // result: (REMV x y) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -- return true -- } --} --func rewriteValueLOONG64_OpMod64u(v *Value) bool { -- v_1 := v.Args[1] -- v_0 := v.Args[0] -- b := v.Block -- typ := &b.Func.Config.Types -- // match: (Mod64u x y) -- // result: (Select0 (DIVVU x y)) -- for { -- x := v_0 -- y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -- v0.AddArg2(x, y) -- v.AddArg(v0) -+ v.reset(OpLOONG64REMV) -+ v.AddArg2(x, y) - return true - } - } -@@ -5261,18 +5359,16 @@ func rewriteValueLOONG64_OpMod8(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Mod8 x y) -- // result: (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y))) -+ // result: (REMV (SignExt8to64 x) (SignExt8to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVV, types.NewTuple(typ.Int64, typ.Int64)) -+ v.reset(OpLOONG64REMV) -+ v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -5282,18 +5378,16 @@ func rewriteValueLOONG64_OpMod8u(v *Value) bool { - b := v.Block - typ := &b.Func.Config.Types - // match: (Mod8u x y) -- // result: (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))) -+ // result: (REMVU (ZeroExt8to64 x) (ZeroExt8to64 y)) - for { - x := v_0 - y := v_1 -- v.reset(OpSelect0) -- v0 := b.NewValue0(v.Pos, OpLOONG64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64)) -+ v.reset(OpLOONG64REMVU) -+ v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64) -+ v0.AddArg(x) - v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64) -- v1.AddArg(x) -- v2 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64) -- v2.AddArg(y) -- v0.AddArg2(v1, v2) -- v.AddArg(v0) -+ v1.AddArg(y) -+ v.AddArg2(v0, v1) - return true - } - } -@@ -6963,93 +7057,6 @@ func rewriteValueLOONG64_OpSelect0(v *Value) bool { - v.AddArg2(v0, c) - return true - } -- // match: (Select0 (DIVVU _ (MOVVconst [1]))) -- // result: (MOVVconst [0]) -- for { -- if v_0.Op != OpLOONG64DIVVU { -- break -- } -- _ = v_0.Args[1] -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 1 { -- break -- } -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(0) -- return true -- } -- // match: (Select0 (DIVVU x (MOVVconst [c]))) -- // cond: isPowerOfTwo64(c) -- // result: (ANDconst [c-1] x) -- for { -- if v_0.Op != OpLOONG64DIVVU { -- break -- } -- _ = v_0.Args[1] -- x := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst { -- break -- } -- c := auxIntToInt64(v_0_1.AuxInt) -- if !(isPowerOfTwo64(c)) { -- break -- } -- v.reset(OpLOONG64ANDconst) -- v.AuxInt = int64ToAuxInt(c - 1) -- v.AddArg(x) -- return true -- } -- // match: (Select0 (DIVV (MOVVconst [c]) (MOVVconst [d]))) -- // cond: d != 0 -- // result: (MOVVconst [c%d]) -- for { -- if v_0.Op != OpLOONG64DIVV { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- if v_0_0.Op != OpLOONG64MOVVconst { -- break -- } -- c := auxIntToInt64(v_0_0.AuxInt) -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst { -- break -- } -- d := auxIntToInt64(v_0_1.AuxInt) -- if !(d != 0) { -- break -- } -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(c % d) -- return true -- } -- // match: (Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) -- // cond: d != 0 -- // result: (MOVVconst [int64(uint64(c)%uint64(d))]) -- for { -- if v_0.Op != OpLOONG64DIVVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- if v_0_0.Op != OpLOONG64MOVVconst { -- break -- } -- c := auxIntToInt64(v_0_0.AuxInt) -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst { -- break -- } -- d := auxIntToInt64(v_0_1.AuxInt) -- if !(d != 0) { -- break -- } -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(int64(uint64(c) % uint64(d))) -- return true -- } - return false - } - func rewriteValueLOONG64_OpSelect1(v *Value) bool { -@@ -7129,93 +7136,6 @@ func rewriteValueLOONG64_OpSelect1(v *Value) bool { - v.AddArg2(v0, v2) - return true - } -- // match: (Select1 (DIVVU x (MOVVconst [1]))) -- // result: x -- for { -- if v_0.Op != OpLOONG64DIVVU { -- break -- } -- _ = v_0.Args[1] -- x := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst || auxIntToInt64(v_0_1.AuxInt) != 1 { -- break -- } -- v.copyOf(x) -- return true -- } -- // match: (Select1 (DIVVU x (MOVVconst [c]))) -- // cond: isPowerOfTwo64(c) -- // result: (SRLVconst [log64(c)] x) -- for { -- if v_0.Op != OpLOONG64DIVVU { -- break -- } -- _ = v_0.Args[1] -- x := v_0.Args[0] -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst { -- break -- } -- c := auxIntToInt64(v_0_1.AuxInt) -- if !(isPowerOfTwo64(c)) { -- break -- } -- v.reset(OpLOONG64SRLVconst) -- v.AuxInt = int64ToAuxInt(log64(c)) -- v.AddArg(x) -- return true -- } -- // match: (Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) -- // cond: d != 0 -- // result: (MOVVconst [c/d]) -- for { -- if v_0.Op != OpLOONG64DIVV { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- if v_0_0.Op != OpLOONG64MOVVconst { -- break -- } -- c := auxIntToInt64(v_0_0.AuxInt) -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst { -- break -- } -- d := auxIntToInt64(v_0_1.AuxInt) -- if !(d != 0) { -- break -- } -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(c / d) -- return true -- } -- // match: (Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) -- // cond: d != 0 -- // result: (MOVVconst [int64(uint64(c)/uint64(d))]) -- for { -- if v_0.Op != OpLOONG64DIVVU { -- break -- } -- _ = v_0.Args[1] -- v_0_0 := v_0.Args[0] -- if v_0_0.Op != OpLOONG64MOVVconst { -- break -- } -- c := auxIntToInt64(v_0_0.AuxInt) -- v_0_1 := v_0.Args[1] -- if v_0_1.Op != OpLOONG64MOVVconst { -- break -- } -- d := auxIntToInt64(v_0_1.AuxInt) -- if !(d != 0) { -- break -- } -- v.reset(OpLOONG64MOVVconst) -- v.AuxInt = int64ToAuxInt(int64(uint64(c) / uint64(d))) -- return true -- } - return false - } - func rewriteValueLOONG64_OpSlicemask(v *Value) bool { --- -2.38.1 - diff --git a/0055-cmd-internal-obj-loong64-auto-align-loop-heads-to-16.patch b/0055-cmd-internal-obj-loong64-auto-align-loop-heads-to-16.patch deleted file mode 100644 index 45efd4a1532b36aad90ab27784f144e2f289e46b..0000000000000000000000000000000000000000 --- a/0055-cmd-internal-obj-loong64-auto-align-loop-heads-to-16.patch +++ /dev/null @@ -1,175 +0,0 @@ -From 6b65697069b76b77604d810d0c486d169c043603 Mon Sep 17 00:00:00 2001 -From: WANG Xuerui -Date: Tue, 28 Mar 2023 21:10:16 +0800 -Subject: [PATCH 55/62] cmd/internal/obj/loong64: auto-align loop heads to - 16-byte boundaries -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -CL 479816 took care of loops in hand-written assembly, but did not -account for those written in Go, that may become performance-sensitive -as well. - -In this patch, all loop heads are automatically identified and aligned -to 16-byte boundaries, by inserting a synthetic `PCALIGN $16` before -them. "Loop heads" are defined as targets of backward branches. - -Because LoongArch instructions are all 32 bits long, at most 3 NOOPs -can be inserted for each target Prog. This may sound excessive, but -benchmark results indicate the current approach is overall profitable -anyway. - -Benchmark results on Loongson 3A5000 (LA464): - -goos: linux -goarch: loong64 -pkg: test/bench/go1 - │ CL 479816 │ this CL │ - │ sec/op │ sec/op vs base │ -BinaryTree17 14.10 ± 1% 14.06 ± 1% ~ (p=0.280 n=10) -Fannkuch11 3.579 ± 0% 3.419 ± 0% -4.45% (p=0.000 n=10) -FmtFprintfEmpty 94.73n ± 0% 94.44n ± 0% -0.31% (p=0.000 n=10) -FmtFprintfString 151.9n ± 0% 149.1n ± 0% -1.84% (p=0.000 n=10) -FmtFprintfInt 158.3n ± 0% 155.2n ± 0% -1.96% (p=0.000 n=10) -FmtFprintfIntInt 241.4n ± 0% 235.4n ± 0% -2.49% (p=0.000 n=10) -FmtFprintfPrefixedInt 320.2n ± 0% 314.7n ± 0% -1.73% (p=0.000 n=10) -FmtFprintfFloat 414.3n ± 0% 398.7n ± 0% -3.77% (p=0.000 n=10) -FmtManyArgs 949.9n ± 0% 929.8n ± 0% -2.12% (p=0.000 n=10) -GobDecode 15.24m ± 0% 15.30m ± 0% +0.38% (p=0.035 n=10) -GobEncode 18.10m ± 2% 17.59m ± 1% -2.81% (p=0.002 n=10) -Gzip 429.9m ± 0% 421.5m ± 0% -1.97% (p=0.000 n=10) -Gunzip 88.31m ± 0% 87.39m ± 0% -1.04% (p=0.000 n=10) -HTTPClientServer 85.71µ ± 0% 87.24µ ± 0% +1.79% (p=0.000 n=10) -JSONEncode 19.74m ± 0% 18.55m ± 0% -6.00% (p=0.000 n=10) -JSONDecode 78.60m ± 1% 77.93m ± 0% -0.84% (p=0.000 n=10) -Mandelbrot200 7.208m ± 0% 7.217m ± 0% ~ (p=0.481 n=10) -GoParse 7.616m ± 1% 7.630m ± 2% ~ (p=0.796 n=10) -RegexpMatchEasy0_32 133.0n ± 0% 134.1n ± 0% +0.83% (p=0.000 n=10) -RegexpMatchEasy0_1K 1.362µ ± 0% 1.364µ ± 0% +0.15% (p=0.000 n=10) -RegexpMatchEasy1_32 161.8n ± 0% 163.7n ± 0% +1.17% (p=0.000 n=10) -RegexpMatchEasy1_1K 1.497µ ± 0% 1.497µ ± 0% ~ (p=1.000 n=10) -RegexpMatchMedium_32 1.420µ ± 0% 1.446µ ± 0% +1.83% (p=0.000 n=10) -RegexpMatchMedium_1K 42.25µ ± 0% 42.53µ ± 0% +0.65% (p=0.000 n=10) -RegexpMatchHard_32 2.108µ ± 0% 2.116µ ± 0% +0.38% (p=0.000 n=10) -RegexpMatchHard_1K 62.65µ ± 0% 63.23µ ± 0% +0.93% (p=0.000 n=10) -Revcomp 1.192 ± 0% 1.198 ± 0% +0.55% (p=0.000 n=10) -Template 115.6m ± 2% 116.9m ± 1% ~ (p=0.075 n=10) -TimeParse 418.1n ± 1% 414.7n ± 0% -0.81% (p=0.000 n=10) -TimeFormat 517.9n ± 0% 513.7n ± 0% -0.81% (p=0.000 n=10) -geomean 103.5µ 102.6µ -0.79% - - │ CL 479816 │ this CL │ - │ B/s │ B/s vs base │ -GobDecode 48.04Mi ± 0% 47.86Mi ± 0% -0.38% (p=0.035 n=10) -GobEncode 40.44Mi ± 2% 41.61Mi ± 1% +2.89% (p=0.001 n=10) -Gzip 43.04Mi ± 0% 43.91Mi ± 0% +2.02% (p=0.000 n=10) -Gunzip 209.6Mi ± 0% 211.8Mi ± 0% +1.05% (p=0.000 n=10) -JSONEncode 93.76Mi ± 0% 99.75Mi ± 0% +6.39% (p=0.000 n=10) -JSONDecode 23.55Mi ± 1% 23.75Mi ± 0% +0.85% (p=0.000 n=10) -GoParse 7.253Mi ± 1% 7.238Mi ± 2% ~ (p=0.698 n=10) -RegexpMatchEasy0_32 229.4Mi ± 0% 227.6Mi ± 0% -0.82% (p=0.000 n=10) -RegexpMatchEasy0_1K 717.3Mi ± 0% 716.2Mi ± 0% -0.15% (p=0.000 n=10) -RegexpMatchEasy1_32 188.6Mi ± 0% 186.4Mi ± 0% -1.13% (p=0.000 n=10) -RegexpMatchEasy1_1K 652.2Mi ± 0% 652.3Mi ± 0% +0.01% (p=0.005 n=10) -RegexpMatchMedium_32 21.49Mi ± 0% 21.11Mi ± 0% -1.73% (p=0.000 n=10) -RegexpMatchMedium_1K 23.11Mi ± 0% 22.96Mi ± 0% -0.62% (p=0.000 n=10) -RegexpMatchHard_32 14.48Mi ± 0% 14.42Mi ± 0% -0.40% (p=0.000 n=10) -RegexpMatchHard_1K 15.59Mi ± 0% 15.44Mi ± 0% -0.98% (p=0.000 n=10) -Revcomp 203.4Mi ± 0% 202.3Mi ± 0% -0.55% (p=0.000 n=10) -Template 16.00Mi ± 2% 15.83Mi ± 1% ~ (p=0.078 n=10) -geomean 60.72Mi 60.89Mi +0.29% - -The slight regression on the Regexp cases is likely because the previous -numbers are just coincidental: indeed, large regressions or improvements -(of roughly ±10%) happen with definitely irrelevant changes. This CL -should (hopefully) bring such random performance fluctuations down a -bit. - -Change-Id: I8bdda6e65336da00d4ad79650937b3eeb9db0e7c ---- - src/cmd/internal/obj/loong64/asm.go | 37 ++++++++++++++++++++++++++++- - 1 file changed, 36 insertions(+), 1 deletion(-) - -diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go -index fa1a877eab..c785adf8af 100644 ---- a/src/cmd/internal/obj/loong64/asm.go -+++ b/src/cmd/internal/obj/loong64/asm.go -@@ -28,6 +28,7 @@ type ctxt0 struct { - - const ( - FuncAlign = 4 -+ loopAlign = 16 - ) - - type Optab struct { -@@ -45,6 +46,10 @@ type Optab struct { - - const ( - NOTUSETMP = 1 << iota // p expands to multiple instructions, but does NOT use REGTMP -+ -+ // branchLoopHead marks loop entry. -+ // Used to insert padding for misaligned loops. -+ branchLoopHead - ) - - var optab = []Optab{ -@@ -434,6 +439,14 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - - c.cursym.Size = pc - -+ // mark loop entry instructions for padding -+ // loop entrances are defined as targets of backward branches -+ for p = c.cursym.Func().Text.Link; p != nil; p = p.Link { -+ if q := p.To.Target(); q != nil && q.Pc < p.Pc { -+ q.Mark |= branchLoopHead -+ } -+ } -+ - /* - * if any procedure is large enough to - * generate a large SBRA branch, then -@@ -444,10 +457,17 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - - var otxt int64 - var q *obj.Prog -+ iters := 0 - for bflag != 0 { -+ iters++ -+ if iters > 200 { -+ ctxt.Diag("layout pass doesn't converge") -+ break -+ } - bflag = 0 - pc = 0 -- for p = c.cursym.Func().Text.Link; p != nil; p = p.Link { -+ prev := c.cursym.Func().Text -+ for p = prev.Link; p != nil; prev, p = p, p.Link { - p.Pc = pc - o = c.oplook(p) - -@@ -474,6 +494,21 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { - } - } - -+ // loop heads that need padding -+ // prepend a PCALIGN $16 to such progs -+ if p.Mark&branchLoopHead != 0 && pc&(loopAlign-1) != 0 { -+ q = c.newprog() -+ prev.Link = q -+ q.Link = p -+ q.As = obj.APCALIGN -+ q.From.Type = obj.TYPE_CONST -+ q.From.Offset = loopAlign -+ // don't associate the synthesized PCALIGN -+ // with the original source position -+ // q.Pos = p.Pos -+ bflag = 1 -+ } -+ - m = int(o.size) - if m == 0 { - switch p.As { --- -2.38.1 - diff --git a/0060-Revert-cmd-link-workaround-linkshared-test-errors-on.patch b/0060-Revert-cmd-link-workaround-linkshared-test-errors-on.patch deleted file mode 100644 index 5913c2986fc19180c0a37ca52581078b79ec2b37..0000000000000000000000000000000000000000 --- a/0060-Revert-cmd-link-workaround-linkshared-test-errors-on.patch +++ /dev/null @@ -1,36 +0,0 @@ -From e69ffe14ac9a460ca960ef608f4002f438397756 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Thu, 11 May 2023 12:26:21 +0800 -Subject: [PATCH 60/62] Revert "cmd/link: workaround linkshared test errors on - loong64." - -This reverts commit 2f13efe6c594446137ecec51688d029fa2df438b. - -binutils has fixed the bug: - https://sourceware.org/pipermail/binutils/2023-May/127394.html - -Change-Id: I94ffb9ee3fa7c1e0c66280185e32b83977830f5d ---- - src/cmd/link/internal/ld/lib.go | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/src/cmd/link/internal/ld/lib.go b/src/cmd/link/internal/ld/lib.go -index 54672c0686..03b9f11608 100644 ---- a/src/cmd/link/internal/ld/lib.go -+++ b/src/cmd/link/internal/ld/lib.go -@@ -1790,12 +1790,6 @@ func (ctxt *Link) hostlink() { - argv = append(argv, peimporteddlls()...) - } - -- if ctxt.Arch.Family == sys.Loong64 { -- if (ctxt.BuildMode != BuildModeShared) && ctxt.linkShared { -- argv = append(argv, "-pie") -- } -- } -- - if ctxt.Debugvlog != 0 { - ctxt.Logf("host link:") - for _, v := range argv { --- -2.38.1 - diff --git a/0061-syscall-implement-Ptrace-Set-Get-Regs-using-PTRACE_-.patch b/0061-syscall-implement-Ptrace-Set-Get-Regs-using-PTRACE_-.patch deleted file mode 100644 index fff86314e833923d45d1dbb1b280d3940bd436d0..0000000000000000000000000000000000000000 --- a/0061-syscall-implement-Ptrace-Set-Get-Regs-using-PTRACE_-.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 84e0a4152e35fd2eaf818593fcffdf344f19644a Mon Sep 17 00:00:00 2001 -From: chenguoqi -Date: Fri, 9 Jun 2023 09:54:28 +0800 -Subject: [PATCH 61/62] syscall: implement Ptrace{Set,Get}Regs using - PTRACE_{GET,SET}REGSET on all linux platforms - -In the ptrace system call, most of the newer architectures (e.g. arm64,riscv64,loong64) -do not provide support for the command PTRACE_{GET, SET}REGS. - -The Linux kernel 2.6.33-rc7[1] introduces support for the command PTRACE_{GET,SET}REGSET, -which exports different types of register sets depending on the NT_* types, completely -overriding the functionality provided by PTRACE_{GET,SET}REGS. - -[1] https://lore.kernel.org/all/20100211195614.886724710@sbs-t61.sc.intel.com/ - -Fixes #60679. - -Change-Id: I8c2671d64a7ecd654834740f4f1e1e50c00edcae - -Signed-off-by: chenguoqi -Change-Id: I3839003de99d8ea2e346e17184c309e17a0685ac -(cherry picked from commit cadb91e0ca34c9b77ee0c9e1a6594131bd636c77) ---- - .../vendor/golang.org/x/sys/unix/syscall_linux.go | 11 +++++++++-- - src/syscall/syscall_linux.go | 14 ++++++++++++-- - 2 files changed, 21 insertions(+), 4 deletions(-) - -diff --git a/src/cmd/vendor/golang.org/x/sys/unix/syscall_linux.go b/src/cmd/vendor/golang.org/x/sys/unix/syscall_linux.go -index c5a98440ec..d20ea9de72 100644 ---- a/src/cmd/vendor/golang.org/x/sys/unix/syscall_linux.go -+++ b/src/cmd/vendor/golang.org/x/sys/unix/syscall_linux.go -@@ -12,6 +12,7 @@ - package unix - - import ( -+ "debug/elf" - "encoding/binary" - "strconv" - "syscall" -@@ -1696,11 +1697,17 @@ func PtracePokeUser(pid int, addr uintptr, data []byte) (count int, err error) { - } - - func PtraceGetRegs(pid int, regsout *PtraceRegs) (err error) { -- return ptrace(PTRACE_GETREGS, pid, 0, uintptr(unsafe.Pointer(regsout))) -+ var iov Iovec -+ iov.Base = (*byte)(unsafe.Pointer(regsout)) -+ iov.SetLen(int(unsafe.Sizeof(*regsout))) -+ return ptrace(PTRACE_GETREGSET, pid, uintptr(elf.NT_PRSTATUS), uintptr(unsafe.Pointer(&iov))) - } - - func PtraceSetRegs(pid int, regs *PtraceRegs) (err error) { -- return ptrace(PTRACE_SETREGS, pid, 0, uintptr(unsafe.Pointer(regs))) -+ var iov Iovec -+ iov.Base = (*byte)(unsafe.Pointer(regs)) -+ iov.SetLen(int(unsafe.Sizeof(*regs))) -+ return ptrace(PTRACE_SETREGSET, pid, uintptr(elf.NT_PRSTATUS), uintptr(unsafe.Pointer(&iov))) - } - - func PtraceSetOptions(pid int, options int) (err error) { -diff --git a/src/syscall/syscall_linux.go b/src/syscall/syscall_linux.go -index d1c981a9b3..1c3ca39dd4 100644 ---- a/src/syscall/syscall_linux.go -+++ b/src/syscall/syscall_linux.go -@@ -936,12 +936,22 @@ func PtracePokeData(pid int, addr uintptr, data []byte) (count int, err error) { - return ptracePoke(PTRACE_POKEDATA, PTRACE_PEEKDATA, pid, addr, data) - } - -+const ( -+ _NT_PRSTATUS = 1 -+) -+ - func PtraceGetRegs(pid int, regsout *PtraceRegs) (err error) { -- return ptrace(PTRACE_GETREGS, pid, 0, uintptr(unsafe.Pointer(regsout))) -+ var iov Iovec -+ iov.Base = (*byte)(unsafe.Pointer(regsout)) -+ iov.SetLen(int(unsafe.Sizeof(*regsout))) -+ return ptrace(PTRACE_GETREGSET, pid, uintptr(_NT_PRSTATUS), uintptr(unsafe.Pointer(&iov))) - } - - func PtraceSetRegs(pid int, regs *PtraceRegs) (err error) { -- return ptrace(PTRACE_SETREGS, pid, 0, uintptr(unsafe.Pointer(regs))) -+ var iov Iovec -+ iov.Base = (*byte)(unsafe.Pointer(regs)) -+ iov.SetLen(int(unsafe.Sizeof(*regs))) -+ return ptrace(PTRACE_SETREGSET, pid, uintptr(_NT_PRSTATUS), uintptr(unsafe.Pointer(&iov))) - } - - func PtraceSetOptions(pid int, options int) (err error) { --- -2.38.1 - diff --git a/0085-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch b/0085-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch deleted file mode 100644 index 9269f044fb0a05421573be02c43f222446159123..0000000000000000000000000000000000000000 --- a/0085-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch +++ /dev/null @@ -1,66 +0,0 @@ -From b1fedf19694befd18ac63bca9ed0cbba272394b5 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 16 Aug 2023 10:39:38 +0800 -Subject: [PATCH 23/30] cmd/compile, internal/buildcfg: enable regABI on - loong64, and add loong64 in test func hasRegisterABI - -Change-Id: I6881258971f3c68f05583500a5e5cafc740de421 ---- - src/cmd/compile/internal/ssa/config.go | 4 ++-- - src/cmd/compile/internal/ssa/debug_lines_test.go | 2 +- - src/internal/buildcfg/exp.go | 4 +++- - 3 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/src/cmd/compile/internal/ssa/config.go b/src/cmd/compile/internal/ssa/config.go -index 98a78e0c4a..c5aafdc037 100644 ---- a/src/cmd/compile/internal/ssa/config.go -+++ b/src/cmd/compile/internal/ssa/config.go -@@ -278,8 +278,8 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize, softfloat boo - c.registers = registersLOONG64[:] - c.gpRegMask = gpRegMaskLOONG64 - c.fpRegMask = fpRegMaskLOONG64 -- // c.intParamRegs = paramIntRegLOONG64 -- // c.floatParamRegs = paramFloatRegLOONG64 -+ c.intParamRegs = paramIntRegLOONG64 -+ c.floatParamRegs = paramFloatRegLOONG64 - c.FPReg = framepointerRegLOONG64 - c.LinkReg = linkRegLOONG64 - c.hasGReg = true -diff --git a/src/cmd/compile/internal/ssa/debug_lines_test.go b/src/cmd/compile/internal/ssa/debug_lines_test.go -index 6678a96e77..03ae306146 100644 ---- a/src/cmd/compile/internal/ssa/debug_lines_test.go -+++ b/src/cmd/compile/internal/ssa/debug_lines_test.go -@@ -45,7 +45,7 @@ func testGoArch() string { - - func hasRegisterABI() bool { - switch testGoArch() { -- case "amd64", "arm64", "ppc64", "ppc64le", "riscv": -+ case "amd64", "arm64", "loong64", "ppc64", "ppc64le", "riscv": - return true - } - return false -diff --git a/src/internal/buildcfg/exp.go b/src/internal/buildcfg/exp.go -index 71f8f5648d..7f8d9a4d77 100644 ---- a/src/internal/buildcfg/exp.go -+++ b/src/internal/buildcfg/exp.go -@@ -65,6 +65,8 @@ func ParseGOEXPERIMENT(goos, goarch, goexp string) (*ExperimentFlags, error) { - case "amd64", "arm64", "ppc64le", "ppc64", "riscv64": - regabiAlwaysOn = true - regabiSupported = true -+ case "loong64": -+ regabiSupported = true - } - - baseline := goexperiment.Flags{ -@@ -130,7 +132,7 @@ func ParseGOEXPERIMENT(goos, goarch, goexp string) (*ExperimentFlags, error) { - flags.RegabiWrappers = true - flags.RegabiArgs = true - } -- // regabi is only supported on amd64, arm64, riscv64, ppc64 and ppc64le. -+ // regabi is only supported on amd64, arm64, loong64, riscv64, ppc64 and ppc64le. - if !regabiSupported { - flags.RegabiWrappers = false - flags.RegabiArgs = false --- -2.38.1 - diff --git a/0086-internal-abi-internal-buildcfg-always-enable-registe.patch b/0086-internal-abi-internal-buildcfg-always-enable-registe.patch deleted file mode 100644 index 1e11c91d5d7561edbe3f57de22d33b1cbf260293..0000000000000000000000000000000000000000 --- a/0086-internal-abi-internal-buildcfg-always-enable-registe.patch +++ /dev/null @@ -1,59 +0,0 @@ -From bad1641e43bcbf881cab8426b68911cef5c7a9d1 Mon Sep 17 00:00:00 2001 -From: Guoqi Chen -Date: Wed, 30 Aug 2023 17:08:22 +0800 -Subject: [PATCH 24/30] internal/abi, internal/buildcfg: always enable register - ABI on loong64 - -Change-Id: Ie788e36c203dab1c4dd4a874a44f56641d9446da ---- - src/internal/abi/abi_generic.go | 2 +- - src/internal/abi/abi_loong64.go | 2 -- - src/internal/buildcfg/exp.go | 4 +--- - 3 files changed, 2 insertions(+), 6 deletions(-) - -diff --git a/src/internal/abi/abi_generic.go b/src/internal/abi/abi_generic.go -index 76ef2e2898..a08d3208d4 100644 ---- a/src/internal/abi/abi_generic.go -+++ b/src/internal/abi/abi_generic.go -@@ -2,7 +2,7 @@ - // Use of this source code is governed by a BSD-style - // license that can be found in the LICENSE file. - --//go:build !goexperiment.regabiargs && !amd64 && !arm64 && !ppc64 && !ppc64le && !riscv64 -+//go:build !goexperiment.regabiargs && !amd64 && !arm64 && !loong64 && !ppc64 && !ppc64le && !riscv64 - - package abi - -diff --git a/src/internal/abi/abi_loong64.go b/src/internal/abi/abi_loong64.go -index c2306ae8d8..10ad89815b 100644 ---- a/src/internal/abi/abi_loong64.go -+++ b/src/internal/abi/abi_loong64.go -@@ -2,8 +2,6 @@ - // Use of this source code is governed by a BSD-style - // license that can be found in the LICENSE file. - --//go:build goexperiment.regabiargs -- - package abi - - const ( -diff --git a/src/internal/buildcfg/exp.go b/src/internal/buildcfg/exp.go -index 7f8d9a4d77..4b47090ca4 100644 ---- a/src/internal/buildcfg/exp.go -+++ b/src/internal/buildcfg/exp.go -@@ -62,11 +62,9 @@ func ParseGOEXPERIMENT(goos, goarch, goexp string) (*ExperimentFlags, error) { - // always on. - var regabiSupported, regabiAlwaysOn bool - switch goarch { -- case "amd64", "arm64", "ppc64le", "ppc64", "riscv64": -+ case "amd64", "arm64", "loong64", "ppc64le", "ppc64", "riscv64": - regabiAlwaysOn = true - regabiSupported = true -- case "loong64": -- regabiSupported = true - } - - baseline := goexperiment.Flags{ --- -2.38.1 - diff --git a/go1.20.12.src.tar.gz b/go1.21.10.src.tar.gz similarity index 71% rename from go1.20.12.src.tar.gz rename to go1.21.10.src.tar.gz index b78c916f4fbe191bf320f8d7ec067b6f0f56613a..3e488ed416d195e562e1074557f0e4d07e26c133 100644 Binary files a/go1.20.12.src.tar.gz and b/go1.21.10.src.tar.gz differ diff --git a/golang.spec b/golang.spec index 9f426248a9cb0cf7ce43abe364b05d385782cc40..d3caa150c68820c98ea817891e7ef6a46efd69e4 100644 --- a/golang.spec +++ b/golang.spec @@ -1,4 +1,4 @@ -%define anolis_release 1 +%define anolis_release 2 # Disable debuginfo packages %global debug_package %{nil} @@ -60,8 +60,8 @@ %endif # Comment out go_patch as needed -%global go_api 1.20 -%global go_patch 12 +%global go_api 1.21 +%global go_patch 10 Name: golang Version: %{go_api}%{?go_patch:.%{go_patch}} @@ -107,98 +107,65 @@ Requires: %{name}-src = %{version}-%{release} Patch3: 0001-cmd-go-use-aliyun-proxy-and-local-sumdb.patch Patch4: 0004-cmd-link-use-gold-on-ARM-ARM64-only-if-gold-is-avail.patch -Patch5: 0005-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch -Patch6: 0006-runtime-implement-cputicks-with-the-stable-counter-o.patch -Patch7: 0007-runtime-remove-the-fake-mstart-caller-in-systemstack.patch -Patch8: 0008-cmd-internal-obj-loong64-save-LR-after-decrementing-.patch -Patch9: 0009-runtime-refactor-the-linux-loong64-entrypoint.patch -Patch10: 0010-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch -Patch11: 0011-runtime-calculate-nanoseconds-in-usleep-on-linux-loo.patch -Patch12: 0012-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch -Patch13: 0013-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch -Patch14: 0014-runtime-save-restore-callee-saved-registers-in-loong.patch -Patch15: 0015-runtime-add-comment-for-sys_linux_loong64.patch -Patch16: 0016-runtime-mark-morestack_noctxt-SPWRITE-for-linux-loon.patch -Patch17: 0017-cmd-internal-obj-loong64-add-the-PCALAU12I-instructi.patch -Patch18: 0018-cmd-internal-obj-loong64-cmd-link-internal-loong64-s.patch -Patch19: 0019-runtime-add-support-for-buildmode-c-shared-on-loong6.patch -Patch20: 0020-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch -Patch21: 0021-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch -Patch22: 0022-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch -Patch23: 0023-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch -Patch24: 0024-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch -Patch25: 0025-cmd-link-cmd-internal-in-shared-mode-change-to-use-I.patch -Patch26: 0026-cmd-compile-cmd-dist-cmd-go-internal-enable-buildmod.patch -Patch27: 0027-net-disable-TestLookupDotsWithRemoteSource-and-TestL.patch -Patch28: 0028-enable-c-archive-test-on-linux-loong64.patch -Patch29: 0029-cmd-internal-cmd-link-remove-invalid-GOT-relative-re.patch -Patch30: 0030-runtime-no-need-to-save-these-registers-in-load_g-sa.patch -Patch31: 0031-cmd-internal-obj-loong64-add-support-for-movgr2cf-an.patch -Patch32: 0032-runtime-save-and-restore-fcc-registers-in-async-pree.patch -Patch33: 0033-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch -Patch34: 0034-cmd-internal-objfile-add-loong64-disassembler-suppor.patch -Patch35: 0035-cmd-compile-link-internal-runtime-support-buildmode-.patch -Patch36: 0036-cmd-link-internal-support-buildmode-plugin-for-loong.patch -Patch37: 0037-cmd-dist-test-enable-buildmode-shared-plugin-test-fo.patch -Patch38: 0038-runtime-enable-memory-sanitizer-on-loong64.patch -Patch39: 0039-runtime-enable-address-sanitizer-on-loong64.patch -Patch40: 0040-cmd-link-workaround-linkshared-test-errors-on-loong6.patch -Patch41: 0041-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch -Patch42: 0042-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch -Patch43: 0043-cmd-compile-internal-runtime-use-NOOP-for-hardware-N.patch -Patch44: 0044-cmd-link-internal-loong64-use-BREAK-0-as-the-code-pa.patch -Patch45: 0045-cmd-asm-runtime-remove-the-RSB-register-from-loong64.patch -Patch46: 0046-cmd-internal-obj-loong64-realize-all-unconditional-j.patch -Patch47: 0047-cmd-internal-obj-loong64-clean-up-code-for-short-con.patch -Patch48: 0048-cmd-internal-obj-loong64-assemble-BEQ-BNEs-comparing.patch -Patch49: 0049-cmd-internal-obj-loong64-remove-Optab.family-and-reo.patch -Patch50: 0050-cmd-asm-support-the-PCALIGN-directive-on-loong64.patch -Patch51: 0051-internal-bytealg-runtime-align-some-loong64-asm-loop.patch -Patch52: 0052-cmd-link-bump-loong64-function-alignment-to-16-bytes.patch -Patch53: 0053-cmd-compile-optimize-multiplication-on-loong64.patch -Patch54: 0054-cmd-compile-split-DIVV-DIVVU-op-on-loong64.patch -Patch55: 0055-cmd-internal-obj-loong64-auto-align-loop-heads-to-16.patch -Patch56: 0056-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch -Patch57: 0057-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch -Patch58: 0058-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch -Patch59: 0059-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch -Patch60: 0060-Revert-cmd-link-workaround-linkshared-test-errors-on.patch -Patch61: 0061-syscall-implement-Ptrace-Set-Get-Regs-using-PTRACE_-.patch -Patch62: 0062-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch -Patch63: 0063-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch -Patch64: 0064-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch -Patch65: 0065-cmd-compiler-runtime-internal-atomic-Implementing-An.patch -Patch66: 0066-cmd-internal-obj-loong64-correct-the-instruction-for.patch -Patch67: 0067-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch -Patch68: 0068-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch -Patch69: 0069-cmd-link-internal-loadelf-correct-the-relocation-siz.patch -Patch70: 0070-cmd-compile-cmd-internal-runtime-change-the-register.patch -Patch71: 0071-cmd-compile-add-ABI-register-definations-for-loong64.patch -Patch72: 0072-cmd-compile-cmd-internal-runtime-change-registers-on.patch -Patch73: 0073-internal-abi-define-loong64-regABI-constants.patch -Patch74: 0074-cmd-compile-internal-add-register-info-for-loong64-r.patch -Patch75: 0075-cmd-compile-internal-add-spill-support-for-loong64-r.patch -Patch76: 0076-cmd-compile-update-loong64-CALL-ops.patch -Patch77: 0077-runtime-make-duff-device-as-ABIInternal-for-loong64.patch -Patch78: 0078-runtime-support-regABI-and-add-spill-functions-in-ru.patch -Patch79: 0079-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch -Patch80: 0080-internal-bytealg-add-regABI-support-in-bytealg-funct.patch -Patch81: 0081-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch -Patch82: 0082-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch -Patch83: 0083-cmd-compile-fix-If-lowering-on-loong64.patch -Patch84: 0084-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch -Patch85: 0085-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch -Patch86: 0086-internal-abi-internal-buildcfg-always-enable-registe.patch -Patch87: 0087-all-delete-loong64-non-register-ABI-fallback-path.patch -Patch88: 0088-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch -Patch89: 0089-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch -Patch90: 0090-cmd-link-internal-loadelf-remove-useless-relocation-.patch -Patch91: 0091-cmd-link-internal-loadelf-add-additional-relocations.patch -Patch92: 0092-cmd-link-add-new-relocations-numbered-101-to-109-for.patch -Patch93: 0093-api-add-new-relocations-numbered-101-to-109-for-loon.patch + + +Patch1001: 0001-cmd-dist-cmd-link-internal-runtime-add-buildmode-plu.patch +Patch1002: 0002-runtime-cmd-go-enable-memory-sanitizer-on-linux-loon.patch +Patch1003: 0003-runtime-cmd-go-enable-address-sanitizer-on-linux-loo.patch +Patch1004: 0004-internal-sysinfo-print-cpu-type-from-cpuinfo-when-in.patch +Patch1005: 0005-cmd-cmd-vendor-pick-up-updates-for-golang.org-x-arch.patch +Patch1006: 0006-cmd-internal-objfile-add-loong64-disassembler-suppor.patch +Patch1007: 0007-runtime-remove-the-meaningless-offset-of-8-for-duffz.patch +Patch1008: 0008-cmd-compiler-remove-the-meaningless-offset-of-8-for-.patch +Patch1009: 0009-cmd-internal-obj-loong64-add-atomic-memory-access-in.patch +Patch1010: 0010-cmd-compiler-runtime-internal-atomic-optimize-xchg-a.patch +Patch1011: 0011-cmd-compiler-runtime-internal-atomic-optimize-xadd-a.patch +Patch1012: 0012-cmd-compiler-runtime-internal-atomic-optimize-And-32.patch +Patch1013: 0013-cmd-compiler-runtime-internal-atomic-Implementing-xc.patch +Patch1014: 0014-cmd-compiler-runtime-internal-atomic-Implementing-xa.patch +Patch1015: 0015-cmd-compiler-runtime-internal-atomic-Implementing-An.patch +Patch1016: 0016-cmd-internal-obj-loong64-remove-the-invalid-plan9-fo.patch +Patch1017: 0017-cmd-internal-obj-loong64-correct-the-instruction-for.patch +Patch1018: 0018-cmd-internal-obj-loong64-recheck-jump-offset-boundar.patch +Patch1019: 0019-cmd-link-internal-loong64-correct-the-glibc-dynamic-.patch +Patch1020: 0020-cmd-link-internal-loadelf-correct-the-relocation-siz.patch +Patch1021: 0021-cmd-compile-cmd-internal-runtime-change-the-register.patch +Patch1022: 0022-cmd-compile-add-ABI-register-definations-for-loong64.patch +Patch1023: 0023-cmd-compile-cmd-internal-runtime-change-registers-on.patch +Patch1024: 0024-internal-abi-define-loong64-regABI-constants.patch +Patch1025: 0025-cmd-compile-internal-add-register-info-for-loong64-r.patch +Patch1026: 0026-cmd-compile-internal-add-spill-support-for-loong64-r.patch +Patch1027: 0027-cmd-compile-update-loong64-CALL-ops.patch +Patch1028: 0028-runtime-make-duff-device-as-ABIInternal-for-loong64.patch +Patch1029: 0029-runtime-support-regABI-and-add-spill-functions-in-ru.patch +Patch1030: 0030-reflect-runtime-add-reflect-support-for-regABI-on-lo.patch +Patch1031: 0031-internal-bytealg-add-regABI-support-in-bytealg-funct.patch +Patch1032: 0032-runtime-add-regABI-support-in-memclr-and-memmove-fun.patch +Patch1033: 0033-cmd-internal-obj-set-morestack-arg-spilling-and-rega.patch +Patch1034: 0034-cmd-compile-fix-If-lowering-on-loong64.patch +Patch1035: 0035-runtime-internal-syscall-use-ABIInternal-for-Syscall.patch +Patch1036: 0036-cmd-compile-internal-buildcfg-enable-regABI-on-loong.patch +Patch1037: 0037-internal-abi-internal-buildcfg-always-enable-registe.patch +Patch1038: 0038-all-delete-loong64-non-register-ABI-fallback-path.patch +Patch1039: 0039-cmd-internal-obj-loong64-using-LookupABI-to-find-duf.patch +Patch1040: 0040-cmd-internal-cmd-link-unify-the-relocation-naming-st.patch +Patch1041: 0041-cmd-link-internal-loadelf-remove-useless-relocation-.patch +Patch1042: 0042-cmd-link-internal-loadelf-add-additional-relocations.patch +Patch1043: 0043-cmd-link-add-new-relocations-numbered-101-to-109-for.patch +Patch1044: 0044-api-add-new-relocations-numbered-101-to-109-for-loon.patch +Patch1045: 0045-cmd-internal-obj-loong64-remove-unused-register-alia.patch +Patch1046: 0046-cmd-internal-runtime-change-the-LR-parameter-registe.patch +Patch1047: 0047-cmd-runtime-enable-race-detector-on-loong64.patch +Patch1048: 0048-runtime-Mark-race-functions-on-loong64-as-ABInternal.patch +Patch1049: 0049-runtime-delete-on-register-ABI-fallback-path-for-rac.patch +Patch1050: 0050-cmd-dist-update-isUnsupportedVMASize-test-skip.patch +#Patch1051: 0051-runtime-race-update-race_linux_loong64.syso.patch Source100: golang-gdbinit +## git binary diffs are not supported. (Patch1051) +Source102: race_linux_loong64.syso + %description The Go programming language is an open source project to make programmers more productive. @@ -366,7 +333,8 @@ This package includes std library with -race enabled of Go. %prep %autosetup -p1 -n go -cp %{SOURCE1} ./src/runtime/ +cp %{SOURCE1} ./src/runtime/ +cp %{SOURCE102} ./src/runtime/race %build # print out system information @@ -628,6 +596,22 @@ fi %files docs -f go-docs.list %changelog +* Thu Mon 13 2024 chenguoqi - 1.21.10-2 +- add buildmode={plugin,shared} support on linux/loong64 +- asan and msan support on linux/loong64 +- loong64 disassembler support +- add atomic memory access instructions support +- optimize atomic xchg and xchg64 on loong64 +- optimize atomic xadd and xadd64 on loong64 +- optimize atomic And{32,8} and Or{32,8} on loong64 +- asm: recheck jump offset boundary after auto-aligning loop heads +- cmd/link/internal/loadelf: correct the relocation size of R_LARCH_64 +- enable regabi support on loong64 +- add race support on loong64 + +* Thu May 09 2024 mgb01105731 - 1.21.10-1 +- update to 1.21.10 + * Mon Dec 11 2023 Funda Wang - 1.20.12-1 - New version 1.20.12 diff --git a/race_linux_loong64.syso b/race_linux_loong64.syso new file mode 100644 index 0000000000000000000000000000000000000000..6fdb3bad77751956e4c1ee6c0732ddcc3a7fc3dc Binary files /dev/null and b/race_linux_loong64.syso differ