diff --git a/0058-fixup-fix-stack-growth-after-fork-in-runtime.sigfill.patch b/0058-fixup-fix-stack-growth-after-fork-in-runtime.sigfill.patch new file mode 100644 index 0000000000000000000000000000000000000000..762d5901db1455a0d18fb2f6da18e0bcdb529aca --- /dev/null +++ b/0058-fixup-fix-stack-growth-after-fork-in-runtime.sigfill.patch @@ -0,0 +1,26 @@ +From 138bdf6e28384266e4db9bb767933fba6b88d819 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Tue, 5 Jul 2022 20:08:01 +0800 +Subject: [PATCH 58/80] fixup: fix stack growth after fork in + runtime.sigfillset + +Change-Id: Ia5262927514e03672456c9287628e7c286da0de3 +--- + src/runtime/os_linux_loong64.go | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/src/runtime/os_linux_loong64.go b/src/runtime/os_linux_loong64.go +index 4cabd20bcd..c3d7d0080c 100644 +--- a/src/runtime/os_linux_loong64.go ++++ b/src/runtime/os_linux_loong64.go +@@ -41,6 +41,7 @@ func sigdelset(mask *sigset, i int) { + (*mask)[(i-1)/64] &^= 1 << ((uint32(i) - 1) & 63) + } + ++//go:nosplit + func sigfillset(mask *[2]uint64) { + (*mask)[0], (*mask)[1] = ^uint64(0), ^uint64(0) + } +-- +2.27.0 + diff --git a/0059-cmd-compile-remove-the-resultInArg0-register-checks-.patch b/0059-cmd-compile-remove-the-resultInArg0-register-checks-.patch new file mode 100644 index 0000000000000000000000000000000000000000..efd18b4d5df95a374433a0cf49d7a3b6a8e6ddea --- /dev/null +++ b/0059-cmd-compile-remove-the-resultInArg0-register-checks-.patch @@ -0,0 +1,30 @@ +From 21c62284f81da9fa544f1b519706280f084e1410 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Mon, 4 Jul 2022 10:16:12 +0800 +Subject: [PATCH 59/80] cmd/compile: remove the resultInArg0 register checks on + linux/loong64 + +The automatic resultInArg0 register check has been implemented by CL 296010. + +Change-Id: Id0e085ded9aa097bd02593c359a750d938a3aaa6 +--- + src/cmd/compile/internal/loong64/ssa.go | 3 --- + 1 file changed, 3 deletions(-) + +diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go +index 4f3aa6858f..2478963643 100644 +--- a/src/cmd/compile/internal/loong64/ssa.go ++++ b/src/cmd/compile/internal/loong64/ssa.go +@@ -101,9 +101,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { + p.To.Type = obj.TYPE_REG + p.To.Reg = y + case ssa.OpLOONG64MOVVnop: +- if v.Reg() != v.Args[0].Reg() { +- v.Fatalf("input[0] and output not in same register %s", v.LongString()) +- } + // nothing to do + case ssa.OpLoadReg: + if v.Type.IsFlags() { +-- +2.27.0 + diff --git a/0060-runtime-remove-the-fake-mstart-caller-in-systemstack.patch b/0060-runtime-remove-the-fake-mstart-caller-in-systemstack.patch new file mode 100644 index 0000000000000000000000000000000000000000..05e5e10c3c06ba6eb7b46b4ebc7c16e6e4b6e370 --- /dev/null +++ b/0060-runtime-remove-the-fake-mstart-caller-in-systemstack.patch @@ -0,0 +1,39 @@ +From 7ed8c375adb78f9307f484126db7175150c2549a Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Mon, 4 Jul 2022 14:29:52 +0800 +Subject: [PATCH 60/80] runtime: remove the fake mstart caller in systemstack + on linux/loong64 + +ref. CL 288799 + +Change-Id: I0841e75fd515cf6a0d98abe4cffc3f63fc275e0e +--- + src/runtime/asm_loong64.s | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s +index 0cb1c412ef..90d36a3e01 100644 +--- a/src/runtime/asm_loong64.s ++++ b/src/runtime/asm_loong64.s +@@ -142,7 +142,6 @@ TEXT runtime·mcall(SB), NOSPLIT|NOFRAME, $0-8 + MOVV R3, (g_sched+gobuf_sp)(g) + MOVV R1, (g_sched+gobuf_pc)(g) + MOVV R0, (g_sched+gobuf_lr)(g) +- MOVV g, (g_sched+gobuf_g)(g) + + // Switch to m->g0 & its stack, call fn. + MOVV g, R19 +@@ -200,10 +199,6 @@ switch: + MOVV R5, g + JAL runtime·save_g(SB) + MOVV (g_sched+gobuf_sp)(g), R19 +- // make it look like mstart called systemstack on g0, to stop traceback +- ADDV $-8, R19 +- MOVV $runtime·mstart(SB), R6 +- MOVV R6, 0(R19) + MOVV R19, R3 + + // call target function +-- +2.27.0 + diff --git a/0061-runtime-minor-refactoring-of-_rt0_loong64_linux.patch b/0061-runtime-minor-refactoring-of-_rt0_loong64_linux.patch new file mode 100644 index 0000000000000000000000000000000000000000..1bad4274d8c4abb7ed59f7fcf9b76e483a511831 --- /dev/null +++ b/0061-runtime-minor-refactoring-of-_rt0_loong64_linux.patch @@ -0,0 +1,39 @@ +From 6a69d66af4d18949754ab84e586089ceaa0fd17a Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Mon, 25 Jul 2022 15:30:53 +0800 +Subject: [PATCH 61/80] runtime: minor refactoring of _rt0_loong64_linux + +remove meaningless jump and add missing NOFRAME flag + +Change-Id: I1aec68c556615b42042684bd176dfc2a8af094d1 +--- + src/runtime/rt0_linux_loong64.s | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +diff --git a/src/runtime/rt0_linux_loong64.s b/src/runtime/rt0_linux_loong64.s +index 840c8b134e..86885dfa80 100644 +--- a/src/runtime/rt0_linux_loong64.s ++++ b/src/runtime/rt0_linux_loong64.s +@@ -7,16 +7,13 @@ + + #include "textflag.h" + +-TEXT _rt0_loong64_linux(SB),NOSPLIT,$0 +- JMP _main<>(SB) +- +-TEXT _main<>(SB),NOSPLIT|NOFRAME,$0 ++TEXT _rt0_loong64_linux(SB),NOSPLIT|NOFRAME,$0 + // In a statically linked binary, the stack contains argc, + // argv as argc string pointers followed by a NULL, envv as a + // sequence of string pointers followed by a NULL, and auxv. + // There is no TLS base pointer. +- MOVW 0(R3), R4 // argc +- ADDV $8, R3, R5 // argv ++ MOVW 0(R3), R4 // argc ++ ADDV $8, R3, R5 // argv + JMP main(SB) + + TEXT main(SB),NOSPLIT|NOFRAME,$0 +-- +2.27.0 + diff --git a/0062-runtime-fix-gcWriteBarrier-frame-size-on-loong64-mip.patch b/0062-runtime-fix-gcWriteBarrier-frame-size-on-loong64-mip.patch new file mode 100644 index 0000000000000000000000000000000000000000..03c8520c2b1f98579f3550b0ce210abe33b4596e --- /dev/null +++ b/0062-runtime-fix-gcWriteBarrier-frame-size-on-loong64-mip.patch @@ -0,0 +1,55 @@ +From 11712c32174cfa31d9c6f65f630c4e3e6d5b90e7 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Tue, 26 Jul 2022 15:43:23 +0800 +Subject: [PATCH 62/80] runtime: fix gcWriteBarrier frame size on + loong64,mipsx,mips64x + +Change-Id: I5bc7f275135f144b23a7568527fb3b465404386e +--- + src/runtime/asm_loong64.s | 2 +- + src/runtime/asm_mips64x.s | 2 +- + src/runtime/asm_mipsx.s | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s +index 90d36a3e01..16332f7c51 100644 +--- a/src/runtime/asm_loong64.s ++++ b/src/runtime/asm_loong64.s +@@ -639,7 +639,7 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 + // The act of CALLing gcWriteBarrier will clobber R1 (LR). + // It does not clobber any other general-purpose registers, + // but may clobber others (e.g., floating point registers). +-TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$216 ++TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$224 + // Save the registers clobbered by the fast path. + MOVV R19, 208(R3) + MOVV R13, 216(R3) +diff --git a/src/runtime/asm_mips64x.s b/src/runtime/asm_mips64x.s +index d4d2280105..8b525dbaed 100644 +--- a/src/runtime/asm_mips64x.s ++++ b/src/runtime/asm_mips64x.s +@@ -648,7 +648,7 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 + // The act of CALLing gcWriteBarrier will clobber R31 (LR). + // It does not clobber any other general-purpose registers, + // but may clobber others (e.g., floating point registers). +-TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$192 ++TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$200 + // Save the registers clobbered by the fast path. + MOVV R1, 184(R29) + MOVV R2, 192(R29) +diff --git a/src/runtime/asm_mipsx.s b/src/runtime/asm_mipsx.s +index ea7edf20cf..39403b2eef 100644 +--- a/src/runtime/asm_mipsx.s ++++ b/src/runtime/asm_mipsx.s +@@ -641,7 +641,7 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1 + // The act of CALLing gcWriteBarrier will clobber R31 (LR). + // It does not clobber any other general-purpose registers, + // but may clobber others (e.g., floating point registers). +-TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$104 ++TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$108 + // Save the registers clobbered by the fast path. + MOVW R1, 100(R29) + MOVW R2, 104(R29) +-- +2.27.0 + diff --git a/0063-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch b/0063-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch new file mode 100644 index 0000000000000000000000000000000000000000..5703ab9b98ffed278dfd2288fe7cc7dcee01f785 --- /dev/null +++ b/0063-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch @@ -0,0 +1,48 @@ +From 7b7dd663c251ec65bff0df9ab2fbf1020accb7ad Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 3 Aug 2022 17:45:02 +0800 +Subject: [PATCH 63/80] cmd/internal/obj/loong64: remove invalid branch delay + slots + +Change-Id: I222717771019f7aefa547971b2d94ef4677a42c9 +--- + src/cmd/internal/obj/loong64/asm.go | 3 --- + src/cmd/internal/obj/loong64/obj.go | 8 -------- + 2 files changed, 11 deletions(-) + +diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go +index 345366f004..072fc1d9a7 100644 +--- a/src/cmd/internal/obj/loong64/asm.go ++++ b/src/cmd/internal/obj/loong64/asm.go +@@ -429,9 +429,6 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + q.Pos = p.Pos + q.To.Type = obj.TYPE_BRANCH + q.To.SetTarget(q.Link.Link) +- +- c.addnop(p.Link) +- c.addnop(p) + bflag = 1 + } + } +diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go +index abfe67dcbc..0f39c666a3 100644 +--- a/src/cmd/internal/obj/loong64/obj.go ++++ b/src/cmd/internal/obj/loong64/obj.go +@@ -622,14 +622,6 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { + return p + } + +-func (c *ctxt0) addnop(p *obj.Prog) { +- q := c.newprog() +- q.As = ANOOP +- q.Pos = p.Pos +- q.Link = p.Link +- p.Link = q +-} +- + var Linkloong64 = obj.LinkArch{ + Arch: sys.ArchLoong64, + Init: buildop, +-- +2.27.0 + diff --git a/0064-cmd-compile-cmd-internal-obj-rename-loong64-instruct.patch b/0064-cmd-compile-cmd-internal-obj-rename-loong64-instruct.patch new file mode 100644 index 0000000000000000000000000000000000000000..90077d08c24b5cbc00282c11e58443d0d92fe118 --- /dev/null +++ b/0064-cmd-compile-cmd-internal-obj-rename-loong64-instruct.patch @@ -0,0 +1,208 @@ +From 06e185477785e41cfa38a1b4ce0aa84a859830e6 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Tue, 2 Aug 2022 19:35:45 +0800 +Subject: [PATCH 64/80] cmd/compile,cmd/internal/obj: rename loong64 + instructions SQRT{F,D} to FSQRT{S,D} + +The SQRT{F,D} instructions were misleading because they correspond to the mnemonic +FSQRT{S,D} as defined in the LoongArch Architecture Reference Manual. This changes +the assembler to use the same mnemonic as the GNU assembler and the manual. + +LoongArch Architecture Reference Manual: + https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html + +Change-Id: Iaa0b2cd4681f9659f21305fadbbfe4a5f8b9dfc4 +--- + src/cmd/asm/internal/asm/testdata/loong64enc1.s | 4 ++-- + src/cmd/compile/internal/loong64/ssa.go | 4 ++-- + src/cmd/compile/internal/ssa/gen/LOONG64.rules | 4 ++-- + src/cmd/compile/internal/ssa/gen/LOONG64Ops.go | 10 +++++----- + src/cmd/compile/internal/ssa/opGen.go | 12 ++++++------ + src/cmd/compile/internal/ssa/rewriteLOONG64.go | 4 ++-- + src/cmd/internal/obj/loong64/a.out.go | 4 ++-- + src/cmd/internal/obj/loong64/anames.go | 4 ++-- + src/cmd/internal/obj/loong64/asm.go | 8 ++++---- + 9 files changed, 27 insertions(+), 27 deletions(-) + +diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s +index c724cf97f5..b483facee3 100644 +--- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s ++++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s +@@ -191,8 +191,8 @@ lable2: + ABSD F4, F5 // 85081401 + TRUNCDW F4, F5 // 85881a01 + TRUNCFW F4, F5 // 85841a01 +- SQRTF F4, F5 // 85441401 +- SQRTD F4, F5 // 85481401 ++ FSQRTS F4, F5 // 85441401 ++ FSQRTD F4, F5 // 85481401 + + DBAR // 00007238 + NOOP // 00004003 +diff --git a/src/cmd/compile/internal/loong64/ssa.go b/src/cmd/compile/internal/loong64/ssa.go +index 2478963643..cb27389fa6 100644 +--- a/src/cmd/compile/internal/loong64/ssa.go ++++ b/src/cmd/compile/internal/loong64/ssa.go +@@ -370,8 +370,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { + ssa.OpLOONG64MOVDF, + ssa.OpLOONG64NEGF, + ssa.OpLOONG64NEGD, +- ssa.OpLOONG64SQRTD, +- ssa.OpLOONG64SQRTF: ++ ssa.OpLOONG64FSQRTD, ++ ssa.OpLOONG64FSQRTS: + p := s.Prog(v.Op.Asm()) + p.From.Type = obj.TYPE_REG + p.From.Reg = v.Args[0].Reg() +diff --git a/src/cmd/compile/internal/ssa/gen/LOONG64.rules b/src/cmd/compile/internal/ssa/gen/LOONG64.rules +index 4237aea16f..bde427d99c 100644 +--- a/src/cmd/compile/internal/ssa/gen/LOONG64.rules ++++ b/src/cmd/compile/internal/ssa/gen/LOONG64.rules +@@ -120,8 +120,8 @@ + + (Com(64|32|16|8) x) => (NOR (MOVVconst [0]) x) + +-(Sqrt ...) => (SQRTD ...) +-(Sqrt32 ...) => (SQRTF ...) ++(Sqrt ...) => (FSQRTD ...) ++(Sqrt32 ...) => (FSQRTS ...) + + // boolean ops -- booleans are represented with 0=false, 1=true + (AndB ...) => (AND ...) +diff --git a/src/cmd/compile/internal/ssa/gen/LOONG64Ops.go b/src/cmd/compile/internal/ssa/gen/LOONG64Ops.go +index 1f0fec79dc..fbc751bdbd 100644 +--- a/src/cmd/compile/internal/ssa/gen/LOONG64Ops.go ++++ b/src/cmd/compile/internal/ssa/gen/LOONG64Ops.go +@@ -235,11 +235,11 @@ func init() { + {name: "NOR", argLength: 2, reg: gp21, asm: "NOR", commutative: true}, // ^(arg0 | arg1) + {name: "NORconst", argLength: 1, reg: gp11, asm: "NOR", aux: "Int64"}, // ^(arg0 | auxInt) + +- {name: "NEGV", argLength: 1, reg: gp11}, // -arg0 +- {name: "NEGF", argLength: 1, reg: fp11, asm: "NEGF"}, // -arg0, float32 +- {name: "NEGD", argLength: 1, reg: fp11, asm: "NEGD"}, // -arg0, float64 +- {name: "SQRTD", argLength: 1, reg: fp11, asm: "SQRTD"}, // sqrt(arg0), float64 +- {name: "SQRTF", argLength: 1, reg: fp11, asm: "SQRTF"}, // sqrt(arg0), float32 ++ {name: "NEGV", argLength: 1, reg: gp11}, // -arg0 ++ {name: "NEGF", argLength: 1, reg: fp11, asm: "NEGF"}, // -arg0, float32 ++ {name: "NEGD", argLength: 1, reg: fp11, asm: "NEGD"}, // -arg0, float64 ++ {name: "FSQRTD", argLength: 1, reg: fp11, asm: "FSQRTD"}, // sqrt(arg0), float64 ++ {name: "FSQRTS", argLength: 1, reg: fp11, asm: "FSQRTS"}, // sqrt(arg0), float32 + + // shifts + {name: "SLLV", argLength: 2, reg: gp21, asm: "SLLV"}, // arg0 << arg1, shift amount is mod 64 +diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go +index 5aa0f52819..71e080d561 100644 +--- a/src/cmd/compile/internal/ssa/opGen.go ++++ b/src/cmd/compile/internal/ssa/opGen.go +@@ -1657,8 +1657,8 @@ const ( + OpLOONG64NEGV + OpLOONG64NEGF + OpLOONG64NEGD +- OpLOONG64SQRTD +- OpLOONG64SQRTF ++ OpLOONG64FSQRTD ++ OpLOONG64FSQRTS + OpLOONG64SLLV + OpLOONG64SLLVconst + OpLOONG64SRLV +@@ -21977,9 +21977,9 @@ var opcodeTable = [...]opInfo{ + }, + }, + { +- name: "SQRTD", ++ name: "FSQRTD", + argLen: 1, +- asm: loong64.ASQRTD, ++ asm: loong64.AFSQRTD, + reg: regInfo{ + inputs: []inputInfo{ + {0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -21990,9 +21990,9 @@ var opcodeTable = [...]opInfo{ + }, + }, + { +- name: "SQRTF", ++ name: "FSQRTS", + argLen: 1, +- asm: loong64.ASQRTF, ++ asm: loong64.AFSQRTS, + reg: regInfo{ + inputs: []inputInfo{ + {0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go +index e0f0df03e8..8f3c823049 100644 +--- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go ++++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go +@@ -592,10 +592,10 @@ func rewriteValueLOONG64(v *Value) bool { + case OpSlicemask: + return rewriteValueLOONG64_OpSlicemask(v) + case OpSqrt: +- v.Op = OpLOONG64SQRTD ++ v.Op = OpLOONG64FSQRTD + return true + case OpSqrt32: +- v.Op = OpLOONG64SQRTF ++ v.Op = OpLOONG64FSQRTS + return true + case OpStaticCall: + v.Op = OpLOONG64CALLstatic +diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go +index e3857eac04..9846bc9297 100644 +--- a/src/cmd/internal/obj/loong64/a.out.go ++++ b/src/cmd/internal/obj/loong64/a.out.go +@@ -331,8 +331,8 @@ const ( + ASGTU + + ASLL +- ASQRTD +- ASQRTF ++ AFSQRTD ++ AFSQRTS + ASRA + ASRL + ASUB +diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go +index 48d8a78828..715f03a538 100644 +--- a/src/cmd/internal/obj/loong64/anames.go ++++ b/src/cmd/internal/obj/loong64/anames.go +@@ -84,8 +84,8 @@ var Anames = []string{ + "SGT", + "SGTU", + "SLL", +- "SQRTD", +- "SQRTF", ++ "FSQRTD", ++ "FSQRTS", + "SRA", + "SRL", + "SUB", +diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go +index 072fc1d9a7..02e0f362d6 100644 +--- a/src/cmd/internal/obj/loong64/asm.go ++++ b/src/cmd/internal/obj/loong64/asm.go +@@ -906,8 +906,8 @@ func buildop(ctxt *obj.Link) { + opset(AABSD, r0) + opset(ATRUNCDW, r0) + opset(ATRUNCFW, r0) +- opset(ASQRTF, r0) +- opset(ASQRTD, r0) ++ opset(AFSQRTS, r0) ++ opset(AFSQRTD, r0) + + case AMOVVF: + opset(AMOVVD, r0) +@@ -1768,9 +1768,9 @@ func (c *ctxt0) oprrr(a obj.As) uint32 { + case ACMPGTF: + return 0x0c1<<20 | 0x3<<15 // FCMP.SLT.S + +- case ASQRTF: ++ case AFSQRTS: + return 0x4511 << 10 +- case ASQRTD: ++ case AFSQRTD: + return 0x4512 << 10 + + case ADBAR: +-- +2.27.0 + diff --git a/0065-math-implement-Sqrt-in-assembly-for-loong64.patch b/0065-math-implement-Sqrt-in-assembly-for-loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..8a363eadbe09af19d69584f63b1954a088be27f8 --- /dev/null +++ b/0065-math-implement-Sqrt-in-assembly-for-loong64.patch @@ -0,0 +1,74 @@ +From 19d4e4803a9cf690a8109faaf19768b278cb3942 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 3 Aug 2022 14:54:11 +0800 +Subject: [PATCH 65/80] math: implement Sqrt in assembly for loong64 + +Benchmark: +goos: linux +goarch: loong64 + old time/op new time/op delta +BenchmarkSqrtIndirect 81.6ns 21.42ns -73.75% +BenchmarkSqrtLatency 4.004ns 4.004ns 0.00% +BenchmarkSqrtIndirectLatency 59.74ns 10.35ns -82.67% +BenchmarkSqrtGoLatency 64.46ns 64.47ns 0.02% +BenchmarkSqrtPrime 1851ns 1852ns 0.05% + +Change-Id: Icc29b90ea3a2eaff67bc4fbea6d0931f929179c5 +--- + src/math/sqrt_asm.go | 4 ++-- + src/math/sqrt_loong64.s | 12 ++++++++++++ + src/math/sqrt_noasm.go | 4 ++-- + 3 files changed, 16 insertions(+), 4 deletions(-) + create mode 100644 src/math/sqrt_loong64.s + +diff --git a/src/math/sqrt_asm.go b/src/math/sqrt_asm.go +index b9102568ed..fc5aa7752a 100644 +--- a/src/math/sqrt_asm.go ++++ b/src/math/sqrt_asm.go +@@ -2,8 +2,8 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-//go:build 386 || amd64 || arm64 || arm || mips || mipsle || ppc64 || ppc64le || s390x || riscv64 || wasm +-// +build 386 amd64 arm64 arm mips mipsle ppc64 ppc64le s390x riscv64 wasm ++//go:build 386 || amd64 || arm64 || arm || loong64 || mips || mipsle || ppc64 || ppc64le || s390x || riscv64 || wasm ++// +build 386 amd64 arm64 arm loong64 mips mipsle ppc64 ppc64le s390x riscv64 wasm + + package math + +diff --git a/src/math/sqrt_loong64.s b/src/math/sqrt_loong64.s +new file mode 100644 +index 0000000000..e81e734caf +--- /dev/null ++++ b/src/math/sqrt_loong64.s +@@ -0,0 +1,12 @@ ++// Copyright 2022 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++#include "textflag.h" ++ ++// func archSqrt(x float64) float64 ++TEXT ·archSqrt(SB),NOSPLIT,$0 ++ MOVD x+0(FP), F0 ++ FSQRTD F0, F0 ++ MOVD F0, ret+8(FP) ++ RET +diff --git a/src/math/sqrt_noasm.go b/src/math/sqrt_noasm.go +index 7b546b7e8c..6b3de9a953 100644 +--- a/src/math/sqrt_noasm.go ++++ b/src/math/sqrt_noasm.go +@@ -2,8 +2,8 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-//go:build !386 && !amd64 && !arm64 && !arm && !mips && !mipsle && !ppc64 && !ppc64le && !s390x && !riscv64 && !wasm +-// +build !386,!amd64,!arm64,!arm,!mips,!mipsle,!ppc64,!ppc64le,!s390x,!riscv64,!wasm ++//go:build !386 && !amd64 && !arm64 && !arm && !loong64 && !mips && !mipsle && !ppc64 && !ppc64le && !s390x && !riscv64 && !wasm ++// +build !386,!amd64,!arm64,!arm,!loong64,!mips,!mipsle,!ppc64,!ppc64le,!s390x,!riscv64,!wasm + + package math + +-- +2.27.0 + diff --git a/0066-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch b/0066-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch new file mode 100644 index 0000000000000000000000000000000000000000..046b405f20ed35ce0403732f2f8a73e81b1ffbf5 --- /dev/null +++ b/0066-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch @@ -0,0 +1,114 @@ +From 84f81564ed78e791521408369fd9bd3c95ef540d Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Thu, 4 Aug 2022 18:13:59 +0800 +Subject: [PATCH 66/80] cmd/asm: add RDTIME{L,H}.W, RDTIME.D support for + loong64 + +Instruction formats: rdtimeX rd, rj + +The rdtimex instructions are used to read constant frequency timer information, +the stable counter value is written into the general register rd, and the counter +id information is written into the general register rj. + +Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html + +Change-Id: Ida5bbb28316ef70b5f616dac3e6fa6f2e77875b5 +--- + src/cmd/asm/internal/asm/testdata/loong64enc1.s | 4 ++++ + src/cmd/internal/obj/loong64/a.out.go | 5 +++++ + src/cmd/internal/obj/loong64/anames.go | 3 +++ + src/cmd/internal/obj/loong64/asm.go | 16 ++++++++++++++++ + 4 files changed, 28 insertions(+) + +diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s +index b483facee3..1eced6b4df 100644 +--- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s ++++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s +@@ -207,3 +207,7 @@ lable2: + CMPGEF F4, R5 // a090130c + CMPGED F4, R5 // a090230c + CMPEQD F4, R5 // a010220c ++ ++ RDTIMELW R4, R0 // 80600000 ++ RDTIMEHW R4, R0 // 80640000 ++ RDTIMED R4, R5 // 85680000 +diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go +index 9846bc9297..c2825108e5 100644 +--- a/src/cmd/internal/obj/loong64/a.out.go ++++ b/src/cmd/internal/obj/loong64/a.out.go +@@ -386,6 +386,11 @@ const ( + AMOVVF + AMOVVD + ++ // 2.2.10. Other Miscellaneous Instructions ++ ARDTIMELW ++ ARDTIMEHW ++ ARDTIMED ++ + ALAST + + // aliases +diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go +index 715f03a538..10555af6df 100644 +--- a/src/cmd/internal/obj/loong64/anames.go ++++ b/src/cmd/internal/obj/loong64/anames.go +@@ -126,5 +126,8 @@ var Anames = []string{ + "MOVDV", + "MOVVF", + "MOVVD", ++ "RDTIMELW", ++ "RDTIMEHW", ++ "RDTIMED", + "LAST", + } +diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go +index 02e0f362d6..66265690e3 100644 +--- a/src/cmd/internal/obj/loong64/asm.go ++++ b/src/cmd/internal/obj/loong64/asm.go +@@ -336,6 +336,10 @@ var optab = []Optab{ + {ABREAK, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.Loong64, 0}, + {ABREAK, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0}, + ++ {ARDTIMELW, C_REG, C_NONE, C_REG, 62, 4, 0, 0, 0}, ++ {ARDTIMEHW, C_REG, C_NONE, C_REG, 62, 4, 0, 0, 0}, ++ {ARDTIMED, C_REG, C_NONE, C_REG, 62, 4, 0, 0, 0}, ++ + {obj.AUNDEF, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0}, + {obj.APCDATA, C_LCON, C_NONE, C_LCON, 0, 0, 0, 0, 0}, + {obj.APCDATA, C_DCON, C_NONE, C_DCON, 0, 0, 0, 0, 0}, +@@ -1024,6 +1028,9 @@ func buildop(ctxt *obj.Link) { + ANEGW, + ANEGV, + AWORD, ++ ARDTIMELW, ++ ARDTIMEHW, ++ ARDTIMED, + obj.ANOP, + obj.ATEXT, + obj.AUNDEF, +@@ -1595,6 +1602,9 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { + case 61: // word C_DCON + o1 = uint32(c.vregoff(&p.From)) + o2 = uint32(c.vregoff(&p.From) >> 32) ++ ++ case 62: // rdtimex rd, rj ++ o1 = OP_RR(c.oprr(p.As), uint32(p.From.Reg), uint32(p.To.Reg)) + } + + out[0] = o1 +@@ -1794,6 +1804,12 @@ func (c *ctxt0) oprr(a obj.As) uint32 { + return 0x4 << 10 + case ACLZ: + return 0x5 << 10 ++ case ARDTIMELW: ++ return 0x18 << 10 // rdtimel.w ++ case ARDTIMEHW: ++ return 0x19 << 10 // rdtimeh.w ++ case ARDTIMED: ++ return 0x1a << 10 // rdtimed + } + + c.ctxt.Diag("bad rr opcode %v", a) +-- +2.27.0 + diff --git a/0067-runtime-use-StableCounter-implement-cputicks-on-linu.patch b/0067-runtime-use-StableCounter-implement-cputicks-on-linu.patch new file mode 100644 index 0000000000000000000000000000000000000000..de0381182ae47f50975e83955984cb486f74fbaa --- /dev/null +++ b/0067-runtime-use-StableCounter-implement-cputicks-on-linu.patch @@ -0,0 +1,85 @@ +From 13b2d0c751f6291f52219a9d47e787f4a407d5d5 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Fri, 5 Aug 2022 13:32:08 +0800 +Subject: [PATCH 67/80] runtime: use StableCounter implement cputicks() on + linux/loong64 + +In Loongson 3A5000 CPU, each core has a StableCounter, refer to the implementation +in the Linux kernel, use the StableCounter of core 0 as the source of cputicks + +The introduction of StableCounter in chapter 2.2.10.4. of the reference manual: + The LoongArch instruction system defines-a constant frequency timer, whose +main body is-a 64-bit counter called StableCounter. StableCounter is set to 0 +after reset, and then increments by 1 every counting clock cycle. When the count +reaches all 1s, it automatically wraps around to 0 and continues to increment. +At the same time, each timer has a software-configurable globally unique-number, +called Counter ID. The characteristic of the constant frequency timer is that its +timing frequency remains unchanged after reset, no matter how the clock frequency +of the processor core changes. + +Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html + +Change-Id: I160b695a8c0e38ef49b21fb8b41460fd23d9538c +--- + src/runtime/asm_loong64.s | 10 ++++++++++ + src/runtime/cputicks.go | 4 ++-- + src/runtime/os_linux_loong64.go | 7 ------- + 3 files changed, 12 insertions(+), 9 deletions(-) + +diff --git a/src/runtime/asm_loong64.s b/src/runtime/asm_loong64.s +index 16332f7c51..732a5c9583 100644 +--- a/src/runtime/asm_loong64.s ++++ b/src/runtime/asm_loong64.s +@@ -106,6 +106,16 @@ TEXT runtime·jmpdefer(SB), NOSPLIT|NOFRAME, $0-16 + MOVV 0(REGCTXT), R4 + JMP (R4) + ++// In Loongson 3A5000 CPU, each core has a StableCounter, ++// refer to the implementation in the Linux kernel, use ++// the StableCounter of core 0 as the source of cputicks ++// ++// func cputicks() int64 ++TEXT runtime·cputicks(SB),NOSPLIT,$0-8 ++ RDTIMED R0, R4 ++ MOVV R4, ret+0(FP) ++ RET ++ + /* + * go-routine + */ +diff --git a/src/runtime/cputicks.go b/src/runtime/cputicks.go +index 79ddcdc8d6..7c926f4a2b 100644 +--- a/src/runtime/cputicks.go ++++ b/src/runtime/cputicks.go +@@ -2,8 +2,8 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-//go:build !arm && !arm64 && !loong64 && !mips64 && !mips64le && !mips && !mipsle && !wasm +-// +build !arm,!arm64,!loong64,!mips64,!mips64le,!mips,!mipsle,!wasm ++//go:build !arm && !arm64 && !mips64 && !mips64le && !mips && !mipsle && !wasm ++// +build !arm,!arm64,!mips64,!mips64le,!mips,!mipsle,!wasm + + package runtime + +diff --git a/src/runtime/os_linux_loong64.go b/src/runtime/os_linux_loong64.go +index c3d7d0080c..ef6175bfdb 100644 +--- a/src/runtime/os_linux_loong64.go ++++ b/src/runtime/os_linux_loong64.go +@@ -11,13 +11,6 @@ func archauxv(tag, val uintptr) {} + + func osArchInit() {} + +-//go:nosplit +-func cputicks() int64 { +- // Currently cputicks() is used in blocking profiler and to seed fastrand(). +- // nanotime() is a poor approximation of CPU ticks that is enough for the profiler. +- return nanotime() +-} +- + const ( + _SS_DISABLE = 2 + _NSIG = 65 +-- +2.27.0 + diff --git a/0068-debug-elf-add-new-style-LoongArch-reloc-types.patch b/0068-debug-elf-add-new-style-LoongArch-reloc-types.patch new file mode 100644 index 0000000000000000000000000000000000000000..bf67d273a51da81ecdadee6a1b07fc4e4111dbaa --- /dev/null +++ b/0068-debug-elf-add-new-style-LoongArch-reloc-types.patch @@ -0,0 +1,213 @@ +From 57843f342e05845c5bd99fbe7e9f26a241544d3c Mon Sep 17 00:00:00 2001 +From: WANG Xuerui +Date: Wed, 3 Aug 2022 15:46:34 +0800 +Subject: [PATCH 68/80] debug/elf: add new-style LoongArch reloc types + +LoongArch ELF psABI spec update: +https://github.com/loongson/LoongArch-Documentation/pull/57 + +Corresponding binutils implementation: +https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f09482a8747b6fd4c2d59a6a64677d3a3fe1e092 + +For #54222 + +Change-Id: I51e72294205847a69c01d741a3126248f7a7e41c +--- + api/go1.17.txt | 78 ++++++++++++++++++++++++++++++++++++++++++ + src/debug/elf/elf.go | 80 +++++++++++++++++++++++++++++++++++++++++++- + 2 files changed, 157 insertions(+), 1 deletion(-) + +diff --git a/api/go1.17.txt b/api/go1.17.txt +index 0e7fe3c09f..8e4519ea13 100644 +--- a/api/go1.17.txt ++++ b/api/go1.17.txt +@@ -302,3 +302,81 @@ pkg debug/pe, const IMAGE_FILE_MACHINE_LOONGARCH32 = 25138 + pkg debug/pe, const IMAGE_FILE_MACHINE_LOONGARCH32 ideal-int + pkg debug/pe, const IMAGE_FILE_MACHINE_LOONGARCH64 = 25188 + pkg debug/pe, const IMAGE_FILE_MACHINE_LOONGARCH64 ideal-int ++pkg debug/elf, const R_LARCH_32_PCREL = 99 ++pkg debug/elf, const R_LARCH_32_PCREL R_LARCH ++pkg debug/elf, const R_LARCH_ABS64_HI12 = 70 ++pkg debug/elf, const R_LARCH_ABS64_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_ABS64_LO20 = 69 ++pkg debug/elf, const R_LARCH_ABS64_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_ABS_HI20 = 67 ++pkg debug/elf, const R_LARCH_ABS_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_ABS_LO12 = 68 ++pkg debug/elf, const R_LARCH_ABS_LO12 R_LARCH ++pkg debug/elf, const R_LARCH_B16 = 64 ++pkg debug/elf, const R_LARCH_B16 R_LARCH ++pkg debug/elf, const R_LARCH_B21 = 65 ++pkg debug/elf, const R_LARCH_B21 R_LARCH ++pkg debug/elf, const R_LARCH_B26 = 66 ++pkg debug/elf, const R_LARCH_B26 R_LARCH ++pkg debug/elf, const R_LARCH_GNU_VTENTRY = 58 ++pkg debug/elf, const R_LARCH_GNU_VTENTRY R_LARCH ++pkg debug/elf, const R_LARCH_GNU_VTINHERIT = 57 ++pkg debug/elf, const R_LARCH_GNU_VTINHERIT R_LARCH ++pkg debug/elf, const R_LARCH_GOT64_HI12 = 82 ++pkg debug/elf, const R_LARCH_GOT64_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_GOT64_LO20 = 81 ++pkg debug/elf, const R_LARCH_GOT64_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_GOT64_PC_HI12 = 78 ++pkg debug/elf, const R_LARCH_GOT64_PC_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_GOT64_PC_LO20 = 77 ++pkg debug/elf, const R_LARCH_GOT64_PC_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_GOT_HI20 = 79 ++pkg debug/elf, const R_LARCH_GOT_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_GOT_LO12 = 80 ++pkg debug/elf, const R_LARCH_GOT_LO12 R_LARCH ++pkg debug/elf, const R_LARCH_GOT_PC_HI20 = 75 ++pkg debug/elf, const R_LARCH_GOT_PC_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_GOT_PC_LO12 = 76 ++pkg debug/elf, const R_LARCH_GOT_PC_LO12 R_LARCH ++pkg debug/elf, const R_LARCH_PCALA64_HI12 = 74 ++pkg debug/elf, const R_LARCH_PCALA64_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_PCALA64_LO20 = 73 ++pkg debug/elf, const R_LARCH_PCALA64_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_PCALA_HI20 = 71 ++pkg debug/elf, const R_LARCH_PCALA_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_PCALA_LO12 = 72 ++pkg debug/elf, const R_LARCH_PCALA_LO12 R_LARCH ++pkg debug/elf, const R_LARCH_RELAX = 100 ++pkg debug/elf, const R_LARCH_RELAX R_LARCH ++pkg debug/elf, const R_LARCH_TLS_GD_HI20 = 98 ++pkg debug/elf, const R_LARCH_TLS_GD_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_GD_PC_HI20 = 97 ++pkg debug/elf, const R_LARCH_TLS_GD_PC_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE64_HI12 = 94 ++pkg debug/elf, const R_LARCH_TLS_IE64_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE64_LO20 = 93 ++pkg debug/elf, const R_LARCH_TLS_IE64_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE64_PC_HI12 = 90 ++pkg debug/elf, const R_LARCH_TLS_IE64_PC_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE64_PC_LO20 = 89 ++pkg debug/elf, const R_LARCH_TLS_IE64_PC_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE_HI20 = 91 ++pkg debug/elf, const R_LARCH_TLS_IE_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE_LO12 = 92 ++pkg debug/elf, const R_LARCH_TLS_IE_LO12 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE_PC_HI20 = 87 ++pkg debug/elf, const R_LARCH_TLS_IE_PC_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_IE_PC_LO12 = 88 ++pkg debug/elf, const R_LARCH_TLS_IE_PC_LO12 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_LD_HI20 = 96 ++pkg debug/elf, const R_LARCH_TLS_LD_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_LD_PC_HI20 = 95 ++pkg debug/elf, const R_LARCH_TLS_LD_PC_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_LE64_HI12 = 86 ++pkg debug/elf, const R_LARCH_TLS_LE64_HI12 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_LE64_LO20 = 85 ++pkg debug/elf, const R_LARCH_TLS_LE64_LO20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_LE_HI20 = 83 ++pkg debug/elf, const R_LARCH_TLS_LE_HI20 R_LARCH ++pkg debug/elf, const R_LARCH_TLS_LE_LO12 = 84 ++pkg debug/elf, const R_LARCH_TLS_LE_LO12 R_LARCH +diff --git a/src/debug/elf/elf.go b/src/debug/elf/elf.go +index 972a75e1e6..4603002cdf 100644 +--- a/src/debug/elf/elf.go ++++ b/src/debug/elf/elf.go +@@ -2152,7 +2152,7 @@ var rmipsStrings = []intName{ + func (i R_MIPS) String() string { return stringName(uint32(i), rmipsStrings, false) } + func (i R_MIPS) GoString() string { return stringName(uint32(i), rmipsStrings, true) } + +-// Relocation types for LARCH. ++// Relocation types for LoongArch. + type R_LARCH int + + const ( +@@ -2206,6 +2206,45 @@ const ( + R_LARCH_SUB24 R_LARCH = 54 + R_LARCH_SUB32 R_LARCH = 55 + R_LARCH_SUB64 R_LARCH = 56 ++ R_LARCH_GNU_VTINHERIT R_LARCH = 57 ++ R_LARCH_GNU_VTENTRY R_LARCH = 58 ++ R_LARCH_B16 R_LARCH = 64 ++ R_LARCH_B21 R_LARCH = 65 ++ R_LARCH_B26 R_LARCH = 66 ++ R_LARCH_ABS_HI20 R_LARCH = 67 ++ R_LARCH_ABS_LO12 R_LARCH = 68 ++ R_LARCH_ABS64_LO20 R_LARCH = 69 ++ R_LARCH_ABS64_HI12 R_LARCH = 70 ++ R_LARCH_PCALA_HI20 R_LARCH = 71 ++ R_LARCH_PCALA_LO12 R_LARCH = 72 ++ R_LARCH_PCALA64_LO20 R_LARCH = 73 ++ R_LARCH_PCALA64_HI12 R_LARCH = 74 ++ R_LARCH_GOT_PC_HI20 R_LARCH = 75 ++ R_LARCH_GOT_PC_LO12 R_LARCH = 76 ++ R_LARCH_GOT64_PC_LO20 R_LARCH = 77 ++ R_LARCH_GOT64_PC_HI12 R_LARCH = 78 ++ R_LARCH_GOT_HI20 R_LARCH = 79 ++ R_LARCH_GOT_LO12 R_LARCH = 80 ++ R_LARCH_GOT64_LO20 R_LARCH = 81 ++ R_LARCH_GOT64_HI12 R_LARCH = 82 ++ R_LARCH_TLS_LE_HI20 R_LARCH = 83 ++ R_LARCH_TLS_LE_LO12 R_LARCH = 84 ++ R_LARCH_TLS_LE64_LO20 R_LARCH = 85 ++ R_LARCH_TLS_LE64_HI12 R_LARCH = 86 ++ R_LARCH_TLS_IE_PC_HI20 R_LARCH = 87 ++ R_LARCH_TLS_IE_PC_LO12 R_LARCH = 88 ++ R_LARCH_TLS_IE64_PC_LO20 R_LARCH = 89 ++ R_LARCH_TLS_IE64_PC_HI12 R_LARCH = 90 ++ R_LARCH_TLS_IE_HI20 R_LARCH = 91 ++ R_LARCH_TLS_IE_LO12 R_LARCH = 92 ++ R_LARCH_TLS_IE64_LO20 R_LARCH = 93 ++ R_LARCH_TLS_IE64_HI12 R_LARCH = 94 ++ R_LARCH_TLS_LD_PC_HI20 R_LARCH = 95 ++ R_LARCH_TLS_LD_HI20 R_LARCH = 96 ++ R_LARCH_TLS_GD_PC_HI20 R_LARCH = 97 ++ R_LARCH_TLS_GD_HI20 R_LARCH = 98 ++ R_LARCH_32_PCREL R_LARCH = 99 ++ R_LARCH_RELAX R_LARCH = 100 + ) + + var rlarchStrings = []intName{ +@@ -2259,6 +2298,45 @@ var rlarchStrings = []intName{ + {54, "R_LARCH_SUB24"}, + {55, "R_LARCH_SUB32"}, + {56, "R_LARCH_SUB64"}, ++ {57, "R_LARCH_GNU_VTINHERIT"}, ++ {58, "R_LARCH_GNU_VTENTRY"}, ++ {64, "R_LARCH_B16"}, ++ {65, "R_LARCH_B21"}, ++ {66, "R_LARCH_B26"}, ++ {67, "R_LARCH_ABS_HI20"}, ++ {68, "R_LARCH_ABS_LO12"}, ++ {69, "R_LARCH_ABS64_LO20"}, ++ {70, "R_LARCH_ABS64_HI12"}, ++ {71, "R_LARCH_PCALA_HI20"}, ++ {72, "R_LARCH_PCALA_LO12"}, ++ {73, "R_LARCH_PCALA64_LO20"}, ++ {74, "R_LARCH_PCALA64_HI12"}, ++ {75, "R_LARCH_GOT_PC_HI20"}, ++ {76, "R_LARCH_GOT_PC_LO12"}, ++ {77, "R_LARCH_GOT64_PC_LO20"}, ++ {78, "R_LARCH_GOT64_PC_HI12"}, ++ {79, "R_LARCH_GOT_HI20"}, ++ {80, "R_LARCH_GOT_LO12"}, ++ {81, "R_LARCH_GOT64_LO20"}, ++ {82, "R_LARCH_GOT64_HI12"}, ++ {83, "R_LARCH_TLS_LE_HI20"}, ++ {84, "R_LARCH_TLS_LE_LO12"}, ++ {85, "R_LARCH_TLS_LE64_LO20"}, ++ {86, "R_LARCH_TLS_LE64_HI12"}, ++ {87, "R_LARCH_TLS_IE_PC_HI20"}, ++ {88, "R_LARCH_TLS_IE_PC_LO12"}, ++ {89, "R_LARCH_TLS_IE64_PC_LO20"}, ++ {90, "R_LARCH_TLS_IE64_PC_HI12"}, ++ {91, "R_LARCH_TLS_IE_HI20"}, ++ {92, "R_LARCH_TLS_IE_LO12"}, ++ {93, "R_LARCH_TLS_IE64_LO20"}, ++ {94, "R_LARCH_TLS_IE64_HI12"}, ++ {95, "R_LARCH_TLS_LD_PC_HI20"}, ++ {96, "R_LARCH_TLS_LD_HI20"}, ++ {97, "R_LARCH_TLS_GD_PC_HI20"}, ++ {98, "R_LARCH_TLS_GD_HI20"}, ++ {99, "R_LARCH_32_PCREL"}, ++ {100, "R_LARCH_RELAX"}, + } + + func (i R_LARCH) String() string { return stringName(uint32(i), rlarchStrings, false) } +-- +2.27.0 + diff --git a/0069-cmd-link-recognize-the-new-R_LARCH_32_PCREL-type-on-.patch b/0069-cmd-link-recognize-the-new-R_LARCH_32_PCREL-type-on-.patch new file mode 100644 index 0000000000000000000000000000000000000000..95a2d82234a291ac4d177c51c84f8843c08884be --- /dev/null +++ b/0069-cmd-link-recognize-the-new-R_LARCH_32_PCREL-type-on-.patch @@ -0,0 +1,39 @@ +From 96c357246182237f68ac0422c77b37e62981fa9d Mon Sep 17 00:00:00 2001 +From: WANG Xuerui +Date: Wed, 3 Aug 2022 19:43:49 +0800 +Subject: [PATCH 69/80] cmd/link: recognize the new R_LARCH_32_PCREL type on + loong64 + +Due to the latest binutils change [1], at least for certain 32-bit +relocs in .eh_frame section, this new type of relocation record is +emitted, leading to breakage on systems with bleeding-edge toolchain +when trying to link with object(s) with such new-style relocs. + +Simply treating it the same as the existing reloc types seems enough. + +Fixes #54222 + +[1]: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f09482a8747b6fd4c2d59a6a64677d3a3fe1e092 + +Change-Id: I876d6711d5d4a674bead37e57f9503f1622d1136 +--- + src/cmd/link/internal/loadelf/ldelf.go | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go +index d677bff3c9..fbdace587f 100644 +--- a/src/cmd/link/internal/loadelf/ldelf.go ++++ b/src/cmd/link/internal/loadelf/ldelf.go +@@ -1004,7 +1004,8 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { + LOONG64 | uint32(elf.R_LARCH_MARK_LA)<<16, + LOONG64 | uint32(elf.R_LARCH_SOP_POP_32_S_0_10_10_16_S2)<<16, + LOONG64 | uint32(elf.R_LARCH_64)<<16, +- LOONG64 | uint32(elf.R_LARCH_MARK_PCREL)<<16: ++ LOONG64 | uint32(elf.R_LARCH_MARK_PCREL)<<16, ++ LOONG64 | uint32(elf.R_LARCH_32_PCREL)<<16: + return 4, 4, nil + + case S390X | uint32(elf.R_390_8)<<16: +-- +2.27.0 + diff --git a/0070-runtime-fix-runtime.usleep-on-linux-loong64.patch b/0070-runtime-fix-runtime.usleep-on-linux-loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..c6195e603ca63cecf693c34a11955845f01073d6 --- /dev/null +++ b/0070-runtime-fix-runtime.usleep-on-linux-loong64.patch @@ -0,0 +1,55 @@ +From bea2bb67e739769d73addfd5953069f90f284692 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 24 Aug 2022 02:44:22 +0800 +Subject: [PATCH 70/80] runtime: fix runtime.usleep() on linux/loong64 + +fix usleep by correctly setting nanoseconds parameter + +Change-Id: Ia4cfdea3df8834e6260527ce8e6e894a0547070f +--- + src/runtime/sys_linux_loong64.s | 27 +++++++++++++++------------ + 1 file changed, 15 insertions(+), 12 deletions(-) + +diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s +index 1496d922c5..1abc5b6cda 100644 +--- a/src/runtime/sys_linux_loong64.s ++++ b/src/runtime/sys_linux_loong64.s +@@ -126,20 +126,23 @@ TEXT runtime·pipe2(SB),NOSPLIT|NOFRAME,$0-20 + RET + + TEXT runtime·usleep(SB),NOSPLIT,$16-4 +- MOVWU usec+0(FP), R6 +- MOVV R6, R5 +- MOVW $1000000, R4 +- DIVVU R4, R6, R6 +- MOVV R6, 8(R3) +- MOVW $1000, R4 +- MULVU R6, R4, R4 +- SUBVU R4, R5 +- MOVV R5, 16(R3) ++ MOVWU usec+0(FP), R6 ++ MOVV $1000, R4 ++ MULVU R4, R6, R6 ++ MOVV $1000000000, R4 ++ ++ // ts->tv_sec ++ DIVVU R4, R6, R5 ++ MOVV R5, 8(R3) ++ ++ // ts->tv_nsec ++ REMVU R4, R6, R5 ++ MOVV R5, 16(R3) + + // nanosleep(&ts, 0) +- ADDV $8, R3, R4 +- MOVW $0, R5 +- MOVV $SYS_nanosleep, R11 ++ ADDV $8, R3, R4 ++ MOVV R0, R5 ++ MOVV $SYS_nanosleep, R11 + SYSCALL + RET + +-- +2.27.0 + diff --git a/0071-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch b/0071-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..928b433978dad12da4ae10f693708d4929ec9c76 --- /dev/null +++ b/0071-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch @@ -0,0 +1,30 @@ +From b49a4a13b999228b80d76c39c4ed53a1c5b94cca Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Wed, 24 Aug 2022 09:22:36 +0800 +Subject: [PATCH 71/80] cmd/internal/obj: remove redundant cnames on loong64 + +Change-Id: I5aa6328a12e74b2801ab60b5a5bb8571d382d5ef +--- + src/cmd/internal/obj/loong64/cnames.go | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/cmd/internal/obj/loong64/cnames.go b/src/cmd/internal/obj/loong64/cnames.go +index d6d3091757..e757e242ee 100644 +--- a/src/cmd/internal/obj/loong64/cnames.go ++++ b/src/cmd/internal/obj/loong64/cnames.go +@@ -4,11 +4,11 @@ + + package loong64 + ++// This order should be strictly consistent to that in a.out.go + var cnames0 = []string{ + "NONE", + "REG", + "FREG", +- "FCREG", + "FCSRREG", + "FCCREG", + "ZCON", +-- +2.27.0 + diff --git a/0072-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch b/0072-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..876e94ea2b86390a194128e44dc5034d1da86132 --- /dev/null +++ b/0072-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch @@ -0,0 +1,113 @@ +From 11b9b873bdbee7217acc179b1ea5681f3a98e060 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Fri, 26 Aug 2022 14:01:27 +0800 +Subject: [PATCH 72/80] runtime: save/fetch g register during VDSO on loong64 + +Change-Id: Iaffa8cce4f0ef8ef74225c355ec3c20ed238025f +--- + src/runtime/signal_unix.go | 2 +- + src/runtime/sys_linux_loong64.s | 44 ++++++++++++++++++++++++++++++--- + 2 files changed, 41 insertions(+), 5 deletions(-) + +diff --git a/src/runtime/signal_unix.go b/src/runtime/signal_unix.go +index 33c3f2ee65..e1acb30a80 100644 +--- a/src/runtime/signal_unix.go ++++ b/src/runtime/signal_unix.go +@@ -382,7 +382,7 @@ func preemptM(mp *m) { + //go:nosplit + func sigFetchG(c *sigctxt) *g { + switch GOARCH { +- case "arm", "arm64", "ppc64", "ppc64le": ++ case "arm", "arm64", "loong64", "ppc64", "ppc64le": + if !iscgo && inVDSOPage(c.sigpc()) { + // When using cgo, we save the g on TLS and load it from there + // in sigtramp. Just use that. +diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s +index 1abc5b6cda..8947797698 100644 +--- a/src/runtime/sys_linux_loong64.s ++++ b/src/runtime/sys_linux_loong64.s +@@ -13,7 +13,9 @@ + #include "go_tls.h" + #include "textflag.h" + +-#define AT_FDCWD -100 ++#define AT_FDCWD -100 ++#define CLOCK_REALTIME 0 ++#define CLOCK_MONOTONIC 1 + + #define SYS_exit 93 + #define SYS_read 63 +@@ -206,7 +208,7 @@ TEXT runtime·mincore(SB),NOSPLIT|NOFRAME,$0-28 + RET + + // func walltime() (sec int64, nsec int32) +-TEXT runtime·walltime(SB),NOSPLIT,$16-12 ++TEXT runtime·walltime(SB),NOSPLIT,$24-12 + MOVV R3, R23 // R23 is unchanged by C code + MOVV R3, R25 + +@@ -236,12 +238,29 @@ noswitch: + AND $~15, R25 // Align for C code + MOVV R25, R3 + +- MOVW $0, R4 // CLOCK_REALTIME=0 ++ MOVW $CLOCK_REALTIME, R4 + MOVV $0(R3), R5 + + MOVV runtime·vdsoClockgettimeSym(SB), R20 + BEQ R20, fallback + ++ // Store g on gsignal's stack, see sys_linux_arm64.s for detail ++ MOVBU runtime·iscgo(SB), R25 ++ BNE R0, R25, nosaveg ++ ++ MOVV m_gsignal(R24), R25 // g.m.gsignal ++ BEQ R25, nosaveg ++ BEQ g, R25, nosaveg ++ ++ MOVV (g_stack+stack_lo)(R25), R25 // g.m.gsignal.stack.lo ++ MOVV g, (R25) ++ ++ JAL (R20) ++ ++ MOVV R0, (R25) ++ JMP finish ++ ++nosaveg: + JAL (R20) + + finish: +@@ -298,12 +317,29 @@ noswitch: + AND $~15, R25 // Align for C code + MOVV R25, R3 + +- MOVW $1, R4 // CLOCK_MONOTONIC=1 ++ MOVW $CLOCK_MONOTONIC, R4 + MOVV $0(R3), R5 + + MOVV runtime·vdsoClockgettimeSym(SB), R20 + BEQ R20, fallback + ++ // Store g on gsignal's stack, see sys_linux_arm64.s for detail ++ MOVBU runtime·iscgo(SB), R25 ++ BNE R0, R25, nosaveg ++ ++ MOVV m_gsignal(R24), R25 // g.m.gsignal ++ BEQ R25, nosaveg ++ BEQ g, R25, nosaveg ++ ++ MOVV (g_stack+stack_lo)(R25), R25 // g.m.gsignal.stack.lo ++ MOVV g, (R25) ++ ++ JAL (R20) ++ ++ MOVV R0, (R25) ++ JMP finish ++ ++nosaveg: + JAL (R20) + + finish: +-- +2.27.0 + diff --git a/0073-runtime-save-restore-callee-saved-registers-in-loong.patch b/0073-runtime-save-restore-callee-saved-registers-in-loong.patch new file mode 100644 index 0000000000000000000000000000000000000000..d9e34da6c4bbe58879e84c6768d58d08091d1218 --- /dev/null +++ b/0073-runtime-save-restore-callee-saved-registers-in-loong.patch @@ -0,0 +1,222 @@ +From 7cb947a15997b2d6f27ee3c35be910a3e41e2fac Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Fri, 26 Aug 2022 14:05:31 +0800 +Subject: [PATCH 73/80] runtime: save/restore callee-saved registers in + loong64's sigtramp + +Loong64's R22-R31 and F24-F31 are callee saved registers, which +should be saved in the beginning of sigtramp, and restored at +the end. + +In reviewing comments about sigtramp in sys_linux_arm64 it was +noted that a previous issue in arm64 due to missing callee save +registers could also be a problem on loong64, so code was added +to save and restore those. + +Change-Id: I3ae58fe8a64ddb052d0a89b63e82c01ad328dd15 +--- + src/runtime/cgo/abi_loong64.h | 60 +++++++++++++++++++++++++++++++++ + src/runtime/cgo/asm_loong64.s | 55 ++++++++---------------------- + src/runtime/sys_linux_loong64.s | 32 ++++++++++++------ + 3 files changed, 96 insertions(+), 51 deletions(-) + create mode 100644 src/runtime/cgo/abi_loong64.h + +diff --git a/src/runtime/cgo/abi_loong64.h b/src/runtime/cgo/abi_loong64.h +new file mode 100644 +index 0000000000..b10d83732f +--- /dev/null ++++ b/src/runtime/cgo/abi_loong64.h +@@ -0,0 +1,60 @@ ++// Copyright 2022 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++// Macros for transitioning from the host ABI to Go ABI0. ++// ++// These macros save and restore the callee-saved registers ++// from the stack, but they don't adjust stack pointer, so ++// the user should prepare stack space in advance. ++// SAVE_R22_TO_R31(offset) saves R22 ~ R31 to the stack space ++// of ((offset)+0*8)(R3) ~ ((offset)+9*8)(R3). ++// ++// SAVE_F24_TO_F31(offset) saves F24 ~ F31 to the stack space ++// of ((offset)+0*8)(R3) ~ ((offset)+7*8)(R3). ++// ++// Note: g is R22 ++ ++#define SAVE_R22_TO_R31(offset) \ ++ MOVV g, ((offset)+(0*8))(R3) \ ++ MOVV R23, ((offset)+(1*8))(R3) \ ++ MOVV R24, ((offset)+(2*8))(R3) \ ++ MOVV R25, ((offset)+(3*8))(R3) \ ++ MOVV R26, ((offset)+(4*8))(R3) \ ++ MOVV R27, ((offset)+(5*8))(R3) \ ++ MOVV R28, ((offset)+(6*8))(R3) \ ++ MOVV R29, ((offset)+(7*8))(R3) \ ++ MOVV R30, ((offset)+(8*8))(R3) \ ++ MOVV R31, ((offset)+(9*8))(R3) ++ ++#define SAVE_F24_TO_F31(offset) \ ++ MOVD F24, ((offset)+(0*8))(R3) \ ++ MOVD F25, ((offset)+(1*8))(R3) \ ++ MOVD F26, ((offset)+(2*8))(R3) \ ++ MOVD F27, ((offset)+(3*8))(R3) \ ++ MOVD F28, ((offset)+(4*8))(R3) \ ++ MOVD F29, ((offset)+(5*8))(R3) \ ++ MOVD F30, ((offset)+(6*8))(R3) \ ++ MOVD F31, ((offset)+(7*8))(R3) ++ ++#define RESTORE_R22_TO_R31(offset) \ ++ MOVV ((offset)+(0*8))(R3), g \ ++ MOVV ((offset)+(1*8))(R3), R23 \ ++ MOVV ((offset)+(2*8))(R3), R24 \ ++ MOVV ((offset)+(3*8))(R3), R25 \ ++ MOVV ((offset)+(4*8))(R3), R26 \ ++ MOVV ((offset)+(5*8))(R3), R27 \ ++ MOVV ((offset)+(6*8))(R3), R28 \ ++ MOVV ((offset)+(7*8))(R3), R29 \ ++ MOVV ((offset)+(8*8))(R3), R30 \ ++ MOVV ((offset)+(9*8))(R3), R31 ++ ++#define RESTORE_F24_TO_F31(offset) \ ++ MOVD ((offset)+(0*8))(R3), F24 \ ++ MOVD ((offset)+(1*8))(R3), F25 \ ++ MOVD ((offset)+(2*8))(R3), F26 \ ++ MOVD ((offset)+(3*8))(R3), F27 \ ++ MOVD ((offset)+(4*8))(R3), F28 \ ++ MOVD ((offset)+(5*8))(R3), F29 \ ++ MOVD ((offset)+(6*8))(R3), F30 \ ++ MOVD ((offset)+(7*8))(R3), F31 +diff --git a/src/runtime/cgo/asm_loong64.s b/src/runtime/cgo/asm_loong64.s +index aa5a4ca200..d3dfd02c07 100644 +--- a/src/runtime/cgo/asm_loong64.s ++++ b/src/runtime/cgo/asm_loong64.s +@@ -5,6 +5,7 @@ + // +build loong64 + + #include "textflag.h" ++#include "abi_loong64.h" + + // Called by C code generated by cmd/cgo. + // func crosscall2(fn, a unsafe.Pointer, n int32, ctxt uintptr) +@@ -18,52 +19,24 @@ TEXT crosscall2(SB),NOSPLIT|NOFRAME,$0 + * first arg. + */ + +- ADDV $(-8*22), R3 +- MOVV R4, (8*1)(R3) // fn unsafe.Pointer +- MOVV R5, (8*2)(R3) // a unsafe.Pointer +- MOVV R7, (8*3)(R3) // ctxt uintptr +- MOVV R23, (8*4)(R3) +- MOVV R24, (8*5)(R3) +- MOVV R25, (8*6)(R3) +- MOVV R26, (8*7)(R3) +- MOVV R27, (8*8)(R3) +- MOVV R28, (8*9)(R3) +- MOVV R29, (8*10)(R3) +- MOVV R30, (8*11)(R3) +- MOVV g, (8*12)(R3) +- MOVV R1, (8*13)(R3) +- MOVD F24, (8*14)(R3) +- MOVD F25, (8*15)(R3) +- MOVD F26, (8*16)(R3) +- MOVD F27, (8*17)(R3) +- MOVD F28, (8*18)(R3) +- MOVD F29, (8*19)(R3) +- MOVD F30, (8*20)(R3) +- MOVD F31, (8*21)(R3) ++ ADDV $(-23*8), R3 ++ MOVV R4, (1*8)(R3) // fn unsafe.Pointer ++ MOVV R5, (2*8)(R3) // a unsafe.Pointer ++ MOVV R7, (3*8)(R3) // ctxt uintptr ++ ++ SAVE_R22_TO_R31((4*8)) ++ SAVE_F24_TO_F31((14*8)) ++ MOVV R1, (22*8)(R3) + + // Initialize Go ABI environment + JAL runtime·load_g(SB) + + JAL runtime·cgocallback(SB) + +- MOVV (8*4)(R3), R23 +- MOVV (8*5)(R3), R24 +- MOVV (8*6)(R3), R25 +- MOVV (8*7)(R3), R26 +- MOVV (8*8)(R3), R27 +- MOVV (8*9)(R3), R28 +- MOVV (8*10)(R3), R29 +- MOVV (8*11)(R3), R30 +- MOVV (8*12)(R3), g +- MOVV (8*13)(R3), R1 +- MOVD (8*14)(R3), F24 +- MOVD (8*15)(R3), F25 +- MOVD (8*16)(R3), F26 +- MOVD (8*17)(R3), F27 +- MOVD (8*18)(R3), F28 +- MOVD (8*19)(R3), F29 +- MOVD (8*20)(R3), F30 +- MOVD (8*21)(R3), F31 +- ADDV $(8*22), R3 ++ RESTORE_R22_TO_R31((4*8)) ++ RESTORE_F24_TO_F31((14*8)) ++ MOVV (22*8)(R3), R1 ++ ++ ADDV $(23*8), R3 + + RET +diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s +index 8947797698..85d704e13e 100644 +--- a/src/runtime/sys_linux_loong64.s ++++ b/src/runtime/sys_linux_loong64.s +@@ -12,6 +12,7 @@ + #include "go_asm.h" + #include "go_tls.h" + #include "textflag.h" ++#include "cgo/abi_loong64.h" + + #define AT_FDCWD -100 + #define CLOCK_REALTIME 0 +@@ -400,18 +401,29 @@ TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 + JAL (R20) + RET + +-TEXT runtime·sigtramp(SB),NOSPLIT,$64 ++TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$182 ++ MOVW R4, (1*8)(R3) ++ MOVV R5, (2*8)(R3) ++ MOVV R6, (3*8)(R3) ++ ++ // Save callee-save registers in the case of signal forwarding. ++ // Please refer to https://golang.org/issue/31827 . ++ SAVE_R22_TO_R31((4*8)) ++ SAVE_F24_TO_F31((14*8)) ++ + // this might be called in external code context, + // where g is not set. +- MOVB runtime·iscgo(SB), R19 +- BEQ R19, 2(PC) +- JAL runtime·load_g(SB) +- +- MOVW R4, 8(R3) +- MOVV R5, 16(R3) +- MOVV R6, 24(R3) +- MOVV $runtime·sigtrampgo(SB), R19 +- JAL (R19) ++ MOVB runtime·iscgo(SB), R4 ++ BEQ R4, 2(PC) ++ JAL runtime·load_g(SB) ++ ++ MOVV $runtime·sigtrampgo(SB), R4 ++ JAL (R4) ++ ++ // Restore callee-save registers. ++ RESTORE_R22_TO_R31((4*8)) ++ RESTORE_F24_TO_F31((14*8)) ++ + RET + + TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0 +-- +2.27.0 + diff --git a/0074-runtime-add-comment-for-sys_linux_loong64.patch b/0074-runtime-add-comment-for-sys_linux_loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..137fb785d585f6b639d29535cce203518c064e43 --- /dev/null +++ b/0074-runtime-add-comment-for-sys_linux_loong64.patch @@ -0,0 +1,211 @@ +From ca269f550751ed8c0ee2a34f00cc92223699bc00 Mon Sep 17 00:00:00 2001 +From: Guoqi Chen +Date: Fri, 26 Aug 2022 14:19:06 +0800 +Subject: [PATCH 74/80] runtime: add comment for sys_linux_loong64 + +Change-Id: I617d6d788cb213c1405f81d9f689fd6846ee105a +--- + src/runtime/sys_linux_loong64.s | 27 +++++++++++++++++++++++++-- + 1 file changed, 25 insertions(+), 2 deletions(-) + +diff --git a/src/runtime/sys_linux_loong64.s b/src/runtime/sys_linux_loong64.s +index 85d704e13e..f062cdec3f 100644 +--- a/src/runtime/sys_linux_loong64.s ++++ b/src/runtime/sys_linux_loong64.s +@@ -50,6 +50,7 @@ + #define SYS_brk 214 + #define SYS_pipe2 59 + ++// func exit(code int32) + TEXT runtime·exit(SB),NOSPLIT|NOFRAME,$0-4 + MOVW code+0(FP), R4 + MOVV $SYS_exit_group, R11 +@@ -69,6 +70,7 @@ TEXT runtime·exitThread(SB),NOSPLIT|NOFRAME,$0-8 + SYSCALL + JMP 0(PC) + ++// func open(name *byte, mode, perm int32) int32 + TEXT runtime·open(SB),NOSPLIT|NOFRAME,$0-20 + MOVW $AT_FDCWD, R4 // AT_FDCWD, so this acts like open + MOVV name+0(FP), R5 +@@ -82,6 +84,7 @@ TEXT runtime·open(SB),NOSPLIT|NOFRAME,$0-20 + MOVW R4, ret+16(FP) + RET + ++// func closefd(fd int32) int32 + TEXT runtime·closefd(SB),NOSPLIT|NOFRAME,$0-12 + MOVW fd+0(FP), R4 + MOVV $SYS_close, R11 +@@ -92,6 +95,7 @@ TEXT runtime·closefd(SB),NOSPLIT|NOFRAME,$0-12 + MOVW R4, ret+8(FP) + RET + ++// func write1(fd uintptr, p unsafe.Pointer, n int32) int32 + TEXT runtime·write1(SB),NOSPLIT|NOFRAME,$0-28 + MOVV fd+0(FP), R4 + MOVV p+8(FP), R5 +@@ -101,6 +105,7 @@ TEXT runtime·write1(SB),NOSPLIT|NOFRAME,$0-28 + MOVW R4, ret+24(FP) + RET + ++// func read(fd int32, p unsafe.Pointer, n int32) int32 + TEXT runtime·read(SB),NOSPLIT|NOFRAME,$0-28 + MOVW fd+0(FP), R4 + MOVV p+8(FP), R5 +@@ -128,6 +133,7 @@ TEXT runtime·pipe2(SB),NOSPLIT|NOFRAME,$0-20 + MOVW R4, errno+16(FP) + RET + ++// func usleep(usec uint32) + TEXT runtime·usleep(SB),NOSPLIT,$16-4 + MOVWU usec+0(FP), R6 + MOVV $1000, R4 +@@ -149,12 +155,14 @@ TEXT runtime·usleep(SB),NOSPLIT,$16-4 + SYSCALL + RET + ++// func gettid() uint32 + TEXT runtime·gettid(SB),NOSPLIT,$0-4 + MOVV $SYS_gettid, R11 + SYSCALL + MOVW R4, ret+0(FP) + RET + ++// func raise(sig uint32) + TEXT runtime·raise(SB),NOSPLIT|NOFRAME,$0 + MOVV $SYS_getpid, R11 + SYSCALL +@@ -168,6 +176,7 @@ TEXT runtime·raise(SB),NOSPLIT|NOFRAME,$0 + SYSCALL + RET + ++// func raiseproc(sig uint32) + TEXT runtime·raiseproc(SB),NOSPLIT|NOFRAME,$0 + MOVV $SYS_getpid, R11 + SYSCALL +@@ -177,12 +186,14 @@ TEXT runtime·raiseproc(SB),NOSPLIT|NOFRAME,$0 + SYSCALL + RET + ++// func getpid() int + TEXT ·getpid(SB),NOSPLIT|NOFRAME,$0-8 + MOVV $SYS_getpid, R11 + SYSCALL + MOVV R4, ret+0(FP) + RET + ++// func tgkill(tgid, tid, sig int) + TEXT ·tgkill(SB),NOSPLIT|NOFRAME,$0-24 + MOVV tgid+0(FP), R4 + MOVV tid+8(FP), R5 +@@ -191,6 +202,7 @@ TEXT ·tgkill(SB),NOSPLIT|NOFRAME,$0-24 + SYSCALL + RET + ++// func setitimer(mode int32, new, old *itimerval) + TEXT runtime·setitimer(SB),NOSPLIT|NOFRAME,$0-24 + MOVW mode+0(FP), R4 + MOVV new+8(FP), R5 +@@ -288,6 +300,7 @@ fallback: + SYSCALL + JMP finish + ++// func nanotime1() int64 + TEXT runtime·nanotime1(SB),NOSPLIT,$16-8 + MOVV R3, R23 // R23 is unchanged by C code + MOVV R3, R25 +@@ -371,6 +384,7 @@ fallback: + SYSCALL + JMP finish + ++// func rtsigprocmask(how int32, new, old *sigset, size int32) + TEXT runtime·rtsigprocmask(SB),NOSPLIT|NOFRAME,$0-28 + MOVW how+0(FP), R4 + MOVV new+8(FP), R5 +@@ -383,6 +397,7 @@ TEXT runtime·rtsigprocmask(SB),NOSPLIT|NOFRAME,$0-28 + MOVV R0, 0xf1(R0) // crash + RET + ++// func rt_sigaction(sig uintptr, new, old *sigactiont, size uintptr) int32 + TEXT runtime·rt_sigaction(SB),NOSPLIT|NOFRAME,$0-36 + MOVV sig+0(FP), R4 + MOVV new+8(FP), R5 +@@ -393,6 +408,7 @@ TEXT runtime·rt_sigaction(SB),NOSPLIT|NOFRAME,$0-36 + MOVW R4, ret+32(FP) + RET + ++// func sigfwd(fn uintptr, sig uint32, info *siginfo, ctx unsafe.Pointer) + TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 + MOVW sig+8(FP), R4 + MOVV info+16(FP), R5 +@@ -401,6 +417,7 @@ TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 + JAL (R20) + RET + ++// func sigtramp(signo, ureg, ctxt unsafe.Pointer) + TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$182 + MOVW R4, (1*8)(R3) + MOVV R5, (2*8)(R3) +@@ -426,9 +443,11 @@ TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME,$182 + + RET + ++// func cgoSigtramp() + TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0 + JMP runtime·sigtramp(SB) + ++// func mmap(addr unsafe.Pointer, n uintptr, prot, flags, fd int32, off uint32) (p unsafe.Pointer, err int) + TEXT runtime·mmap(SB),NOSPLIT|NOFRAME,$0 + MOVV addr+0(FP), R4 + MOVV n+8(FP), R5 +@@ -450,6 +469,7 @@ ok: + MOVV $0, err+40(FP) + RET + ++// func munmap(addr unsafe.Pointer, n uintptr) + TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 + MOVV addr+0(FP), R4 + MOVV n+8(FP), R5 +@@ -460,6 +480,7 @@ TEXT runtime·munmap(SB),NOSPLIT|NOFRAME,$0 + MOVV R0, 0xf3(R0) // crash + RET + ++// func madvise(addr unsafe.Pointer, n uintptr, flags int32) + TEXT runtime·madvise(SB),NOSPLIT|NOFRAME,$0 + MOVV addr+0(FP), R4 + MOVV n+8(FP), R5 +@@ -469,8 +490,7 @@ TEXT runtime·madvise(SB),NOSPLIT|NOFRAME,$0 + MOVW R4, ret+24(FP) + RET + +-// int64 futex(int32 *uaddr, int32 op, int32 val, +-// struct timespec *timeout, int32 *uaddr2, int32 val2); ++// func futex(addr unsafe.Pointer, op int32, val uint32, ts, addr2 unsafe.Pointer, val3 uint32) int32 + TEXT runtime·futex(SB),NOSPLIT|NOFRAME,$0 + MOVV addr+0(FP), R4 + MOVW op+8(FP), R5 +@@ -544,6 +564,7 @@ nog: + SYSCALL + JMP -3(PC) // keep exiting + ++// func sigaltstack(new, old *stackt) + TEXT runtime·sigaltstack(SB),NOSPLIT|NOFRAME,$0 + MOVV new+0(FP), R4 + MOVV old+8(FP), R5 +@@ -554,11 +575,13 @@ TEXT runtime·sigaltstack(SB),NOSPLIT|NOFRAME,$0 + MOVV R0, 0xf1(R0) // crash + RET + ++// func osyield() + TEXT runtime·osyield(SB),NOSPLIT|NOFRAME,$0 + MOVV $SYS_sched_yield, R11 + SYSCALL + RET + ++// func sched_getaffinity(pid, len uintptr, buf *uintptr) int32 + TEXT runtime·sched_getaffinity(SB),NOSPLIT|NOFRAME,$0 + MOVV pid+0(FP), R4 + MOVV len+8(FP), R5 +-- +2.27.0 + diff --git a/0075-runtime-add-support-for-buildmode-c-shared-on-loong6.patch b/0075-runtime-add-support-for-buildmode-c-shared-on-loong6.patch new file mode 100644 index 0000000000000000000000000000000000000000..46349ccf6b01a4d530a23b4a6676502387d61cf6 --- /dev/null +++ b/0075-runtime-add-support-for-buildmode-c-shared-on-loong6.patch @@ -0,0 +1,142 @@ +From e928df850fe202f6e969391a30a2c7e9956ca45d Mon Sep 17 00:00:00 2001 +From: limeidan +Date: Mon, 22 Aug 2022 20:22:21 +0800 +Subject: [PATCH 75/80] runtime: add support for --buildmode=c-shared on + loong64 + +Signed-off-by: limeidan +Change-Id: I6885c7ecc3904b8917ca014b54d1b22d18b2d04d +--- + src/runtime/rt0_linux_loong64.s | 51 +++++++++++++++++++++++++++++++++ + src/runtime/tls_loong64.s | 37 ++++++++++++++++++++++-- + 2 files changed, 86 insertions(+), 2 deletions(-) + +diff --git a/src/runtime/rt0_linux_loong64.s b/src/runtime/rt0_linux_loong64.s +index 86885dfa80..96fb4d30c4 100644 +--- a/src/runtime/rt0_linux_loong64.s ++++ b/src/runtime/rt0_linux_loong64.s +@@ -6,6 +6,7 @@ + // +build loong64 + + #include "textflag.h" ++#include "cgo/abi_loong64.h" + + TEXT _rt0_loong64_linux(SB),NOSPLIT|NOFRAME,$0 + // In a statically linked binary, the stack contains argc, +@@ -16,6 +17,56 @@ TEXT _rt0_loong64_linux(SB),NOSPLIT|NOFRAME,$0 + ADDV $8, R3, R5 // argv + JMP main(SB) + ++// When building with -buildmode=c-shared, this symbol is called when the shared ++// library is loaded. ++TEXT _rt0_loong64_linux_lib(SB),NOSPLIT,$232 ++ // Preserve callee-save registers. ++ SAVE_R22_TO_R31(24) ++ SAVE_F24_TO_F31(104) ++ ++ // Initialize g as null in case of using g later e.g. sigaction in cgo_sigaction.go ++ MOVV R0, g ++ ++ MOVV R4, _rt0_loong64_linux_lib_argc<>(SB) ++ MOVV R5, _rt0_loong64_linux_lib_argv<>(SB) ++ ++ // Synchronous initialization. ++ MOVV $runtime·libpreinit(SB), R19 ++ JAL (R19) ++ ++ // Create a new thread to do the runtime initialization and return. ++ MOVV _cgo_sys_thread_create(SB), R19 ++ BEQ R19, nocgo ++ MOVV $_rt0_loong64_linux_lib_go(SB), R4 ++ MOVV $0, R5 ++ JAL (R19) ++ JMP restore ++ ++nocgo: ++ MOVV $0x800000, R4 // stacksize = 8192KB ++ MOVV $_rt0_loong64_linux_lib_go(SB), R5 ++ MOVV R4, 8(R3) ++ MOVV R5, 16(R3) ++ MOVV $runtime·newosproc0(SB), R19 ++ JAL (R19) ++ ++restore: ++ // Restore callee-save registers. ++ RESTORE_R22_TO_R31(24) ++ RESTORE_F24_TO_F31(104) ++ RET ++ ++TEXT _rt0_loong64_linux_lib_go(SB),NOSPLIT,$0 ++ MOVV _rt0_loong64_linux_lib_argc<>(SB), R4 ++ MOVV _rt0_loong64_linux_lib_argv<>(SB), R5 ++ MOVV $runtime·rt0_go(SB),R19 ++ JMP (R19) ++ ++DATA _rt0_loong64_linux_lib_argc<>(SB)/8, $0 ++GLOBL _rt0_loong64_linux_lib_argc<>(SB),NOPTR, $8 ++DATA _rt0_loong64_linux_lib_argv<>(SB)/8, $0 ++GLOBL _rt0_loong64_linux_lib_argv<>(SB),NOPTR, $8 ++ + TEXT main(SB),NOSPLIT|NOFRAME,$0 + // in external linking, glibc jumps to main with argc in R4 + // and argv in R5 +diff --git a/src/runtime/tls_loong64.s b/src/runtime/tls_loong64.s +index 30627d849b..ee3be31afd 100644 +--- a/src/runtime/tls_loong64.s ++++ b/src/runtime/tls_loong64.s +@@ -12,17 +12,50 @@ + // If !iscgo, this is a no-op. + // + // NOTE: mcall() assumes this clobbers only R30 (REGTMP). +-TEXT runtime·save_g(SB),NOSPLIT|NOFRAME,$0-0 ++TEXT runtime·save_g(SB),NOSPLIT,$0-0 + MOVB runtime·iscgo(SB), R30 + BEQ R30, nocgo + ++ // here use the func __tls_get_addr to get the address of tls_g, which clobbers these regs below. ++ ADDV $-56, R3 ++ MOVV R1, 0(R3) ++ MOVV R4, 8(R3) ++ MOVV R5, 16(R3) ++ MOVV R6, 24(R3) ++ MOVV R12, 32(R3) ++ MOVV R13, 40(R3) ++ MOVV R30, 48(R3) + MOVV g, runtime·tls_g(SB) ++ MOVV 0(R3), R1 ++ MOVV 8(R3), R4 ++ MOVV 16(R3), R5 ++ MOVV 24(R3), R6 ++ MOVV 32(R3), R12 ++ MOVV 40(R3), R13 ++ MOVV 48(R3), R30 ++ ADDV $56, R3 + + nocgo: + RET + +-TEXT runtime·load_g(SB),NOSPLIT|NOFRAME,$0-0 ++TEXT runtime·load_g(SB),NOSPLIT,$0-0 ++ ADDV $-56, R3 ++ MOVV R1, 0(R3) ++ MOVV R4, 8(R3) ++ MOVV R5, 16(R3) ++ MOVV R6, 24(R3) ++ MOVV R12, 32(R3) ++ MOVV R13, 40(R3) ++ MOVV R30, 48(R3) + MOVV runtime·tls_g(SB), g ++ MOVV 0(R3), R1 ++ MOVV 8(R3), R4 ++ MOVV 16(R3), R5 ++ MOVV 24(R3), R6 ++ MOVV 32(R3), R12 ++ MOVV 40(R3), R13 ++ MOVV 48(R3), R30 ++ ADDV $56, R3 + RET + + GLOBL runtime·tls_g(SB), TLSBSS, $8 +-- +2.27.0 + diff --git a/0076-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch b/0076-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch new file mode 100644 index 0000000000000000000000000000000000000000..f5d752695b34529f2eec45d64f14949799c50313 --- /dev/null +++ b/0076-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch @@ -0,0 +1,899 @@ +From 8a405d2dc8faad02eed8b6640df355c580f3c4de Mon Sep 17 00:00:00 2001 +From: limeidan +Date: Mon, 22 Aug 2022 20:23:33 +0800 +Subject: [PATCH 76/80] cmd/compile: add support for --buildmode=c-shared on + loong64 + +Signed-off-by: limeidan +Change-Id: If30bee4d2ecb7055dfb9249dc370aa2f991ae199 +--- + src/cmd/compile/internal/base/flag.go | 2 +- + src/cmd/compile/internal/liveness/plive.go | 2 +- + .../compile/internal/ssa/gen/LOONG64.rules | 80 ++++---- + .../compile/internal/ssa/rewriteLOONG64.go | 190 +++++++++++------- + 4 files changed, 156 insertions(+), 118 deletions(-) + +diff --git a/src/cmd/compile/internal/base/flag.go b/src/cmd/compile/internal/base/flag.go +index 42c0c1b94b..fa06cac021 100644 +--- a/src/cmd/compile/internal/base/flag.go ++++ b/src/cmd/compile/internal/base/flag.go +@@ -175,7 +175,7 @@ func ParseFlags() { + if Flag.Race && !sys.RaceDetectorSupported(buildcfg.GOOS, buildcfg.GOARCH) { + log.Fatalf("%s/%s does not support -race", buildcfg.GOOS, buildcfg.GOARCH) + } +- if (*Flag.Shared || *Flag.Dynlink || *Flag.LinkShared) && !Ctxt.Arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.I386, sys.PPC64, sys.RISCV64, sys.S390X) { ++ if (*Flag.Shared || *Flag.Dynlink || *Flag.LinkShared) && !Ctxt.Arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.Loong64, sys.I386, sys.PPC64, sys.RISCV64, sys.S390X) { + log.Fatalf("%s/%s does not support -shared", buildcfg.GOOS, buildcfg.GOARCH) + } + parseSpectre(Flag.Spectre) // left as string for RecordFlags +diff --git a/src/cmd/compile/internal/liveness/plive.go b/src/cmd/compile/internal/liveness/plive.go +index f5c2ef7709..6d2195dc3e 100644 +--- a/src/cmd/compile/internal/liveness/plive.go ++++ b/src/cmd/compile/internal/liveness/plive.go +@@ -521,7 +521,7 @@ func (lv *liveness) markUnsafePoints() { + v = v.Args[0] + continue + } +- case ssa.Op386MOVLload, ssa.OpARM64MOVWUload, ssa.OpPPC64MOVWZload, ssa.OpWasmI64Load32U: ++ case ssa.Op386MOVLload, ssa.OpARM64MOVWUload, ssa.OpLOONG64MOVWUload, ssa.OpPPC64MOVWZload, ssa.OpWasmI64Load32U: + // Args[0] is the address of the write + // barrier control. Ignore Args[1], + // which is the mem operand. +diff --git a/src/cmd/compile/internal/ssa/gen/LOONG64.rules b/src/cmd/compile/internal/ssa/gen/LOONG64.rules +index bde427d99c..06337b6242 100644 +--- a/src/cmd/compile/internal/ssa/gen/LOONG64.rules ++++ b/src/cmd/compile/internal/ssa/gen/LOONG64.rules +@@ -441,65 +441,65 @@ + (ADDVconst [off1] (MOVVaddr [off2] {sym} ptr)) && is32Bit(off1+int64(off2)) => (MOVVaddr [int32(off1)+int32(off2)] {sym} ptr) + + // fold address into load/store +-(MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVBload [off1+int32(off2)] {sym} ptr mem) +-(MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVBUload [off1+int32(off2)] {sym} ptr mem) +-(MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVHload [off1+int32(off2)] {sym} ptr mem) +-(MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVHUload [off1+int32(off2)] {sym} ptr mem) +-(MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVWload [off1+int32(off2)] {sym} ptr mem) +-(MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVWUload [off1+int32(off2)] {sym} ptr mem) +-(MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVVload [off1+int32(off2)] {sym} ptr mem) +-(MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVFload [off1+int32(off2)] {sym} ptr mem) +-(MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVDload [off1+int32(off2)] {sym} ptr mem) +- +-(MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) => (MOVBstore [off1+int32(off2)] {sym} ptr val mem) +-(MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) => (MOVHstore [off1+int32(off2)] {sym} ptr val mem) +-(MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) => (MOVWstore [off1+int32(off2)] {sym} ptr val mem) +-(MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) => (MOVVstore [off1+int32(off2)] {sym} ptr val mem) +-(MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) => (MOVFstore [off1+int32(off2)] {sym} ptr val mem) +-(MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) => (MOVDstore [off1+int32(off2)] {sym} ptr val mem) +-(MOVBstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVBstorezero [off1+int32(off2)] {sym} ptr mem) +-(MOVHstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVHstorezero [off1+int32(off2)] {sym} ptr mem) +-(MOVWstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVWstorezero [off1+int32(off2)] {sym} ptr mem) +-(MOVVstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) => (MOVVstorezero [off1+int32(off2)] {sym} ptr mem) +- +-(MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVBload [off1+int32(off2)] {sym} ptr mem) ++(MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVBUload [off1+int32(off2)] {sym} ptr mem) ++(MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVHload [off1+int32(off2)] {sym} ptr mem) ++(MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVHUload [off1+int32(off2)] {sym} ptr mem) ++(MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVWload [off1+int32(off2)] {sym} ptr mem) ++(MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVWUload [off1+int32(off2)] {sym} ptr mem) ++(MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVVload [off1+int32(off2)] {sym} ptr mem) ++(MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVFload [off1+int32(off2)] {sym} ptr mem) ++(MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVDload [off1+int32(off2)] {sym} ptr mem) ++ ++(MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVBstore [off1+int32(off2)] {sym} ptr val mem) ++(MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVHstore [off1+int32(off2)] {sym} ptr val mem) ++(MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVWstore [off1+int32(off2)] {sym} ptr val mem) ++(MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVVstore [off1+int32(off2)] {sym} ptr val mem) ++(MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVFstore [off1+int32(off2)] {sym} ptr val mem) ++(MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVDstore [off1+int32(off2)] {sym} ptr val mem) ++(MOVBstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVBstorezero [off1+int32(off2)] {sym} ptr mem) ++(MOVHstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVHstorezero [off1+int32(off2)] {sym} ptr mem) ++(MOVWstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVWstorezero [off1+int32(off2)] {sym} ptr mem) ++(MOVVstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVVstorezero [off1+int32(off2)] {sym} ptr mem) ++ ++(MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVBload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVBUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVHload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVHUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVWload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVWUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVVload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVFload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVDload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + +-(MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVBstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) +-(MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVHstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) +-(MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVWstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) +-(MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVVstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) +-(MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVFstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) +-(MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVDstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) +-(MOVBstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVBstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVBstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVHstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVHstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVHstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVWstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVWstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVWstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) +-(MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) => ++(MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => + (MOVVstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + + // store zero +diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go +index 8f3c823049..6b971b676c 100644 +--- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go ++++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go +@@ -1592,8 +1592,10 @@ func rewriteValueLOONG64_OpLOONG64LoweredAtomicStore64(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVBUload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBUload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1604,7 +1606,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBUload) +@@ -1614,7 +1616,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { + return true + } + // match: (MOVBUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1626,7 +1628,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBUload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBUload) +@@ -1677,8 +1679,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBUreg(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVBload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1689,7 +1693,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBload) +@@ -1699,7 +1703,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { + return true + } + // match: (MOVBload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1711,7 +1715,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBload) +@@ -1763,8 +1767,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { + v_2 := v.Args[2] + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVBstore [off1] {sym} (ADDVconst [off2] ptr) val mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1776,7 +1782,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBstore) +@@ -1786,7 +1792,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { + return true + } + // match: (MOVBstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1799,7 +1805,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBstore) +@@ -1915,8 +1921,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstore(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVBstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBstorezero [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1927,7 +1935,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBstorezero) +@@ -1937,7 +1945,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { + return true + } + // match: (MOVBstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVBstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1949,7 +1957,7 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVBstorezero) +@@ -1963,8 +1971,10 @@ func rewriteValueLOONG64_OpLOONG64MOVBstorezero(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVDload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVDload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1975,7 +1985,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVDload) +@@ -1985,7 +1995,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { + return true + } + // match: (MOVDload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVDload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -1997,7 +2007,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVDload) +@@ -2012,8 +2022,10 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { + v_2 := v.Args[2] + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVDstore [off1] {sym} (ADDVconst [off2] ptr) val mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2025,7 +2037,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVDstore) +@@ -2035,7 +2047,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { + return true + } + // match: (MOVDstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVDstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2048,7 +2060,7 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVDstore) +@@ -2062,8 +2074,10 @@ func rewriteValueLOONG64_OpLOONG64MOVDstore(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVFload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVFload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2074,7 +2088,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVFload) +@@ -2084,7 +2098,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { + return true + } + // match: (MOVFload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVFload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2096,7 +2110,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVFload) +@@ -2111,8 +2125,10 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { + v_2 := v.Args[2] + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVFstore [off1] {sym} (ADDVconst [off2] ptr) val mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVFstore [off1+int32(off2)] {sym} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2124,7 +2140,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVFstore) +@@ -2134,7 +2150,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { + return true + } + // match: (MOVFstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVFstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2147,7 +2163,7 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVFstore) +@@ -2161,8 +2177,10 @@ func rewriteValueLOONG64_OpLOONG64MOVFstore(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVHUload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHUload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2173,7 +2191,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHUload) +@@ -2183,7 +2201,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { + return true + } + // match: (MOVHUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2195,7 +2213,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHUload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHUload) +@@ -2268,8 +2286,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHUreg(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVHload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2280,7 +2300,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHload) +@@ -2290,7 +2310,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { + return true + } + // match: (MOVHload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2302,7 +2322,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHload) +@@ -2398,8 +2418,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { + v_2 := v.Args[2] + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVHstore [off1] {sym} (ADDVconst [off2] ptr) val mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2411,7 +2433,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHstore) +@@ -2421,7 +2443,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { + return true + } + // match: (MOVHstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2434,7 +2456,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHstore) +@@ -2516,8 +2538,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstore(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVHstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHstorezero [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2528,7 +2552,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHstorezero) +@@ -2538,7 +2562,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { + return true + } + // match: (MOVHstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVHstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2550,7 +2574,7 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVHstorezero) +@@ -2564,8 +2588,10 @@ func rewriteValueLOONG64_OpLOONG64MOVHstorezero(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVVload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVVload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2576,7 +2602,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVVload) +@@ -2586,7 +2612,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { + return true + } + // match: (MOVVload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVVload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2598,7 +2624,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVVload) +@@ -2640,8 +2666,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { + v_2 := v.Args[2] + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVVstore [off1] {sym} (ADDVconst [off2] ptr) val mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVVstore [off1+int32(off2)] {sym} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2653,7 +2681,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVVstore) +@@ -2663,7 +2691,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { + return true + } + // match: (MOVVstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVVstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2676,7 +2704,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVVstore) +@@ -2690,8 +2718,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstore(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVVstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVVstorezero [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2702,7 +2732,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVVstorezero) +@@ -2712,7 +2742,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { + return true + } + // match: (MOVVstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVVstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2724,7 +2754,7 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVVstorezero) +@@ -2738,8 +2768,10 @@ func rewriteValueLOONG64_OpLOONG64MOVVstorezero(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVWUload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWUload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2750,7 +2782,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWUload) +@@ -2760,7 +2792,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { + return true + } + // match: (MOVWUload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWUload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2772,7 +2804,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWUload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWUload) +@@ -2867,8 +2899,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWUreg(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVWload [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWload [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2879,7 +2913,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWload) +@@ -2889,7 +2923,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { + return true + } + // match: (MOVWload [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWload [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -2901,7 +2935,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWload(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWload) +@@ -3030,8 +3064,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { + v_2 := v.Args[2] + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVWstore [off1] {sym} (ADDVconst [off2] ptr) val mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -3043,7 +3079,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWstore) +@@ -3053,7 +3089,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { + return true + } + // match: (MOVWstore [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) val mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWstore [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr val mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -3066,7 +3102,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { + ptr := v_0.Args[0] + val := v_1 + mem := v_2 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWstore) +@@ -3114,8 +3150,10 @@ func rewriteValueLOONG64_OpLOONG64MOVWstore(v *Value) bool { + func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { + v_1 := v.Args[1] + v_0 := v.Args[0] ++ b := v.Block ++ config := b.Func.Config + // match: (MOVWstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) +- // cond: is32Bit(int64(off1)+off2) ++ // cond: is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWstorezero [off1+int32(off2)] {sym} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -3126,7 +3164,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { + off2 := auxIntToInt64(v_0.AuxInt) + ptr := v_0.Args[0] + mem := v_1 +- if !(is32Bit(int64(off1) + off2)) { ++ if !(is32Bit(int64(off1)+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWstorezero) +@@ -3136,7 +3174,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { + return true + } + // match: (MOVWstorezero [off1] {sym1} (MOVVaddr [off2] {sym2} ptr) mem) +- // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) ++ // cond: canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) + // result: (MOVWstorezero [off1+int32(off2)] {mergeSym(sym1,sym2)} ptr mem) + for { + off1 := auxIntToInt32(v.AuxInt) +@@ -3148,7 +3186,7 @@ func rewriteValueLOONG64_OpLOONG64MOVWstorezero(v *Value) bool { + sym2 := auxToSym(v_0.Aux) + ptr := v_0.Args[0] + mem := v_1 +- if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2))) { ++ if !(canMergeSym(sym1, sym2) && is32Bit(int64(off1)+int64(off2)) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { + break + } + v.reset(OpLOONG64MOVWstorezero) +-- +2.27.0 + diff --git a/0077-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch b/0077-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch new file mode 100644 index 0000000000000000000000000000000000000000..565d3acc2afe4d84eb5f4fa38dbe027b0065c3fc --- /dev/null +++ b/0077-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch @@ -0,0 +1,323 @@ +From 26be0dbd800dc250b6410566d24d7a62c319ffbf Mon Sep 17 00:00:00 2001 +From: limeidan +Date: Mon, 22 Aug 2022 20:24:59 +0800 +Subject: [PATCH 77/80] cmd/internal/obj/loong64, cmd/internal/objabi: add + c-shared relocations on loong64 + +Signed-off-by: limeidan +Change-Id: I9e8ca663813662f89646e455eb42192b3c149881 +--- + src/cmd/internal/obj/loong64/a.out.go | 4 +- + src/cmd/internal/obj/loong64/asm.go | 127 ++++++++++++++++++-- + src/cmd/internal/obj/loong64/cnames.go | 4 +- + src/cmd/internal/objabi/reloctype.go | 13 ++ + src/cmd/internal/objabi/reloctype_string.go | 26 ++-- + 5 files changed, 149 insertions(+), 25 deletions(-) + +diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go +index c2825108e5..e02cae7c75 100644 +--- a/src/cmd/internal/obj/loong64/a.out.go ++++ b/src/cmd/internal/obj/loong64/a.out.go +@@ -225,7 +225,9 @@ const ( + C_LOREG + C_GOK + C_ADDR +- C_TLS ++ C_GOTADDR ++ C_TLS_LE ++ C_TLS_GD + C_TEXTSIZE + + C_NCLASS // must be the last +diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go +index 66265690e3..14e6f05da1 100644 +--- a/src/cmd/internal/obj/loong64/asm.go ++++ b/src/cmd/internal/obj/loong64/asm.go +@@ -155,11 +155,11 @@ var optab = []Optab{ + {AMOVB, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, + {AMOVBU, C_REG, C_NONE, C_ADDR, 50, 8, 0, 0, 0}, + {AMOVBU, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.Loong64, 0}, +- {AMOVW, C_REG, C_NONE, C_TLS, 53, 16, 0, 0, 0}, +- {AMOVWU, C_REG, C_NONE, C_TLS, 53, 16, 0, sys.Loong64, 0}, +- {AMOVV, C_REG, C_NONE, C_TLS, 53, 16, 0, sys.Loong64, 0}, +- {AMOVB, C_REG, C_NONE, C_TLS, 53, 16, 0, 0, 0}, +- {AMOVBU, C_REG, C_NONE, C_TLS, 53, 16, 0, 0, 0}, ++ {AMOVW, C_REG, C_NONE, C_TLS_LE, 53, 16, 0, 0, 0}, ++ {AMOVWU, C_REG, C_NONE, C_TLS_LE, 53, 16, 0, sys.Loong64, 0}, ++ {AMOVV, C_REG, C_NONE, C_TLS_LE, 53, 16, 0, sys.Loong64, 0}, ++ {AMOVB, C_REG, C_NONE, C_TLS_LE, 53, 16, 0, 0, 0}, ++ {AMOVBU, C_REG, C_NONE, C_TLS_LE, 53, 16, 0, 0, 0}, + + {AMOVW, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, + {AMOVWU, C_LEXT, C_NONE, C_REG, 36, 12, 0, sys.Loong64, 0}, +@@ -184,11 +184,11 @@ var optab = []Optab{ + {AMOVB, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, + {AMOVBU, C_ADDR, C_NONE, C_REG, 51, 8, 0, 0, 0}, + {AMOVBU, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.Loong64, 0}, +- {AMOVW, C_TLS, C_NONE, C_REG, 54, 16, 0, 0, 0}, +- {AMOVWU, C_TLS, C_NONE, C_REG, 54, 16, 0, sys.Loong64, 0}, +- {AMOVV, C_TLS, C_NONE, C_REG, 54, 16, 0, sys.Loong64, 0}, +- {AMOVB, C_TLS, C_NONE, C_REG, 54, 16, 0, 0, 0}, +- {AMOVBU, C_TLS, C_NONE, C_REG, 54, 16, 0, 0, 0}, ++ {AMOVW, C_TLS_LE, C_NONE, C_REG, 54, 16, 0, 0, 0}, ++ {AMOVWU, C_TLS_LE, C_NONE, C_REG, 54, 16, 0, sys.Loong64, 0}, ++ {AMOVV, C_TLS_LE, C_NONE, C_REG, 54, 16, 0, sys.Loong64, 0}, ++ {AMOVB, C_TLS_LE, C_NONE, C_REG, 54, 16, 0, 0, 0}, ++ {AMOVBU, C_TLS_LE, C_NONE, C_REG, 54, 16, 0, 0, 0}, + + {AMOVW, C_SECON, C_NONE, C_REG, 3, 4, 0, sys.Loong64, 0}, + {AMOVV, C_SECON, C_NONE, C_REG, 3, 4, 0, sys.Loong64, 0}, +@@ -269,6 +269,8 @@ var optab = []Optab{ + {AJMP, C_NONE, C_NONE, C_ZOREG, 18, 4, REGZERO, 0, 0}, // jirl r0, rj, 0 + {AJAL, C_NONE, C_NONE, C_ZOREG, 18, 4, REGLINK, 0, 0}, // jirl r1, rj, 0 + ++ {AMOVV, C_GOTADDR, C_NONE, C_REG, 63, 12, 0, sys.Loong64, 0}, ++ + {AMOVW, C_SEXT, C_NONE, C_FREG, 27, 4, 0, sys.Loong64, 0}, + {AMOVF, C_SEXT, C_NONE, C_FREG, 27, 4, 0, sys.Loong64, 0}, + {AMOVD, C_SEXT, C_NONE, C_FREG, 27, 4, 0, sys.Loong64, 0}, +@@ -325,6 +327,18 @@ var optab = []Optab{ + {AMOVW, C_ADDCON, C_NONE, C_FREG, 34, 8, 0, sys.Loong64, 0}, + {AMOVW, C_ANDCON, C_NONE, C_FREG, 34, 8, 0, sys.Loong64, 0}, + ++ {AMOVB, C_REG, C_NONE, C_TLS_GD, 56, 24, 0, sys.Loong64, 0}, ++ {AMOVW, C_REG, C_NONE, C_TLS_GD, 56, 24, 0, sys.Loong64, 0}, ++ {AMOVV, C_REG, C_NONE, C_TLS_GD, 56, 24, 0, sys.Loong64, 0}, ++ {AMOVBU, C_REG, C_NONE, C_TLS_GD, 56, 24, 0, sys.Loong64, 0}, ++ {AMOVWU, C_REG, C_NONE, C_TLS_GD, 56, 24, 0, sys.Loong64, 0}, ++ ++ {AMOVB, C_TLS_GD, C_NONE, C_REG, 57, 24, 0, sys.Loong64, 0}, ++ {AMOVW, C_TLS_GD, C_NONE, C_REG, 57, 24, 0, sys.Loong64, 0}, ++ {AMOVV, C_TLS_GD, C_NONE, C_REG, 57, 24, 0, sys.Loong64, 0}, ++ {AMOVBU, C_TLS_GD, C_NONE, C_REG, 57, 24, 0, sys.Loong64, 0}, ++ {AMOVWU, C_TLS_GD, C_NONE, C_REG, 57, 24, 0, sys.Loong64, 0}, ++ + {AWORD, C_LCON, C_NONE, C_NONE, 40, 4, 0, 0, 0}, + {AWORD, C_DCON, C_NONE, C_NONE, 61, 4, 0, 0, 0}, + +@@ -459,7 +473,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + + bp := c.cursym.P + var i int32 +- var out [5]uint32 ++ var out [6]uint32 + for p := c.cursym.Func().Text.Link; p != nil; p = p.Link { + c.pc = p.Pc + o = c.oplook(p) +@@ -542,12 +556,19 @@ func (c *ctxt0) aclass(a *obj.Addr) int { + c.instoffset = a.Offset + if a.Sym != nil { // use relocation + if a.Sym.Type == objabi.STLSBSS { +- return C_TLS ++ if c.ctxt.Flag_shared { ++ return C_TLS_GD ++ } else { ++ return C_TLS_LE ++ } + } + return C_ADDR + } + return C_LEXT + ++ case obj.NAME_GOTREF: ++ return C_GOTADDR ++ + case obj.NAME_AUTO: + if a.Reg == REGSP { + // unset base register for better printing, since +@@ -1101,6 +1122,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { + o3 := uint32(0) + o4 := uint32(0) + o5 := uint32(0) ++ o6 := uint32(0) + + add := AADDU + add = AADDVU +@@ -1578,6 +1600,70 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { + rel2.Type = objabi.R_ADDRLOONG64TLS + o3 = OP_RRR(c.oprrr(AADDV), uint32(REG_R2), uint32(REGTMP), uint32(p.To.Reg)) + ++ case 56: // mov r, tlsvar GD model ==> (pcaddu12i + ld.d)__tls_get_addr + (pcaddu12i + addi.d)tlsvar@got + jirl + st.d ++ o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP)) ++ rel := obj.Addrel(c.cursym) ++ rel.Off = int32(c.pc) ++ rel.Siz = 4 ++ rel.Sym = c.ctxt.Lookup("__tls_get_addr") ++ rel.Add = 0x0 ++ rel.Type = objabi.R_LOONG64_GOTPCREL_HI ++ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) ++ rel2 := obj.Addrel(c.cursym) ++ rel2.Off = int32(c.pc+4) ++ rel2.Siz = 4 ++ rel2.Sym = c.ctxt.Lookup("__tls_get_addr") ++ rel2.Add = 0x0 ++ rel2.Type = objabi.R_LOONG64_GOTPCREL_LO ++ o3 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REG_R4)) ++ rel3 := obj.Addrel(c.cursym) ++ rel3.Off = int32(c.pc+8) ++ rel3.Siz = 4 ++ rel3.Sym = p.To.Sym ++ rel3.Add = 0x0 ++ rel3.Type = objabi.R_LOONG64_TLS_GD_PCREL_HI ++ o4 = OP_12IRR(c.opirr(AADDV), uint32(0), uint32(REG_R4), uint32(REG_R4)) ++ rel4 := obj.Addrel(c.cursym) ++ rel4.Off = int32(c.pc+12) ++ rel4.Siz = 4 ++ rel4.Sym = p.To.Sym ++ rel4.Add = 0x0 ++ rel4.Type = objabi.R_LOONG64_TLS_GD_PCREL_LO ++ o5 = OP_16IRR(c.opirr(AJIRL), uint32(0), uint32(REGTMP), uint32(REGLINK)) ++ o6 = OP_12IRR(c.opirr(p.As), uint32(0), uint32(REG_R4), uint32(p.From.Reg)) ++ ++ case 57: // mov tlsvar, r GD model ==> (pcaddu12i + ld.d)__tls_get_addr + (pcaddu12i + addi.d)tlsvar@got + jirl + ld.d ++ o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP)) ++ rel := obj.Addrel(c.cursym) ++ rel.Off = int32(c.pc) ++ rel.Siz = 4 ++ rel.Sym = c.ctxt.Lookup("__tls_get_addr") ++ rel.Add = 0x0 ++ rel.Type = objabi.R_LOONG64_GOTPCREL_HI ++ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(REGTMP)) ++ rel2 := obj.Addrel(c.cursym) ++ rel2.Off = int32(c.pc+4) ++ rel2.Siz = 4 ++ rel2.Sym = c.ctxt.Lookup("__tls_get_addr") ++ rel2.Add = 0x0 ++ rel2.Type = objabi.R_LOONG64_GOTPCREL_LO ++ o3 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REG_R4)) ++ rel3 := obj.Addrel(c.cursym) ++ rel3.Off = int32(c.pc+8) ++ rel3.Siz = 4 ++ rel3.Sym = p.From.Sym ++ rel3.Type = objabi.R_LOONG64_TLS_GD_PCREL_HI ++ rel3.Add = 0x0 ++ o4 = OP_12IRR(c.opirr(AADDV), uint32(0), uint32(REG_R4), uint32(REG_R4)) ++ rel4 := obj.Addrel(c.cursym) ++ rel4.Off = int32(c.pc+12) ++ rel4.Siz = 4 ++ rel4.Sym = p.From.Sym ++ rel4.Type = objabi.R_LOONG64_TLS_GD_PCREL_LO ++ rel4.Add = 0x0 ++ o5 = OP_16IRR(c.opirr(AJIRL), uint32(0), uint32(REGTMP), uint32(REGLINK)) ++ o6 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REG_R4), uint32(p.To.Reg)) ++ + case 59: // mov $dcon,r + // NOTE: this case does not use REGTMP. If it ever does, + // remove the NOTUSETMP flag in optab. +@@ -1605,6 +1691,22 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { + + case 62: // rdtimex rd, rj + o1 = OP_RR(c.oprr(p.As), uint32(p.From.Reg), uint32(p.To.Reg)) ++ ++ case 63: // mov sym@GOT, r ==> pcaddu12i + ld.d ++ o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP)) ++ rel := obj.Addrel(c.cursym) ++ rel.Off = int32(c.pc) ++ rel.Siz = 4 ++ rel.Sym = p.From.Sym ++ rel.Type = objabi.R_LOONG64_GOTPCREL_HI ++ rel.Add = 0x0 ++ o2 = OP_12IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(p.To.Reg)) ++ rel2 := obj.Addrel(c.cursym) ++ rel2.Off = int32(c.pc+4) ++ rel2.Siz = 4 ++ rel2.Sym = p.From.Sym ++ rel2.Type = objabi.R_LOONG64_GOTPCREL_LO ++ rel2.Add = 0x0 + } + + out[0] = o1 +@@ -1612,6 +1714,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { + out[2] = o3 + out[3] = o4 + out[4] = o5 ++ out[5] = o6 + } + + func (c *ctxt0) vregoff(a *obj.Addr) int64 { +diff --git a/src/cmd/internal/obj/loong64/cnames.go b/src/cmd/internal/obj/loong64/cnames.go +index e757e242ee..c594ac97a3 100644 +--- a/src/cmd/internal/obj/loong64/cnames.go ++++ b/src/cmd/internal/obj/loong64/cnames.go +@@ -37,7 +37,9 @@ var cnames0 = []string{ + "LOREG", + "GOK", + "ADDR", +- "TLS", ++ "GOTADDR", ++ "TLS_LE", ++ "TLS_GD", + "TEXTSIZE", + "NCLASS", + } +diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go +index 99bc5f7a68..d5bc57e782 100644 +--- a/src/cmd/internal/objabi/reloctype.go ++++ b/src/cmd/internal/objabi/reloctype.go +@@ -247,6 +247,19 @@ const ( + // TODO(mundaym): remove once variants can be serialized - see issue 14218. + R_PCRELDBL + ++ // Loong64. ++ ++ // R_LOONG64_TLS_GD_PCREL_HI and R_LOONG64_TLS_GD_PCREL_LO relocates an pcaddu12i, addi.d pair to compute ++ // the address of the GOT slot of the tls symbol, the address will be passed to __tls_get_addr to ++ // get the true address of tlsvar. ++ R_LOONG64_TLS_GD_PCREL_HI ++ R_LOONG64_TLS_GD_PCREL_LO ++ ++ // R_LOONG64_GOTPCREL_HI and R_LOONG64_GOTPCREL_LO relocates an pcaddu12i, addi.d pair to compute ++ // the address of the GOT slot of the referenced symbol. ++ R_LOONG64_GOTPCREL_HI ++ R_LOONG64_GOTPCREL_LO ++ + // R_ADDRMIPSU (only used on mips/mips64) resolves to the sign-adjusted "upper" 16 + // bits (bit 16-31) of an external address, by encoding it into the instruction. + R_ADDRMIPSU +diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go +index 9d34a0f7d5..30fe39ba56 100644 +--- a/src/cmd/internal/objabi/reloctype_string.go ++++ b/src/cmd/internal/objabi/reloctype_string.go +@@ -1,4 +1,4 @@ +-// Code generated by "stringer -type RelocType reloctype.go"; DO NOT EDIT. ++// Code generated by "stringer -type=RelocType cmd/internal/objabi/reloctype.go"; DO NOT EDIT. + + package objabi + +@@ -66,19 +66,23 @@ func _() { + _ = x[R_RISCV_TLS_IE_ITYPE-56] + _ = x[R_RISCV_TLS_IE_STYPE-57] + _ = x[R_PCRELDBL-58] +- _ = x[R_ADDRMIPSU-59] +- _ = x[R_ADDRLOONG64U-60] +- _ = x[R_ADDRMIPSTLS-61] +- _ = x[R_ADDRLOONG64TLS-62] +- _ = x[R_ADDRLOONG64TLSU-63] +- _ = x[R_ADDRCUOFF-64] +- _ = x[R_WASMIMPORT-65] +- _ = x[R_XCOFFREF-66] ++ _ = x[R_LOONG64_TLS_GD_PCREL_HI-59] ++ _ = x[R_LOONG64_TLS_GD_PCREL_LO-60] ++ _ = x[R_LOONG64_GOTPCREL_HI-61] ++ _ = x[R_LOONG64_GOTPCREL_LO-62] ++ _ = x[R_ADDRMIPSU-63] ++ _ = x[R_ADDRLOONG64U-64] ++ _ = x[R_ADDRMIPSTLS-65] ++ _ = x[R_ADDRLOONG64TLS-66] ++ _ = x[R_ADDRLOONG64TLSU-67] ++ _ = x[R_ADDRCUOFF-68] ++ _ = x[R_WASMIMPORT-69] ++ _ = x[R_XCOFFREF-70] + } + +-const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDRLOONG64R_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CALLRISCVR_CALLLOONG64R_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_JMPLOONG64R_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRMIPSUR_ADDRLOONG64UR_ADDRMIPSTLSR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" ++const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDRLOONG64R_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CALLRISCVR_CALLLOONG64R_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_JMPLOONG64R_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_LOONG64_TLS_GD_PCREL_HIR_LOONG64_TLS_GD_PCREL_LOR_LOONG64_GOTPCREL_HIR_LOONG64_GOTPCREL_LOR_ADDRMIPSUR_ADDRLOONG64UR_ADDRMIPSTLSR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" + +-var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 51, 60, 66, 72, 81, 92, 101, 112, 122, 133, 146, 153, 160, 168, 176, 184, 190, 196, 202, 212, 221, 231, 247, 258, 264, 275, 285, 294, 306, 319, 333, 347, 361, 377, 388, 401, 414, 428, 442, 456, 471, 485, 499, 510, 524, 539, 556, 574, 595, 614, 633, 653, 673, 683, 694, 708, 721, 737, 754, 765, 777, 787} ++var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 51, 60, 66, 72, 81, 92, 101, 112, 122, 133, 146, 153, 160, 168, 176, 184, 190, 196, 202, 212, 221, 231, 247, 258, 264, 275, 285, 294, 306, 319, 333, 347, 361, 377, 388, 401, 414, 428, 442, 456, 471, 485, 499, 510, 524, 539, 556, 574, 595, 614, 633, 653, 673, 683, 708, 733, 754, 775, 786, 800, 813, 829, 846, 857, 869, 879} + + func (i RelocType) String() string { + i -= 1 +-- +2.27.0 + diff --git a/0078-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch b/0078-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch new file mode 100644 index 0000000000000000000000000000000000000000..e902bbd0b34f935f04feef5a3f2a709ba62d0f8b --- /dev/null +++ b/0078-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch @@ -0,0 +1,264 @@ +From 4fd083288125123344ade98c446585b38d6b671a Mon Sep 17 00:00:00 2001 +From: limeidan +Date: Mon, 22 Aug 2022 20:26:59 +0800 +Subject: [PATCH 78/80] cmd/link: add support for --buildmode=c-shared on + loong64 + +Signed-off-by: limeidan +Change-Id: I0eef9d7451159b422a54408a9ab169af301d1d2a +--- + src/cmd/link/internal/ld/config.go | 2 +- + src/cmd/link/internal/ld/lib.go | 2 +- + src/cmd/link/internal/loong64/asm.go | 177 ++++++++++++++++++++++++++- + 3 files changed, 175 insertions(+), 6 deletions(-) + +diff --git a/src/cmd/link/internal/ld/config.go b/src/cmd/link/internal/ld/config.go +index c15aac8b6a..09e032b012 100644 +--- a/src/cmd/link/internal/ld/config.go ++++ b/src/cmd/link/internal/ld/config.go +@@ -74,7 +74,7 @@ func (mode *BuildMode) Set(s string) error { + *mode = BuildModeCArchive + case "c-shared": + switch buildcfg.GOARCH { +- case "386", "amd64", "arm", "arm64", "ppc64le", "s390x": ++ case "386", "amd64", "arm", "arm64", "loong64", "ppc64le", "s390x": + default: + return badmode() + } +diff --git a/src/cmd/link/internal/ld/lib.go b/src/cmd/link/internal/ld/lib.go +index 216da73a7a..effb7c0648 100644 +--- a/src/cmd/link/internal/ld/lib.go ++++ b/src/cmd/link/internal/ld/lib.go +@@ -794,7 +794,7 @@ func (ctxt *Link) linksetup() { + ctxt.loader.SetAttrReachable(moduledata, true) + ctxt.Moduledata = moduledata + +- if ctxt.Arch == sys.Arch386 && ctxt.HeadType != objabi.Hwindows { ++ if (ctxt.Arch == sys.Arch386 || ctxt.Arch == sys.ArchLoong64) && ctxt.HeadType != objabi.Hwindows { + if (ctxt.BuildMode == BuildModeCArchive && ctxt.IsELF) || ctxt.BuildMode == BuildModeCShared || ctxt.BuildMode == BuildModePIE || ctxt.DynlinkingGo() { + got := ctxt.loader.LookupOrCreateSym("_GLOBAL_OFFSET_TABLE_", 0) + sb := ctxt.loader.MakeSymbolUpdater(got) +diff --git a/src/cmd/link/internal/loong64/asm.go b/src/cmd/link/internal/loong64/asm.go +index 9c264311c4..c45971d50d 100644 +--- a/src/cmd/link/internal/loong64/asm.go ++++ b/src/cmd/link/internal/loong64/asm.go +@@ -11,14 +11,12 @@ import ( + "cmd/link/internal/loader" + "cmd/link/internal/sym" + "debug/elf" +- "log" + ) + + func gentext(ctxt *ld.Link, ldr *loader.Loader) {} + + func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s loader.Sym, r loader.Reloc, rIdx int) bool { +- log.Fatalf("adddynrel not implemented") +- return false ++ return true + } + + func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, r loader.ExtReloc, ri int, sectoff int64) bool { +@@ -87,6 +85,167 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, + out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_0_10_10_16_S2)) + out.Write64(uint64(0x0)) + ++ case objabi.R_LOONG64_TLS_GD_PCREL_HI: ++ symgot := ld.ElfSymForReloc(ctxt, ldr.LookupOrCreateSym("_GLOBAL_OFFSET_TABLE_", 0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(symgot)<<32) ++ out.Write64(uint64(0x800)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_GD) | uint64(elfsym)<<32) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_ADD)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) ++ out.Write64(uint64(0xc)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SR)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_5_20)) ++ out.Write64(uint64(0x0)) ++ ++ case objabi.R_LOONG64_TLS_GD_PCREL_LO: ++ symgot := ld.ElfSymForReloc(ctxt, ldr.LookupOrCreateSym("_GLOBAL_OFFSET_TABLE_", 0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(symgot)<<32) ++ out.Write64(uint64(0x4)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_GD) | uint64(elfsym)<<32) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_ADD)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(symgot)<<32) ++ out.Write64(uint64(0x804)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_GD) | uint64(elfsym)<<32) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_ADD)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) ++ out.Write64(uint64(0xc)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SR)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) ++ out.Write64(uint64(0xc)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SL)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SUB)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_10_12)) ++ out.Write64(uint64(0x0)) ++ ++ case objabi.R_LOONG64_GOTPCREL_HI: ++ symgot := ld.ElfSymForReloc(ctxt, ldr.LookupOrCreateSym("_GLOBAL_OFFSET_TABLE_", 0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(symgot)<<32) ++ out.Write64(uint64(0x800)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_GPREL) | uint64(elfsym)<<32) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_ADD)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) ++ out.Write64(uint64(0xc)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SR)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_5_20)) ++ out.Write64(uint64(0x0)) ++ ++ case objabi.R_LOONG64_GOTPCREL_LO: ++ symgot := ld.ElfSymForReloc(ctxt, ldr.LookupOrCreateSym("_GLOBAL_OFFSET_TABLE_", 0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(symgot)<<32) ++ out.Write64(uint64(0x4)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_GPREL) | uint64(elfsym)<<32) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_ADD)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(symgot)<<32) ++ out.Write64(uint64(0x804)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_GPREL) | uint64(elfsym)<<32) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_ADD)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) ++ out.Write64(uint64(0xc)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SR)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE)) ++ out.Write64(uint64(0xc)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SL)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_SUB)) ++ out.Write64(uint64(0x0)) ++ ++ out.Write64(uint64(sectoff)) ++ out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_10_12)) ++ out.Write64(uint64(0x0)) ++ ++ // The pcaddu12i + addi.d instructions is used to obtain address of a symbol on Loong64. ++ // The low 12-bit of the symbol address need to be added. The addi.d instruction have ++ // signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced ++ // to do sign extending from 12 bits. The 0x804 is 0x800 + 4, 4 is instruction bit ++ // width on Loong64 and is used to correct the PC of the addi.d instruction. + case objabi.R_ADDRLOONG64: + out.Write64(uint64(sectoff)) + out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32) +@@ -179,6 +338,12 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade + nExtReloc = 2 + } + return val, nExtReloc, true ++ case objabi.R_LOONG64_TLS_GD_PCREL_HI, ++ objabi.R_LOONG64_GOTPCREL_HI: ++ return val, 6, true ++ case objabi.R_LOONG64_TLS_GD_PCREL_LO, ++ objabi.R_LOONG64_GOTPCREL_LO: ++ return val, 12, true + } + } + +@@ -222,6 +387,8 @@ func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc, sym.RelocVariant + func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sym) (loader.ExtReloc, bool) { + switch r.Type() { + case objabi.R_ADDRLOONG64, ++ objabi.R_LOONG64_GOTPCREL_HI, ++ objabi.R_LOONG64_GOTPCREL_LO, + objabi.R_ADDRLOONG64U: + return ld.ExtrelocViaOuterSym(ldr, r, s), true + +@@ -230,7 +397,9 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy + objabi.R_CONST, + objabi.R_GOTOFF, + objabi.R_CALLLOONG64, +- objabi.R_JMPLOONG64: ++ objabi.R_JMPLOONG64, ++ objabi.R_LOONG64_TLS_GD_PCREL_HI, ++ objabi.R_LOONG64_TLS_GD_PCREL_LO: + return ld.ExtrelocSimple(ldr, r), true + } + return loader.ExtReloc{}, false +-- +2.27.0 + diff --git a/0079-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch b/0079-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch new file mode 100644 index 0000000000000000000000000000000000000000..16a79647bc4124d5e6a65f72e450dd0b1c9bc994 --- /dev/null +++ b/0079-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch @@ -0,0 +1,27 @@ +From 07e134c03538e4720d88bbb05a3add6ac961c617 Mon Sep 17 00:00:00 2001 +From: limeidan +Date: Mon, 22 Aug 2022 20:24:21 +0800 +Subject: [PATCH 79/80] cmd/internal/sys: enable c-shared feature on loong64 + +Signed-off-by: limeidan +Change-Id: Ie694a67cdbd5e63026c9118c823fbc8e2a2a2225 +--- + src/cmd/internal/sys/supported.go | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/cmd/internal/sys/supported.go b/src/cmd/internal/sys/supported.go +index 0d2bad9612..4c7b8062d8 100644 +--- a/src/cmd/internal/sys/supported.go ++++ b/src/cmd/internal/sys/supported.go +@@ -70,7 +70,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { + + case "c-shared": + switch platform { +- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/ppc64le", "linux/s390x", ++ case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/loong64", "linux/ppc64le", "linux/s390x", + "android/amd64", "android/arm", "android/arm64", "android/386", + "freebsd/amd64", + "darwin/amd64", "darwin/arm64", +-- +2.27.0 + diff --git a/0080-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch b/0080-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch new file mode 100644 index 0000000000000000000000000000000000000000..e0ef171df5e5f05f90b3f5c0df64b5b8c3750372 --- /dev/null +++ b/0080-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch @@ -0,0 +1,56 @@ +From 49b08c3de4627c013ac4a61b99f247901fded45e Mon Sep 17 00:00:00 2001 +From: limeidan +Date: Thu, 25 Aug 2022 17:23:29 +0800 +Subject: [PATCH 80/80] cmd/dist, misc/cgo/testcshared: enable c-shared test on + loong64 + +Signed-off-by: limeidan +Change-Id: Idef995fe8be1a466369bd7332259846f2f147884 +--- + misc/cgo/testcshared/testdata/libgo2/dup2.go | 2 +- + misc/cgo/testcshared/testdata/libgo2/dup3.go | 2 +- + src/cmd/dist/test.go | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/misc/cgo/testcshared/testdata/libgo2/dup2.go b/misc/cgo/testcshared/testdata/libgo2/dup2.go +index d18f0b130d..1f3db81227 100644 +--- a/misc/cgo/testcshared/testdata/libgo2/dup2.go ++++ b/misc/cgo/testcshared/testdata/libgo2/dup2.go +@@ -2,7 +2,7 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-// +build darwin dragonfly freebsd linux,!arm64 netbsd openbsd ++// +build darwin dragonfly freebsd linux,!arm64,!loong64 netbsd openbsd + + package main + +diff --git a/misc/cgo/testcshared/testdata/libgo2/dup3.go b/misc/cgo/testcshared/testdata/libgo2/dup3.go +index c9c65a6e3c..cf19b76ce8 100644 +--- a/misc/cgo/testcshared/testdata/libgo2/dup3.go ++++ b/misc/cgo/testcshared/testdata/libgo2/dup3.go +@@ -2,7 +2,7 @@ + // Use of this source code is governed by a BSD-style + // license that can be found in the LICENSE file. + +-// +build linux,arm64 ++// +build linux,arm64 linux,loong64 + + package main + +diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go +index 6e11eab048..622897d5ba 100644 +--- a/src/cmd/dist/test.go ++++ b/src/cmd/dist/test.go +@@ -1049,7 +1049,7 @@ func (t *tester) supportedBuildmode(mode string) bool { + return false + case "c-shared": + switch pair { +- case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-ppc64le", "linux-s390x", ++ case "linux-386", "linux-amd64", "linux-arm", "linux-arm64", "linux-loong64", "linux-ppc64le", "linux-s390x", + "darwin-amd64", "darwin-arm64", + "freebsd-amd64", + "android-arm", "android-arm64", "android-386", +-- +2.27.0 + diff --git a/golang.spec b/golang.spec index 26164f44c3c1d63b8bb50dff3ed964c214c03e2c..e7598889cd042fd42522995a8b6a4e9196fddc2e 100644 --- a/golang.spec +++ b/golang.spec @@ -101,7 +101,7 @@ %global go_api 1.17 %global go_version 1.17.12 %global pkg_release 1 -%global anolis_release .0.1 +%global anolis_release .0.2 Name: golang Version: %{go_version} @@ -204,6 +204,29 @@ Patch0053: 0053-internal-cpu-fix-cpu-cacheLineSize-for-loong64.patch Patch0054: 0054-syscall-runtime-internal-syscall-always-zero-the-hig.patch Patch0055: 0055-runtime-clean-up-unused-function-gosave-on-loong64.patch Patch0056: 0056-debug-pe-add-IMAGE_FILE_MACHINE_LOONGARCH-64-32.patch +Patch0058: 0058-fixup-fix-stack-growth-after-fork-in-runtime.sigfill.patch +Patch0059: 0059-cmd-compile-remove-the-resultInArg0-register-checks-.patch +Patch0060: 0060-runtime-remove-the-fake-mstart-caller-in-systemstack.patch +Patch0061: 0061-runtime-minor-refactoring-of-_rt0_loong64_linux.patch +Patch0062: 0062-runtime-fix-gcWriteBarrier-frame-size-on-loong64-mip.patch +Patch0063: 0063-cmd-internal-obj-loong64-remove-invalid-branch-delay.patch +Patch0064: 0064-cmd-compile-cmd-internal-obj-rename-loong64-instruct.patch +Patch0065: 0065-math-implement-Sqrt-in-assembly-for-loong64.patch +Patch0066: 0066-cmd-asm-add-RDTIME-L-H-.W-RDTIME.D-support-for-loong.patch +Patch0067: 0067-runtime-use-StableCounter-implement-cputicks-on-linu.patch +Patch0068: 0068-debug-elf-add-new-style-LoongArch-reloc-types.patch +Patch0069: 0069-cmd-link-recognize-the-new-R_LARCH_32_PCREL-type-on-.patch +Patch0070: 0070-runtime-fix-runtime.usleep-on-linux-loong64.patch +Patch0071: 0071-cmd-internal-obj-remove-redundant-cnames-on-loong64.patch +Patch0072: 0072-runtime-save-fetch-g-register-during-VDSO-on-loong64.patch +Patch0073: 0073-runtime-save-restore-callee-saved-registers-in-loong.patch +Patch0074: 0074-runtime-add-comment-for-sys_linux_loong64.patch +Patch0075: 0075-runtime-add-support-for-buildmode-c-shared-on-loong6.patch +Patch0076: 0076-cmd-compile-add-support-for-buildmode-c-shared-on-lo.patch +Patch0077: 0077-cmd-internal-obj-loong64-cmd-internal-objabi-add-c-s.patch +Patch0078: 0078-cmd-link-add-support-for-buildmode-c-shared-on-loong.patch +Patch0079: 0079-cmd-internal-sys-enable-c-shared-feature-on-loong64.patch +Patch0080: 0080-cmd-dist-misc-cgo-testcshared-enable-c-shared-test-o.patch # Having documentation separate was broken Obsoletes: %{name}-docs < 1.1-4 @@ -567,6 +590,31 @@ cd .. %endif %changelog +* Tue Sep 27 2022 Guoqi Chen - 1.17.12-1.0.2 +- fixup: fix stack growth after fork in runtime.sigfillset +- cmd/compile: remove the resultInArg0 register checks on linux/loong64 +- runtime: remove the fake mstart caller in systemstack on linux/loong64 +- runtime: minor refactoring of _rt0_loong64_linux +- runtime: fix gcWriteBarrier frame size on loong64,mipsx,mips64x +- cmd/internal/obj/loong64: remove invalid branch delay slots +- cmd/compile,cmd/internal/obj: rename loong64 instructions SQRT{F,D} to FSQRT{S,D} +- math: implement Sqrt in assembly for loong64 +- cmd/asm: add RDTIME{L,H}.W, RDTIME.D support for loong64 +- runtime: use StableCounter implement cputicks() on linux/loong64 +- debug/elf: add new-style LoongArch reloc types +- cmd/link: recognize the new R_LARCH_32_PCREL type on loong64 +- runtime: fix runtime.usleep() on linux/loong64 +- cmd/internal/obj: remove redundant cnames on loong64 +- runtime: save/fetch g register during VDSO on loong64 +- runtime: save/restore callee-saved registers in loong64's sigtramp +- runtime: add comment for sys_linux_loong64 +- runtime: add support for --buildmode=c-shared on loong64 +- cmd/compile: add support for --buildmode=c-shared on loong64 +- cmd/internal/obj/loong64, cmd/internal/objabi: add c-shared relocations on loong64 +- cmd/link: add support for --buildmode=c-shared on loong64 +- cmd/internal/sys: enable c-shared feature on loong64 +- cmd/dist, misc/cgo/testcshared: enable c-shared test on loong64 + * Tue Aug 02 2022 Guoqi Chen - 1.17.12-1.0.1 - Add loongarch support (Guoqi Chen)