From c4b1fb4cfe3d4773b820b726c6ed031f348363fb Mon Sep 17 00:00:00 2001 From: panxuefeng Date: Sat, 16 Nov 2024 14:44:47 +0800 Subject: [PATCH] upgrade LoongArch64 port to 11.0.25 --- download | 2 +- java-11-openjdk.spec | 84 +- jdk11-LoongArch64.patch | 17229 ++++++++++-------------------- rh1750419-redhat_alt_java.patch | 27 +- 4 files changed, 5949 insertions(+), 11393 deletions(-) diff --git a/download b/download index d40396a..c6ed1f9 100644 --- a/download +++ b/download @@ -1,2 +1,2 @@ -0fd1fc1d8f823d32a8dfe48e7ff9ff4d openjdk-jdk11u-jdk-11.0.17+8-4curve.tar.xz +0cb6c840210589a383f174ce0c52f13a openjdk-jdk11u-jdk-11.0.25+9.tar.xz 5d441d6217cc75372ca5a0943997cb24 tapsets-icedtea-6.0.0pre00-c848b93a8598.tar.xz diff --git a/java-11-openjdk.spec b/java-11-openjdk.spec index 5c9004f..4a775bd 100644 --- a/java-11-openjdk.spec +++ b/java-11-openjdk.spec @@ -13,7 +13,7 @@ # Only produce a release build on x86_64: # $ rhpkg mockbuild --without slowdebug --without fastdebug -%global anolis_release 4 +%global anolis_release 1 # Enable fastdebug builds by default on relevant arches. %bcond_without fastdebug # Enable slowdebug builds by default on relevant arches. @@ -125,7 +125,6 @@ # Set of architectures which support SystemTap tapsets %global systemtap_arches %{jit_arches} # Set of architectures with a Ahead-Of-Time (AOT) compiler -%global aot_arches x86_64 # Set of architectures which support the serviceability agent %global sa_arches loongarch64 # Set of architectures which support class data sharing @@ -133,11 +132,8 @@ # However, it does segfault on the Zero assembler port, so currently JIT only %global share_arches %{jit_arches} # Set of architectures for which we build the Shenandoah garbage collector -%global shenandoah_arches x86_64 # Set of architectures for which we build the Z garbage collector -%global zgc_arches x86_64 # Set of architectures for which alt-java has SSB mitigation -%global ssbd_arches x86_64 # Set of architectures where we verify backtraces with gdb %global gdb_arches %{jit_arches} @@ -153,22 +149,12 @@ %endif # On certain architectures, we compile the Shenandoah GC -%ifarch %{shenandoah_arches} -%global use_shenandoah_hotspot 1 -%global shenandoah_feature shenandoahgc -%else %global use_shenandoah_hotspot 0 %global shenandoah_feature -shenandoahgc -%endif # On certain architectures, we compile the ZGC -%ifarch %{zgc_arches} -%global use_zgc_hotspot 1 -%global zgc_feature zgc -%else %global use_zgc_hotspot 0 %global zgc_feature -zgc -%endif # By default, we build a fastdebug build during main build only on fastdebug architectures %if %{with fastdebug} @@ -279,7 +265,7 @@ # New Version-String scheme-style defines %global featurever 11 %global interimver 0 -%global updatever 17 +%global updatever 25 %global patchver 0 # buildjdkver is usually same as %%{featurever}, # but in time of bootstrap of next jdk, it is featurever-1, @@ -298,13 +284,19 @@ %global icedteaver 6.0.0pre00-c848b93a8598 # Define current Git revision for the FIPS support patches %global fipsver 9087e80d0ab +%global javaver %{featurever} +%global newjavaver %{featurever}.%{interimver}.%{updatever}.%{patchver} +# Strip up to 6 trailing zeros in newjavaver, as the JDK does, to get the correct version used in filenames +%global filever %(svn=%{newjavaver}; for i in 1 2 3 4 5 6 ; do svn=${svn%%.0} ; done; echo ${svn}) +# The tag used to create the OpenJDK tarball +%global vcstag jdk-%{filever}+%{buildver}%{?tagsuffix:-%{tagsuffix}} # Standard JPackage naming and versioning defines %global origin openjdk %global origin_nice OpenJDK -%global top_level_dir_name %{origin} +%global top_level_dir_name %{vcstag} %global top_level_dir_name_backup %{top_level_dir_name}-backup -%global buildver 8 +%global buildver 9 %global rpmrelease 2 #%%global tagsuffix %%{nil} # Priority must be 8 digits in total; up to openjdk 1.8, we were using 18..... so when we moved to 11, we had to add another digit @@ -319,15 +311,6 @@ # for techpreview, using 1, so slowdebugs can have 0 %global priority %( printf '%08d' 1 ) %endif -%global newjavaver %{featurever}.%{interimver}.%{updatever}.%{patchver} - -# Strip up to 6 trailing zeros in newjavaver, as the JDK does, to get the correct version used in filenames -%global filever %(svn=%{newjavaver}; for i in 1 2 3 4 5 6 ; do svn=${svn%%.0} ; done; echo ${svn}) - -# The tag used to create the OpenJDK tarball -%global vcstag jdk-%{filever}+%{buildver}%{?tagsuffix:-%{tagsuffix}} - -%global javaver %{featurever} # Define milestone (EA for pre-releases, GA for releases) # Release will be (where N is usually a number starting at 1): @@ -583,9 +566,6 @@ key=javac alternatives \\ --install %{_bindir}/javac $key %{sdkbindir -- %{?1}}/javac $PRIORITY --family %{family} \\ --slave %{_jvmdir}/java java_sdk %{_jvmdir}/%{sdkdir -- %{?1}} \\ -%ifarch %{aot_arches} - --slave %{_bindir}/jaotc jaotc %{sdkbindir -- %{?1}}/jaotc \\ -%endif --slave %{_bindir}/jlink jlink %{sdkbindir -- %{?1}}/jlink \\ --slave %{_bindir}/jmod jmod %{sdkbindir -- %{?1}}/jmod \\ %ifarch %{sa_arches} @@ -919,9 +899,6 @@ exit 0 %{_jvmdir}/%{sdkdir -- %{?1}}/bin/jstatd %{_jvmdir}/%{sdkdir -- %{?1}}/bin/rmic %{_jvmdir}/%{sdkdir -- %{?1}}/bin/serialver -%ifarch %{aot_arches} -%{_jvmdir}/%{sdkdir -- %{?1}}/bin/jaotc -%endif %{_jvmdir}/%{sdkdir -- %{?1}}/include %{_jvmdir}/%{sdkdir -- %{?1}}/lib/ct.sym %if %{with_systemtap} @@ -1215,7 +1192,7 @@ URL: http://openjdk.java.net/ # to regenerate source0 (jdk) run update_package.sh # update_package.sh contains hard-coded repos, revisions, tags, and projects to regenerate the source archives -Source0: openjdk-jdk%{featurever}u-%{vcstag}-4curve.tar.xz +Source0: openjdk-jdk%{featurever}u-%{vcstag}.tar.xz # Use 'icedtea_sync.sh' to update the following # They are based on code contained in the IcedTea project (6.x). @@ -1717,27 +1694,25 @@ sh %{SOURCE12} %{top_level_dir_name} # Patch the JDK pushd %{top_level_dir_name} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 +%patch -P1 -p1 +%patch -P3 -p1 # Add crypto policy and FIPS support -%patch1001 -p1 +%ifnarch loongarch64 +%patch -P1001 -p1 # nss.cfg PKCS11 support; must come last as it also alters java.security -%patch1000 -p1 -# tzdata updates targetted for 11.0.18 -%patch2001 -p1 -%patch2002 -p1 -%patch2003 -p1 +%patch -P1000 -p1 +# PKCS11 SHA3 backport +%patch -P2002 -p1 +%endif +# alt-java +%patch -P600 -p1 +# RSA default +%patch -P1003 -p1 %ifarch loongarch64 -%patch3000 -p1 +%patch -P3000 -p1 %endif popd # openjdk -%patch600 -%patch1003 - -%patch8 - # Extract systemtap tapsets %if %{with_systemtap} tar --strip-components=1 -x -I xz -f %{SOURCE8} @@ -2048,11 +2023,13 @@ $JAVA_HOME/bin/java $(echo $(basename %{SOURCE14})|sed "s|\.java||") # Check system crypto (policy) is active and can be disabled # Test takes a single argument - true or false - to state whether system # security properties are enabled or not. +%ifnarch loongarch64 $JAVA_HOME/bin/javac -d . %{SOURCE15} export PROG=$(echo $(basename %{SOURCE15})|sed "s|\.java||") export SEC_DEBUG="-Djava.security.debug=properties" $JAVA_HOME/bin/java ${SEC_DEBUG} ${PROG} true $JAVA_HOME/bin/java ${SEC_DEBUG} -Djava.security.disableSystemPropertiesFile=true ${PROG} false +%endif # Check correct vendor values have been set $JAVA_HOME/bin/javac -d . %{SOURCE16} @@ -2062,16 +2039,14 @@ $JAVA_HOME/bin/java $(echo $(basename %{SOURCE16})|sed "s|\.java||") "%{oj_vendo if ! nm $JAVA_HOME/bin/java | grep set_speculation ; then true ; else false; fi # Check alt-java launcher has SSB mitigation on supported architectures -%ifarch %{ssbd_arches} -nm $JAVA_HOME/bin/%{alt_java_name} | grep set_speculation -%else if ! nm $JAVA_HOME/bin/%{alt_java_name} | grep set_speculation ; then true ; else false; fi -%endif # Check translations are available for new timezones +%ifnarch loongarch64 $JAVA_HOME/bin/javac -d . %{SOURCE18} $JAVA_HOME/bin/java $(echo $(basename %{SOURCE18})|sed "s|\.java||") JRE $JAVA_HOME/bin/java -Djava.locale.providers=CLDR $(echo $(basename %{SOURCE18})|sed "s|\.java||") CLDR +%endif %if %{include_staticlibs} # Check debug symbols in static libraries (smoke test) @@ -2552,6 +2527,9 @@ end %endif %changelog +* Sat Nov 15 2024 Pan Xuefeng - 1:11.0.25.0.9-1 +- update LoongArch64 port to 11.0.25 + * Thu Nov 09 2023 Leslie Zhai - 1:11.0.17.0.8-4 - Disable gdb diff --git a/jdk11-LoongArch64.patch b/jdk11-LoongArch64.patch index 00f5bb3..857e73e 100644 --- a/jdk11-LoongArch64.patch +++ b/jdk11-LoongArch64.patch @@ -1,7 +1,42 @@ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/hotspot.m4 jdk11u-ls/make/autoconf/hotspot.m4 ---- openjdk/make/autoconf/hotspot.m4 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/make/autoconf/hotspot.m4 2023-11-01 09:34:25.289945041 +0800 -@@ -34,6 +34,12 @@ +commit ebdf1aca20909b6171e08074c81c5e3a1a8b604c +Author: panxuefeng +Date: Fri Nov 15 10:17:40 2024 +0800 + + LoongArch support + +diff --git a/make/CompileJavaModules.gmk b/make/CompileJavaModules.gmk +index 46fb9b421..c6d8b24fc 100644 +--- a/make/CompileJavaModules.gmk ++++ b/make/CompileJavaModules.gmk +@@ -430,6 +430,7 @@ jdk.internal.vm.ci_ADD_JAVAC_FLAGS += -parameters -Xlint:-exports -XDstringConca + + jdk.internal.vm.compiler_ADD_JAVAC_FLAGS += -parameters -XDstringConcat=inline \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.aarch64=jdk.internal.vm.compiler \ ++ --add-exports jdk.internal.vm.ci/jdk.vm.ci.loongarch64=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.amd64=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.code=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.code.site=jdk.internal.vm.compiler \ +@@ -437,6 +438,7 @@ jdk.internal.vm.compiler_ADD_JAVAC_FLAGS += -parameters -XDstringConcat=inline \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.common=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.aarch64=jdk.internal.vm.compiler \ ++ --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.loongarch64=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.amd64=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.sparc=jdk.internal.vm.compiler \ + --add-exports jdk.internal.vm.ci/jdk.vm.ci.meta=jdk.internal.vm.compiler \ +@@ -456,6 +458,7 @@ jdk.internal.vm.compiler_EXCLUDES += \ + org.graalvm.compiler.api.directives.test \ + org.graalvm.compiler.api.test \ + org.graalvm.compiler.asm.aarch64.test \ ++ org.graalvm.compiler.asm.loongarch64.test \ + org.graalvm.compiler.asm.amd64.test \ + org.graalvm.compiler.asm.sparc.test \ + org.graalvm.compiler.asm.test \ +diff --git a/make/autoconf/hotspot.m4 b/make/autoconf/hotspot.m4 +index 9bb34363e..c95a2447e 100644 +--- a/make/autoconf/hotspot.m4 ++++ b/make/autoconf/hotspot.m4 +@@ -34,6 +34,12 @@ DEPRECATED_JVM_FEATURES="trace" # All valid JVM variants VALID_JVM_VARIANTS="server client minimal core zero custom" @@ -14,7 +49,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/hotspot.m4 j ############################################################################### # Check if the specified JVM variant should be built. To be used in shell if # constructs, like this: -@@ -334,6 +340,26 @@ +@@ -340,6 +346,26 @@ AC_DEFUN_ONCE([HOTSPOT_SETUP_JVM_FEATURES], HOTSPOT_TARGET_CPU_ARCH=arm fi @@ -41,7 +76,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/hotspot.m4 j # Verify that dependencies are met for explicitly set features. if HOTSPOT_CHECK_JVM_FEATURE(jvmti) && ! HOTSPOT_CHECK_JVM_FEATURE(services); then AC_MSG_ERROR([Specified JVM feature 'jvmti' requires feature 'services']) -@@ -418,10 +444,11 @@ +@@ -424,10 +450,11 @@ AC_DEFUN_ONCE([HOTSPOT_SETUP_JVM_FEATURES], JVM_FEATURES_jvmci="" INCLUDE_JVMCI="false" else @@ -55,9 +90,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/hotspot.m4 j AC_MSG_RESULT([yes]) JVM_FEATURES_jvmci="jvmci" INCLUDE_JVMCI="true" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 jdk11u-ls/make/autoconf/platform.m4 ---- openjdk/make/autoconf/platform.m4 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/make/autoconf/platform.m4 2023-11-01 09:34:25.297945050 +0800 +diff --git a/make/autoconf/platform.m4 b/make/autoconf/platform.m4 +index 5d1d9efa3..815180ea9 100644 +--- a/make/autoconf/platform.m4 ++++ b/make/autoconf/platform.m4 @@ -23,6 +23,12 @@ # questions. # @@ -71,7 +107,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 # Support macro for PLATFORM_EXTRACT_TARGET_AND_BUILD. # Converts autoconf style CPU name to OpenJDK style, into # VAR_CPU, VAR_CPU_ARCH, VAR_CPU_BITS and VAR_CPU_ENDIAN. -@@ -554,6 +560,12 @@ +@@ -554,6 +560,12 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS_HELPER], HOTSPOT_$1_CPU_DEFINE=PPC64 elif test "x$OPENJDK_$1_CPU" = xppc64le; then HOTSPOT_$1_CPU_DEFINE=PPC64 @@ -84,77 +120,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 # The cpu defines below are for zero, we don't support them directly. elif test "x$OPENJDK_$1_CPU" = xsparc; then -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/CompileJavaModules.gmk jdk11u-ls/make/CompileJavaModules.gmk ---- openjdk/make/CompileJavaModules.gmk 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/make/CompileJavaModules.gmk 2023-11-01 09:34:25.261945010 +0800 -@@ -434,6 +434,7 @@ - - jdk.internal.vm.compiler_ADD_JAVAC_FLAGS += -parameters -XDstringConcat=inline \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.aarch64=jdk.internal.vm.compiler \ -+ --add-exports jdk.internal.vm.ci/jdk.vm.ci.loongarch64=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.amd64=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.code=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.code.site=jdk.internal.vm.compiler \ -@@ -441,6 +442,7 @@ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.common=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.aarch64=jdk.internal.vm.compiler \ -+ --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.loongarch64=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.amd64=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.hotspot.sparc=jdk.internal.vm.compiler \ - --add-exports jdk.internal.vm.ci/jdk.vm.ci.meta=jdk.internal.vm.compiler \ -@@ -460,6 +462,7 @@ - org.graalvm.compiler.api.directives.test \ - org.graalvm.compiler.api.test \ - org.graalvm.compiler.asm.aarch64.test \ -+ org.graalvm.compiler.asm.loongarch64.test \ - org.graalvm.compiler.asm.amd64.test \ - org.graalvm.compiler.asm.sparc.test \ - org.graalvm.compiler.asm.test \ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/lib/Lib-jdk.crypto.ec.gmk jdk11u-ls/make/lib/Lib-jdk.crypto.ec.gmk ---- openjdk/make/lib/Lib-jdk.crypto.ec.gmk 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/make/lib/Lib-jdk.crypto.ec.gmk 2023-09-12 13:54:22.869571381 +0800 -@@ -43,7 +43,7 @@ - TOOLCHAIN := TOOLCHAIN_LINK_CXX, \ - OPTIMIZATION := LOW, \ - CFLAGS := $(BUILD_LIBSUNEC_CFLAGS_JDKLIB) \ -- -DMP_API_COMPATIBLE, \ -+ -DMP_API_COMPATIBLE -DNSS_ECC_MORE_THAN_SUITE_B, \ - CXXFLAGS := $(BUILD_LIBSUNEC_CXXFLAGS_JDKLIB), \ - DISABLED_WARNINGS_gcc := sign-compare implicit-fallthrough, \ - DISABLED_WARNINGS_microsoft := 4101 4244 4146 4018, \ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp jdk11u-ls/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp 2023-09-12 13:54:22.977571517 +0800 -@@ -52,3 +52,24 @@ - "wrong type for addresses"); - } - #endif // PRODUCT -+ -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info) { -+ cmp(condition, left, right, info); -+ branch(condition, type, tgt); -+} -+ -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BasicType type, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BasicType type, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BasicType type, CodeStub*, CodeEmitInfo*); -+ -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, type, block, unordered); -+} -+ -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp jdk11u-ls/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2023-09-12 13:54:22.977571517 +0800 -@@ -1123,7 +1123,9 @@ +diff --git a/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp +index fdd2c0ca3..318191233 100644 +--- a/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp ++++ b/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp +@@ -1123,7 +1123,9 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { } } @@ -165,7 +135,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1 void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { LIR_Opr src = op->in_opr(); -@@ -1663,6 +1665,10 @@ +@@ -1663,6 +1665,10 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L __ csel(result->as_register(), opr1->as_register(), opr2->as_register(), acond); } @@ -176,10 +146,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp jdk11u-ls/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp 2023-11-01 09:34:25.457945227 +0800 -@@ -277,18 +277,29 @@ +diff --git a/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp +index 18b3ea147..f3398e191 100644 +--- a/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp ++++ b/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp +@@ -262,18 +262,29 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { __ store(reg, addr); } @@ -213,11 +184,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIR_arm.cpp jdk11u-ls/src/hotspot/cpu/arm/c1_LIR_arm.cpp ---- openjdk/src/hotspot/cpu/arm/c1_LIR_arm.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/arm/c1_LIR_arm.cpp 2023-09-12 13:54:23.041571597 +0800 -@@ -84,3 +84,24 @@ - #endif // AARCH64 +diff --git a/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp +index ce75dc552..74c4b7e55 100644 +--- a/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp ++++ b/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp +@@ -52,3 +52,24 @@ void LIR_Address::verify() const { + "wrong type for addresses"); } #endif // PRODUCT + @@ -241,10 +213,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIR + cmp(condition, left, right); + cmove(condition, src1, src2, dst, type); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp jdk11u-ls/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp ---- openjdk/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp 2023-09-12 13:54:23.041571597 +0800 -@@ -1150,6 +1150,9 @@ +diff --git a/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp b/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp +index f0a7229aa..29db21f97 100644 +--- a/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp ++++ b/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp +@@ -1150,6 +1150,9 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { __ b(*(op->label()), acond); } @@ -254,7 +227,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIR void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { LIR_Opr src = op->in_opr(); -@@ -3082,6 +3085,10 @@ +@@ -3082,6 +3085,10 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) { __ bind(*stub->continuation()); } @@ -265,10 +238,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIR #ifdef ASSERT // emit run-time assertion void LIR_Assembler::emit_assert(LIR_OpAssert* op) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp jdk11u-ls/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp ---- openjdk/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp 2023-09-12 13:54:23.041571597 +0800 -@@ -423,18 +423,27 @@ +diff --git a/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp b/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp +index b05fc876f..b3c1afe69 100644 +--- a/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp ++++ b/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp +@@ -423,18 +423,27 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { __ move(temp, addr); } @@ -301,9 +275,40 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIR bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { assert(left != result, "should be different registers"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp 2023-09-12 13:54:23.081571647 +0800 +diff --git a/src/hotspot/cpu/arm/c1_LIR_arm.cpp b/src/hotspot/cpu/arm/c1_LIR_arm.cpp +index 806da3202..5305fe371 100644 +--- a/src/hotspot/cpu/arm/c1_LIR_arm.cpp ++++ b/src/hotspot/cpu/arm/c1_LIR_arm.cpp +@@ -84,3 +84,24 @@ void LIR_Address::verify() const { + #endif // AARCH64 + } + #endif // PRODUCT ++ ++template ++void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info) { ++ cmp(condition, left, right, info); ++ branch(condition, type, tgt); ++} ++ ++// Explicit instantiation for all supported types. ++template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BasicType type, Label*, CodeEmitInfo*); ++template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BasicType type, BlockBegin*, CodeEmitInfo*); ++template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BasicType type, CodeStub*, CodeEmitInfo*); ++ ++void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered) { ++ cmp(condition, left, right); ++ branch(condition, type, block, unordered); ++} ++ ++void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { ++ cmp(condition, left, right); ++ cmove(condition, src1, src2, dst, type); ++} +diff --git a/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp +new file mode 100644 +index 000000000..0412b9953 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -437,10 +442,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + *interpreter_frame->interpreter_frame_mirror_addr() = method->method_holder()->java_mirror(); +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.cpp 2023-11-01 09:34:25.477945249 +0800 -@@ -0,0 +1,850 @@ +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.cpp b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp +new file mode 100644 +index 000000000..e6e62ccca +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp +@@ -0,0 +1,849 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -852,7 +859,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ldx_w(dst, base, AT); + } + } -+//Disassembler::decode(pc()-32, pc(), tty); +} + +void Assembler::ld_wu(Register rd, Address src){ @@ -1291,10 +1297,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.hpp 2023-11-01 09:34:25.477945249 +0800 -@@ -0,0 +1,2804 @@ +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp +new file mode 100644 +index 000000000..179da7bd0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp +@@ -0,0 +1,2827 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -2611,6 +2619,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static int high6 (int x) { return high(x, 6); } + + ++ static ALWAYSINLINE void patch(address a, int length, uint32_t val) { ++ guarantee(val < (1ULL << length), "Field too big for insn"); ++ guarantee(length > 0, "length > 0"); ++ unsigned target = *(unsigned *)a; ++ target = (target >> length) << length; ++ target |= val; ++ *(unsigned *)a = target; ++ } ++ + protected: + // help methods for instruction ejection + @@ -2856,10 +2873,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + AbstractAssembler::flush(); + } + -+ inline void emit_int32(int); ++ inline void emit_int32(int x) { ++ AbstractAssembler::emit_int32(x); ++ } ++ + inline void emit_data(int x) { emit_int32(x); } -+ inline void emit_data(int, RelocationHolder const&); -+ inline void emit_data(int, relocInfo::relocType rtype); ++ inline void emit_data(int x, relocInfo::relocType rtype) { ++ relocate(rtype); ++ emit_int32(x); ++ } ++ ++ inline void emit_data(int x, RelocationHolder const& rspec) { ++ relocate(rspec); ++ emit_int32(x); ++ } + + + // Generic instructions @@ -3314,18 +3341,25 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void bceqz(ConditionalFlagRegister cj, Label& L) { bceqz(cj, target(L)); } + void bcnez(ConditionalFlagRegister cj, Label& L) { bcnez(cj, target(L)); } + -+ // Now Membar_mask_bits is 0,Need to fix it after LA6000 + typedef enum { -+ StoreStore = 0, -+ LoadStore = 0, -+ StoreLoad = 0, -+ LoadLoad = 0, -+ AnyAny = 0 ++ // hint[4] ++ Completion = 0, ++ Ordering = (1 << 4), ++ ++ // The bitwise-not of the below constants is corresponding to the hint. This is convenient for OR operation. ++ // hint[3:2] and hint[1:0] ++ LoadLoad = ((1 << 3) | (1 << 1)), ++ LoadStore = ((1 << 3) | (1 << 0)), ++ StoreLoad = ((1 << 2) | (1 << 1)), ++ StoreStore = ((1 << 2) | (1 << 0)), ++ AnyAny = ((3 << 2) | (3 << 0)), + } Membar_mask_bits; + + // Serializes memory and blows flags + void membar(Membar_mask_bits hint) { -+ dbar(hint); ++ assert((hint & (3 << 0)) != 0, "membar mask unsupported!"); ++ assert((hint & (3 << 2)) != 0, "membar mask unsupported!"); ++ dbar(Ordering | (~hint & 0xf)); + } + + // LSX and LASX @@ -4095,14 +4129,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static address locate_next_instruction(address inst); +}; + -+ -+#include "assembler_loongarch.inline.hpp" -+ +#endif // CPU_LOONGARCH_ASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp jdk11u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp 2023-11-01 09:34:25.477945249 +0800 -@@ -0,0 +1,47 @@ +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp +new file mode 100644 +index 000000000..9ca0cd450 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp +@@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -4135,24 +4168,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "asm/codeBuffer.hpp" +#include "code/codeCache.hpp" + -+inline void Assembler::emit_int32(int x) { -+ AbstractAssembler::emit_int32(x); -+} -+ -+inline void Assembler::emit_data(int x, relocInfo::relocType rtype) { -+ relocate(rtype); -+ emit_int32(x); -+} -+ -+inline void Assembler::emit_data(int x, RelocationHolder const& rspec) { -+ relocate(rspec); -+ emit_int32(x); -+} -+ +#endif // CPU_LOONGARCH_ASSEMBLER_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/bytes_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/bytes_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/bytes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/bytes_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 +diff --git a/src/hotspot/cpu/loongarch/bytes_loongarch.hpp b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp +new file mode 100644 +index 000000000..c15344eb3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp @@ -0,0 +1,73 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4227,9 +4248,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include OS_CPU_HEADER_INLINE(bytes) + +#endif // CPU_LOONGARCH_BYTES_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp +new file mode 100644 +index 000000000..c0eeb6396 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp @@ -0,0 +1,344 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -4575,9 +4598,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#undef __ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp +new file mode 100644 +index 000000000..1140e4443 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. @@ -4658,9 +4683,49 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_C1_DEFS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp +new file mode 100644 +index 000000000..bd8578c72 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp +@@ -0,0 +1,32 @@ ++/* ++ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++ ++// No FPU stack on LoongArch ++class FpuStackSim; ++ ++#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp +new file mode 100644 +index 000000000..1a89c437a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved. @@ -4693,13 +4758,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +// No FPU stack on LoongArch64 +#include "precompiled.hpp" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,32 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp +new file mode 100644 +index 000000000..4f0cf0536 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp +@@ -0,0 +1,143 @@ +/* -+ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -4722,16 +4789,129 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP + -+// No FPU stack on LoongArch -+class FpuStackSim; ++// On LoongArch64 the frame looks as follows: ++// ++// +-----------------------------+---------+----------------------------------------+----------------+----------- ++// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . ++// +-----------------------------+---------+----------------------------------------+----------------+----------- + -+#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 ++ public: ++ static const int pd_c_runtime_reserved_arg_size; ++ ++ enum { ++ first_available_sp_in_frame = 0, ++ frame_pad_in_bytes = 16, ++ nof_reg_args = 8 ++ }; ++ ++ public: ++ static LIR_Opr receiver_opr; ++ ++ static LIR_Opr r0_opr; ++ static LIR_Opr ra_opr; ++ static LIR_Opr tp_opr; ++ static LIR_Opr sp_opr; ++ static LIR_Opr a0_opr; ++ static LIR_Opr a1_opr; ++ static LIR_Opr a2_opr; ++ static LIR_Opr a3_opr; ++ static LIR_Opr a4_opr; ++ static LIR_Opr a5_opr; ++ static LIR_Opr a6_opr; ++ static LIR_Opr a7_opr; ++ static LIR_Opr t0_opr; ++ static LIR_Opr t1_opr; ++ static LIR_Opr t2_opr; ++ static LIR_Opr t3_opr; ++ static LIR_Opr t4_opr; ++ static LIR_Opr t5_opr; ++ static LIR_Opr t6_opr; ++ static LIR_Opr t7_opr; ++ static LIR_Opr t8_opr; ++ static LIR_Opr rx_opr; ++ static LIR_Opr fp_opr; ++ static LIR_Opr s0_opr; ++ static LIR_Opr s1_opr; ++ static LIR_Opr s2_opr; ++ static LIR_Opr s3_opr; ++ static LIR_Opr s4_opr; ++ static LIR_Opr s5_opr; ++ static LIR_Opr s6_opr; ++ static LIR_Opr s7_opr; ++ static LIR_Opr s8_opr; ++ ++ static LIR_Opr ra_oop_opr; ++ static LIR_Opr a0_oop_opr; ++ static LIR_Opr a1_oop_opr; ++ static LIR_Opr a2_oop_opr; ++ static LIR_Opr a3_oop_opr; ++ static LIR_Opr a4_oop_opr; ++ static LIR_Opr a5_oop_opr; ++ static LIR_Opr a6_oop_opr; ++ static LIR_Opr a7_oop_opr; ++ static LIR_Opr t0_oop_opr; ++ static LIR_Opr t1_oop_opr; ++ static LIR_Opr t2_oop_opr; ++ static LIR_Opr t3_oop_opr; ++ static LIR_Opr t4_oop_opr; ++ static LIR_Opr t5_oop_opr; ++ static LIR_Opr t6_oop_opr; ++ static LIR_Opr t7_oop_opr; ++ static LIR_Opr t8_oop_opr; ++ static LIR_Opr fp_oop_opr; ++ static LIR_Opr s0_oop_opr; ++ static LIR_Opr s1_oop_opr; ++ static LIR_Opr s2_oop_opr; ++ static LIR_Opr s3_oop_opr; ++ static LIR_Opr s4_oop_opr; ++ static LIR_Opr s5_oop_opr; ++ static LIR_Opr s6_oop_opr; ++ static LIR_Opr s7_oop_opr; ++ static LIR_Opr s8_oop_opr; ++ ++ static LIR_Opr scr1_opr; ++ static LIR_Opr scr2_opr; ++ static LIR_Opr scr1_long_opr; ++ static LIR_Opr scr2_long_opr; ++ ++ static LIR_Opr a0_metadata_opr; ++ static LIR_Opr a1_metadata_opr; ++ static LIR_Opr a2_metadata_opr; ++ static LIR_Opr a3_metadata_opr; ++ static LIR_Opr a4_metadata_opr; ++ static LIR_Opr a5_metadata_opr; ++ ++ static LIR_Opr long0_opr; ++ static LIR_Opr long1_opr; ++ static LIR_Opr fpu0_float_opr; ++ static LIR_Opr fpu0_double_opr; ++ ++ static LIR_Opr as_long_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ static LIR_Opr as_pointer_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ ++ // VMReg name for spilled physical FPU stack slot n ++ static VMReg fpu_regname (int n); ++ ++ static bool is_caller_save_register(LIR_Opr opr) { return true; } ++ static bool is_caller_save_register(Register r) { return true; } ++ ++ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } ++ static int last_cpu_reg() { return pd_last_cpu_reg; } ++ static int last_byte_reg() { return pd_last_byte_reg; } ++ ++#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp +new file mode 100644 +index 000000000..3b6089907 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp @@ -0,0 +1,354 @@ +/* + * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. @@ -5087,157 +5267,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +bool FrameMap::validate_frame() { + return true; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,143 @@ -+/* -+ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+ -+// On LoongArch64 the frame looks as follows: -+// -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+ -+ public: -+ static const int pd_c_runtime_reserved_arg_size; -+ -+ enum { -+ first_available_sp_in_frame = 0, -+ frame_pad_in_bytes = 16, -+ nof_reg_args = 8 -+ }; -+ -+ public: -+ static LIR_Opr receiver_opr; -+ -+ static LIR_Opr r0_opr; -+ static LIR_Opr ra_opr; -+ static LIR_Opr tp_opr; -+ static LIR_Opr sp_opr; -+ static LIR_Opr a0_opr; -+ static LIR_Opr a1_opr; -+ static LIR_Opr a2_opr; -+ static LIR_Opr a3_opr; -+ static LIR_Opr a4_opr; -+ static LIR_Opr a5_opr; -+ static LIR_Opr a6_opr; -+ static LIR_Opr a7_opr; -+ static LIR_Opr t0_opr; -+ static LIR_Opr t1_opr; -+ static LIR_Opr t2_opr; -+ static LIR_Opr t3_opr; -+ static LIR_Opr t4_opr; -+ static LIR_Opr t5_opr; -+ static LIR_Opr t6_opr; -+ static LIR_Opr t7_opr; -+ static LIR_Opr t8_opr; -+ static LIR_Opr rx_opr; -+ static LIR_Opr fp_opr; -+ static LIR_Opr s0_opr; -+ static LIR_Opr s1_opr; -+ static LIR_Opr s2_opr; -+ static LIR_Opr s3_opr; -+ static LIR_Opr s4_opr; -+ static LIR_Opr s5_opr; -+ static LIR_Opr s6_opr; -+ static LIR_Opr s7_opr; -+ static LIR_Opr s8_opr; -+ -+ static LIR_Opr ra_oop_opr; -+ static LIR_Opr a0_oop_opr; -+ static LIR_Opr a1_oop_opr; -+ static LIR_Opr a2_oop_opr; -+ static LIR_Opr a3_oop_opr; -+ static LIR_Opr a4_oop_opr; -+ static LIR_Opr a5_oop_opr; -+ static LIR_Opr a6_oop_opr; -+ static LIR_Opr a7_oop_opr; -+ static LIR_Opr t0_oop_opr; -+ static LIR_Opr t1_oop_opr; -+ static LIR_Opr t2_oop_opr; -+ static LIR_Opr t3_oop_opr; -+ static LIR_Opr t4_oop_opr; -+ static LIR_Opr t5_oop_opr; -+ static LIR_Opr t6_oop_opr; -+ static LIR_Opr t7_oop_opr; -+ static LIR_Opr t8_oop_opr; -+ static LIR_Opr fp_oop_opr; -+ static LIR_Opr s0_oop_opr; -+ static LIR_Opr s1_oop_opr; -+ static LIR_Opr s2_oop_opr; -+ static LIR_Opr s3_oop_opr; -+ static LIR_Opr s4_oop_opr; -+ static LIR_Opr s5_oop_opr; -+ static LIR_Opr s6_oop_opr; -+ static LIR_Opr s7_oop_opr; -+ static LIR_Opr s8_oop_opr; -+ -+ static LIR_Opr scr1_opr; -+ static LIR_Opr scr2_opr; -+ static LIR_Opr scr1_long_opr; -+ static LIR_Opr scr2_long_opr; -+ -+ static LIR_Opr a0_metadata_opr; -+ static LIR_Opr a1_metadata_opr; -+ static LIR_Opr a2_metadata_opr; -+ static LIR_Opr a3_metadata_opr; -+ static LIR_Opr a4_metadata_opr; -+ static LIR_Opr a5_metadata_opr; -+ -+ static LIR_Opr long0_opr; -+ static LIR_Opr long1_opr; -+ static LIR_Opr fpu0_float_opr; -+ static LIR_Opr fpu0_double_opr; -+ -+ static LIR_Opr as_long_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ static LIR_Opr as_pointer_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ -+ // VMReg name for spilled physical FPU stack slot n -+ static VMReg fpu_regname (int n); -+ -+ static bool is_caller_save_register(LIR_Opr opr) { return true; } -+ static bool is_caller_save_register(Register r) { return true; } -+ -+ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } -+ static int last_cpu_reg() { return pd_last_cpu_reg; } -+ static int last_byte_reg() { return pd_last_byte_reg; } -+ -+#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp 2023-11-01 09:34:25.477945249 +0800 -@@ -0,0 +1,67 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp +new file mode 100644 +index 000000000..40d9408f1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp +@@ -0,0 +1,83 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -5263,162 +5298,69 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP + -+#include "utilities/globalDefinitions.hpp" -+#include "utilities/macros.hpp" ++// ArrayCopyStub needs access to bailout ++friend class ArrayCopyStub; + -+// Sets the default values for platform dependent flags used by the client compiler. -+// (see c1_globals.hpp) ++ private: ++ int array_element_size(BasicType type) const; + -+#ifndef COMPILER2 -+define_pd_global(bool, BackgroundCompilation, true ); -+define_pd_global(bool, InlineIntrinsics, true ); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, false); -+define_pd_global(bool, UseOnStackReplacement, true ); -+define_pd_global(bool, TieredCompilation, false); -+define_pd_global(intx, CompileThreshold, 1500 ); ++ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, ++ int dest_index, bool pop_fpu_stack); + -+define_pd_global(intx, OnStackReplacePercentage, 933 ); -+define_pd_global(intx, NewSizeThreadIncrease, 4*K ); -+define_pd_global(intx, InitialCodeCacheSize, 160*K); -+define_pd_global(intx, ReservedCodeCacheSize, 32*M ); -+define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); -+define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(bool, ProfileInterpreter, false); -+define_pd_global(intx, CodeCacheExpansionSize, 32*K ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 1); -+define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); -+define_pd_global(bool, NeverActAsServerClassMachine, true ); -+define_pd_global(uint64_t,MaxRAM, 1ULL*G); -+define_pd_global(bool, CICompileOSR, true ); -+#endif // !COMPILER2 -+define_pd_global(bool, UseTypeProfile, false); -+define_pd_global(bool, RoundFPResults, true ); ++ // helper functions which checks for overflow and sets bailout if it ++ // occurs. Always returns a valid embeddable pointer but in the ++ // bailout case the pointer won't be to unique storage. ++ address float_constant(float f); ++ address double_constant(double d); + -+define_pd_global(bool, LIRFillDelaySlots, false); -+define_pd_global(bool, OptimizeSinglePrecision, true ); -+define_pd_global(bool, CSEArrayLength, false); -+define_pd_global(bool, TwoOperandLIRForm, false ); ++ address int_constant(jlong n); + -+#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,33 @@ -+/* -+ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ bool is_literal_address(LIR_Address* addr); + -+#include "precompiled.hpp" -+#include "c1/c1_Instruction.hpp" -+#include "c1/c1_LinearScan.hpp" -+#include "utilities/bitMap.inline.hpp" ++ // Ensure we have a valid Address (base+offset) to a stack-slot. ++ Address stack_slot_address(int index, uint shift, int adjust = 0); + -+void LinearScan::allocate_fpu_stack() { -+ // No FPU stack on LoongArch64 -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,70 @@ -+/* -+ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ // Record the type of the receiver in ReceiverTypeData ++ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, ++ Register recv, Label* update_done); ++ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); + -+#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++ void casw(Register addr, Register newval, Register cmpval, bool sign); ++ void casl(Register addr, Register newval, Register cmpval); + -+inline bool LinearScan::is_processed_reg_num(int reg_num) { -+ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; -+} ++ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); + -+inline int LinearScan::num_physical_regs(BasicType type) { -+ return 1; -+} ++ static const int max_tableswitches = 20; ++ struct tableswitch switches[max_tableswitches]; ++ int tableswitch_count; + -+inline bool LinearScan::requires_adjacent_regs(BasicType type) { -+ return false; -+} ++ void init() { tableswitch_count = 0; } + -+inline bool LinearScan::is_caller_save(int assigned_reg) { -+ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); -+ if (assigned_reg < pd_first_callee_saved_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) -+ return true; -+ return false; -+} ++ void deoptimize_trap(CodeEmitInfo *info); + -+inline void LinearScan::pd_add_temps(LIR_Op* op) {} ++ enum { ++ // call stub: CompiledStaticCall::to_interp_stub_size() + ++ // CompiledStaticCall::to_trampoline_stub_size() ++ _call_stub_size = 13 * NativeInstruction::nop_instruction_size, ++ _call_aot_stub_size = 0, ++ _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), ++ _deopt_handler_size = 7 * NativeInstruction::nop_instruction_size ++ }; + -+// Implementation of LinearScanWalker -+inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { -+ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { -+ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); -+ _first_reg = pd_first_callee_saved_reg; -+ _last_reg = pd_last_callee_saved_reg; -+ return true; -+ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || -+ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { -+ _first_reg = pd_first_cpu_reg; -+ _last_reg = pd_last_allocatable_cpu_reg; -+ return true; -+ } -+ return false; -+} ++public: ++ void store_parameter(Register r, int offset_from_sp_in_words); ++ void store_parameter(jint c, int offset_from_sp_in_words); ++ void store_parameter(jobject c, int offset_from_sp_in_words); + -+#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 ++#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp +new file mode 100644 +index 000000000..c989e25c3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp @@ -0,0 +1,3387 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. @@ -8807,100 +8749,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#undef __ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,83 @@ -+/* -+ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+ -+// ArrayCopyStub needs access to bailout -+friend class ArrayCopyStub; -+ -+ private: -+ int array_element_size(BasicType type) const; -+ -+ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, -+ int dest_index, bool pop_fpu_stack); -+ -+ // helper functions which checks for overflow and sets bailout if it -+ // occurs. Always returns a valid embeddable pointer but in the -+ // bailout case the pointer won't be to unique storage. -+ address float_constant(float f); -+ address double_constant(double d); -+ -+ address int_constant(jlong n); -+ -+ bool is_literal_address(LIR_Address* addr); -+ -+ // Ensure we have a valid Address (base+offset) to a stack-slot. -+ Address stack_slot_address(int index, uint shift, int adjust = 0); -+ -+ // Record the type of the receiver in ReceiverTypeData -+ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, -+ Register recv, Label* update_done); -+ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); -+ -+ void casw(Register addr, Register newval, Register cmpval, bool sign); -+ void casl(Register addr, Register newval, Register cmpval); -+ -+ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); -+ -+ static const int max_tableswitches = 20; -+ struct tableswitch switches[max_tableswitches]; -+ int tableswitch_count; -+ -+ void init() { tableswitch_count = 0; } -+ -+ void deoptimize_trap(CodeEmitInfo *info); -+ -+ enum { -+ // call stub: CompiledStaticCall::to_interp_stub_size() + -+ // CompiledStaticCall::to_trampoline_stub_size() -+ _call_stub_size = 13 * NativeInstruction::nop_instruction_size, -+ _call_aot_stub_size = 0, -+ _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), -+ _deopt_handler_size = 7 * NativeInstruction::nop_instruction_size -+ }; -+ -+public: -+ void store_parameter(Register r, int offset_from_sp_in_words); -+ void store_parameter(jint c, int offset_from_sp_in_words); -+ void store_parameter(jobject c, int offset_from_sp_in_words); -+ -+#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,1396 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp +new file mode 100644 +index 000000000..6cb77f3fb +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp +@@ -0,0 +1,1398 @@ +/* + * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2021, 2024, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -9056,8 +8913,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (index->is_register()) { + // apply the shift and accumulate the displacement + if (shift > 0) { -+ LIR_Opr tmp = new_pointer_register(); -+ __ shift_left(index, shift, tmp); ++ // Use long register to avoid overflow when shifting large index values left. ++ LIR_Opr tmp = new_register(T_LONG); ++ __ convert(Bytecodes::_i2l, index, tmp); ++ __ shift_left(tmp, shift, tmp); + index = tmp; + } + if (large_disp != 0) { @@ -10294,9 +10153,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + __ volatile_load_mem_reg(address, result, info); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp 2023-09-12 13:54:23.081571647 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp +new file mode 100644 +index 000000000..6bb15fbf1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. @@ -10373,10 +10234,127 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { + append(new LIR_Op4(lir_cmp_cmove, condition, left, right, src1, src2, dst, type)); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp 2023-11-01 09:34:25.477945249 +0800 -@@ -0,0 +1,343 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp +new file mode 100644 +index 000000000..f15dacafe +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp +@@ -0,0 +1,70 @@ ++/* ++ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++ ++inline bool LinearScan::is_processed_reg_num(int reg_num) { ++ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; ++} ++ ++inline int LinearScan::num_physical_regs(BasicType type) { ++ return 1; ++} ++ ++inline bool LinearScan::requires_adjacent_regs(BasicType type) { ++ return false; ++} ++ ++inline bool LinearScan::is_caller_save(int assigned_reg) { ++ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); ++ if (assigned_reg < pd_first_callee_saved_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) ++ return true; ++ return false; ++} ++ ++inline void LinearScan::pd_add_temps(LIR_Op* op) {} ++ ++// Implementation of LinearScanWalker ++inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { ++ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { ++ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); ++ _first_reg = pd_first_callee_saved_reg; ++ _last_reg = pd_last_callee_saved_reg; ++ return true; ++ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || ++ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { ++ _first_reg = pd_first_cpu_reg; ++ _last_reg = pd_last_allocatable_cpu_reg; ++ return true; ++ } ++ return false; ++} ++ ++#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp +new file mode 100644 +index 000000000..219b2e367 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp +@@ -0,0 +1,33 @@ ++/* ++ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "c1/c1_Instruction.hpp" ++#include "c1/c1_LinearScan.hpp" ++#include "utilities/bitMap.inline.hpp" ++ ++void LinearScan::allocate_fpu_stack() { ++ // No FPU stack on LoongArch64 ++} +diff --git a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp +new file mode 100644 +index 000000000..38ff4c583 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp +@@ -0,0 +1,112 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -10402,6 +10380,124 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + ++#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++ ++using MacroAssembler::build_frame; ++using MacroAssembler::null_check; ++ ++// C1_MacroAssembler contains high-level macros for C1 ++ ++ private: ++ int _rsp_offset; // track rsp changes ++ // initialization ++ void pd_init() { _rsp_offset = 0; } ++ ++ public: ++ void try_allocate( ++ Register obj, // result: pointer to object after successful allocation ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ Label& slow_case // continuation point if fast allocation fails ++ ); ++ ++ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); ++ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); ++ ++ // locking ++ // hdr : must be A0, contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must point to the displaced header location, contents preserved ++ // scratch : scratch register, contents destroyed ++ // returns code offset at which to add null check debug information ++ int lock_object (Register swap, Register obj, Register disp_hdr, Register scratch, Label& slow_case); ++ ++ // unlocking ++ // hdr : contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed ++ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); ++ ++ void initialize_object( ++ Register obj, // result: pointer to object after successful allocation ++ Register klass, // object klass ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB ++ ); ++ ++ // allocation of fixed-size objects ++ // (can also be used to allocate fixed-size arrays, by setting ++ // hdr_size correctly and storing the array length afterwards) ++ // obj : will contain pointer to allocated object ++ // t1, t2 : scratch registers - contents destroyed ++ // header_size: size of object header in words ++ // object_size: total size of object in words ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_object(Register obj, Register t1, Register t2, int header_size, ++ int object_size, Register klass, Label& slow_case); ++ ++ enum { ++ max_array_allocation_length = 0x00FFFFFF ++ }; ++ ++ // allocation of arrays ++ // obj : will contain pointer to allocated object ++ // len : array length in number of elements ++ // t : scratch register - contents destroyed ++ // header_size: size of object header in words ++ // f : element scale factor ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, ++ int f, Register klass, Label& slow_case); ++ ++ int rsp_offset() const { return _rsp_offset; } ++ void set_rsp_offset(int n) { _rsp_offset = n; } ++ ++ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, ++ bool inv_a4, bool inv_a5) PRODUCT_RETURN; ++ ++ // This platform only uses signal-based null checks. The Label is not needed. ++ void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); } ++ ++ void load_parameter(int offset_in_words, Register reg); ++ ++#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp +new file mode 100644 +index 000000000..17ff93a59 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp +@@ -0,0 +1,344 @@ ++/* ++ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ +#include "precompiled.hpp" +#include "c1/c1_MacroAssembler.hpp" +#include "c1/c1_Runtime1.hpp" @@ -10411,6 +10507,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "oops/arrayOop.hpp" +#include "oops/markOop.hpp" +#include "runtime/basicLock.hpp" ++#include "runtime/biasedLocking.hpp" +#include "runtime/os.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" @@ -10720,125 +10817,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif +} +#endif // ifndef PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp 2023-09-12 13:54:23.081571647 +0800 -@@ -0,0 +1,112 @@ -+/* -+ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+ -+using MacroAssembler::build_frame; -+using MacroAssembler::null_check; -+ -+// C1_MacroAssembler contains high-level macros for C1 -+ -+ private: -+ int _rsp_offset; // track rsp changes -+ // initialization -+ void pd_init() { _rsp_offset = 0; } -+ -+ public: -+ void try_allocate( -+ Register obj, // result: pointer to object after successful allocation -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ Label& slow_case // continuation point if fast allocation fails -+ ); -+ -+ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); -+ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); -+ -+ // locking -+ // hdr : must be A0, contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must point to the displaced header location, contents preserved -+ // scratch : scratch register, contents destroyed -+ // returns code offset at which to add null check debug information -+ int lock_object (Register swap, Register obj, Register disp_hdr, Register scratch, Label& slow_case); -+ -+ // unlocking -+ // hdr : contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed -+ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); -+ -+ void initialize_object( -+ Register obj, // result: pointer to object after successful allocation -+ Register klass, // object klass -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB -+ ); -+ -+ // allocation of fixed-size objects -+ // (can also be used to allocate fixed-size arrays, by setting -+ // hdr_size correctly and storing the array length afterwards) -+ // obj : will contain pointer to allocated object -+ // t1, t2 : scratch registers - contents destroyed -+ // header_size: size of object header in words -+ // object_size: total size of object in words -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_object(Register obj, Register t1, Register t2, int header_size, -+ int object_size, Register klass, Label& slow_case); -+ -+ enum { -+ max_array_allocation_length = 0x00FFFFFF -+ }; -+ -+ // allocation of arrays -+ // obj : will contain pointer to allocated object -+ // len : array length in number of elements -+ // t : scratch register - contents destroyed -+ // header_size: size of object header in words -+ // f : element scale factor -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, -+ int f, Register klass, Label& slow_case); -+ -+ int rsp_offset() const { return _rsp_offset; } -+ void set_rsp_offset(int n) { _rsp_offset = n; } -+ -+ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, -+ bool inv_a4, bool inv_a5) PRODUCT_RETURN; -+ -+ // This platform only uses signal-based null checks. The Label is not needed. -+ void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); } -+ -+ void load_parameter(int offset_in_words, Register reg); -+ -+#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp +new file mode 100644 +index 000000000..aaa708f71 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp @@ -0,0 +1,1138 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -11978,9 +11961,88 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Unimplemented(); + return 0; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp +new file mode 100644 +index 000000000..164016e12 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp +@@ -0,0 +1,71 @@ ++/* ++ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++ ++#include "utilities/globalDefinitions.hpp" ++#include "utilities/macros.hpp" ++ ++// Sets the default values for platform dependent flags used by the client compiler. ++// (see c1_globals.hpp) ++ ++#ifndef COMPILER2 ++define_pd_global(bool, BackgroundCompilation, true ); ++define_pd_global(bool, UseTLAB, true ); ++define_pd_global(bool, ResizeTLAB, true ); ++define_pd_global(bool, InlineIntrinsics, true ); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, false); ++define_pd_global(bool, UseOnStackReplacement, true ); ++define_pd_global(bool, TieredCompilation, false); ++define_pd_global(intx, CompileThreshold, 1500 ); ++ ++define_pd_global(intx, OnStackReplacePercentage, 933 ); ++define_pd_global(intx, FreqInlineSize, 325 ); ++define_pd_global(intx, NewSizeThreadIncrease, 4*K ); ++define_pd_global(intx, InitialCodeCacheSize, 160*K); ++define_pd_global(intx, ReservedCodeCacheSize, 32*M ); ++define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); ++define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(bool, ProfileInterpreter, false); ++define_pd_global(intx, CodeCacheExpansionSize, 32*K ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 1); ++define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); ++define_pd_global(uintx, MetaspaceSize, 12*M ); ++define_pd_global(bool, NeverActAsServerClassMachine, true ); ++define_pd_global(uint64_t,MaxRAM, 1ULL*G); ++define_pd_global(bool, CICompileOSR, true ); ++#endif // !COMPILER2 ++define_pd_global(bool, UseTypeProfile, false); ++define_pd_global(bool, RoundFPResults, true ); ++ ++define_pd_global(bool, LIRFillDelaySlots, false); ++define_pd_global(bool, OptimizeSinglePrecision, true ); ++define_pd_global(bool, CSEArrayLength, false); ++define_pd_global(bool, TwoOperandLIRForm, false ); ++ ++#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp +new file mode 100644 +index 000000000..27a4ec522 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -12076,9 +12138,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +define_pd_global(bool, NeverActAsServerClassMachine, false); + +#endif // CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp +new file mode 100644 +index 000000000..ec78b942d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. @@ -12117,9 +12181,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); + reg_mask_init(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp +new file mode 100644 +index 000000000..653d95806 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -12156,13 +12222,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void flush_bundle(bool start_new_bundle) {} + +#endif // CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp 2023-11-01 09:34:25.477945249 +0800 +diff --git a/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp +new file mode 100644 +index 000000000..d063d5d93 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp @@ -0,0 +1,148 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -12209,7 +12277,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // That's why we must use the macroassembler to generate a stub. + MacroAssembler _masm(&cbuf); + -+ address base = __ start_a_stub(Compile::MAX_stubs_size); ++ address base = __ start_a_stub(CompiledStaticCall::to_interp_stub_size()); + if (base == NULL) return NULL; // CodeBuffer::expand failed + // static stub relocation stores the instruction address of the call + @@ -12308,9 +12376,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/copy_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/copy_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/copy_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/copy_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/copy_loongarch.hpp b/src/hotspot/cpu/loongarch/copy_loongarch.hpp +new file mode 100644 +index 000000000..54b847a73 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/copy_loongarch.hpp @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -12389,9 +12459,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#endif //CPU_LOONGARCH_COPY_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp b/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp +new file mode 100644 +index 000000000..e4a92d103 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/depChecker_loongarch.cpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -12423,9 +12495,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "depChecker_loongarch.hpp" + +// Nothing to do on LoongArch -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp b/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp +new file mode 100644 +index 000000000..29c292a74 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/depChecker_loongarch.hpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -12458,9 +12532,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +// Nothing to do on LoongArch + +#endif // CPU_LOONGARCH_DEPCHECKER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp +new file mode 100644 +index 000000000..04359bc17 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -12499,9 +12575,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + +#endif // CPU_LOONGARCH_DISASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/frame_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/frame_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/frame_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/frame_loongarch.cpp 2023-11-01 09:34:25.481945254 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.cpp b/src/hotspot/cpu/loongarch/frame_loongarch.cpp +new file mode 100644 +index 000000000..6f6d34e02 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.cpp @@ -0,0 +1,690 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -13048,7 +13126,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // first the method + -+ Method* m = *interpreter_frame_method_addr(); ++ Method* m = safe_interpreter_frame_method(); + + // validate the method we'd find in this potential sender + if (!Method::is_valid_method(m)) return false; @@ -13193,9 +13271,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void frame::pd_ps() {} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/frame_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/frame_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/frame_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/frame_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.hpp +new file mode 100644 +index 000000000..b16389b3a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.hpp @@ -0,0 +1,171 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -13368,13 +13448,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static jint interpreter_frame_expression_stack_direction() { return -1; } + +#endif // CPU_LOONGARCH_FRAME_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp jdk11u-ls/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp 2023-11-01 09:34:25.481945254 +0800 -@@ -0,0 +1,246 @@ +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp +new file mode 100644 +index 000000000..1ddc038ee +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp +@@ -0,0 +1,252 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -13517,6 +13599,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return (intptr_t*) *(intptr_t **)addr_at(native_frame_link_offset); +} + ++inline intptr_t* frame::link_or_null() const { ++ intptr_t** ptr = is_java_frame() ? (intptr_t **)addr_at(java_frame_link_offset) ++ : (intptr_t **)addr_at(native_frame_link_offset); ++ return os::is_readable_pointer(ptr) ? *ptr : NULL; ++} ++ +inline intptr_t* frame::unextended_sp() const { return _unextended_sp; } + +// Return address: @@ -13618,10 +13706,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#endif // CPU_LOONGARCH_FRAME_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp 2023-11-01 09:34:25.481945254 +0800 -@@ -0,0 +1,520 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..e1e4748c4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp +@@ -0,0 +1,523 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -13667,7 +13757,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define __ masm-> + +void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, -+ Register addr, Register count) { ++ Register addr, Register count, RegSet saved_regs) { + bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; + + if (!dest_uninitialized) { @@ -13690,7 +13780,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ beqz(AT, filtered); + -+ __ pushad(); // push registers ++ __ push(saved_regs); + if (count == A0) { + if (addr == A1) { + __ move(AT, A0); @@ -13709,15 +13799,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } else { + __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2); + } -+ __ popad(); ++ __ pop(saved_regs); + + __ bind(filtered); + } +} + +void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, -+ Register addr, Register count, Register tmp) { -+ __ pushad(); // push registers (overkill) ++ Register addr, Register count, Register tmp, RegSet saved_regs) { ++ __ push(saved_regs); + if (count == A0) { + assert_different_registers(A1, addr); + __ move(A1, count); @@ -13728,7 +13818,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ move(A1, count); + } + __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2); -+ __ popad(); ++ __ pop(saved_regs); +} + +void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, @@ -13743,6 +13833,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#ifndef OPT_THREAD + __ get_thread(thread); +#endif ++ // RA is live. It must be saved around calls. ++ __ enter(); // barrier may call runtime + // Generate the G1 pre-barrier code to log the value of + // the referent field in an SATB buffer. + g1_write_barrier_pre(masm /* masm */, @@ -13752,6 +13844,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + tmp1 /* tmp */, + true /* tosca_live */, + true /* expand_call */); ++ __ leave(); + } +} + @@ -14142,13 +14235,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#undef __ + +#endif // COMPILER1 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp 2023-11-01 09:34:25.481945254 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..745046ac0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14184,8 +14279,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +class G1BarrierSetAssembler: public ModRefBarrierSetAssembler { + protected: -+ virtual void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count); -+ virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count, Register tmp); ++ virtual void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count, RegSet saved_regs); ++ virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count, Register tmp, RegSet saved_regs); + + void g1_write_barrier_pre(MacroAssembler* masm, + Register obj, @@ -14217,10 +14312,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_G1_G1BARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp 2023-11-01 09:34:25.481945254 +0800 -@@ -0,0 +1,253 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..a890cd3f6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp +@@ -0,0 +1,255 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. @@ -14257,6 +14354,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, + Register dst, Address src, Register tmp1, Register tmp_thread) { ++ // RA is live. It must be saved around calls. ++ + bool in_heap = (decorators & IN_HEAP) != 0; + bool in_native = (decorators & IN_NATIVE) != 0; + bool is_not_null = (decorators & IS_NOT_NULL) != 0; @@ -14474,13 +14573,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ addi_d(t1, t1, con_size_in_bytes); + __ st_ptr(t1, Address(TREG, in_bytes(JavaThread::allocated_bytes_offset()))); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp 2023-11-01 09:34:25.481945254 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..a7ebbfaab +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14522,9 +14623,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +public: + virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, -+ Register dst, Register count, Register scratch = NOREG) {} ++ Register dst, Register count, RegSet saved_regs) {} + virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, -+ Register dst, Register count, Register scratch = NOREG) {} ++ Register dst, Register count, Register scratch, RegSet saved_regs) {} + + virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, + Register dst, Address src, Register tmp1, Register tmp_thread); @@ -14566,13 +14667,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_SHARED_BARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp 2023-11-01 09:34:25.481945254 +0800 -@@ -0,0 +1,141 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..d09e9a75a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp +@@ -0,0 +1,140 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14617,7 +14720,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8) + +void CardTableBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, -+ Register addr, Register count, Register tmp) { ++ Register addr, Register count, Register tmp, ++ RegSet saved_regs) { + BarrierSet *bs = BarrierSet::barrier_set(); + CardTableBarrierSet* ctbs = barrier_set_cast(bs); + CardTable* ct = ctbs->card_table(); @@ -14630,7 +14734,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ beq(count, R0, L_done); // zero count - nothing to do + -+ if (UseConcMarkSweepGC) __ membar(__ StoreStore); ++ if (ct->scanned_concurrently()) __ membar(__ StoreStore); + + __ li(tmp, disp); + @@ -14673,8 +14777,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + jbyte dirty = CardTable::dirty_card_val(); + if (UseCondCardMark) { -+ Untested("Untested"); -+ __ warn("store_check Untested"); + Label L_already_dirty; + __ membar(__ StoreLoad); + __ ld_b(AT, tmp, 0); @@ -14684,7 +14786,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(L_already_dirty); + } else { + if (ct->scanned_concurrently()) { -+ __ membar(Assembler::StoreLoad); ++ __ membar(Assembler::StoreStore); + } + __ st_b(R0, tmp, 0); + } @@ -14711,13 +14813,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp 2023-11-01 09:34:25.481945254 +0800 -@@ -0,0 +1,42 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..b37c2ba0b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp +@@ -0,0 +1,44 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14750,20 +14854,24 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +protected: + void store_check(MacroAssembler* masm, Register obj, Address dst); + -+ virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, Register addr, Register count, Register tmp); ++ virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, ++ Register addr, Register count, Register tmp, ++ RegSet saved_regs); + + virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, + Address dst, Register val, Register tmp1, Register tmp2); +}; + +#endif // CPU_LOONGARCH_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp 2023-11-01 09:34:25.481945254 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..14c41ea79 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14793,16 +14901,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define __ masm-> + +void ModRefBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, -+ Register dst, Register count, Register scratch) { ++ Register dst, Register count, RegSet saved_regs) { + if (is_oop) { -+ gen_write_ref_array_pre_barrier(masm, decorators, dst, count); ++ gen_write_ref_array_pre_barrier(masm, decorators, dst, count, saved_regs); + } +} + +void ModRefBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, -+ Register dst, Register count, Register scratch) { ++ Register dst, Register count, Register scratch, RegSet saved_regs) { + if (is_oop) { -+ gen_write_ref_array_post_barrier(masm, decorators, dst, count, scratch); ++ gen_write_ref_array_post_barrier(masm, decorators, dst, count, scratch, saved_regs); + } +} + @@ -14814,13 +14922,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp 2023-11-01 09:34:25.481945254 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..8043220ef +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14856,25 +14966,27 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +class ModRefBarrierSetAssembler: public BarrierSetAssembler { +protected: + virtual void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, -+ Register addr, Register count) {} ++ Register addr, Register count, RegSet saved_regs) {} + virtual void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, -+ Register addr, Register count, Register tmp) {} ++ Register addr, Register count, Register tmp, RegSet saved_regs) {} + virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, + Address dst, Register val, Register tmp1, Register tmp2) = 0; +public: + virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, -+ Register dst, Register count, Register scratch = NOREG); ++ Register dst, Register count, RegSet saved_regs); + virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, -+ Register dst, Register count, Register scratch = NOREG); ++ Register dst, Register count, Register scratch, RegSet saved_regs); + + virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, + Address dst, Register val, Register tmp1, Register tmp2); +}; + +#endif // CPU_LOONGARCH_GC_SHARED_MODREFBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp +new file mode 100644 +index 000000000..dc21d001c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp @@ -0,0 +1,53 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -14929,9 +15041,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define THREAD_LOCAL_POLL + +#endif // CPU_LOONGARCH_GLOBALDEFINITIONS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/globals_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/globals_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/globals_loongarch.hpp b/src/hotspot/cpu/loongarch/globals_loongarch.hpp +new file mode 100644 +index 000000000..e6b758b55 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/globals_loongarch.hpp @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -15042,12 +15156,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + "Eliminate barriers for single active cpu") + +#endif // CPU_LOONGARCH_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/icache_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/icache_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/icache_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/icache_loongarch.cpp 2023-09-12 13:54:23.085571652 +0800 -@@ -0,0 +1,42 @@ +diff --git a/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp +new file mode 100644 +index 000000000..7b9769482 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp +@@ -0,0 +1,92 @@ +/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -15073,28 +15189,128 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" -+#include "runtime/icache.hpp" ++#include "asm/macroAssembler.inline.hpp" ++#include "code/icBuffer.hpp" ++#include "gc/shared/collectedHeap.inline.hpp" ++#include "interpreter/bytecodes.hpp" ++#include "memory/resourceArea.hpp" ++#include "nativeInst_loongarch.hpp" ++#include "oops/oop.inline.hpp" + -+void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) -+{ -+#define __ _masm-> -+ StubCodeMark mark(this, "ICache", "flush_icache_stub"); -+ address start = __ pc(); ++#define T0 RT0 ++#define T1 RT1 ++#define T2 RT2 ++#define T3 RT3 ++#define T4 RT4 ++#define T5 RT5 ++#define T6 RT6 ++#define T7 RT7 ++#define T8 RT8 + -+ __ ibar(0); -+ __ ori(V0, A2, 0); -+ __ jr(RA); ++int InlineCacheBuffer::ic_stub_code_size() { ++ return NativeMovConstReg::instruction_size + ++ NativeGeneralJump::instruction_size + ++ 1; ++ // so that code_end can be set in CodeBuffer ++ // 64bit 15 = 6 + 8 bytes + 1 byte ++ // 32bit 7 = 2 + 4 bytes + 1 byte ++} + -+ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++ ++// we use T1 as cached oop(klass) now. this is the target of virtual call, ++// when reach here, the receiver in T0 ++// refer to shareRuntime_loongarch.cpp,gen_i2c2i_adapters ++void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, ++ address entry_point) { ++ ResourceMark rm; ++ CodeBuffer code(code_begin, ic_stub_code_size()); ++ MacroAssembler* masm = new MacroAssembler(&code); ++ // note: even though the code contains an embedded oop, we do not need reloc info ++ // because ++ // (1) the oop is old (i.e., doesn't matter for scavenges) ++ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear ++ // assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop"); ++#define __ masm-> ++ __ patchable_li52(T1, (long)cached_value); ++ // TODO: confirm reloc ++ __ jmp(entry_point, relocInfo::runtime_call_type); ++ __ flush(); +#undef __ +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/icache_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/icache_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/icache_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/icache_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 -@@ -0,0 +1,41 @@ ++ ++ ++address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ return jump->jump_destination(); ++} ++ ++ ++void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { ++ // creation also verifies the object ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); ++ // Verifies the jump ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ void* o= (void*)move->data(); ++ return o; ++} +diff --git a/src/hotspot/cpu/loongarch/icache_loongarch.cpp b/src/hotspot/cpu/loongarch/icache_loongarch.cpp +new file mode 100644 +index 000000000..1ae7e5376 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icache_loongarch.cpp +@@ -0,0 +1,42 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "runtime/icache.hpp" ++ ++void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) ++{ ++#define __ _masm-> ++ StubCodeMark mark(this, "ICache", "flush_icache_stub"); ++ address start = __ pc(); ++ ++ __ ibar(0); ++ __ ori(V0, A2, 0); ++ __ jr(RA); ++ ++ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++#undef __ ++} +diff --git a/src/hotspot/cpu/loongarch/icache_loongarch.hpp b/src/hotspot/cpu/loongarch/icache_loongarch.hpp +new file mode 100644 +index 000000000..3a180549f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icache_loongarch.hpp +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -15133,12 +15349,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_ICACHE_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp 2023-09-12 13:54:23.085571652 +0800 -@@ -0,0 +1,92 @@ +diff --git a/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp +new file mode 100644 +index 000000000..53a06ba7f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp +@@ -0,0 +1,281 @@ +/* -+ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -15162,80 +15380,271 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#include "precompiled.hpp" ++#ifndef CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP ++ ++#include "asm/assembler.hpp" +#include "asm/macroAssembler.hpp" +#include "asm/macroAssembler.inline.hpp" -+#include "code/icBuffer.hpp" -+#include "gc/shared/collectedHeap.inline.hpp" -+#include "interpreter/bytecodes.hpp" -+#include "memory/resourceArea.hpp" -+#include "nativeInst_loongarch.hpp" -+#include "oops/oop.inline.hpp" ++#include "interpreter/invocationCounter.hpp" ++#include "runtime/frame.hpp" + -+#define T0 RT0 -+#define T1 RT1 -+#define T2 RT2 -+#define T3 RT3 -+#define T4 RT4 -+#define T5 RT5 -+#define T6 RT6 -+#define T7 RT7 -+#define T8 RT8 ++// This file specializes the assember with interpreter-specific macros + -+int InlineCacheBuffer::ic_stub_code_size() { -+ return NativeMovConstReg::instruction_size + -+ NativeGeneralJump::instruction_size + -+ 1; -+ // so that code_end can be set in CodeBuffer -+ // 64bit 15 = 6 + 8 bytes + 1 byte -+ // 32bit 7 = 2 + 4 bytes + 1 byte -+} ++typedef ByteSize (*OffsetFunction)(uint); + ++class InterpreterMacroAssembler: public MacroAssembler { ++#ifndef CC_INTERP ++ private: + -+// we use T1 as cached oop(klass) now. this is the target of virtual call, -+// when reach here, the receiver in T0 -+// refer to shareRuntime_loongarch.cpp,gen_i2c2i_adapters -+void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, -+ address entry_point) { -+ ResourceMark rm; -+ CodeBuffer code(code_begin, ic_stub_code_size()); -+ MacroAssembler* masm = new MacroAssembler(&code); -+ // note: even though the code contains an embedded oop, we do not need reloc info -+ // because -+ // (1) the oop is old (i.e., doesn't matter for scavenges) -+ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear -+ // assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop"); -+#define __ masm-> -+ __ patchable_li52(T1, (long)cached_value); -+ // TODO: confirm reloc -+ __ jmp(entry_point, relocInfo::runtime_call_type); -+ __ flush(); -+#undef __ -+} ++ Register _locals_register; // register that contains the pointer to the locals ++ Register _bcp_register; // register that contains the bcp + ++ protected: ++ // Interpreter specific version of call_VM_base ++ virtual void call_VM_leaf_base(address entry_point, ++ int number_of_arguments); + -+address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ return jump->jump_destination(); -+} ++ virtual void call_VM_base(Register oop_result, ++ Register java_thread, ++ Register last_java_sp, ++ address entry_point, ++ int number_of_arguments, ++ bool check_exceptions); + ++ // base routine for all dispatches ++ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); ++#endif // CC_INTERP + -+void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { -+ // creation also verifies the object -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); -+ // Verifies the jump -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ void* o= (void*)move->data(); -+ return o; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp 2023-11-01 09:34:25.481945254 +0800 -@@ -0,0 +1,2042 @@ ++ public: ++ void jump_to_entry(address entry); ++ // narrow int return value ++ void narrow(Register result); ++ ++ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} ++ ++ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ void get_4_byte_integer_at_bcp(Register reg, int offset); ++ ++ virtual void check_and_handle_popframe(Register java_thread); ++ virtual void check_and_handle_earlyret(Register java_thread); ++ ++ void load_earlyret_value(TosState state); ++ ++#ifdef CC_INTERP ++ void save_bcp() { /* not needed in c++ interpreter and harmless */ } ++ void restore_bcp() { /* not needed in c++ interpreter and harmless */ } ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg); ++ ++#else ++ ++ // Interpreter-specific registers ++ void save_bcp() { ++ st_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_bcp() { ++ ld_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_locals() { ++ ld_d(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); ++ } ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg) { ++ ld_d(reg, FP, frame::interpreter_frame_method_offset * wordSize); ++ } ++ ++ void get_const(Register reg){ ++ get_method(reg); ++ ld_d(reg, reg, in_bytes(Method::const_offset())); ++ } ++ ++ void get_constant_pool(Register reg) { ++ get_const(reg); ++ ld_d(reg, reg, in_bytes(ConstMethod::constants_offset())); ++ } ++ ++ void get_constant_pool_cache(Register reg) { ++ get_constant_pool(reg); ++ ld_d(reg, reg, ConstantPool::cache_offset_in_bytes()); ++ } ++ ++ void get_cpool_and_tags(Register cpool, Register tags) { ++ get_constant_pool(cpool); ++ ld_d(tags, cpool, ConstantPool::tags_offset_in_bytes()); ++ } ++ ++ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); ++ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_method_counters(Register method, Register mcs, Label& skip); ++ ++ // load cpool->resolved_references(index); ++ void load_resolved_reference_at_index(Register result, Register index, Register tmp); ++ ++ // load cpool->resolved_klass_at(index) ++ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) ++ Register index, // the constant pool index (corrupted on return) ++ Register klass); // contains the Klass on return ++ ++ void pop_ptr( Register r = FSR); ++ void pop_i( Register r = FSR); ++ void pop_l( Register r = FSR); ++ void pop_f(FloatRegister r = FSF); ++ void pop_d(FloatRegister r = FSF); ++ ++ void push_ptr( Register r = FSR); ++ void push_i( Register r = FSR); ++ void push_l( Register r = FSR); ++ void push_f(FloatRegister r = FSF); ++ void push_d(FloatRegister r = FSF); ++ ++ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } ++ ++ void push(Register r ) { ((MacroAssembler*)this)->push(r); } ++ ++ void pop(TosState state); // transition vtos -> state ++ void push(TosState state); // transition state -> vtos ++ ++ void empty_expression_stack() { ++ ld_d(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); ++ // NULL last_sp until next java call ++ st_d(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); ++ } ++ ++ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls ++ void load_ptr(int n, Register val); ++ void store_ptr(int n, Register val); ++ ++ // Generate a subtype check: branch to ok_is_subtype if sub_klass is ++ // a subtype of super_klass. ++ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); ++ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); ++ ++ // Dispatching ++ void dispatch_prolog(TosState state, int step = 0); ++ void dispatch_epilog(TosState state, int step = 0); ++ void dispatch_only(TosState state, bool generate_poll = false); ++ void dispatch_only_normal(TosState state); ++ void dispatch_only_noverify(TosState state); ++ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); ++ void dispatch_via (TosState state, address* table); ++ ++ // jump to an invoked target ++ void prepare_to_jump_from_interpreted(); ++ void jump_from_interpreted(Register method, Register temp); ++ ++ ++ // Returning from interpreted functions ++ // ++ // Removes the current activation (incl. unlocking of monitors) ++ // and sets up the return address. This code is also used for ++ // exception unwindwing. In that case, we do not want to throw ++ // IllegalMonitorStateExceptions, since that might get us into an ++ // infinite rethrow exception loop. ++ // Additionally this code is used for popFrame and earlyReturn. ++ // In popFrame case we want to skip throwing an exception, ++ // installing an exception, and notifying jvmdi. ++ // In earlyReturn case we only want to skip throwing an exception ++ // and installing an exception. ++ void remove_activation(TosState state, Register ret_addr, ++ bool throw_monitor_exception = true, ++ bool install_monitor_exception = true, ++ bool notify_jvmdi = true); ++#endif // CC_INTERP ++ ++ // Object locking ++ void lock_object (Register lock_reg); ++ void unlock_object(Register lock_reg); ++ ++#ifndef CC_INTERP ++ ++ // Interpreter profiling operations ++ void set_method_data_pointer_for_bcp(); ++ void test_method_data_pointer(Register mdp, Label& zero_continue); ++ void verify_method_data_pointer(); ++ ++ void set_mdp_data_at(Register mdp_in, int constant, Register value); ++ void increment_mdp_data_at(Address data, bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, int constant, ++ bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, ++ bool decrement = false); ++ void increment_mask_and_jump(Address counter_addr, ++ int increment, int mask, ++ Register scratch, bool preloaded, ++ Condition cond, Label* where); ++ void set_mdp_flag_at(Register mdp_in, int flag_constant); ++ void test_mdp_data_at(Register mdp_in, int offset, Register value, ++ Register test_value_out, ++ Label& not_equal_continue); ++ ++ void record_klass_in_profile(Register receiver, Register mdp, ++ Register reg2, bool is_virtual_call); ++ void record_klass_in_profile_helper(Register receiver, Register mdp, ++ Register reg2, int start_row, ++ Label& done, bool is_virtual_call); ++ ++ void record_item_in_profile_helper(Register item, Register mdp, ++ Register reg2, int start_row, Label& done, int total_rows, ++ OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, ++ int non_profiled_offset); ++ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); ++ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); ++ void update_mdp_by_constant(Register mdp_in, int constant); ++ void update_mdp_for_ret(Register return_bci); ++ ++ void profile_taken_branch(Register mdp, Register bumped_count); ++ void profile_not_taken_branch(Register mdp); ++ void profile_call(Register mdp); ++ void profile_final_call(Register mdp); ++ void profile_virtual_call(Register receiver, Register mdp, ++ Register scratch2, ++ bool receiver_can_be_null = false); ++ void profile_called_method(Register method, Register mdp, Register reg2) NOT_JVMCI_RETURN; ++ void profile_ret(Register return_bci, Register mdp); ++ void profile_null_seen(Register mdp); ++ void profile_typecheck(Register mdp, Register klass, Register scratch); ++ void profile_typecheck_failed(Register mdp); ++ void profile_switch_default(Register mdp); ++ void profile_switch_case(Register index_in_scratch, Register mdp, ++ Register scratch2); ++ ++ // Debugging ++ // only if +VerifyOops && state == atos ++ void verify_oop(Register reg, TosState state = atos); ++ // only if +VerifyFPU && (state == ftos || state == dtos) ++ void verify_FPU(int stack_depth, TosState state = ftos); ++ ++ void profile_obj_type(Register obj, const Address& mdo_addr); ++ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); ++ void profile_return_type(Register mdp, Register ret, Register tmp); ++ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++#endif // !CC_INTERP ++ ++ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ ++ // support for jvmti/dtrace ++ void notify_method_entry(); ++ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++}; ++ ++#endif // CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp +new file mode 100644 +index 000000000..c533a5765 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp +@@ -0,0 +1,2043 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -15272,6 +15681,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "prims/jvmtiThreadState.hpp" +#include "runtime/basicLock.hpp" +#include "runtime/biasedLocking.hpp" ++#include "runtime/frame.inline.hpp" +#include "runtime/safepointMechanism.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/thread.inline.hpp" @@ -17275,13 +17685,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + unimplemented(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 -@@ -0,0 +1,281 @@ +diff --git a/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp +new file mode 100644 +index 000000000..d53d951a1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp +@@ -0,0 +1,62 @@ +/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -17304,266 +17716,49 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -+ -+#include "asm/assembler.hpp" -+#include "asm/macroAssembler.hpp" -+#include "asm/macroAssembler.inline.hpp" -+#include "interpreter/invocationCounter.hpp" -+#include "runtime/frame.hpp" ++#ifndef CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP ++#define CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP + -+// This file specializes the assember with interpreter-specific macros ++// This is included in the middle of class Interpreter. ++// Do not include files here. + -+typedef ByteSize (*OffsetFunction)(uint); ++// native method calls + -+class InterpreterMacroAssembler: public MacroAssembler { -+#ifndef CC_INTERP ++class SignatureHandlerGenerator: public NativeSignatureIterator { + private: ++ MacroAssembler* _masm; ++ unsigned int _num_fp_args; ++ unsigned int _num_int_args; ++ int _stack_offset; + -+ Register _locals_register; // register that contains the pointer to the locals -+ Register _bcp_register; // register that contains the bcp -+ -+ protected: -+ // Interpreter specific version of call_VM_base -+ virtual void call_VM_leaf_base(address entry_point, -+ int number_of_arguments); -+ -+ virtual void call_VM_base(Register oop_result, -+ Register java_thread, -+ Register last_java_sp, -+ address entry_point, -+ int number_of_arguments, -+ bool check_exceptions); -+ -+ // base routine for all dispatches -+ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); -+#endif // CC_INTERP ++ void move(int from_offset, int to_offset); ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + + public: -+ void jump_to_entry(address entry); -+ // narrow int return value -+ void narrow(Register result); -+ -+ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} -+ -+ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ void get_4_byte_integer_at_bcp(Register reg, int offset); -+ -+ virtual void check_and_handle_popframe(Register java_thread); -+ virtual void check_and_handle_earlyret(Register java_thread); -+ -+ void load_earlyret_value(TosState state); -+ -+#ifdef CC_INTERP -+ void save_bcp() { /* not needed in c++ interpreter and harmless */ } -+ void restore_bcp() { /* not needed in c++ interpreter and harmless */ } -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg); -+ -+#else -+ -+ // Interpreter-specific registers -+ void save_bcp() { -+ st_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_bcp() { -+ ld_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_locals() { -+ ld_d(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); -+ } -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg) { -+ ld_d(reg, FP, frame::interpreter_frame_method_offset * wordSize); -+ } -+ -+ void get_const(Register reg){ -+ get_method(reg); -+ ld_d(reg, reg, in_bytes(Method::const_offset())); -+ } -+ -+ void get_constant_pool(Register reg) { -+ get_const(reg); -+ ld_d(reg, reg, in_bytes(ConstMethod::constants_offset())); -+ } -+ -+ void get_constant_pool_cache(Register reg) { -+ get_constant_pool(reg); -+ ld_d(reg, reg, ConstantPool::cache_offset_in_bytes()); -+ } -+ -+ void get_cpool_and_tags(Register cpool, Register tags) { -+ get_constant_pool(cpool); -+ ld_d(tags, cpool, ConstantPool::tags_offset_in_bytes()); -+ } -+ -+ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); -+ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_method_counters(Register method, Register mcs, Label& skip); -+ -+ // load cpool->resolved_references(index); -+ void load_resolved_reference_at_index(Register result, Register index, Register tmp); -+ -+ // load cpool->resolved_klass_at(index) -+ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) -+ Register index, // the constant pool index (corrupted on return) -+ Register klass); // contains the Klass on return -+ -+ void pop_ptr( Register r = FSR); -+ void pop_i( Register r = FSR); -+ void pop_l( Register r = FSR); -+ void pop_f(FloatRegister r = FSF); -+ void pop_d(FloatRegister r = FSF); -+ -+ void push_ptr( Register r = FSR); -+ void push_i( Register r = FSR); -+ void push_l( Register r = FSR); -+ void push_f(FloatRegister r = FSF); -+ void push_d(FloatRegister r = FSF); -+ -+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } -+ -+ void push(Register r ) { ((MacroAssembler*)this)->push(r); } -+ -+ void pop(TosState state); // transition vtos -> state -+ void push(TosState state); // transition state -> vtos -+ -+ void empty_expression_stack() { -+ ld_d(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); -+ // NULL last_sp until next java call -+ st_d(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); -+ } -+ -+ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls -+ void load_ptr(int n, Register val); -+ void store_ptr(int n, Register val); -+ -+ // Generate a subtype check: branch to ok_is_subtype if sub_klass is -+ // a subtype of super_klass. -+ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); -+ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); -+ -+ // Dispatching -+ void dispatch_prolog(TosState state, int step = 0); -+ void dispatch_epilog(TosState state, int step = 0); -+ void dispatch_only(TosState state, bool generate_poll = false); -+ void dispatch_only_normal(TosState state); -+ void dispatch_only_noverify(TosState state); -+ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); -+ void dispatch_via (TosState state, address* table); -+ -+ // jump to an invoked target -+ void prepare_to_jump_from_interpreted(); -+ void jump_from_interpreted(Register method, Register temp); -+ -+ -+ // Returning from interpreted functions -+ // -+ // Removes the current activation (incl. unlocking of monitors) -+ // and sets up the return address. This code is also used for -+ // exception unwindwing. In that case, we do not want to throw -+ // IllegalMonitorStateExceptions, since that might get us into an -+ // infinite rethrow exception loop. -+ // Additionally this code is used for popFrame and earlyReturn. -+ // In popFrame case we want to skip throwing an exception, -+ // installing an exception, and notifying jvmdi. -+ // In earlyReturn case we only want to skip throwing an exception -+ // and installing an exception. -+ void remove_activation(TosState state, Register ret_addr, -+ bool throw_monitor_exception = true, -+ bool install_monitor_exception = true, -+ bool notify_jvmdi = true); -+#endif // CC_INTERP -+ -+ // Object locking -+ void lock_object (Register lock_reg); -+ void unlock_object(Register lock_reg); -+ -+#ifndef CC_INTERP -+ -+ // Interpreter profiling operations -+ void set_method_data_pointer_for_bcp(); -+ void test_method_data_pointer(Register mdp, Label& zero_continue); -+ void verify_method_data_pointer(); -+ -+ void set_mdp_data_at(Register mdp_in, int constant, Register value); -+ void increment_mdp_data_at(Address data, bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, int constant, -+ bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, -+ bool decrement = false); -+ void increment_mask_and_jump(Address counter_addr, -+ int increment, int mask, -+ Register scratch, bool preloaded, -+ Condition cond, Label* where); -+ void set_mdp_flag_at(Register mdp_in, int flag_constant); -+ void test_mdp_data_at(Register mdp_in, int offset, Register value, -+ Register test_value_out, -+ Label& not_equal_continue); -+ -+ void record_klass_in_profile(Register receiver, Register mdp, -+ Register reg2, bool is_virtual_call); -+ void record_klass_in_profile_helper(Register receiver, Register mdp, -+ Register reg2, int start_row, -+ Label& done, bool is_virtual_call); -+ -+ void record_item_in_profile_helper(Register item, Register mdp, -+ Register reg2, int start_row, Label& done, int total_rows, -+ OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, -+ int non_profiled_offset); -+ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); -+ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); -+ void update_mdp_by_constant(Register mdp_in, int constant); -+ void update_mdp_for_ret(Register return_bci); -+ -+ void profile_taken_branch(Register mdp, Register bumped_count); -+ void profile_not_taken_branch(Register mdp); -+ void profile_call(Register mdp); -+ void profile_final_call(Register mdp); -+ void profile_virtual_call(Register receiver, Register mdp, -+ Register scratch2, -+ bool receiver_can_be_null = false); -+ void profile_called_method(Register method, Register mdp, Register reg2) NOT_JVMCI_RETURN; -+ void profile_ret(Register return_bci, Register mdp); -+ void profile_null_seen(Register mdp); -+ void profile_typecheck(Register mdp, Register klass, Register scratch); -+ void profile_typecheck_failed(Register mdp); -+ void profile_switch_default(Register mdp); -+ void profile_switch_case(Register index_in_scratch, Register mdp, -+ Register scratch2); -+ -+ // Debugging -+ // only if +VerifyOops && state == atos -+ void verify_oop(Register reg, TosState state = atos); -+ // only if +VerifyFPU && (state == ftos || state == dtos) -+ void verify_FPU(int stack_depth, TosState state = ftos); -+ -+ void profile_obj_type(Register obj, const Address& mdo_addr); -+ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); -+ void profile_return_type(Register mdp, Register ret, Register tmp); -+ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); -+#endif // !CC_INTERP ++ // Creation ++ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); + -+ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // support for jvmti/dtrace -+ void notify_method_entry(); -+ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); +}; + -+#endif // CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp 2023-11-01 09:34:25.485945258 +0800 -@@ -0,0 +1,266 @@ ++#endif // CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp +new file mode 100644 +index 000000000..e2f31997b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp +@@ -0,0 +1,273 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. @@ -17614,6 +17809,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define T8 RT8 + +// Implementation of SignatureHandlerGenerator ++InterpreterRuntime::SignatureHandlerGenerator::SignatureHandlerGenerator( ++ const methodHandle& method, CodeBuffer* buffer) : NativeSignatureIterator(method) { ++ _masm = new MacroAssembler(buffer); ++ _num_int_args = (method->is_static() ? 1 : 0); ++ _num_fp_args = 0; ++ _stack_offset = 0; ++} + +void InterpreterRuntime::SignatureHandlerGenerator::move(int from_offset, int to_offset) { + __ ld_d(temp(), from(), Interpreter::local_offset_in_bytes(from_offset)); @@ -17830,79 +18032,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // return result handler + return Interpreter::result_handler(m->result_type()); +IRT_END -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp 2023-11-01 09:34:25.485945258 +0800 -@@ -0,0 +1,66 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -+#define CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -+ -+#include "memory/allocation.hpp" -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ unsigned int _num_fp_args; -+ unsigned int _num_int_args; -+ int _stack_offset; -+ -+ void move(int from_offset, int to_offset); -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); -+ -+ public: -+ // Creation -+ SignatureHandlerGenerator(methodHandle method, CodeBuffer* buffer) : NativeSignatureIterator(method) { -+ _masm = new MacroAssembler(buffer); -+ _num_int_args = (method->is_static() ? 1 : 0); -+ _num_fp_args = 0; -+ _stack_offset = 0; -+ } -+ -+ // Code generation -+ void generate(uint64_t fingerprint); -+ -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; -+ -+#endif // CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp +new file mode 100644 +index 000000000..6814fa44a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -17991,10 +18125,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_LOONGARCH_JAVAFRAMEANCHOR_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp 2023-11-01 09:34:25.485945258 +0800 -@@ -0,0 +1,165 @@ +diff --git a/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp +new file mode 100644 +index 000000000..dbcdb7a6a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp +@@ -0,0 +1,166 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -18022,6 +18158,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" ++#include "code/codeBlob.hpp" +#include "gc/shared/barrierSet.hpp" +#include "gc/shared/barrierSetAssembler.hpp" +#include "memory/resourceArea.hpp" @@ -18160,9 +18297,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp +new file mode 100644 +index 000000000..b281f8637 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp @@ -0,0 +1,144 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -18308,9 +18447,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_JNITYPES_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp 2023-09-12 13:54:23.085571652 +0800 +diff --git a/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp +new file mode 100644 +index 000000000..ea481c7fa +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -18511,13 +18652,46 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +bool CodeInstaller::is_general_purpose_reg(VMReg hotspotRegister) { + return !hotspotRegister->is_FloatRegister(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/loongarch_64.ad jdk11u-ls/src/hotspot/cpu/loongarch/loongarch_64.ad ---- openjdk/src/hotspot/cpu/loongarch/loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/loongarch_64.ad 2023-11-01 09:34:25.485945258 +0800 -@@ -0,0 +1,13906 @@ +diff --git a/src/hotspot/cpu/loongarch/loongarch.ad b/src/hotspot/cpu/loongarch/loongarch.ad +new file mode 100644 +index 000000000..80dff0c76 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/loongarch.ad +@@ -0,0 +1,25 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ +diff --git a/src/hotspot/cpu/loongarch/loongarch_64.ad b/src/hotspot/cpu/loongarch/loongarch_64.ad +new file mode 100644 +index 000000000..c10f0b70c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/loongarch_64.ad +@@ -0,0 +1,13928 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++// Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. +// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +// +// This code is free software; you can redistribute it and/or modify it @@ -24955,6 +25129,17 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_pipe(empty); +%} + ++instruct same_addr_load_fence() %{ ++ match(SameAddrLoadFence); ++ ins_cost(400); ++ ++ format %{ "MEMBAR @ same_addr_load_fence" %} ++ ins_encode %{ ++ __ dbar(0x700); ++ %} ++ ins_pipe(pipe_slow); ++%} ++ +//----------Move Instructions-------------------------------------------------- +instruct castX2P(mRegP dst, mRegL src) %{ + match(Set dst (CastX2P src)); @@ -28578,14 +28763,25 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +%} + +// Store CMS card-mark Immediate 0 ++instruct storeImmCM_order(memory mem, immI_0 zero) %{ ++ match(Set mem (StoreCM mem zero)); ++ predicate(UseConcMarkSweepGC && !UseCondCardMark); ++ ins_cost(100); ++ format %{ "StoreCM MEMBAR storestore\n\t" ++ "st_b $mem, zero\t! card-mark imm0" %} ++ ins_encode %{ ++ __ membar(__ StoreStore); ++ __ loadstore_enc(R0, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp, MacroAssembler::STORE_BYTE); ++ %} ++ ins_pipe( ialu_storeI ); ++%} ++ +instruct storeImmCM(memory mem, immI_0 zero) %{ + match(Set mem (StoreCM mem zero)); + + ins_cost(150); -+ format %{ "StoreCM MEMBAR loadstore\n\t" -+ "st_b $mem, zero\t! CMS card-mark imm0" %} ++ format %{ "st_b $mem, zero\t! card-mark imm0" %} + ins_encode %{ -+ __ membar(__ StoreStore); + __ loadstore_enc(R0, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp, MacroAssembler::STORE_BYTE); + %} + ins_pipe( ialu_storeI ); @@ -32421,42 +32617,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/loongarch.ad jdk11u-ls/src/hotspot/cpu/loongarch/loongarch.ad ---- openjdk/src/hotspot/cpu/loongarch/loongarch.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/loongarch.ad 2023-09-12 13:54:23.089571657 +0800 -@@ -0,0 +1,25 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp 2023-11-01 09:34:25.485945258 +0800 -@@ -0,0 +1,4521 @@ +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp +new file mode 100644 +index 000000000..9720fd176 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp +@@ -0,0 +1,4567 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2017, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2017, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -32491,6 +32660,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "interpreter/interpreter.hpp" +#include "memory/resourceArea.hpp" +#include "memory/universe.hpp" ++#include "nativeInst_loongarch.hpp" +#include "prims/methodHandles.hpp" +#include "runtime/biasedLocking.hpp" +#include "runtime/interfaceSupport.inline.hpp" @@ -32504,6 +32674,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#ifdef COMPILER2 +#include "opto/compile.hpp" ++#include "opto/intrinsicnode.hpp" +#endif + +#define T0 RT0 @@ -34280,7 +34451,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + bind(fail); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, resflag); + move(resflag, R0); @@ -34303,7 +34474,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + bind(neq); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, tmp); + if (fail) @@ -34328,7 +34499,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + bind(fail); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, resflag); + move(resflag, R0); @@ -34353,7 +34524,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + bind(neq); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, tmp); + if (fail) @@ -34372,6 +34543,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + guarantee(0, "LA not implemented yet"); +} + ++#ifdef COMPILER2 +// Fast_Lock and Fast_Unlock used by C2 + +// Because the transitions from emitted code to the runtime @@ -34730,7 +34902,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + move(AT, R0); + bnez(scrReg, DONE_SET); + -+ membar(Assembler::Membar_mask_bits(LoadLoad|LoadStore)); ++ membar(Assembler::Membar_mask_bits(LoadStore|StoreStore)); + st_d(R0, Address(tmpReg, ObjectMonitor::owner_offset_in_bytes() - 2)); + li(resReg, 1); + b(DONE); @@ -34752,6 +34924,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (EmitSync & 32768) { nop() ; } + } +} ++#endif // COMPILER2 + +void MacroAssembler::align(int modulus) { + while (offset() % modulus != 0) nop(); @@ -34853,6 +35026,38 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + addi_d(SP, SP, 16); +} + ++void MacroAssembler::push(unsigned int bitset) { ++ unsigned char regs[31]; ++ int count = 0; ++ ++ bitset >>= 1; ++ for (int reg = 1; reg < 31; reg++) { ++ if (1 & bitset) ++ regs[count++] = reg; ++ bitset >>= 1; ++ } ++ ++ addi_d(SP, SP, -align_up(count, 2) * wordSize); ++ for (int i = 0; i < count; i ++) ++ st_d(as_Register(regs[i]), SP, i * wordSize); ++} ++ ++void MacroAssembler::pop(unsigned int bitset) { ++ unsigned char regs[31]; ++ int count = 0; ++ ++ bitset >>= 1; ++ for (int reg = 1; reg < 31; reg++) { ++ if (1 & bitset) ++ regs[count++] = reg; ++ bitset >>= 1; ++ } ++ ++ for (int i = 0; i < count; i ++) ++ ld_d(as_Register(regs[i]), SP, i * wordSize); ++ addi_d(SP, SP, align_up(count, 2) * wordSize); ++} ++ +// for UseCompressedOops Option +void MacroAssembler::load_klass(Register dst, Register src) { + if(UseCompressedClassPointers){ @@ -35571,6 +35776,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ld_d(method_result, AT, base + vtableEntry::method_offset_in_bytes()); +} + ++#ifdef COMPILER2 +// Compare strings, used for char[] and byte[]. +void MacroAssembler::string_compare(Register str1, Register str2, + Register cnt1, Register cnt2, Register result, @@ -35663,6 +35869,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + bind(True); +} ++#endif // COMPILER2 + +void MacroAssembler::load_byte_map_base(Register reg) { + jbyte *byte_map_base = @@ -36449,6 +36656,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } +} + ++#ifdef COMPILER2 +void MacroAssembler::reduce_ins_v(FloatRegister vec1, FloatRegister vec2, FloatRegister vec3, BasicType type, int opcode) { + switch (type) { + case T_BYTE: @@ -36654,6 +36862,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ShouldNotReachHere(); + } +} ++#endif // COMPILER2 + +/** + * Emits code to update CRC-32 with a byte value according to constants in table @@ -36803,6 +37012,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + bind(L_exit); +} + ++#ifdef COMPILER2 +void MacroAssembler::cmp_branch_short(int flag, Register op1, Register op2, Label& L, bool is_signed) { + + switch(flag) { @@ -36890,16 +37100,21 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Unimplemented(); + } +} ++#endif // COMPILER2 + +void MacroAssembler::membar(Membar_mask_bits hint){ + address prev = pc() - NativeInstruction::sync_instruction_size; + address last = code()->last_insn(); + if (last != NULL && ((NativeInstruction*)last)->is_sync() && prev == last) { + code()->set_last_insn(NULL); ++ NativeMembar *membar = (NativeMembar*)prev; ++ // merged membar ++ // e.g. LoadLoad and LoadLoad|LoadStore to LoadLoad|LoadStore ++ membar->set_hint(membar->get_hint() & (~hint & 0xF)); + block_comment("merged membar"); + } else { + code()->set_last_insn(pc()); -+ dbar(hint); ++ Assembler::membar(hint); + } +} + @@ -36975,10 +37190,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + bind(L_end); +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,814 @@ +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp +new file mode 100644 +index 000000000..1f9655754 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp +@@ -0,0 +1,825 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -37564,6 +37781,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void popad(); + void pushad_except_v0(); + void popad_except_v0(); ++ void push(RegSet regs) { if (regs.bits()) push(regs.bits()); } ++ void pop(RegSet regs) { if (regs.bits()) pop(regs.bits()); } + + void li(Register rd, jlong value); + void li(Register rd, address addr) { li(rd, (long)addr); } @@ -37599,6 +37818,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + //FIXME + void empty_FPU_stack(){/*need implemented*/}; + ++#ifdef COMPILER2 + // Compare strings. + void string_compare(Register str1, Register str2, + Register cnt1, Register cnt2, Register result, @@ -37608,6 +37828,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void arrays_equals(Register str1, Register str2, + Register cnt, Register tmp1, Register tmp2, Register result, + bool is_char); ++#endif + + // method handles (JSR 292) + Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0); @@ -37726,10 +37947,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + loadstore_t(reg, base, index, scale, disp, type); + } + ++#ifdef COMPILER2 + void reduce(Register dst, Register src, FloatRegister vsrc, FloatRegister tmp1, FloatRegister tmp2, BasicType type, int opcode, int vector_size); + void reduce(FloatRegister dst, FloatRegister src, FloatRegister vsrc, FloatRegister tmp, BasicType type, int opcode, int vector_size); ++#endif + +private: ++ void push(unsigned int bitset); ++ void pop(unsigned int bitset); ++ + template + void loadstore_t(T reg, int base, int index, int scale, int disp, int type) { + if (index != 0) { @@ -37744,9 +37970,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void loadstore(FloatRegister reg, Register base, int disp, int type); + void loadstore(FloatRegister reg, Register base, Register disp, int type); + ++#ifdef COMPILER2 + void reduce_ins_v(FloatRegister vec1, FloatRegister vec2, FloatRegister vec3, BasicType type, int opcode); + void reduce_ins_r(Register reg1, Register reg2, Register reg3, BasicType type, int opcode); + void reduce_ins_f(FloatRegister reg1, FloatRegister reg2, FloatRegister reg3, BasicType type, int opcode); ++#endif + void generate_kernel_sin(FloatRegister x, bool iyIsOne, address dsin_coef); + void generate_kernel_cos(FloatRegister x, address dcos_coef); + void generate__ieee754_rem_pio2(address npio2_hw, address two_over_pi, address pio2); @@ -37793,9 +38021,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_MACROASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp 2023-09-12 13:54:23.089571657 +0800 +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp +new file mode 100644 +index 000000000..49302590c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -37831,13 +38061,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "code/codeCache.hpp" + +#endif // CPU_LOONGARCH_MACROASSEMBLER_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp 2023-09-12 13:54:23.089571657 +0800 -@@ -0,0 +1,1625 @@ +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp +new file mode 100644 +index 000000000..6e27a6974 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp +@@ -0,0 +1,1626 @@ +/* Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, Cavium. All rights reserved. (By BELLSOFT) -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2024, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -38736,7 +38968,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + b(Q_DONE); + bind(JX_IS_0); + if (UseLASX) { -+ xvfmul_d(v28, v18, v6); // f[0,1] * x[0] ++ xvfmul_d(v28, v18, v6); // f[0,3] * x[0] + fmul_d(v30, v19, v6); // f[4] * x[0] + } else { + vfmul_d(v28, v18, v6); // f[0,1] * x[0] @@ -38965,6 +39197,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + st_w(tmp2, SCR2, 0); + addi_w(SCR1, SCR1, 24); + addi_w(jz, jz, 1); ++ alsl_d(SCR2, jz, iqBase, 2 - 1); + st_w(tmp3, SCR2, 0); // iq[jz] = (int) fw + b(Z_ZERO_CHECK_DONE); + bind(Z_IS_LESS_THAN_TWO24B); @@ -39460,13 +39693,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + bind(DONE); + jr(RA); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,562 @@ +diff --git a/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp +new file mode 100644 +index 000000000..e517dcd41 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp +@@ -0,0 +1,564 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -39496,6 +39731,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "interpreter/interpreterRuntime.hpp" +#include "memory/allocation.inline.hpp" +#include "prims/methodHandles.hpp" ++#include "runtime/frame.inline.hpp" ++#include "utilities/preserveException.hpp" + +#define __ _masm-> + @@ -40026,9 +40263,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp 2023-09-12 13:54:23.089571657 +0800 +diff --git a/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp +new file mode 100644 +index 000000000..f84337424 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -40092,10 +40331,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // Should be in sharedRuntime, not here. + return R3; + } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,505 @@ +diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp +new file mode 100644 +index 000000000..9234befae +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp +@@ -0,0 +1,511 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -40133,6 +40374,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "runtime/stubRoutines.hpp" +#include "utilities/ostream.hpp" + ++#ifndef PRODUCT ++#include "compiler/disassembler.hpp" ++#endif ++ +#include + +#define T0 RT0 @@ -40434,7 +40679,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return Assembler::simm12((int_at(0) >> 10) & 0xfff); + } + -+ //Disassembler::decode(addr_at(0), addr_at(0) + 16, tty); ++#ifndef PRODUCT ++ Disassembler::decode(addr_at(0), addr_at(0) + 16, tty); ++#endif + fatal("not a mov reg, imm52"); + return 0; // unreachable +} @@ -40601,10 +40848,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return Assembler::high(insn_word(), 10) == Assembler::ld_w_op && + Assembler::low(insn_word(), 5) == AT->encoding(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,521 @@ +diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp +new file mode 100644 +index 000000000..a6e9d4dd3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp +@@ -0,0 +1,528 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -41125,10 +41374,72 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + assert(ni->is_NativeCallTrampolineStub_at(), "no call trampoline found"); + return (NativeCallTrampolineStub*)addr; +} ++ ++class NativeMembar : public NativeInstruction { ++public: ++ unsigned int get_hint() { return Assembler::low(insn_word(), 4); } ++ void set_hint(int hint) { Assembler::patch(addr_at(0), 4, hint); } ++}; ++ +#endif // CPU_LOONGARCH_NATIVEINST_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp 2023-09-12 13:54:23.089571657 +0800 +diff --git a/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp +new file mode 100644 +index 000000000..e9f0fc280 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp +@@ -0,0 +1,47 @@ ++/* ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++ ++// machine-dependent implemention for register maps ++ friend class frame; ++ ++ private: ++#ifndef CORE ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return NULL. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return NULL;} ++#endif ++ ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} ++ ++#endif // CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp b/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp +new file mode 100644 +index 000000000..58f40b747 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. @@ -41233,9 +41544,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +REGISTER_DEFINITION(FloatRegister, f29); +REGISTER_DEFINITION(FloatRegister, f30); +REGISTER_DEFINITION(FloatRegister, f31); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/register_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/register_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/register_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/register_loongarch.cpp 2023-09-12 13:54:23.089571657 +0800 +diff --git a/src/hotspot/cpu/loongarch/register_loongarch.cpp b/src/hotspot/cpu/loongarch/register_loongarch.cpp +new file mode 100644 +index 000000000..54d90167a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_loongarch.cpp @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -41296,13 +41609,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + }; + return is_valid() ? names[encoding()] : "fccnoreg"; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/register_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/register_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/register_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/register_loongarch.hpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,428 @@ +diff --git a/src/hotspot/cpu/loongarch/register_loongarch.hpp b/src/hotspot/cpu/loongarch/register_loongarch.hpp +new file mode 100644 +index 000000000..da876a508 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_loongarch.hpp +@@ -0,0 +1,495 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -41727,65 +42042,83 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static const int max_fpr; +}; + -+#endif //CPU_LOONGARCH_REGISTER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp 2023-09-12 13:54:23.089571657 +0800 -@@ -0,0 +1,47 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++// A set of registers ++template ++class AbstractRegSet { ++ uint32_t _bitset; + -+#ifndef CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++ AbstractRegSet(uint32_t bitset) : _bitset(bitset) { } + -+// machine-dependent implemention for register maps -+ friend class frame; ++public: + -+ private: -+#ifndef CORE -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return NULL. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return NULL;} -+#endif ++ AbstractRegSet() : _bitset(0) { } + -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} ++ AbstractRegSet(RegImpl r1) : _bitset(1 << r1->encoding()) { } + -+#endif // CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,130 @@ ++ AbstractRegSet operator+(const AbstractRegSet aSet) const { ++ AbstractRegSet result(_bitset | aSet._bitset); ++ return result; ++ } ++ ++ AbstractRegSet operator-(const AbstractRegSet aSet) const { ++ AbstractRegSet result(_bitset & ~aSet._bitset); ++ return result; ++ } ++ ++ AbstractRegSet &operator+=(const AbstractRegSet aSet) { ++ *this = *this + aSet; ++ return *this; ++ } ++ ++ AbstractRegSet &operator-=(const AbstractRegSet aSet) { ++ *this = *this - aSet; ++ return *this; ++ } ++ ++ static AbstractRegSet of(RegImpl r1) { ++ return AbstractRegSet(r1); ++ } ++ ++ static AbstractRegSet of(RegImpl r1, RegImpl r2) { ++ return of(r1) + r2; ++ } ++ ++ static AbstractRegSet of(RegImpl r1, RegImpl r2, RegImpl r3) { ++ return of(r1, r2) + r3; ++ } ++ ++ static AbstractRegSet of(RegImpl r1, RegImpl r2, RegImpl r3, RegImpl r4) { ++ return of(r1, r2, r3) + r4; ++ } ++ ++ static AbstractRegSet of(RegImpl r1, RegImpl r2, RegImpl r3, RegImpl r4, RegImpl r5) { ++ return of(r1, r2, r3, r4) + r5; ++ } ++ ++ static AbstractRegSet range(RegImpl start, RegImpl end) { ++ uint32_t bits = ~0; ++ bits <<= start->encoding(); ++ bits <<= 31 - end->encoding(); ++ bits >>= 31 - end->encoding(); ++ ++ return AbstractRegSet(bits); ++ } ++ ++ uint32_t bits() const { return _bitset; } ++}; ++ ++typedef AbstractRegSet RegSet; ++ ++#endif //CPU_LOONGARCH_REGISTER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp +new file mode 100644 +index 000000000..1caba4369 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp +@@ -0,0 +1,132 @@ +/* + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -41811,9 +42144,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" +#include "code/relocInfo.hpp" ++#include "compiler/disassembler.hpp" +#include "nativeInst_loongarch.hpp" +#include "oops/compressedOops.inline.hpp" +#include "oops/oop.hpp" ++#include "oops/klass.inline.hpp" +#include "runtime/safepoint.hpp" + + @@ -41913,9 +42248,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void metadata_Relocation::pd_fix_value(address x) { +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp 2023-09-12 13:54:23.089571657 +0800 +diff --git a/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp +new file mode 100644 +index 000000000..c85ca4963 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -41961,9 +42298,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static bool mustIterateImmediateOopsInCode() { return false; } + +#endif // CPU_LOONGARCH_RELOCINFO_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp 2023-09-12 13:54:23.089571657 +0800 +diff --git a/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp b/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp +new file mode 100644 +index 000000000..334c783b3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp @@ -0,0 +1,191 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -42156,13 +42495,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + masm->flush(); + _exception_blob = ExceptionBlob::create(&buffer, oop_maps, framesize); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,3620 @@ +diff --git a/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp +new file mode 100644 +index 000000000..bc91ee005 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp +@@ -0,0 +1,3621 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -42192,6 +42533,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "code/icBuffer.hpp" +#include "code/vtableStubs.hpp" +#include "interpreter/interpreter.hpp" ++#include "nativeInst_loongarch.hpp" +#include "oops/compiledICHolder.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/vframeArray.hpp" @@ -42474,9 +42816,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +// Is vector's size (in bytes) bigger than a size saved by default? -+// 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. ++// 8 bytes registers are saved by default using fld/fst instructions. +bool SharedRuntime::is_wide_vector(int size) { -+ return size > 16; ++ return size > 8; +} + +size_t SharedRuntime::trampoline_size() { @@ -45780,10 +46122,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +extern "C" int SpinPause() {return 0;} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,4825 @@ +diff --git a/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp +new file mode 100644 +index 000000000..7f73863b2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp +@@ -0,0 +1,4804 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -46493,8 +46837,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // disjoint large copy + void generate_disjoint_large_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label loop, le32, le16, le8, lt8; + @@ -46574,8 +46918,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // disjoint large copy lsx + void generate_disjoint_large_copy_lsx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label loop, le64, le32, le16, lt16; + @@ -46656,8 +47000,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // disjoint large copy lasx + void generate_disjoint_large_copy_lasx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label loop, le128, le64, le32, lt32; + @@ -46738,8 +47082,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // conjoint large copy + void generate_conjoint_large_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label loop, le32, le16, le8, lt8; + @@ -46816,8 +47160,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // conjoint large copy lsx + void generate_conjoint_large_copy_lsx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label loop, le64, le32, le16, lt16; + @@ -46895,8 +47239,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // conjoint large copy lasx + void generate_conjoint_large_copy_lasx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label loop, le128, le64, le32, lt32; + @@ -46974,8 +47318,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Byte small copy: less than { int:9, lsx:17, lasx:33 } elements. + void generate_byte_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -47340,8 +47684,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // + address generate_disjoint_byte_copy(bool aligned, Label &small, Label &large, + Label &large_aligned, const char * name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (UseLASX) @@ -47380,8 +47724,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // + address generate_conjoint_byte_copy(bool aligned, Label &small, Label &large, + Label &large_aligned, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + array_overlap_test(StubRoutines::jbyte_disjoint_arraycopy(), 0); @@ -47407,8 +47751,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Short small copy: less than { int:9, lsx:9, lasx:17 } elements. + void generate_short_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -47619,8 +47963,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // + address generate_disjoint_short_copy(bool aligned, Label &small, Label &large, + Label &large_aligned, const char * name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (UseLASX) @@ -47659,8 +48003,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // + address generate_conjoint_short_copy(bool aligned, Label &small, Label &large, + Label &large_aligned, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + array_overlap_test(StubRoutines::jshort_disjoint_arraycopy(), 1); @@ -47686,8 +48030,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Int small copy: less than { int:7, lsx:7, lasx:9 } elements. + void generate_int_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -47848,7 +48192,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ st_d(RA, SP, 0 * wordSize); + + bs = BarrierSet::barrier_set()->barrier_set_assembler(); -+ bs->arraycopy_prologue(_masm, decorators, is_oop, A1, A2); ++ bs->arraycopy_prologue(_masm, decorators, is_oop, A1, A2, RegSet()); + + __ ld_d(A2, SP, 3 * wordSize); + __ ld_d(A1, SP, 2 * wordSize); @@ -47892,7 +48236,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ ld_d(A2, SP, 3 * wordSize); + __ ld_d(A1, SP, 2 * wordSize); + -+ bs->arraycopy_epilogue(_masm, decorators, is_oop, A1, A2, T1); ++ bs->arraycopy_epilogue(_masm, decorators, is_oop, A1, A2, T1, RegSet()); + + __ ld_d(RA, SP, 0 * wordSize); + __ addi_d(SP, SP, 4 * wordSize); @@ -47923,8 +48267,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, Label &small, + Label &large, Label &large_aligned, const char *name, + int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + gen_maybe_oop_copy(is_oop, true, aligned, small, large, large_aligned, @@ -47951,8 +48295,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, Label &small, + Label &large, Label &large_aligned, const char *name, + int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (is_oop) { @@ -47969,8 +48313,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Long small copy: less than { int:4, lsx:4, lasx:5 } elements. + void generate_long_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -48073,8 +48417,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, Label &small, + Label &large, Label &large_aligned, const char *name, + int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + gen_maybe_oop_copy(is_oop, true, aligned, small, large, large_aligned, @@ -48101,8 +48445,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + address generate_conjoint_long_oop_copy(bool aligned, bool is_oop, Label &small, + Label &large, Label &large_aligned, const char *name, + int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (is_oop) { @@ -48163,6 +48507,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + const Register ckoff = A3; // super_check_offset + const Register ckval = A4; // super_klass + ++ RegSet wb_pre_saved_regs = RegSet::range(A0, A4); ++ RegSet wb_post_saved_regs = RegSet::of(count); ++ + // Registers used as temps (S0, S1, S2, S3 are save-on-entry) + const Register copied_oop = S0; // actual oop copied + const Register count_save = S1; // orig elementscount @@ -48194,12 +48541,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // Empty array: Nothing to do. + __ beqz(count, L_done); + -+ __ addi_d(SP, SP, -6 * wordSize); -+ __ st_d(S0, SP, 0 * wordSize); -+ __ st_d(S1, SP, 1 * wordSize); -+ __ st_d(S2, SP, 2 * wordSize); -+ __ st_d(S3, SP, 3 * wordSize); -+ __ st_d(S4, SP, 4 * wordSize); ++ __ push(RegSet::of(S0, S1, S2, S3, RA)); + +#ifdef ASSERT + __ block_comment("assert consistent ckoff/ckval"); @@ -48220,20 +48562,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + decorators |= IS_DEST_UNINITIALIZED; + } + -+ __ move(S0, A0); -+ __ move(S1, A1); -+ __ move(S2, A2); -+ __ move(S3, A3); -+ __ move(S4, A4); -+ + BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler(); -+ bs->arraycopy_prologue(_masm, decorators, is_oop, to, count); -+ -+ __ move(A0, S0); -+ __ move(A1, S1); -+ __ move(A2, S2); -+ __ move(A3, S3); -+ __ move(A4, S4); ++ bs->arraycopy_prologue(_masm, decorators, is_oop, to, count, wb_pre_saved_regs); + + // save the original count + __ move(count_save, count); @@ -48278,19 +48608,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ bind(L_do_card_marks); + -+ __ move(S0, count); -+ -+ bs->arraycopy_epilogue(_masm, decorators, is_oop, start_to, count_save, tmp2); -+ -+ __ move(count, S0); ++ bs->arraycopy_epilogue(_masm, decorators, is_oop, start_to, count_save, tmp2, wb_post_saved_regs); + + __ bind(L_done_pop); -+ __ ld_d(S0, SP, 0 * wordSize); -+ __ ld_d(S1, SP, 1 * wordSize); -+ __ ld_d(S2, SP, 2 * wordSize); -+ __ ld_d(S3, SP, 3 * wordSize); -+ __ ld_d(S4, SP, 4 * wordSize); -+ __ addi_d(SP, SP, 6 * wordSize); ++ __ pop(RegSet::of(S0, S1, S2, S3, RA)); + +#ifndef PRODUCT + __ li(SCR2, (address)&SharedRuntime::_checkcast_array_copy_ctr); @@ -50546,10 +50867,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + generate_arraycopy_stubs(); +#endif + -+ if (UseMulAddIntrinsic) { -+ StubRoutines::_mulAdd = generate_mulAdd(); -+ } -+ + if (UseLSX && vmIntrinsics::is_intrinsic_available(vmIntrinsics::_dsin)) { + StubRoutines::_dsin = generate_dsin_dcos(/* isCos = */ false); + } @@ -50566,6 +50883,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + &StubRoutines::_safefetchN_fault_pc, + &StubRoutines::_safefetchN_continuation_pc); + ++#ifdef COMPILER2 ++ if (UseMulAddIntrinsic) { ++ StubRoutines::_mulAdd = generate_mulAdd(); ++ } ++ + if (UseMontgomeryMultiplyIntrinsic) { + StubCodeMark mark(this, "StubRoutines", "montgomeryMultiply"); + MontgomeryMultiplyGenerator g(_masm, false /* squaring */); @@ -50579,6 +50901,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // because it's faster for the sizes of modulus we care about. + StubRoutines::_montgomerySquare = g.generate_multiply(); + } ++#endif + + if (UseAESIntrinsics) { + StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock(false); @@ -50609,9 +50932,84 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +void StubGenerator_generate(CodeBuffer* code, bool all) { + StubGenerator g(code, all); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp 2023-09-12 13:54:23.093571662 +0800 +diff --git a/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp +new file mode 100644 +index 000000000..0ab07e1e9 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp +@@ -0,0 +1,67 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP ++ ++// This file holds the platform specific parts of the StubRoutines ++// definition. See stubRoutines.hpp for a description on how to ++// extend it. ++ ++static bool returns_to_call_stub(address return_pc){ ++ return return_pc == _call_stub_return_address||return_pc == la::get_call_stub_compiled_return(); ++} ++ ++enum platform_dependent_constants { ++ code_size1 = 20000, // simply increase if too small (assembler will crash if too small) ++ code_size2 = 60000 // simply increase if too small (assembler will crash if too small) ++}; ++ ++class la { ++ friend class StubGenerator; ++ friend class VMStructs; ++ private: ++ // If we call compiled code directly from the call stub we will ++ // need to adjust the return back to the call stub to a specialized ++ // piece of code that can handle compiled results and cleaning the fpu ++ // stack. The variable holds that location. ++ static address _call_stub_compiled_return; ++ static juint _crc_table[]; ++ // begin trigonometric tables block. See comments in .cpp file ++ static juint _npio2_hw[]; ++ static jdouble _two_over_pi[]; ++ static jdouble _pio2[]; ++ static jdouble _dsin_coef[]; ++ static jdouble _dcos_coef[]; ++ // end trigonometric tables block ++ ++public: ++ // Call back points for traps in compiled code ++ static address get_call_stub_compiled_return() { return _call_stub_compiled_return; } ++ static void set_call_stub_compiled_return(address ret){ _call_stub_compiled_return = ret; } ++ ++}; ++ ++#endif // CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp +new file mode 100644 +index 000000000..1a6ea3bcd +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp @@ -0,0 +1,178 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -50791,81 +51189,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + 2.73370053816464559624e-44, // 0x36E3822280000000 + 2.16741683877804819444e-51, // 0x3569F31D00000000 +}; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,67 @@ -+/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -+ -+// This file holds the platform specific parts of the StubRoutines -+// definition. See stubRoutines.hpp for a description on how to -+// extend it. -+ -+static bool returns_to_call_stub(address return_pc){ -+ return return_pc == _call_stub_return_address||return_pc == la::get_call_stub_compiled_return(); -+} -+ -+enum platform_dependent_constants { -+ code_size1 = 20000, // simply increase if too small (assembler will crash if too small) -+ code_size2 = 60000 // simply increase if too small (assembler will crash if too small) -+}; -+ -+class la { -+ friend class StubGenerator; -+ friend class VMStructs; -+ private: -+ // If we call compiled code directly from the call stub we will -+ // need to adjust the return back to the call stub to a specialized -+ // piece of code that can handle compiled results and cleaning the fpu -+ // stack. The variable holds that location. -+ static address _call_stub_compiled_return; -+ static juint _crc_table[]; -+ // begin trigonometric tables block. See comments in .cpp file -+ static juint _npio2_hw[]; -+ static jdouble _two_over_pi[]; -+ static jdouble _pio2[]; -+ static jdouble _dsin_coef[]; -+ static jdouble _dcos_coef[]; -+ // end trigonometric tables block -+ -+public: -+ // Call back points for traps in compiled code -+ static address get_call_stub_compiled_return() { return _call_stub_compiled_return; } -+ static void set_call_stub_compiled_return(address ret){ _call_stub_compiled_return = ret; } -+ -+}; -+ -+#endif // CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,2223 @@ +diff --git a/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp +new file mode 100644 +index 000000000..be1d28d4b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp +@@ -0,0 +1,2269 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -50893,9 +51222,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" ++#include "gc/shared/barrierSetAssembler.hpp" +#include "interpreter/bytecodeHistogram.hpp" +#include "interpreter/interpreter.hpp" +#include "interpreter/interpreterRuntime.hpp" ++#include "interpreter/interp_masm.hpp" +#include "interpreter/templateInterpreterGenerator.hpp" +#include "interpreter/templateTable.hpp" +#include "oops/arrayOop.hpp" @@ -51875,10 +52206,54 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +// Method entry for java.lang.ref.Reference.get. +address TemplateInterpreterGenerator::generate_Reference_get_entry(void) { ++ // Code: _aload_0, _getfield, _areturn ++ // parameter size = 1 ++ // ++ // The code that gets generated by this routine is split into 2 parts: ++ // 1. The "intrinsified" code for G1 (or any SATB based GC), ++ // 2. The slow path - which is an expansion of the regular method entry. ++ // ++ // Notes:- ++ // * In the G1 code we do not check whether we need to block for ++ // a safepoint. If G1 is enabled then we must execute the specialized ++ // code for Reference.get (except when the Reference object is null) ++ // so that we can log the value in the referent field with an SATB ++ // update buffer. ++ // If the code for the getfield template is modified so that the ++ // G1 pre-barrier code is executed when the current method is ++ // Reference.get() then going through the normal method entry ++ // will be fine. ++ // * The G1 code can, however, check the receiver object (the instance ++ // of java.lang.Reference) and jump to the slow path if null. If the ++ // Reference object is null then we obviously cannot fetch the referent ++ // and so we don't need to call the G1 pre-barrier. Thus we can use the ++ // regular method entry code to generate the NPE. ++ // ++ // This code is based on generate_accessor_entry. ++ // ++ // Rmethod: Method* ++ // Rsender: senderSP must preserve for slow path, set SP to it on fast path ++ // RA is live. It must be saved around calls. + + address entry = __ pc(); ++ ++ const int referent_offset = java_lang_ref_Reference::referent_offset; ++ + Label slow_path; -+ __ b(slow_path); ++ const Register local_0 = A0; ++ // Check if local 0 != NULL ++ // If the receiver is null then it is OK to jump to the slow path. ++ __ ld_d(local_0, Address(SP, 0)); ++ __ beqz(local_0, slow_path); ++ ++ // Load the value of the referent field. ++ const Address field_address(local_0, referent_offset); ++ BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler(); ++ bs->load_at(_masm, IN_HEAP | ON_WEAK_OOP_REF, T_OBJECT, local_0, field_address, /*tmp1*/ T4, /*tmp2*/ noreg); ++ ++ // areturn ++ __ move(SP, Rsender); ++ __ jr(RA); + + // generate a vanilla interpreter entry as the slow path + __ bind(slow_path); @@ -53089,13 +53464,64 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(L); +} +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp 2023-11-01 09:34:25.489945263 +0800 -@@ -0,0 +1,4145 @@ +diff --git a/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp +new file mode 100644 +index 000000000..ddb38faf4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp +@@ -0,0 +1,43 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++ ++ static void prepare_invoke(int byte_no, ++ Register method, // linked method (or i-klass) ++ Register index = noreg, // itable index, MethodType, etc. ++ Register recv = noreg, // if caller wants to see it ++ Register flags = noreg // if caller wants to test it ++ ); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); ++ ++#endif // CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp +new file mode 100644 +index 000000000..673032218 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp +@@ -0,0 +1,4113 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -53122,12 +53548,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "asm/macroAssembler.hpp" +#include "interpreter/interpreter.hpp" +#include "interpreter/interpreterRuntime.hpp" ++#include "interpreter/interp_masm.hpp" +#include "interpreter/templateTable.hpp" +#include "memory/universe.hpp" +#include "oops/methodData.hpp" +#include "oops/objArrayKlass.hpp" +#include "oops/oop.inline.hpp" +#include "prims/methodHandles.hpp" ++#include "runtime/frame.inline.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" +#include "runtime/synchronizer.hpp" @@ -55335,38 +55763,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ jr(T4); +} + -+// ---------------------------------------------------------------------------- -+// Volatile variables demand their effects be made known to all CPU's -+// in order. Store buffers on most chips allow reads & writes to -+// reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode -+// without some kind of memory barrier (i.e., it's not sufficient that -+// the interpreter does not reorder volatile references, the hardware -+// also must not reorder them). -+// -+// According to the new Java Memory Model (JMM): -+// (1) All volatiles are serialized wrt to each other. ALSO reads & -+// writes act as aquire & release, so: -+// (2) A read cannot let unrelated NON-volatile memory refs that -+// happen after the read float up to before the read. It's OK for -+// non-volatile memory refs that happen before the volatile read to -+// float down below it. -+// (3) Similar a volatile write cannot let unrelated NON-volatile -+// memory refs that happen BEFORE the write float down to after the -+// write. It's OK for non-volatile memory refs that happen after the -+// volatile write to float up before it. -+// -+// We only put in barriers around volatile refs (they are expensive), -+// not _between_ memory refs (that would require us to track the -+// flavor of the previous memory refs). Requirements (2) and (3) -+// require some barriers before volatile stores and after volatile -+// loads. These nearly cover requirement (1) but miss the -+// volatile-store-volatile-load case. This final case is placed after -+// volatile-stores although it could just as well go before -+// volatile-loads. -+void TemplateTable::volatile_barrier() { -+ if(os::is_MP()) __ membar(__ StoreLoad); -+} -+ +// we dont shift left 2 bits in get_cache_and_index_at_bcp +// for we always need shift the index we use it. the ConstantPoolCacheEntry +// is 16-byte long, index is the index in @@ -55562,7 +55958,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -55708,7 +56104,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -55824,7 +56220,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreStore | __ LoadStore)); + __ bind(notVolatile); + } + @@ -55996,7 +56392,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreLoad | __ StoreStore)); + __ bind(notVolatile); + } +} @@ -56105,7 +56501,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreStore | __ LoadStore)); + __ bind(notVolatile); + } + @@ -56154,7 +56550,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreLoad | __ StoreStore)); + __ bind(notVolatile); + } +} @@ -56205,7 +56601,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -56249,7 +56645,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -56279,7 +56675,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -56304,7 +56700,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -56636,7 +57032,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ bind(no_such_method); + // throw exception -+ __ pop(Rmethod); // pop return address (pushed by prepare_invoke) + __ restore_bcp(); + __ restore_locals(); + // Pass arguments for generating a verbose error message. @@ -56650,7 +57045,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ bind(no_such_interface); + // throw exception -+ __ pop(Rmethod); // pop return address (pushed by prepare_invoke) + __ restore_bcp(); + __ restore_locals(); + // Pass arguments for generating a verbose error message. @@ -57238,12 +57632,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ membar(__ AnyAny);//no membar here for aarch64 +} +#endif // !CC_INTERP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,43 @@ +diff --git a/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp +new file mode 100644 +index 000000000..5b9f7b789 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp +@@ -0,0 +1,61 @@ +/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -57267,88 +57663,51 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++#ifndef CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP ++#define CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP + -+ static void prepare_invoke(int byte_no, -+ Register method, // linked method (or i-klass) -+ Register index = noreg, // itable index, MethodType, etc. -+ Register recv = noreg, // if caller wants to see it -+ Register flags = noreg // if caller wants to test it -+ ); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ static void volatile_barrier(); ++// These are the CPU-specific fields, types and integer ++// constants required by the Serviceability Agent. This file is ++// referenced by vmStructs.cpp. + -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); ++#define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ ++ volatile_nonstatic_field(JavaFrameAnchor, _last_Java_fp, intptr_t*) \ ++ \ + -+#endif // CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,53 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_STRUCTS_OS_CPU macro (and must */ ++ /* be present there) */ + -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" + ++#define VM_TYPES_CPU(declare_type, declare_toplevel_type, declare_oop_type, declare_integer_type, declare_unsigned_integer_type, declare_c1_toplevel_type, declare_c2_type, declare_c2_toplevel_type) \ ++ ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_TYPES_OS_CPU macro (and must */ ++ /* be present there) */ + + -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ for (int j = 0 ; j < RegisterImpl::max_slots_per_register ; j++) { -+ regName[i++] = reg->name(); -+ } -+ reg = reg->successor(); -+ } ++#define VM_INT_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ + -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ for (int j = 0 ; j < FloatRegisterImpl::max_slots_per_register ; j++) { -+ regName[i++] = freg->name(); -+ } -+ freg = freg->successor(); -+ } ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_INT_CONSTANTS_OS_CPU macro (and must */ ++ /* be present there) */ + -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,58 @@ ++#define VM_LONG_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ ++ ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_LONG_CONSTANTS_OS_CPU macro (and must */ ++ /* be present there) */ ++ ++#endif // CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp +new file mode 100644 +index 000000000..eb8f075c7 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp +@@ -0,0 +1,85 @@ +/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -57371,89 +57730,75 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_HPP -+#define CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++#include "memory/allocation.inline.hpp" ++#include "runtime/os.inline.hpp" ++#include "vm_version_ext_loongarch.hpp" + -+inline bool is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; -+} ++// VM_Version_Ext statics ++int VM_Version_Ext::_no_of_threads = 0; ++int VM_Version_Ext::_no_of_cores = 0; ++int VM_Version_Ext::_no_of_sockets = 0; ++bool VM_Version_Ext::_initialized = false; ++char VM_Version_Ext::_cpu_name[CPU_TYPE_DESC_BUF_SIZE] = {0}; ++char VM_Version_Ext::_cpu_desc[CPU_DETAILED_DESC_BUF_SIZE] = {0}; + -+inline Register as_Register() { -+ assert( is_Register(), "must be"); -+ return ::as_Register(value() / RegisterImpl::max_slots_per_register); -+} ++void VM_Version_Ext::initialize_cpu_information(void) { ++ // do nothing if cpu info has been initialized ++ if (_initialized) { ++ return; ++ } + -+inline bool is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++ _no_of_cores = os::processor_count(); ++ _no_of_threads = _no_of_cores; ++ _no_of_sockets = _no_of_cores; ++ snprintf(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "LoongArch"); ++ snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "LoongArch %s", cpu_features()); ++ _initialized = true; +} + -+inline FloatRegister as_FloatRegister() { -+ assert( is_FloatRegister() && is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) / -+ FloatRegisterImpl::max_slots_per_register); ++int VM_Version_Ext::number_of_threads(void) { ++ initialize_cpu_information(); ++ return _no_of_threads; +} + -+inline bool is_concrete() { -+ assert(is_reg(), "must be"); -+ if (is_FloatRegister()) { -+ int base = value() - ConcreteRegisterImpl::max_gpr; -+ return base % FloatRegisterImpl::max_slots_per_register == 0; -+ } else { -+ return is_even(value()); -+ } ++int VM_Version_Ext::number_of_cores(void) { ++ initialize_cpu_information(); ++ return _no_of_cores; +} + -+#endif // CPU_LOONGARCH_VMREG_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp jdk11u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,39 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -+#define CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -+ -+inline VMReg RegisterImpl::as_VMReg() { -+ if( this==noreg ) return VMRegImpl::Bad(); -+ return VMRegImpl::as_VMReg(encoding() * RegisterImpl::max_slots_per_register); ++int VM_Version_Ext::number_of_sockets(void) { ++ initialize_cpu_information(); ++ return _no_of_sockets; +} + -+inline VMReg FloatRegisterImpl::as_VMReg() { -+ return VMRegImpl::as_VMReg((encoding() * FloatRegisterImpl::max_slots_per_register) + -+ ConcreteRegisterImpl::max_gpr); ++const char* VM_Version_Ext::cpu_name(void) { ++ initialize_cpu_information(); ++ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_TYPE_DESC_BUF_SIZE, mtTracing); ++ if (NULL == tmp) { ++ return NULL; ++ } ++ strncpy(tmp, _cpu_name, CPU_TYPE_DESC_BUF_SIZE); ++ return tmp; +} + -+#endif // CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,61 @@ ++const char* VM_Version_Ext::cpu_description(void) { ++ initialize_cpu_information(); ++ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_DETAILED_DESC_BUF_SIZE, mtTracing); ++ if (NULL == tmp) { ++ return NULL; ++ } ++ strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); ++ return tmp; ++} +diff --git a/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp +new file mode 100644 +index 000000000..1a9312313 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp +@@ -0,0 +1,54 @@ +/* -+ * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -57476,196 +57821,44 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP -+#define CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP -+ -+// These are the CPU-specific fields, types and integer -+// constants required by the Serviceability Agent. This file is -+// referenced by vmStructs.cpp. -+ -+#define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ -+ volatile_nonstatic_field(JavaFrameAnchor, _last_Java_fp, intptr_t*) \ -+ \ -+ -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_STRUCTS_OS_CPU macro (and must */ -+ /* be present there) */ -+ -+ -+#define VM_TYPES_CPU(declare_type, declare_toplevel_type, declare_oop_type, declare_integer_type, declare_unsigned_integer_type, declare_c1_toplevel_type, declare_c2_type, declare_c2_toplevel_type) \ -+ -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_TYPES_OS_CPU macro (and must */ -+ /* be present there) */ ++#ifndef CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP + ++#include "runtime/vm_version.hpp" ++#include "utilities/macros.hpp" + -+#define VM_INT_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ ++class VM_Version_Ext : public VM_Version { ++ private: ++ static const size_t CPU_TYPE_DESC_BUF_SIZE = 256; ++ static const size_t CPU_DETAILED_DESC_BUF_SIZE = 4096; + -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_INT_CONSTANTS_OS_CPU macro (and must */ -+ /* be present there) */ ++ static int _no_of_threads; ++ static int _no_of_cores; ++ static int _no_of_sockets; ++ static bool _initialized; ++ static char _cpu_name[CPU_TYPE_DESC_BUF_SIZE]; ++ static char _cpu_desc[CPU_DETAILED_DESC_BUF_SIZE]; + -+#define VM_LONG_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ ++ public: ++ static int number_of_threads(void); ++ static int number_of_cores(void); ++ static int number_of_sockets(void); + -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_LONG_CONSTANTS_OS_CPU macro (and must */ -+ /* be present there) */ ++ static const char* cpu_name(void); ++ static const char* cpu_description(void); ++ static void initialize_cpu_information(void); ++}; + -+#endif // CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,85 @@ ++#endif // CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp +new file mode 100644 +index 000000000..911513516 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp +@@ -0,0 +1,397 @@ +/* -+ * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "memory/allocation.inline.hpp" -+#include "runtime/os.inline.hpp" -+#include "vm_version_ext_loongarch.hpp" -+ -+// VM_Version_Ext statics -+int VM_Version_Ext::_no_of_threads = 0; -+int VM_Version_Ext::_no_of_cores = 0; -+int VM_Version_Ext::_no_of_sockets = 0; -+bool VM_Version_Ext::_initialized = false; -+char VM_Version_Ext::_cpu_name[CPU_TYPE_DESC_BUF_SIZE] = {0}; -+char VM_Version_Ext::_cpu_desc[CPU_DETAILED_DESC_BUF_SIZE] = {0}; -+ -+void VM_Version_Ext::initialize_cpu_information(void) { -+ // do nothing if cpu info has been initialized -+ if (_initialized) { -+ return; -+ } -+ -+ _no_of_cores = os::processor_count(); -+ _no_of_threads = _no_of_cores; -+ _no_of_sockets = _no_of_cores; -+ snprintf(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "LoongArch"); -+ snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "LoongArch %s", cpu_features()); -+ _initialized = true; -+} -+ -+int VM_Version_Ext::number_of_threads(void) { -+ initialize_cpu_information(); -+ return _no_of_threads; -+} -+ -+int VM_Version_Ext::number_of_cores(void) { -+ initialize_cpu_information(); -+ return _no_of_cores; -+} -+ -+int VM_Version_Ext::number_of_sockets(void) { -+ initialize_cpu_information(); -+ return _no_of_sockets; -+} -+ -+const char* VM_Version_Ext::cpu_name(void) { -+ initialize_cpu_information(); -+ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_TYPE_DESC_BUF_SIZE, mtTracing); -+ if (NULL == tmp) { -+ return NULL; -+ } -+ strncpy(tmp, _cpu_name, CPU_TYPE_DESC_BUF_SIZE); -+ return tmp; -+} -+ -+const char* VM_Version_Ext::cpu_description(void) { -+ initialize_cpu_information(); -+ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_DETAILED_DESC_BUF_SIZE, mtTracing); -+ if (NULL == tmp) { -+ return NULL; -+ } -+ strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); -+ return tmp; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp 2023-09-12 13:54:23.093571662 +0800 -@@ -0,0 +1,54 @@ -+/* -+ * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP -+ -+#include "runtime/vm_version.hpp" -+#include "utilities/macros.hpp" -+ -+class VM_Version_Ext : public VM_Version { -+ private: -+ static const size_t CPU_TYPE_DESC_BUF_SIZE = 256; -+ static const size_t CPU_DETAILED_DESC_BUF_SIZE = 4096; -+ -+ static int _no_of_threads; -+ static int _no_of_cores; -+ static int _no_of_sockets; -+ static bool _initialized; -+ static char _cpu_name[CPU_TYPE_DESC_BUF_SIZE]; -+ static char _cpu_desc[CPU_DETAILED_DESC_BUF_SIZE]; -+ -+ public: -+ static int number_of_threads(void); -+ static int number_of_cores(void); -+ static int number_of_sockets(void); -+ -+ static const char* cpu_name(void); -+ static const char* cpu_description(void); -+ static void initialize_cpu_information(void); -+}; -+ -+#endif // CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,412 @@ -+/* -+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -57701,7 +57894,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#define T5 RT5 + -+int VM_Version::_cpuFeatures; +const char* VM_Version::_features_str = ""; +VM_Version::CpuidInfo VM_Version::_cpuid_info = { 0, }; +bool VM_Version::_cpu_info_is_initialized = false; @@ -57795,27 +57987,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } else if (_cpuid_info.cpucfg_info_id1.bits.ARCH == 0b10 ) { + result |= CPU_LA64; + } -+ if (_cpuid_info.cpucfg_info_id1.bits.UAL != 0) -+ result |= CPU_UAL; + + if (_cpuid_info.cpucfg_info_id2.bits.FP_CFG != 0) + result |= CPU_FP; -+ if (_cpuid_info.cpucfg_info_id2.bits.LSX != 0) -+ result |= CPU_LSX; -+ if (_cpuid_info.cpucfg_info_id2.bits.LASX != 0) -+ result |= CPU_LASX; -+ if (_cpuid_info.cpucfg_info_id2.bits.COMPLEX != 0) -+ result |= CPU_COMPLEX; -+ if (_cpuid_info.cpucfg_info_id2.bits.CRYPTO != 0) -+ result |= CPU_CRYPTO; -+ if (_cpuid_info.cpucfg_info_id2.bits.LBT_X86 != 0) -+ result |= CPU_LBT_X86; -+ if (_cpuid_info.cpucfg_info_id2.bits.LBT_ARM != 0) -+ result |= CPU_LBT_ARM; -+ if (_cpuid_info.cpucfg_info_id2.bits.LBT_MIPS != 0) -+ result |= CPU_LBT_MIPS; -+ if (_cpuid_info.cpucfg_info_id2.bits.LAM != 0) -+ result |= CPU_LAM; + + if (_cpuid_info.cpucfg_info_id3.bits.CCDMA != 0) + result |= CPU_CCDMA; @@ -57835,18 +58009,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + clean_cpuFeatures(); + ++ get_os_cpu_info(); ++ + get_cpu_info_stub(&_cpuid_info); -+ _cpuFeatures = get_feature_flags_by_cpucfg(); ++ _features |= get_feature_flags_by_cpucfg(); + + _supports_cx8 = true; + + if (UseG1GC && FLAG_IS_DEFAULT(MaxGCPauseMillis)) { -+ FLAG_SET_CMDLINE(uintx, MaxGCPauseMillis, 650); ++ FLAG_SET_DEFAULT(MaxGCPauseMillis, 150); + } + + if (supports_lsx()) { + if (FLAG_IS_DEFAULT(UseLSX)) { -+ //FLAG_SET_DEFAULT(UseLSX, true); ++ FLAG_SET_DEFAULT(UseLSX, true); + } + } else if (UseLSX) { + warning("LSX instructions are not available on this CPU"); @@ -57855,7 +58031,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + if (supports_lasx()) { + if (FLAG_IS_DEFAULT(UseLASX)) { -+ //FLAG_SET_DEFAULT(UseLASX, true); ++ FLAG_SET_DEFAULT(UseLASX, true); + } + } else if (UseLASX) { + warning("LASX instructions are not available on this CPU"); @@ -58033,6 +58209,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + } + ++#ifdef COMPILER2 + if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) { + FLAG_SET_DEFAULT(UseMulAddIntrinsic, true); + } @@ -58043,6 +58220,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { + UseMontgomerySquareIntrinsic = true; + } ++#endif + + // This machine allows unaligned memory accesses + if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { @@ -58075,13 +58253,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + get_processor_features(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp 2023-11-01 09:34:25.493945267 +0800 +diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp +new file mode 100644 +index 000000000..00b8e608a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp @@ -0,0 +1,292 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -58279,30 +58459,30 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +protected: + + enum { -+ CPU_LA32 = (1 << 1), -+ CPU_LA64 = (1 << 2), -+ CPU_LLEXC = (1 << 3), -+ CPU_SCDLY = (1 << 4), -+ CPU_LLDBAR = (1 << 5), -+ CPU_LBT_X86 = (1 << 6), -+ CPU_LBT_ARM = (1 << 7), -+ CPU_LBT_MIPS = (1 << 8), -+ CPU_CCDMA = (1 << 9), -+ CPU_COMPLEX = (1 << 10), -+ CPU_FP = (1 << 11), -+ CPU_CRYPTO = (1 << 14), -+ CPU_LSX = (1 << 15), -+ CPU_LASX = (1 << 17), -+ CPU_LAM = (1 << 21), -+ CPU_LLSYNC = (1 << 23), -+ CPU_TGTSYNC = (1 << 24), -+ CPU_ULSYNC = (1 << 25), -+ CPU_UAL = (1 << 26), ++ CPU_LAM = (1 << 1), ++ CPU_UAL = (1 << 2), ++ CPU_LSX = (1 << 4), ++ CPU_LASX = (1 << 5), ++ CPU_COMPLEX = (1 << 7), ++ CPU_CRYPTO = (1 << 8), ++ CPU_LBT_X86 = (1 << 10), ++ CPU_LBT_ARM = (1 << 11), ++ CPU_LBT_MIPS = (1 << 12), ++ // flags above must follow Linux HWCAP ++ CPU_LA32 = (1 << 13), ++ CPU_LA64 = (1 << 14), ++ CPU_FP = (1 << 15), ++ CPU_LLEXC = (1 << 16), ++ CPU_SCDLY = (1 << 17), ++ CPU_LLDBAR = (1 << 18), ++ CPU_CCDMA = (1 << 19), ++ CPU_LLSYNC = (1 << 20), ++ CPU_TGTSYNC = (1 << 21), ++ CPU_ULSYNC = (1 << 22), + + //////////////////////add some other feature here////////////////// + } cpuFeatureFlags; + -+ static int _cpuFeatures; + static const char* _features_str; + static bool _cpu_info_is_initialized; + @@ -58325,8 +58505,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static CpuidInfo _cpuid_info; + + static uint32_t get_feature_flags_by_cpucfg(); -+ static int get_feature_flags_by_cpuinfo(int features); + static void get_processor_features(); ++ static void get_os_cpu_info(); + +public: + // Offsets for cpuid asm stub @@ -58343,26 +58523,26 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static ByteSize Loongson_Cpucfg_id13_offset() { return byte_offset_of(CpuidInfo, cpucfg_info_id13); } + static ByteSize Loongson_Cpucfg_id14_offset() { return byte_offset_of(CpuidInfo, cpucfg_info_id14); } + -+ static void clean_cpuFeatures() { _cpuFeatures = 0; } ++ static void clean_cpuFeatures() { _features = 0; } + + // Initialization + static void initialize(); + + static bool cpu_info_is_initialized() { return _cpu_info_is_initialized; } + -+ static bool is_la32() { return _cpuFeatures & CPU_LA32; } -+ static bool is_la64() { return _cpuFeatures & CPU_LA64; } -+ static bool supports_crypto() { return _cpuFeatures & CPU_CRYPTO; } -+ static bool supports_lsx() { return _cpuFeatures & CPU_LSX; } -+ static bool supports_lasx() { return _cpuFeatures & CPU_LASX; } -+ static bool supports_lam() { return _cpuFeatures & CPU_LAM; } -+ static bool supports_llexc() { return _cpuFeatures & CPU_LLEXC; } -+ static bool supports_scdly() { return _cpuFeatures & CPU_SCDLY; } -+ static bool supports_lldbar() { return _cpuFeatures & CPU_LLDBAR; } -+ static bool supports_ual() { return _cpuFeatures & CPU_UAL; } -+ static bool supports_lbt_x86() { return _cpuFeatures & CPU_LBT_X86; } -+ static bool supports_lbt_arm() { return _cpuFeatures & CPU_LBT_ARM; } -+ static bool supports_lbt_mips() { return _cpuFeatures & CPU_LBT_MIPS; } ++ static bool is_la32() { return _features & CPU_LA32; } ++ static bool is_la64() { return _features & CPU_LA64; } ++ static bool supports_crypto() { return _features & CPU_CRYPTO; } ++ static bool supports_lsx() { return _features & CPU_LSX; } ++ static bool supports_lasx() { return _features & CPU_LASX; } ++ static bool supports_lam() { return _features & CPU_LAM; } ++ static bool supports_llexc() { return _features & CPU_LLEXC; } ++ static bool supports_scdly() { return _features & CPU_SCDLY; } ++ static bool supports_lldbar() { return _features & CPU_LLDBAR; } ++ static bool supports_ual() { return _features & CPU_UAL; } ++ static bool supports_lbt_x86() { return _features & CPU_LBT_X86; } ++ static bool supports_lbt_arm() { return _features & CPU_LBT_ARM; } ++ static bool supports_lbt_mips() { return _features & CPU_LBT_MIPS; } + static bool needs_llsync() { return !supports_lldbar(); } + static bool needs_tgtsync() { return 1; } + static bool needs_ulsync() { return 1; } @@ -58371,9 +58551,179 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_VM_VERSION_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp jdk11u-ls/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp 2023-09-12 13:54:23.093571662 +0800 +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp +new file mode 100644 +index 000000000..43caba518 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp +@@ -0,0 +1,53 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ for (int j = 0 ; j < RegisterImpl::max_slots_per_register ; j++) { ++ regName[i++] = reg->name(); ++ } ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ for (int j = 0 ; j < FloatRegisterImpl::max_slots_per_register ; j++) { ++ regName[i++] = freg->name(); ++ } ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp +new file mode 100644 +index 000000000..819eaff0b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++#define CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++ ++inline bool is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline Register as_Register() { ++ assert( is_Register(), "must be"); ++ return ::as_Register(value() / RegisterImpl::max_slots_per_register); ++} ++ ++inline bool is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline FloatRegister as_FloatRegister() { ++ assert( is_FloatRegister() && is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) / ++ FloatRegisterImpl::max_slots_per_register); ++} ++ ++inline bool is_concrete() { ++ assert(is_reg(), "must be"); ++ if (is_FloatRegister()) { ++ int base = value() - ConcreteRegisterImpl::max_gpr; ++ return base % FloatRegisterImpl::max_slots_per_register == 0; ++ } else { ++ return is_even(value()); ++ } ++} ++ ++#endif // CPU_LOONGARCH_VMREG_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp +new file mode 100644 +index 000000000..edb78e36d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp +@@ -0,0 +1,39 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP ++#define CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP ++ ++inline VMReg RegisterImpl::as_VMReg() { ++ if( this==noreg ) return VMRegImpl::Bad(); ++ return VMRegImpl::as_VMReg(encoding() * RegisterImpl::max_slots_per_register); ++} ++ ++inline VMReg FloatRegisterImpl::as_VMReg() { ++ return VMRegImpl::as_VMReg((encoding() * FloatRegisterImpl::max_slots_per_register) + ++ ConcreteRegisterImpl::max_gpr); ++} ++ ++#endif // CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP +diff --git a/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp +new file mode 100644 +index 000000000..2c4b60653 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp @@ -0,0 +1,322 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. @@ -58697,9 +59047,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + const unsigned int icache_line_size = wordSize; + return icache_line_size; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp ---- openjdk/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp b/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp +new file mode 100644 +index 000000000..73f021c9b +--- /dev/null ++++ b/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -58833,10 +59185,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/abstr + *interpreter_frame->interpreter_frame_mirror_addr() = method->method_holder()->java_mirror(); +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assembler_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/assembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/assembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/assembler_mips.cpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,733 @@ +diff --git a/src/hotspot/cpu/mips/assembler_mips.cpp b/src/hotspot/cpu/mips/assembler_mips.cpp +new file mode 100644 +index 000000000..c8c7a5d4d +--- /dev/null ++++ b/src/hotspot/cpu/mips/assembler_mips.cpp +@@ -0,0 +1,759 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -58876,6 +59230,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" +#include "utilities/macros.hpp" ++#ifndef PRODUCT ++#include "compiler/disassembler.hpp" ++#endif + +#ifdef PRODUCT +#define BLOCK_COMMENT(str) /* nothing */ @@ -59570,10 +59927,35 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + emit_long((jal_op<<26) | dest); + has_delay_slot(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/assembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/assembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/assembler_mips.hpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,1802 @@ ++ ++void Assembler::emit_long(int x) { // shadows AbstractAssembler::emit_long ++ check_delay(); ++ AbstractAssembler::emit_int32(x); ++} ++ ++inline void Assembler::emit_data(int x) { emit_long(x); } ++inline void Assembler::emit_data(int x, relocInfo::relocType rtype) { ++ relocate(rtype); ++ emit_long(x); ++} ++ ++inline void Assembler::emit_data(int x, RelocationHolder const& rspec) { ++ relocate(rspec); ++ emit_long(x); ++} ++ ++inline void Assembler::check_delay() { ++#ifdef CHECK_DELAY ++ guarantee(delay_state != at_delay_slot, "must say delayed() when filling delay slot"); ++ delay_state = no_delay; ++#endif ++} +diff --git a/src/hotspot/cpu/mips/assembler_mips.hpp b/src/hotspot/cpu/mips/assembler_mips.hpp +new file mode 100644 +index 000000000..102a7ba52 +--- /dev/null ++++ b/src/hotspot/cpu/mips/assembler_mips.hpp +@@ -0,0 +1,1789 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -60242,13 +60624,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + gssdbbp_op = 0x38 + }; + -+ enum gscam_ops { -+ campv_op = 0x0, -+ campi_op = 0x1, -+ camwi_op = 0x2, -+ ramri_op = 0x3 -+ }; -+ + static const char* special2_name[]; + + // special3 family, the opcode is in low 6 bits. @@ -60273,8 +60648,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + re2_op = 0x16, //MIPS DSP, re2_ops + sh2_op = 0x17, //MIPS DSP + ar3_op = 0x18, //MIPS DSP -+ bshfl_op = 0x20, //seb, seh -+ rdhwr_op = 0x3b ++ bshfl_op = 0x20 //seb, seh + }; + + // re1_ops @@ -60521,8 +60895,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +#endif + } + -+ inline bool is_load_op(int); -+ inline void check_load_and_patch(int); +protected: + // Delay slot helpers + // cti is called when emitting control-transfer instruction, @@ -60553,11 +60925,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + AbstractAssembler::flush(); + } + -+ inline void emit_long(int); // shadows AbstractAssembler::emit_long -+ inline void emit_data(int x) { emit_long(x); } -+ inline void emit_data(int, RelocationHolder const&); -+ inline void emit_data(int, relocInfo::relocType rtype); -+ inline void check_delay(); ++ void emit_long(int); // shadows AbstractAssembler::emit_long ++ void emit_data(int); ++ void emit_data(int, RelocationHolder const&); ++ void emit_data(int, relocInfo::relocType rtype); ++ void check_delay(); + + + // Generic instructions @@ -61372,14 +61744,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + static address locate_next_instruction(address inst); +}; + -+ -+#include "assembler_mips.inline.hpp" -+ +#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assembler_mips.inline.hpp jdk11u-ls/src/hotspot/cpu/mips/assembler_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/assembler_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/assembler_mips.inline.hpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,227 @@ +diff --git a/src/hotspot/cpu/mips/assembler_mips.inline.hpp b/src/hotspot/cpu/mips/assembler_mips.inline.hpp +new file mode 100644 +index 000000000..f35a06fc4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/assembler_mips.inline.hpp +@@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. @@ -61411,394 +61782,204 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +#include "asm/assembler.inline.hpp" +#include "asm/codeBuffer.hpp" +#include "code/codeCache.hpp" -+#ifndef PRODUCT -+#include "compiler/disassembler.hpp" -+#endif + ++#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP +diff --git a/src/hotspot/cpu/mips/bytes_mips.hpp b/src/hotspot/cpu/mips/bytes_mips.hpp +new file mode 100644 +index 000000000..4172db219 +--- /dev/null ++++ b/src/hotspot/cpu/mips/bytes_mips.hpp +@@ -0,0 +1,181 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ + ++#ifndef CPU_MIPS_VM_BYTES_MIPS_HPP ++#define CPU_MIPS_VM_BYTES_MIPS_HPP + -+inline void Assembler::check_delay() { -+# ifdef CHECK_DELAY -+ guarantee(delay_state != at_delay_slot, "must say delayed() when filling delay slot"); -+ delay_state = no_delay; -+# endif -+} ++#include "memory/allocation.hpp" + -+inline void Assembler::emit_long(int x) { -+ check_delay(); -+ AbstractAssembler::emit_int32(x); -+ if (PatchContinuousLoad) -+ check_load_and_patch(x); -+} ++class Bytes: AllStatic { ++ public: ++ // Returns true if the byte ordering used by Java is different from the native byte ordering ++ // of the underlying machine. For example, this is true for Intel x86, but false for Solaris ++ // on Sparc. ++ // we use mipsel, so return true ++ static inline bool is_Java_byte_ordering_different(){ return true; } + -+inline void Assembler::emit_data(int x, relocInfo::relocType rtype) { -+ relocate(rtype); -+ emit_long(x); -+} + -+inline void Assembler::emit_data(int x, RelocationHolder const& rspec) { -+ relocate(rspec); -+ emit_long(x); -+} ++ // Efficient reading and writing of unaligned unsigned data in platform-specific byte ordering ++ // (no special code is needed since x86 CPUs can access unaligned data) ++ static inline u2 get_native_u2(address p) { ++ if ((intptr_t)p & 0x1) { ++ return ((u2)p[1] << 8) | (u2)p[0]; ++ } else { ++ return *(u2*)p; ++ } ++ } + -+// Check If an Instruction Is a Load Instruction -+ -+// All load instructions includes: -+// 1. FIRST OPS -+// LDL, LDR, LB, LH, LWL, LW, LBU, LHU, LWR, LWU, LD, LWC1, PREF, LDC1 -+// 2. SPECIAL OPS -+// MOVF, MOVT -+// 3. COP0 OPS -+// MFC0, DMFC0, MFGC0, DMFGC0 -+// 4. COP1 OPS -+// MFC1, DMFC1, CFC1, MFHC1, MTC1, DMTC1, CTC1, MTHC1, MOVZ.FMT, MOVN.FMT -+// 5. COP1X OPS -+// LWXC1, LDXC1, LUXC1, PREFX -+// 6. SPECIAL2 OPs -+// CAMPV, CAMPI, RAMRI -+// 7. SPECIAL3 OPS -+// LWX, LHX, LBUX, LDX, RDHWR -+// 8. LWC2 OPS -+// GSLWLC1, GSLWRC1, GSLDLC1, GSLDRC1, GSLBLE, GSLBGT, -+// GSLHLE, GSLHGT, GSLWLE, GSLWGT, GSLDLE, GSLDGT, -+// LWDIR, LWPTE, LDDIR, LDPTE -+// GSLWLEC1, GSLWGTC1, GSLDLEC1, GSLDGTC1 -+// 9. LDC2 OPS -+// ALL LDC2 OPS(GSLBX, GSLHX, GSLWX, GSLDX, GSLWXC1, GSLDXC1) -+ -+#define SPECIAL_MOVCI_OP_MASK 0b1111110000000100000011111111111 -+inline bool Assembler::is_load_op(int x) { -+ assert(PatchContinuousLoad, "just checking"); -+ int ins = x; -+ int op = (ins >> 26) & 0x3f; -+ switch (op) { -+ //first_ops: ldl, ldr, lb, lh, lwl, lw, lbu, lhu, lwr, lwu, ld, lwc1, pref, ldc1, ldc2_ops -+ case ldl_op: -+ case ldr_op: -+ case lb_op: -+ case lh_op: -+ case lwl_op: -+ case lw_op: -+ case lbu_op: -+ case lhu_op: -+ case lwr_op: -+ case lwu_op: -+ case ld_op: -+ case lwc1_op: -+ case pref_op: -+ case ldc1_op: -+ //ldc2_ops: gslbx, gslhx, gslwx, gsldx, gslwxc1, gsldxc1 -+ case gs_ldc2_op: -+ return true; -+ //special_ops: movf, movt -+ case special_op: -+ if ((ins & SPECIAL_MOVCI_OP_MASK) == movci_op) -+ return true; -+ else -+ return false; -+ //cop0_ops: mfc0, dmfc0, mfgc0, dmfgc0 -+ case cop0_op: -+ switch ((ins >> 21) & 0x1f) { -+ case mfc0_op: -+ case dmfc0_op: -+ return true; -+ case mxgc0_op: -+ if ((ins >> 9 & 1) == 0) -+ return true; -+ default: -+ return false; -+ } -+ //cop1_ops: mfc1, dmfc1, cfc1, mfhc1, mtc1, dmtc1, ctc1, mthc1, movz.fmt, movn.fmt -+ case cop1_op: -+ switch ((ins >> 21) & 0x1f) { -+ case cfc1_op: -+ case mfhc1_op: -+ case mtc1_op: -+ case dmtc1_op: -+ case ctc1_op: -+ case mthc1_op: -+ return true; -+ case single_fmt: -+ case double_fmt: -+ case ps_fmt: -+ if ((ins & 0x3f == movz_f_op) || (ins & 0x3f == movn_f_op)) -+ return true; -+ default: -+ return false; -+ } -+ //cop1x_ops: lwxc1, ldxc1, luxc1, prefx -+ case cop1x_op: -+ switch (ins & 0x3f) { -+ case lwxc1_op: -+ case ldxc1_op: -+ case luxc1_op: -+ case prefx_op: -+ return true; -+ default: -+ return false; -+ } -+ //special2_ops: campv, campi, ramri -+ case special2_op: -+ switch (ins & 0xff) { -+ case campv_op << 6 | gscam_op: -+ case campi_op << 6 | gscam_op: -+ case ramri_op << 6 | gscam_op: -+ return true; -+ default: -+ return false; -+ } -+ //special3_ops: lwx, lhx, lbux, ldx, rdhwr -+ case special3_op: -+ switch (ins & 0x3f) { -+ case lxx_op: -+ case rdhwr_op: -+ return true; -+ default: -+ return false; -+ } -+ //lwc2_ops: gslwlc1, gslwrc1, gsldlc1, gsldrc1, gslble, gslbgt, gslhle, gslhgt, gslwle, gslwgt, -+ // gsldle, gsldgt, gslwlec1, gslwgtc1, gsldlec1, gsldgtc1 -+ case gs_lwc2_op: -+ if ((ins >> 5 & 1) == 0) //gslq, gslqc1 are excluded. -+ return true; -+ else -+ return false; -+ default: -+ return false; ++ static inline u4 get_native_u4(address p) { ++ if ((intptr_t)p & 3) { ++ u4 res; ++ __asm__ __volatile__ ( ++ " .set push\n" ++ " .set mips64\n" ++ " .set noreorder\n" ++ ++ " lwr %[res], 0(%[addr]) \n" ++ " lwl %[res], 3(%[addr]) \n" ++ ++ " .set pop" ++ : [res] "=&r" (res) ++ : [addr] "r" (p) ++ : "memory" ++ ); ++ return res; ++ } else { ++ return *(u4*)p; ++ } + } -+ return false; -+} + -+#define MAX_LOADS_INSTRUCTION_SEQUENCE_LEN 3 -+inline void Assembler::check_load_and_patch(int x) { -+ int load_count = 0; -+ assert(PatchContinuousLoad, "just checking"); -+ if (is_load_op(x)) { -+ load_count = code()->get_continuous_load_instuctions_count(); -+ code()->set_continuous_load_instuctions_count(++load_count); -+ if (load_count >= MAX_LOADS_INSTRUCTION_SEQUENCE_LEN) { -+ assert(load_count == MAX_LOADS_INSTRUCTION_SEQUENCE_LEN, "load_count should not be greater than MAX_LOADS_INSTRUCTION_SEQUENCE_LEN"); -+#ifndef PRODUCT -+#include "compiler/disassembler.hpp" -+ if (code()->get_continuous_load_instuctions_count() != MAX_LOADS_INSTRUCTION_SEQUENCE_LEN) -+ tty->print_cr("get_continuous_load_instuctions_count() returns %d, which should be %d", code()->get_continuous_load_instuctions_count(), MAX_LOADS_INSTRUCTION_SEQUENCE_LEN); -+ if (TracePatchContinuousLoad && PatchContinuousLoad) { -+ tty->print_cr("found %d consecutive loads, separated by a nop, pc: %p", load_count, pc()); -+ int i; -+ for (i = -MAX_LOADS_INSTRUCTION_SEQUENCE_LEN; i <= 0; i++) -+ tty->print_cr("loads %d(" INTPTR_FORMAT "-" INTPTR_FORMAT "): ", i, p2i(pc()+(i*4)), p2i(pc()+(i*4)+4)); -+ Disassembler::decode(pc()+(i*4), pc()+(i*4)+4, tty); -+ tty->print_cr(" -> nop"); -+ Disassembler::decode((address)&x, (address)&x+4, tty); -+ } -+#endif -+ nop(); /*do a patch here, consecutive loads separated by a nop*/ -+ code()->set_continuous_load_instuctions_count(0); ++ static inline u8 get_native_u8(address p) { ++ u8 res; ++ u8 temp = 0; ++ // u4 tp;//tmp register ++ __asm__ __volatile__ ( ++ " .set push\n" ++ " .set mips64\n" ++ " .set noreorder\n" ++ " .set noat\n" ++ " andi $1,%[addr],0x7 \n" ++ " beqz $1,1f \n" ++ " nop \n" ++ " ldr %[temp], 0(%[addr]) \n" ++ " ldl %[temp], 7(%[addr]) \n" ++ " b 2f \n" ++ " nop \n" ++ " 1:\t ld %[temp],0(%[addr]) \n" ++ " 2:\t sd %[temp], %[res] \n" ++ ++ " .set at\n" ++ " .set pop\n" ++ : [addr]"=r"(p), [temp]"=r" (temp) ++ : "[addr]"(p), "[temp]" (temp), [res]"m" (*(volatile jint*)&res) ++ : "memory" ++ ); ++ ++ return res; ++ } ++ ++ //use mips unaligned load instructions ++ static inline void put_native_u2(address p, u2 x) { ++ if((intptr_t)p & 0x1) { ++ p[0] = (u_char)(x); ++ p[1] = (u_char)(x>>8); ++ } else { ++ *(u2*)p = x; + } -+ } else { -+ code()->set_continuous_load_instuctions_count(0); + } -+#ifndef PRODUCT -+ load_count = code()->get_continuous_load_instuctions_count(); -+ if (load_count >= MAX_LOADS_INSTRUCTION_SEQUENCE_LEN) -+ tty->print_cr("wrong load_count: %d", load_count); -+ assert(load_count < MAX_LOADS_INSTRUCTION_SEQUENCE_LEN, "just checking"); -+#endif -+} + -+#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/bytes_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/bytes_mips.hpp ---- openjdk/src/hotspot/cpu/mips/bytes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/bytes_mips.hpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,181 @@ ++ static inline void put_native_u4(address p, u4 x) { ++ // refer to sparc implementation. ++ // Note that sparc is big-endian, while mips is little-endian ++ switch ( intptr_t(p) & 3 ) { ++ case 0: *(u4*)p = x; ++ break; ++ ++ case 2: ((u2*)p)[1] = x >> 16; ++ ((u2*)p)[0] = x; ++ break; ++ ++ default: ((u1*)p)[3] = x >> 24; ++ ((u1*)p)[2] = x >> 16; ++ ((u1*)p)[1] = x >> 8; ++ ((u1*)p)[0] = x; ++ break; ++ } ++ } ++ ++ static inline void put_native_u8(address p, u8 x) { ++ // refer to sparc implementation. ++ // Note that sparc is big-endian, while mips is little-endian ++ switch ( intptr_t(p) & 7 ) { ++ case 0: *(u8*)p = x; ++ break; ++ ++ case 4: ((u4*)p)[1] = x >> 32; ++ ((u4*)p)[0] = x; ++ break; ++ ++ case 2: ((u2*)p)[3] = x >> 48; ++ ((u2*)p)[2] = x >> 32; ++ ((u2*)p)[1] = x >> 16; ++ ((u2*)p)[0] = x; ++ break; ++ ++ default: ((u1*)p)[7] = x >> 56; ++ ((u1*)p)[6] = x >> 48; ++ ((u1*)p)[5] = x >> 40; ++ ((u1*)p)[4] = x >> 32; ++ ((u1*)p)[3] = x >> 24; ++ ((u1*)p)[2] = x >> 16; ++ ((u1*)p)[1] = x >> 8; ++ ((u1*)p)[0] = x; ++ } ++ } ++ ++ ++ // Efficient reading and writing of unaligned unsigned data in Java ++ // byte ordering (i.e. big-endian ordering). Byte-order reversal is ++ // needed since MIPS64EL CPUs use little-endian format. ++ static inline u2 get_Java_u2(address p) { return swap_u2(get_native_u2(p)); } ++ static inline u4 get_Java_u4(address p) { return swap_u4(get_native_u4(p)); } ++ static inline u8 get_Java_u8(address p) { return swap_u8(get_native_u8(p)); } ++ ++ static inline void put_Java_u2(address p, u2 x) { put_native_u2(p, swap_u2(x)); } ++ static inline void put_Java_u4(address p, u4 x) { put_native_u4(p, swap_u4(x)); } ++ static inline void put_Java_u8(address p, u8 x) { put_native_u8(p, swap_u8(x)); } ++ ++ ++ // Efficient swapping of byte ordering ++ static inline u2 swap_u2(u2 x); // compiler-dependent implementation ++ static inline u4 swap_u4(u4 x); // compiler-dependent implementation ++ static inline u8 swap_u8(u8 x); ++}; ++ ++ ++// The following header contains the implementations of swap_u2, swap_u4, and swap_u8[_base] ++#include OS_CPU_HEADER_INLINE(bytes) ++ ++#endif // CPU_MIPS_VM_BYTES_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/c2_globals_mips.hpp b/src/hotspot/cpu/mips/c2_globals_mips.hpp +new file mode 100644 +index 000000000..ef11827ab +--- /dev/null ++++ b/src/hotspot/cpu/mips/c2_globals_mips.hpp +@@ -0,0 +1,95 @@ +/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_BYTES_MIPS_HPP -+#define CPU_MIPS_VM_BYTES_MIPS_HPP -+ -+#include "memory/allocation.hpp" -+ -+class Bytes: AllStatic { -+ public: -+ // Returns true if the byte ordering used by Java is different from the native byte ordering -+ // of the underlying machine. For example, this is true for Intel x86, but false for Solaris -+ // on Sparc. -+ // we use mipsel, so return true -+ static inline bool is_Java_byte_ordering_different(){ return true; } -+ -+ -+ // Efficient reading and writing of unaligned unsigned data in platform-specific byte ordering -+ // (no special code is needed since x86 CPUs can access unaligned data) -+ static inline u2 get_native_u2(address p) { -+ if ((intptr_t)p & 0x1) { -+ return ((u2)p[1] << 8) | (u2)p[0]; -+ } else { -+ return *(u2*)p; -+ } -+ } -+ -+ static inline u4 get_native_u4(address p) { -+ if ((intptr_t)p & 3) { -+ u4 res; -+ __asm__ __volatile__ ( -+ " .set push\n" -+ " .set mips64\n" -+ " .set noreorder\n" -+ -+ " lwr %[res], 0(%[addr]) \n" -+ " lwl %[res], 3(%[addr]) \n" -+ -+ " .set pop" -+ : [res] "=&r" (res) -+ : [addr] "r" (p) -+ : "memory" -+ ); -+ return res; -+ } else { -+ return *(u4*)p; -+ } -+ } -+ -+ static inline u8 get_native_u8(address p) { -+ u8 res; -+ u8 temp = 0; -+ // u4 tp;//tmp register -+ __asm__ __volatile__ ( -+ " .set push\n" -+ " .set mips64\n" -+ " .set noreorder\n" -+ " .set noat\n" -+ " andi $1,%[addr],0x7 \n" -+ " beqz $1,1f \n" -+ " nop \n" -+ " ldr %[temp], 0(%[addr]) \n" -+ " ldl %[temp], 7(%[addr]) \n" -+ " b 2f \n" -+ " nop \n" -+ " 1:\t ld %[temp],0(%[addr]) \n" -+ " 2:\t sd %[temp], %[res] \n" -+ -+ " .set at\n" -+ " .set pop\n" -+ : [addr]"=r"(p), [temp]"=r" (temp) -+ : "[addr]"(p), "[temp]" (temp), [res]"m" (*(volatile jint*)&res) -+ : "memory" -+ ); -+ -+ return res; -+ } -+ -+ //use mips unaligned load instructions -+ static inline void put_native_u2(address p, u2 x) { -+ if((intptr_t)p & 0x1) { -+ p[0] = (u_char)(x); -+ p[1] = (u_char)(x>>8); -+ } else { -+ *(u2*)p = x; -+ } -+ } -+ -+ static inline void put_native_u4(address p, u4 x) { -+ // refer to sparc implementation. -+ // Note that sparc is big-endian, while mips is little-endian -+ switch ( intptr_t(p) & 3 ) { -+ case 0: *(u4*)p = x; -+ break; -+ -+ case 2: ((u2*)p)[1] = x >> 16; -+ ((u2*)p)[0] = x; -+ break; -+ -+ default: ((u1*)p)[3] = x >> 24; -+ ((u1*)p)[2] = x >> 16; -+ ((u1*)p)[1] = x >> 8; -+ ((u1*)p)[0] = x; -+ break; -+ } -+ } -+ -+ static inline void put_native_u8(address p, u8 x) { -+ // refer to sparc implementation. -+ // Note that sparc is big-endian, while mips is little-endian -+ switch ( intptr_t(p) & 7 ) { -+ case 0: *(u8*)p = x; -+ break; -+ -+ case 4: ((u4*)p)[1] = x >> 32; -+ ((u4*)p)[0] = x; -+ break; -+ -+ case 2: ((u2*)p)[3] = x >> 48; -+ ((u2*)p)[2] = x >> 32; -+ ((u2*)p)[1] = x >> 16; -+ ((u2*)p)[0] = x; -+ break; -+ -+ default: ((u1*)p)[7] = x >> 56; -+ ((u1*)p)[6] = x >> 48; -+ ((u1*)p)[5] = x >> 40; -+ ((u1*)p)[4] = x >> 32; -+ ((u1*)p)[3] = x >> 24; -+ ((u1*)p)[2] = x >> 16; -+ ((u1*)p)[1] = x >> 8; -+ ((u1*)p)[0] = x; -+ } -+ } -+ -+ -+ // Efficient reading and writing of unaligned unsigned data in Java -+ // byte ordering (i.e. big-endian ordering). Byte-order reversal is -+ // needed since MIPS64EL CPUs use little-endian format. -+ static inline u2 get_Java_u2(address p) { return swap_u2(get_native_u2(p)); } -+ static inline u4 get_Java_u4(address p) { return swap_u4(get_native_u4(p)); } -+ static inline u8 get_Java_u8(address p) { return swap_u8(get_native_u8(p)); } -+ -+ static inline void put_Java_u2(address p, u2 x) { put_native_u2(p, swap_u2(x)); } -+ static inline void put_Java_u4(address p, u4 x) { put_native_u4(p, swap_u4(x)); } -+ static inline void put_Java_u8(address p, u8 x) { put_native_u8(p, swap_u8(x)); } -+ -+ -+ // Efficient swapping of byte ordering -+ static inline u2 swap_u2(u2 x); // compiler-dependent implementation -+ static inline u4 swap_u4(u4 x); // compiler-dependent implementation -+ static inline u8 swap_u8(u8 x); -+}; -+ -+ -+// The following header contains the implementations of swap_u2, swap_u4, and swap_u8[_base] -+#include OS_CPU_HEADER_INLINE(bytes) -+ -+#endif // CPU_MIPS_VM_BYTES_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_globals_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/c2_globals_mips.hpp ---- openjdk/src/hotspot/cpu/mips/c2_globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/c2_globals_mips.hpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,95 @@ -+/* -+ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -61891,9 +62072,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_gl +define_pd_global(bool, NeverActAsServerClassMachine, false); + +#endif // CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_init_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/c2_init_mips.cpp ---- openjdk/src/hotspot/cpu/mips/c2_init_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/c2_init_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/c2_init_mips.cpp b/src/hotspot/cpu/mips/c2_init_mips.cpp +new file mode 100644 +index 000000000..e6d5815f4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/c2_init_mips.cpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. @@ -61929,10 +62112,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_in +void Compile::pd_compiler2_init() { + guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/codeBuffer_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/codeBuffer_mips.hpp ---- openjdk/src/hotspot/cpu/mips/codeBuffer_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/codeBuffer_mips.hpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,38 @@ +diff --git a/src/hotspot/cpu/mips/codeBuffer_mips.hpp b/src/hotspot/cpu/mips/codeBuffer_mips.hpp +new file mode 100644 +index 000000000..3cc191006 +--- /dev/null ++++ b/src/hotspot/cpu/mips/codeBuffer_mips.hpp +@@ -0,0 +1,35 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. @@ -61963,17 +62148,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/codeB + +private: + void pd_initialize() {} -+ int _continuous_load_instuctions_count; + +public: + void flush_bundle(bool start_new_bundle) {} -+ int get_continuous_load_instuctions_count() const { return _continuous_load_instuctions_count; } -+ int set_continuous_load_instuctions_count(int x) { return _continuous_load_instuctions_count = x; } + +#endif // CPU_MIPS_VM_CODEBUFFER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/compiledIC_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/compiledIC_mips.cpp ---- openjdk/src/hotspot/cpu/mips/compiledIC_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/compiledIC_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/compiledIC_mips.cpp b/src/hotspot/cpu/mips/compiledIC_mips.cpp +new file mode 100644 +index 000000000..068ca4799 +--- /dev/null ++++ b/src/hotspot/cpu/mips/compiledIC_mips.cpp @@ -0,0 +1,151 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -62126,9 +62310,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/compi +} + +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/copy_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/copy_mips.hpp ---- openjdk/src/hotspot/cpu/mips/copy_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/copy_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/copy_mips.hpp b/src/hotspot/cpu/mips/copy_mips.hpp +new file mode 100644 +index 000000000..dcc77adfe +--- /dev/null ++++ b/src/hotspot/cpu/mips/copy_mips.hpp @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62207,9 +62393,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/copy_ +} + +#endif //CPU_MIPS_VM_COPY_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depChecker_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/depChecker_mips.cpp ---- openjdk/src/hotspot/cpu/mips/depChecker_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/depChecker_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/depChecker_mips.cpp b/src/hotspot/cpu/mips/depChecker_mips.cpp +new file mode 100644 +index 000000000..756ccb68f +--- /dev/null ++++ b/src/hotspot/cpu/mips/depChecker_mips.cpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62241,9 +62429,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depCh +#include "depChecker_mips.hpp" + +// Nothing to do on mips -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depChecker_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/depChecker_mips.hpp ---- openjdk/src/hotspot/cpu/mips/depChecker_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/depChecker_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/depChecker_mips.hpp b/src/hotspot/cpu/mips/depChecker_mips.hpp +new file mode 100644 +index 000000000..11e52b4e8 +--- /dev/null ++++ b/src/hotspot/cpu/mips/depChecker_mips.hpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62276,9 +62466,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depCh +// Nothing to do on MIPS + +#endif // CPU_MIPS_VM_DEPCHECKER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/disassembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/disassembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/disassembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/disassembler_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/disassembler_mips.hpp b/src/hotspot/cpu/mips/disassembler_mips.hpp +new file mode 100644 +index 000000000..c5f3a8888 +--- /dev/null ++++ b/src/hotspot/cpu/mips/disassembler_mips.hpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62317,9 +62509,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/disas + } + +#endif // CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/frame_mips.cpp ---- openjdk/src/hotspot/cpu/mips/frame_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/frame_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/frame_mips.cpp b/src/hotspot/cpu/mips/frame_mips.cpp +new file mode 100644 +index 000000000..d49bd6290 +--- /dev/null ++++ b/src/hotspot/cpu/mips/frame_mips.cpp @@ -0,0 +1,690 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -63011,9 +63205,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame + +void frame::pd_ps() {} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/frame_mips.hpp ---- openjdk/src/hotspot/cpu/mips/frame_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/frame_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/frame_mips.hpp b/src/hotspot/cpu/mips/frame_mips.hpp +new file mode 100644 +index 000000000..bdbfa8aaa +--- /dev/null ++++ b/src/hotspot/cpu/mips/frame_mips.hpp @@ -0,0 +1,215 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -63230,13 +63426,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame + static jint interpreter_frame_expression_stack_direction() { return -1; } + +#endif // CPU_MIPS_VM_FRAME_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame_mips.inline.hpp jdk11u-ls/src/hotspot/cpu/mips/frame_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/frame_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/frame_mips.inline.hpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,233 @@ +diff --git a/src/hotspot/cpu/mips/frame_mips.inline.hpp b/src/hotspot/cpu/mips/frame_mips.inline.hpp +new file mode 100644 +index 000000000..c408f01d6 +--- /dev/null ++++ b/src/hotspot/cpu/mips/frame_mips.inline.hpp +@@ -0,0 +1,238 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -63371,9 +63569,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame +inline bool frame::is_older(intptr_t* id) const { assert(this->id() != NULL && id != NULL, "NULL frame id"); + return this->id() > id ; } + ++inline intptr_t* frame::link() const { ++ return (intptr_t*) *(intptr_t **)addr_at(link_offset); ++} + -+ -+inline intptr_t* frame::link() const { return (intptr_t*) *(intptr_t **)addr_at(link_offset); } ++inline intptr_t* frame::link_or_null() const { ++ intptr_t** ptr = (intptr_t **)addr_at(link_offset); ++ return os::is_readable_pointer(ptr) ? *ptr : NULL; ++} + +inline intptr_t* frame::unextended_sp() const { return _unextended_sp; } + @@ -63467,9 +63670,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame +} + +#endif // CPU_MIPS_VM_FRAME_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..179f7703c +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp @@ -0,0 +1,364 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -63835,9 +64040,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1 + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..ec5c243c3 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -63910,9 +64117,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1 +}; + +#endif // CPU_MIPS_GC_G1_G1BARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..071debdc3 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp @@ -0,0 +1,194 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -64108,9 +64317,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + Register t1) { + Unimplemented(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..b97ecbcca +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -64195,13 +64406,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh +}; + +#endif // CPU_MIPS_GC_SHARED_BARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,149 @@ +diff --git a/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..f33165334 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp +@@ -0,0 +1,147 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -64260,7 +64473,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + __ beq(count, R0, L_done); // zero count - nothing to do + __ delayed()->nop(); + -+ if (UseConcMarkSweepGC) __ sync(); ++ if (ct->scanned_concurrently()) __ membar(Assembler::StoreStore); + + __ set64(tmp, disp); + @@ -64309,8 +64522,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + + jbyte dirty = CardTable::dirty_card_val(); + if (UseCondCardMark) { -+ Untested("Untested"); -+ __ warn("store_check Untested"); + Label L_already_dirty; + __ membar(Assembler::StoreLoad); + __ lb(AT, tmp, 0); @@ -64321,7 +64532,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + __ bind(L_already_dirty); + } else { + if (ct->scanned_concurrently()) { -+ __ membar(Assembler::StoreLoad); ++ __ membar(Assembler::StoreStore); + } + __ sb(R0, tmp, 0); + } @@ -64348,9 +64559,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..49c2a0ea8 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -64394,9 +64607,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh +}; + +#endif // CPU_MIPS_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..765259e62 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -64451,9 +64666,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..5320a4c0a +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -64509,9 +64726,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh +}; + +#endif // CPU_MIPS_GC_SHARED_MODREFBARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globalDefinitions_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/globalDefinitions_mips.hpp ---- openjdk/src/hotspot/cpu/mips/globalDefinitions_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/globalDefinitions_mips.hpp 2023-09-12 13:54:23.097571667 +0800 +diff --git a/src/hotspot/cpu/mips/globalDefinitions_mips.hpp b/src/hotspot/cpu/mips/globalDefinitions_mips.hpp +new file mode 100644 +index 000000000..abf8141e8 +--- /dev/null ++++ b/src/hotspot/cpu/mips/globalDefinitions_mips.hpp @@ -0,0 +1,45 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -64558,10 +64777,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globa +#define THREAD_LOCAL_POLL + +#endif // CPU_MIPS_VM_GLOBALDEFINITIONS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globals_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/globals_mips.hpp ---- openjdk/src/hotspot/cpu/mips/globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/globals_mips.hpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,143 @@ +diff --git a/src/hotspot/cpu/mips/globals_mips.hpp b/src/hotspot/cpu/mips/globals_mips.hpp +new file mode 100644 +index 000000000..3bcad005d +--- /dev/null ++++ b/src/hotspot/cpu/mips/globals_mips.hpp +@@ -0,0 +1,137 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -64669,12 +64890,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globa + product(bool, UseLEXT3, false, \ + "Use LoongISA general EXTensions 3") \ + \ -+ product(bool, PatchContinuousLoad, true, \ -+ "Patch continuous loads with nop") \ -+ \ -+ notproduct(bool, TracePatchContinuousLoad, false, \ -+ "Trace patch of continuous loads") \ -+ \ + product(bool, UseCodeCacheAllocOpt, true, \ + "Allocate code cache within 32-bit memory address space") \ + \ @@ -64705,13 +64920,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globa + "Eliminate barriers for single active cpu") + +#endif // CPU_MIPS_VM_GLOBALS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icache_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/icache_mips.cpp ---- openjdk/src/hotspot/cpu/mips/icache_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/icache_mips.cpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,41 @@ +diff --git a/src/hotspot/cpu/mips/icBuffer_mips.cpp b/src/hotspot/cpu/mips/icBuffer_mips.cpp +new file mode 100644 +index 000000000..6586c6396 +--- /dev/null ++++ b/src/hotspot/cpu/mips/icBuffer_mips.cpp +@@ -0,0 +1,88 @@ +/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -64736,23 +64953,119 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icach + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" -+#include "runtime/icache.hpp" ++#include "asm/macroAssembler.inline.hpp" ++#include "code/icBuffer.hpp" ++#include "gc/shared/collectedHeap.inline.hpp" ++#include "interpreter/bytecodes.hpp" ++#include "memory/resourceArea.hpp" ++#include "nativeInst_mips.hpp" ++#include "oops/oop.inline.hpp" + -+void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) -+{ -+#define __ _masm-> -+ StubCodeMark mark(this, "ICache", "flush_icache_stub"); -+ address start = __ pc(); ++#define T0 RT0 ++#define T1 RT1 ++#define T2 RT2 ++#define T3 RT3 ++#define T8 RT8 ++#define T9 RT9 + -+ __ jr_hb(RA); -+ __ delayed()->ori(V0, A2, 0); ++int InlineCacheBuffer::ic_stub_code_size() { ++ return NativeMovConstReg::instruction_size + ++ NativeGeneralJump::instruction_size + ++ 1; ++ // so that code_end can be set in CodeBuffer ++ // 64bit 15 = 6 + 8 bytes + 1 byte ++ // 32bit 7 = 2 + 4 bytes + 1 byte ++} + -+ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++ ++// we use T1 as cached oop(klass) now. this is the target of virtual call, ++// when reach here, the receiver in T0 ++// refer to shareRuntime_mips.cpp,gen_i2c2i_adapters ++void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) { ++ ResourceMark rm; ++ CodeBuffer code(code_begin, ic_stub_code_size()); ++ MacroAssembler* masm = new MacroAssembler(&code); ++ // note: even though the code contains an embedded oop, we do not need reloc info ++ // because ++ // (1) the oop is old (i.e., doesn't matter for scavenges) ++ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear ++// assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop"); ++#define __ masm-> ++ __ patchable_set48(T1, (long)cached_value); ++ ++ __ patchable_jump(entry_point); ++ __ flush(); +#undef __ +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icache_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/icache_mips.hpp ---- openjdk/src/hotspot/cpu/mips/icache_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/icache_mips.hpp 2023-09-12 13:54:23.097571667 +0800 ++ ++ ++address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ return jump->jump_destination(); ++} ++ ++ ++void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { ++ // creation also verifies the object ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); ++ // Verifies the jump ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ void* o= (void*)move->data(); ++ return o; ++} +diff --git a/src/hotspot/cpu/mips/icache_mips.cpp b/src/hotspot/cpu/mips/icache_mips.cpp +new file mode 100644 +index 000000000..e84e37358 +--- /dev/null ++++ b/src/hotspot/cpu/mips/icache_mips.cpp +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "runtime/icache.hpp" ++ ++void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) ++{ ++#define __ _masm-> ++ StubCodeMark mark(this, "ICache", "flush_icache_stub"); ++ address start = __ pc(); ++ ++ __ jr_hb(RA); ++ __ delayed()->ori(V0, A2, 0); ++ ++ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++#undef __ ++} +diff --git a/src/hotspot/cpu/mips/icache_mips.hpp b/src/hotspot/cpu/mips/icache_mips.hpp +new file mode 100644 +index 000000000..f90dee6ee +--- /dev/null ++++ b/src/hotspot/cpu/mips/icache_mips.hpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -64795,13 +65108,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icach +}; + +#endif // CPU_MIPS_VM_ICACHE_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icBuffer_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/icBuffer_mips.cpp ---- openjdk/src/hotspot/cpu/mips/icBuffer_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/icBuffer_mips.cpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,88 @@ +diff --git a/src/hotspot/cpu/mips/interp_masm_mips.hpp b/src/hotspot/cpu/mips/interp_masm_mips.hpp +new file mode 100644 +index 000000000..e526e39d5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/interp_masm_mips.hpp +@@ -0,0 +1,276 @@ +/* -+ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -64824,73 +65139,263 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icBuf + * + */ + -+#include "precompiled.hpp" ++#ifndef CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP ++#define CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP ++ ++#include "asm/assembler.hpp" +#include "asm/macroAssembler.hpp" +#include "asm/macroAssembler.inline.hpp" -+#include "code/icBuffer.hpp" -+#include "gc/shared/collectedHeap.inline.hpp" -+#include "interpreter/bytecodes.hpp" -+#include "memory/resourceArea.hpp" -+#include "nativeInst_mips.hpp" -+#include "oops/oop.inline.hpp" ++#include "interpreter/invocationCounter.hpp" ++#include "runtime/frame.hpp" + -+#define T0 RT0 -+#define T1 RT1 -+#define T2 RT2 -+#define T3 RT3 -+#define T8 RT8 -+#define T9 RT9 ++// This file specializes the assember with interpreter-specific macros + -+int InlineCacheBuffer::ic_stub_code_size() { -+ return NativeMovConstReg::instruction_size + -+ NativeGeneralJump::instruction_size + -+ 1; -+ // so that code_end can be set in CodeBuffer -+ // 64bit 15 = 6 + 8 bytes + 1 byte -+ // 32bit 7 = 2 + 4 bytes + 1 byte -+} + ++class InterpreterMacroAssembler: public MacroAssembler { ++#ifndef CC_INTERP ++ private: + -+// we use T1 as cached oop(klass) now. this is the target of virtual call, -+// when reach here, the receiver in T0 -+// refer to shareRuntime_mips.cpp,gen_i2c2i_adapters -+void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) { -+ ResourceMark rm; -+ CodeBuffer code(code_begin, ic_stub_code_size()); -+ MacroAssembler* masm = new MacroAssembler(&code); -+ // note: even though the code contains an embedded oop, we do not need reloc info -+ // because -+ // (1) the oop is old (i.e., doesn't matter for scavenges) -+ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear -+// assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop"); -+#define __ masm-> -+ __ patchable_set48(T1, (long)cached_value); ++ Register _locals_register; // register that contains the pointer to the locals ++ Register _bcp_register; // register that contains the bcp + -+ __ patchable_jump(entry_point); -+ __ flush(); -+#undef __ -+} ++ protected: ++ // Interpreter specific version of call_VM_base ++ virtual void call_VM_leaf_base(address entry_point, ++ int number_of_arguments); + ++ virtual void call_VM_base(Register oop_result, ++ Register java_thread, ++ Register last_java_sp, ++ address entry_point, ++ int number_of_arguments, ++ bool check_exceptions); + -+address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ return jump->jump_destination(); -+} ++ // base routine for all dispatches ++ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); ++#endif // CC_INTERP + ++ public: ++ void jump_to_entry(address entry); ++ // narrow int return value ++ void narrow(Register result); + -+void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { -+ // creation also verifies the object -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); -+ // Verifies the jump -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ void* o= (void*)move->data(); -+ return o; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interp_masm_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/interp_masm_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/interp_masm_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/interp_masm_mips_64.cpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,2125 @@ ++ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} ++ ++ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ void get_4_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ ++ virtual void check_and_handle_popframe(Register java_thread); ++ virtual void check_and_handle_earlyret(Register java_thread); ++ ++ void load_earlyret_value(TosState state); ++ ++#ifdef CC_INTERP ++ void save_bcp() { /* not needed in c++ interpreter and harmless */ } ++ void restore_bcp() { /* not needed in c++ interpreter and harmless */ } ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg); ++ ++#else ++ ++ // Interpreter-specific registers ++ void save_bcp() { ++ sd(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_bcp() { ++ ld(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_locals() { ++ ld(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); ++ } ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg) { ++ ld(reg, FP, frame::interpreter_frame_method_offset * wordSize); ++ } ++ ++ void get_const(Register reg){ ++ get_method(reg); ++ ld(reg, reg, in_bytes(Method::const_offset())); ++ } ++ ++ void get_constant_pool(Register reg) { ++ get_const(reg); ++ ld(reg, reg, in_bytes(ConstMethod::constants_offset())); ++ } ++ ++ void get_constant_pool_cache(Register reg) { ++ get_constant_pool(reg); ++ ld(reg, reg, ConstantPool::cache_offset_in_bytes()); ++ } ++ ++ void get_cpool_and_tags(Register cpool, Register tags) { ++ get_constant_pool(cpool); ++ ld(tags, cpool, ConstantPool::tags_offset_in_bytes()); ++ } ++ ++ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); ++ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_method_counters(Register method, Register mcs, Label& skip); ++ ++ // load cpool->resolved_references(index); ++ void load_resolved_reference_at_index(Register result, Register index, Register tmp); ++ ++ // load cpool->resolved_klass_at(index) ++ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) ++ Register index, // the constant pool index (corrupted on return) ++ Register klass); // contains the Klass on return ++ ++ void pop_ptr( Register r = FSR); ++ void pop_i( Register r = FSR); ++ void pop_l( Register r = FSR); ++ void pop_f(FloatRegister r = FSF); ++ void pop_d(FloatRegister r = FSF); ++ ++ void push_ptr( Register r = FSR); ++ void push_i( Register r = FSR); ++ void push_l( Register r = FSR); ++ void push_f(FloatRegister r = FSF); ++ void push_d(FloatRegister r = FSF); ++ ++ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } ++ ++ void push(Register r ) { ((MacroAssembler*)this)->push(r); } ++ ++ void pop(TosState state); // transition vtos -> state ++ void push(TosState state); // transition state -> vtos ++ ++ void empty_expression_stack() { ++ ld(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); ++ // NULL last_sp until next java call ++ sd(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); ++ } ++ ++ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls ++ void load_ptr(int n, Register val); ++ void store_ptr(int n, Register val); ++ ++ // Generate a subtype check: branch to ok_is_subtype if sub_klass is ++ // a subtype of super_klass. ++ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); ++ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); ++ ++ // Dispatching ++ void dispatch_prolog(TosState state, int step = 0); ++ void dispatch_epilog(TosState state, int step = 0); ++ void dispatch_only(TosState state, bool generate_poll = false); ++ void dispatch_only_normal(TosState state); ++ void dispatch_only_noverify(TosState state); ++ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); ++ void dispatch_via (TosState state, address* table); ++ ++ // jump to an invoked target ++ void prepare_to_jump_from_interpreted(); ++ void jump_from_interpreted(Register method, Register temp); ++ ++ ++ // Returning from interpreted functions ++ // ++ // Removes the current activation (incl. unlocking of monitors) ++ // and sets up the return address. This code is also used for ++ // exception unwindwing. In that case, we do not want to throw ++ // IllegalMonitorStateExceptions, since that might get us into an ++ // infinite rethrow exception loop. ++ // Additionally this code is used for popFrame and earlyReturn. ++ // In popFrame case we want to skip throwing an exception, ++ // installing an exception, and notifying jvmdi. ++ // In earlyReturn case we only want to skip throwing an exception ++ // and installing an exception. ++ void remove_activation(TosState state, Register ret_addr, ++ bool throw_monitor_exception = true, ++ bool install_monitor_exception = true, ++ bool notify_jvmdi = true); ++#endif // CC_INTERP ++ ++ // Object locking ++ void lock_object (Register lock_reg); ++ void unlock_object(Register lock_reg); ++ ++#ifndef CC_INTERP ++ ++ // Interpreter profiling operations ++ void set_method_data_pointer_for_bcp(); ++ void test_method_data_pointer(Register mdp, Label& zero_continue); ++ void verify_method_data_pointer(); ++ ++ void set_mdp_data_at(Register mdp_in, int constant, Register value); ++ void increment_mdp_data_at(Address data, bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, int constant, ++ bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, ++ bool decrement = false); ++ void increment_mask_and_jump(Address counter_addr, ++ int increment, int mask, ++ Register scratch, bool preloaded, ++ Condition cond, Label* where); ++ void set_mdp_flag_at(Register mdp_in, int flag_constant); ++ void test_mdp_data_at(Register mdp_in, int offset, Register value, ++ Register test_value_out, ++ Label& not_equal_continue); ++ ++ void record_klass_in_profile(Register receiver, Register mdp, ++ Register reg2, bool is_virtual_call); ++ void record_klass_in_profile_helper(Register receiver, Register mdp, ++ Register reg2, int start_row, ++ Label& done, bool is_virtual_call); ++ ++ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); ++ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); ++ void update_mdp_by_constant(Register mdp_in, int constant); ++ void update_mdp_for_ret(Register return_bci); ++ ++ void profile_taken_branch(Register mdp, Register bumped_count); ++ void profile_not_taken_branch(Register mdp); ++ void profile_call(Register mdp); ++ void profile_final_call(Register mdp); ++ void profile_virtual_call(Register receiver, Register mdp, ++ Register scratch2, ++ bool receiver_can_be_null = false); ++ void profile_called_method(Register method, Register mdp, Register reg2) NOT_JVMCI_RETURN; ++ void profile_ret(Register return_bci, Register mdp); ++ void profile_null_seen(Register mdp); ++ void profile_typecheck(Register mdp, Register klass, Register scratch); ++ void profile_typecheck_failed(Register mdp); ++ void profile_switch_default(Register mdp); ++ void profile_switch_case(Register index_in_scratch, Register mdp, ++ Register scratch2); ++ ++ // Debugging ++ // only if +VerifyOops && state == atos ++ void verify_oop(Register reg, TosState state = atos); ++ // only if +VerifyFPU && (state == ftos || state == dtos) ++ void verify_FPU(int stack_depth, TosState state = ftos); ++ ++ void profile_obj_type(Register obj, const Address& mdo_addr); ++ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); ++ void profile_return_type(Register mdp, Register ret, Register tmp); ++ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++#endif // !CC_INTERP ++ ++ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ ++ // support for jvmti/dtrace ++ void notify_method_entry(); ++ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++}; ++ ++#endif // CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP +diff --git a/src/hotspot/cpu/mips/interp_masm_mips_64.cpp b/src/hotspot/cpu/mips/interp_masm_mips_64.cpp +new file mode 100644 +index 000000000..eb35bb063 +--- /dev/null ++++ b/src/hotspot/cpu/mips/interp_masm_mips_64.cpp +@@ -0,0 +1,2126 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -64930,6 +65435,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter +#include "prims/jvmtiThreadState.hpp" +#include "runtime/basicLock.hpp" +#include "runtime/biasedLocking.hpp" ++#include "runtime/frame.inline.hpp" +#include "runtime/safepointMechanism.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/thread.inline.hpp" @@ -67016,13 +67522,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + unimplemented(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interp_masm_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/interp_masm_mips.hpp ---- openjdk/src/hotspot/cpu/mips/interp_masm_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/interp_masm_mips.hpp 2023-09-12 13:54:23.097571667 +0800 -@@ -0,0 +1,276 @@ +diff --git a/src/hotspot/cpu/mips/interpreterRT_mips.hpp b/src/hotspot/cpu/mips/interpreterRT_mips.hpp +new file mode 100644 +index 000000000..054138ea4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/interpreterRT_mips.hpp +@@ -0,0 +1,60 @@ +/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -67045,261 +67553,47 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + * + */ + -+#ifndef CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -+#define CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -+ -+#include "asm/assembler.hpp" -+#include "asm/macroAssembler.hpp" -+#include "asm/macroAssembler.inline.hpp" -+#include "interpreter/invocationCounter.hpp" -+#include "runtime/frame.hpp" ++#ifndef CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP ++#define CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP + -+// This file specializes the assember with interpreter-specific macros ++// This is included in the middle of class Interpreter. ++// Do not include files here. + ++// native method calls + -+class InterpreterMacroAssembler: public MacroAssembler { -+#ifndef CC_INTERP ++class SignatureHandlerGenerator: public NativeSignatureIterator { + private: ++ MacroAssembler* _masm; + -+ Register _locals_register; // register that contains the pointer to the locals -+ Register _bcp_register; // register that contains the bcp -+ -+ protected: -+ // Interpreter specific version of call_VM_base -+ virtual void call_VM_leaf_base(address entry_point, -+ int number_of_arguments); -+ -+ virtual void call_VM_base(Register oop_result, -+ Register java_thread, -+ Register last_java_sp, -+ address entry_point, -+ int number_of_arguments, -+ bool check_exceptions); ++ void move(int from_offset, int to_offset); + -+ // base routine for all dispatches -+ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); -+#endif // CC_INTERP ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + + public: -+ void jump_to_entry(address entry); -+ // narrow int return value -+ void narrow(Register result); -+ -+ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} -+ -+ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ void get_4_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ -+ virtual void check_and_handle_popframe(Register java_thread); -+ virtual void check_and_handle_earlyret(Register java_thread); -+ -+ void load_earlyret_value(TosState state); -+ -+#ifdef CC_INTERP -+ void save_bcp() { /* not needed in c++ interpreter and harmless */ } -+ void restore_bcp() { /* not needed in c++ interpreter and harmless */ } -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg); -+ -+#else -+ -+ // Interpreter-specific registers -+ void save_bcp() { -+ sd(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_bcp() { -+ ld(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_locals() { -+ ld(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); -+ } -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg) { -+ ld(reg, FP, frame::interpreter_frame_method_offset * wordSize); -+ } -+ -+ void get_const(Register reg){ -+ get_method(reg); -+ ld(reg, reg, in_bytes(Method::const_offset())); -+ } -+ -+ void get_constant_pool(Register reg) { -+ get_const(reg); -+ ld(reg, reg, in_bytes(ConstMethod::constants_offset())); -+ } -+ -+ void get_constant_pool_cache(Register reg) { -+ get_constant_pool(reg); -+ ld(reg, reg, ConstantPool::cache_offset_in_bytes()); -+ } -+ -+ void get_cpool_and_tags(Register cpool, Register tags) { -+ get_constant_pool(cpool); -+ ld(tags, cpool, ConstantPool::tags_offset_in_bytes()); -+ } -+ -+ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); -+ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_method_counters(Register method, Register mcs, Label& skip); -+ -+ // load cpool->resolved_references(index); -+ void load_resolved_reference_at_index(Register result, Register index, Register tmp); -+ -+ // load cpool->resolved_klass_at(index) -+ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) -+ Register index, // the constant pool index (corrupted on return) -+ Register klass); // contains the Klass on return -+ -+ void pop_ptr( Register r = FSR); -+ void pop_i( Register r = FSR); -+ void pop_l( Register r = FSR); -+ void pop_f(FloatRegister r = FSF); -+ void pop_d(FloatRegister r = FSF); -+ -+ void push_ptr( Register r = FSR); -+ void push_i( Register r = FSR); -+ void push_l( Register r = FSR); -+ void push_f(FloatRegister r = FSF); -+ void push_d(FloatRegister r = FSF); -+ -+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } -+ -+ void push(Register r ) { ((MacroAssembler*)this)->push(r); } -+ -+ void pop(TosState state); // transition vtos -> state -+ void push(TosState state); // transition state -> vtos -+ -+ void empty_expression_stack() { -+ ld(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); -+ // NULL last_sp until next java call -+ sd(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); -+ } -+ -+ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls -+ void load_ptr(int n, Register val); -+ void store_ptr(int n, Register val); -+ -+ // Generate a subtype check: branch to ok_is_subtype if sub_klass is -+ // a subtype of super_klass. -+ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); -+ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); -+ -+ // Dispatching -+ void dispatch_prolog(TosState state, int step = 0); -+ void dispatch_epilog(TosState state, int step = 0); -+ void dispatch_only(TosState state, bool generate_poll = false); -+ void dispatch_only_normal(TosState state); -+ void dispatch_only_noverify(TosState state); -+ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); -+ void dispatch_via (TosState state, address* table); -+ -+ // jump to an invoked target -+ void prepare_to_jump_from_interpreted(); -+ void jump_from_interpreted(Register method, Register temp); -+ -+ -+ // Returning from interpreted functions -+ // -+ // Removes the current activation (incl. unlocking of monitors) -+ // and sets up the return address. This code is also used for -+ // exception unwindwing. In that case, we do not want to throw -+ // IllegalMonitorStateExceptions, since that might get us into an -+ // infinite rethrow exception loop. -+ // Additionally this code is used for popFrame and earlyReturn. -+ // In popFrame case we want to skip throwing an exception, -+ // installing an exception, and notifying jvmdi. -+ // In earlyReturn case we only want to skip throwing an exception -+ // and installing an exception. -+ void remove_activation(TosState state, Register ret_addr, -+ bool throw_monitor_exception = true, -+ bool install_monitor_exception = true, -+ bool notify_jvmdi = true); -+#endif // CC_INTERP -+ -+ // Object locking -+ void lock_object (Register lock_reg); -+ void unlock_object(Register lock_reg); -+ -+#ifndef CC_INTERP -+ -+ // Interpreter profiling operations -+ void set_method_data_pointer_for_bcp(); -+ void test_method_data_pointer(Register mdp, Label& zero_continue); -+ void verify_method_data_pointer(); -+ -+ void set_mdp_data_at(Register mdp_in, int constant, Register value); -+ void increment_mdp_data_at(Address data, bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, int constant, -+ bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, -+ bool decrement = false); -+ void increment_mask_and_jump(Address counter_addr, -+ int increment, int mask, -+ Register scratch, bool preloaded, -+ Condition cond, Label* where); -+ void set_mdp_flag_at(Register mdp_in, int flag_constant); -+ void test_mdp_data_at(Register mdp_in, int offset, Register value, -+ Register test_value_out, -+ Label& not_equal_continue); -+ -+ void record_klass_in_profile(Register receiver, Register mdp, -+ Register reg2, bool is_virtual_call); -+ void record_klass_in_profile_helper(Register receiver, Register mdp, -+ Register reg2, int start_row, -+ Label& done, bool is_virtual_call); -+ -+ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); -+ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); -+ void update_mdp_by_constant(Register mdp_in, int constant); -+ void update_mdp_for_ret(Register return_bci); -+ -+ void profile_taken_branch(Register mdp, Register bumped_count); -+ void profile_not_taken_branch(Register mdp); -+ void profile_call(Register mdp); -+ void profile_final_call(Register mdp); -+ void profile_virtual_call(Register receiver, Register mdp, -+ Register scratch2, -+ bool receiver_can_be_null = false); -+ void profile_called_method(Register method, Register mdp, Register reg2) NOT_JVMCI_RETURN; -+ void profile_ret(Register return_bci, Register mdp); -+ void profile_null_seen(Register mdp); -+ void profile_typecheck(Register mdp, Register klass, Register scratch); -+ void profile_typecheck_failed(Register mdp); -+ void profile_switch_default(Register mdp); -+ void profile_switch_case(Register index_in_scratch, Register mdp, -+ Register scratch2); -+ -+ // Debugging -+ // only if +VerifyOops && state == atos -+ void verify_oop(Register reg, TosState state = atos); -+ // only if +VerifyFPU && (state == ftos || state == dtos) -+ void verify_FPU(int stack_depth, TosState state = ftos); -+ -+ void profile_obj_type(Register obj, const Address& mdo_addr); -+ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); -+ void profile_return_type(Register mdp, Register ret, Register tmp); -+ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); -+#endif // !CC_INTERP ++ // Creation ++ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); + -+ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // support for jvmti/dtrace -+ void notify_method_entry(); -+ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); +}; + -+#endif // CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,247 @@ ++#endif // CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp b/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp +new file mode 100644 +index 000000000..e655b2a1a +--- /dev/null ++++ b/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp +@@ -0,0 +1,252 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -67326,6 +67620,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + */ + +#include "precompiled.hpp" ++#include "interpreter/interp_masm.hpp" +#include "interpreter/interpreter.hpp" +#include "interpreter/interpreterRuntime.hpp" +#include "memory/allocation.inline.hpp" @@ -67347,6 +67642,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter +#define T9 RT9 + +// Implementation of SignatureHandlerGenerator ++InterpreterRuntime::SignatureHandlerGenerator::SignatureHandlerGenerator( ++ const methodHandle& method, CodeBuffer* buffer) : NativeSignatureIterator(method) { ++ _masm = new MacroAssembler(buffer); ++} + +void InterpreterRuntime::SignatureHandlerGenerator::move(int from_offset, int to_offset) { + __ ld(temp(), from(), Interpreter::local_offset_in_bytes(from_offset)); @@ -67547,74 +67846,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + // return result handler + return Interpreter::result_handler(m->result_type()); +IRT_END -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interpreterRT_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/interpreterRT_mips.hpp ---- openjdk/src/hotspot/cpu/mips/interpreterRT_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/interpreterRT_mips.hpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,61 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -+#define CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -+ -+#include "memory/allocation.hpp" -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ -+ void move(int from_offset, int to_offset); -+ -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); -+ -+ public: -+ // Creation -+ SignatureHandlerGenerator(methodHandle method, CodeBuffer* buffer) : NativeSignatureIterator(method) { -+ _masm = new MacroAssembler(buffer); -+ } -+ -+ // Code generation -+ void generate(uint64_t fingerprint); -+ -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; -+ -+#endif // CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp ---- openjdk/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp b/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp +new file mode 100644 +index 000000000..dccdf6a01 +--- /dev/null ++++ b/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -67703,10 +67939,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/javaF + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_MIPS_VM_JAVAFRAMEANCHOR_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp 2023-11-01 09:34:25.493945267 +0800 -@@ -0,0 +1,166 @@ +diff --git a/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp b/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp +new file mode 100644 +index 000000000..bba5b7eee +--- /dev/null ++++ b/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp +@@ -0,0 +1,167 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -67734,6 +67972,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniFa + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" ++#include "code/codeBlob.hpp" +#include "gc/shared/barrierSet.hpp" +#include "gc/shared/barrierSetAssembler.hpp" +#include "memory/resourceArea.hpp" @@ -67873,9 +68112,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniFa +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniTypes_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/jniTypes_mips.hpp ---- openjdk/src/hotspot/cpu/mips/jniTypes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/jniTypes_mips.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/jniTypes_mips.hpp b/src/hotspot/cpu/mips/jniTypes_mips.hpp +new file mode 100644 +index 000000000..e93237ffd +--- /dev/null ++++ b/src/hotspot/cpu/mips/jniTypes_mips.hpp @@ -0,0 +1,144 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -68021,10 +68262,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniTy +}; + +#endif // CPU_MIPS_VM_JNITYPES_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macroAssembler_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/macroAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/macroAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/macroAssembler_mips.cpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,4249 @@ +diff --git a/src/hotspot/cpu/mips/macroAssembler_mips.cpp b/src/hotspot/cpu/mips/macroAssembler_mips.cpp +new file mode 100644 +index 000000000..cc868cae5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/macroAssembler_mips.cpp +@@ -0,0 +1,4257 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Loongson Technology. All rights reserved. @@ -68074,6 +68317,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro +#include "runtime/stubRoutines.hpp" +#include "utilities/macros.hpp" + ++#ifdef COMPILER2 ++#include "opto/intrinsicnode.hpp" ++#endif ++ +#define T0 RT0 +#define T1 RT1 +#define T2 RT2 @@ -70232,6 +70479,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + sub_d(fd, fs, tmp); +} + ++#ifdef COMPILER2 +// Fast_Lock and Fast_Unlock used by C2 + +// Because the transitions from emitted code to the runtime @@ -70616,6 +70864,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + if (EmitSync & 32768) { nop() ; } + } +} ++#endif // COMPILER2 + +void MacroAssembler::align(int modulus) { + while (offset() % modulus != 0) nop(); @@ -71703,6 +71952,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + return code_offset; +} + ++#ifdef COMPILER2 +// Compare strings, used for char[] and byte[]. +void MacroAssembler::string_compare(Register str1, Register str2, + Register cnt1, Register cnt2, Register result, @@ -71789,6 +72039,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + + bind(True); +} ++#endif // COMPILER2 + +void MacroAssembler::load_for_type_by_register(FloatRegister dst_reg, Register tmp_reg, int disp, BasicType type) { + switch (type) { @@ -72274,10 +72525,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + ShouldNotReachHere(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macroAssembler_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/macroAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/macroAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/macroAssembler_mips.hpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,816 @@ +diff --git a/src/hotspot/cpu/mips/macroAssembler_mips.hpp b/src/hotspot/cpu/mips/macroAssembler_mips.hpp +new file mode 100644 +index 000000000..55ec29e91 +--- /dev/null ++++ b/src/hotspot/cpu/mips/macroAssembler_mips.hpp +@@ -0,0 +1,818 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -72920,6 +73173,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + //FIXME + void empty_FPU_stack(){/*need implemented*/}; + ++#ifdef COMPILER2 + // Compare strings. + void string_compare(Register str1, Register str2, + Register cnt1, Register cnt2, Register result, @@ -72929,6 +73183,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + void arrays_equals(Register str1, Register str2, + Register cnt, Register tmp, Register result, + bool is_char); ++#endif + + // method handles (JSR 292) + Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0); @@ -73094,9 +73349,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + + +#endif // CPU_MIPS_VM_MACROASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp jdk11u-ls/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp b/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp +new file mode 100644 +index 000000000..92c05fb72 +--- /dev/null ++++ b/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -73132,10 +73389,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro +#include "code/codeCache.hpp" + +#endif // CPU_MIPS_VM_MACROASSEMBLER_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/methodHandles_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/methodHandles_mips.cpp ---- openjdk/src/hotspot/cpu/mips/methodHandles_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/methodHandles_mips.cpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,574 @@ +diff --git a/src/hotspot/cpu/mips/methodHandles_mips.cpp b/src/hotspot/cpu/mips/methodHandles_mips.cpp +new file mode 100644 +index 000000000..e9788ac52 +--- /dev/null ++++ b/src/hotspot/cpu/mips/methodHandles_mips.cpp +@@ -0,0 +1,576 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -73168,6 +73427,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/metho +#include "interpreter/interpreterRuntime.hpp" +#include "memory/allocation.inline.hpp" +#include "prims/methodHandles.hpp" ++#include "runtime/frame.inline.hpp" ++#include "utilities/preserveException.hpp" + +#define __ _masm-> + @@ -73710,9 +73971,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/metho +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/methodHandles_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/methodHandles_mips.hpp ---- openjdk/src/hotspot/cpu/mips/methodHandles_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/methodHandles_mips.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/methodHandles_mips.hpp b/src/hotspot/cpu/mips/methodHandles_mips.hpp +new file mode 100644 +index 000000000..03b65fc8e +--- /dev/null ++++ b/src/hotspot/cpu/mips/methodHandles_mips.hpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -73776,9 +74039,42 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/metho + // Should be in sharedRuntime, not here. + return I29; + } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips_64.ad jdk11u-ls/src/hotspot/cpu/mips/mips_64.ad ---- openjdk/src/hotspot/cpu/mips/mips_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/mips_64.ad 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/mips.ad b/src/hotspot/cpu/mips/mips.ad +new file mode 100644 +index 000000000..3563bbe0e +--- /dev/null ++++ b/src/hotspot/cpu/mips/mips.ad +@@ -0,0 +1,25 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ +diff --git a/src/hotspot/cpu/mips/mips_64.ad b/src/hotspot/cpu/mips/mips_64.ad +new file mode 100644 +index 000000000..b4acbd83f +--- /dev/null ++++ b/src/hotspot/cpu/mips/mips_64.ad @@ -0,0 +1,12243 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -86023,39 +86319,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips_ +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips.ad jdk11u-ls/src/hotspot/cpu/mips/mips.ad ---- openjdk/src/hotspot/cpu/mips/mips.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/mips.ad 2023-09-12 13:54:23.101571672 +0800 -@@ -0,0 +1,25 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativeInst_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/nativeInst_mips.cpp ---- openjdk/src/hotspot/cpu/mips/nativeInst_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/nativeInst_mips.cpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,1820 @@ +diff --git a/src/hotspot/cpu/mips/nativeInst_mips.cpp b/src/hotspot/cpu/mips/nativeInst_mips.cpp +new file mode 100644 +index 000000000..96a147eaa +--- /dev/null ++++ b/src/hotspot/cpu/mips/nativeInst_mips.cpp +@@ -0,0 +1,1821 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -86084,6 +86353,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativ +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" +#include "compiler/disassembler.hpp" ++#include "code/codeCache.hpp" +#include "code/compiledIC.hpp" +#include "memory/resourceArea.hpp" +#include "nativeInst_mips.hpp" @@ -87876,10 +88146,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativ + // we check the safepoint instruction like the this. + return is_op(Assembler::lw_op) && is_rt(AT); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativeInst_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/nativeInst_mips.hpp ---- openjdk/src/hotspot/cpu/mips/nativeInst_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/nativeInst_mips.hpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,733 @@ +diff --git a/src/hotspot/cpu/mips/nativeInst_mips.hpp b/src/hotspot/cpu/mips/nativeInst_mips.hpp +new file mode 100644 +index 000000000..fb4f99c9c +--- /dev/null ++++ b/src/hotspot/cpu/mips/nativeInst_mips.hpp +@@ -0,0 +1,734 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -87909,6 +88181,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativ +#define CPU_MIPS_VM_NATIVEINST_MIPS_HPP + +#include "asm/assembler.hpp" ++#include "asm/macroAssembler.hpp" +#include "runtime/icache.hpp" +#include "runtime/os.hpp" +#include "runtime/safepointMechanism.hpp" @@ -88613,9 +88886,64 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativ + return (NativeCallTrampolineStub*)addr; +} +#endif // CPU_MIPS_VM_NATIVEINST_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/register_definitions_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/register_definitions_mips.cpp ---- openjdk/src/hotspot/cpu/mips/register_definitions_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/register_definitions_mips.cpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/registerMap_mips.hpp b/src/hotspot/cpu/mips/registerMap_mips.hpp +new file mode 100644 +index 000000000..7f800eb10 +--- /dev/null ++++ b/src/hotspot/cpu/mips/registerMap_mips.hpp +@@ -0,0 +1,47 @@ ++/* ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_REGISTERMAP_MIPS_HPP ++#define CPU_MIPS_VM_REGISTERMAP_MIPS_HPP ++ ++// machine-dependent implemention for register maps ++ friend class frame; ++ ++ private: ++#ifndef CORE ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return NULL. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return NULL;} ++#endif ++ ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} ++ ++#endif // CPU_MIPS_VM_REGISTERMAP_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/register_definitions_mips.cpp b/src/hotspot/cpu/mips/register_definitions_mips.cpp +new file mode 100644 +index 000000000..4af253183 +--- /dev/null ++++ b/src/hotspot/cpu/mips/register_definitions_mips.cpp @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. @@ -88720,60 +89048,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis +REGISTER_DEFINITION(FloatRegister, f29); +REGISTER_DEFINITION(FloatRegister, f30); +REGISTER_DEFINITION(FloatRegister, f31); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/registerMap_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/registerMap_mips.hpp ---- openjdk/src/hotspot/cpu/mips/registerMap_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/registerMap_mips.hpp 2023-09-12 13:54:23.101571672 +0800 -@@ -0,0 +1,47 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -+#define CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -+ -+// machine-dependent implemention for register maps -+ friend class frame; -+ -+ private: -+#ifndef CORE -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return NULL. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return NULL;} -+#endif -+ -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} -+ -+#endif // CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/register_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/register_mips.cpp ---- openjdk/src/hotspot/cpu/mips/register_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/register_mips.cpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/register_mips.cpp b/src/hotspot/cpu/mips/register_mips.cpp +new file mode 100644 +index 000000000..4a9b22bfe +--- /dev/null ++++ b/src/hotspot/cpu/mips/register_mips.cpp @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -88827,9 +89106,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis + return is_valid() ? names[encoding()] : "fnoreg"; +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/register_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/register_mips.hpp ---- openjdk/src/hotspot/cpu/mips/register_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/register_mips.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/register_mips.hpp b/src/hotspot/cpu/mips/register_mips.hpp +new file mode 100644 +index 000000000..ea216fbcb +--- /dev/null ++++ b/src/hotspot/cpu/mips/register_mips.hpp @@ -0,0 +1,341 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -89172,10 +89453,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis +}; + +#endif //CPU_MIPS_VM_REGISTER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/relocInfo_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/relocInfo_mips.cpp ---- openjdk/src/hotspot/cpu/mips/relocInfo_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/relocInfo_mips.cpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,158 @@ +diff --git a/src/hotspot/cpu/mips/relocInfo_mips.cpp b/src/hotspot/cpu/mips/relocInfo_mips.cpp +new file mode 100644 +index 000000000..ff8028032 +--- /dev/null ++++ b/src/hotspot/cpu/mips/relocInfo_mips.cpp +@@ -0,0 +1,160 @@ +/* + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -89204,9 +89487,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/reloc +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" +#include "code/relocInfo.hpp" ++#include "compiler/disassembler.hpp" +#include "nativeInst_mips.hpp" +#include "oops/compressedOops.inline.hpp" +#include "oops/oop.hpp" ++#include "oops/oop.inline.hpp" +#include "runtime/safepoint.hpp" + + @@ -89334,9 +89619,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/reloc + +void metadata_Relocation::pd_fix_value(address x) { +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/relocInfo_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/relocInfo_mips.hpp ---- openjdk/src/hotspot/cpu/mips/relocInfo_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/relocInfo_mips.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/relocInfo_mips.hpp b/src/hotspot/cpu/mips/relocInfo_mips.hpp +new file mode 100644 +index 000000000..1e1e170fd +--- /dev/null ++++ b/src/hotspot/cpu/mips/relocInfo_mips.hpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -89382,9 +89669,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/reloc + static bool mustIterateImmediateOopsInCode() { return false; } + +#endif // CPU_MIPS_VM_RELOCINFO_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/runtime_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/runtime_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/runtime_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/runtime_mips_64.cpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/runtime_mips_64.cpp b/src/hotspot/cpu/mips/runtime_mips_64.cpp +new file mode 100644 +index 000000000..2a0488cd0 +--- /dev/null ++++ b/src/hotspot/cpu/mips/runtime_mips_64.cpp @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -89584,10 +89873,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/runti + + _exception_blob = ExceptionBlob::create(&buffer, oop_maps, framesize); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,3877 @@ +diff --git a/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp b/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp +new file mode 100644 +index 000000000..4a9791d4c +--- /dev/null ++++ b/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp +@@ -0,0 +1,3879 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -89618,9 +89909,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/share +#include "asm/macroAssembler.inline.hpp" +#include "code/debugInfoRec.hpp" +#include "code/icBuffer.hpp" ++#include "code/nativeInst.hpp" +#include "code/vtableStubs.hpp" +#include "interpreter/interpreter.hpp" +#include "oops/compiledICHolder.hpp" ++#include "oops/klass.inline.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/vframeArray.hpp" +#include "vmreg_mips.inline.hpp" @@ -93465,10 +93758,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/share + + reverse_words(m, (unsigned long *)m_ints, longwords); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp 2023-11-01 09:34:25.497945271 +0800 -@@ -0,0 +1,2160 @@ +diff --git a/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp b/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp +new file mode 100644 +index 000000000..9fe2bc837 +--- /dev/null ++++ b/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp +@@ -0,0 +1,2162 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -95606,6 +95901,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG + &StubRoutines::_safefetchN_fault_pc, + &StubRoutines::_safefetchN_continuation_pc); + ++#ifdef COMPILER2 + if (UseMontgomeryMultiplyIntrinsic) { + StubRoutines::_montgomeryMultiply + = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_multiply); @@ -95614,6 +95910,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG + StubRoutines::_montgomerySquare + = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_square); + } ++#endif + } + + public: @@ -95629,48 +95926,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG +void StubGenerator_generate(CodeBuffer* code, bool all) { + StubGenerator g(code, all); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,35 @@ -+/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "runtime/deoptimization.hpp" -+#include "runtime/frame.inline.hpp" -+#include "runtime/stubRoutines.hpp" -+#include "runtime/thread.inline.hpp" -+ -+// a description of how to extend it, see the stubRoutines.hpp file. -+ -+//find the last fp value -+address StubRoutines::gs2::_call_stub_compiled_return = NULL; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubRoutines_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/stubRoutines_mips.hpp ---- openjdk/src/hotspot/cpu/mips/stubRoutines_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/stubRoutines_mips.hpp 2023-09-12 13:54:23.101571672 +0800 +diff --git a/src/hotspot/cpu/mips/stubRoutines_mips.hpp b/src/hotspot/cpu/mips/stubRoutines_mips.hpp +new file mode 100644 +index 000000000..920c08844 +--- /dev/null ++++ b/src/hotspot/cpu/mips/stubRoutines_mips.hpp @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -95731,10 +95991,53 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubR +}; + +#endif // CPU_MIPS_VM_STUBROUTINES_MIPS_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp ---- openjdk/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp 2023-11-01 09:34:25.501945276 +0800 -@@ -0,0 +1,2148 @@ +diff --git a/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp b/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp +new file mode 100644 +index 000000000..358d580d5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "runtime/deoptimization.hpp" ++#include "runtime/frame.inline.hpp" ++#include "runtime/stubRoutines.hpp" ++#include "runtime/thread.inline.hpp" ++ ++// a description of how to extend it, see the stubRoutines.hpp file. ++ ++//find the last fp value ++address StubRoutines::gs2::_call_stub_compiled_return = NULL; +diff --git a/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp b/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp +new file mode 100644 +index 000000000..19e2f29c5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp +@@ -0,0 +1,2149 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -95763,6 +96066,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" +#include "interpreter/bytecodeHistogram.hpp" ++#include "interpreter/interp_masm.hpp" +#include "interpreter/interpreter.hpp" +#include "interpreter/interpreterRuntime.hpp" +#include "interpreter/templateInterpreterGenerator.hpp" @@ -97883,10 +98187,61 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ + __ bind(L); +} +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templateTable_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/templateTable_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/templateTable_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/templateTable_mips_64.cpp 2023-11-01 09:34:25.501945276 +0800 -@@ -0,0 +1,4685 @@ +diff --git a/src/hotspot/cpu/mips/templateTable_mips.hpp b/src/hotspot/cpu/mips/templateTable_mips.hpp +new file mode 100644 +index 000000000..46a88aba2 +--- /dev/null ++++ b/src/hotspot/cpu/mips/templateTable_mips.hpp +@@ -0,0 +1,43 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++#define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++ ++ static void prepare_invoke(int byte_no, ++ Register method, // linked method (or i-klass) ++ Register index = noreg, // itable index, MethodType, etc. ++ Register recv = noreg, // if caller wants to see it ++ Register flags = noreg // if caller wants to test it ++ ); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); ++ ++#endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP +diff --git a/src/hotspot/cpu/mips/templateTable_mips_64.cpp b/src/hotspot/cpu/mips/templateTable_mips_64.cpp +new file mode 100644 +index 000000000..526548383 +--- /dev/null ++++ b/src/hotspot/cpu/mips/templateTable_mips_64.cpp +@@ -0,0 +1,4688 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -97916,12 +98271,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ +#include "asm/macroAssembler.hpp" +#include "interpreter/interpreter.hpp" +#include "interpreter/interpreterRuntime.hpp" ++#include "interpreter/interp_masm.hpp" +#include "interpreter/templateTable.hpp" +#include "memory/universe.hpp" +#include "oops/methodData.hpp" +#include "oops/objArrayKlass.hpp" +#include "oops/oop.inline.hpp" +#include "prims/methodHandles.hpp" ++#include "runtime/frame.inline.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" +#include "runtime/synchronizer.hpp" @@ -101338,6 +101695,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ + case Bytecodes::_fast_dputfield: __ pop_d(); break; + case Bytecodes::_fast_fputfield: __ pop_f(); break; + case Bytecodes::_fast_lputfield: __ pop_l(FSR); break; ++ default: break; + } + __ bind(L2); + } @@ -102572,13 +102930,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ + __ sync(); +} +#endif // !CC_INTERP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templateTable_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/templateTable_mips.hpp ---- openjdk/src/hotspot/cpu/mips/templateTable_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/templateTable_mips.hpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,43 @@ +diff --git a/src/hotspot/cpu/mips/vmStructs_mips.hpp b/src/hotspot/cpu/mips/vmStructs_mips.hpp +new file mode 100644 +index 000000000..693991435 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmStructs_mips.hpp +@@ -0,0 +1,68 @@ +/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -102601,86 +102961,58 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ + * + */ + -+#ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -+#define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++#ifndef CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP ++#define CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP + -+ static void prepare_invoke(int byte_no, -+ Register method, // linked method (or i-klass) -+ Register index = noreg, // itable index, MethodType, etc. -+ Register recv = noreg, // if caller wants to see it -+ Register flags = noreg // if caller wants to test it -+ ); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ static void volatile_barrier(); ++// These are the CPU-specific fields, types and integer ++// constants required by the Serviceability Agent. This file is ++// referenced by vmStructs.cpp. + -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); ++#define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ ++ \ ++ /******************************/ \ ++ /* JavaCallWrapper */ \ ++ /******************************/ \ ++ /******************************/ \ ++ /* JavaFrameAnchor */ \ ++ /******************************/ \ ++ volatile_nonstatic_field(JavaFrameAnchor, _last_Java_fp, intptr_t*) \ ++ \ + -+#endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/vmreg_mips.cpp ---- openjdk/src/hotspot/cpu/mips/vmreg_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vmreg_mips.cpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,51 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_STRUCTS_OS_CPU macro (and must */ ++ /* be present there) */ + -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" + ++#define VM_TYPES_CPU(declare_type, declare_toplevel_type, declare_oop_type, declare_integer_type, declare_unsigned_integer_type, declare_c1_toplevel_type, declare_c2_type, declare_c2_toplevel_type) \ + ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_TYPES_OS_CPU macro (and must */ ++ /* be present there) */ + -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ regName[i++] = reg->name(); -+ regName[i++] = reg->name(); -+ reg = reg->successor(); -+ } + -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ regName[i++] = freg->name(); -+ regName[i++] = freg->name(); -+ freg = freg->successor(); -+ } ++#define VM_INT_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ + -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/vmreg_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vmreg_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vmreg_mips.hpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,56 @@ ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_INT_CONSTANTS_OS_CPU macro (and must */ ++ /* be present there) */ ++ ++#define VM_LONG_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ ++ ++ /* NOTE that we do not use the last_entry() macro here; it is used */ ++ /* in vmStructs__.hpp's VM_LONG_CONSTANTS_OS_CPU macro (and must */ ++ /* be present there) */ ++ ++#endif // CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/vm_version_ext_mips.cpp b/src/hotspot/cpu/mips/vm_version_ext_mips.cpp +new file mode 100644 +index 000000000..ac2a43edc +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_ext_mips.cpp +@@ -0,0 +1,90 @@ +/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -102703,86 +103035,80 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg + * + */ + -+#ifndef CPU_MIPS_VM_VMREG_MIPS_HPP -+#define CPU_MIPS_VM_VMREG_MIPS_HPP ++#include "memory/allocation.inline.hpp" ++#include "runtime/os.inline.hpp" ++#include "vm_version_ext_mips.hpp" + -+inline Register as_Register() { -+ assert( is_Register(), "must be"); -+ return ::as_Register(value() >> 1); -+} ++// VM_Version_Ext statics ++int VM_Version_Ext::_no_of_threads = 0; ++int VM_Version_Ext::_no_of_cores = 0; ++int VM_Version_Ext::_no_of_sockets = 0; ++bool VM_Version_Ext::_initialized = false; ++char VM_Version_Ext::_cpu_name[CPU_TYPE_DESC_BUF_SIZE] = {0}; ++char VM_Version_Ext::_cpu_desc[CPU_DETAILED_DESC_BUF_SIZE] = {0}; + -+inline FloatRegister as_FloatRegister() { -+ assert( is_FloatRegister(), "must be" ); -+ assert( is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); -+} ++void VM_Version_Ext::initialize_cpu_information(void) { ++ // do nothing if cpu info has been initialized ++ if (_initialized) { ++ return; ++ } + -+inline bool is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++ _no_of_cores = os::processor_count(); ++ _no_of_threads = _no_of_cores; ++ _no_of_sockets = _no_of_cores; ++ if (is_loongson()) { ++ snprintf(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "Loongson MIPS"); ++ snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "Loongson MIPS %s", cpu_features()); ++ } else { ++ snprintf(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "MIPS"); ++ snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "MIPS %s", cpu_features()); ++ } ++ _initialized = true; +} + -+inline bool is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++int VM_Version_Ext::number_of_threads(void) { ++ initialize_cpu_information(); ++ return _no_of_threads; +} + -+inline bool is_concrete() { -+ assert(is_reg(), "must be"); -+ if(is_Register()) return true; -+ if(is_FloatRegister()) return true; -+ assert(false, "what register?"); -+ return false; ++int VM_Version_Ext::number_of_cores(void) { ++ initialize_cpu_information(); ++ return _no_of_cores; +} + -+#endif // CPU_MIPS_VM_VMREG_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg_mips.inline.hpp jdk11u-ls/src/hotspot/cpu/mips/vmreg_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/vmreg_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vmreg_mips.inline.hpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,38 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -+#define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -+ -+inline VMReg RegisterImpl::as_VMReg() { -+ if( this==noreg ) return VMRegImpl::Bad(); -+ return VMRegImpl::as_VMReg(encoding() << 1 ); ++int VM_Version_Ext::number_of_sockets(void) { ++ initialize_cpu_information(); ++ return _no_of_sockets; +} + -+inline VMReg FloatRegisterImpl::as_VMReg() { -+ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); ++const char* VM_Version_Ext::cpu_name(void) { ++ initialize_cpu_information(); ++ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_TYPE_DESC_BUF_SIZE, mtTracing); ++ if (NULL == tmp) { ++ return NULL; ++ } ++ strncpy(tmp, _cpu_name, CPU_TYPE_DESC_BUF_SIZE); ++ return tmp; +} + -+#endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmStructs_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/vmStructs_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vmStructs_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vmStructs_mips.hpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,68 @@ ++const char* VM_Version_Ext::cpu_description(void) { ++ initialize_cpu_information(); ++ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_DETAILED_DESC_BUF_SIZE, mtTracing); ++ if (NULL == tmp) { ++ return NULL; ++ } ++ strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); ++ return tmp; ++} +diff --git a/src/hotspot/cpu/mips/vm_version_ext_mips.hpp b/src/hotspot/cpu/mips/vm_version_ext_mips.hpp +new file mode 100644 +index 000000000..ffdcff067 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_ext_mips.hpp +@@ -0,0 +1,54 @@ +/* -+ * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2019, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -102805,208 +103131,44 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmStr + * + */ + -+#ifndef CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP -+#define CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP -+ -+// These are the CPU-specific fields, types and integer -+// constants required by the Serviceability Agent. This file is -+// referenced by vmStructs.cpp. -+ -+#define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ -+ \ -+ /******************************/ \ -+ /* JavaCallWrapper */ \ -+ /******************************/ \ -+ /******************************/ \ -+ /* JavaFrameAnchor */ \ -+ /******************************/ \ -+ volatile_nonstatic_field(JavaFrameAnchor, _last_Java_fp, intptr_t*) \ -+ \ -+ -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_STRUCTS_OS_CPU macro (and must */ -+ /* be present there) */ -+ -+ -+#define VM_TYPES_CPU(declare_type, declare_toplevel_type, declare_oop_type, declare_integer_type, declare_unsigned_integer_type, declare_c1_toplevel_type, declare_c2_type, declare_c2_toplevel_type) \ -+ -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_TYPES_OS_CPU macro (and must */ -+ /* be present there) */ ++#ifndef CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP ++#define CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP + ++#include "runtime/vm_version.hpp" ++#include "utilities/macros.hpp" + -+#define VM_INT_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ ++class VM_Version_Ext : public VM_Version { ++ private: ++ static const size_t CPU_TYPE_DESC_BUF_SIZE = 256; ++ static const size_t CPU_DETAILED_DESC_BUF_SIZE = 4096; + -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_INT_CONSTANTS_OS_CPU macro (and must */ -+ /* be present there) */ ++ static int _no_of_threads; ++ static int _no_of_cores; ++ static int _no_of_sockets; ++ static bool _initialized; ++ static char _cpu_name[CPU_TYPE_DESC_BUF_SIZE]; ++ static char _cpu_desc[CPU_DETAILED_DESC_BUF_SIZE]; + -+#define VM_LONG_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) \ ++ public: ++ static int number_of_threads(void); ++ static int number_of_cores(void); ++ static int number_of_sockets(void); + -+ /* NOTE that we do not use the last_entry() macro here; it is used */ -+ /* in vmStructs__.hpp's VM_LONG_CONSTANTS_OS_CPU macro (and must */ -+ /* be present there) */ ++ static const char* cpu_name(void); ++ static const char* cpu_description(void); ++ static void initialize_cpu_information(void); ++}; + -+#endif // CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.cpp ---- openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.cpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,90 @@ ++#endif // CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/vm_version_mips.cpp b/src/hotspot/cpu/mips/vm_version_mips.cpp +new file mode 100644 +index 000000000..2e7b61390 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_mips.cpp +@@ -0,0 +1,516 @@ +/* -+ * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "memory/allocation.inline.hpp" -+#include "runtime/os.inline.hpp" -+#include "vm_version_ext_mips.hpp" -+ -+// VM_Version_Ext statics -+int VM_Version_Ext::_no_of_threads = 0; -+int VM_Version_Ext::_no_of_cores = 0; -+int VM_Version_Ext::_no_of_sockets = 0; -+bool VM_Version_Ext::_initialized = false; -+char VM_Version_Ext::_cpu_name[CPU_TYPE_DESC_BUF_SIZE] = {0}; -+char VM_Version_Ext::_cpu_desc[CPU_DETAILED_DESC_BUF_SIZE] = {0}; -+ -+void VM_Version_Ext::initialize_cpu_information(void) { -+ // do nothing if cpu info has been initialized -+ if (_initialized) { -+ return; -+ } -+ -+ _no_of_cores = os::processor_count(); -+ _no_of_threads = _no_of_cores; -+ _no_of_sockets = _no_of_cores; -+ if (is_loongson()) { -+ snprintf(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "Loongson MIPS"); -+ snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "Loongson MIPS %s", cpu_features()); -+ } else { -+ snprintf(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "MIPS"); -+ snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "MIPS %s", cpu_features()); -+ } -+ _initialized = true; -+} -+ -+int VM_Version_Ext::number_of_threads(void) { -+ initialize_cpu_information(); -+ return _no_of_threads; -+} -+ -+int VM_Version_Ext::number_of_cores(void) { -+ initialize_cpu_information(); -+ return _no_of_cores; -+} -+ -+int VM_Version_Ext::number_of_sockets(void) { -+ initialize_cpu_information(); -+ return _no_of_sockets; -+} -+ -+const char* VM_Version_Ext::cpu_name(void) { -+ initialize_cpu_information(); -+ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_TYPE_DESC_BUF_SIZE, mtTracing); -+ if (NULL == tmp) { -+ return NULL; -+ } -+ strncpy(tmp, _cpu_name, CPU_TYPE_DESC_BUF_SIZE); -+ return tmp; -+} -+ -+const char* VM_Version_Ext::cpu_description(void) { -+ initialize_cpu_information(); -+ char* tmp = NEW_C_HEAP_ARRAY_RETURN_NULL(char, CPU_DETAILED_DESC_BUF_SIZE, mtTracing); -+ if (NULL == tmp) { -+ return NULL; -+ } -+ strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); -+ return tmp; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.hpp 2023-09-12 13:54:23.105571678 +0800 -@@ -0,0 +1,54 @@ -+/* -+ * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2019, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP -+#define CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP -+ -+#include "runtime/vm_version.hpp" -+#include "utilities/macros.hpp" -+ -+class VM_Version_Ext : public VM_Version { -+ private: -+ static const size_t CPU_TYPE_DESC_BUF_SIZE = 256; -+ static const size_t CPU_DETAILED_DESC_BUF_SIZE = 4096; -+ -+ static int _no_of_threads; -+ static int _no_of_cores; -+ static int _no_of_sockets; -+ static bool _initialized; -+ static char _cpu_name[CPU_TYPE_DESC_BUF_SIZE]; -+ static char _cpu_desc[CPU_DETAILED_DESC_BUF_SIZE]; -+ -+ public: -+ static int number_of_threads(void); -+ static int number_of_cores(void); -+ static int number_of_sockets(void); -+ -+ static const char* cpu_name(void); -+ static const char* cpu_description(void); -+ static void initialize_cpu_information(void); -+}; -+ -+#endif // CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_mips.cpp jdk11u-ls/src/hotspot/cpu/mips/vm_version_mips.cpp ---- openjdk/src/hotspot/cpu/mips/vm_version_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vm_version_mips.cpp 2023-11-01 09:34:25.501945276 +0800 -@@ -0,0 +1,520 @@ -+/* -+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -103374,12 +103536,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + FLAG_SET_DEFAULT(UseLEXT3, false); + } + -+ if (is_gs264() || is_gs464() || supports_cpucfg()) { -+ if (FLAG_IS_DEFAULT(PatchContinuousLoad)) { -+ FLAG_SET_DEFAULT(PatchContinuousLoad, false); -+ } -+ } -+ + if (UseLEXT2) { + if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstructionMIPS64)) { + FLAG_SET_DEFAULT(UseCountTrailingZerosInstructionMIPS64, 1); @@ -103495,12 +103651,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + } + } + ++#ifdef COMPILER2 + if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { + UseMontgomeryMultiplyIntrinsic = true; + } + if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { + UseMontgomerySquareIntrinsic = true; + } ++#endif + + if (FLAG_IS_DEFAULT(UseFMA)) { + FLAG_SET_DEFAULT(UseFMA, true); @@ -103524,13 +103682,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + + get_processor_features(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_mips.hpp jdk11u-ls/src/hotspot/cpu/mips/vm_version_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vm_version_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vm_version_mips.hpp 2023-11-01 09:34:25.501945276 +0800 +diff --git a/src/hotspot/cpu/mips/vm_version_mips.hpp b/src/hotspot/cpu/mips/vm_version_mips.hpp +new file mode 100644 +index 000000000..733a0af29 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_mips.hpp @@ -0,0 +1,221 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -103566,7 +103726,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + union Loongson_Cpucfg_Id1 { + uint32_t value; + struct { -+ uint32_t FP : 1, ++ uint32_t FP_CFG : 1, + FPREV : 3, + MMI : 1, + MSA1 : 1, @@ -103749,13 +103909,178 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve +}; + +#endif // CPU_MIPS_VM_VM_VERSION_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp jdk11u-ls/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp 2023-11-01 09:34:25.501945276 +0800 -@@ -0,0 +1,339 @@ +diff --git a/src/hotspot/cpu/mips/vmreg_mips.cpp b/src/hotspot/cpu/mips/vmreg_mips.cpp +new file mode 100644 +index 000000000..86bd74d43 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmreg_mips.cpp +@@ -0,0 +1,51 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ regName[i++] = reg->name(); ++ regName[i++] = reg->name(); ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ regName[i++] = freg->name(); ++ regName[i++] = freg->name(); ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} +diff --git a/src/hotspot/cpu/mips/vmreg_mips.hpp b/src/hotspot/cpu/mips/vmreg_mips.hpp +new file mode 100644 +index 000000000..8ccc8c513 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmreg_mips.hpp +@@ -0,0 +1,56 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_VMREG_MIPS_HPP ++#define CPU_MIPS_VM_VMREG_MIPS_HPP ++ ++inline Register as_Register() { ++ assert( is_Register(), "must be"); ++ return ::as_Register(value() >> 1); ++} ++ ++inline FloatRegister as_FloatRegister() { ++ assert( is_FloatRegister(), "must be" ); ++ assert( is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); ++} ++ ++inline bool is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline bool is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline bool is_concrete() { ++ assert(is_reg(), "must be"); ++ if(is_Register()) return true; ++ if(is_FloatRegister()) return true; ++ assert(false, "what register?"); ++ return false; ++} ++ ++#endif // CPU_MIPS_VM_VMREG_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/vmreg_mips.inline.hpp b/src/hotspot/cpu/mips/vmreg_mips.inline.hpp +new file mode 100644 +index 000000000..12ad7361a +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmreg_mips.inline.hpp +@@ -0,0 +1,38 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP ++#define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP ++ ++inline VMReg RegisterImpl::as_VMReg() { ++ if( this==noreg ) return VMRegImpl::Bad(); ++ return VMRegImpl::as_VMReg(encoding() << 1 ); ++} ++ ++inline VMReg FloatRegisterImpl::as_VMReg() { ++ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); ++} ++ ++#endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP +diff --git a/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp b/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp +new file mode 100644 +index 000000000..75c23e808 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp +@@ -0,0 +1,340 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -103784,6 +104109,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vtabl +#include "interp_masm_mips.hpp" +#include "memory/resourceArea.hpp" +#include "oops/compiledICHolder.hpp" ++#include "oops/klass.inline.hpp" +#include "oops/klassVtable.hpp" +#include "runtime/sharedRuntime.hpp" +#include "vmreg_mips.inline.hpp" @@ -104092,10 +104418,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vtabl + const unsigned int icache_line_size = wordSize; + return icache_line_size; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp jdk11u-ls/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp ---- openjdk/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp 2023-09-12 13:54:23.109571683 +0800 -@@ -488,6 +488,9 @@ +diff --git a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp +index 243cde8d7..124efbfb1 100644 +--- a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp ++++ b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp +@@ -488,6 +488,9 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { } } @@ -104105,7 +104432,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIR void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { Bytecodes::Code code = op->bytecode(); -@@ -1608,6 +1611,10 @@ +@@ -1608,6 +1611,10 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L __ bind(skip); } @@ -104116,10 +104443,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIR void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp jdk11u-ls/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp ---- openjdk/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp 2023-09-12 13:54:23.109571683 +0800 -@@ -273,21 +273,29 @@ +diff --git a/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp b/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp +index 8bb8c441b..32384c649 100644 +--- a/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp ++++ b/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp +@@ -275,21 +275,29 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { __ move(temp, addr); } @@ -104155,10 +104483,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIR bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { assert(left != result, "should be different registers"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp jdk11u-ls/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp ---- openjdk/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp 2023-09-12 13:54:23.109571683 +0800 -@@ -62,3 +62,24 @@ +diff --git a/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp b/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp +index ef9b0833d..c6b25bf10 100644 +--- a/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp ++++ b/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp +@@ -62,3 +62,24 @@ void LIR_Address::verify() const { #endif } #endif // PRODUCT @@ -104183,10 +104512,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIR + cmp(condition, left, right); + cmove(condition, src1, src2, dst, type); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp jdk11u-ls/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp ---- openjdk/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp 2023-09-12 13:54:23.137571718 +0800 -@@ -379,6 +379,9 @@ +diff --git a/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp b/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp +index 897be2209..0c27cc20f 100644 +--- a/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp ++++ b/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp +@@ -379,6 +379,9 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { } } @@ -104196,7 +104526,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LI void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { LIR_Opr src = op->in_opr(); -@@ -1503,6 +1506,10 @@ +@@ -1503,6 +1506,10 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L } } @@ -104207,10 +104537,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LI void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp jdk11u-ls/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp ---- openjdk/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp 2023-09-12 13:54:23.137571718 +0800 -@@ -213,16 +213,29 @@ +diff --git a/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp b/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp +index 86eb2fe88..114aacaad 100644 +--- a/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp ++++ b/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp +@@ -215,16 +215,29 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); } @@ -104243,10 +104574,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LI bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { if (tmp->is_valid()) { if (is_power_of_2(c + 1)) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LIR_s390.cpp jdk11u-ls/src/hotspot/cpu/s390/c1_LIR_s390.cpp ---- openjdk/src/hotspot/cpu/s390/c1_LIR_s390.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/s390/c1_LIR_s390.cpp 2023-09-12 13:54:23.137571718 +0800 -@@ -56,3 +56,23 @@ +diff --git a/src/hotspot/cpu/s390/c1_LIR_s390.cpp b/src/hotspot/cpu/s390/c1_LIR_s390.cpp +index 9507ca085..2116e9af2 100644 +--- a/src/hotspot/cpu/s390/c1_LIR_s390.cpp ++++ b/src/hotspot/cpu/s390/c1_LIR_s390.cpp +@@ -56,3 +56,23 @@ void LIR_Address::verify() const { } #endif // PRODUCT @@ -104270,10 +104602,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LI + cmp(condition, left, right); + cmove(condition, src1, src2, dst, type); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp jdk11u-ls/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp ---- openjdk/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp 2023-09-12 13:54:23.173571763 +0800 -@@ -599,6 +599,9 @@ +diff --git a/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp b/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp +index e503159eb..2e5609fec 100644 +--- a/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp ++++ b/src/hotspot/cpu/sparc/c1_LIRAssembler_sparc.cpp +@@ -599,6 +599,9 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { // The peephole pass fills the delay slot } @@ -104283,7 +104616,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_L void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { Bytecodes::Code code = op->bytecode(); -@@ -1638,6 +1641,9 @@ +@@ -1638,6 +1641,9 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L __ bind(skip); } @@ -104293,10 +104626,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_L void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { assert(info == NULL, "unused on this code path"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp jdk11u-ls/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp ---- openjdk/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp 2023-09-12 13:54:23.173571763 +0800 -@@ -267,19 +267,29 @@ +diff --git a/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp b/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp +index b324a3dbd..0b7cb52dc 100644 +--- a/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp ++++ b/src/hotspot/cpu/sparc/c1_LIRGenerator_sparc.cpp +@@ -269,19 +269,29 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { __ move(temp, addr); } @@ -104330,10 +104664,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_L bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { assert(left != result, "should be different registers"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp jdk11u-ls/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp ---- openjdk/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp 2023-09-12 13:54:23.173571763 +0800 -@@ -54,3 +54,24 @@ +diff --git a/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp b/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp +index c21d2c1d9..9cebb387e 100644 +--- a/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp ++++ b/src/hotspot/cpu/sparc/c1_LIR_sparc.cpp +@@ -54,3 +54,24 @@ void LIR_Address::verify() const { "wrong type for addresses"); } #endif // PRODUCT @@ -104358,10 +104693,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/sparc/c1_L + cmp(condition, left, right); + cmove(condition, src1, src2, dst, type); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp jdk11u-ls/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp ---- openjdk/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp 2023-09-12 13:54:23.189571783 +0800 -@@ -1442,6 +1442,10 @@ +diff --git a/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp b/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp +index cee3140f4..7b76eb0b9 100644 +--- a/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp ++++ b/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp +@@ -1442,6 +1442,10 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { } } @@ -104372,7 +104708,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIR void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { LIR_Opr src = op->in_opr(); LIR_Opr dest = op->result_opr(); -@@ -2030,6 +2034,9 @@ +@@ -2030,6 +2034,9 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L } } @@ -104382,10 +104718,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIR void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp jdk11u-ls/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp ---- openjdk/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp 2023-09-12 13:54:23.189571783 +0800 -@@ -255,15 +255,27 @@ +diff --git a/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp b/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp +index 905708a9f..1c6774e1d 100644 +--- a/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp ++++ b/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp +@@ -255,15 +255,27 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); } @@ -104415,10 +104752,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIR bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { if (tmp->is_valid() && c > 0 && c < max_jint) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIR_x86.cpp jdk11u-ls/src/hotspot/cpu/x86/c1_LIR_x86.cpp ---- openjdk/src/hotspot/cpu/x86/c1_LIR_x86.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/x86/c1_LIR_x86.cpp 2023-09-12 13:54:23.189571783 +0800 -@@ -72,3 +72,24 @@ +diff --git a/src/hotspot/cpu/x86/c1_LIR_x86.cpp b/src/hotspot/cpu/x86/c1_LIR_x86.cpp +index 92277ee06..20e283e30 100644 +--- a/src/hotspot/cpu/x86/c1_LIR_x86.cpp ++++ b/src/hotspot/cpu/x86/c1_LIR_x86.cpp +@@ -72,3 +72,24 @@ void LIR_Address::verify() const { #endif } #endif // PRODUCT @@ -104443,10 +104781,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIR + cmp(condition, left, right); + cmove(condition, src1, src2, dst, type); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp jdk11u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp ---- openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp 2023-09-12 13:54:23.201571798 +0800 -@@ -263,7 +263,8 @@ +diff --git a/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp +index 95d7e5150..8d7b623ee 100644 +--- a/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp ++++ b/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp +@@ -263,7 +263,8 @@ void ZBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, #define __ ce->masm()-> void ZBarrierSetAssembler::generate_c1_load_barrier_test(LIR_Assembler* ce, @@ -104456,10 +104795,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/z __ testptr(ref->as_register(), address_bad_mask_from_thread(r15_thread)); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp jdk11u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp ---- openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp 2023-09-12 13:54:23.201571798 +0800 -@@ -77,7 +77,8 @@ +diff --git a/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp b/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp +index 3687754e7..791e4ed43 100644 +--- a/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp ++++ b/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp +@@ -77,7 +77,8 @@ public: #ifdef COMPILER1 void generate_c1_load_barrier_test(LIR_Assembler* ce, @@ -104469,9 +104809,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/z void generate_c1_load_barrier_stub(LIR_Assembler* ce, ZLoadBarrierStubC1* stub) const; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_linux.cpp jdk11u-ls/src/hotspot/os/linux/os_linux.cpp ---- openjdk/src/hotspot/os/linux/os_linux.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os/linux/os_linux.cpp 2023-11-01 09:34:25.565945347 +0800 +diff --git a/src/hotspot/os/linux/os_linux.cpp b/src/hotspot/os/linux/os_linux.cpp +index 2842a11f9..4f58ec4be 100644 +--- a/src/hotspot/os/linux/os_linux.cpp ++++ b/src/hotspot/os/linux/os_linux.cpp @@ -23,6 +23,12 @@ * */ @@ -104485,7 +104826,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_li // no precompiled headers #include "jvm.h" #include "classfile/classLoader.hpp" -@@ -3967,6 +3973,8 @@ +@@ -4060,6 +4066,8 @@ size_t os::Linux::find_large_page_size() { IA64_ONLY(256 * M) PPC_ONLY(4 * M) S390_ONLY(1 * M) @@ -104494,9 +104835,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_li SPARC_ONLY(4 * M); #endif // ZERO -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp +new file mode 100644 +index 000000000..30719a034 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -104522,13 +104865,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + * questions. + * + */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp 2023-11-01 09:34:25.597945382 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp +new file mode 100644 +index 000000000..8403e7838 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp @@ -0,0 +1,160 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -104647,7 +104992,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + " sc.w %[__cmp], %[__dest] \n\t" + " beqz %[__cmp], 1b \n\t" + "2: \n\t" -+ " dbar 0 \n\t" ++ " dbar 0x700 \n\t" + + : [__prev] "=&r" (__prev), [__cmp] "=&r" (__cmp) + : [__dest] "ZC" (*(volatile jint*)dest), [__old] "r" (compare_value), [__new] "r" (exchange_value) @@ -104675,7 +105020,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + " sc.d %[__cmp], %[__dest] \n\t" + " beqz %[__cmp], 1b \n\t" + "2: \n\t" -+ " dbar 0 \n\t" ++ " dbar 0x700 \n\t" + + : [__prev] "=&r" (__prev), [__cmp] "=&r" (__cmp) + : [__dest] "ZC" (*(volatile jlong*)dest), [__old] "r" (compare_value), [__new] "r" (exchange_value) @@ -104686,9 +105031,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + + +#endif // OS_CPU_LINUX_LOONGARCH_ATOMIC_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp +new file mode 100644 +index 000000000..c9f675bac +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -104727,9 +105074,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +inline u8 Bytes::swap_u8(u8 x) { return bswap_64(x); } + +#endif // OS_CPU_LINUX_LOONGARCH_BYTES_LINUX_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp +new file mode 100644 +index 000000000..826c1fe39 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -104856,9 +105205,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +} + +#endif // OS_CPU_LINUX_LOONGARCH_COPY_LINUX_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp +new file mode 100644 +index 000000000..0b5247aa0 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -104903,9 +105254,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_LOONGARCH_GLOBALS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s ---- openjdk/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s +new file mode 100644 +index 000000000..ebd73af0c +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s @@ -0,0 +1,25 @@ +# +# Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved. @@ -104932,9 +105285,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +# + + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp 2023-11-01 09:34:25.597945382 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp +new file mode 100644 +index 000000000..5429a1055 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -104969,27 +105324,29 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +// Included in orderAccess.hpp header file. + +// Implementation of class OrderAccess. -+#define inlasm_sync() if (os::is_ActiveCoresMP()) \ ++#define inlasm_sync(v) if (os::is_ActiveCoresMP()) \ + __asm__ __volatile__ ("nop" : : : "memory"); \ + else \ -+ __asm__ __volatile__ ("dbar 0" : : : "memory"); ++ __asm__ __volatile__ ("dbar %0" : :"K"(v) : "memory"); + -+inline void OrderAccess::loadload() { inlasm_sync(); } -+inline void OrderAccess::storestore() { inlasm_sync(); } -+inline void OrderAccess::loadstore() { inlasm_sync(); } -+inline void OrderAccess::storeload() { inlasm_sync(); } ++inline void OrderAccess::loadload() { inlasm_sync(0x15); } ++inline void OrderAccess::storestore() { inlasm_sync(0x1a); } ++inline void OrderAccess::loadstore() { inlasm_sync(0x16); } ++inline void OrderAccess::storeload() { inlasm_sync(0x19); } + -+inline void OrderAccess::acquire() { inlasm_sync(); } -+inline void OrderAccess::release() { inlasm_sync(); } -+inline void OrderAccess::fence() { inlasm_sync(); } ++inline void OrderAccess::acquire() { inlasm_sync(0x14); } ++inline void OrderAccess::release() { inlasm_sync(0x12); } ++inline void OrderAccess::fence() { inlasm_sync(0x10); } + + +#undef inlasm_sync + +#endif // OS_CPU_LINUX_LOONGARCH_ORDERACCESS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp 2023-11-01 09:34:25.597945382 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp +new file mode 100644 +index 000000000..cf5fff0d0 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp @@ -0,0 +1,710 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. @@ -105383,7 +105740,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +#endif + + // Handle signal from NativeJump::patch_verified_entry(). -+ if (sig == SIGILL & nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { ++ if (sig == SIGILL && nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { +#ifdef PRINT_SIGNAL_HANDLE + tty->print_cr("verified entry = %lx, sig=%d", nativeInstruction_at(pc), sig); +#endif @@ -105701,9 +106058,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +bool os::is_ActiveCoresMP() { + return UseActiveCoresMP && _initial_active_processor_count == 1; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp +new file mode 100644 +index 000000000..fa02f8ba2 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp @@ -0,0 +1,38 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -105743,9 +106102,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + static bool is_ActiveCoresMP(); + +#endif // OS_CPU_LINUX_LOONGARCH_OS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp +new file mode 100644 +index 000000000..cf3a59638 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -105803,13 +106164,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +} + +#endif // OS_CPU_LINUX_LOONGARCH_PREFETCH_LINUX_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp 2023-11-01 09:34:25.597945382 +0800 -@@ -0,0 +1,106 @@ +diff --git a/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp +new file mode 100644 +index 000000000..a1a9f181b +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp +@@ -0,0 +1,116 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -105843,6 +106206,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + _anchor.clear(); +} + ++frame JavaThread::pd_last_frame() { ++ assert(has_last_Java_frame(), "must have last_Java_sp() when suspended"); ++ if (_anchor.last_Java_pc() != NULL) { ++ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp(), _anchor.last_Java_pc()); ++ } else { ++ // This will pick up pc from sp ++ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp()); ++ } ++} ++ +// For Forte Analyzer AsyncGetCallTrace profiling support - thread is +// currently interrupted by SIGPROF +bool JavaThread::pd_get_top_frame_for_signal_handler(frame* fr_addr, @@ -105891,7 +106264,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + + frame ret_frame(ret_sp, ret_fp, addr.pc()); + if (!ret_frame.safe_for_sender(jt)) { -+#if COMPILER2 ++#ifdef COMPILER2 + // C2 and JVMCI use ebp as a general register see if NULL fp helps + frame ret_frame2(ret_sp, NULL, addr.pc()); + if (!ret_frame2.safe_for_sender(jt)) { @@ -105913,13 +106286,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +} + +void JavaThread::cache_global_variables() { } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp 2023-11-01 09:34:25.597945382 +0800 -@@ -0,0 +1,74 @@ +diff --git a/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp +new file mode 100644 +index 000000000..a3ac28ebd +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp +@@ -0,0 +1,66 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -105948,15 +106323,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + private: + void pd_initialize(); + -+ frame pd_last_frame() { -+ assert(has_last_Java_frame(), "must have last_Java_sp() when suspended"); -+ if (_anchor.last_Java_pc() != NULL) { -+ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp(), _anchor.last_Java_pc()); -+ } else { -+ // This will pick up pc from sp -+ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp()); -+ } -+ } ++ frame pd_last_frame(); + + public: + // Mutators are highly dangerous.... @@ -105991,9 +106358,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_LOONGARCH_VM_THREAD_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp +new file mode 100644 +index 000000000..a39cb79bb +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -106050,9 +106419,110 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_LOONGARCH_VMSTRUCTS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp +new file mode 100644 +index 000000000..edc148ef9 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp +@@ -0,0 +1,93 @@ ++/* ++ * Copyright (c) 2006, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "runtime/os.hpp" ++#include "runtime/vm_version.hpp" ++ ++#include ++#include ++ ++#ifndef HWCAP_LOONGARCH_LAM ++#define HWCAP_LOONGARCH_LAM (1 << 1) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_UAL ++#define HWCAP_LOONGARCH_UAL (1 << 2) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LSX ++#define HWCAP_LOONGARCH_LSX (1 << 4) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LASX ++#define HWCAP_LOONGARCH_LASX (1 << 5) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_COMPLEX ++#define HWCAP_LOONGARCH_COMPLEX (1 << 7) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_CRYPTO ++#define HWCAP_LOONGARCH_CRYPTO (1 << 8) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LBT_X86 ++#define HWCAP_LOONGARCH_LBT_X86 (1 << 10) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LBT_ARM ++#define HWCAP_LOONGARCH_LBT_ARM (1 << 11) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LBT_MIPS ++#define HWCAP_LOONGARCH_LBT_MIPS (1 << 12) ++#endif ++ ++void VM_Version::get_os_cpu_info() { ++ ++ uint64_t auxv = getauxval(AT_HWCAP); ++ ++ STATIC_ASSERT(CPU_LAM == HWCAP_LOONGARCH_LAM); ++ STATIC_ASSERT(CPU_UAL == HWCAP_LOONGARCH_UAL); ++ STATIC_ASSERT(CPU_LSX == HWCAP_LOONGARCH_LSX); ++ STATIC_ASSERT(CPU_LASX == HWCAP_LOONGARCH_LASX); ++ STATIC_ASSERT(CPU_COMPLEX == HWCAP_LOONGARCH_COMPLEX); ++ STATIC_ASSERT(CPU_CRYPTO == HWCAP_LOONGARCH_CRYPTO); ++ STATIC_ASSERT(CPU_LBT_X86 == HWCAP_LOONGARCH_LBT_X86); ++ STATIC_ASSERT(CPU_LBT_ARM == HWCAP_LOONGARCH_LBT_ARM); ++ STATIC_ASSERT(CPU_LBT_MIPS == HWCAP_LOONGARCH_LBT_MIPS); ++ ++ _features = auxv & ( ++ HWCAP_LOONGARCH_LAM | ++ HWCAP_LOONGARCH_UAL | ++ HWCAP_LOONGARCH_LSX | ++ HWCAP_LOONGARCH_LASX | ++ HWCAP_LOONGARCH_COMPLEX | ++ HWCAP_LOONGARCH_CRYPTO | ++ HWCAP_LOONGARCH_LBT_X86 | ++ HWCAP_LOONGARCH_LBT_ARM | ++ HWCAP_LOONGARCH_LBT_MIPS); ++} +diff --git a/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp +new file mode 100644 +index 000000000..30719a034 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -106078,9 +106548,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + * questions. + * + */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp +new file mode 100644 +index 000000000..cd7cecad6 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp @@ -0,0 +1,191 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -106273,9 +106745,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + + +#endif // OS_CPU_LINUX_MIPS_VM_ATOMIC_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp +new file mode 100644 +index 000000000..5b5cd10aa +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -106314,9 +106788,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +inline u8 Bytes::swap_u8(u8 x) { return bswap_64(x); } + +#endif // OS_CPU_LINUX_MIPS_VM_BYTES_LINUX_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp 2023-09-12 13:54:23.349571984 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp +new file mode 100644 +index 000000000..3fd6ef7b3 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -106443,9 +106919,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +} + +#endif // OS_CPU_LINUX_MIPS_VM_COPY_LINUX_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp +new file mode 100644 +index 000000000..f1599ac5f +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -106498,9 +106976,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_MIPS_VM_GLOBALS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/linux_mips.s jdk11u-ls/src/hotspot/os_cpu/linux_mips/linux_mips.s ---- openjdk/src/hotspot/os_cpu/linux_mips/linux_mips.s 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/linux_mips.s 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/linux_mips.s b/src/hotspot/os_cpu/linux_mips/linux_mips.s +new file mode 100644 +index 000000000..36c8d810c +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/linux_mips.s @@ -0,0 +1,25 @@ +# +# Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved. @@ -106527,9 +107007,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +# + + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp +new file mode 100644 +index 000000000..bf9d67973 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -106582,13 +107064,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#undef inlasm_sync + +#endif // OS_CPU_LINUX_MIPS_VM_ORDERACCESS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp 2023-11-01 09:34:25.597945382 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp +new file mode 100644 +index 000000000..d035d8edb +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp @@ -0,0 +1,1020 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -107009,7 +107493,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#endif + + // Handle signal from NativeJump::patch_verified_entry(). -+ if (sig == SIGILL & nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { ++ if (sig == SIGILL && nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { +#ifdef PRINT_SIGNAL_HANDLE + tty->print_cr("verified entry = %lx, sig=%d", nativeInstruction_at(pc), sig); +#endif @@ -107606,9 +108090,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +bool os::is_ActiveCoresMP() { + return UseActiveCoresMP && _initial_active_processor_count == 1; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp +new file mode 100644 +index 000000000..c07d08156 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp @@ -0,0 +1,39 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -107649,9 +108135,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + static bool is_ActiveCoresMP(); + +#endif // OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp +new file mode 100644 +index 000000000..93490345f +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -107711,13 +108199,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +} + +#endif // OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp 2023-11-01 09:34:25.597945382 +0800 -@@ -0,0 +1,106 @@ +diff --git a/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp +new file mode 100644 +index 000000000..dbe8efe16 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp +@@ -0,0 +1,117 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -107741,6 +108231,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + */ + +#include "precompiled.hpp" ++#include "compiler/compileBroker.hpp" +#include "memory/metaspaceShared.hpp" +#include "runtime/frame.inline.hpp" +#include "runtime/thread.inline.hpp" @@ -107751,6 +108242,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + _anchor.clear(); +} + ++frame JavaThread::pd_last_frame() { ++ assert(has_last_Java_frame(), "must have last_Java_sp() when suspended"); ++ if (_anchor.last_Java_pc() != NULL) { ++ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp(), _anchor.last_Java_pc()); ++ } else { ++ // This will pick up pc from sp ++ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp()); ++ } ++} ++ +// For Forte Analyzer AsyncGetCallTrace profiling support - thread is +// currently interrupted by SIGPROF +bool JavaThread::pd_get_top_frame_for_signal_handler(frame* fr_addr, @@ -107799,7 +108300,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + + frame ret_frame(ret_sp, ret_fp, addr.pc()); + if (!ret_frame.safe_for_sender(jt)) { -+#if COMPILER2 ++#ifdef COMPILER2 + // C2 and JVMCI use ebp as a general register see if NULL fp helps + frame ret_frame2(ret_sp, NULL, addr.pc()); + if (!ret_frame2.safe_for_sender(jt)) { @@ -107821,13 +108322,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +} + +void JavaThread::cache_global_variables() { } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp 2023-11-01 09:34:25.597945382 +0800 -@@ -0,0 +1,74 @@ +diff --git a/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp +new file mode 100644 +index 000000000..8b8dbe219 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp +@@ -0,0 +1,66 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -107856,15 +108359,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + private: + void pd_initialize(); + -+ frame pd_last_frame() { -+ assert(has_last_Java_frame(), "must have last_Java_sp() when suspended"); -+ if (_anchor.last_Java_pc() != NULL) { -+ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp(), _anchor.last_Java_pc()); -+ } else { -+ // This will pick up pc from sp -+ return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp()); -+ } -+ } ++ frame pd_last_frame(); + + public: + // Mutators are highly dangerous.... @@ -107899,9 +108394,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_MIPS_VM_THREAD_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp +new file mode 100644 +index 000000000..b7454bf04 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -107958,9 +108455,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_MIPS_VM_VMSTRUCTS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp jdk11u-ls/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp 2023-09-12 13:54:23.353571989 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp +new file mode 100644 +index 000000000..93e4bea04 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. @@ -107990,45 +108489,71 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#include "precompiled.hpp" +#include "runtime/os.hpp" +#include "runtime/vm_version.hpp" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp jdk11u-ls/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp ---- openjdk/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp 2023-09-12 13:54:23.353571989 +0800 -@@ -85,4 +85,6 @@ +diff --git a/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp b/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp +index 2b0fa83c1..270e0bc18 100644 +--- a/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp ++++ b/src/hotspot/os_cpu/linux_x86/gc/z/zGlobals_linux_x86.hpp +@@ -85,4 +85,6 @@ const uintptr_t ZPlatformAddressSpaceSize = ((uintptr_t)1 << ZPlatformAddres const size_t ZPlatformCacheLineSize = 64; +const bool ZPlatformLoadBarrierTestResultInRegister = false; + #endif // OS_CPU_LINUX_X86_ZGLOBALS_LINUX_X86_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/asm/codeBuffer.cpp jdk11u-ls/src/hotspot/share/asm/codeBuffer.cpp ---- openjdk/src/hotspot/share/asm/codeBuffer.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/asm/codeBuffer.cpp 2023-11-01 09:34:25.601945387 +0800 -@@ -351,6 +351,9 @@ +diff --git a/src/hotspot/share/adlc/formssel.cpp b/src/hotspot/share/adlc/formssel.cpp +index f810fde76..90f733cdf 100644 +--- a/src/hotspot/share/adlc/formssel.cpp ++++ b/src/hotspot/share/adlc/formssel.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + // FORMS.CPP - Definitions for ADL Parser Forms Classes + #include "adlc.hpp" + +@@ -4109,6 +4115,7 @@ bool MatchRule::is_ideal_membar() const { + !strcmp(_opType,"MemBarVolatile") || + !strcmp(_opType,"MemBarCPUOrder") || + !strcmp(_opType,"MemBarStoreStore") || ++ !strcmp(_opType,"SameAddrLoadFence" ) || + !strcmp(_opType,"OnSpinWait"); + } + +diff --git a/src/hotspot/share/asm/codeBuffer.cpp b/src/hotspot/share/asm/codeBuffer.cpp +index 4912f8805..a420f7807 100644 +--- a/src/hotspot/share/asm/codeBuffer.cpp ++++ b/src/hotspot/share/asm/codeBuffer.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023. These ++ * modifications are Copyright (c) 2018, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "asm/codeBuffer.hpp" + #include "compiler/disassembler.hpp" +@@ -351,6 +357,7 @@ void CodeSection::relocate(address at, RelocationHolder const& spec, int format) assert(rtype == relocInfo::none || rtype == relocInfo::runtime_call_type || rtype == relocInfo::internal_word_type|| -+#ifdef MIPS -+ rtype == relocInfo::internal_pc_type || -+#endif ++ NOT_ZERO(MIPS64_ONLY(rtype == relocInfo::internal_pc_type ||)) rtype == relocInfo::section_word_type || rtype == relocInfo::external_word_type, "code needs relocation information"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/asm/codeBuffer.hpp jdk11u-ls/src/hotspot/share/asm/codeBuffer.hpp ---- openjdk/src/hotspot/share/asm/codeBuffer.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/asm/codeBuffer.hpp 2023-09-12 13:54:23.389572035 +0800 -@@ -403,6 +403,9 @@ - #if INCLUDE_AOT - _immutable_PIC = false; - #endif -+#if defined(MIPS) && !defined(ZERO) -+ _continuous_load_instuctions_count = 0; -+#endif - } - - void initialize(address code_start, csize_t code_size) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_Compiler.cpp jdk11u-ls/src/hotspot/share/c1/c1_Compiler.cpp ---- openjdk/src/hotspot/share/c1/c1_Compiler.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_Compiler.cpp 2023-09-12 13:54:23.397572045 +0800 +diff --git a/src/hotspot/share/c1/c1_Compiler.cpp b/src/hotspot/share/c1/c1_Compiler.cpp +index aff12954b..caa93fc80 100644 +--- a/src/hotspot/share/c1/c1_Compiler.cpp ++++ b/src/hotspot/share/c1/c1_Compiler.cpp @@ -44,6 +44,12 @@ #include "utilities/bitMap.inline.hpp" #include "utilities/macros.hpp" @@ -108042,7 +108567,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_Co Compiler::Compiler() : AbstractCompiler(compiler_c1) { } -@@ -211,7 +217,7 @@ +@@ -211,7 +217,7 @@ bool Compiler::is_intrinsic_supported(const methodHandle& method) { case vmIntrinsics::_updateCRC32: case vmIntrinsics::_updateBytesCRC32: case vmIntrinsics::_updateByteBufferCRC32: @@ -108051,181 +108576,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_Co case vmIntrinsics::_updateBytesCRC32C: case vmIntrinsics::_updateDirectByteBufferCRC32C: #endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LinearScan.cpp jdk11u-ls/src/hotspot/share/c1/c1_LinearScan.cpp ---- openjdk/src/hotspot/share/c1/c1_LinearScan.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LinearScan.cpp 2023-11-01 09:34:25.621945409 +0800 -@@ -35,6 +35,12 @@ - #include "runtime/timerTrace.hpp" - #include "utilities/bitMap.inline.hpp" - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #ifndef PRODUCT - - static LinearScanStatistic _stat_before_alloc; -@@ -1258,6 +1264,23 @@ - } - break; - } -+ case lir_cmp_cmove: { -+ assert(op->as_Op4() != NULL, "lir_cmp_cmove must be LIR_Op4"); -+ LIR_Op4* cmove = (LIR_Op4*)op; -+ -+ LIR_Opr move_from = cmove->in_opr3(); -+ LIR_Opr move_to = cmove->result_opr(); -+ -+ if (move_to->is_register() && move_from->is_register()) { -+ Interval* from = interval_at(reg_num(move_from)); -+ Interval* to = interval_at(reg_num(move_to)); -+ if (from != NULL && to != NULL) { -+ to->set_register_hint(from); -+ TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num())); -+ } -+ } -+ break; -+ } - default: - break; - } -@@ -3342,7 +3365,9 @@ - check_live = (move->patch_code() == lir_patch_none); - } - LIR_OpBranch* branch = op->as_OpBranch(); -- if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) { -+ LIR_OpCmpBranch* cmp_branch = op->as_OpCmpBranch(); -+ if ((branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) || -+ (cmp_branch != NULL && cmp_branch->stub() != NULL && cmp_branch->stub()->is_exception_throw_stub())) { - // Don't bother checking the stub in this case since the - // exception stub will never return to normal control flow. - check_live = false; -@@ -6198,6 +6223,16 @@ - if (branch->ublock() == target_from) { - branch->change_ublock(target_to); - } -+ } else if (op->code() == lir_cmp_branch || op->code() == lir_cmp_float_branch) { -+ assert(op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); -+ LIR_OpCmpBranch* branch = (LIR_OpCmpBranch*)op; -+ -+ if (branch->block() == target_from) { -+ branch->change_block(target_to); -+ } -+ if (branch->ublock() == target_from) { -+ branch->change_ublock(target_to); -+ } - } - } - } -@@ -6320,6 +6355,20 @@ - } - } - } -+ } else if (prev_op->code() == lir_cmp_branch || prev_op->code() == lir_cmp_float_branch) { -+ assert(prev_op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); -+ LIR_OpCmpBranch* prev_branch = (LIR_OpCmpBranch*)prev_op; -+ -+ if (prev_branch->stub() == NULL) { -+ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) { -+ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); -+ -+ // eliminate a conditional branch to the immediate successor -+ prev_branch->change_block(last_branch->block()); -+ prev_branch->negate_cond(); -+ instructions->trunc_to(instructions->length() - 1); -+ } -+ } - } - } - } -@@ -6395,6 +6444,13 @@ - assert(op_branch->block() == NULL || code->find(op_branch->block()) != -1, "branch target not valid"); - assert(op_branch->ublock() == NULL || code->find(op_branch->ublock()) != -1, "branch target not valid"); - } -+ -+ LIR_OpCmpBranch* op_cmp_branch = instructions->at(j)->as_OpCmpBranch(); -+ -+ if (op_cmp_branch != NULL) { -+ assert(op_cmp_branch->block() == NULL || code->find(op_cmp_branch->block()) != -1, "branch target not valid"); -+ assert(op_cmp_branch->ublock() == NULL || code->find(op_cmp_branch->ublock()) != -1, "branch target not valid"); -+ } - } - - for (j = 0; j < block->number_of_sux() - 1; j++) { -@@ -6639,6 +6695,24 @@ - break; - } - -+ case lir_cmp_branch: -+ case lir_cmp_float_branch: { -+ LIR_OpCmpBranch* branch = op->as_OpCmpBranch(); -+ if (branch->block() == NULL) { -+ inc_counter(counter_stub_branch); -+ } else { -+ inc_counter(counter_cond_branch); -+ } -+ inc_counter(counter_cmp); -+ break; -+ } -+ -+ case lir_cmp_cmove: { -+ inc_counter(counter_misc_inst); -+ inc_counter(counter_cmp); -+ break; -+ } -+ - case lir_neg: - case lir_add: - case lir_sub: -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRAssembler.cpp jdk11u-ls/src/hotspot/share/c1/c1_LIRAssembler.cpp ---- openjdk/src/hotspot/share/c1/c1_LIRAssembler.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LIRAssembler.cpp 2023-09-12 13:54:23.413572065 +0800 -@@ -777,6 +777,18 @@ - } - - -+void LIR_Assembler::emit_op4(LIR_Op4* op) { -+ switch (op->code()) { -+ case lir_cmp_cmove: -+ cmp_cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->in_opr3(), op->in_opr4(), op->result_opr(), op->type()); -+ break; -+ -+ default: -+ Unimplemented(); -+ break; -+ } -+} -+ - void LIR_Assembler::build_frame() { - _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRAssembler.hpp jdk11u-ls/src/hotspot/share/c1/c1_LIRAssembler.hpp ---- openjdk/src/hotspot/share/c1/c1_LIRAssembler.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LIRAssembler.hpp 2023-09-12 13:54:23.417572070 +0800 -@@ -190,7 +190,9 @@ - void emit_op1(LIR_Op1* op); - void emit_op2(LIR_Op2* op); - void emit_op3(LIR_Op3* op); -+ void emit_op4(LIR_Op4* op); - void emit_opBranch(LIR_OpBranch* op); -+ void emit_opCmpBranch(LIR_OpCmpBranch* op); - void emit_opLabel(LIR_OpLabel* op); - void emit_arraycopy(LIR_OpArrayCopy* op); - void emit_updatecrc32(LIR_OpUpdateCRC32* op); -@@ -223,6 +225,7 @@ - void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions - void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); - void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type); -+ void cmp_cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type); - - void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); - void ic_call( LIR_OpJavaCall* op); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIR.cpp jdk11u-ls/src/hotspot/share/c1/c1_LIR.cpp ---- openjdk/src/hotspot/share/c1/c1_LIR.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LIR.cpp 2023-11-01 09:34:25.613945400 +0800 -@@ -250,6 +250,18 @@ +diff --git a/src/hotspot/share/c1/c1_LIR.cpp b/src/hotspot/share/c1/c1_LIR.cpp +index e30d39f73..7461b7449 100644 +--- a/src/hotspot/share/c1/c1_LIR.cpp ++++ b/src/hotspot/share/c1/c1_LIR.cpp +@@ -250,6 +250,18 @@ void LIR_Op2::verify() const { #endif } @@ -108244,7 +108599,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) -@@ -308,6 +320,56 @@ +@@ -308,6 +320,56 @@ void LIR_OpBranch::negate_cond() { } @@ -108301,7 +108656,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, -@@ -509,10 +571,7 @@ +@@ -509,10 +571,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) { assert(opConvert->_info == NULL, "must be"); if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); if (opConvert->_result->is_valid()) do_output(opConvert->_result); @@ -108313,7 +108668,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI do_stub(opConvert->_stub); break; -@@ -611,6 +670,25 @@ +@@ -611,6 +670,25 @@ void LIR_OpVisitState::visit(LIR_Op* op) { break; } @@ -108339,7 +108694,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI // special handling for cmove: right input operand must not be equal // to the result operand, otherwise the backend fails case lir_cmove: -@@ -711,6 +789,29 @@ +@@ -711,6 +789,29 @@ void LIR_OpVisitState::visit(LIR_Op* op) { break; } @@ -108369,7 +108724,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI // LIR_OpJavaCall case lir_static_call: case lir_optvirtual_call: -@@ -1028,6 +1129,13 @@ +@@ -1028,6 +1129,13 @@ void LIR_Op2::emit_code(LIR_Assembler* masm) { masm->emit_op2(this); } @@ -108383,7 +108738,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { masm->emit_alloc_array(this); masm->append_code_stub(stub()); -@@ -1048,6 +1156,10 @@ +@@ -1048,6 +1156,10 @@ void LIR_Op3::emit_code(LIR_Assembler* masm) { masm->emit_op3(this); } @@ -108394,7 +108749,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI void LIR_OpLock::emit_code(LIR_Assembler* masm) { masm->emit_lock(this); if (stub()) { -@@ -1424,8 +1536,7 @@ +@@ -1424,8 +1536,7 @@ void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_nu if (deoptimize_on_null) { // Emit an explicit null check and deoptimize if opr is null CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); @@ -108404,7 +108759,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } else { // Emit an implicit null check append(new LIR_Op1(lir_null_check, opr, info)); -@@ -1680,6 +1791,8 @@ +@@ -1680,6 +1791,8 @@ const char * LIR_Op::name() const { case lir_cmp_l2i: s = "cmp_l2i"; break; case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; case lir_cmp_fd2i: s = "comp_fd2i"; break; @@ -108413,7 +108768,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI case lir_cmove: s = "cmove"; break; case lir_add: s = "add"; break; case lir_sub: s = "sub"; break; -@@ -1705,6 +1818,8 @@ +@@ -1705,6 +1818,8 @@ const char * LIR_Op::name() const { case lir_irem: s = "irem"; break; case lir_fmad: s = "fmad"; break; case lir_fmaf: s = "fmaf"; break; @@ -108422,7 +108777,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI // LIR_OpJavaCall case lir_static_call: s = "static"; break; case lir_optvirtual_call: s = "optvirtual"; break; -@@ -1856,6 +1971,26 @@ +@@ -1856,6 +1971,26 @@ void LIR_OpBranch::print_instr(outputStream* out) const { } } @@ -108449,7 +108804,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { switch(cond) { case lir_cond_equal: out->print("[EQ]"); break; -@@ -1876,12 +2011,7 @@ +@@ -1876,12 +2011,9 @@ void LIR_OpConvert::print_instr(outputStream* out) const { print_bytecode(out, bytecode()); in_opr()->print(out); out->print(" "); result_opr()->print(out); out->print(" "); @@ -108457,17 +108812,17 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI - if(tmp1()->is_valid()) { - tmp1()->print(out); out->print(" "); - tmp2()->print(out); out->print(" "); -- } ++ if(tmp()->is_valid()) { ++ tmp()->print(out); out->print(" "); + } -#endif -+ if(tmp()->is_valid()) tmp()->print(out); out->print(" "); } void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { -@@ -1978,6 +2108,19 @@ - result_opr()->print(out); +@@ -1979,6 +2111,19 @@ void LIR_Op3::print_instr(outputStream* out) const { } -+ + +// LIR_Op4 +void LIR_Op4::print_instr(outputStream* out) const { + if (code() == lir_cmp_cmove) { @@ -108480,32 +108835,321 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI + result_opr()->print(out); +} + - ++ void LIR_OpLock::print_instr(outputStream* out) const { hdr_opr()->print(out); out->print(" "); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRGenerator.cpp jdk11u-ls/src/hotspot/share/c1/c1_LIRGenerator.cpp ---- openjdk/src/hotspot/share/c1/c1_LIRGenerator.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LIRGenerator.cpp 2023-09-12 13:54:23.417572070 +0800 -@@ -479,13 +479,11 @@ + obj_opr()->print(out); out->print(" "); +diff --git a/src/hotspot/share/c1/c1_LIR.hpp b/src/hotspot/share/c1/c1_LIR.hpp +index 3234ca018..1f46e44c7 100644 +--- a/src/hotspot/share/c1/c1_LIR.hpp ++++ b/src/hotspot/share/c1/c1_LIR.hpp +@@ -864,9 +864,11 @@ class LIR_OpConvert; + class LIR_OpAllocObj; + class LIR_OpRoundFP; + class LIR_Op2; ++class LIR_OpCmpBranch; + class LIR_OpDelay; + class LIR_Op3; + class LIR_OpAllocArray; ++class LIR_Op4; + class LIR_OpCall; + class LIR_OpJavaCall; + class LIR_OpRTCall; +@@ -933,6 +935,8 @@ enum LIR_Code { + , lir_cmp_l2i + , lir_ucmp_fd2i + , lir_cmp_fd2i ++ , lir_cmp_branch ++ , lir_cmp_float_branch + , lir_cmove + , lir_add + , lir_sub +@@ -964,6 +968,9 @@ enum LIR_Code { + , lir_fmad + , lir_fmaf + , end_op3 ++ , begin_op4 ++ , lir_cmp_cmove ++ , end_op4 + , begin_opJavaCall + , lir_static_call + , lir_optvirtual_call +@@ -1128,12 +1135,14 @@ class LIR_Op: public CompilationResourceObj { + virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } + virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } + virtual LIR_OpBranch* as_OpBranch() { return NULL; } ++ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return NULL; } + virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } + virtual LIR_OpConvert* as_OpConvert() { return NULL; } + virtual LIR_Op0* as_Op0() { return NULL; } + virtual LIR_Op1* as_Op1() { return NULL; } + virtual LIR_Op2* as_Op2() { return NULL; } + virtual LIR_Op3* as_Op3() { return NULL; } ++ virtual LIR_Op4* as_Op4() { return NULL; } + virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } + virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } + virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } +@@ -1463,15 +1472,18 @@ class LIR_OpConvert: public LIR_Op1 { + private: + Bytecodes::Code _bytecode; + ConversionStub* _stub; ++ LIR_Opr _tmp; + + public: +- LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) ++ LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub, LIR_Opr tmp) + : LIR_Op1(lir_convert, opr, result) + , _stub(stub) +- , _bytecode(code) {} ++ , _bytecode(code) ++ , _tmp(tmp) {} + + Bytecodes::Code bytecode() const { return _bytecode; } + ConversionStub* stub() const { return _stub; } ++ LIR_Opr tmp() const { return _tmp; } + + virtual void emit_code(LIR_Assembler* masm); + virtual LIR_OpConvert* as_OpConvert() { return this; } +@@ -1626,7 +1638,7 @@ class LIR_Op2: public LIR_Op { + , _tmp3(LIR_OprFact::illegalOpr) + , _tmp4(LIR_OprFact::illegalOpr) + , _tmp5(LIR_OprFact::illegalOpr) { +- assert(code == lir_cmp || code == lir_assert, "code check"); ++ assert(code == lir_cmp || code == lir_cmp_branch || code == lir_cmp_float_branch || code == lir_assert, "code check"); + } + + LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) +@@ -1658,7 +1670,7 @@ class LIR_Op2: public LIR_Op { + , _tmp3(LIR_OprFact::illegalOpr) + , _tmp4(LIR_OprFact::illegalOpr) + , _tmp5(LIR_OprFact::illegalOpr) { +- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); ++ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); + } + + LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, +@@ -1674,7 +1686,7 @@ class LIR_Op2: public LIR_Op { + , _tmp3(tmp3) + , _tmp4(tmp4) + , _tmp5(tmp5) { +- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); ++ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); + } + + LIR_Opr in_opr1() const { return _opr1; } +@@ -1686,10 +1698,12 @@ class LIR_Op2: public LIR_Op { + LIR_Opr tmp4_opr() const { return _tmp4; } + LIR_Opr tmp5_opr() const { return _tmp5; } + LIR_Condition condition() const { +- assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; ++ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); ++ return _condition; + } + void set_condition(LIR_Condition condition) { +- assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; ++ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove, "only valid for cmp and cmove"); ++ _condition = condition; + } + + void set_fpu_stack_size(int size) { _fpu_stack_size = size; } +@@ -1703,6 +1717,43 @@ class LIR_Op2: public LIR_Op { + virtual void print_instr(outputStream* out) const PRODUCT_RETURN; + }; + ++class LIR_OpCmpBranch: public LIR_Op2 { ++ friend class LIR_OpVisitState; ++ ++ private: ++ Label* _label; ++ BlockBegin* _block; // if this is a branch to a block, this is the block ++ BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block ++ CodeStub* _stub; // if this is a branch to a stub, this is the stub ++ ++ public: ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl, CodeEmitInfo* info = NULL) ++ : LIR_Op2(lir_cmp_branch, cond, left, right, info) ++ , _label(lbl) ++ , _block(NULL) ++ , _ublock(NULL) ++ , _stub(NULL) { } ++ ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeStub* stub, CodeEmitInfo* info = NULL); ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, CodeEmitInfo* info = NULL); ++ ++ // for unordered comparisons ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* ublock, CodeEmitInfo* info = NULL); ++ ++ Label* label() const { return _label; } ++ BlockBegin* block() const { return _block; } ++ BlockBegin* ublock() const { return _ublock; } ++ CodeStub* stub() const { return _stub; } ++ ++ void change_block(BlockBegin* b); ++ void change_ublock(BlockBegin* b); ++ void negate_cond(); ++ ++ virtual void emit_code(LIR_Assembler* masm); ++ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return this; } ++ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; ++}; ++ + class LIR_OpAllocArray : public LIR_Op { + friend class LIR_OpVisitState; + +@@ -1767,6 +1818,48 @@ class LIR_Op3: public LIR_Op { + }; + + ++class LIR_Op4: public LIR_Op { ++ friend class LIR_OpVisitState; ++ ++ private: ++ LIR_Opr _opr1; ++ LIR_Opr _opr2; ++ LIR_Opr _opr3; ++ LIR_Opr _opr4; ++ BasicType _type; ++ LIR_Condition _condition; ++ ++ void verify() const; ++ ++ public: ++ LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type) ++ : LIR_Op(code, result, NULL) ++ , _opr1(opr1) ++ , _opr2(opr2) ++ , _opr3(opr3) ++ , _opr4(opr4) ++ , _type(type) ++ , _condition(condition) { ++ assert(is_in_range(code, begin_op4, end_op4), "code check"); ++ assert(type != T_ILLEGAL, "cmove should have type"); ++ } ++ LIR_Opr in_opr1() const { return _opr1; } ++ LIR_Opr in_opr2() const { return _opr2; } ++ LIR_Opr in_opr3() const { return _opr3; } ++ LIR_Opr in_opr4() const { return _opr4; } ++ BasicType type() const { return _type; } ++ LIR_Condition condition() const { ++ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); return _condition; ++ } ++ void set_condition(LIR_Condition condition) { ++ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); _condition = condition; ++ } ++ ++ virtual void emit_code(LIR_Assembler* masm); ++ virtual LIR_Op4* as_Op4() { return this; } ++ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; ++}; ++ + //-------------------------------- + class LabelObj: public CompilationResourceObj { + private: +@@ -2115,7 +2208,9 @@ class LIR_List: public CompilationResourceObj { + + void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } + +- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } ++ void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL, LIR_Opr tmp = LIR_OprFact::illegalOpr) { ++ append(new LIR_OpConvert(code, left, dst, stub, tmp)); ++ } + + void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } + void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } +@@ -2146,6 +2241,15 @@ class LIR_List: public CompilationResourceObj { + cmp(condition, left, LIR_OprFact::intConst(right), info); + } + ++ // machine dependent ++ template ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info = NULL); ++ template ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, int right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { ++ cmp_branch(condition, left, LIR_OprFact::intConst(right), type, tgt, info); ++ } ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered); ++ + void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); + void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); + +@@ -2153,6 +2257,9 @@ class LIR_List: public CompilationResourceObj { + append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); + } + ++ // machine dependent ++ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type); ++ + void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, + LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); + void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, +diff --git a/src/hotspot/share/c1/c1_LIRAssembler.cpp b/src/hotspot/share/c1/c1_LIRAssembler.cpp +index 160483d5f..bec297ebd 100644 +--- a/src/hotspot/share/c1/c1_LIRAssembler.cpp ++++ b/src/hotspot/share/c1/c1_LIRAssembler.cpp +@@ -777,6 +777,18 @@ void LIR_Assembler::emit_op2(LIR_Op2* op) { + } + + ++void LIR_Assembler::emit_op4(LIR_Op4* op) { ++ switch (op->code()) { ++ case lir_cmp_cmove: ++ cmp_cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->in_opr3(), op->in_opr4(), op->result_opr(), op->type()); ++ break; ++ ++ default: ++ Unimplemented(); ++ break; ++ } ++} ++ + void LIR_Assembler::build_frame() { + _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); + } +diff --git a/src/hotspot/share/c1/c1_LIRAssembler.hpp b/src/hotspot/share/c1/c1_LIRAssembler.hpp +index 44a5bcbe5..114b155f9 100644 +--- a/src/hotspot/share/c1/c1_LIRAssembler.hpp ++++ b/src/hotspot/share/c1/c1_LIRAssembler.hpp +@@ -190,7 +190,9 @@ class LIR_Assembler: public CompilationResourceObj { + void emit_op1(LIR_Op1* op); + void emit_op2(LIR_Op2* op); + void emit_op3(LIR_Op3* op); ++ void emit_op4(LIR_Op4* op); + void emit_opBranch(LIR_OpBranch* op); ++ void emit_opCmpBranch(LIR_OpCmpBranch* op); + void emit_opLabel(LIR_OpLabel* op); + void emit_arraycopy(LIR_OpArrayCopy* op); + void emit_updatecrc32(LIR_OpUpdateCRC32* op); +@@ -223,6 +225,7 @@ class LIR_Assembler: public CompilationResourceObj { + void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions + void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); + void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type); ++ void cmp_cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type); + + void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); + void ic_call( LIR_OpJavaCall* op); +diff --git a/src/hotspot/share/c1/c1_LIRGenerator.cpp b/src/hotspot/share/c1/c1_LIRGenerator.cpp +index 88f6d3069..1d5a6668e 100644 +--- a/src/hotspot/share/c1/c1_LIRGenerator.cpp ++++ b/src/hotspot/share/c1/c1_LIRGenerator.cpp +@@ -480,13 +480,11 @@ void LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index, CodeEmitInfo* null_check_info, CodeEmitInfo* range_check_info) { CodeStub* stub = new RangeCheckStub(range_check_info, index, array); if (index->is_constant()) { - cmp_mem_int(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), - index->as_jint(), null_check_info); - __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch -- } else { ++ cmp_mem_int_branch(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), ++ index->as_jint(), stub, null_check_info); // forward branch + } else { - cmp_reg_mem(lir_cond_aboveEqual, index, array, - arrayOopDesc::length_offset_in_bytes(), T_INT, null_check_info); - __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch -+ cmp_mem_int_branch(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), -+ index->as_jint(), stub, null_check_info); // forward branch -+ } else { + cmp_reg_mem_branch(lir_cond_aboveEqual, index, array, arrayOopDesc::length_offset_in_bytes(), + T_INT, stub, null_check_info); // forward branch } } -@@ -493,12 +491,11 @@ +@@ -494,12 +492,11 @@ void LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index, void LIRGenerator::nio_range_check(LIR_Opr buffer, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) { CodeStub* stub = new RangeCheckStub(info, index); if (index->is_constant()) { @@ -108522,7 +109166,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } __ move(index, result); } -@@ -934,7 +931,7 @@ +@@ -935,7 +932,7 @@ LIR_Opr LIRGenerator::force_to_spill(LIR_Opr value, BasicType t) { return tmp; } @@ -108531,7 +109175,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI if (if_instr->should_profile()) { ciMethod* method = if_instr->profiled_method(); assert(method != NULL, "method should be set if branch is profiled"); -@@ -955,10 +952,17 @@ +@@ -956,10 +953,17 @@ void LIRGenerator::profile_branch(If* if_instr, If::Condition cond) { __ metadata2reg(md->constant_encoding(), md_reg); LIR_Opr data_offset_reg = new_pointer_register(); @@ -108553,7 +109197,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI // MDO cells are intptr_t, so the data_reg width is arch-dependent. LIR_Opr data_reg = new_pointer_register(); -@@ -1315,8 +1319,8 @@ +@@ -1316,8 +1320,8 @@ void LIRGenerator::do_isPrimitive(Intrinsic* x) { } __ move(new LIR_Address(rcvr.result(), java_lang_Class::klass_offset_in_bytes(), T_ADDRESS), temp, info); @@ -108564,7 +109208,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } -@@ -1598,8 +1602,8 @@ +@@ -1599,8 +1603,8 @@ void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { if (GenerateRangeChecks && needs_range_check) { if (use_length) { @@ -108575,7 +109219,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } else { array_range_check(array.result(), index.result(), null_check_info, range_check_info); // range_check also does the null check -@@ -1777,12 +1781,9 @@ +@@ -1778,12 +1782,9 @@ void LIRGenerator::do_NIOCheckIndex(Intrinsic* x) { CodeEmitInfo* info = state_for(x); CodeStub* stub = new RangeCheckStub(info, index.result()); if (index.result()->is_constant()) { @@ -108590,7 +109234,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } __ move(index.result(), result); } else { -@@ -1860,8 +1861,8 @@ +@@ -1861,8 +1862,8 @@ void LIRGenerator::do_LoadIndexed(LoadIndexed* x) { } else if (use_length) { // TODO: use a (modified) version of array_range_check that does not require a // constant length to be loaded to a register @@ -108601,7 +109245,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } else { array_range_check(array.result(), index.result(), null_check_info, range_check_info); // The range check performs the null check, so clear it out for the load -@@ -2234,19 +2235,14 @@ +@@ -2235,19 +2236,14 @@ void LIRGenerator::do_SwitchRanges(SwitchRangeArray* x, LIR_Opr value, BlockBegi int high_key = one_range->high_key(); BlockBegin* dest = one_range->sux(); if (low_key == high_key) { @@ -108626,7 +109270,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI __ branch_destination(L->label()); } } -@@ -2346,12 +2342,11 @@ +@@ -2347,12 +2343,11 @@ void LIRGenerator::do_TableSwitch(TableSwitch* x) { __ move(LIR_OprFact::intptrConst(default_count_offset), data_offset_reg); for (int i = 0; i < len; i++) { int count_offset = md->byte_offset_of_slot(data, MultiBranchData::case_count_offset(i)); @@ -108643,7 +109287,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } LIR_Opr data_reg = new_pointer_register(); -@@ -2365,8 +2360,7 @@ +@@ -2366,8 +2361,7 @@ void LIRGenerator::do_TableSwitch(TableSwitch* x) { do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux()); } else { for (int i = 0; i < len; i++) { @@ -108653,7 +109297,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } __ jump(x->default_sux()); } -@@ -2404,12 +2398,11 @@ +@@ -2405,12 +2399,11 @@ void LIRGenerator::do_LookupSwitch(LookupSwitch* x) { __ move(LIR_OprFact::intptrConst(default_count_offset), data_offset_reg); for (int i = 0; i < len; i++) { int count_offset = md->byte_offset_of_slot(data, MultiBranchData::case_count_offset(i)); @@ -108670,7 +109314,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } LIR_Opr data_reg = new_pointer_register(); -@@ -2424,8 +2417,7 @@ +@@ -2425,8 +2418,7 @@ void LIRGenerator::do_LookupSwitch(LookupSwitch* x) { } else { int len = x->length(); for (int i = 0; i < len; i++) { @@ -108680,7 +109324,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } __ jump(x->default_sux()); } -@@ -2935,8 +2927,8 @@ +@@ -2936,8 +2928,8 @@ void LIRGenerator::do_IfOp(IfOp* x) { f_val.dont_load_item(); LIR_Opr reg = rlock_result(x); @@ -108691,7 +109335,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } #ifdef JFR_HAVE_INTRINSICS -@@ -2980,8 +2972,7 @@ +@@ -2981,8 +2973,7 @@ void LIRGenerator::do_getEventWriter(Intrinsic* x) { __ move(LIR_OprFact::oopConst(NULL), result); LIR_Opr jobj = new_register(T_METADATA); __ move_wide(jobj_addr, jobj); @@ -108701,7 +109345,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI access_load(IN_NATIVE, T_OBJECT, LIR_OprFact::address(new LIR_Address(jobj, T_OBJECT)), result); -@@ -3286,21 +3277,24 @@ +@@ -3287,21 +3278,24 @@ void LIRGenerator::do_ProfileInvoke(ProfileInvoke* x) { void LIRGenerator::increment_backedge_counter_conditionally(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info, int left_bci, int right_bci, int bci) { if (compilation()->count_backedges()) { @@ -108732,7 +109376,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI increment_backedge_counter(info, step, bci); } } -@@ -3339,8 +3333,7 @@ +@@ -3340,8 +3334,7 @@ void LIRGenerator::decrement_age(CodeEmitInfo* info) { // DeoptimizeStub will reexecute from the current state in code info. CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_tenured, Deoptimization::Action_make_not_entrant); @@ -108742,7 +109386,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } } -@@ -3386,8 +3379,7 @@ +@@ -3387,8 +3380,7 @@ void LIRGenerator::increment_event_counter_impl(CodeEmitInfo* info, int freq = frequency << InvocationCounter::count_shift; if (freq == 0) { if (!step->is_constant()) { @@ -108752,7 +109396,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } else { __ branch(lir_cond_always, T_ILLEGAL, overflow); } -@@ -3395,12 +3387,11 @@ +@@ -3396,12 +3388,11 @@ void LIRGenerator::increment_event_counter_impl(CodeEmitInfo* info, LIR_Opr mask = load_immediate(freq, T_INT); if (!step->is_constant()) { // If step is 0, make sure the overflow check below always fails @@ -108768,7 +109412,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } __ branch_destination(overflow->continuation()); } -@@ -3513,8 +3504,7 @@ +@@ -3514,8 +3505,7 @@ void LIRGenerator::do_RangeCheckPredicate(RangeCheckPredicate *x) { CodeEmitInfo *info = state_for(x, x->state()); CodeStub* stub = new PredicateFailedStub(info); @@ -108778,7 +109422,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI } } -@@ -3661,8 +3651,8 @@ +@@ -3662,8 +3652,8 @@ LIR_Opr LIRGenerator::mask_boolean(LIR_Opr array, LIR_Opr value, CodeEmitInfo*& __ move(new LIR_Address(klass, in_bytes(Klass::layout_helper_offset()), T_INT), layout); int diffbit = Klass::layout_helper_boolean_diffbit(); __ logical_and(layout, LIR_OprFact::intConst(diffbit), layout); @@ -108789,10 +109433,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI value = value_fixed; return value; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRGenerator.hpp jdk11u-ls/src/hotspot/share/c1/c1_LIRGenerator.hpp ---- openjdk/src/hotspot/share/c1/c1_LIRGenerator.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LIRGenerator.hpp 2023-09-12 13:54:23.417572070 +0800 -@@ -363,8 +363,10 @@ +diff --git a/src/hotspot/share/c1/c1_LIRGenerator.hpp b/src/hotspot/share/c1/c1_LIRGenerator.hpp +index 3ad325d75..f377b2785 100644 +--- a/src/hotspot/share/c1/c1_LIRGenerator.hpp ++++ b/src/hotspot/share/c1/c1_LIRGenerator.hpp +@@ -363,8 +363,10 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure { void new_instance (LIR_Opr dst, ciInstanceKlass* klass, bool is_unresolved, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info); // machine dependent @@ -108805,7 +109450,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI void arraycopy_helper(Intrinsic* x, int* flags, ciArrayKlass** expected_type); -@@ -391,7 +393,7 @@ +@@ -391,7 +393,7 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure { LIR_Opr safepoint_poll_register(); @@ -108814,251 +109459,139 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI void increment_event_counter_impl(CodeEmitInfo* info, ciMethod *method, LIR_Opr step, int frequency, int bci, bool backedge, bool notify); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIR.hpp jdk11u-ls/src/hotspot/share/c1/c1_LIR.hpp ---- openjdk/src/hotspot/share/c1/c1_LIR.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/c1/c1_LIR.hpp 2023-09-12 13:54:23.413572065 +0800 -@@ -864,9 +864,11 @@ - class LIR_OpAllocObj; - class LIR_OpRoundFP; - class LIR_Op2; -+class LIR_OpCmpBranch; - class LIR_OpDelay; - class LIR_Op3; - class LIR_OpAllocArray; -+class LIR_Op4; - class LIR_OpCall; - class LIR_OpJavaCall; - class LIR_OpRTCall; -@@ -933,6 +935,8 @@ - , lir_cmp_l2i - , lir_ucmp_fd2i - , lir_cmp_fd2i -+ , lir_cmp_branch -+ , lir_cmp_float_branch - , lir_cmove - , lir_add - , lir_sub -@@ -964,6 +968,9 @@ - , lir_fmad - , lir_fmaf - , end_op3 -+ , begin_op4 -+ , lir_cmp_cmove -+ , end_op4 - , begin_opJavaCall - , lir_static_call - , lir_optvirtual_call -@@ -1128,12 +1135,14 @@ - virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } - virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } - virtual LIR_OpBranch* as_OpBranch() { return NULL; } -+ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return NULL; } - virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } - virtual LIR_OpConvert* as_OpConvert() { return NULL; } - virtual LIR_Op0* as_Op0() { return NULL; } - virtual LIR_Op1* as_Op1() { return NULL; } - virtual LIR_Op2* as_Op2() { return NULL; } - virtual LIR_Op3* as_Op3() { return NULL; } -+ virtual LIR_Op4* as_Op4() { return NULL; } - virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } - virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } - virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } -@@ -1463,15 +1472,18 @@ - private: - Bytecodes::Code _bytecode; - ConversionStub* _stub; -+ LIR_Opr _tmp; - - public: -- LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) -+ LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub, LIR_Opr tmp) - : LIR_Op1(lir_convert, opr, result) - , _stub(stub) -- , _bytecode(code) {} -+ , _bytecode(code) -+ , _tmp(tmp) {} - - Bytecodes::Code bytecode() const { return _bytecode; } - ConversionStub* stub() const { return _stub; } -+ LIR_Opr tmp() const { return _tmp; } - - virtual void emit_code(LIR_Assembler* masm); - virtual LIR_OpConvert* as_OpConvert() { return this; } -@@ -1626,7 +1638,7 @@ - , _tmp3(LIR_OprFact::illegalOpr) - , _tmp4(LIR_OprFact::illegalOpr) - , _tmp5(LIR_OprFact::illegalOpr) { -- assert(code == lir_cmp || code == lir_assert, "code check"); -+ assert(code == lir_cmp || code == lir_cmp_branch || code == lir_cmp_float_branch || code == lir_assert, "code check"); - } - - LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) -@@ -1658,7 +1670,7 @@ - , _tmp3(LIR_OprFact::illegalOpr) - , _tmp4(LIR_OprFact::illegalOpr) - , _tmp5(LIR_OprFact::illegalOpr) { -- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); -+ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); - } - - LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, -@@ -1674,7 +1686,7 @@ - , _tmp3(tmp3) - , _tmp4(tmp4) - , _tmp5(tmp5) { -- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); -+ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); - } - - LIR_Opr in_opr1() const { return _opr1; } -@@ -1686,10 +1698,12 @@ - LIR_Opr tmp4_opr() const { return _tmp4; } - LIR_Opr tmp5_opr() const { return _tmp5; } - LIR_Condition condition() const { -- assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; -+ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); -+ return _condition; - } - void set_condition(LIR_Condition condition) { -- assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; -+ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove, "only valid for cmp and cmove"); -+ _condition = condition; - } - - void set_fpu_stack_size(int size) { _fpu_stack_size = size; } -@@ -1703,6 +1717,43 @@ - virtual void print_instr(outputStream* out) const PRODUCT_RETURN; - }; +diff --git a/src/hotspot/share/c1/c1_LinearScan.cpp b/src/hotspot/share/c1/c1_LinearScan.cpp +index acc969ac9..163796561 100644 +--- a/src/hotspot/share/c1/c1_LinearScan.cpp ++++ b/src/hotspot/share/c1/c1_LinearScan.cpp +@@ -35,6 +35,12 @@ + #include "runtime/timerTrace.hpp" + #include "utilities/bitMap.inline.hpp" -+class LIR_OpCmpBranch: public LIR_Op2 { -+ friend class LIR_OpVisitState; ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ + -+ private: -+ Label* _label; -+ BlockBegin* _block; // if this is a branch to a block, this is the block -+ BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block -+ CodeStub* _stub; // if this is a branch to a stub, this is the stub + #ifndef PRODUCT + + static LinearScanStatistic _stat_before_alloc; +@@ -1258,6 +1264,23 @@ void LinearScan::add_register_hints(LIR_Op* op) { + } + break; + } ++ case lir_cmp_cmove: { ++ assert(op->as_Op4() != NULL, "lir_cmp_cmove must be LIR_Op4"); ++ LIR_Op4* cmove = (LIR_Op4*)op; + -+ public: -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl, CodeEmitInfo* info = NULL) -+ : LIR_Op2(lir_cmp_branch, cond, left, right, info) -+ , _label(lbl) -+ , _block(NULL) -+ , _ublock(NULL) -+ , _stub(NULL) { } ++ LIR_Opr move_from = cmove->in_opr3(); ++ LIR_Opr move_to = cmove->result_opr(); + -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeStub* stub, CodeEmitInfo* info = NULL); -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, CodeEmitInfo* info = NULL); ++ if (move_to->is_register() && move_from->is_register()) { ++ Interval* from = interval_at(reg_num(move_from)); ++ Interval* to = interval_at(reg_num(move_to)); ++ if (from != NULL && to != NULL) { ++ to->set_register_hint(from); ++ TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num())); ++ } ++ } ++ break; ++ } + default: + break; + } +@@ -3350,7 +3373,9 @@ void LinearScan::verify_no_oops_in_fixed_intervals() { + check_live = (move->patch_code() == lir_patch_none); + } + LIR_OpBranch* branch = op->as_OpBranch(); +- if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) { ++ LIR_OpCmpBranch* cmp_branch = op->as_OpCmpBranch(); ++ if ((branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) || ++ (cmp_branch != NULL && cmp_branch->stub() != NULL && cmp_branch->stub()->is_exception_throw_stub())) { + // Don't bother checking the stub in this case since the + // exception stub will never return to normal control flow. + check_live = false; +@@ -6200,6 +6225,16 @@ void ControlFlowOptimizer::substitute_branch_target(BlockBegin* block, BlockBegi + assert(op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch"); + LIR_OpBranch* branch = (LIR_OpBranch*)op; + ++ if (branch->block() == target_from) { ++ branch->change_block(target_to); ++ } ++ if (branch->ublock() == target_from) { ++ branch->change_ublock(target_to); ++ } ++ } else if (op->code() == lir_cmp_branch || op->code() == lir_cmp_float_branch) { ++ assert(op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); ++ LIR_OpCmpBranch* branch = (LIR_OpCmpBranch*)op; + -+ // for unordered comparisons -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* ublock, CodeEmitInfo* info = NULL); + if (branch->block() == target_from) { + branch->change_block(target_to); + } +@@ -6328,6 +6363,20 @@ void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { + } + } + } ++ } else if (prev_op->code() == lir_cmp_branch || prev_op->code() == lir_cmp_float_branch) { ++ assert(prev_op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); ++ LIR_OpCmpBranch* prev_branch = (LIR_OpCmpBranch*)prev_op; + -+ Label* label() const { return _label; } -+ BlockBegin* block() const { return _block; } -+ BlockBegin* ublock() const { return _ublock; } -+ CodeStub* stub() const { return _stub; } ++ if (prev_branch->stub() == NULL) { ++ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) { ++ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); + -+ void change_block(BlockBegin* b); -+ void change_ublock(BlockBegin* b); -+ void negate_cond(); ++ // eliminate a conditional branch to the immediate successor ++ prev_branch->change_block(last_branch->block()); ++ prev_branch->negate_cond(); ++ instructions->trunc_to(instructions->length() - 1); ++ } ++ } + } + } + } +@@ -6403,6 +6452,13 @@ void ControlFlowOptimizer::verify(BlockList* code) { + assert(op_branch->block() == NULL || code->find(op_branch->block()) != -1, "branch target not valid"); + assert(op_branch->ublock() == NULL || code->find(op_branch->ublock()) != -1, "branch target not valid"); + } + -+ virtual void emit_code(LIR_Assembler* masm); -+ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return this; } -+ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; -+}; ++ LIR_OpCmpBranch* op_cmp_branch = instructions->at(j)->as_OpCmpBranch(); + - class LIR_OpAllocArray : public LIR_Op { - friend class LIR_OpVisitState; - -@@ -1767,6 +1818,48 @@ - }; ++ if (op_cmp_branch != NULL) { ++ assert(op_cmp_branch->block() == NULL || code->find(op_cmp_branch->block()) != -1, "branch target not valid"); ++ assert(op_cmp_branch->ublock() == NULL || code->find(op_cmp_branch->ublock()) != -1, "branch target not valid"); ++ } + } + for (j = 0; j < block->number_of_sux() - 1; j++) { +@@ -6647,6 +6703,24 @@ void LinearScanStatistic::collect(LinearScan* allocator) { + break; + } -+class LIR_Op4: public LIR_Op { -+ friend class LIR_OpVisitState; -+ -+ private: -+ LIR_Opr _opr1; -+ LIR_Opr _opr2; -+ LIR_Opr _opr3; -+ LIR_Opr _opr4; -+ BasicType _type; -+ LIR_Condition _condition; -+ -+ void verify() const; ++ case lir_cmp_branch: ++ case lir_cmp_float_branch: { ++ LIR_OpCmpBranch* branch = op->as_OpCmpBranch(); ++ if (branch->block() == NULL) { ++ inc_counter(counter_stub_branch); ++ } else { ++ inc_counter(counter_cond_branch); ++ } ++ inc_counter(counter_cmp); ++ break; ++ } + -+ public: -+ LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type) -+ : LIR_Op(code, result, NULL) -+ , _opr1(opr1) -+ , _opr2(opr2) -+ , _opr3(opr3) -+ , _opr4(opr4) -+ , _type(type) -+ , _condition(condition) { -+ assert(is_in_range(code, begin_op4, end_op4), "code check"); -+ assert(type != T_ILLEGAL, "cmove should have type"); -+ } -+ LIR_Opr in_opr1() const { return _opr1; } -+ LIR_Opr in_opr2() const { return _opr2; } -+ LIR_Opr in_opr3() const { return _opr3; } -+ LIR_Opr in_opr4() const { return _opr4; } -+ BasicType type() const { return _type; } -+ LIR_Condition condition() const { -+ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); return _condition; -+ } -+ void set_condition(LIR_Condition condition) { -+ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); _condition = condition; -+ } -+ -+ virtual void emit_code(LIR_Assembler* masm); -+ virtual LIR_Op4* as_Op4() { return this; } -+ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; -+}; -+ - //-------------------------------- - class LabelObj: public CompilationResourceObj { - private: -@@ -2115,7 +2208,9 @@ - - void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } - -- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } -+ void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL, LIR_Opr tmp = LIR_OprFact::illegalOpr) { -+ append(new LIR_OpConvert(code, left, dst, stub, tmp)); -+ } - - void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } - void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } -@@ -2146,6 +2241,15 @@ - cmp(condition, left, LIR_OprFact::intConst(right), info); - } - -+ // machine dependent -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info = NULL); -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, int right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { -+ cmp_branch(condition, left, LIR_OprFact::intConst(right), type, tgt, info); -+ } -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered); -+ - void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); - void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); - -@@ -2153,6 +2257,9 @@ - append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); - } - -+ // machine dependent -+ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type); ++ case lir_cmp_cmove: { ++ inc_counter(counter_misc_inst); ++ inc_counter(counter_cmp); ++ break; ++ } + - void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, - LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); - void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nmethod.cpp jdk11u-ls/src/hotspot/share/code/nmethod.cpp ---- openjdk/src/hotspot/share/code/nmethod.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/code/nmethod.cpp 2023-09-12 13:54:23.485572155 +0800 + case lir_neg: + case lir_add: + case lir_sub: +diff --git a/src/hotspot/share/code/nmethod.cpp b/src/hotspot/share/code/nmethod.cpp +index 6bc63116b..41c0a0ea3 100644 +--- a/src/hotspot/share/code/nmethod.cpp ++++ b/src/hotspot/share/code/nmethod.cpp @@ -22,6 +22,12 @@ * */ @@ -109072,7 +109605,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nme #include "precompiled.hpp" #include "jvm.h" #include "code/codeCache.hpp" -@@ -2155,7 +2161,8 @@ +@@ -2159,7 +2165,8 @@ void nmethod::verify_scopes() { //verify_interrupt_point(iter.addr()); break; case relocInfo::runtime_call_type: @@ -109082,7 +109615,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nme address destination = iter.reloc()->value(); // Right now there is no way to find out which entries support // an interrupt point. It would be nice if we had this -@@ -2392,7 +2399,8 @@ +@@ -2396,7 +2403,8 @@ const char* nmethod::reloc_string_for(u_char* begin, u_char* end) { return st.as_string(); } case relocInfo::runtime_call_type: @@ -109092,10 +109625,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nme stringStream st; st.print("runtime_call"); CallRelocation* r = (CallRelocation*)iter.reloc(); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/relocInfo.cpp jdk11u-ls/src/hotspot/share/code/relocInfo.cpp ---- openjdk/src/hotspot/share/code/relocInfo.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/code/relocInfo.cpp 2023-09-12 13:54:23.489572160 +0800 -@@ -433,6 +433,7 @@ +diff --git a/src/hotspot/share/code/relocInfo.cpp b/src/hotspot/share/code/relocInfo.cpp +index a20de8dde..c6f49cf7d 100644 +--- a/src/hotspot/share/code/relocInfo.cpp ++++ b/src/hotspot/share/code/relocInfo.cpp +@@ -433,6 +433,7 @@ void virtual_call_Relocation::unpack_data() { _cached_value = x0==0? NULL: address_from_scaled_offset(x0, point); } @@ -109103,7 +109637,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { short* p = pack_1_int_to((short *)dest->locs_end(), (jint)(_offset >> 2)); dest->set_locs_end((relocInfo*) p); -@@ -441,6 +442,7 @@ +@@ -441,6 +442,7 @@ void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { void runtime_call_w_cp_Relocation::unpack_data() { _offset = unpack_1_int() << 2; } @@ -109111,7 +109645,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel void static_stub_Relocation::pack_data_to(CodeSection* dest) { short* p = (short*) dest->locs_end(); -@@ -910,7 +912,7 @@ +@@ -910,7 +912,7 @@ void RelocIterator::print_current() { break; } case relocInfo::runtime_call_type: @@ -109120,10 +109654,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel { CallRelocation* r = (CallRelocation*) reloc(); tty->print(" | [destination=" INTPTR_FORMAT "]", p2i(r->destination())); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/relocInfo.hpp jdk11u-ls/src/hotspot/share/code/relocInfo.hpp ---- openjdk/src/hotspot/share/code/relocInfo.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/code/relocInfo.hpp 2023-09-12 13:54:23.489572160 +0800 -@@ -269,7 +269,11 @@ +diff --git a/src/hotspot/share/code/relocInfo.hpp b/src/hotspot/share/code/relocInfo.hpp +index 57931a1a6..fb56fd3ab 100644 +--- a/src/hotspot/share/code/relocInfo.hpp ++++ b/src/hotspot/share/code/relocInfo.hpp +@@ -269,7 +269,11 @@ class relocInfo { poll_return_type = 11, // polling instruction for safepoints at return metadata_type = 12, // metadata that used to be oops trampoline_stub_type = 13, // stub-entry for trampoline @@ -109135,7 +109670,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel data_prefix_tag = 15, // tag for a prefix (carries data arguments) type_mask = 15 // A mask which selects only the above values }; -@@ -304,13 +308,13 @@ +@@ -304,13 +308,13 @@ class relocInfo { visitor(static_call) \ visitor(static_stub) \ visitor(runtime_call) \ @@ -109151,7 +109686,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel public: -@@ -1174,6 +1178,15 @@ +@@ -1174,6 +1178,15 @@ class runtime_call_Relocation : public CallRelocation { }; @@ -109167,7 +109702,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel class runtime_call_w_cp_Relocation : public CallRelocation { relocInfo::relocType type() { return relocInfo::runtime_call_w_cp_type; } -@@ -1202,6 +1215,7 @@ +@@ -1202,6 +1215,7 @@ class runtime_call_w_cp_Relocation : public CallRelocation { void pack_data_to(CodeSection * dest); void unpack_data(); }; @@ -109175,9 +109710,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel // Trampoline Relocations. // A trampoline allows to encode a small branch in the code, even if there -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vtableStubs.cpp jdk11u-ls/src/hotspot/share/code/vtableStubs.cpp ---- openjdk/src/hotspot/share/code/vtableStubs.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/code/vtableStubs.cpp 2023-09-12 13:54:23.489572160 +0800 +diff --git a/src/hotspot/share/code/vtableStubs.cpp b/src/hotspot/share/code/vtableStubs.cpp +index 3c986f40f..23d07f050 100644 +--- a/src/hotspot/share/code/vtableStubs.cpp ++++ b/src/hotspot/share/code/vtableStubs.cpp @@ -22,6 +22,12 @@ * */ @@ -109191,7 +109727,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vta #include "precompiled.hpp" #include "code/vtableStubs.hpp" #include "compiler/compileBroker.hpp" -@@ -98,7 +104,11 @@ +@@ -98,7 +104,11 @@ int VtableStubs::_itab_stub_size = 0; #if defined(PRODUCT) // These values are good for the PRODUCT case (no tracing). @@ -109203,7 +109739,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vta static const int first_itableStub_size = 256; #else // These values are good for the non-PRODUCT case (when tracing can be switched on). -@@ -109,6 +119,7 @@ +@@ -109,6 +119,7 @@ int VtableStubs::_itab_stub_size = 0; // vtable itable // aarch64: 460 324 // arm: ? ? @@ -109211,10 +109747,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vta // ppc (linux, BE): 404 288 // ppc (linux, LE): 356 276 // ppc (AIX): 416 296 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp jdk11u-ls/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp 2023-09-12 13:54:23.521572201 +0800 -@@ -74,7 +74,6 @@ +diff --git a/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp b/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp +index 4289e5e5c..9502463bd 100644 +--- a/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp ++++ b/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp +@@ -74,7 +74,6 @@ void G1BarrierSetC1::pre_barrier(LIRAccess& access, LIR_Opr addr_opr, // Read the marking-in-progress flag. LIR_Opr flag_val = gen->new_register(T_INT); __ load(mark_active_flag_addr, flag_val); @@ -109222,7 +109759,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/c1 LIR_PatchCode pre_val_patch_code = lir_patch_none; -@@ -103,7 +102,7 @@ +@@ -103,7 +102,7 @@ void G1BarrierSetC1::pre_barrier(LIRAccess& access, LIR_Opr addr_opr, slow = new G1PreBarrierStub(pre_val); } @@ -109231,7 +109768,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/c1 __ branch_destination(slow->continuation()); } -@@ -168,10 +167,9 @@ +@@ -168,10 +167,9 @@ void G1BarrierSetC1::post_barrier(LIRAccess& access, LIR_OprDesc* addr, LIR_OprD } assert(new_val->is_register(), "must be a register at this point"); @@ -109244,10 +109781,36 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/c1 __ branch_destination(slow->continuation()); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp jdk11u-ls/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp ---- openjdk/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp 2023-09-12 13:54:23.577572271 +0800 -@@ -51,8 +51,9 @@ +diff --git a/src/hotspot/share/gc/g1/g1FullGCMarker.inline.hpp b/src/hotspot/share/gc/g1/g1FullGCMarker.inline.hpp +index 98a2fe7f1..b43a44106 100644 +--- a/src/hotspot/share/gc/g1/g1FullGCMarker.inline.hpp ++++ b/src/hotspot/share/gc/g1/g1FullGCMarker.inline.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_GC_G1_G1MARKSTACK_INLINE_HPP + #define SHARE_VM_GC_G1_G1MARKSTACK_INLINE_HPP + +@@ -71,6 +77,7 @@ template inline void G1FullGCMarker::mark_and_push(T* p) { + _oop_stack.push(obj); + assert(_bitmap->is_marked(obj), "Must be marked now - map self"); + } else { ++ DEBUG_ONLY(OrderAccess::loadload()); + assert(_bitmap->is_marked(obj) || G1ArchiveAllocator::is_closed_archive_object(obj), + "Must be marked by other or closed archive object"); + } +diff --git a/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp b/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp +index 1ef900783..b30456429 100644 +--- a/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp ++++ b/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp +@@ -51,8 +51,9 @@ template inline void PSPromotionManager::claim_or_forward_internal_depth(T* p) { if (p != NULL) { // XXX: error if p != NULL here oop o = RawAccess::oop_load(p); @@ -109259,7 +109822,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/paral // Card mark if (PSScavenge::is_obj_in_young(o)) { PSScavenge::card_table()->inline_write_ref_field_gc(p, o); -@@ -282,13 +283,17 @@ +@@ -282,13 +283,17 @@ inline void PSPromotionManager::copy_and_push_safe_barrier(T* p) { assert(should_scavenge(p, true), "revisiting object?"); oop o = RawAccess::oop_load(p); @@ -109281,10 +109844,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/paral log_develop_trace(gc, scavenge)("{%s %s " PTR_FORMAT " -> " PTR_FORMAT " (%d)}", "forwarding", new_obj->klass()->internal_name(), p2i((void *)o), p2i((void *)new_obj), new_obj->size()); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/parallel/psScavenge.inline.hpp jdk11u-ls/src/hotspot/share/gc/parallel/psScavenge.inline.hpp ---- openjdk/src/hotspot/share/gc/parallel/psScavenge.inline.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/parallel/psScavenge.inline.hpp 2023-09-12 13:54:23.577572271 +0800 -@@ -104,8 +104,9 @@ +diff --git a/src/hotspot/share/gc/parallel/psScavenge.inline.hpp b/src/hotspot/share/gc/parallel/psScavenge.inline.hpp +index 0c58fd4b3..415990ff5 100644 +--- a/src/hotspot/share/gc/parallel/psScavenge.inline.hpp ++++ b/src/hotspot/share/gc/parallel/psScavenge.inline.hpp +@@ -104,8 +104,9 @@ class PSScavengeFromCLDClosure: public OopClosure { oop o = *p; oop new_obj; @@ -109296,10 +109860,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/paral } else { new_obj = _pm->copy_to_survivor_space(o); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp jdk11u-ls/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp 2023-09-12 13:54:23.585572281 +0800 -@@ -192,8 +192,7 @@ +diff --git a/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp b/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp +index 5241322a9..0ddabb4da 100644 +--- a/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp ++++ b/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp +@@ -192,8 +192,7 @@ void BarrierSetC1::load_at_resolved(LIRAccess& access, LIR_Opr result) { /* Normalize boolean value returned by unsafe operation, i.e., value != 0 ? value = true : value false. */ if (mask_boolean) { LabelObj* equalZeroLabel = new LabelObj(); @@ -109309,7 +109874,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/share __ move(LIR_OprFact::intConst(1), result); __ branch_destination(equalZeroLabel->label()); } -@@ -320,14 +319,12 @@ +@@ -320,14 +319,12 @@ void BarrierSetC1::generate_referent_check(LIRAccess& access, LabelObj* cont) { referent_off = gen->new_register(T_LONG); __ move(LIR_OprFact::longConst(java_lang_ref_Reference::referent_offset), referent_off); } @@ -109326,7 +109891,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/share } LIR_Opr src_klass = gen->new_register(T_METADATA); if (gen_type_check) { -@@ -337,8 +334,7 @@ +@@ -337,8 +334,7 @@ void BarrierSetC1::generate_referent_check(LIRAccess& access, LabelObj* cont) { LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(InstanceKlass::reference_type_offset()), T_BYTE); LIR_Opr reference_type = gen->new_register(T_INT); __ move(reference_type_addr, reference_type); @@ -109336,10 +109901,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/share } } } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp jdk11u-ls/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp 2023-09-12 13:54:23.585572281 +0800 -@@ -89,8 +89,7 @@ +diff --git a/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp b/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp +index 84815adea..57e29f129 100644 +--- a/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp ++++ b/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp +@@ -89,8 +89,7 @@ void CardTableBarrierSetC1::post_barrier(LIRAccess& access, LIR_OprDesc* addr, L __ move(card_addr, cur_value); LabelObj* L_already_dirty = new LabelObj(); @@ -109349,10 +109915,51 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/share __ move(dirty, card_addr); __ branch_destination(L_already_dirty->label()); } else { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp jdk11u-ls/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp 2023-09-12 13:54:23.609572311 +0800 -@@ -73,7 +73,6 @@ +diff --git a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp +index 545275644..62adf9971 100644 +--- a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp ++++ b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "gc/shared/c2/barrierSetC2.hpp" + #include "opto/arraycopynode.hpp" +@@ -197,6 +203,8 @@ public: + + bool is_volatile = (decorators & MO_SEQ_CST) != 0; + bool is_acquire = (decorators & MO_ACQUIRE) != 0; ++ bool is_relaxed = (decorators & MO_RELAXED) != 0; ++ bool is_unsafe = (decorators & C2_UNSAFE_ACCESS) != 0; + + // If reference is volatile, prevent following volatiles ops from + // floating up before the volatile access. +@@ -227,6 +235,13 @@ public: + assert(_leading_membar == NULL || support_IRIW_for_not_multiple_copy_atomic_cpu, "no leading membar expected"); + Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n); + mb->as_MemBar()->set_trailing_load(); ++ } else if (is_relaxed && is_unsafe) { ++#ifdef LOONGARCH64 ++ assert(kit != NULL, "unsupported at optimization time"); ++ Node* n = _access.raw_access(); ++ Node* mb = kit->insert_mem_bar(Op_SameAddrLoadFence, n); ++ mb->as_MemBar()->set_trailing_load(); ++#endif + } + } + } +diff --git a/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp b/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp +index f51d18648..506f0301f 100644 +--- a/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp ++++ b/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp +@@ -73,7 +73,6 @@ void ShenandoahBarrierSetC1::pre_barrier(LIRGenerator* gen, CodeEmitInfo* info, // Read the marking-in-progress flag. LIR_Opr flag_val = gen->new_register(T_INT); __ load(mark_active_flag_addr, flag_val); @@ -109360,7 +109967,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shena LIR_PatchCode pre_val_patch_code = lir_patch_none; -@@ -101,7 +100,7 @@ +@@ -101,7 +100,7 @@ void ShenandoahBarrierSetC1::pre_barrier(LIRGenerator* gen, CodeEmitInfo* info, slow = new ShenandoahPreBarrierStub(pre_val); } @@ -109369,7 +109976,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shena __ branch_destination(slow->continuation()); } -@@ -144,10 +143,9 @@ +@@ -144,10 +143,9 @@ LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier_impl(LIRGenerator* gen, L __ logical_and(flag_val, mask_reg, masked_flag); flag_val = masked_flag; } @@ -109381,10 +109988,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shena __ branch_destination(slow->continuation()); return result; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp jdk11u-ls/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp 2023-09-12 13:54:23.629572336 +0800 -@@ -105,15 +105,20 @@ +diff --git a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp +index 9f8ce7424..3c1862d82 100644 +--- a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp ++++ b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp +@@ -105,15 +105,20 @@ public: virtual void visit(LIR_OpVisitState* state) { state->do_input(_opr); @@ -109406,7 +110014,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/z/c1/ } #ifndef PRODUCT -@@ -149,13 +154,21 @@ +@@ -149,13 +154,21 @@ address ZBarrierSetC1::load_barrier_on_oop_field_preloaded_runtime_stub(Decorato #endif void ZBarrierSetC1::load_barrier(LIRAccess& access, LIR_Opr result) const { @@ -109430,9 +110038,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/z/c1/ __ branch_destination(stub->continuation()); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpreter/interpreterRuntime.cpp jdk11u-ls/src/hotspot/share/interpreter/interpreterRuntime.cpp ---- openjdk/src/hotspot/share/interpreter/interpreterRuntime.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/interpreter/interpreterRuntime.cpp 2023-11-01 09:34:25.709945506 +0800 +diff --git a/src/hotspot/share/interpreter/interpreterRuntime.cpp b/src/hotspot/share/interpreter/interpreterRuntime.cpp +index 648315913..f40e304f9 100644 +--- a/src/hotspot/share/interpreter/interpreterRuntime.cpp ++++ b/src/hotspot/share/interpreter/interpreterRuntime.cpp @@ -22,6 +22,12 @@ * */ @@ -109446,7 +110055,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #include "precompiled.hpp" #include "classfile/javaClasses.inline.hpp" #include "classfile/systemDictionary.hpp" -@@ -1506,7 +1512,7 @@ +@@ -1497,7 +1503,7 @@ IRT_ENTRY(void, InterpreterRuntime::prepare_native_call(JavaThread* thread, Meth // preparing the same method will be sure to see non-null entry & mirror. IRT_END @@ -109455,9 +110064,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre IRT_LEAF(void, InterpreterRuntime::popframe_move_outgoing_args(JavaThread* thread, void* src_address, void* dest_address)) if (src_address == dest_address) { return; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpreter/interpreterRuntime.hpp jdk11u-ls/src/hotspot/share/interpreter/interpreterRuntime.hpp ---- openjdk/src/hotspot/share/interpreter/interpreterRuntime.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/interpreter/interpreterRuntime.hpp 2023-09-12 13:54:23.657572372 +0800 +diff --git a/src/hotspot/share/interpreter/interpreterRuntime.hpp b/src/hotspot/share/interpreter/interpreterRuntime.hpp +index 87e84c893..3043fa634 100644 +--- a/src/hotspot/share/interpreter/interpreterRuntime.hpp ++++ b/src/hotspot/share/interpreter/interpreterRuntime.hpp @@ -22,6 +22,12 @@ * */ @@ -109471,7 +110081,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #ifndef SHARE_VM_INTERPRETER_INTERPRETERRUNTIME_HPP #define SHARE_VM_INTERPRETER_INTERPRETERRUNTIME_HPP -@@ -146,7 +152,7 @@ +@@ -146,7 +152,7 @@ class InterpreterRuntime: AllStatic { Method* method, intptr_t* from, intptr_t* to); @@ -109480,9 +110090,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre // Popframe support (only needed on x86, AMD64 and ARM) static void popframe_move_outgoing_args(JavaThread* thread, void* src_address, void* dest_address); #endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp jdk11u-ls/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp ---- openjdk/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp 2023-09-12 13:54:23.661572377 +0800 +diff --git a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp +index 965f6b0d1..07942993c 100644 +--- a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp ++++ b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp @@ -22,6 +22,12 @@ * */ @@ -109496,7 +110107,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #ifndef SHARE_VM_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP #define SHARE_VM_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP -@@ -114,9 +120,9 @@ +@@ -114,9 +120,9 @@ class TemplateInterpreterGenerator: public AbstractInterpreterGenerator { void restore_native_result(void); #endif // SPARC @@ -109508,9 +110119,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #ifdef PPC void lock_method(Register Rflags, Register Rscratch1, Register Rscratch2, bool flags_preloaded=false); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp jdk11u-ls/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp ---- openjdk/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp 2023-09-12 13:54:23.741572477 +0800 +diff --git a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp +index e01a242a5..0661f3b9d 100644 +--- a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp ++++ b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp @@ -22,6 +22,12 @@ * */ @@ -109524,7 +110136,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jfr/util #ifndef SHARE_VM_JFR_UTILITIES_JFRBIGENDIAN_HPP #define SHARE_VM_JFR_UTILITIES_JFRBIGENDIAN_HPP -@@ -102,7 +108,7 @@ +@@ -102,7 +108,7 @@ inline T JfrBigEndian::read_unaligned(const address location) { inline bool JfrBigEndian::platform_supports_unaligned_reads(void) { #if defined(IA32) || defined(AMD64) || defined(PPC) || defined(S390) return true; @@ -109533,9 +110145,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jfr/util return false; #else #warning "Unconfigured platform" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jvmci/vmStructs_jvmci.cpp jdk11u-ls/src/hotspot/share/jvmci/vmStructs_jvmci.cpp ---- openjdk/src/hotspot/share/jvmci/vmStructs_jvmci.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/jvmci/vmStructs_jvmci.cpp 2023-09-12 13:54:23.753572492 +0800 +diff --git a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp +index 892706333..b5bb5c288 100644 +--- a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp ++++ b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp @@ -22,6 +22,12 @@ * */ @@ -109549,11 +110162,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jvmci/vm #include "precompiled.hpp" #include "code/codeBlob.hpp" #include "compiler/abstractCompiler.hpp" -@@ -714,6 +720,35 @@ - +@@ -715,6 +721,35 @@ #endif -+ + +#ifdef LOONGARCH64 + +#define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ @@ -109582,13 +110194,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jvmci/vm + +#endif + - ++ #ifdef X86 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/metaspace.cpp jdk11u-ls/src/hotspot/share/memory/metaspace.cpp ---- openjdk/src/hotspot/share/memory/metaspace.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/memory/metaspace.cpp 2023-11-01 09:34:25.729945529 +0800 -@@ -1082,12 +1082,12 @@ + #define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ +diff --git a/src/hotspot/share/memory/metaspace.cpp b/src/hotspot/share/memory/metaspace.cpp +index c3a884faf..103789d9b 100644 +--- a/src/hotspot/share/memory/metaspace.cpp ++++ b/src/hotspot/share/memory/metaspace.cpp +@@ -1083,12 +1083,12 @@ void Metaspace::allocate_metaspace_compressed_klass_ptrs(char* requested_addr, a // Don't use large pages for the class space. bool large_pages = false; @@ -109603,7 +110217,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m ReservedSpace metaspace_rs; -@@ -1113,7 +1113,8 @@ +@@ -1114,7 +1114,8 @@ void Metaspace::allocate_metaspace_compressed_klass_ptrs(char* requested_addr, a // below 32g to get a zerobased CCS. For simplicity we reuse the search // strategy for AARCH64. @@ -109613,7 +110227,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m for (char *a = align_up(requested_addr, increment); a < (char*)(1024*G); a += increment) { -@@ -1144,7 +1145,7 @@ +@@ -1145,7 +1146,7 @@ void Metaspace::allocate_metaspace_compressed_klass_ptrs(char* requested_addr, a } } @@ -109622,10 +110236,87 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m if (!metaspace_rs.is_reserved()) { #if INCLUDE_CDS -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/compile.hpp jdk11u-ls/src/hotspot/share/opto/compile.hpp ---- openjdk/src/hotspot/share/opto/compile.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/opto/compile.hpp 2023-09-12 13:54:23.813572568 +0800 -@@ -1204,7 +1204,7 @@ +diff --git a/src/hotspot/share/oops/oop.inline.hpp b/src/hotspot/share/oops/oop.inline.hpp +index 6c631f545..986510672 100644 +--- a/src/hotspot/share/oops/oop.inline.hpp ++++ b/src/hotspot/share/oops/oop.inline.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_OOPS_OOP_INLINE_HPP + #define SHARE_VM_OOPS_OOP_INLINE_HPP + +@@ -389,7 +395,7 @@ oop oopDesc::forward_to_atomic(oop p, atomic_memory_order order) { + // forwarding pointer. + oldMark = curMark; + } +- return forwardee(); ++ return (oop)oldMark->decode_pointer(); + } + + // Note that the forwardee is not the same thing as the displaced_mark. +diff --git a/src/hotspot/share/opto/classes.hpp b/src/hotspot/share/opto/classes.hpp +index 7a9bd9111..b46e9bcf5 100644 +--- a/src/hotspot/share/opto/classes.hpp ++++ b/src/hotspot/share/opto/classes.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "utilities/macros.hpp" + + // The giant table of Node classes. +@@ -217,6 +223,7 @@ macro(StoreFence) + macro(MemBarReleaseLock) + macro(MemBarVolatile) + macro(MemBarStoreStore) ++macro(SameAddrLoadFence) + macro(MergeMem) + macro(MinD) + macro(MinF) +diff --git a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp +index da06b4740..510438d67 100644 +--- a/src/hotspot/share/opto/compile.cpp ++++ b/src/hotspot/share/opto/compile.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "asm/macroAssembler.hpp" + #include "asm/macroAssembler.inline.hpp" +@@ -3448,6 +3454,7 @@ void Compile::final_graph_reshaping_impl( Node *n, Final_Reshape_Counts &frc) { + n->set_req(MemBarNode::Precedent, top()); + } + break; ++ case Op_SameAddrLoadFence: + case Op_MemBarAcquire: { + if (n->as_MemBar()->trailing_load() && n->req() > MemBarNode::Precedent) { + // At parse time, the trailing MemBarAcquire for a volatile load +diff --git a/src/hotspot/share/opto/compile.hpp b/src/hotspot/share/opto/compile.hpp +index 569fbc6d6..c1f1b82ff 100644 +--- a/src/hotspot/share/opto/compile.hpp ++++ b/src/hotspot/share/opto/compile.hpp +@@ -1204,7 +1204,7 @@ class Compile : public Phase { bool in_scratch_emit_size() const { return _in_scratch_emit_size; } enum ScratchBufferBlob { @@ -109634,9 +110325,67 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/com MAX_inst_size = 2048, #else MAX_inst_size = 1024, -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/output.cpp jdk11u-ls/src/hotspot/share/opto/output.cpp ---- openjdk/src/hotspot/share/opto/output.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/opto/output.cpp 2023-09-12 13:54:23.877572648 +0800 +diff --git a/src/hotspot/share/opto/memnode.cpp b/src/hotspot/share/opto/memnode.cpp +index e194386b5..d5e6dd71a 100644 +--- a/src/hotspot/share/opto/memnode.cpp ++++ b/src/hotspot/share/opto/memnode.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "classfile/systemDictionary.hpp" + #include "compiler/compileLog.hpp" +@@ -3190,6 +3196,7 @@ MemBarNode* MemBarNode::make(Compile* C, int opcode, int atp, Node* pn) { + case Op_MemBarReleaseLock: return new MemBarReleaseLockNode(C, atp, pn); + case Op_MemBarVolatile: return new MemBarVolatileNode(C, atp, pn); + case Op_MemBarCPUOrder: return new MemBarCPUOrderNode(C, atp, pn); ++ case Op_SameAddrLoadFence: return new SameAddrLoadFenceNode(C, atp, pn); + case Op_OnSpinWait: return new OnSpinWaitNode(C, atp, pn); + case Op_Initialize: return new InitializeNode(C, atp, pn); + case Op_MemBarStoreStore: return new MemBarStoreStoreNode(C, atp, pn); +diff --git a/src/hotspot/share/opto/memnode.hpp b/src/hotspot/share/opto/memnode.hpp +index e4676977e..bf1efbf83 100644 +--- a/src/hotspot/share/opto/memnode.hpp ++++ b/src/hotspot/share/opto/memnode.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_OPTO_MEMNODE_HPP + #define SHARE_VM_OPTO_MEMNODE_HPP + +@@ -1293,6 +1299,14 @@ public: + virtual uint ideal_reg() const { return 0; } // not matched in the AD file + }; + ++// Used to prevent LoadLoad reorder for same address. ++class SameAddrLoadFenceNode: public MemBarNode { ++public: ++ SameAddrLoadFenceNode(Compile* C, int alias_idx, Node* precedent) ++ : MemBarNode(C, alias_idx, precedent) {} ++ virtual int Opcode() const; ++}; ++ + class OnSpinWaitNode: public MemBarNode { + public: + OnSpinWaitNode(Compile* C, int alias_idx, Node* precedent) +diff --git a/src/hotspot/share/opto/output.cpp b/src/hotspot/share/opto/output.cpp +index b6540e06a..52d1fc9fb 100644 +--- a/src/hotspot/share/opto/output.cpp ++++ b/src/hotspot/share/opto/output.cpp @@ -22,6 +22,12 @@ * */ @@ -109650,7 +110399,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/out #include "precompiled.hpp" #include "asm/assembler.inline.hpp" #include "asm/macroAssembler.inline.hpp" -@@ -731,6 +737,27 @@ +@@ -731,6 +737,27 @@ void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) { // Add the safepoint in the DebugInfoRecorder if( !mach->is_MachCall() ) { mcall = NULL; @@ -109678,7 +110427,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/out debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map); } else { mcall = mach->as_MachCall(); -@@ -1393,6 +1420,31 @@ +@@ -1393,6 +1420,22 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) { DEBUG_ONLY(uint instr_offset = cb->insts_size()); n->emit(*cb, _regalloc); current_offset = cb->insts_size(); @@ -109695,50 +110444,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/out + adjust += 4; + inst = (NativeInstruction*) (cb->insts()->end() - 8); + } -+#ifdef MIPS64 -+ if (PatchContinuousLoad) { -+ // if PatchContinuousLoad is true, a nop may be inserted after a load instruction and -+ // the adjust would be 2 instructions. -+ if (inst->is_nop()) { -+ adjust += 4; -+ } -+ } -+#endif + previous_offset = current_offset - adjust; + } +#endif // Above we only verified that there is enough space in the instruction section. // However, the instruction may emit stubs that cause code buffer expansion. -@@ -1402,7 +1454,9 @@ - } - - #ifdef ASSERT -- uint n_size = n->size(_regalloc); -+ // adjust: one node may be inserted one and only one nop. -+ int adjust = MIPS64_ONLY(PatchContinuousLoad ? block->number_of_nodes() * 4 :) 0; -+ uint n_size = n->size(regalloc()) + adjust; - if (n_size < (current_offset-instr_offset)) { - MachNode* mach = n->as_Mach(); - n->dump(); -@@ -1488,7 +1542,13 @@ - } - // Verify that the distance for generated before forward - // short branches is still valid. -- guarantee((int)(blk_starts[i+1] - blk_starts[i]) >= (current_offset - blk_offset), "shouldn't increase block size"); -+ // adjust: one node may be inserted one and only one nop. -+ int adjust = MIPS64_ONLY(PatchContinuousLoad ? block->number_of_nodes() * 4 :) 0; -+#ifndef PRODUCT -+ if ((int)(blk_starts[i+1] - blk_starts[i] + adjust) < (current_offset - blk_offset)) -+ tty->print_cr("%s:%d blk_starts[i+1]:%d, blk_starts[i]:%d, adjust: %d, current_offset:%d, blk_offset:%d", __func__, __LINE__, blk_starts[i+1], blk_starts[i], adjust, current_offset, blk_offset); -+#endif -+ guarantee((int)(blk_starts[i+1] - blk_starts[i] + adjust) >= (current_offset - blk_offset), "shouldn't increase block size"); - - // Save new block start offset - blk_starts[i] = blk_offset; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/type.cpp jdk11u-ls/src/hotspot/share/opto/type.cpp ---- openjdk/src/hotspot/share/opto/type.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/opto/type.cpp 2023-11-01 09:34:25.781945586 +0800 +diff --git a/src/hotspot/share/opto/type.cpp b/src/hotspot/share/opto/type.cpp +index 7d767c47c..23ec34e5e 100644 +--- a/src/hotspot/share/opto/type.cpp ++++ b/src/hotspot/share/opto/type.cpp @@ -22,6 +22,12 @@ * */ @@ -109752,7 +110467,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/typ #include "precompiled.hpp" #include "ci/ciMethodData.hpp" #include "ci/ciTypeFlow.hpp" -@@ -78,6 +84,12 @@ +@@ -78,6 +84,12 @@ const Type::TypeInfo Type::_type_info[Type::lastype] = { { Bad, T_ILLEGAL, "vectorx:", false, 0, relocInfo::none }, // VectorX { Bad, T_ILLEGAL, "vectory:", false, 0, relocInfo::none }, // VectorY { Bad, T_ILLEGAL, "vectorz:", false, 0, relocInfo::none }, // VectorZ @@ -109765,35 +110480,84 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/typ #else // all other { Bad, T_ILLEGAL, "vectors:", false, Op_VecS, relocInfo::none }, // VectorS { Bad, T_ILLEGAL, "vectord:", false, Op_VecD, relocInfo::none }, // VectorD -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/os.cpp jdk11u-ls/src/hotspot/share/runtime/os.cpp ---- openjdk/src/hotspot/share/runtime/os.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/runtime/os.cpp 2023-11-01 09:34:25.821945631 +0800 +diff --git a/src/hotspot/share/runtime/java.cpp b/src/hotspot/share/runtime/java.cpp +index 84123b29e..77fbacf2d 100644 +--- a/src/hotspot/share/runtime/java.cpp ++++ b/src/hotspot/share/runtime/java.cpp +@@ -68,6 +68,7 @@ + #include "runtime/thread.inline.hpp" + #include "runtime/timer.hpp" + #include "runtime/vmOperations.hpp" ++#include "runtime/vmThread.hpp" + #include "services/memTracker.hpp" + #include "utilities/dtrace.hpp" + #include "utilities/globalDefinitions.hpp" +diff --git a/src/hotspot/share/runtime/objectMonitor.cpp b/src/hotspot/share/runtime/objectMonitor.cpp +index ce23aafa8..d3dfb74d5 100644 +--- a/src/hotspot/share/runtime/objectMonitor.cpp ++++ b/src/hotspot/share/runtime/objectMonitor.cpp @@ -22,6 +22,12 @@ * */ +/* -+ * This file has been modified by Loongson Technology in 2021, These -+ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "classfile/vmSymbols.hpp" + #include "jfr/jfrEvents.hpp" +@@ -308,6 +314,9 @@ void ObjectMonitor::enter(TRAPS) { + } + + assert(_owner != Self, "invariant"); ++ // Thread _succ != current assertion load reording before Thread if (_succ == current) _succ = nullptr. ++ // But expect order is firstly if (_succ == current) _succ = nullptr then _succ != current assertion. ++ DEBUG_ONLY(LOONGARCH64_ONLY(__asm__ __volatile__ ("dbar 0x700\n");)MIPS64_ONLY(OrderAccess::loadload();)) + assert(_succ != Self, "invariant"); + assert(Self->is_Java_thread(), "invariant"); + JavaThread * jt = (JavaThread *) Self; +@@ -469,6 +478,7 @@ void ObjectMonitor::EnterI(TRAPS) { + } + + // The Spin failed -- Enqueue and park the thread ... ++ DEBUG_ONLY(LOONGARCH64_ONLY(__asm__ __volatile__ ("dbar 0x700\n");)MIPS64_ONLY(OrderAccess::loadload();)) + assert(_succ != Self, "invariant"); + assert(_owner != Self, "invariant"); + assert(_Responsible != Self, "invariant"); +diff --git a/src/hotspot/share/runtime/os.cpp b/src/hotspot/share/runtime/os.cpp +index 1c540bb62..0e44240d4 100644 +--- a/src/hotspot/share/runtime/os.cpp ++++ b/src/hotspot/share/runtime/os.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + #include "precompiled.hpp" #include "jvm.h" #include "classfile/classLoader.hpp" -@@ -1242,7 +1248,8 @@ +@@ -1242,7 +1248,8 @@ bool os::is_first_C_frame(frame* fr) { + if ((uintptr_t)fr->sender_sp() == (uintptr_t)-1 || is_pointer_bad(fr->sender_sp())) return true; - uintptr_t old_fp = (uintptr_t)fr->link(); - if ((old_fp & fp_align_mask) != 0) return true; -- if (old_fp == 0 || old_fp == (uintptr_t)-1 || old_fp == ufp) return true; + uintptr_t old_fp = (uintptr_t)fr->link_or_null(); +- if (old_fp == 0 || old_fp == (uintptr_t)-1 || old_fp == ufp || + // The check for old_fp and ufp is harmful on LoongArch and MIPS due to their special ABIs. -+ if (old_fp == 0 || old_fp == (uintptr_t)-1 NOT_LOONGARCH64_AND_MIPS64(|| old_fp == ufp)) return true; ++ if (old_fp == 0 || old_fp == (uintptr_t)-1 NOT_LOONGARCH64_AND_MIPS64(|| old_fp == ufp) || + is_pointer_bad(fr->link_or_null())) return true; // stack grows downwards; if old_fp is below current fp or if the stack - // frame is too large, either the stack is corrupted or fp is not saved -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/sharedRuntimeTrig.cpp jdk11u-ls/src/hotspot/share/runtime/sharedRuntimeTrig.cpp ---- openjdk/src/hotspot/share/runtime/sharedRuntimeTrig.cpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/runtime/sharedRuntimeTrig.cpp 2023-09-12 13:54:23.985572784 +0800 +diff --git a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp +index e086f794c..f48019577 100644 +--- a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp ++++ b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp @@ -22,6 +22,13 @@ * */ @@ -109808,7 +110572,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ #include "precompiled.hpp" #include "jni.h" #include "runtime/interfaceSupport.inline.hpp" -@@ -512,6 +519,14 @@ +@@ -512,6 +519,14 @@ static int __ieee754_rem_pio2(double x, double *y) { * sin(x) = x + (S1*x + (x *(r-y/2)+y)) */ @@ -109823,10 +110587,36 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ static const double S1 = -1.66666666666666324348e-01, /* 0xBFC55555, 0x55555549 */ S2 = 8.33333333332248946124e-03, /* 0x3F811111, 0x1110F8A6 */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilities/globalDefinitions.hpp jdk11u-ls/src/hotspot/share/utilities/globalDefinitions.hpp ---- openjdk/src/hotspot/share/utilities/globalDefinitions.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/utilities/globalDefinitions.hpp 2023-09-12 13:54:24.025572834 +0800 -@@ -1161,6 +1161,15 @@ +diff --git a/src/hotspot/share/runtime/vmStructs.cpp b/src/hotspot/share/runtime/vmStructs.cpp +index adce6da6a..db099a298 100644 +--- a/src/hotspot/share/runtime/vmStructs.cpp ++++ b/src/hotspot/share/runtime/vmStructs.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "ci/ciField.hpp" + #include "ci/ciInstance.hpp" +@@ -1642,6 +1648,7 @@ typedef PaddedEnd PaddedObjectMonitor; + declare_c2_type(StoreFenceNode, MemBarNode) \ + declare_c2_type(MemBarVolatileNode, MemBarNode) \ + declare_c2_type(MemBarCPUOrderNode, MemBarNode) \ ++ declare_c2_type(SameAddrLoadFenceNode, MemBarNode) \ + declare_c2_type(OnSpinWaitNode, MemBarNode) \ + declare_c2_type(InitializeNode, MemBarNode) \ + declare_c2_type(ThreadLocalNode, Node) \ +diff --git a/src/hotspot/share/utilities/globalDefinitions.hpp b/src/hotspot/share/utilities/globalDefinitions.hpp +index c758fc574..a8c4638f6 100644 +--- a/src/hotspot/share/utilities/globalDefinitions.hpp ++++ b/src/hotspot/share/utilities/globalDefinitions.hpp +@@ -1161,6 +1161,15 @@ inline int exact_log2_long(jlong x) { return log2_long(x); } @@ -109842,9 +110632,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilitie inline bool is_odd (intx x) { return x & 1; } inline bool is_even(intx x) { return !is_odd(x); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilities/macros.hpp jdk11u-ls/src/hotspot/share/utilities/macros.hpp ---- openjdk/src/hotspot/share/utilities/macros.hpp 2022-10-12 23:00:01.000000000 +0800 -+++ jdk11u-ls/src/hotspot/share/utilities/macros.hpp 2023-09-12 13:54:24.025572834 +0800 +diff --git a/src/hotspot/share/utilities/macros.hpp b/src/hotspot/share/utilities/macros.hpp +index 6605ab367..5a2be6ef1 100644 +--- a/src/hotspot/share/utilities/macros.hpp ++++ b/src/hotspot/share/utilities/macros.hpp @@ -22,6 +22,12 @@ * */ @@ -109858,7 +110649,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilitie #ifndef SHARE_VM_UTILITIES_MACROS_HPP #define SHARE_VM_UTILITIES_MACROS_HPP -@@ -531,6 +537,38 @@ +@@ -535,6 +541,38 @@ #define NOT_SPARC(code) code #endif @@ -109897,7 +110688,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilitie #if defined(PPC32) || defined(PPC64) #ifndef PPC #define PPC -@@ -623,16 +661,34 @@ +@@ -627,16 +665,34 @@ // OS_CPU_HEADER(vmStructs) --> vmStructs_linux_sparc.hpp // // basename.hpp / basename.inline.hpp @@ -109932,5160 +110723,136 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilitie // basename.hpp / basename.inline.hpp #define COMPILER_HEADER(basename) XSTR(COMPILER_HEADER_STEM(basename).hpp) #define COMPILER_HEADER_INLINE(basename) XSTR(COMPILER_HEADER_STEM(basename).inline.hpp) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/share/classes/sun/security/ssl/NamedGroup.java jdk11u-ls/src/java.base/share/classes/sun/security/ssl/NamedGroup.java ---- openjdk/src/java.base/share/classes/sun/security/ssl/NamedGroup.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/java.base/share/classes/sun/security/ssl/NamedGroup.java 2023-09-12 13:54:24.533573473 +0800 -@@ -49,7 +49,114 @@ - // Elliptic Curves (RFC 4492) - // - // See sun.security.util.CurveDB for the OIDs -+ // NIST K-163 -+ -+ SECT163_K1(0x0001, "sect163k1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect163k1")), -+ SECT163_R1(0x0002, "sect163r1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect163r1")), -+ -+ // NIST B-163 -+ SECT163_R2(0x0003, "sect163r2", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect163r2")), -+ SECT193_R1(0x0004, "sect193r1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect193r1")), -+ SECT193_R2(0x0005, "sect193r2", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect193r2")), -+ -+ // NIST K-233 -+ SECT233_K1(0x0006, "sect233k1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect233k1")), -+ -+ // NIST B-233 -+ SECT233_R1(0x0007, "sect233r1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect233r1")), -+ SECT239_K1(0x0008, "sect239k1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect239k1")), -+ -+ // NIST K-283 -+ SECT283_K1(0x0009, "sect283k1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect283k1")), -+ -+ // NIST B-283 -+ SECT283_R1(0x000A, "sect283r1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect283r1")), -+ -+ // NIST K-409 -+ SECT409_K1(0x000B, "sect409k1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect409k1")), -+ -+ // NIST B-409 -+ SECT409_R1(0x000C, "sect409r1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect409r1")), -+ -+ // NIST K-571 -+ SECT571_K1(0x000D, "sect571k1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect571k1")), -+ -+ // NIST B-571 -+ SECT571_R1(0x000E, "sect571r1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect571r1")), -+ SECP160_K1(0x000F, "secp160k1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp160k1")), -+ SECP160_R1(0x0010, "secp160r1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp160r1")), -+ SECP160_R2(0x0011, "secp160r2", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp160r2")), -+ SECP192_K1(0x0012, "secp192k1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp192k1")), -+ -+ // NIST P-192 -+ SECP192_R1(0x0013, "secp192r1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp192r1")), -+ SECP224_K1(0x0014, "secp224k1", false, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp224k1")), -+ - // NIST P-224 -+ SECP224_R1(0x0015, "secp224r1", true, -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp224r1")), - SECP256_K1(0x0016, "secp256k1", false, - NamedGroupSpec.NAMED_GROUP_ECDHE, - ProtocolVersion.PROTOCOLS_TO_12, -@@ -104,7 +211,19 @@ - FFDHE_8192(0x0104, "ffdhe8192", true, - NamedGroupSpec.NAMED_GROUP_FFDHE, - ProtocolVersion.PROTOCOLS_TO_13, -- PredefinedDHParameterSpecs.ffdheParams.get(8192)); -+ PredefinedDHParameterSpecs.ffdheParams.get(8192)), -+ -+ // Elliptic Curves (RFC 4492) -+ // -+ // arbitrary prime and characteristic-2 curves -+ ARBITRARY_PRIME(0xFF01, "arbitrary_explicit_prime_curves", false, -+ NamedGroupSpec.NAMED_GROUP_ARBITRARY, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ null), -+ ARBITRARY_CHAR2(0xFF02, "arbitrary_explicit_char2_curves", false, -+ NamedGroupSpec.NAMED_GROUP_ARBITRARY, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ null); - - final int id; // hash + signature - final String name; // literal name -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/share/classes/sun/security/util/CurveDB.java jdk11u-ls/src/java.base/share/classes/sun/security/util/CurveDB.java ---- openjdk/src/java.base/share/classes/sun/security/util/CurveDB.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/java.base/share/classes/sun/security/util/CurveDB.java 2023-11-01 09:34:25.977945804 +0800 -@@ -176,6 +176,105 @@ - Pattern nameSplitPattern = Holder.nameSplitPattern; - - /* SEC2 prime curves */ -+ add("secp112r1", "1.3.132.0.6", P, -+ "DB7C2ABF62E35E668076BEAD208B", -+ "DB7C2ABF62E35E668076BEAD2088", -+ "659EF8BA043916EEDE8911702B22", -+ "09487239995A5EE76B55F9C2F098", -+ "A89CE5AF8724C0A23E0E0FF77500", -+ "DB7C2ABF62E35E7628DFAC6561C5", -+ 1, nameSplitPattern); -+ -+ add("secp112r2", "1.3.132.0.7", P, -+ "DB7C2ABF62E35E668076BEAD208B", -+ "6127C24C05F38A0AAAF65C0EF02C", -+ "51DEF1815DB5ED74FCC34C85D709", -+ "4BA30AB5E892B4E1649DD0928643", -+ "adcd46f5882e3747def36e956e97", -+ "36DF0AAFD8B8D7597CA10520D04B", -+ 4, nameSplitPattern); -+ -+ add("secp128r1", "1.3.132.0.28", P, -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFF", -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFC", -+ "E87579C11079F43DD824993C2CEE5ED3", -+ "161FF7528B899B2D0C28607CA52C5B86", -+ "CF5AC8395BAFEB13C02DA292DDED7A83", -+ "FFFFFFFE0000000075A30D1B9038A115", -+ 1, nameSplitPattern); -+ -+ add("secp128r2", "1.3.132.0.29", P, -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFF", -+ "D6031998D1B3BBFEBF59CC9BBFF9AEE1", -+ "5EEEFCA380D02919DC2C6558BB6D8A5D", -+ "7B6AA5D85E572983E6FB32A7CDEBC140", -+ "27B6916A894D3AEE7106FE805FC34B44", -+ "3FFFFFFF7FFFFFFFBE0024720613B5A3", -+ 4, nameSplitPattern); -+ -+ add("secp160k1", "1.3.132.0.9", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC73", -+ "0000000000000000000000000000000000000000", -+ "0000000000000000000000000000000000000007", -+ "3B4C382CE37AA192A4019E763036F4F5DD4D7EBB", -+ "938CF935318FDCED6BC28286531733C3F03C4FEE", -+ "0100000000000000000001B8FA16DFAB9ACA16B6B3", -+ 1, nameSplitPattern); -+ -+ add("secp160r1", "1.3.132.0.8", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7FFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7FFFFFFC", -+ "1C97BEFC54BD7A8B65ACF89F81D4D4ADC565FA45", -+ "4A96B5688EF573284664698968C38BB913CBFC82", -+ "23A628553168947D59DCC912042351377AC5FB32", -+ "0100000000000000000001F4C8F927AED3CA752257", -+ 1, nameSplitPattern); -+ -+ add("secp160r2", "1.3.132.0.30", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC73", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC70", -+ "B4E134D3FB59EB8BAB57274904664D5AF50388BA", -+ "52DCB034293A117E1F4FF11B30F7199D3144CE6D", -+ "FEAFFEF2E331F296E071FA0DF9982CFEA7D43F2E", -+ "0100000000000000000000351EE786A818F3A1A16B", -+ 1, nameSplitPattern); -+ -+ add("secp192k1", "1.3.132.0.31", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFEE37", -+ "000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000003", -+ "DB4FF10EC057E9AE26B07D0280B7F4341DA5D1B1EAE06C7D", -+ "9B2F2F6D9C5628A7844163D015BE86344082AA88D95E2F9D", -+ "FFFFFFFFFFFFFFFFFFFFFFFE26F2FC170F69466A74DEFD8D", -+ 1, nameSplitPattern); -+ -+ add("secp192r1 [NIST P-192, X9.62 prime192v1]", "1.2.840.10045.3.1.1", PD, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "64210519E59C80E70FA7E9AB72243049FEB8DEECC146B9B1", -+ "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF1012", -+ "07192B95FFC8DA78631011ED6B24CDD573F977A11E794811", -+ "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22831", -+ 1, nameSplitPattern); -+ -+ add("secp224k1", "1.3.132.0.32", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFE56D", -+ "00000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000005", -+ "A1455B334DF099DF30FC28A169A467E9E47075A90F7E650EB6B7A45C", -+ "7E089FED7FBA344282CAFBD6F7E319F7C0B0BD59E2CA4BDB556D61A5", -+ "010000000000000000000000000001DCE8D2EC6184CAF0A971769FB1F7", -+ 1, nameSplitPattern); -+ -+ add("secp224r1 [NIST P-224]", "1.3.132.0.33", PD, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000001", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFFFFFFFFFE", -+ "B4050A850C04B3ABF54132565044B0B7D7BFD8BA270B39432355FFB4", -+ "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D21", -+ "BD376388B5F723FB4C22DFE6CD4375A05A07476444D5819985007E34", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3D", -+ 1, nameSplitPattern); -+ - add("secp256k1", "1.3.132.0.10", P, - "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFC2F", - "0000000000000000000000000000000000000000000000000000000000000000", -@@ -212,6 +311,435 @@ - "01FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA51868783BF2F966B7FCC0148F709A5D03BB5C9B8899C47AEBB6FB71E91386409", - 1, nameSplitPattern); - -+ /* ANSI X9.62 prime curves */ -+ add("X9.62 prime192v2", "1.2.840.10045.3.1.2", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "CC22D6DFB95C6B25E49C0D6364A4E5980C393AA21668D953", -+ "EEA2BAE7E1497842F2DE7769CFE9C989C072AD696F48034A", -+ "6574D11D69B6EC7A672BB82A083DF2F2B0847DE970B2DE15", -+ "FFFFFFFFFFFFFFFFFFFFFFFE5FB1A724DC80418648D8DD31", -+ 1, nameSplitPattern); -+ -+ add("X9.62 prime192v3", "1.2.840.10045.3.1.3", P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "22123DC2395A05CAA7423DAECCC94760A7D462256BD56916", -+ "7D29778100C65A1DA1783716588DCE2B8B4AEE8E228F1896", -+ "38A90F22637337334B49DCB66A6DC8F9978ACA7648A943B0", -+ "FFFFFFFFFFFFFFFFFFFFFFFF7A62D031C83F4294F640EC13", -+ 1, nameSplitPattern); -+ -+ add("X9.62 prime239v1", "1.2.840.10045.3.1.4", P, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "6B016C3BDCF18941D0D654921475CA71A9DB2FB27D1D37796185C2942C0A", -+ "0FFA963CDCA8816CCC33B8642BEDF905C3D358573D3F27FBBD3B3CB9AAAF", -+ "7DEBE8E4E90A5DAE6E4054CA530BA04654B36818CE226B39FCCB7B02F1AE", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFF9E5E9A9F5D9071FBD1522688909D0B", -+ 1, nameSplitPattern); -+ -+ add("X9.62 prime239v2", "1.2.840.10045.3.1.5", P, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "617FAB6832576CBBFED50D99F0249C3FEE58B94BA0038C7AE84C8C832F2C", -+ "38AF09D98727705120C921BB5E9E26296A3CDCF2F35757A0EAFD87B830E7", -+ "5B0125E4DBEA0EC7206DA0FC01D9B081329FB555DE6EF460237DFF8BE4BA", -+ "7FFFFFFFFFFFFFFFFFFFFFFF800000CFA7E8594377D414C03821BC582063", -+ 1, nameSplitPattern); -+ -+ add("X9.62 prime239v3", "1.2.840.10045.3.1.6", P, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "255705FA2A306654B1F4CB03D6A750A30C250102D4988717D9BA15AB6D3E", -+ "6768AE8E18BB92CFCF005C949AA2C6D94853D0E660BBF854B1C9505FE95A", -+ "1607E6898F390C06BC1D552BAD226F3B6FCFE48B6E818499AF18E3ED6CF3", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFF975DEB41B3A6057C3C432146526551", -+ 1, nameSplitPattern); -+ -+ /* SEC2 binary curves */ -+ add("sect113r1", "1.3.132.0.4", B, -+ "020000000000000000000000000201", -+ "003088250CA6E7C7FE649CE85820F7", -+ "00E8BEE4D3E2260744188BE0E9C723", -+ "009D73616F35F4AB1407D73562C10F", -+ "00A52830277958EE84D1315ED31886", -+ "0100000000000000D9CCEC8A39E56F", -+ 2, nameSplitPattern); -+ -+ add("sect113r2", "1.3.132.0.5", B, -+ "020000000000000000000000000201", -+ "00689918DBEC7E5A0DD6DFC0AA55C7", -+ "0095E9A9EC9B297BD4BF36E059184F", -+ "01A57A6A7B26CA5EF52FCDB8164797", -+ "00B3ADC94ED1FE674C06E695BABA1D", -+ "010000000000000108789B2496AF93", -+ 2, nameSplitPattern); -+ -+ add("sect131r1", "1.3.132.0.22", B, -+ "080000000000000000000000000000010D", -+ "07A11B09A76B562144418FF3FF8C2570B8", -+ "0217C05610884B63B9C6C7291678F9D341", -+ "0081BAF91FDF9833C40F9C181343638399", -+ "078C6E7EA38C001F73C8134B1B4EF9E150", -+ "0400000000000000023123953A9464B54D", -+ 2, nameSplitPattern); -+ -+ add("sect131r2", "1.3.132.0.23", B, -+ "080000000000000000000000000000010D", -+ "03E5A88919D7CAFCBF415F07C2176573B2", -+ "04B8266A46C55657AC734CE38F018F2192", -+ "0356DCD8F2F95031AD652D23951BB366A8", -+ "0648F06D867940A5366D9E265DE9EB240F", -+ "0400000000000000016954A233049BA98F", -+ 2, nameSplitPattern); -+ -+ add("sect163k1 [NIST K-163]", "1.3.132.0.1", BD, -+ "0800000000000000000000000000000000000000C9", -+ "000000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000001", -+ "02FE13C0537BBC11ACAA07D793DE4E6D5E5C94EEE8", -+ "0289070FB05D38FF58321F2E800536D538CCDAA3D9", -+ "04000000000000000000020108A2E0CC0D99F8A5EF", -+ 2, nameSplitPattern); -+ -+ add("sect163r1", "1.3.132.0.2", B, -+ "0800000000000000000000000000000000000000C9", -+ "07B6882CAAEFA84F9554FF8428BD88E246D2782AE2", -+ "0713612DCDDCB40AAB946BDA29CA91F73AF958AFD9", -+ "0369979697AB43897789566789567F787A7876A654", -+ "00435EDB42EFAFB2989D51FEFCE3C80988F41FF883", -+ "03FFFFFFFFFFFFFFFFFFFF48AAB689C29CA710279B", -+ 2, nameSplitPattern); -+ -+ add("sect163r2 [NIST B-163]", "1.3.132.0.15", BD, -+ "0800000000000000000000000000000000000000C9", -+ "000000000000000000000000000000000000000001", -+ "020A601907B8C953CA1481EB10512F78744A3205FD", -+ "03F0EBA16286A2D57EA0991168D4994637E8343E36", -+ "00D51FBC6C71A0094FA2CDD545B11C5C0C797324F1", -+ "040000000000000000000292FE77E70C12A4234C33", -+ 2, nameSplitPattern); -+ -+ add("sect193r1", "1.3.132.0.24", B, -+ "02000000000000000000000000000000000000000000008001", -+ "0017858FEB7A98975169E171F77B4087DE098AC8A911DF7B01", -+ "00FDFB49BFE6C3A89FACADAA7A1E5BBC7CC1C2E5D831478814", -+ "01F481BC5F0FF84A74AD6CDF6FDEF4BF6179625372D8C0C5E1", -+ "0025E399F2903712CCF3EA9E3A1AD17FB0B3201B6AF7CE1B05", -+ "01000000000000000000000000C7F34A778F443ACC920EBA49", -+ 2, nameSplitPattern); -+ -+ add("sect193r2", "1.3.132.0.25", B, -+ "02000000000000000000000000000000000000000000008001", -+ "0163F35A5137C2CE3EA6ED8667190B0BC43ECD69977702709B", -+ "00C9BB9E8927D4D64C377E2AB2856A5B16E3EFB7F61D4316AE", -+ "00D9B67D192E0367C803F39E1A7E82CA14A651350AAE617E8F", -+ "01CE94335607C304AC29E7DEFBD9CA01F596F927224CDECF6C", -+ "010000000000000000000000015AAB561B005413CCD4EE99D5", -+ 2, nameSplitPattern); -+ -+ add("sect233k1 [NIST K-233]", "1.3.132.0.26", BD, -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "017232BA853A7E731AF129F22FF4149563A419C26BF50A4C9D6EEFAD6126", -+ "01DB537DECE819B7F70F555A67C427A8CD9BF18AEB9B56E0C11056FAE6A3", -+ "008000000000000000000000000000069D5BB915BCD46EFB1AD5F173ABDF", -+ 4, nameSplitPattern); -+ -+ add("sect233r1 [NIST B-233]", "1.3.132.0.27", B, -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "0066647EDE6C332C7F8C0923BB58213B333B20E9CE4281FE115F7D8F90AD", -+ "00FAC9DFCBAC8313BB2139F1BB755FEF65BC391F8B36F8F8EB7371FD558B", -+ "01006A08A41903350678E58528BEBF8A0BEFF867A7CA36716F7E01F81052", -+ "01000000000000000000000000000013E974E72F8A6922031D2603CFE0D7", -+ 2, nameSplitPattern); -+ -+ add("sect239k1", "1.3.132.0.3", B, -+ "800000000000000000004000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "29A0B6A887A983E9730988A68727A8B2D126C44CC2CC7B2A6555193035DC", -+ "76310804F12E549BDB011C103089E73510ACB275FC312A5DC6B76553F0CA", -+ "2000000000000000000000000000005A79FEC67CB6E91F1C1DA800E478A5", -+ 4, nameSplitPattern); -+ -+ add("sect283k1 [NIST K-283]", "1.3.132.0.16", BD, -+ "0800000000000000000000000000000000000000000000000000000000000000000010A1", -+ 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"0021A5C2C8EE9FEB5C4B9A753B7B476B7FD6422EF1F3DD674761FA99D6AC27C8A9A197B272822F6CD57A55AA4F50AE317B13545F", -+ "015D4860D088DDB3496B0C6064756260441CDE4AF1771D4DB01FFE5B34E59703DC255A868A1180515603AEAB60794E54BB7996A7", -+ "0061B1CFAB6BE5F32BBFA78324ED106A7636B9C5A7BD198D0158AA4F5488D08F38514F1FDF4B4F40D2181B3681C364BA0273C706", -+ "010000000000000000000000000000000000000000000000000001E2AAD6A612F33307BE5FA47C3C9E052F838164CD37D9A21173", -+ 2, nameSplitPattern); -+ -+ add("sect571k1 [NIST K-571]", "1.3.132.0.38", BD, -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "026EB7A859923FBC82189631F8103FE4AC9CA2970012D5D46024804801841CA44370958493B205E647DA304DB4CEB08CBBD1BA39494776FB988B47174DCA88C7E2945283A01C8972", -+ "0349DC807F4FBF374F4AEADE3BCA95314DD58CEC9F307A54FFC61EFC006D8A2C9D4979C0AC44AEA74FBEBBB9F772AEDCB620B01A7BA7AF1B320430C8591984F601CD4C143EF1C7A3", -+ "020000000000000000000000000000000000000000000000000000000000000000000000131850E1F19A63E4B391A8DB917F4138B630D84BE5D639381E91DEB45CFE778F637C1001", -+ 4, nameSplitPattern); -+ -+ add("sect571r1 [NIST B-571]", "1.3.132.0.39", B, -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "02F40E7E2221F295DE297117B7F3D62F5C6A97FFCB8CEFF1CD6BA8CE4A9A18AD84FFABBD8EFA59332BE7AD6756A66E294AFD185A78FF12AA520E4DE739BACA0C7FFEFF7F2955727A", -+ "0303001D34B856296C16C0D40D3CD7750A93D1D2955FA80AA5F40FC8DB7B2ABDBDE53950F4C0D293CDD711A35B67FB1499AE60038614F1394ABFA3B4C850D927E1E7769C8EEC2D19", -+ "037BF27342DA639B6DCCFFFEB73D69D78C6C27A6009CBBCA1980F8533921E8A684423E43BAB08A576291AF8F461BB2A8B3531D2F0485C19B16E2F1516E23DD3C1A4827AF1B8AC15B", -+ "03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE661CE18FF55987308059B186823851EC7DD9CA1161DE93D5174D66E8382E9BB2FE84E47", -+ 2, nameSplitPattern); -+ -+ /* ANSI X9.62 binary curves */ -+ add("X9.62 c2tnb191v1", "1.2.840.10045.3.0.5", B, -+ "800000000000000000000000000000000000000000000201", -+ "2866537B676752636A68F56554E12640276B649EF7526267", -+ "2E45EF571F00786F67B0081B9495A3D95462F5DE0AA185EC", -+ "36B3DAF8A23206F9C4F299D7B21A9C369137F2C84AE1AA0D", -+ "765BE73433B3F95E332932E70EA245CA2418EA0EF98018FB", -+ "40000000000000000000000004A20E90C39067C893BBB9A5", -+ 2, nameSplitPattern); -+ -+ add("X9.62 c2tnb191v2", "1.2.840.10045.3.0.6", B, -+ "800000000000000000000000000000000000000000000201", -+ "401028774D7777C7B7666D1366EA432071274F89FF01E718", -+ "0620048D28BCBD03B6249C99182B7C8CD19700C362C46A01", -+ "3809B2B7CC1B28CC5A87926AAD83FD28789E81E2C9E3BF10", -+ "17434386626D14F3DBF01760D9213A3E1CF37AEC437D668A", -+ "20000000000000000000000050508CB89F652824E06B8173", -+ 4, nameSplitPattern); -+ -+ add("X9.62 c2tnb191v3", "1.2.840.10045.3.0.7", B, -+ "800000000000000000000000000000000000000000000201", -+ "6C01074756099122221056911C77D77E77A777E7E7E77FCB", -+ "71FE1AF926CF847989EFEF8DB459F66394D90F32AD3F15E8", -+ "375D4CE24FDE434489DE8746E71786015009E66E38A926DD", -+ "545A39176196575D985999366E6AD34CE0A77CD7127B06BE", -+ "155555555555555555555555610C0B196812BFB6288A3EA3", -+ 6, nameSplitPattern); -+ -+ add("X9.62 c2tnb239v1", "1.2.840.10045.3.0.11", B, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "32010857077C5431123A46B808906756F543423E8D27877578125778AC76", -+ "790408F2EEDAF392B012EDEFB3392F30F4327C0CA3F31FC383C422AA8C16", -+ "57927098FA932E7C0A96D3FD5B706EF7E5F5C156E16B7E7C86038552E91D", -+ "61D8EE5077C33FECF6F1A16B268DE469C3C7744EA9A971649FC7A9616305", -+ "2000000000000000000000000000000F4D42FFE1492A4993F1CAD666E447", -+ 4, nameSplitPattern); -+ -+ add("X9.62 c2tnb239v2", "1.2.840.10045.3.0.12", B, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "4230017757A767FAE42398569B746325D45313AF0766266479B75654E65F", -+ "5037EA654196CFF0CD82B2C14A2FCF2E3FF8775285B545722F03EACDB74B", -+ "28F9D04E900069C8DC47A08534FE76D2B900B7D7EF31F5709F200C4CA205", -+ "5667334C45AFF3B5A03BAD9DD75E2C71A99362567D5453F7FA6E227EC833", -+ "1555555555555555555555555555553C6F2885259C31E3FCDF154624522D", -+ 6, nameSplitPattern); -+ -+ add("X9.62 c2tnb239v3", "1.2.840.10045.3.0.13", B, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "01238774666A67766D6676F778E676B66999176666E687666D8766C66A9F", -+ "6A941977BA9F6A435199ACFC51067ED587F519C5ECB541B8E44111DE1D40", -+ "70F6E9D04D289C4E89913CE3530BFDE903977D42B146D539BF1BDE4E9C92", -+ "2E5A0EAF6E5E1305B9004DCE5C0ED7FE59A35608F33837C816D80B79F461", -+ "0CCCCCCCCCCCCCCCCCCCCCCCCCCCCCAC4912D2D9DF903EF9888B8A0E4CFF", -+ 0xA, nameSplitPattern); -+ -+ add("X9.62 c2tnb359v1", "1.2.840.10045.3.0.18", B, -+ "800000000000000000000000000000000000000000000000000000000000000000000000100000000000000001", -+ "5667676A654B20754F356EA92017D946567C46675556F19556A04616B567D223A5E05656FB549016A96656A557", -+ "2472E2D0197C49363F1FE7F5B6DB075D52B6947D135D8CA445805D39BC345626089687742B6329E70680231988", -+ "3C258EF3047767E7EDE0F1FDAA79DAEE3841366A132E163ACED4ED2401DF9C6BDCDE98E8E707C07A2239B1B097", -+ "53D7E08529547048121E9C95F3791DD804963948F34FAE7BF44EA82365DC7868FE57E4AE2DE211305A407104BD", -+ "01AF286BCA1AF286BCA1AF286BCA1AF286BCA1AF286BC9FB8F6B85C556892C20A7EB964FE7719E74F490758D3B", -+ 0x4C, nameSplitPattern); -+ -+ add("X9.62 c2tnb431r1", "1.2.840.10045.3.0.20", B, -+ "800000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000001", -+ "1A827EF00DD6FC0E234CAF046C6A5D8A85395B236CC4AD2CF32A0CADBDC9DDF620B0EB9906D0957F6C6FEACD615468DF104DE296CD8F", -+ "10D9B4A3D9047D8B154359ABFB1B7F5485B04CEB868237DDC9DEDA982A679A5A919B626D4E50A8DD731B107A9962381FB5D807BF2618", -+ "120FC05D3C67A99DE161D2F4092622FECA701BE4F50F4758714E8A87BBF2A658EF8C21E7C5EFE965361F6C2999C0C247B0DBD70CE6B7", -+ "20D0AF8903A96F8D5FA2C255745D3C451B302C9346D9B7E485E7BCE41F6B591F3E8F6ADDCBB0BC4C2F947A7DE1A89B625D6A598B3760", -+ "0340340340340340340340340340340340340340340340340340340323C313FAB50589703B5EC68D3587FEC60D161CC149C1AD4A91", -+ 0x2760, nameSplitPattern); -+ -+ /* ANSI X9.62 binary curves from the 1998 standard but forbidden -+ * in the 2005 version of the standard. -+ * We don't register them but leave them here for the time being in -+ * case we need to support them after all. -+ */ -+/* -+ add("X9.62 c2pnb163v1", "1.2.840.10045.3.0.1", B, -+ "080000000000000000000000000000000000000107", -+ "072546B5435234A422E0789675F432C89435DE5242", -+ "00C9517D06D5240D3CFF38C74B20B6CD4D6F9DD4D9", -+ "07AF69989546103D79329FCC3D74880F33BBE803CB", -+ "01EC23211B5966ADEA1D3F87F7EA5848AEF0B7CA9F", -+ "0400000000000000000001E60FC8821CC74DAEAFC1", -+ 2, nameSplitPattern); -+ -+ add("X9.62 c2pnb163v2", "1.2.840.10045.3.0.2", B, -+ "080000000000000000000000000000000000000107", -+ "0108B39E77C4B108BED981ED0E890E117C511CF072", -+ "0667ACEB38AF4E488C407433FFAE4F1C811638DF20", -+ "0024266E4EB5106D0A964D92C4860E2671DB9B6CC5", -+ "079F684DDF6684C5CD258B3890021B2386DFD19FC5", -+ "03FFFFFFFFFFFFFFFFFFFDF64DE1151ADBB78F10A7", -+ 2, nameSplitPattern); -+ -+ add("X9.62 c2pnb163v3", "1.2.840.10045.3.0.3", B, -+ "080000000000000000000000000000000000000107", -+ "07A526C63D3E25A256A007699F5447E32AE456B50E", -+ "03F7061798EB99E238FD6F1BF95B48FEEB4854252B", -+ "02F9F87B7C574D0BDECF8A22E6524775F98CDEBDCB", -+ "05B935590C155E17EA48EB3FF3718B893DF59A05D0", -+ "03FFFFFFFFFFFFFFFFFFFE1AEE140F110AFF961309", -+ 2, nameSplitPattern); -+ -+ add("X9.62 c2pnb176w1", "1.2.840.10045.3.0.4", B, -+ "0100000000000000000000000000000000080000000007", -+ "E4E6DB2995065C407D9D39B8D0967B96704BA8E9C90B", -+ "5DDA470ABE6414DE8EC133AE28E9BBD7FCEC0AE0FFF2", -+ "8D16C2866798B600F9F08BB4A8E860F3298CE04A5798", -+ "6FA4539C2DADDDD6BAB5167D61B436E1D92BB16A562C", -+ "00010092537397ECA4F6145799D62B0A19CE06FE26AD", -+ 0xFF6E, nameSplitPattern); -+ -+ add("X9.62 c2pnb208w1", "1.2.840.10045.3.0.10", B, -+ "010000000000000000000000000000000800000000000000000007", -+ "0000000000000000000000000000000000000000000000000000", -+ "C8619ED45A62E6212E1160349E2BFA844439FAFC2A3FD1638F9E", -+ "89FDFBE4ABE193DF9559ECF07AC0CE78554E2784EB8C1ED1A57A", -+ "0F55B51A06E78E9AC38A035FF520D8B01781BEB1A6BB08617DE3", -+ "000101BAF95C9723C57B6C21DA2EFF2D5ED588BDD5717E212F9D", -+ 0xFE48, nameSplitPattern); -+ -+ add("X9.62 c2pnb272w1", "1.2.840.10045.3.0.16", B, -+ "010000000000000000000000000000000000000000000000000000010000000000000B", -+ "91A091F03B5FBA4AB2CCF49C4EDD220FB028712D42BE752B2C40094DBACDB586FB20", -+ "7167EFC92BB2E3CE7C8AAAFF34E12A9C557003D7C73A6FAF003F99F6CC8482E540F7", -+ "6108BABB2CEEBCF787058A056CBE0CFE622D7723A289E08A07AE13EF0D10D171DD8D", -+ "10C7695716851EEF6BA7F6872E6142FBD241B830FF5EFCACECCAB05E02005DDE9D23", -+ "000100FAF51354E0E39E4892DF6E319C72C8161603FA45AA7B998A167B8F1E629521", -+ 0xFF06, nameSplitPattern); -+ -+ add("X9.62 c2pnb304w1", "1.2.840.10045.3.0.17", B, -+ "010000000000000000000000000000000000000000000000000000000000000000000000000807", -+ "FD0D693149A118F651E6DCE6802085377E5F882D1B510B44160074C1288078365A0396C8E681", -+ "BDDB97E555A50A908E43B01C798EA5DAA6788F1EA2794EFCF57166B8C14039601E55827340BE", -+ "197B07845E9BE2D96ADB0F5F3C7F2CFFBD7A3EB8B6FEC35C7FD67F26DDF6285A644F740A2614", -+ "E19FBEB76E0DA171517ECF401B50289BF014103288527A9B416A105E80260B549FDC1B92C03B", -+ "000101D556572AABAC800101D556572AABAC8001022D5C91DD173F8FB561DA6899164443051D", -+ 0xFE2E, nameSplitPattern); -+ -+ add("X9.62 c2pnb368w1", "1.2.840.10045.3.0.19", B, -+ "0100000000000000000000000000000000000000000000000000000000000000000000002000000000000000000007", -+ "E0D2EE25095206F5E2A4F9ED229F1F256E79A0E2B455970D8D0D865BD94778C576D62F0AB7519CCD2A1A906AE30D", -+ "FC1217D4320A90452C760A58EDCD30C8DD069B3C34453837A34ED50CB54917E1C2112D84D164F444F8F74786046A", -+ "1085E2755381DCCCE3C1557AFA10C2F0C0C2825646C5B34A394CBCFA8BC16B22E7E789E927BE216F02E1FB136A5F", -+ "7B3EB1BDDCBA62D5D8B2059B525797FC73822C59059C623A45FF3843CEE8F87CD1855ADAA81E2A0750B80FDA2310", -+ "00010090512DA9AF72B08349D98A5DD4C7B0532ECA51CE03E2D10F3B7AC579BD87E909AE40A6F131E9CFCE5BD967", -+ 0xFF70, nameSplitPattern); -+*/ -+ -+ /* -+ * Brainpool curves (RFC 5639) -+ * (Twisted curves are not included) -+ */ -+ -+ add("brainpoolP160r1", "1.3.36.3.3.2.8.1.1.1", P, -+ "E95E4A5F737059DC60DFC7AD95B3D8139515620F", -+ "340E7BE2A280EB74E2BE61BADA745D97E8F7C300", -+ "1E589A8595423412134FAA2DBDEC95C8D8675E58", -+ "BED5AF16EA3F6A4F62938C4631EB5AF7BDBCDBC3", -+ "1667CB477A1A8EC338F94741669C976316DA6321", -+ "E95E4A5F737059DC60DF5991D45029409E60FC09", -+ 1, nameSplitPattern); -+ -+ add("brainpoolP192r1", "1.3.36.3.3.2.8.1.1.3", P, -+ "C302F41D932A36CDA7A3463093D18DB78FCE476DE1A86297", -+ "6A91174076B1E0E19C39C031FE8685C1CAE040E5C69A28EF", -+ "469A28EF7C28CCA3DC721D044F4496BCCA7EF4146FBF25C9", -+ "C0A0647EAAB6A48753B033C56CB0F0900A2F5C4853375FD6", -+ "14B690866ABD5BB88B5F4828C1490002E6773FA2FA299B8F", -+ "C302F41D932A36CDA7A3462F9E9E916B5BE8F1029AC4ACC1", -+ 1, nameSplitPattern); -+ -+ add("brainpoolP224r1", "1.3.36.3.3.2.8.1.1.5", P, -+ "D7C134AA264366862A18302575D1D787B09F075797DA89F57EC8C0FF", -+ "68A5E62CA9CE6C1C299803A6C1530B514E182AD8B0042A59CAD29F43", -+ "2580F63CCFE44138870713B1A92369E33E2135D266DBB372386C400B", -+ "0D9029AD2C7E5CF4340823B2A87DC68C9E4CE3174C1E6EFDEE12C07D", -+ "58AA56F772C0726F24C6B89E4ECDAC24354B9E99CAA3F6D3761402CD", -+ "D7C134AA264366862A18302575D0FB98D116BC4B6DDEBCA3A5A7939F", -+ 1, nameSplitPattern); -+ -+ add("brainpoolP256r1", "1.3.36.3.3.2.8.1.1.7", P, -+ "A9FB57DBA1EEA9BC3E660A909D838D726E3BF623D52620282013481D1F6E5377", -+ "7D5A0975FC2C3057EEF67530417AFFE7FB8055C126DC5C6CE94A4B44F330B5D9", -+ "26DC5C6CE94A4B44F330B5D9BBD77CBF958416295CF7E1CE6BCCDC18FF8C07B6", -+ "8BD2AEB9CB7E57CB2C4B482FFC81B7AFB9DE27E1E3BD23C23A4453BD9ACE3262", -+ "547EF835C3DAC4FD97F8461A14611DC9C27745132DED8E545C1D54C72F046997", -+ "A9FB57DBA1EEA9BC3E660A909D838D718C397AA3B561A6F7901E0E82974856A7", -+ 1, nameSplitPattern); -+ -+ add("brainpoolP320r1", "1.3.36.3.3.2.8.1.1.9", P, -+ "D35E472036BC4FB7E13C785ED201E065F98FCFA6F6F40DEF4F92B9EC7893EC28FCD412B1F1B32E27", -+ "3EE30B568FBAB0F883CCEBD46D3F3BB8A2A73513F5EB79DA66190EB085FFA9F492F375A97D860EB4", -+ "520883949DFDBC42D3AD198640688A6FE13F41349554B49ACC31DCCD884539816F5EB4AC8FB1F1A6", -+ "43BD7E9AFB53D8B85289BCC48EE5BFE6F20137D10A087EB6E7871E2A10A599C710AF8D0D39E20611", -+ "14FDD05545EC1CC8AB4093247F77275E0743FFED117182EAA9C77877AAAC6AC7D35245D1692E8EE1", -+ "D35E472036BC4FB7E13C785ED201E065F98FCFA5B68F12A32D482EC7EE8658E98691555B44C59311", -+ 1, nameSplitPattern); -+ -+ add("brainpoolP384r1", "1.3.36.3.3.2.8.1.1.11", P, -+ "8CB91E82A3386D280F5D6F7E50E641DF152F7109ED5456B412B1DA197FB71123ACD3A729901D1A71874700133107EC53", -+ "7BC382C63D8C150C3C72080ACE05AFA0C2BEA28E4FB22787139165EFBA91F90F8AA5814A503AD4EB04A8C7DD22CE2826", -+ "04A8C7DD22CE28268B39B55416F0447C2FB77DE107DCD2A62E880EA53EEB62D57CB4390295DBC9943AB78696FA504C11", -+ "1D1C64F068CF45FFA2A63A81B7C13F6B8847A3E77EF14FE3DB7FCAFE0CBD10E8E826E03436D646AAEF87B2E247D4AF1E", -+ "8ABE1D7520F9C2A45CB1EB8E95CFD55262B70B29FEEC5864E19C054FF99129280E4646217791811142820341263C5315", -+ "8CB91E82A3386D280F5D6F7E50E641DF152F7109ED5456B31F166E6CAC0425A7CF3AB6AF6B7FC3103B883202E9046565", -+ 1, nameSplitPattern); -+ -+ add("brainpoolP512r1", "1.3.36.3.3.2.8.1.1.13", P, -+ "AADD9DB8DBE9C48B3FD4E6AE33C9FC07CB308DB3B3C9D20ED6639CCA703308717D4D9B009BC66842AECDA12AE6A380E62881FF2F2D82C68528AA6056583A48F3", -+ "7830A3318B603B89E2327145AC234CC594CBDD8D3DF91610A83441CAEA9863BC2DED5D5AA8253AA10A2EF1C98B9AC8B57F1117A72BF2C7B9E7C1AC4D77FC94CA", -+ "3DF91610A83441CAEA9863BC2DED5D5AA8253AA10A2EF1C98B9AC8B57F1117A72BF2C7B9E7C1AC4D77FC94CADC083E67984050B75EBAE5DD2809BD638016F723", -+ "81AEE4BDD82ED9645A21322E9C4C6A9385ED9F70B5D916C1B43B62EEF4D0098EFF3B1F78E2D0D48D50D1687B93B97D5F7C6D5047406A5E688B352209BCB9F822", -+ "7DDE385D566332ECC0EABFA9CF7822FDF209F70024A57B1AA000C55B881F8111B2DCDE494A5F485E5BCA4BD88A2763AED1CA2B2FA8F0540678CD1E0F3AD80892", -+ "AADD9DB8DBE9C48B3FD4E6AE33C9FC07CB308DB3B3C9D20ED6639CCA70330870553E5C414CA92619418661197FAC10471DB1D381085DDADDB58796829CA90069", -+ 1, nameSplitPattern); -+ - specCollection = Collections.unmodifiableCollection(oidMap.values()); - } - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/share/conf/security/java.security jdk11u-ls/src/java.base/share/conf/security/java.security ---- openjdk/src/java.base/share/conf/security/java.security 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/java.base/share/conf/security/java.security 2023-11-01 09:34:26.009945839 +0800 -@@ -505,7 +505,16 @@ - # in the jdk.[tls|certpath|jar].disabledAlgorithms properties. To include this - # list in any of the disabledAlgorithms properties, add the property name as - # an entry. --jdk.disabled.namedCurves = secp256k1 -+jdk.disabled.namedCurves = secp112r1, secp112r2, secp128r1, secp128r2, \ -+ secp160k1, secp160r1, secp160r2, secp192k1, secp192r1, secp224k1, \ -+ secp224r1, secp256k1, sect113r1, sect113r2, sect131r1, sect131r2, \ -+ sect163k1, sect163r1, sect163r2, sect193r1, sect193r2, sect233k1, \ -+ sect233r1, sect239k1, sect283k1, sect283r1, sect409k1, sect409r1, \ -+ sect571k1, sect571r1, X9.62 c2tnb191v1, X9.62 c2tnb191v2, \ -+ X9.62 c2tnb191v3, X9.62 c2tnb239v1, X9.62 c2tnb239v2, X9.62 c2tnb239v3, \ -+ X9.62 c2tnb359v1, X9.62 c2tnb431r1, X9.62 prime192v2, X9.62 prime192v3, \ -+ X9.62 prime239v1, X9.62 prime239v2, X9.62 prime239v3, brainpoolP256r1, \ -+ brainpoolP320r1, brainpoolP384r1, brainpoolP512r1 - - # - # Algorithm restrictions for certification path (CertPath) processing -@@ -743,7 +752,7 @@ - # - # Example: - # jdk.tls.disabledAlgorithms=MD5, SSLv3, DSA, RSA keySize < 2048, \ --# rsa_pkcs1_sha1 -+# rsa_pkcs1_sha1, secp224r1 - jdk.tls.disabledAlgorithms=SSLv3, TLSv1, TLSv1.1, RC4, DES, MD5withRSA, \ - DH keySize < 1024, EC keySize < 224, 3DES_EDE_CBC, anon, NULL, \ - include jdk.disabled.namedCurves -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c jdk11u-ls/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c ---- openjdk/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c 2022-10-12 23:00:02.000000000 +0800 -+++ jdk11u-ls/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c 2023-09-12 13:54:24.761573760 +0800 -@@ -612,7 +612,15 @@ - JNU_ThrowInternalError(env, "should not reach here"); - return; - } -+ -+#ifdef __mips__ -+ // __NR_newfstatat is incorrect on Loongnix -+ // workaround it using glibc's fstatat64 -+ RESTARTABLE(fstatat64((int)dfd, path, &buf, (int)flag), err); -+#else - RESTARTABLE((*my_fstatat64_func)((int)dfd, path, &buf, (int)flag), err); -+#endif -+ - if (err == -1) { - throwUnixException(env, errno); - } else { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java jdk11u-ls/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java ---- openjdk/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java 2023-09-12 13:54:25.881575168 +0800 -@@ -171,6 +171,149 @@ - static { - ecCurveDefinitions.add( - new ECCurveDefinition( -+ "secp112r1", -+ "1.3.132.0.6", -+ "db7c2abf62e35e668076bead208b", -+ "db7c2abf62e35e668076bead2088", -+ "659ef8ba043916eede8911702b22", -+ "09487239995a5ee76b55f9c2f098", -+ "a89ce5af8724c0a23e0e0ff77500", -+ "db7c2abf62e35e7628dfac6561c5", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp112r2", -+ "1.3.132.0.7", -+ "db7c2abf62e35e668076bead208b", -+ "6127c24c05f38a0aaaf65c0ef02c", -+ "51def1815db5ed74fcc34c85d709", -+ "4ba30ab5e892b4e1649dd0928643", -+ "adcd46f5882e3747def36e956e97", -+ "36df0aafd8b8d7597ca10520d04b", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp128r1", -+ "1.3.132.0.28", -+ "fffffffdffffffffffffffffffffffff", -+ "fffffffdfffffffffffffffffffffffc", -+ "e87579c11079f43dd824993c2cee5ed3", -+ "161ff7528b899b2d0c28607ca52c5b86", -+ "cf5ac8395bafeb13c02da292dded7a83", -+ "fffffffe0000000075a30d1b9038a115", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp128r2", -+ "1.3.132.0.29", -+ "fffffffdffffffffffffffffffffffff", -+ "d6031998d1b3bbfebf59cc9bbff9aee1", -+ "5eeefca380d02919dc2c6558bb6d8a5d", -+ "7b6aa5d85e572983e6fb32a7cdebc140", -+ "27b6916a894d3aee7106fe805fc34b44", -+ "3fffffff7fffffffbe0024720613b5a3", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp160k1", -+ "1.3.132.0.9", -+ "fffffffffffffffffffffffffffffffeffffac73", -+ "0000000000000000000000000000000000000000", -+ "0000000000000000000000000000000000000007", -+ "3b4c382ce37aa192a4019e763036f4f5dd4d7ebb", -+ "938cf935318fdced6bc28286531733c3f03c4fee", -+ "0100000000000000000001b8fa16dfab9aca16b6b3", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp160r1", -+ "1.3.132.0.8", -+ "ffffffffffffffffffffffffffffffff7fffffff", -+ "ffffffffffffffffffffffffffffffff7ffffffc", -+ "1c97befc54bd7a8b65acf89f81d4d4adc565fa45", -+ "4a96b5688ef573284664698968c38bb913cbfc82", -+ "23a628553168947d59dcc912042351377ac5fb32", -+ "0100000000000000000001f4c8f927aed3ca752257", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp160r2", -+ "1.3.132.0.30", -+ "fffffffffffffffffffffffffffffffeffffac73", -+ "fffffffffffffffffffffffffffffffeffffac70", -+ "b4e134d3fb59eb8bab57274904664d5af50388ba", -+ "52dcb034293a117e1f4ff11b30f7199d3144ce6d", -+ "feaffef2e331f296e071fa0df9982cfea7d43f2e", -+ "0100000000000000000000351ee786a818f3a1a16b", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp192k1", -+ "1.3.132.0.31", -+ "fffffffffffffffffffffffffffffffffffffffeffffee37", -+ "000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000003", -+ "db4ff10ec057e9ae26b07d0280b7f4341da5d1b1eae06c7d", -+ "9b2f2f6d9c5628a7844163d015be86344082aa88d95e2f9d", -+ "fffffffffffffffffffffffe26f2fc170f69466a74defd8d", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp192r1 [NIST P-192, X9.62 prime192v1]", -+ "1.2.840.10045.3.1.1", -+ "fffffffffffffffffffffffffffffffeffffffffffffffff", -+ "fffffffffffffffffffffffffffffffefffffffffffffffc", -+ "64210519e59c80e70fa7e9ab72243049feb8deecc146b9b1", -+ "188da80eb03090f67cbf20eb43a18800f4ff0afd82ff1012", -+ "07192b95ffc8da78631011ed6b24cdd573f977a11e794811", -+ "ffffffffffffffffffffffff99def836146bc9b1b4d22831", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp224k1", -+ "1.3.132.0.32", -+ "fffffffffffffffffffffffffffffffffffffffffffffffeffffe56d", -+ "00000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000005", -+ "a1455b334df099df30fc28a169a467e9e47075a90f7e650eb6b7a45c", -+ "7e089fed7fba344282cafbd6f7e319f7c0b0bd59e2ca4bdb556d61a5", -+ "010000000000000000000000000001dce8d2ec6184caf0a971769fb1f7", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp224r1 [NIST P-224]", -+ "1.3.132.0.33", -+ "ffffffffffffffffffffffffffffffff000000000000000000000001", -+ "fffffffffffffffffffffffffffffffefffffffffffffffffffffffe", -+ "b4050a850c04b3abf54132565044b0b7d7bfd8ba270b39432355ffb4", -+ "b70e0cbd6bb4bf7f321390b94a03c1d356c21122343280d6115c1d21", -+ "bd376388b5f723fb4c22dfe6cd4375a05a07476444d5819985007e34", -+ "ffffffffffffffffffffffffffff16a2e0b8f03e13dd29455c5c2a3d", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( - "secp256k1", - "1.3.132.0.10", - "fffffffffffffffffffffffffffffffffffffffffffffffffffffffefffffc2f", -@@ -220,6 +363,409 @@ - "01fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffa51868783bf2f966b7fcc0148f709a5d03bb5c9b8899c47aebb6fb71e91386409", - 1) - ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime192v2", -+ "1.2.840.10045.3.1.2", -+ "fffffffffffffffffffffffffffffffeffffffffffffffff", -+ "fffffffffffffffffffffffffffffffefffffffffffffffc", -+ "cc22d6dfb95c6b25e49c0d6364a4e5980c393aa21668d953", -+ "eea2bae7e1497842f2de7769cfe9c989c072ad696f48034a", -+ "6574d11d69b6ec7a672bb82a083df2f2b0847de970b2de15", -+ "fffffffffffffffffffffffe5fb1a724dc80418648d8dd31", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime192v3", -+ "1.2.840.10045.3.1.3", -+ "fffffffffffffffffffffffffffffffeffffffffffffffff", -+ "fffffffffffffffffffffffffffffffefffffffffffffffc", -+ "22123dc2395a05caa7423daeccc94760a7d462256bd56916", -+ "7d29778100c65a1da1783716588dce2b8b4aee8e228f1896", -+ "38a90f22637337334b49dcb66a6dc8f9978aca7648a943b0", -+ "ffffffffffffffffffffffff7a62d031c83f4294f640ec13", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime239v1", -+ "1.2.840.10045.3.1.4", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007fffffffffff", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007ffffffffffc", -+ "6b016c3bdcf18941d0d654921475ca71a9db2fb27d1d37796185c2942c0a", -+ "0ffa963cdca8816ccc33b8642bedf905c3d358573d3f27fbbd3b3cb9aaaf", -+ "7debe8e4e90a5dae6e4054ca530ba04654b36818ce226b39fccb7b02f1ae", -+ "7fffffffffffffffffffffff7fffff9e5e9a9f5d9071fbd1522688909d0b", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime239v2", -+ "1.2.840.10045.3.1.5", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007fffffffffff", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007ffffffffffc", -+ "617fab6832576cbbfed50d99f0249c3fee58b94ba0038c7ae84c8c832f2c", -+ "38af09d98727705120c921bb5e9e26296a3cdcf2f35757a0eafd87b830e7", -+ "5b0125e4dbea0ec7206da0fc01d9b081329fb555de6ef460237dff8be4ba", -+ "7fffffffffffffffffffffff800000cfa7e8594377d414c03821bc582063", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime239v3", -+ "1.2.840.10045.3.1.6", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007fffffffffff", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007ffffffffffc", -+ "255705fa2a306654b1f4cb03d6a750a30c250102d4988717d9ba15ab6d3e", -+ "6768ae8e18bb92cfcf005c949aa2c6d94853d0e660bbf854b1c9505fe95a", -+ "1607e6898f390c06bc1d552bad226f3b6fcfe48b6e818499af18e3ed6cf3", -+ "7fffffffffffffffffffffff7fffff975deb41b3a6057c3c432146526551", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect113r1", -+ "1.3.132.0.4", -+ "020000000000000000000000000201", -+ "003088250ca6e7c7fe649ce85820f7", -+ "00e8bee4d3e2260744188be0e9c723", -+ "009d73616f35f4ab1407d73562c10f", -+ "00a52830277958ee84d1315ed31886", -+ "0100000000000000d9ccec8a39e56f", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect113r2", -+ "1.3.132.0.5", -+ "020000000000000000000000000201", -+ "00689918dbec7e5a0dd6dfc0aa55c7", -+ "0095e9a9ec9b297bd4bf36e059184f", -+ "01a57a6a7b26ca5ef52fcdb8164797", -+ "00b3adc94ed1fe674c06e695baba1d", -+ "010000000000000108789b2496af93", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect131r1", -+ "1.3.132.0.22", -+ "080000000000000000000000000000010d", -+ "07a11b09a76b562144418ff3ff8c2570b8", -+ "0217c05610884b63b9c6c7291678f9d341", -+ "0081baf91fdf9833c40f9c181343638399", -+ "078c6e7ea38c001f73c8134b1b4ef9e150", -+ "0400000000000000023123953a9464b54d", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect131r2", -+ "1.3.132.0.23", -+ "080000000000000000000000000000010d", -+ "03e5a88919d7cafcbf415f07c2176573b2", -+ "04b8266a46c55657ac734ce38f018f2192", -+ "0356dcd8f2f95031ad652d23951bb366a8", -+ "0648f06d867940a5366d9e265de9eb240f", -+ "0400000000000000016954a233049ba98f", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect163k1 [NIST K-163]", -+ "1.3.132.0.1", -+ "0800000000000000000000000000000000000000c9", -+ "000000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000001", -+ "02fe13c0537bbc11acaa07d793de4e6d5e5c94eee8", -+ "0289070fb05d38ff58321f2e800536d538ccdaa3d9", -+ "04000000000000000000020108a2e0cc0d99f8a5ef", -+ 2) -+ ); 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All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for binary polynomial field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Sheueling Chang-Shantz , -+ * Stephen Fung , and -+ * Douglas Stebila , Sun Microsystems Laboratories. -+ * -+ *********************************************************************** */ -+ -+#include "ec2.h" -+#include "mp_gf2m.h" -+#include "mp_gf2m-priv.h" -+#include "mpi.h" -+#include "mpi-priv.h" -+#ifndef _KERNEL -+#include -+#endif -+ -+/* Fast reduction for polynomials over a 163-bit curve. Assumes reduction -+ * polynomial with terms {163, 7, 6, 3, 0}. */ -+mp_err -+ec_GF2m_163_mod(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit *u, z; -+ -+ if (a != r) { -+ MP_CHECKOK(mp_copy(a, r)); -+ } -+#ifdef ECL_SIXTY_FOUR_BIT -+ if (MP_USED(r) < 6) { -+ MP_CHECKOK(s_mp_pad(r, 6)); -+ } -+ u = MP_DIGITS(r); -+ MP_USED(r) = 6; -+ -+ /* u[5] only has 6 significant bits */ -+ z = u[5]; -+ u[2] ^= (z << 36) ^ (z << 35) ^ (z << 32) ^ (z << 29); -+ z = u[4]; -+ u[2] ^= (z >> 28) ^ (z >> 29) ^ (z >> 32) ^ (z >> 35); -+ u[1] ^= (z << 36) ^ (z << 35) ^ (z << 32) ^ (z << 29); -+ z = u[3]; -+ u[1] ^= (z >> 28) ^ (z >> 29) ^ (z >> 32) ^ (z >> 35); -+ u[0] ^= (z << 36) ^ (z << 35) ^ (z << 32) ^ (z << 29); -+ z = u[2] >> 35; /* z only has 29 significant bits */ -+ u[0] ^= (z << 7) ^ (z << 6) ^ (z << 3) ^ z; -+ /* clear bits above 163 */ -+ u[5] = u[4] = u[3] = 0; -+ u[2] ^= z << 35; -+#else -+ if (MP_USED(r) < 11) { -+ MP_CHECKOK(s_mp_pad(r, 11)); -+ } -+ u = MP_DIGITS(r); -+ MP_USED(r) = 11; -+ -+ /* u[11] only has 6 significant bits */ -+ z = u[10]; -+ u[5] ^= (z << 4) ^ (z << 3) ^ z ^ (z >> 3); -+ u[4] ^= (z << 29); -+ z = u[9]; -+ u[5] ^= (z >> 28) ^ (z >> 29); -+ u[4] ^= (z << 4) ^ (z << 3) ^ z ^ (z >> 3); -+ u[3] ^= (z << 29); -+ z = u[8]; -+ u[4] ^= (z >> 28) ^ (z >> 29); -+ u[3] ^= (z << 4) ^ (z << 3) ^ z ^ (z >> 3); -+ u[2] ^= (z << 29); -+ z = u[7]; -+ u[3] ^= (z >> 28) ^ (z >> 29); -+ u[2] ^= (z << 4) ^ (z << 3) ^ z ^ (z >> 3); -+ u[1] ^= (z << 29); -+ z = u[6]; -+ u[2] ^= (z >> 28) ^ (z >> 29); -+ u[1] ^= (z << 4) ^ (z << 3) ^ z ^ (z >> 3); -+ u[0] ^= (z << 29); -+ z = u[5] >> 3; /* z only has 29 significant bits */ -+ u[1] ^= (z >> 25) ^ (z >> 26); -+ u[0] ^= (z << 7) ^ (z << 6) ^ (z << 3) ^ z; -+ /* clear bits above 163 */ -+ u[11] = u[10] = u[9] = u[8] = u[7] = u[6] = 0; -+ u[5] ^= z << 3; -+#endif -+ s_mp_clamp(r); -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Fast squaring for polynomials over a 163-bit curve. Assumes reduction -+ * polynomial with terms {163, 7, 6, 3, 0}. */ -+mp_err -+ec_GF2m_163_sqr(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit *u, *v; -+ -+ v = MP_DIGITS(a); -+ -+#ifdef ECL_SIXTY_FOUR_BIT -+ if (MP_USED(a) < 3) { -+ return mp_bsqrmod(a, meth->irr_arr, r); -+ } -+ if (MP_USED(r) < 6) { -+ MP_CHECKOK(s_mp_pad(r, 6)); -+ } -+ MP_USED(r) = 6; -+#else -+ if (MP_USED(a) < 6) { -+ return mp_bsqrmod(a, meth->irr_arr, r); -+ } -+ if (MP_USED(r) < 12) { -+ MP_CHECKOK(s_mp_pad(r, 12)); -+ } -+ MP_USED(r) = 12; -+#endif -+ u = MP_DIGITS(r); -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ u[11] = gf2m_SQR1(v[5]); -+ u[10] = gf2m_SQR0(v[5]); -+ u[9] = gf2m_SQR1(v[4]); -+ u[8] = gf2m_SQR0(v[4]); -+ u[7] = gf2m_SQR1(v[3]); -+ u[6] = gf2m_SQR0(v[3]); -+#endif -+ u[5] = gf2m_SQR1(v[2]); -+ u[4] = gf2m_SQR0(v[2]); -+ u[3] = gf2m_SQR1(v[1]); -+ u[2] = gf2m_SQR0(v[1]); -+ u[1] = gf2m_SQR1(v[0]); -+ u[0] = gf2m_SQR0(v[0]); -+ return ec_GF2m_163_mod(r, r, meth); -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Fast multiplication for polynomials over a 163-bit curve. Assumes -+ * reduction polynomial with terms {163, 7, 6, 3, 0}. */ -+mp_err -+ec_GF2m_163_mul(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit a2 = 0, a1 = 0, a0, b2 = 0, b1 = 0, b0; -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ mp_digit a5 = 0, a4 = 0, a3 = 0, b5 = 0, b4 = 0, b3 = 0; -+ mp_digit rm[6]; -+#endif -+ -+ if (a == b) { -+ return ec_GF2m_163_sqr(a, r, meth); -+ } else { -+ switch (MP_USED(a)) { -+#ifdef ECL_THIRTY_TWO_BIT -+ case 6: -+ a5 = MP_DIGIT(a, 5); -+ case 5: -+ a4 = MP_DIGIT(a, 4); -+ case 4: -+ a3 = MP_DIGIT(a, 3); -+#endif -+ case 3: -+ a2 = MP_DIGIT(a, 2); -+ case 2: -+ a1 = MP_DIGIT(a, 1); -+ default: -+ a0 = MP_DIGIT(a, 0); -+ } -+ switch (MP_USED(b)) { -+#ifdef ECL_THIRTY_TWO_BIT -+ case 6: -+ b5 = MP_DIGIT(b, 5); -+ case 5: -+ b4 = MP_DIGIT(b, 4); -+ case 4: -+ b3 = MP_DIGIT(b, 3); -+#endif -+ case 3: -+ b2 = MP_DIGIT(b, 2); -+ case 2: -+ b1 = MP_DIGIT(b, 1); -+ default: -+ b0 = MP_DIGIT(b, 0); -+ } -+#ifdef ECL_SIXTY_FOUR_BIT -+ MP_CHECKOK(s_mp_pad(r, 6)); -+ s_bmul_3x3(MP_DIGITS(r), a2, a1, a0, b2, b1, b0); -+ MP_USED(r) = 6; -+ s_mp_clamp(r); -+#else -+ MP_CHECKOK(s_mp_pad(r, 12)); -+ s_bmul_3x3(MP_DIGITS(r) + 6, a5, a4, a3, b5, b4, b3); -+ s_bmul_3x3(MP_DIGITS(r), a2, a1, a0, b2, b1, b0); -+ s_bmul_3x3(rm, a5 ^ a2, a4 ^ a1, a3 ^ a0, b5 ^ b2, b4 ^ b1, -+ b3 ^ b0); -+ rm[5] ^= MP_DIGIT(r, 5) ^ MP_DIGIT(r, 11); -+ rm[4] ^= MP_DIGIT(r, 4) ^ MP_DIGIT(r, 10); -+ rm[3] ^= MP_DIGIT(r, 3) ^ MP_DIGIT(r, 9); -+ rm[2] ^= MP_DIGIT(r, 2) ^ MP_DIGIT(r, 8); -+ rm[1] ^= MP_DIGIT(r, 1) ^ MP_DIGIT(r, 7); -+ rm[0] ^= MP_DIGIT(r, 0) ^ MP_DIGIT(r, 6); -+ MP_DIGIT(r, 8) ^= rm[5]; -+ MP_DIGIT(r, 7) ^= rm[4]; -+ MP_DIGIT(r, 6) ^= rm[3]; -+ MP_DIGIT(r, 5) ^= rm[2]; -+ MP_DIGIT(r, 4) ^= rm[1]; -+ MP_DIGIT(r, 3) ^= rm[0]; -+ MP_USED(r) = 12; -+ s_mp_clamp(r); -+#endif -+ return ec_GF2m_163_mod(r, r, meth); -+ } -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Wire in fast field arithmetic for 163-bit curves. */ -+mp_err -+ec_group_set_gf2m163(ECGroup *group, ECCurveName name) -+{ -+ group->meth->field_mod = &ec_GF2m_163_mod; -+ group->meth->field_mul = &ec_GF2m_163_mul; -+ group->meth->field_sqr = &ec_GF2m_163_sqr; -+ return MP_OKAY; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_193.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_193.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_193.c 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_193.c 2023-09-12 13:54:26.289575680 +0800 -@@ -0,0 +1,277 @@ -+/* -+ * Copyright (c) 2007, 2011, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for binary polynomial field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Sheueling Chang-Shantz , -+ * Stephen Fung , and -+ * Douglas Stebila , Sun Microsystems Laboratories. -+ * -+ *********************************************************************** */ -+ -+#include "ec2.h" -+#include "mp_gf2m.h" -+#include "mp_gf2m-priv.h" -+#include "mpi.h" -+#include "mpi-priv.h" -+#ifndef _KERNEL -+#include -+#endif -+ -+/* Fast reduction for polynomials over a 193-bit curve. Assumes reduction -+ * polynomial with terms {193, 15, 0}. */ -+mp_err -+ec_GF2m_193_mod(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit *u, z; -+ -+ if (a != r) { -+ MP_CHECKOK(mp_copy(a, r)); -+ } -+#ifdef ECL_SIXTY_FOUR_BIT -+ if (MP_USED(r) < 7) { -+ MP_CHECKOK(s_mp_pad(r, 7)); -+ } -+ u = MP_DIGITS(r); -+ MP_USED(r) = 7; -+ -+ /* u[6] only has 2 significant bits */ -+ z = u[6]; -+ u[3] ^= (z << 14) ^ (z >> 1); -+ u[2] ^= (z << 63); -+ z = u[5]; -+ u[3] ^= (z >> 50); -+ u[2] ^= (z << 14) ^ (z >> 1); -+ u[1] ^= (z << 63); -+ z = u[4]; -+ u[2] ^= (z >> 50); -+ u[1] ^= (z << 14) ^ (z >> 1); -+ u[0] ^= (z << 63); -+ z = u[3] >> 1; /* z only has 63 significant bits */ -+ u[1] ^= (z >> 49); -+ u[0] ^= (z << 15) ^ z; -+ /* clear bits above 193 */ -+ u[6] = u[5] = u[4] = 0; -+ u[3] ^= z << 1; -+#else -+ if (MP_USED(r) < 13) { -+ MP_CHECKOK(s_mp_pad(r, 13)); -+ } -+ u = MP_DIGITS(r); -+ MP_USED(r) = 13; -+ -+ /* u[12] only has 2 significant bits */ -+ z = u[12]; -+ u[6] ^= (z << 14) ^ (z >> 1); -+ u[5] ^= (z << 31); -+ z = u[11]; -+ u[6] ^= (z >> 18); -+ u[5] ^= (z << 14) ^ (z >> 1); -+ u[4] ^= (z << 31); -+ z = u[10]; -+ u[5] ^= (z >> 18); -+ u[4] ^= (z << 14) ^ (z >> 1); -+ u[3] ^= (z << 31); -+ z = u[9]; -+ u[4] ^= (z >> 18); -+ u[3] ^= (z << 14) ^ (z >> 1); -+ u[2] ^= (z << 31); -+ z = u[8]; -+ u[3] ^= (z >> 18); -+ u[2] ^= (z << 14) ^ (z >> 1); -+ u[1] ^= (z << 31); -+ z = u[7]; -+ u[2] ^= (z >> 18); -+ u[1] ^= (z << 14) ^ (z >> 1); -+ u[0] ^= (z << 31); -+ z = u[6] >> 1; /* z only has 31 significant bits */ -+ u[1] ^= (z >> 17); -+ u[0] ^= (z << 15) ^ z; -+ /* clear bits above 193 */ -+ u[12] = u[11] = u[10] = u[9] = u[8] = u[7] = 0; -+ u[6] ^= z << 1; -+#endif -+ s_mp_clamp(r); -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Fast squaring for polynomials over a 193-bit curve. Assumes reduction -+ * polynomial with terms {193, 15, 0}. */ -+mp_err -+ec_GF2m_193_sqr(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit *u, *v; -+ -+ v = MP_DIGITS(a); -+ -+#ifdef ECL_SIXTY_FOUR_BIT -+ if (MP_USED(a) < 4) { -+ return mp_bsqrmod(a, meth->irr_arr, r); -+ } -+ if (MP_USED(r) < 7) { -+ MP_CHECKOK(s_mp_pad(r, 7)); -+ } -+ MP_USED(r) = 7; -+#else -+ if (MP_USED(a) < 7) { -+ return mp_bsqrmod(a, meth->irr_arr, r); -+ } -+ if (MP_USED(r) < 13) { -+ MP_CHECKOK(s_mp_pad(r, 13)); -+ } -+ MP_USED(r) = 13; -+#endif -+ u = MP_DIGITS(r); -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ u[12] = gf2m_SQR0(v[6]); -+ u[11] = gf2m_SQR1(v[5]); -+ u[10] = gf2m_SQR0(v[5]); -+ u[9] = gf2m_SQR1(v[4]); -+ u[8] = gf2m_SQR0(v[4]); -+ u[7] = gf2m_SQR1(v[3]); -+#endif -+ u[6] = gf2m_SQR0(v[3]); -+ u[5] = gf2m_SQR1(v[2]); -+ u[4] = gf2m_SQR0(v[2]); -+ u[3] = gf2m_SQR1(v[1]); -+ u[2] = gf2m_SQR0(v[1]); -+ u[1] = gf2m_SQR1(v[0]); -+ u[0] = gf2m_SQR0(v[0]); -+ return ec_GF2m_193_mod(r, r, meth); -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Fast multiplication for polynomials over a 193-bit curve. Assumes -+ * reduction polynomial with terms {193, 15, 0}. */ -+mp_err -+ec_GF2m_193_mul(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit a3 = 0, a2 = 0, a1 = 0, a0, b3 = 0, b2 = 0, b1 = 0, b0; -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ mp_digit a6 = 0, a5 = 0, a4 = 0, b6 = 0, b5 = 0, b4 = 0; -+ mp_digit rm[8]; -+#endif -+ -+ if (a == b) { -+ return ec_GF2m_193_sqr(a, r, meth); -+ } else { -+ switch (MP_USED(a)) { -+#ifdef ECL_THIRTY_TWO_BIT -+ case 7: -+ a6 = MP_DIGIT(a, 6); -+ case 6: -+ a5 = MP_DIGIT(a, 5); -+ case 5: -+ a4 = MP_DIGIT(a, 4); -+#endif -+ case 4: -+ a3 = MP_DIGIT(a, 3); -+ case 3: -+ a2 = MP_DIGIT(a, 2); -+ case 2: -+ a1 = MP_DIGIT(a, 1); -+ default: -+ a0 = MP_DIGIT(a, 0); -+ } -+ switch (MP_USED(b)) { -+#ifdef ECL_THIRTY_TWO_BIT -+ case 7: -+ b6 = MP_DIGIT(b, 6); -+ case 6: -+ b5 = MP_DIGIT(b, 5); -+ case 5: -+ b4 = MP_DIGIT(b, 4); -+#endif -+ case 4: -+ b3 = MP_DIGIT(b, 3); -+ case 3: -+ b2 = MP_DIGIT(b, 2); -+ case 2: -+ b1 = MP_DIGIT(b, 1); -+ default: -+ b0 = MP_DIGIT(b, 0); -+ } -+#ifdef ECL_SIXTY_FOUR_BIT -+ MP_CHECKOK(s_mp_pad(r, 8)); -+ s_bmul_4x4(MP_DIGITS(r), a3, a2, a1, a0, b3, b2, b1, b0); -+ MP_USED(r) = 8; -+ s_mp_clamp(r); -+#else -+ MP_CHECKOK(s_mp_pad(r, 14)); -+ s_bmul_3x3(MP_DIGITS(r) + 8, a6, a5, a4, b6, b5, b4); -+ s_bmul_4x4(MP_DIGITS(r), a3, a2, a1, a0, b3, b2, b1, b0); -+ s_bmul_4x4(rm, a3, a6 ^ a2, a5 ^ a1, a4 ^ a0, b3, b6 ^ b2, b5 ^ b1, -+ b4 ^ b0); -+ rm[7] ^= MP_DIGIT(r, 7); -+ rm[6] ^= MP_DIGIT(r, 6); -+ rm[5] ^= MP_DIGIT(r, 5) ^ MP_DIGIT(r, 13); -+ rm[4] ^= MP_DIGIT(r, 4) ^ MP_DIGIT(r, 12); -+ rm[3] ^= MP_DIGIT(r, 3) ^ MP_DIGIT(r, 11); -+ rm[2] ^= MP_DIGIT(r, 2) ^ MP_DIGIT(r, 10); -+ rm[1] ^= MP_DIGIT(r, 1) ^ MP_DIGIT(r, 9); -+ rm[0] ^= MP_DIGIT(r, 0) ^ MP_DIGIT(r, 8); -+ MP_DIGIT(r, 11) ^= rm[7]; -+ MP_DIGIT(r, 10) ^= rm[6]; -+ MP_DIGIT(r, 9) ^= rm[5]; -+ MP_DIGIT(r, 8) ^= rm[4]; -+ MP_DIGIT(r, 7) ^= rm[3]; -+ MP_DIGIT(r, 6) ^= rm[2]; -+ MP_DIGIT(r, 5) ^= rm[1]; -+ MP_DIGIT(r, 4) ^= rm[0]; -+ MP_USED(r) = 14; -+ s_mp_clamp(r); -+#endif -+ return ec_GF2m_193_mod(r, r, meth); -+ } -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Wire in fast field arithmetic for 193-bit curves. */ -+mp_err -+ec_group_set_gf2m193(ECGroup *group, ECCurveName name) -+{ -+ group->meth->field_mod = &ec_GF2m_193_mod; -+ group->meth->field_mul = &ec_GF2m_193_mul; -+ group->meth->field_sqr = &ec_GF2m_193_sqr; -+ return MP_OKAY; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_233.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_233.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_233.c 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_233.c 2023-09-12 13:54:26.289575680 +0800 -@@ -0,0 +1,300 @@ +/* -+ * Copyright (c) 2007, 2011, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for binary polynomial field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Sheueling Chang-Shantz , -+ * Stephen Fung , and -+ * Douglas Stebila , Sun Microsystems Laboratories. -+ * -+ *********************************************************************** */ -+ -+#include "ec2.h" -+#include "mp_gf2m.h" -+#include "mp_gf2m-priv.h" -+#include "mpi.h" -+#include "mpi-priv.h" -+#ifndef _KERNEL -+#include -+#endif -+ -+/* Fast reduction for polynomials over a 233-bit curve. Assumes reduction -+ * polynomial with terms {233, 74, 0}. */ -+mp_err -+ec_GF2m_233_mod(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit *u, z; -+ -+ if (a != r) { -+ MP_CHECKOK(mp_copy(a, r)); -+ } -+#ifdef ECL_SIXTY_FOUR_BIT -+ if (MP_USED(r) < 8) { -+ MP_CHECKOK(s_mp_pad(r, 8)); -+ } -+ u = MP_DIGITS(r); -+ MP_USED(r) = 8; -+ -+ /* u[7] only has 18 significant bits */ -+ z = u[7]; -+ u[4] ^= (z << 33) ^ (z >> 41); -+ u[3] ^= (z << 23); -+ z = u[6]; -+ u[4] ^= (z >> 31); -+ u[3] ^= (z << 33) ^ (z >> 41); -+ u[2] ^= (z << 23); -+ z = u[5]; -+ u[3] ^= (z >> 31); -+ u[2] ^= (z << 33) ^ (z >> 41); -+ u[1] ^= (z << 23); -+ z = u[4]; -+ u[2] ^= (z >> 31); -+ u[1] ^= (z << 33) ^ (z >> 41); -+ u[0] ^= (z << 23); -+ z = u[3] >> 41; /* z only has 23 significant bits */ -+ u[1] ^= (z << 10); -+ u[0] ^= z; -+ /* clear bits above 233 */ -+ u[7] = u[6] = u[5] = u[4] = 0; -+ u[3] ^= z << 41; -+#else -+ if (MP_USED(r) < 15) { -+ MP_CHECKOK(s_mp_pad(r, 15)); -+ } -+ u = MP_DIGITS(r); -+ MP_USED(r) = 15; -+ -+ /* u[14] only has 18 significant bits */ -+ z = u[14]; -+ u[9] ^= (z << 1); -+ u[7] ^= (z >> 9); -+ u[6] ^= (z << 23); -+ z = u[13]; -+ u[9] ^= (z >> 31); -+ u[8] ^= (z << 1); -+ u[6] ^= (z >> 9); -+ u[5] ^= (z << 23); -+ z = u[12]; -+ u[8] ^= (z >> 31); -+ u[7] ^= (z << 1); -+ u[5] ^= (z >> 9); -+ u[4] ^= (z << 23); -+ z = u[11]; -+ u[7] ^= (z >> 31); -+ u[6] ^= (z << 1); -+ u[4] ^= (z >> 9); -+ u[3] ^= (z << 23); -+ z = u[10]; -+ u[6] ^= (z >> 31); -+ u[5] ^= (z << 1); -+ u[3] ^= (z >> 9); -+ u[2] ^= (z << 23); -+ z = u[9]; -+ u[5] ^= (z >> 31); -+ u[4] ^= (z << 1); -+ u[2] ^= (z >> 9); -+ u[1] ^= (z << 23); -+ z = u[8]; -+ u[4] ^= (z >> 31); -+ u[3] ^= (z << 1); -+ u[1] ^= (z >> 9); -+ u[0] ^= (z << 23); -+ z = u[7] >> 9; /* z only has 23 significant bits */ -+ u[3] ^= (z >> 22); -+ u[2] ^= (z << 10); -+ u[0] ^= z; -+ /* clear bits above 233 */ -+ u[14] = u[13] = u[12] = u[11] = u[10] = u[9] = u[8] = 0; -+ u[7] ^= z << 9; -+#endif -+ s_mp_clamp(r); -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Fast squaring for polynomials over a 233-bit curve. Assumes reduction -+ * polynomial with terms {233, 74, 0}. */ -+mp_err -+ec_GF2m_233_sqr(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit *u, *v; -+ -+ v = MP_DIGITS(a); -+ -+#ifdef ECL_SIXTY_FOUR_BIT -+ if (MP_USED(a) < 4) { -+ return mp_bsqrmod(a, meth->irr_arr, r); -+ } -+ if (MP_USED(r) < 8) { -+ MP_CHECKOK(s_mp_pad(r, 8)); -+ } -+ MP_USED(r) = 8; -+#else -+ if (MP_USED(a) < 8) { -+ return mp_bsqrmod(a, meth->irr_arr, r); -+ } -+ if (MP_USED(r) < 15) { -+ MP_CHECKOK(s_mp_pad(r, 15)); -+ } -+ MP_USED(r) = 15; -+#endif -+ u = MP_DIGITS(r); -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ u[14] = gf2m_SQR0(v[7]); -+ u[13] = gf2m_SQR1(v[6]); -+ u[12] = gf2m_SQR0(v[6]); -+ u[11] = gf2m_SQR1(v[5]); -+ u[10] = gf2m_SQR0(v[5]); -+ u[9] = gf2m_SQR1(v[4]); -+ u[8] = gf2m_SQR0(v[4]); -+#endif -+ u[7] = gf2m_SQR1(v[3]); -+ u[6] = gf2m_SQR0(v[3]); -+ u[5] = gf2m_SQR1(v[2]); -+ u[4] = gf2m_SQR0(v[2]); -+ u[3] = gf2m_SQR1(v[1]); -+ u[2] = gf2m_SQR0(v[1]); -+ u[1] = gf2m_SQR1(v[0]); -+ u[0] = gf2m_SQR0(v[0]); -+ return ec_GF2m_233_mod(r, r, meth); -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Fast multiplication for polynomials over a 233-bit curve. Assumes -+ * reduction polynomial with terms {233, 74, 0}. */ -+mp_err -+ec_GF2m_233_mul(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit a3 = 0, a2 = 0, a1 = 0, a0, b3 = 0, b2 = 0, b1 = 0, b0; -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ mp_digit a7 = 0, a6 = 0, a5 = 0, a4 = 0, b7 = 0, b6 = 0, b5 = 0, b4 = -+ 0; -+ mp_digit rm[8]; -+#endif -+ -+ if (a == b) { -+ return ec_GF2m_233_sqr(a, r, meth); -+ } else { -+ switch (MP_USED(a)) { -+#ifdef ECL_THIRTY_TWO_BIT -+ case 8: -+ a7 = MP_DIGIT(a, 7); -+ case 7: -+ a6 = MP_DIGIT(a, 6); -+ case 6: -+ a5 = MP_DIGIT(a, 5); -+ case 5: -+ a4 = MP_DIGIT(a, 4); -+#endif -+ case 4: -+ a3 = MP_DIGIT(a, 3); -+ case 3: -+ a2 = MP_DIGIT(a, 2); -+ case 2: -+ a1 = MP_DIGIT(a, 1); -+ default: -+ a0 = MP_DIGIT(a, 0); -+ } -+ switch (MP_USED(b)) { -+#ifdef ECL_THIRTY_TWO_BIT -+ case 8: -+ b7 = MP_DIGIT(b, 7); -+ case 7: -+ b6 = MP_DIGIT(b, 6); -+ case 6: -+ b5 = MP_DIGIT(b, 5); -+ case 5: -+ b4 = MP_DIGIT(b, 4); -+#endif -+ case 4: -+ b3 = MP_DIGIT(b, 3); -+ case 3: -+ b2 = MP_DIGIT(b, 2); -+ case 2: -+ b1 = MP_DIGIT(b, 1); -+ default: -+ b0 = MP_DIGIT(b, 0); -+ } -+#ifdef ECL_SIXTY_FOUR_BIT -+ MP_CHECKOK(s_mp_pad(r, 8)); -+ s_bmul_4x4(MP_DIGITS(r), a3, a2, a1, a0, b3, b2, b1, b0); -+ MP_USED(r) = 8; -+ s_mp_clamp(r); -+#else -+ MP_CHECKOK(s_mp_pad(r, 16)); -+ s_bmul_4x4(MP_DIGITS(r) + 8, a7, a6, a5, a4, b7, b6, b5, b4); -+ s_bmul_4x4(MP_DIGITS(r), a3, a2, a1, a0, b3, b2, b1, b0); -+ s_bmul_4x4(rm, a7 ^ a3, a6 ^ a2, a5 ^ a1, a4 ^ a0, b7 ^ b3, -+ b6 ^ b2, b5 ^ b1, b4 ^ b0); -+ rm[7] ^= MP_DIGIT(r, 7) ^ MP_DIGIT(r, 15); -+ rm[6] ^= MP_DIGIT(r, 6) ^ MP_DIGIT(r, 14); -+ rm[5] ^= MP_DIGIT(r, 5) ^ MP_DIGIT(r, 13); -+ rm[4] ^= MP_DIGIT(r, 4) ^ MP_DIGIT(r, 12); -+ rm[3] ^= MP_DIGIT(r, 3) ^ MP_DIGIT(r, 11); -+ rm[2] ^= MP_DIGIT(r, 2) ^ MP_DIGIT(r, 10); -+ rm[1] ^= MP_DIGIT(r, 1) ^ MP_DIGIT(r, 9); -+ rm[0] ^= MP_DIGIT(r, 0) ^ MP_DIGIT(r, 8); -+ MP_DIGIT(r, 11) ^= rm[7]; -+ MP_DIGIT(r, 10) ^= rm[6]; -+ MP_DIGIT(r, 9) ^= rm[5]; -+ MP_DIGIT(r, 8) ^= rm[4]; -+ MP_DIGIT(r, 7) ^= rm[3]; -+ MP_DIGIT(r, 6) ^= rm[2]; -+ MP_DIGIT(r, 5) ^= rm[1]; -+ MP_DIGIT(r, 4) ^= rm[0]; -+ MP_USED(r) = 16; -+ s_mp_clamp(r); -+#endif -+ return ec_GF2m_233_mod(r, r, meth); -+ } -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Wire in fast field arithmetic for 233-bit curves. */ -+mp_err -+ec_group_set_gf2m233(ECGroup *group, ECCurveName name) -+{ -+ group->meth->field_mod = &ec_GF2m_233_mod; -+ group->meth->field_mul = &ec_GF2m_233_mul; -+ group->meth->field_sqr = &ec_GF2m_233_sqr; -+ return MP_OKAY; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_aff.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_aff.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_aff.c 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_aff.c 2023-09-12 13:54:26.289575680 +0800 -@@ -0,0 +1,349 @@ -+/* -+ * Copyright (c) 2007, 2017, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for binary polynomial field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Douglas Stebila , Sun Microsystems Laboratories -+ * -+ * Last Modified Date from the Original Code: May 2017 -+ *********************************************************************** */ -+ -+#include "ec2.h" -+#include "mplogic.h" -+#include "mp_gf2m.h" -+#ifndef _KERNEL -+#include -+#endif -+ -+/* Checks if point P(px, py) is at infinity. Uses affine coordinates. */ -+mp_err -+ec_GF2m_pt_is_inf_aff(const mp_int *px, const mp_int *py) -+{ -+ -+ if ((mp_cmp_z(px) == 0) && (mp_cmp_z(py) == 0)) { -+ return MP_YES; -+ } else { -+ return MP_NO; -+ } -+ -+} -+ -+/* Sets P(px, py) to be the point at infinity. Uses affine coordinates. */ -+mp_err -+ec_GF2m_pt_set_inf_aff(mp_int *px, mp_int *py) -+{ -+ mp_zero(px); -+ mp_zero(py); -+ return MP_OKAY; -+} -+ -+/* Computes R = P + Q based on IEEE P1363 A.10.2. Elliptic curve points P, -+ * Q, and R can all be identical. Uses affine coordinates. */ -+mp_err -+ec_GF2m_pt_add_aff(const mp_int *px, const mp_int *py, const mp_int *qx, -+ const mp_int *qy, mp_int *rx, mp_int *ry, -+ const ECGroup *group) -+{ -+ mp_err res = MP_OKAY; -+ mp_int lambda, tempx, tempy; -+ -+ MP_DIGITS(&lambda) = 0; -+ MP_DIGITS(&tempx) = 0; -+ MP_DIGITS(&tempy) = 0; -+ MP_CHECKOK(mp_init(&lambda, FLAG(px))); -+ MP_CHECKOK(mp_init(&tempx, FLAG(px))); -+ MP_CHECKOK(mp_init(&tempy, FLAG(px))); -+ /* if P = inf, then R = Q */ -+ if (ec_GF2m_pt_is_inf_aff(px, py) == 0) { -+ MP_CHECKOK(mp_copy(qx, rx)); -+ MP_CHECKOK(mp_copy(qy, ry)); -+ res = MP_OKAY; -+ goto CLEANUP; -+ } -+ /* if Q = inf, then R = P */ -+ if (ec_GF2m_pt_is_inf_aff(qx, qy) == 0) { -+ MP_CHECKOK(mp_copy(px, rx)); -+ MP_CHECKOK(mp_copy(py, ry)); -+ res = MP_OKAY; -+ goto CLEANUP; -+ } -+ /* if px != qx, then lambda = (py+qy) / (px+qx), tempx = a + lambda^2 -+ * + lambda + px + qx */ -+ if (mp_cmp(px, qx) != 0) { -+ MP_CHECKOK(group->meth->field_add(py, qy, &tempy, group->meth)); -+ MP_CHECKOK(group->meth->field_add(px, qx, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_div(&tempy, &tempx, &lambda, group->meth)); -+ MP_CHECKOK(group->meth->field_sqr(&lambda, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempx, &lambda, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempx, &group->curvea, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempx, px, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempx, qx, &tempx, group->meth)); -+ } else { -+ /* if py != qy or qx = 0, then R = inf */ -+ if (((mp_cmp(py, qy) != 0)) || (mp_cmp_z(qx) == 0)) { -+ mp_zero(rx); -+ mp_zero(ry); -+ res = MP_OKAY; -+ goto CLEANUP; -+ } -+ /* lambda = qx + qy / qx */ -+ MP_CHECKOK(group->meth->field_div(qy, qx, &lambda, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&lambda, qx, &lambda, group->meth)); -+ /* tempx = a + lambda^2 + lambda */ -+ MP_CHECKOK(group->meth->field_sqr(&lambda, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempx, &lambda, &tempx, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempx, &group->curvea, &tempx, group->meth)); -+ } -+ /* ry = (qx + tempx) * lambda + tempx + qy */ -+ MP_CHECKOK(group->meth->field_add(qx, &tempx, &tempy, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_mul(&tempy, &lambda, &tempy, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_add(&tempy, &tempx, &tempy, group->meth)); -+ MP_CHECKOK(group->meth->field_add(&tempy, qy, ry, group->meth)); -+ /* rx = tempx */ -+ MP_CHECKOK(mp_copy(&tempx, rx)); -+ -+ CLEANUP: -+ mp_clear(&lambda); -+ mp_clear(&tempx); -+ mp_clear(&tempy); -+ return res; -+} -+ -+/* Computes R = P - Q. Elliptic curve points P, Q, and R can all be -+ * identical. Uses affine coordinates. */ -+mp_err -+ec_GF2m_pt_sub_aff(const mp_int *px, const mp_int *py, const mp_int *qx, -+ const mp_int *qy, mp_int *rx, mp_int *ry, -+ const ECGroup *group) -+{ -+ mp_err res = MP_OKAY; -+ mp_int nqy; -+ -+ MP_DIGITS(&nqy) = 0; -+ MP_CHECKOK(mp_init(&nqy, FLAG(px))); -+ /* nqy = qx+qy */ -+ MP_CHECKOK(group->meth->field_add(qx, qy, &nqy, group->meth)); -+ MP_CHECKOK(group->point_add(px, py, qx, &nqy, rx, ry, group)); -+ CLEANUP: -+ mp_clear(&nqy); -+ return res; -+} -+ -+/* Computes R = 2P. Elliptic curve points P and R can be identical. Uses -+ * affine coordinates. */ -+mp_err -+ec_GF2m_pt_dbl_aff(const mp_int *px, const mp_int *py, mp_int *rx, -+ mp_int *ry, const ECGroup *group) -+{ -+ return group->point_add(px, py, px, py, rx, ry, group); -+} -+ -+/* by default, this routine is unused and thus doesn't need to be compiled */ -+#ifdef ECL_ENABLE_GF2M_PT_MUL_AFF -+/* Computes R = nP based on IEEE P1363 A.10.3. Elliptic curve points P and -+ * R can be identical. Uses affine coordinates. */ -+mp_err -+ec_GF2m_pt_mul_aff(const mp_int *n, const mp_int *px, const mp_int *py, -+ mp_int *rx, mp_int *ry, const ECGroup *group) -+{ -+ mp_err res = MP_OKAY; -+ mp_int k, k3, qx, qy, sx, sy; -+ int b1, b3, i, l; -+ -+ MP_DIGITS(&k) = 0; -+ MP_DIGITS(&k3) = 0; -+ MP_DIGITS(&qx) = 0; -+ MP_DIGITS(&qy) = 0; -+ MP_DIGITS(&sx) = 0; -+ MP_DIGITS(&sy) = 0; -+ MP_CHECKOK(mp_init(&k)); -+ MP_CHECKOK(mp_init(&k3)); -+ MP_CHECKOK(mp_init(&qx)); -+ MP_CHECKOK(mp_init(&qy)); -+ MP_CHECKOK(mp_init(&sx)); -+ MP_CHECKOK(mp_init(&sy)); -+ -+ /* if n = 0 then r = inf */ -+ if (mp_cmp_z(n) == 0) { -+ mp_zero(rx); -+ mp_zero(ry); -+ res = MP_OKAY; -+ goto CLEANUP; -+ } -+ /* Q = P, k = n */ -+ MP_CHECKOK(mp_copy(px, &qx)); -+ MP_CHECKOK(mp_copy(py, &qy)); -+ MP_CHECKOK(mp_copy(n, &k)); -+ /* if n < 0 then Q = -Q, k = -k */ -+ if (mp_cmp_z(n) < 0) { -+ MP_CHECKOK(group->meth->field_add(&qx, &qy, &qy, group->meth)); -+ MP_CHECKOK(mp_neg(&k, &k)); -+ } -+#ifdef ECL_DEBUG /* basic double and add method */ -+ l = mpl_significant_bits(&k) - 1; -+ MP_CHECKOK(mp_copy(&qx, &sx)); -+ MP_CHECKOK(mp_copy(&qy, &sy)); -+ for (i = l - 1; i >= 0; i--) { -+ /* S = 2S */ -+ MP_CHECKOK(group->point_dbl(&sx, &sy, &sx, &sy, group)); -+ /* if k_i = 1, then S = S + Q */ -+ if (mpl_get_bit(&k, i) != 0) { -+ MP_CHECKOK(group-> -+ point_add(&sx, &sy, &qx, &qy, &sx, &sy, group)); -+ } -+ } -+#else /* double and add/subtract method from -+ * standard */ -+ /* k3 = 3 * k */ -+ MP_CHECKOK(mp_set_int(&k3, 3)); -+ MP_CHECKOK(mp_mul(&k, &k3, &k3)); -+ /* S = Q */ -+ MP_CHECKOK(mp_copy(&qx, &sx)); -+ MP_CHECKOK(mp_copy(&qy, &sy)); -+ /* l = index of high order bit in binary representation of 3*k */ -+ l = mpl_significant_bits(&k3) - 1; -+ /* for i = l-1 downto 1 */ -+ for (i = l - 1; i >= 1; i--) { -+ /* S = 2S */ -+ MP_CHECKOK(group->point_dbl(&sx, &sy, &sx, &sy, group)); -+ b3 = MP_GET_BIT(&k3, i); -+ b1 = MP_GET_BIT(&k, i); -+ /* if k3_i = 1 and k_i = 0, then S = S + Q */ -+ if ((b3 == 1) && (b1 == 0)) { -+ MP_CHECKOK(group-> -+ point_add(&sx, &sy, &qx, &qy, &sx, &sy, group)); -+ /* if k3_i = 0 and k_i = 1, then S = S - Q */ -+ } else if ((b3 == 0) && (b1 == 1)) { -+ MP_CHECKOK(group-> -+ point_sub(&sx, &sy, &qx, &qy, &sx, &sy, group)); -+ } -+ } -+#endif -+ /* output S */ -+ MP_CHECKOK(mp_copy(&sx, rx)); -+ MP_CHECKOK(mp_copy(&sy, ry)); -+ -+ CLEANUP: -+ mp_clear(&k); -+ mp_clear(&k3); -+ mp_clear(&qx); -+ mp_clear(&qy); -+ mp_clear(&sx); -+ mp_clear(&sy); -+ return res; -+} -+#endif -+ -+/* Validates a point on a GF2m curve. */ -+mp_err -+ec_GF2m_validate_point(const mp_int *px, const mp_int *py, const ECGroup *group) -+{ -+ mp_err res = MP_NO; -+ mp_int accl, accr, tmp, pxt, pyt; -+ -+ MP_DIGITS(&accl) = 0; -+ MP_DIGITS(&accr) = 0; -+ MP_DIGITS(&tmp) = 0; -+ MP_DIGITS(&pxt) = 0; -+ MP_DIGITS(&pyt) = 0; -+ MP_CHECKOK(mp_init(&accl, FLAG(px))); -+ MP_CHECKOK(mp_init(&accr, FLAG(px))); -+ MP_CHECKOK(mp_init(&tmp, FLAG(px))); -+ MP_CHECKOK(mp_init(&pxt, FLAG(px))); -+ MP_CHECKOK(mp_init(&pyt, FLAG(px))); -+ -+ /* 1: Verify that publicValue is not the point at infinity */ -+ if (ec_GF2m_pt_is_inf_aff(px, py) == MP_YES) { -+ res = MP_NO; -+ goto CLEANUP; -+ } -+ /* 2: Verify that the coordinates of publicValue are elements -+ * of the field. -+ */ -+ if ((MP_SIGN(px) == MP_NEG) || (mp_cmp(px, &group->meth->irr) >= 0) || -+ (MP_SIGN(py) == MP_NEG) || (mp_cmp(py, &group->meth->irr) >= 0)) { -+ res = MP_NO; -+ goto CLEANUP; -+ } -+ /* 3: Verify that publicValue is on the curve. */ -+ if (group->meth->field_enc) { -+ group->meth->field_enc(px, &pxt, group->meth); -+ group->meth->field_enc(py, &pyt, group->meth); -+ } else { -+ mp_copy(px, &pxt); -+ mp_copy(py, &pyt); -+ } -+ /* left-hand side: y^2 + x*y */ -+ MP_CHECKOK( group->meth->field_sqr(&pyt, &accl, group->meth) ); -+ MP_CHECKOK( group->meth->field_mul(&pxt, &pyt, &tmp, group->meth) ); -+ MP_CHECKOK( group->meth->field_add(&accl, &tmp, &accl, group->meth) ); -+ /* right-hand side: x^3 + a*x^2 + b */ -+ MP_CHECKOK( group->meth->field_sqr(&pxt, &tmp, group->meth) ); -+ MP_CHECKOK( group->meth->field_mul(&pxt, &tmp, &accr, group->meth) ); -+ MP_CHECKOK( group->meth->field_mul(&group->curvea, &tmp, &tmp, group->meth) ); -+ MP_CHECKOK( group->meth->field_add(&tmp, &accr, &accr, group->meth) ); -+ MP_CHECKOK( group->meth->field_add(&accr, &group->curveb, &accr, group->meth) ); -+ /* check LHS - RHS == 0 */ -+ MP_CHECKOK( group->meth->field_add(&accl, &accr, &accr, group->meth) ); -+ if (mp_cmp_z(&accr) != 0) { -+ res = MP_NO; -+ goto CLEANUP; -+ } -+ /* 4: Verify that the order of the curve times the publicValue -+ * is the point at infinity. -+ */ -+ /* timing mitigation is not supported */ -+ MP_CHECKOK( ECPoint_mul(group, &group->order, px, py, &pxt, &pyt, /*timing*/ 0) ); -+ if (ec_GF2m_pt_is_inf_aff(&pxt, &pyt) != MP_YES) { -+ res = MP_NO; -+ goto CLEANUP; -+ } -+ -+ res = MP_YES; -+ -+CLEANUP: -+ mp_clear(&accl); -+ mp_clear(&accr); -+ mp_clear(&tmp); -+ mp_clear(&pxt); -+ mp_clear(&pyt); -+ return res; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2.h jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2.h ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2.h 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2.h 2023-09-12 13:54:26.289575680 +0800 -@@ -0,0 +1,126 @@ -+/* -+ * Copyright (c) 2007, 2017, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. + * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. + */ + -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for binary polynomial field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Douglas Stebila , Sun Microsystems Laboratories -+ * -+ * Last Modified Date from the Original Code: May 2017 -+ *********************************************************************** */ -+ -+#ifndef _EC2_H -+#define _EC2_H -+ -+#include "ecl-priv.h" -+ -+/* Checks if point P(px, py) is at infinity. Uses affine coordinates. */ -+mp_err ec_GF2m_pt_is_inf_aff(const mp_int *px, const mp_int *py); -+ -+/* Sets P(px, py) to be the point at infinity. Uses affine coordinates. */ -+mp_err ec_GF2m_pt_set_inf_aff(mp_int *px, mp_int *py); -+ -+/* Computes R = P + Q where R is (rx, ry), P is (px, py) and Q is (qx, -+ * qy). Uses affine coordinates. */ -+mp_err ec_GF2m_pt_add_aff(const mp_int *px, const mp_int *py, -+ const mp_int *qx, const mp_int *qy, mp_int *rx, -+ mp_int *ry, const ECGroup *group); -+ -+/* Computes R = P - Q. Uses affine coordinates. */ -+mp_err ec_GF2m_pt_sub_aff(const mp_int *px, const mp_int *py, -+ const mp_int *qx, const mp_int *qy, mp_int *rx, -+ mp_int *ry, const ECGroup *group); -+ -+/* Computes R = 2P. Uses affine coordinates. */ -+mp_err ec_GF2m_pt_dbl_aff(const mp_int *px, const mp_int *py, mp_int *rx, -+ mp_int *ry, const ECGroup *group); -+ -+/* Validates a point on a GF2m curve. */ -+mp_err ec_GF2m_validate_point(const mp_int *px, const mp_int *py, const ECGroup *group); -+ -+/* by default, this routine is unused and thus doesn't need to be compiled */ -+#ifdef ECL_ENABLE_GF2M_PT_MUL_AFF -+/* Computes R = nP where R is (rx, ry) and P is (px, py). The parameters -+ * a, b and p are the elliptic curve coefficients and the irreducible that -+ * determines the field GF2m. Uses affine coordinates. */ -+mp_err ec_GF2m_pt_mul_aff(const mp_int *n, const mp_int *px, -+ const mp_int *py, mp_int *rx, mp_int *ry, -+ const ECGroup *group); -+#endif -+ -+/* Computes R = nP where R is (rx, ry) and P is (px, py). The parameters -+ * a, b and p are the elliptic curve coefficients and the irreducible that -+ * determines the field GF2m. Uses Montgomery projective coordinates. */ -+mp_err ec_GF2m_pt_mul_mont(const mp_int *n, const mp_int *px, -+ const mp_int *py, mp_int *rx, mp_int *ry, -+ const ECGroup *group, int timing); -+ -+#ifdef ECL_ENABLE_GF2M_PROJ -+/* Converts a point P(px, py) from affine coordinates to projective -+ * coordinates R(rx, ry, rz). */ -+mp_err ec_GF2m_pt_aff2proj(const mp_int *px, const mp_int *py, mp_int *rx, -+ mp_int *ry, mp_int *rz, const ECGroup *group); -+ -+/* Converts a point P(px, py, pz) from projective coordinates to affine -+ * coordinates R(rx, ry). */ -+mp_err ec_GF2m_pt_proj2aff(const mp_int *px, const mp_int *py, -+ const mp_int *pz, mp_int *rx, mp_int *ry, -+ const ECGroup *group); -+ -+/* Checks if point P(px, py, pz) is at infinity. Uses projective -+ * coordinates. */ -+mp_err ec_GF2m_pt_is_inf_proj(const mp_int *px, const mp_int *py, -+ const mp_int *pz); -+ -+/* Sets P(px, py, pz) to be the point at infinity. Uses projective -+ * coordinates. */ -+mp_err ec_GF2m_pt_set_inf_proj(mp_int *px, mp_int *py, mp_int *pz); -+ -+/* Computes R = P + Q where R is (rx, ry, rz), P is (px, py, pz) and Q is -+ * (qx, qy, qz). Uses projective coordinates. */ -+mp_err ec_GF2m_pt_add_proj(const mp_int *px, const mp_int *py, -+ const mp_int *pz, const mp_int *qx, -+ const mp_int *qy, mp_int *rx, mp_int *ry, -+ mp_int *rz, const ECGroup *group); -+ -+/* Computes R = 2P. Uses projective coordinates. */ -+mp_err ec_GF2m_pt_dbl_proj(const mp_int *px, const mp_int *py, -+ const mp_int *pz, mp_int *rx, mp_int *ry, -+ mp_int *rz, const ECGroup *group); -+ -+/* Computes R = nP where R is (rx, ry) and P is (px, py). The parameters -+ * a, b and p are the elliptic curve coefficients and the prime that -+ * determines the field GF2m. Uses projective coordinates. */ -+mp_err ec_GF2m_pt_mul_proj(const mp_int *n, const mp_int *px, -+ const mp_int *py, mp_int *rx, mp_int *ry, -+ const ECGroup *group); + #include + #include "libproc.h" + #include "proc_service.h" +@@ -54,10 +61,18 @@ + #include "sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext.h" + #endif + ++#if defined(mips64) || defined(mips64el) ++#include "sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext.h" +#endif + -+#endif /* _EC2_H */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_mont.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_mont.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_mont.c 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ec2_mont.c 2023-09-12 13:54:26.289575680 +0800 -@@ -0,0 +1,278 @@ -+/* -+ * Copyright (c) 2007, 2017, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for binary polynomial field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Sheueling Chang-Shantz , -+ * Stephen Fung , and -+ * Douglas Stebila , Sun Microsystems Laboratories. -+ * -+ * Last Modified Date from the Original Code: May 2017 -+ *********************************************************************** */ -+ -+#include "ec2.h" -+#include "mplogic.h" -+#include "mp_gf2m.h" -+#ifndef _KERNEL -+#include + #ifdef aarch64 + #include "sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext.h" + #endif + ++#ifdef loongarch64 ++#include "sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext.h" +#endif + -+/* Compute the x-coordinate x/z for the point 2*(x/z) in Montgomery -+ * projective coordinates. Uses algorithm Mdouble in appendix of Lopez, J. -+ * and Dahab, R. "Fast multiplication on elliptic curves over GF(2^m) -+ * without precomputation". modified to not require precomputation of -+ * c=b^{2^{m-1}}. */ -+static mp_err -+gf2m_Mdouble(mp_int *x, mp_int *z, const ECGroup *group, int kmflag) -+{ -+ mp_err res = MP_OKAY; -+ mp_int t1; -+ -+ MP_DIGITS(&t1) = 0; -+ MP_CHECKOK(mp_init(&t1, kmflag)); -+ -+ MP_CHECKOK(group->meth->field_sqr(x, x, group->meth)); -+ MP_CHECKOK(group->meth->field_sqr(z, &t1, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(x, &t1, z, group->meth)); -+ MP_CHECKOK(group->meth->field_sqr(x, x, group->meth)); -+ MP_CHECKOK(group->meth->field_sqr(&t1, &t1, group->meth)); -+ MP_CHECKOK(group->meth-> -+ field_mul(&group->curveb, &t1, &t1, group->meth)); -+ MP_CHECKOK(group->meth->field_add(x, &t1, x, group->meth)); -+ -+ CLEANUP: -+ mp_clear(&t1); -+ return res; -+} -+ -+/* Compute the x-coordinate x1/z1 for the point (x1/z1)+(x2/x2) in -+ * Montgomery projective coordinates. Uses algorithm Madd in appendix of -+ * Lopex, J. and Dahab, R. "Fast multiplication on elliptic curves over -+ * GF(2^m) without precomputation". */ -+static mp_err -+gf2m_Madd(const mp_int *x, mp_int *x1, mp_int *z1, mp_int *x2, mp_int *z2, -+ const ECGroup *group, int kmflag) -+{ -+ mp_err res = MP_OKAY; -+ mp_int t1, t2; -+ -+ MP_DIGITS(&t1) = 0; -+ MP_DIGITS(&t2) = 0; -+ MP_CHECKOK(mp_init(&t1, kmflag)); -+ MP_CHECKOK(mp_init(&t2, kmflag)); -+ -+ MP_CHECKOK(mp_copy(x, &t1)); -+ MP_CHECKOK(group->meth->field_mul(x1, z2, x1, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(z1, x2, z1, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(x1, z1, &t2, group->meth)); -+ MP_CHECKOK(group->meth->field_add(z1, x1, z1, group->meth)); -+ MP_CHECKOK(group->meth->field_sqr(z1, z1, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(z1, &t1, x1, group->meth)); -+ MP_CHECKOK(group->meth->field_add(x1, &t2, x1, group->meth)); -+ -+ CLEANUP: -+ mp_clear(&t1); -+ mp_clear(&t2); -+ return res; -+} -+ -+/* Compute the x, y affine coordinates from the point (x1, z1) (x2, z2) -+ * using Montgomery point multiplication algorithm Mxy() in appendix of -+ * Lopex, J. and Dahab, R. "Fast multiplication on elliptic curves over -+ * GF(2^m) without precomputation". Returns: 0 on error 1 if return value -+ * should be the point at infinity 2 otherwise */ -+static int -+gf2m_Mxy(const mp_int *x, const mp_int *y, mp_int *x1, mp_int *z1, -+ mp_int *x2, mp_int *z2, const ECGroup *group) -+{ -+ mp_err res = MP_OKAY; -+ int ret = 0; -+ mp_int t3, t4, t5; -+ -+ MP_DIGITS(&t3) = 0; -+ MP_DIGITS(&t4) = 0; -+ MP_DIGITS(&t5) = 0; -+ MP_CHECKOK(mp_init(&t3, FLAG(x2))); -+ MP_CHECKOK(mp_init(&t4, FLAG(x2))); -+ MP_CHECKOK(mp_init(&t5, FLAG(x2))); -+ -+ if (mp_cmp_z(z1) == 0) { -+ mp_zero(x2); -+ mp_zero(z2); -+ ret = 1; -+ goto CLEANUP; -+ } -+ -+ if (mp_cmp_z(z2) == 0) { -+ MP_CHECKOK(mp_copy(x, x2)); -+ MP_CHECKOK(group->meth->field_add(x, y, z2, group->meth)); -+ ret = 2; -+ goto CLEANUP; -+ } -+ -+ MP_CHECKOK(mp_set_int(&t5, 1)); -+ if (group->meth->field_enc) { -+ MP_CHECKOK(group->meth->field_enc(&t5, &t5, group->meth)); -+ } -+ -+ MP_CHECKOK(group->meth->field_mul(z1, z2, &t3, group->meth)); -+ -+ MP_CHECKOK(group->meth->field_mul(z1, x, z1, group->meth)); -+ MP_CHECKOK(group->meth->field_add(z1, x1, z1, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(z2, x, z2, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(z2, x1, x1, group->meth)); -+ MP_CHECKOK(group->meth->field_add(z2, x2, z2, group->meth)); -+ -+ MP_CHECKOK(group->meth->field_mul(z2, z1, z2, group->meth)); -+ MP_CHECKOK(group->meth->field_sqr(x, &t4, group->meth)); -+ MP_CHECKOK(group->meth->field_add(&t4, y, &t4, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(&t4, &t3, &t4, group->meth)); -+ MP_CHECKOK(group->meth->field_add(&t4, z2, &t4, group->meth)); -+ -+ MP_CHECKOK(group->meth->field_mul(&t3, x, &t3, group->meth)); -+ MP_CHECKOK(group->meth->field_div(&t5, &t3, &t3, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(&t3, &t4, &t4, group->meth)); -+ MP_CHECKOK(group->meth->field_mul(x1, &t3, x2, group->meth)); -+ MP_CHECKOK(group->meth->field_add(x2, x, z2, group->meth)); -+ -+ MP_CHECKOK(group->meth->field_mul(z2, &t4, z2, group->meth)); -+ MP_CHECKOK(group->meth->field_add(z2, y, z2, group->meth)); -+ -+ ret = 2; -+ -+ CLEANUP: -+ mp_clear(&t3); -+ mp_clear(&t4); -+ mp_clear(&t5); -+ if (res == MP_OKAY) { -+ return ret; -+ } else { -+ return 0; -+ } -+} -+ -+/* Computes R = nP based on algorithm 2P of Lopex, J. and Dahab, R. "Fast -+ * multiplication on elliptic curves over GF(2^m) without -+ * precomputation". Elliptic curve points P and R can be identical. Uses -+ * Montgomery projective coordinates. The timing parameter is ignored -+ * because this algorithm resists timing attacks by default. */ -+mp_err -+ec_GF2m_pt_mul_mont(const mp_int *n, const mp_int *px, const mp_int *py, -+ mp_int *rx, mp_int *ry, const ECGroup *group, -+ int timing) -+{ -+ mp_err res = MP_OKAY; -+ mp_int x1, x2, z1, z2; -+ int i, j; -+ mp_digit top_bit, mask; -+ -+ MP_DIGITS(&x1) = 0; -+ MP_DIGITS(&x2) = 0; -+ MP_DIGITS(&z1) = 0; -+ MP_DIGITS(&z2) = 0; -+ MP_CHECKOK(mp_init(&x1, FLAG(n))); -+ MP_CHECKOK(mp_init(&x2, FLAG(n))); -+ MP_CHECKOK(mp_init(&z1, FLAG(n))); -+ MP_CHECKOK(mp_init(&z2, FLAG(n))); -+ -+ /* if result should be point at infinity */ -+ if ((mp_cmp_z(n) == 0) || (ec_GF2m_pt_is_inf_aff(px, py) == MP_YES)) { -+ MP_CHECKOK(ec_GF2m_pt_set_inf_aff(rx, ry)); -+ goto CLEANUP; -+ } -+ -+ MP_CHECKOK(mp_copy(px, &x1)); /* x1 = px */ -+ MP_CHECKOK(mp_set_int(&z1, 1)); /* z1 = 1 */ -+ MP_CHECKOK(group->meth->field_sqr(&x1, &z2, group->meth)); /* z2 = -+ * x1^2 = -+ * px^2 */ -+ MP_CHECKOK(group->meth->field_sqr(&z2, &x2, group->meth)); -+ MP_CHECKOK(group->meth->field_add(&x2, &group->curveb, &x2, group->meth)); /* x2 -+ * = -+ * px^4 -+ * + -+ * b -+ */ -+ -+ /* find top-most bit and go one past it */ -+ i = MP_USED(n) - 1; -+ j = MP_DIGIT_BIT - 1; -+ top_bit = 1; -+ top_bit <<= MP_DIGIT_BIT - 1; -+ mask = top_bit; -+ while (!(MP_DIGITS(n)[i] & mask)) { -+ mask >>= 1; -+ j--; -+ } -+ mask >>= 1; -+ j--; -+ -+ /* if top most bit was at word break, go to next word */ -+ if (!mask) { -+ i--; -+ j = MP_DIGIT_BIT - 1; -+ mask = top_bit; -+ } -+ -+ for (; i >= 0; i--) { -+ for (; j >= 0; j--) { -+ if (MP_DIGITS(n)[i] & mask) { -+ MP_CHECKOK(gf2m_Madd(px, &x1, &z1, &x2, &z2, group, FLAG(n))); -+ MP_CHECKOK(gf2m_Mdouble(&x2, &z2, group, FLAG(n))); -+ } else { -+ MP_CHECKOK(gf2m_Madd(px, &x2, &z2, &x1, &z1, group, FLAG(n))); -+ MP_CHECKOK(gf2m_Mdouble(&x1, &z1, group, FLAG(n))); -+ } -+ mask >>= 1; -+ } -+ j = MP_DIGIT_BIT - 1; -+ mask = top_bit; -+ } -+ -+ /* convert out of "projective" coordinates */ -+ i = gf2m_Mxy(px, py, &x1, &z1, &x2, &z2, group); -+ if (i == 0) { -+ res = MP_BADARG; -+ goto CLEANUP; -+ } else if (i == 1) { -+ MP_CHECKOK(ec_GF2m_pt_set_inf_aff(rx, ry)); -+ } else { -+ MP_CHECKOK(mp_copy(&x2, rx)); -+ MP_CHECKOK(mp_copy(&z2, ry)); -+ } -+ -+ CLEANUP: -+ mp_clear(&x1); -+ mp_clear(&x2); -+ mp_clear(&z1); -+ mp_clear(&z2); -+ return res; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecl.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecl.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecl.c 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecl.c 2023-09-12 13:54:26.293575685 +0800 -@@ -39,6 +39,7 @@ - #include "mplogic.h" - #include "ecl.h" - #include "ecl-priv.h" -+#include "ec2.h" - #include "ecp.h" - #ifndef _KERNEL - #include -@@ -169,6 +170,50 @@ - return group; + static jfieldID p_ps_prochandle_ID = 0; + static jfieldID threadList_ID = 0; + static jfieldID loadObjectList_ID = 0; +@@ -397,7 +412,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo + return (err == PS_OK)? array : 0; } -+#ifdef NSS_ECC_MORE_THAN_SUITE_B -+/* Construct a generic ECGroup for elliptic curves over binary polynomial -+ * fields. */ -+ECGroup * -+ECGroup_consGF2m(const mp_int *irr, const unsigned int irr_arr[5], -+ const mp_int *curvea, const mp_int *curveb, -+ const mp_int *genx, const mp_int *geny, -+ const mp_int *order, int cofactor) -+{ -+ mp_err res = MP_OKAY; -+ ECGroup *group = NULL; -+ -+ group = ECGroup_new(FLAG(irr)); -+ if (group == NULL) -+ return NULL; -+ -+ group->meth = GFMethod_consGF2m(irr, irr_arr); -+ if (group->meth == NULL) { -+ res = MP_MEM; -+ goto CLEANUP; -+ } -+ MP_CHECKOK(mp_copy(curvea, &group->curvea)); -+ MP_CHECKOK(mp_copy(curveb, &group->curveb)); -+ MP_CHECKOK(mp_copy(genx, &group->genx)); -+ MP_CHECKOK(mp_copy(geny, &group->geny)); -+ MP_CHECKOK(mp_copy(order, &group->order)); -+ group->cofactor = cofactor; -+ group->point_add = &ec_GF2m_pt_add_aff; -+ group->point_sub = &ec_GF2m_pt_sub_aff; -+ group->point_dbl = &ec_GF2m_pt_dbl_aff; -+ group->point_mul = &ec_GF2m_pt_mul_mont; -+ group->base_point_mul = NULL; -+ group->points_mul = &ec_pts_mul_basic; -+ group->validate_point = &ec_GF2m_validate_point; -+ -+ CLEANUP: -+ if (res != MP_OKAY) { -+ ECGroup_free(group); -+ return NULL; -+ } -+ return group; -+} -+#endif -+ - /* Construct ECGroup from hex parameters and name, if any. Called by - * ECGroup_fromHex and ECGroup_fromName. */ - ECGroup * -@@ -209,10 +254,85 @@ +-#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) | defined(ppc64) || defined(ppc64le) || defined(aarch64) ++#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) | defined(ppc64) || defined(ppc64le) || defined(aarch64) || defined(loongarch64) + JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0 + (JNIEnv *env, jobject this_obj, jint lwp_id) { - /* determine which optimizations (if any) to use */ - if (params->field == ECField_GFp) { -+#ifdef NSS_ECC_MORE_THAN_SUITE_B -+ switch (name) { -+#ifdef ECL_USE_FP -+ case ECCurve_SECG_PRIME_160R1: -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_secp160r1_fp(group)); -+ break; -+#endif -+ case ECCurve_SECG_PRIME_192R1: -+#ifdef ECL_USE_FP -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_nistp192_fp(group)); -+#else -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_gfp192(group, name)); -+#endif -+ break; -+ case ECCurve_SECG_PRIME_224R1: -+#ifdef ECL_USE_FP -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_nistp224_fp(group)); -+#else -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_gfp224(group, name)); -+#endif -+ break; -+ case ECCurve_SECG_PRIME_256R1: -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_gfp256(group, name)); -+ break; -+ case ECCurve_SECG_PRIME_521R1: -+ group = -+ ECGroup_consGFp(&irr, &curvea, &curveb, &genx, &geny, -+ &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ MP_CHECKOK(ec_group_set_gfp521(group, name)); -+ break; -+ default: -+ /* use generic arithmetic */ +@@ -425,8 +440,14 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo + #if defined(sparc) || defined(sparcv9) + #define NPRGREG sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_NPRGREG + #endif ++#ifdef loongarch64 ++#define NPRGREG sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext_NPRGREG +#endif - group = - ECGroup_consGFp_mont(&irr, &curvea, &curveb, &genx, &geny, - &order, params->cofactor); - if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+#ifdef NSS_ECC_MORE_THAN_SUITE_B -+ } -+ } else if (params->field == ECField_GF2m) { -+ group = ECGroup_consGF2m(&irr, NULL, &curvea, &curveb, &genx, &geny, &order, params->cofactor); -+ if (group == NULL) { res = MP_UNDEF; goto CLEANUP; } -+ if ((name == ECCurve_NIST_K163) || -+ (name == ECCurve_NIST_B163) || -+ (name == ECCurve_SECG_CHAR2_163R1)) { -+ MP_CHECKOK(ec_group_set_gf2m163(group, name)); -+ } else if ((name == ECCurve_SECG_CHAR2_193R1) || -+ (name == ECCurve_SECG_CHAR2_193R2)) { -+ MP_CHECKOK(ec_group_set_gf2m193(group, name)); -+ } else if ((name == ECCurve_NIST_K233) || -+ (name == ECCurve_NIST_B233)) { -+ MP_CHECKOK(ec_group_set_gf2m233(group, name)); -+ } + #if defined(ppc64) || defined(ppc64le) + #define NPRGREG sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext_NPRGREG +#endif - } else { - res = MP_UNDEF; - goto CLEANUP; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecl-curve.h jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecl-curve.h ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecl-curve.h 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecl-curve.h 2023-09-12 13:54:26.293575685 +0800 -@@ -44,6 +44,25 @@ ++#if defined(mips64) || defined(mips64el) ++#define NPRGREG sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext_NPRGREG #endif - /* NIST prime curves */ -+static const ECCurveParams ecCurve_NIST_P192 = { -+ "NIST-P192", ECField_GFp, 192, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "64210519E59C80E70FA7E9AB72243049FEB8DEECC146B9B1", -+ "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF1012", -+ "07192B95FFC8DA78631011ED6B24CDD573F977A11E794811", -+ "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22831", 1 -+}; -+ -+static const ECCurveParams ecCurve_NIST_P224 = { -+ "NIST-P224", ECField_GFp, 224, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000001", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFFFFFFFFFE", -+ "B4050A850C04B3ABF54132565044B0B7D7BFD8BA270B39432355FFB4", -+ "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D21", -+ "BD376388B5F723FB4C22DFE6CD4375A05A07476444D5819985007E34", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3D", 1 -+}; - static const ECCurveParams ecCurve_NIST_P256 = { - "NIST-P256", ECField_GFp, 256, -@@ -77,7 +96,411 @@ - 1 - }; +@@ -534,6 +555,18 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo + } + #endif /* aarch64 */ -+/* NIST binary curves */ -+static const ECCurveParams ecCurve_NIST_K163 = { -+ "NIST-K163", ECField_GF2m, 163, -+ "0800000000000000000000000000000000000000C9", -+ "000000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000001", -+ "02FE13C0537BBC11ACAA07D793DE4E6D5E5C94EEE8", -+ "0289070FB05D38FF58321F2E800536D538CCDAA3D9", -+ "04000000000000000000020108A2E0CC0D99F8A5EF", 2 -+}; -+ -+static const ECCurveParams ecCurve_NIST_B163 = { -+ "NIST-B163", ECField_GF2m, 163, -+ "0800000000000000000000000000000000000000C9", -+ "000000000000000000000000000000000000000001", -+ "020A601907B8C953CA1481EB10512F78744A3205FD", -+ "03F0EBA16286A2D57EA0991168D4994637E8343E36", -+ "00D51FBC6C71A0094FA2CDD545B11C5C0C797324F1", -+ "040000000000000000000292FE77E70C12A4234C33", 2 -+}; -+ -+static const ECCurveParams ecCurve_NIST_K233 = { -+ "NIST-K233", ECField_GF2m, 233, -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "017232BA853A7E731AF129F22FF4149563A419C26BF50A4C9D6EEFAD6126", -+ "01DB537DECE819B7F70F555A67C427A8CD9BF18AEB9B56E0C11056FAE6A3", -+ "008000000000000000000000000000069D5BB915BCD46EFB1AD5F173ABDF", 4 -+}; -+ -+static const ECCurveParams ecCurve_NIST_B233 = { -+ "NIST-B233", ECField_GF2m, 233, -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "0066647EDE6C332C7F8C0923BB58213B333B20E9CE4281FE115F7D8F90AD", -+ "00FAC9DFCBAC8313BB2139F1BB755FEF65BC391F8B36F8F8EB7371FD558B", -+ "01006A08A41903350678E58528BEBF8A0BEFF867A7CA36716F7E01F81052", -+ "01000000000000000000000000000013E974E72F8A6922031D2603CFE0D7", 2 -+}; -+ -+static const ECCurveParams ecCurve_NIST_K283 = { -+ "NIST-K283", ECField_GF2m, 283, -+ "0800000000000000000000000000000000000000000000000000000000000000000010A1", -+ "000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0503213F78CA44883F1A3B8162F188E553CD265F23C1567A16876913B0C2AC2458492836", -+ "01CCDA380F1C9E318D90F95D07E5426FE87E45C0E8184698E45962364E34116177DD2259", -+ "01FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE9AE2ED07577265DFF7F94451E061E163C61", 4 -+}; -+ -+static const ECCurveParams ecCurve_NIST_B283 = { -+ "NIST-B283", ECField_GF2m, 283, -+ "0800000000000000000000000000000000000000000000000000000000000000000010A1", -+ "000000000000000000000000000000000000000000000000000000000000000000000001", -+ "027B680AC8B8596DA5A4AF8A19A0303FCA97FD7645309FA2A581485AF6263E313B79A2F5", -+ "05F939258DB7DD90E1934F8C70B0DFEC2EED25B8557EAC9C80E2E198F8CDBECD86B12053", -+ "03676854FE24141CB98FE6D4B20D02B4516FF702350EDDB0826779C813F0DF45BE8112F4", -+ "03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEF90399660FC938A90165B042A7CEFADB307", 2 -+}; -+ -+static const ECCurveParams ecCurve_NIST_K409 = { -+ "NIST-K409", ECField_GF2m, 409, -+ "02000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000001", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0060F05F658F49C1AD3AB1890F7184210EFD0987E307C84C27ACCFB8F9F67CC2C460189EB5AAAA62EE222EB1B35540CFE9023746", -+ "01E369050B7C4E42ACBA1DACBF04299C3460782F918EA427E6325165E9EA10E3DA5F6C42E9C55215AA9CA27A5863EC48D8E0286B", -+ "007FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE5F83B2D4EA20400EC4557D5ED3E3E7CA5B4B5C83B8E01E5FCF", 4 -+}; -+ -+static const ECCurveParams ecCurve_NIST_B409 = { -+ "NIST-B409", ECField_GF2m, 409, -+ "02000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000001", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0021A5C2C8EE9FEB5C4B9A753B7B476B7FD6422EF1F3DD674761FA99D6AC27C8A9A197B272822F6CD57A55AA4F50AE317B13545F", -+ "015D4860D088DDB3496B0C6064756260441CDE4AF1771D4DB01FFE5B34E59703DC255A868A1180515603AEAB60794E54BB7996A7", -+ "0061B1CFAB6BE5F32BBFA78324ED106A7636B9C5A7BD198D0158AA4F5488D08F38514F1FDF4B4F40D2181B3681C364BA0273C706", -+ "010000000000000000000000000000000000000000000000000001E2AAD6A612F33307BE5FA47C3C9E052F838164CD37D9A21173", 2 -+}; -+ -+static const ECCurveParams ecCurve_NIST_K571 = { -+ "NIST-K571", ECField_GF2m, 571, -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "026EB7A859923FBC82189631F8103FE4AC9CA2970012D5D46024804801841CA44370958493B205E647DA304DB4CEB08CBBD1BA39494776FB988B47174DCA88C7E2945283A01C8972", -+ "0349DC807F4FBF374F4AEADE3BCA95314DD58CEC9F307A54FFC61EFC006D8A2C9D4979C0AC44AEA74FBEBBB9F772AEDCB620B01A7BA7AF1B320430C8591984F601CD4C143EF1C7A3", -+ "020000000000000000000000000000000000000000000000000000000000000000000000131850E1F19A63E4B391A8DB917F4138B630D84BE5D639381E91DEB45CFE778F637C1001", 4 -+}; -+ -+static const ECCurveParams ecCurve_NIST_B571 = { -+ "NIST-B571", ECField_GF2m, 571, -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "02F40E7E2221F295DE297117B7F3D62F5C6A97FFCB8CEFF1CD6BA8CE4A9A18AD84FFABBD8EFA59332BE7AD6756A66E294AFD185A78FF12AA520E4DE739BACA0C7FFEFF7F2955727A", -+ "0303001D34B856296C16C0D40D3CD7750A93D1D2955FA80AA5F40FC8DB7B2ABDBDE53950F4C0D293CDD711A35B67FB1499AE60038614F1394ABFA3B4C850D927E1E7769C8EEC2D19", -+ "037BF27342DA639B6DCCFFFEB73D69D78C6C27A6009CBBCA1980F8533921E8A684423E43BAB08A576291AF8F461BB2A8B3531D2F0485C19B16E2F1516E23DD3C1A4827AF1B8AC15B", -+ "03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE661CE18FF55987308059B186823851EC7DD9CA1161DE93D5174D66E8382E9BB2FE84E47", 2 -+}; -+ -+/* ANSI X9.62 prime curves */ -+static const ECCurveParams ecCurve_X9_62_PRIME_192V2 = { -+ "X9.62 P-192V2", ECField_GFp, 192, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "CC22D6DFB95C6B25E49C0D6364A4E5980C393AA21668D953", -+ "EEA2BAE7E1497842F2DE7769CFE9C989C072AD696F48034A", -+ "6574D11D69B6EC7A672BB82A083DF2F2B0847DE970B2DE15", -+ "FFFFFFFFFFFFFFFFFFFFFFFE5FB1A724DC80418648D8DD31", 1 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_PRIME_192V3 = { -+ "X9.62 P-192V3", ECField_GFp, 192, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "22123DC2395A05CAA7423DAECCC94760A7D462256BD56916", -+ "7D29778100C65A1DA1783716588DCE2B8B4AEE8E228F1896", -+ "38A90F22637337334B49DCB66A6DC8F9978ACA7648A943B0", -+ "FFFFFFFFFFFFFFFFFFFFFFFF7A62D031C83F4294F640EC13", 1 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_PRIME_239V1 = { -+ "X9.62 P-239V1", ECField_GFp, 239, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "6B016C3BDCF18941D0D654921475CA71A9DB2FB27D1D37796185C2942C0A", -+ "0FFA963CDCA8816CCC33B8642BEDF905C3D358573D3F27FBBD3B3CB9AAAF", -+ "7DEBE8E4E90A5DAE6E4054CA530BA04654B36818CE226B39FCCB7B02F1AE", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFF9E5E9A9F5D9071FBD1522688909D0B", 1 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_PRIME_239V2 = { -+ "X9.62 P-239V2", ECField_GFp, 239, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "617FAB6832576CBBFED50D99F0249C3FEE58B94BA0038C7AE84C8C832F2C", -+ "38AF09D98727705120C921BB5E9E26296A3CDCF2F35757A0EAFD87B830E7", -+ "5B0125E4DBEA0EC7206DA0FC01D9B081329FB555DE6EF460237DFF8BE4BA", -+ "7FFFFFFFFFFFFFFFFFFFFFFF800000CFA7E8594377D414C03821BC582063", 1 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_PRIME_239V3 = { -+ "X9.62 P-239V3", ECField_GFp, 239, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "255705FA2A306654B1F4CB03D6A750A30C250102D4988717D9BA15AB6D3E", -+ "6768AE8E18BB92CFCF005C949AA2C6D94853D0E660BBF854B1C9505FE95A", -+ "1607E6898F390C06BC1D552BAD226F3B6FCFE48B6E818499AF18E3ED6CF3", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFF975DEB41B3A6057C3C432146526551", 1 -+}; -+ -+/* ANSI X9.62 binary curves */ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB163V1 = { -+ "X9.62 C2-PNB163V1", ECField_GF2m, 163, -+ "080000000000000000000000000000000000000107", -+ "072546B5435234A422E0789675F432C89435DE5242", -+ "00C9517D06D5240D3CFF38C74B20B6CD4D6F9DD4D9", -+ "07AF69989546103D79329FCC3D74880F33BBE803CB", -+ "01EC23211B5966ADEA1D3F87F7EA5848AEF0B7CA9F", -+ "0400000000000000000001E60FC8821CC74DAEAFC1", 2 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB163V2 = { -+ "X9.62 C2-PNB163V2", ECField_GF2m, 163, -+ "080000000000000000000000000000000000000107", -+ "0108B39E77C4B108BED981ED0E890E117C511CF072", -+ "0667ACEB38AF4E488C407433FFAE4F1C811638DF20", -+ "0024266E4EB5106D0A964D92C4860E2671DB9B6CC5", -+ "079F684DDF6684C5CD258B3890021B2386DFD19FC5", -+ "03FFFFFFFFFFFFFFFFFFFDF64DE1151ADBB78F10A7", 2 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB163V3 = { -+ "X9.62 C2-PNB163V3", ECField_GF2m, 163, -+ "080000000000000000000000000000000000000107", -+ "07A526C63D3E25A256A007699F5447E32AE456B50E", -+ "03F7061798EB99E238FD6F1BF95B48FEEB4854252B", -+ "02F9F87B7C574D0BDECF8A22E6524775F98CDEBDCB", -+ "05B935590C155E17EA48EB3FF3718B893DF59A05D0", -+ "03FFFFFFFFFFFFFFFFFFFE1AEE140F110AFF961309", 2 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB176V1 = { -+ "X9.62 C2-PNB176V1", ECField_GF2m, 176, -+ "0100000000000000000000000000000000080000000007", -+ "E4E6DB2995065C407D9D39B8D0967B96704BA8E9C90B", -+ "5DDA470ABE6414DE8EC133AE28E9BBD7FCEC0AE0FFF2", -+ "8D16C2866798B600F9F08BB4A8E860F3298CE04A5798", -+ "6FA4539C2DADDDD6BAB5167D61B436E1D92BB16A562C", -+ "00010092537397ECA4F6145799D62B0A19CE06FE26AD", 0xFF6E -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB191V1 = { -+ "X9.62 C2-TNB191V1", ECField_GF2m, 191, -+ "800000000000000000000000000000000000000000000201", -+ "2866537B676752636A68F56554E12640276B649EF7526267", -+ "2E45EF571F00786F67B0081B9495A3D95462F5DE0AA185EC", -+ "36B3DAF8A23206F9C4F299D7B21A9C369137F2C84AE1AA0D", -+ "765BE73433B3F95E332932E70EA245CA2418EA0EF98018FB", -+ "40000000000000000000000004A20E90C39067C893BBB9A5", 2 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB191V2 = { -+ "X9.62 C2-TNB191V2", ECField_GF2m, 191, -+ "800000000000000000000000000000000000000000000201", -+ "401028774D7777C7B7666D1366EA432071274F89FF01E718", -+ "0620048D28BCBD03B6249C99182B7C8CD19700C362C46A01", -+ "3809B2B7CC1B28CC5A87926AAD83FD28789E81E2C9E3BF10", -+ "17434386626D14F3DBF01760D9213A3E1CF37AEC437D668A", -+ "20000000000000000000000050508CB89F652824E06B8173", 4 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB191V3 = { -+ "X9.62 C2-TNB191V3", ECField_GF2m, 191, -+ "800000000000000000000000000000000000000000000201", -+ "6C01074756099122221056911C77D77E77A777E7E7E77FCB", -+ "71FE1AF926CF847989EFEF8DB459F66394D90F32AD3F15E8", -+ "375D4CE24FDE434489DE8746E71786015009E66E38A926DD", -+ "545A39176196575D985999366E6AD34CE0A77CD7127B06BE", -+ "155555555555555555555555610C0B196812BFB6288A3EA3", 6 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB208W1 = { -+ "X9.62 C2-PNB208W1", ECField_GF2m, 208, -+ "010000000000000000000000000000000800000000000000000007", -+ "0000000000000000000000000000000000000000000000000000", -+ "C8619ED45A62E6212E1160349E2BFA844439FAFC2A3FD1638F9E", -+ "89FDFBE4ABE193DF9559ECF07AC0CE78554E2784EB8C1ED1A57A", -+ "0F55B51A06E78E9AC38A035FF520D8B01781BEB1A6BB08617DE3", -+ "000101BAF95C9723C57B6C21DA2EFF2D5ED588BDD5717E212F9D", 0xFE48 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB239V1 = { -+ "X9.62 C2-TNB239V1", ECField_GF2m, 239, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "32010857077C5431123A46B808906756F543423E8D27877578125778AC76", -+ "790408F2EEDAF392B012EDEFB3392F30F4327C0CA3F31FC383C422AA8C16", -+ "57927098FA932E7C0A96D3FD5B706EF7E5F5C156E16B7E7C86038552E91D", -+ "61D8EE5077C33FECF6F1A16B268DE469C3C7744EA9A971649FC7A9616305", -+ "2000000000000000000000000000000F4D42FFE1492A4993F1CAD666E447", 4 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB239V2 = { -+ "X9.62 C2-TNB239V2", ECField_GF2m, 239, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "4230017757A767FAE42398569B746325D45313AF0766266479B75654E65F", -+ "5037EA654196CFF0CD82B2C14A2FCF2E3FF8775285B545722F03EACDB74B", -+ "28F9D04E900069C8DC47A08534FE76D2B900B7D7EF31F5709F200C4CA205", -+ "5667334C45AFF3B5A03BAD9DD75E2C71A99362567D5453F7FA6E227EC833", -+ "1555555555555555555555555555553C6F2885259C31E3FCDF154624522D", 6 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB239V3 = { -+ "X9.62 C2-TNB239V3", ECField_GF2m, 239, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "01238774666A67766D6676F778E676B66999176666E687666D8766C66A9F", -+ "6A941977BA9F6A435199ACFC51067ED587F519C5ECB541B8E44111DE1D40", -+ "70F6E9D04D289C4E89913CE3530BFDE903977D42B146D539BF1BDE4E9C92", -+ "2E5A0EAF6E5E1305B9004DCE5C0ED7FE59A35608F33837C816D80B79F461", -+ "0CCCCCCCCCCCCCCCCCCCCCCCCCCCCCAC4912D2D9DF903EF9888B8A0E4CFF", 0xA -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB272W1 = { -+ "X9.62 C2-PNB272W1", ECField_GF2m, 272, -+ "010000000000000000000000000000000000000000000000000000010000000000000B", -+ "91A091F03B5FBA4AB2CCF49C4EDD220FB028712D42BE752B2C40094DBACDB586FB20", -+ "7167EFC92BB2E3CE7C8AAAFF34E12A9C557003D7C73A6FAF003F99F6CC8482E540F7", -+ "6108BABB2CEEBCF787058A056CBE0CFE622D7723A289E08A07AE13EF0D10D171DD8D", -+ "10C7695716851EEF6BA7F6872E6142FBD241B830FF5EFCACECCAB05E02005DDE9D23", -+ "000100FAF51354E0E39E4892DF6E319C72C8161603FA45AA7B998A167B8F1E629521", -+ 0xFF06 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB304W1 = { -+ "X9.62 C2-PNB304W1", ECField_GF2m, 304, -+ "010000000000000000000000000000000000000000000000000000000000000000000000000807", -+ "FD0D693149A118F651E6DCE6802085377E5F882D1B510B44160074C1288078365A0396C8E681", -+ "BDDB97E555A50A908E43B01C798EA5DAA6788F1EA2794EFCF57166B8C14039601E55827340BE", -+ "197B07845E9BE2D96ADB0F5F3C7F2CFFBD7A3EB8B6FEC35C7FD67F26DDF6285A644F740A2614", -+ "E19FBEB76E0DA171517ECF401B50289BF014103288527A9B416A105E80260B549FDC1B92C03B", -+ "000101D556572AABAC800101D556572AABAC8001022D5C91DD173F8FB561DA6899164443051D", 0xFE2E -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB359V1 = { -+ "X9.62 C2-TNB359V1", ECField_GF2m, 359, -+ "800000000000000000000000000000000000000000000000000000000000000000000000100000000000000001", -+ "5667676A654B20754F356EA92017D946567C46675556F19556A04616B567D223A5E05656FB549016A96656A557", -+ "2472E2D0197C49363F1FE7F5B6DB075D52B6947D135D8CA445805D39BC345626089687742B6329E70680231988", -+ "3C258EF3047767E7EDE0F1FDAA79DAEE3841366A132E163ACED4ED2401DF9C6BDCDE98E8E707C07A2239B1B097", -+ "53D7E08529547048121E9C95F3791DD804963948F34FAE7BF44EA82365DC7868FE57E4AE2DE211305A407104BD", -+ "01AF286BCA1AF286BCA1AF286BCA1AF286BCA1AF286BC9FB8F6B85C556892C20A7EB964FE7719E74F490758D3B", 0x4C -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_PNB368W1 = { -+ "X9.62 C2-PNB368W1", ECField_GF2m, 368, -+ "0100000000000000000000000000000000000000000000000000000000000000000000002000000000000000000007", -+ "E0D2EE25095206F5E2A4F9ED229F1F256E79A0E2B455970D8D0D865BD94778C576D62F0AB7519CCD2A1A906AE30D", -+ "FC1217D4320A90452C760A58EDCD30C8DD069B3C34453837A34ED50CB54917E1C2112D84D164F444F8F74786046A", -+ "1085E2755381DCCCE3C1557AFA10C2F0C0C2825646C5B34A394CBCFA8BC16B22E7E789E927BE216F02E1FB136A5F", -+ "7B3EB1BDDCBA62D5D8B2059B525797FC73822C59059C623A45FF3843CEE8F87CD1855ADAA81E2A0750B80FDA2310", -+ "00010090512DA9AF72B08349D98A5DD4C7B0532ECA51CE03E2D10F3B7AC579BD87E909AE40A6F131E9CFCE5BD967", 0xFF70 -+}; -+ -+static const ECCurveParams ecCurve_X9_62_CHAR2_TNB431R1 = { -+ "X9.62 C2-TNB431R1", ECField_GF2m, 431, -+ "800000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000001", -+ "1A827EF00DD6FC0E234CAF046C6A5D8A85395B236CC4AD2CF32A0CADBDC9DDF620B0EB9906D0957F6C6FEACD615468DF104DE296CD8F", -+ "10D9B4A3D9047D8B154359ABFB1B7F5485B04CEB868237DDC9DEDA982A679A5A919B626D4E50A8DD731B107A9962381FB5D807BF2618", -+ "120FC05D3C67A99DE161D2F4092622FECA701BE4F50F4758714E8A87BBF2A658EF8C21E7C5EFE965361F6C2999C0C247B0DBD70CE6B7", -+ "20D0AF8903A96F8D5FA2C255745D3C451B302C9346D9B7E485E7BCE41F6B591F3E8F6ADDCBB0BC4C2F947A7DE1A89B625D6A598B3760", -+ "0340340340340340340340340340340340340340340340340340340323C313FAB50589703B5EC68D3587FEC60D161CC149C1AD4A91", 0x2760 -+}; -+ - /* SEC2 prime curves */ -+static const ECCurveParams ecCurve_SECG_PRIME_112R1 = { -+ "SECP-112R1", ECField_GFp, 112, -+ "DB7C2ABF62E35E668076BEAD208B", -+ "DB7C2ABF62E35E668076BEAD2088", -+ "659EF8BA043916EEDE8911702B22", -+ "09487239995A5EE76B55F9C2F098", -+ "A89CE5AF8724C0A23E0E0FF77500", -+ "DB7C2ABF62E35E7628DFAC6561C5", 1 -+}; -+ -+static const ECCurveParams ecCurve_SECG_PRIME_112R2 = { -+ "SECP-112R2", ECField_GFp, 112, -+ "DB7C2ABF62E35E668076BEAD208B", -+ "6127C24C05F38A0AAAF65C0EF02C", -+ "51DEF1815DB5ED74FCC34C85D709", -+ "4BA30AB5E892B4E1649DD0928643", -+ "adcd46f5882e3747def36e956e97", -+ "36DF0AAFD8B8D7597CA10520D04B", 4 -+}; -+ -+static const ECCurveParams ecCurve_SECG_PRIME_128R1 = { -+ "SECP-128R1", ECField_GFp, 128, -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFF", -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFC", -+ "E87579C11079F43DD824993C2CEE5ED3", -+ "161FF7528B899B2D0C28607CA52C5B86", -+ "CF5AC8395BAFEB13C02DA292DDED7A83", -+ "FFFFFFFE0000000075A30D1B9038A115", 1 -+}; -+ -+static const ECCurveParams ecCurve_SECG_PRIME_128R2 = { -+ "SECP-128R2", ECField_GFp, 128, -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFF", -+ "D6031998D1B3BBFEBF59CC9BBFF9AEE1", -+ "5EEEFCA380D02919DC2C6558BB6D8A5D", -+ "7B6AA5D85E572983E6FB32A7CDEBC140", -+ "27B6916A894D3AEE7106FE805FC34B44", -+ "3FFFFFFF7FFFFFFFBE0024720613B5A3", 4 -+}; -+ -+static const ECCurveParams ecCurve_SECG_PRIME_160K1 = { -+ "SECP-160K1", ECField_GFp, 160, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC73", -+ "0000000000000000000000000000000000000000", -+ "0000000000000000000000000000000000000007", -+ "3B4C382CE37AA192A4019E763036F4F5DD4D7EBB", -+ "938CF935318FDCED6BC28286531733C3F03C4FEE", -+ "0100000000000000000001B8FA16DFAB9ACA16B6B3", 1 -+}; -+ -+static const ECCurveParams ecCurve_SECG_PRIME_160R1 = { -+ "SECP-160R1", ECField_GFp, 160, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7FFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7FFFFFFC", -+ "1C97BEFC54BD7A8B65ACF89F81D4D4ADC565FA45", -+ "4A96B5688EF573284664698968C38BB913CBFC82", -+ "23A628553168947D59DCC912042351377AC5FB32", -+ "0100000000000000000001F4C8F927AED3CA752257", 1 -+}; -+ -+static const ECCurveParams ecCurve_SECG_PRIME_160R2 = { -+ "SECP-160R2", ECField_GFp, 160, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC73", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC70", -+ "B4E134D3FB59EB8BAB57274904664D5AF50388BA", -+ "52DCB034293A117E1F4FF11B30F7199D3144CE6D", -+ "FEAFFEF2E331F296E071FA0DF9982CFEA7D43F2E", -+ "0100000000000000000000351EE786A818F3A1A16B", 1 -+}; ++#if defined(loongarch64) + -+static const ECCurveParams ecCurve_SECG_PRIME_192K1 = { -+ "SECP-192K1", ECField_GFp, 192, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFEE37", -+ "000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000003", -+ "DB4FF10EC057E9AE26B07D0280B7F4341DA5D1B1EAE06C7D", -+ "9B2F2F6D9C5628A7844163D015BE86344082AA88D95E2F9D", -+ "FFFFFFFFFFFFFFFFFFFFFFFE26F2FC170F69466A74DEFD8D", 1 -+}; ++#define REG_INDEX(reg) sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext_##reg + -+static const ECCurveParams ecCurve_SECG_PRIME_224K1 = { -+ "SECP-224K1", ECField_GFp, 224, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFE56D", -+ "00000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000005", -+ "A1455B334DF099DF30FC28A169A467E9E47075A90F7E650EB6B7A45C", -+ "7E089FED7FBA344282CAFBD6F7E319F7C0B0BD59E2CA4BDB556D61A5", -+ "010000000000000000000000000001DCE8D2EC6184CAF0A971769FB1F7", 1 -+}; ++ { ++ int i; ++ for (i = 0; i < 31; i++) ++ regs[i] = gregs.regs[i]; ++ regs[REG_INDEX(PC)] = gregs.csr_era; ++ } ++#endif /* loongarch64 */ + - static const ECCurveParams ecCurve_SECG_PRIME_256K1 = { - "SECP-256K1", ECField_GFp, 256, - "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFC2F", -@@ -88,70 +511,222 @@ - "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD0364141", 1 - }; + #if defined(ppc64) || defined(ppc64le) + #define REG_INDEX(reg) sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext_##reg -+/* SEC2 binary curves */ -+static const ECCurveParams ecCurve_SECG_CHAR2_113R1 = { -+ "SECT-113R1", ECField_GF2m, 113, -+ "020000000000000000000000000201", -+ "003088250CA6E7C7FE649CE85820F7", -+ "00E8BEE4D3E2260744188BE0E9C723", -+ "009D73616F35F4AB1407D73562C10F", -+ "00A52830277958EE84D1315ED31886", -+ "0100000000000000D9CCEC8A39E56F", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_113R2 = { -+ "SECT-113R2", ECField_GF2m, 113, -+ "020000000000000000000000000201", -+ "00689918DBEC7E5A0DD6DFC0AA55C7", -+ "0095E9A9EC9B297BD4BF36E059184F", -+ "01A57A6A7B26CA5EF52FCDB8164797", -+ "00B3ADC94ED1FE674C06E695BABA1D", -+ "010000000000000108789B2496AF93", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_131R1 = { -+ "SECT-131R1", ECField_GF2m, 131, -+ "080000000000000000000000000000010D", -+ "07A11B09A76B562144418FF3FF8C2570B8", -+ "0217C05610884B63B9C6C7291678F9D341", -+ "0081BAF91FDF9833C40F9C181343638399", -+ "078C6E7EA38C001F73C8134B1B4EF9E150", -+ "0400000000000000023123953A9464B54D", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_131R2 = { -+ "SECT-131R2", ECField_GF2m, 131, -+ "080000000000000000000000000000010D", -+ "03E5A88919D7CAFCBF415F07C2176573B2", -+ "04B8266A46C55657AC734CE38F018F2192", -+ "0356DCD8F2F95031AD652D23951BB366A8", -+ "0648F06D867940A5366D9E265DE9EB240F", -+ "0400000000000000016954A233049BA98F", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_163R1 = { -+ "SECT-163R1", ECField_GF2m, 163, -+ "0800000000000000000000000000000000000000C9", -+ "07B6882CAAEFA84F9554FF8428BD88E246D2782AE2", -+ "0713612DCDDCB40AAB946BDA29CA91F73AF958AFD9", -+ "0369979697AB43897789566789567F787A7876A654", -+ "00435EDB42EFAFB2989D51FEFCE3C80988F41FF883", -+ "03FFFFFFFFFFFFFFFFFFFF48AAB689C29CA710279B", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_193R1 = { -+ "SECT-193R1", ECField_GF2m, 193, -+ "02000000000000000000000000000000000000000000008001", -+ "0017858FEB7A98975169E171F77B4087DE098AC8A911DF7B01", -+ "00FDFB49BFE6C3A89FACADAA7A1E5BBC7CC1C2E5D831478814", -+ "01F481BC5F0FF84A74AD6CDF6FDEF4BF6179625372D8C0C5E1", -+ "0025E399F2903712CCF3EA9E3A1AD17FB0B3201B6AF7CE1B05", -+ "01000000000000000000000000C7F34A778F443ACC920EBA49", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_193R2 = { -+ "SECT-193R2", ECField_GF2m, 193, -+ "02000000000000000000000000000000000000000000008001", -+ "0163F35A5137C2CE3EA6ED8667190B0BC43ECD69977702709B", -+ "00C9BB9E8927D4D64C377E2AB2856A5B16E3EFB7F61D4316AE", -+ "00D9B67D192E0367C803F39E1A7E82CA14A651350AAE617E8F", -+ "01CE94335607C304AC29E7DEFBD9CA01F596F927224CDECF6C", -+ "010000000000000000000000015AAB561B005413CCD4EE99D5", 2 -+}; -+ -+static const ECCurveParams ecCurve_SECG_CHAR2_239K1 = { -+ "SECT-239K1", ECField_GF2m, 239, -+ "800000000000000000004000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "29A0B6A887A983E9730988A68727A8B2D126C44CC2CC7B2A6555193035DC", -+ "76310804F12E549BDB011C103089E73510ACB275FC312A5DC6B76553F0CA", -+ "2000000000000000000000000000005A79FEC67CB6E91F1C1DA800E478A5", 4 -+}; -+ -+/* WTLS curves */ -+static const ECCurveParams ecCurve_WTLS_1 = { -+ "WTLS-1", ECField_GF2m, 113, -+ "020000000000000000000000000201", -+ "000000000000000000000000000001", -+ "000000000000000000000000000001", -+ "01667979A40BA497E5D5C270780617", -+ "00F44B4AF1ECC2630E08785CEBCC15", -+ "00FFFFFFFFFFFFFFFDBF91AF6DEA73", 2 -+}; -+ -+static const ECCurveParams ecCurve_WTLS_8 = { -+ "WTLS-8", ECField_GFp, 112, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFDE7", -+ "0000000000000000000000000000", -+ "0000000000000000000000000003", -+ "0000000000000000000000000001", -+ "0000000000000000000000000002", -+ "0100000000000001ECEA551AD837E9", 1 -+}; -+ -+static const ECCurveParams ecCurve_WTLS_9 = { -+ "WTLS-9", ECField_GFp, 160, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC808F", -+ "0000000000000000000000000000000000000000", -+ "0000000000000000000000000000000000000003", -+ "0000000000000000000000000000000000000001", -+ "0000000000000000000000000000000000000002", -+ "0100000000000000000001CDC98AE0E2DE574ABF33", 1 -+}; -+ -+static const ECCurveParams ecCurve_BrainpoolP256r1 = { -+ "brainpoolP256r1", ECField_GFp, 256, -+ "A9FB57DBA1EEA9BC3E660A909D838D726E3BF623D52620282013481D1F6E5377", -+ "7D5A0975FC2C3057EEF67530417AFFE7FB8055C126DC5C6CE94A4B44F330B5D9", -+ "26DC5C6CE94A4B44F330B5D9BBD77CBF958416295CF7E1CE6BCCDC18FF8C07B6", -+ "8BD2AEB9CB7E57CB2C4B482FFC81B7AFB9DE27E1E3BD23C23A4453BD9ACE3262", -+ "547EF835C3DAC4FD97F8461A14611DC9C27745132DED8E545C1D54C72F046997", -+ "A9FB57DBA1EEA9BC3E660A909D838D718C397AA3B561A6F7901E0E82974856A7", 1 -+}; -+ -+static const ECCurveParams ecCurve_BrainpoolP320r1 = { -+ "brainpoolP320r1", ECField_GFp, 320, -+ "D35E472036BC4FB7E13C785ED201E065F98FCFA6F6F40DEF4F92B9EC7893EC28FCD412B1F1B32E27", -+ "3EE30B568FBAB0F883CCEBD46D3F3BB8A2A73513F5EB79DA66190EB085FFA9F492F375A97D860EB4", -+ "520883949DFDBC42D3AD198640688A6FE13F41349554B49ACC31DCCD884539816F5EB4AC8FB1F1A6", -+ "43BD7E9AFB53D8B85289BCC48EE5BFE6F20137D10A087EB6E7871E2A10A599C710AF8D0D39E20611", -+ "14FDD05545EC1CC8AB4093247F77275E0743FFED117182EAA9C77877AAAC6AC7D35245D1692E8EE1", -+ "D35E472036BC4FB7E13C785ED201E065F98FCFA5B68F12A32D482EC7EE8658E98691555B44C59311", 1 -+}; -+ -+static const ECCurveParams ecCurve_BrainpoolP384r1 = { -+ "brainpoolP384r1", ECField_GFp, 384, -+ "8CB91E82A3386D280F5D6F7E50E641DF152F7109ED5456B412B1DA197FB71123ACD3A729901D1A71874700133107EC53", -+ "7BC382C63D8C150C3C72080ACE05AFA0C2BEA28E4FB22787139165EFBA91F90F8AA5814A503AD4EB04A8C7DD22CE2826", -+ "04A8C7DD22CE28268B39B55416F0447C2FB77DE107DCD2A62E880EA53EEB62D57CB4390295DBC9943AB78696FA504C11", -+ "1D1C64F068CF45FFA2A63A81B7C13F6B8847A3E77EF14FE3DB7FCAFE0CBD10E8E826E03436D646AAEF87B2E247D4AF1E", -+ "8ABE1D7520F9C2A45CB1EB8E95CFD55262B70B29FEEC5864E19C054FF99129280E4646217791811142820341263C5315", -+ "8CB91E82A3386D280F5D6F7E50E641DF152F7109ED5456B31F166E6CAC0425A7CF3AB6AF6B7FC3103B883202E9046565", 1 -+}; -+ -+static const ECCurveParams ecCurve_BrainpoolP512r1 = { -+ "brainpoolP512r1", ECField_GFp, 512, -+ "AADD9DB8DBE9C48B3FD4E6AE33C9FC07CB308DB3B3C9D20ED6639CCA703308717D4D9B009BC66842AECDA12AE6A380E62881FF2F2D82C68528AA6056583A48F3", -+ "7830A3318B603B89E2327145AC234CC594CBDD8D3DF91610A83441CAEA9863BC2DED5D5AA8253AA10A2EF1C98B9AC8B57F1117A72BF2C7B9E7C1AC4D77FC94CA", -+ "3DF91610A83441CAEA9863BC2DED5D5AA8253AA10A2EF1C98B9AC8B57F1117A72BF2C7B9E7C1AC4D77FC94CADC083E67984050B75EBAE5DD2809BD638016F723", -+ "81AEE4BDD82ED9645A21322E9C4C6A9385ED9F70B5D916C1B43B62EEF4D0098EFF3B1F78E2D0D48D50D1687B93B97D5F7C6D5047406A5E688B352209BCB9F822", -+ "7DDE385D566332ECC0EABFA9CF7822FDF209F70024A57B1AA000C55B881F8111B2DCDE494A5F485E5BCA4BD88A2763AED1CA2B2FA8F0540678CD1E0F3AD80892", -+ "AADD9DB8DBE9C48B3FD4E6AE33C9FC07CB308DB3B3C9D20ED6639CCA70330870553E5C414CA92619418661197FAC10471DB1D381085DDADDB58796829CA90069", 1 -+}; -+ - /* mapping between ECCurveName enum and pointers to ECCurveParams */ - static const ECCurveParams *ecCurve_map[] = { - NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -+ &ecCurve_NIST_P192, /* ECCurve_NIST_P192 */ -+ &ecCurve_NIST_P224, /* ECCurve_NIST_P224 */ - &ecCurve_NIST_P256, /* ECCurve_NIST_P256 */ - &ecCurve_NIST_P384, /* ECCurve_NIST_P384 */ - &ecCurve_NIST_P521, /* ECCurve_NIST_P521 */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -+ &ecCurve_NIST_K163, /* ECCurve_NIST_K163 */ -+ &ecCurve_NIST_B163, /* ECCurve_NIST_B163 */ -+ &ecCurve_NIST_K233, /* ECCurve_NIST_K233 */ -+ &ecCurve_NIST_B233, /* ECCurve_NIST_B233 */ -+ &ecCurve_NIST_K283, /* ECCurve_NIST_K283 */ -+ &ecCurve_NIST_B283, /* ECCurve_NIST_B283 */ -+ &ecCurve_NIST_K409, /* ECCurve_NIST_K409 */ -+ &ecCurve_NIST_B409, /* ECCurve_NIST_B409 */ -+ &ecCurve_NIST_K571, /* ECCurve_NIST_K571 */ -+ &ecCurve_NIST_B571, /* ECCurve_NIST_B571 */ -+ &ecCurve_X9_62_PRIME_192V2, /* ECCurve_X9_62_PRIME_192V2 */ -+ &ecCurve_X9_62_PRIME_192V3, /* ECCurve_X9_62_PRIME_192V3 */ -+ &ecCurve_X9_62_PRIME_239V1, /* ECCurve_X9_62_PRIME_239V1 */ -+ &ecCurve_X9_62_PRIME_239V2, /* ECCurve_X9_62_PRIME_239V2 */ -+ &ecCurve_X9_62_PRIME_239V3, /* ECCurve_X9_62_PRIME_239V3 */ -+ &ecCurve_X9_62_CHAR2_PNB163V1, /* ECCurve_X9_62_CHAR2_PNB163V1 */ -+ &ecCurve_X9_62_CHAR2_PNB163V2, /* ECCurve_X9_62_CHAR2_PNB163V2 */ -+ &ecCurve_X9_62_CHAR2_PNB163V3, /* ECCurve_X9_62_CHAR2_PNB163V3 */ -+ &ecCurve_X9_62_CHAR2_PNB176V1, /* ECCurve_X9_62_CHAR2_PNB176V1 */ -+ &ecCurve_X9_62_CHAR2_TNB191V1, /* ECCurve_X9_62_CHAR2_TNB191V1 */ -+ &ecCurve_X9_62_CHAR2_TNB191V2, /* ECCurve_X9_62_CHAR2_TNB191V2 */ -+ &ecCurve_X9_62_CHAR2_TNB191V3, /* ECCurve_X9_62_CHAR2_TNB191V3 */ -+ &ecCurve_X9_62_CHAR2_PNB208W1, /* ECCurve_X9_62_CHAR2_PNB208W1 */ -+ &ecCurve_X9_62_CHAR2_TNB239V1, /* ECCurve_X9_62_CHAR2_TNB239V1 */ -+ &ecCurve_X9_62_CHAR2_TNB239V2, /* ECCurve_X9_62_CHAR2_TNB239V2 */ -+ &ecCurve_X9_62_CHAR2_TNB239V3, /* ECCurve_X9_62_CHAR2_TNB239V3 */ -+ &ecCurve_X9_62_CHAR2_PNB272W1, /* ECCurve_X9_62_CHAR2_PNB272W1 */ -+ &ecCurve_X9_62_CHAR2_PNB304W1, /* ECCurve_X9_62_CHAR2_PNB304W1 */ -+ &ecCurve_X9_62_CHAR2_TNB359V1, /* ECCurve_X9_62_CHAR2_TNB359V1 */ -+ &ecCurve_X9_62_CHAR2_PNB368W1, /* ECCurve_X9_62_CHAR2_PNB368W1 */ -+ &ecCurve_X9_62_CHAR2_TNB431R1, /* ECCurve_X9_62_CHAR2_TNB431R1 */ -+ &ecCurve_SECG_PRIME_112R1, /* ECCurve_SECG_PRIME_112R1 */ -+ &ecCurve_SECG_PRIME_112R2, /* ECCurve_SECG_PRIME_112R2 */ -+ &ecCurve_SECG_PRIME_128R1, /* ECCurve_SECG_PRIME_128R1 */ -+ &ecCurve_SECG_PRIME_128R2, /* ECCurve_SECG_PRIME_128R2 */ -+ &ecCurve_SECG_PRIME_160K1, /* ECCurve_SECG_PRIME_160K1 */ -+ &ecCurve_SECG_PRIME_160R1, /* ECCurve_SECG_PRIME_160R1 */ -+ &ecCurve_SECG_PRIME_160R2, /* ECCurve_SECG_PRIME_160R2 */ -+ &ecCurve_SECG_PRIME_192K1, /* ECCurve_SECG_PRIME_192K1 */ -+ &ecCurve_SECG_PRIME_224K1, /* ECCurve_SECG_PRIME_224K1 */ - &ecCurve_SECG_PRIME_256K1, /* ECCurve_SECG_PRIME_256K1 */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -- NULL, /* ECCurve_noName */ -+ &ecCurve_SECG_CHAR2_113R1, /* ECCurve_SECG_CHAR2_113R1 */ -+ &ecCurve_SECG_CHAR2_113R2, /* ECCurve_SECG_CHAR2_113R2 */ -+ &ecCurve_SECG_CHAR2_131R1, /* ECCurve_SECG_CHAR2_131R1 */ -+ &ecCurve_SECG_CHAR2_131R2, /* ECCurve_SECG_CHAR2_131R2 */ -+ &ecCurve_SECG_CHAR2_163R1, /* ECCurve_SECG_CHAR2_163R1 */ -+ &ecCurve_SECG_CHAR2_193R1, /* ECCurve_SECG_CHAR2_193R1 */ -+ &ecCurve_SECG_CHAR2_193R2, /* ECCurve_SECG_CHAR2_193R2 */ -+ &ecCurve_SECG_CHAR2_239K1, /* ECCurve_SECG_CHAR2_239K1 */ -+ &ecCurve_WTLS_1, /* ECCurve_WTLS_1 */ -+ &ecCurve_WTLS_8, /* ECCurve_WTLS_8 */ -+ &ecCurve_WTLS_9, /* ECCurve_WTLS_9 */ -+ &ecCurve_BrainpoolP256r1, /* ECCurve_BrainpoolP256r1 */ -+ &ecCurve_BrainpoolP320r1, /* ECCurve_BrainpoolP320r1 */ -+ &ecCurve_BrainpoolP384r1, /* ECCurve_brainpoolP384r1 */ -+ &ecCurve_BrainpoolP512r1, /* ECCurve_brainpoolP512r1 */ - NULL /* ECCurve_pastLastCurve */ - }; +@@ -574,6 +607,45 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_192.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_192.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_192.c 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_192.c 2023-09-12 13:54:26.293575685 +0800 -@@ -0,0 +1,517 @@ -+/* -+ * Copyright (c) 2007, 2011, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for prime field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Douglas Stebila , Sun Microsystems Laboratories -+ * -+ *********************************************************************** */ -+ -+#include "ecp.h" -+#include "mpi.h" -+#include "mplogic.h" -+#include "mpi-priv.h" -+#ifndef _KERNEL -+#include -+#endif -+ -+#define ECP192_DIGITS ECL_CURVE_DIGITS(192) -+ -+/* Fast modular reduction for p192 = 2^192 - 2^64 - 1. a can be r. Uses -+ * algorithm 7 from Brown, Hankerson, Lopez, Menezes. Software -+ * Implementation of the NIST Elliptic Curves over Prime Fields. */ -+mp_err -+ec_GFp_nistp192_mod(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_size a_used = MP_USED(a); -+ mp_digit r3; -+#ifndef MPI_AMD64_ADD -+ mp_digit carry; -+#endif -+#ifdef ECL_THIRTY_TWO_BIT -+ mp_digit a5a = 0, a5b = 0, a4a = 0, a4b = 0, a3a = 0, a3b = 0; -+ mp_digit r0a, r0b, r1a, r1b, r2a, r2b; -+#else -+ mp_digit a5 = 0, a4 = 0, a3 = 0; -+ mp_digit r0, r1, r2; -+#endif -+ -+ /* reduction not needed if a is not larger than field size */ -+ if (a_used < ECP192_DIGITS) { -+ if (a == r) { -+ return MP_OKAY; -+ } -+ return mp_copy(a, r); -+ } -+ -+ /* for polynomials larger than twice the field size, use regular -+ * reduction */ -+ if (a_used > ECP192_DIGITS*2) { -+ MP_CHECKOK(mp_mod(a, &meth->irr, r)); -+ } else { -+ /* copy out upper words of a */ -+ -+#ifdef ECL_THIRTY_TWO_BIT -+ -+ /* in all the math below, -+ * nXb is most signifiant, nXa is least significant */ -+ switch (a_used) { -+ case 12: -+ a5b = MP_DIGIT(a, 11); -+ case 11: -+ a5a = MP_DIGIT(a, 10); -+ case 10: -+ a4b = MP_DIGIT(a, 9); -+ case 9: -+ a4a = MP_DIGIT(a, 8); -+ case 8: -+ a3b = MP_DIGIT(a, 7); -+ case 7: -+ a3a = MP_DIGIT(a, 6); -+ } -+ -+ -+ r2b= MP_DIGIT(a, 5); -+ r2a= MP_DIGIT(a, 4); -+ r1b = MP_DIGIT(a, 3); -+ r1a = MP_DIGIT(a, 2); -+ r0b = MP_DIGIT(a, 1); -+ r0a = MP_DIGIT(a, 0); -+ -+ /* implement r = (a2,a1,a0)+(a5,a5,a5)+(a4,a4,0)+(0,a3,a3) */ -+ MP_ADD_CARRY(r0a, a3a, r0a, 0, carry); -+ MP_ADD_CARRY(r0b, a3b, r0b, carry, carry); -+ MP_ADD_CARRY(r1a, a3a, r1a, carry, carry); -+ MP_ADD_CARRY(r1b, a3b, r1b, carry, carry); -+ MP_ADD_CARRY(r2a, a4a, r2a, carry, carry); -+ MP_ADD_CARRY(r2b, a4b, r2b, carry, carry); -+ r3 = carry; carry = 0; -+ MP_ADD_CARRY(r0a, a5a, r0a, 0, carry); -+ MP_ADD_CARRY(r0b, a5b, r0b, carry, carry); -+ MP_ADD_CARRY(r1a, a5a, r1a, carry, carry); -+ MP_ADD_CARRY(r1b, a5b, r1b, carry, carry); -+ MP_ADD_CARRY(r2a, a5a, r2a, carry, carry); -+ MP_ADD_CARRY(r2b, a5b, r2b, carry, carry); -+ r3 += carry; -+ MP_ADD_CARRY(r1a, a4a, r1a, 0, carry); -+ MP_ADD_CARRY(r1b, a4b, r1b, carry, carry); -+ MP_ADD_CARRY(r2a, 0, r2a, carry, carry); -+ MP_ADD_CARRY(r2b, 0, r2b, carry, carry); -+ r3 += carry; -+ -+ /* reduce out the carry */ -+ while (r3) { -+ MP_ADD_CARRY(r0a, r3, r0a, 0, carry); -+ MP_ADD_CARRY(r0b, 0, r0b, carry, carry); -+ MP_ADD_CARRY(r1a, r3, r1a, carry, carry); -+ MP_ADD_CARRY(r1b, 0, r1b, carry, carry); -+ MP_ADD_CARRY(r2a, 0, r2a, carry, carry); -+ MP_ADD_CARRY(r2b, 0, r2b, carry, carry); -+ r3 = carry; -+ } -+ -+ /* check for final reduction */ -+ /* -+ * our field is 0xffffffffffffffff, 0xfffffffffffffffe, -+ * 0xffffffffffffffff. That means we can only be over and need -+ * one more reduction -+ * if r2 == 0xffffffffffffffffff (same as r2+1 == 0) -+ * and -+ * r1 == 0xffffffffffffffffff or -+ * r1 == 0xfffffffffffffffffe and r0 = 0xfffffffffffffffff -+ * In all cases, we subtract the field (or add the 2's -+ * complement value (1,1,0)). (r0, r1, r2) -+ */ -+ if (((r2b == 0xffffffff) && (r2a == 0xffffffff) -+ && (r1b == 0xffffffff) ) && -+ ((r1a == 0xffffffff) || -+ (r1a == 0xfffffffe) && (r0a == 0xffffffff) && -+ (r0b == 0xffffffff)) ) { -+ /* do a quick subtract */ -+ MP_ADD_CARRY(r0a, 1, r0a, 0, carry); -+ r0b += carry; -+ r1a = r1b = r2a = r2b = 0; -+ } -+ -+ /* set the lower words of r */ -+ if (a != r) { -+ MP_CHECKOK(s_mp_pad(r, 6)); -+ } -+ MP_DIGIT(r, 5) = r2b; -+ MP_DIGIT(r, 4) = r2a; -+ MP_DIGIT(r, 3) = r1b; -+ MP_DIGIT(r, 2) = r1a; -+ MP_DIGIT(r, 1) = r0b; -+ MP_DIGIT(r, 0) = r0a; -+ MP_USED(r) = 6; -+#else -+ switch (a_used) { -+ case 6: -+ a5 = MP_DIGIT(a, 5); -+ case 5: -+ a4 = MP_DIGIT(a, 4); -+ case 4: -+ a3 = MP_DIGIT(a, 3); -+ } -+ -+ r2 = MP_DIGIT(a, 2); -+ r1 = MP_DIGIT(a, 1); -+ r0 = MP_DIGIT(a, 0); -+ -+ /* implement r = (a2,a1,a0)+(a5,a5,a5)+(a4,a4,0)+(0,a3,a3) */ -+#ifndef MPI_AMD64_ADD -+ MP_ADD_CARRY_ZERO(r0, a3, r0, carry); -+ MP_ADD_CARRY(r1, a3, r1, carry, carry); -+ MP_ADD_CARRY(r2, a4, r2, carry, carry); -+ r3 = carry; -+ MP_ADD_CARRY_ZERO(r0, a5, r0, carry); -+ MP_ADD_CARRY(r1, a5, r1, carry, carry); -+ MP_ADD_CARRY(r2, a5, r2, carry, carry); -+ r3 += carry; -+ MP_ADD_CARRY_ZERO(r1, a4, r1, carry); -+ MP_ADD_CARRY(r2, 0, r2, carry, carry); -+ r3 += carry; -+ -+#else -+ r2 = MP_DIGIT(a, 2); -+ r1 = MP_DIGIT(a, 1); -+ r0 = MP_DIGIT(a, 0); -+ -+ /* set the lower words of r */ -+ __asm__ ( -+ "xorq %3,%3 \n\t" -+ "addq %4,%0 \n\t" -+ "adcq %4,%1 \n\t" -+ "adcq %5,%2 \n\t" -+ "adcq $0,%3 \n\t" -+ "addq %6,%0 \n\t" -+ "adcq %6,%1 \n\t" -+ "adcq %6,%2 \n\t" -+ "adcq $0,%3 \n\t" -+ "addq %5,%1 \n\t" -+ "adcq $0,%2 \n\t" -+ "adcq $0,%3 \n\t" -+ : "=r"(r0), "=r"(r1), "=r"(r2), "=r"(r3), "=r"(a3), -+ "=r"(a4), "=r"(a5) -+ : "0" (r0), "1" (r1), "2" (r2), "3" (r3), -+ "4" (a3), "5" (a4), "6"(a5) -+ : "%cc" ); -+#endif -+ -+ /* reduce out the carry */ -+ while (r3) { -+#ifndef MPI_AMD64_ADD -+ MP_ADD_CARRY_ZERO(r0, r3, r0, carry); -+ MP_ADD_CARRY(r1, r3, r1, carry, carry); -+ MP_ADD_CARRY(r2, 0, r2, carry, carry); -+ r3 = carry; -+#else -+ a3=r3; -+ __asm__ ( -+ "xorq %3,%3 \n\t" -+ "addq %4,%0 \n\t" -+ "adcq %4,%1 \n\t" -+ "adcq $0,%2 \n\t" -+ "adcq $0,%3 \n\t" -+ : "=r"(r0), "=r"(r1), "=r"(r2), "=r"(r3), "=r"(a3) -+ : "0" (r0), "1" (r1), "2" (r2), "3" (r3), "4"(a3) -+ : "%cc" ); -+#endif -+ } -+ -+ /* check for final reduction */ -+ /* -+ * our field is 0xffffffffffffffff, 0xfffffffffffffffe, -+ * 0xffffffffffffffff. That means we can only be over and need -+ * one more reduction -+ * if r2 == 0xffffffffffffffffff (same as r2+1 == 0) -+ * and -+ * r1 == 0xffffffffffffffffff or -+ * r1 == 0xfffffffffffffffffe and r0 = 0xfffffffffffffffff -+ * In all cases, we subtract the field (or add the 2's -+ * complement value (1,1,0)). (r0, r1, r2) -+ */ -+ if (r3 || ((r2 == MP_DIGIT_MAX) && -+ ((r1 == MP_DIGIT_MAX) || -+ ((r1 == (MP_DIGIT_MAX-1)) && (r0 == MP_DIGIT_MAX))))) { -+ /* do a quick subtract */ -+ r0++; -+ r1 = r2 = 0; -+ } -+ /* set the lower words of r */ -+ if (a != r) { -+ MP_CHECKOK(s_mp_pad(r, 3)); -+ } -+ MP_DIGIT(r, 2) = r2; -+ MP_DIGIT(r, 1) = r1; -+ MP_DIGIT(r, 0) = r0; -+ MP_USED(r) = 3; -+#endif -+ } -+ -+ CLEANUP: -+ return res; -+} -+ -+#ifndef ECL_THIRTY_TWO_BIT -+/* Compute the sum of 192 bit curves. Do the work in-line since the -+ * number of words are so small, we don't want to overhead of mp function -+ * calls. Uses optimized modular reduction for p192. -+ */ -+mp_err -+ec_GFp_nistp192_add(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit a0 = 0, a1 = 0, a2 = 0; -+ mp_digit r0 = 0, r1 = 0, r2 = 0; -+ mp_digit carry; -+ -+ switch(MP_USED(a)) { -+ case 3: -+ a2 = MP_DIGIT(a,2); -+ case 2: -+ a1 = MP_DIGIT(a,1); -+ case 1: -+ a0 = MP_DIGIT(a,0); -+ } -+ switch(MP_USED(b)) { -+ case 3: -+ r2 = MP_DIGIT(b,2); -+ case 2: -+ r1 = MP_DIGIT(b,1); -+ case 1: -+ r0 = MP_DIGIT(b,0); -+ } -+ -+#ifndef MPI_AMD64_ADD -+ MP_ADD_CARRY_ZERO(a0, r0, r0, carry); -+ MP_ADD_CARRY(a1, r1, r1, carry, carry); -+ MP_ADD_CARRY(a2, r2, r2, carry, carry); -+#else -+ __asm__ ( -+ "xorq %3,%3 \n\t" -+ "addq %4,%0 \n\t" -+ "adcq %5,%1 \n\t" -+ "adcq %6,%2 \n\t" -+ "adcq $0,%3 \n\t" -+ : "=r"(r0), "=r"(r1), "=r"(r2), "=r"(carry) -+ : "r" (a0), "r" (a1), "r" (a2), "0" (r0), -+ "1" (r1), "2" (r2) -+ : "%cc" ); -+#endif -+ -+ /* Do quick 'subract' if we've gone over -+ * (add the 2's complement of the curve field) */ -+ if (carry || ((r2 == MP_DIGIT_MAX) && -+ ((r1 == MP_DIGIT_MAX) || -+ ((r1 == (MP_DIGIT_MAX-1)) && (r0 == MP_DIGIT_MAX))))) { -+#ifndef MPI_AMD64_ADD -+ MP_ADD_CARRY_ZERO(r0, 1, r0, carry); -+ MP_ADD_CARRY(r1, 1, r1, carry, carry); -+ MP_ADD_CARRY(r2, 0, r2, carry, carry); -+#else -+ __asm__ ( -+ "addq $1,%0 \n\t" -+ "adcq $1,%1 \n\t" -+ "adcq $0,%2 \n\t" -+ : "=r"(r0), "=r"(r1), "=r"(r2) -+ : "0" (r0), "1" (r1), "2" (r2) -+ : "%cc" ); -+#endif -+ } -+ -+ -+ MP_CHECKOK(s_mp_pad(r, 3)); -+ MP_DIGIT(r, 2) = r2; -+ MP_DIGIT(r, 1) = r1; -+ MP_DIGIT(r, 0) = r0; -+ MP_SIGN(r) = MP_ZPOS; -+ MP_USED(r) = 3; -+ s_mp_clamp(r); -+ -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Compute the diff of 192 bit curves. Do the work in-line since the -+ * number of words are so small, we don't want to overhead of mp function -+ * calls. Uses optimized modular reduction for p192. -+ */ -+mp_err -+ec_GFp_nistp192_sub(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_digit b0 = 0, b1 = 0, b2 = 0; -+ mp_digit r0 = 0, r1 = 0, r2 = 0; -+ mp_digit borrow; -+ -+ switch(MP_USED(a)) { -+ case 3: -+ r2 = MP_DIGIT(a,2); -+ case 2: -+ r1 = MP_DIGIT(a,1); -+ case 1: -+ r0 = MP_DIGIT(a,0); -+ } -+ -+ switch(MP_USED(b)) { -+ case 3: -+ b2 = MP_DIGIT(b,2); -+ case 2: -+ b1 = MP_DIGIT(b,1); -+ case 1: -+ b0 = MP_DIGIT(b,0); -+ } -+ -+#ifndef MPI_AMD64_ADD -+ MP_SUB_BORROW(r0, b0, r0, 0, borrow); -+ MP_SUB_BORROW(r1, b1, r1, borrow, borrow); -+ MP_SUB_BORROW(r2, b2, r2, borrow, borrow); -+#else -+ __asm__ ( -+ "xorq %3,%3 \n\t" -+ "subq %4,%0 \n\t" -+ "sbbq %5,%1 \n\t" -+ "sbbq %6,%2 \n\t" -+ "adcq $0,%3 \n\t" -+ : "=r"(r0), "=r"(r1), "=r"(r2), "=r"(borrow) -+ : "r" (b0), "r" (b1), "r" (b2), "0" (r0), -+ "1" (r1), "2" (r2) -+ : "%cc" ); -+#endif -+ -+ /* Do quick 'add' if we've gone under 0 -+ * (subtract the 2's complement of the curve field) */ -+ if (borrow) { -+#ifndef MPI_AMD64_ADD -+ MP_SUB_BORROW(r0, 1, r0, 0, borrow); -+ MP_SUB_BORROW(r1, 1, r1, borrow, borrow); -+ MP_SUB_BORROW(r2, 0, r2, borrow, borrow); -+#else -+ __asm__ ( -+ "subq $1,%0 \n\t" -+ "sbbq $1,%1 \n\t" -+ "sbbq $0,%2 \n\t" -+ : "=r"(r0), "=r"(r1), "=r"(r2) -+ : "0" (r0), "1" (r1), "2" (r2) -+ : "%cc" ); -+#endif -+ } -+ -+ MP_CHECKOK(s_mp_pad(r, 3)); -+ MP_DIGIT(r, 2) = r2; -+ MP_DIGIT(r, 1) = r1; -+ MP_DIGIT(r, 0) = r0; -+ MP_SIGN(r) = MP_ZPOS; -+ MP_USED(r) = 3; -+ s_mp_clamp(r); -+ -+ CLEANUP: -+ return res; -+} -+ -+#endif -+ -+/* Compute the square of polynomial a, reduce modulo p192. Store the -+ * result in r. r could be a. Uses optimized modular reduction for p192. -+ */ -+mp_err -+ec_GFp_nistp192_sqr(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ -+ MP_CHECKOK(mp_sqr(a, r)); -+ MP_CHECKOK(ec_GFp_nistp192_mod(r, r, meth)); -+ CLEANUP: -+ return res; -+} -+ -+/* Compute the product of two polynomials a and b, reduce modulo p192. -+ * Store the result in r. r could be a or b; a could be b. Uses -+ * optimized modular reduction for p192. */ -+mp_err -+ec_GFp_nistp192_mul(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ -+ MP_CHECKOK(mp_mul(a, b, r)); -+ MP_CHECKOK(ec_GFp_nistp192_mod(r, r, meth)); -+ CLEANUP: -+ return res; -+} -+ -+/* Divides two field elements. If a is NULL, then returns the inverse of -+ * b. */ -+mp_err -+ec_GFp_nistp192_div(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_int t; -+ -+ /* If a is NULL, then return the inverse of b, otherwise return a/b. */ -+ if (a == NULL) { -+ return mp_invmod(b, &meth->irr, r); -+ } else { -+ /* MPI doesn't support divmod, so we implement it using invmod and -+ * mulmod. */ -+ MP_CHECKOK(mp_init(&t, FLAG(b))); -+ MP_CHECKOK(mp_invmod(b, &meth->irr, &t)); -+ MP_CHECKOK(mp_mul(a, &t, r)); -+ MP_CHECKOK(ec_GFp_nistp192_mod(r, r, meth)); -+ CLEANUP: -+ mp_clear(&t); -+ return res; -+ } -+} -+ -+/* Wire in fast field arithmetic and precomputation of base point for -+ * named curves. */ -+mp_err -+ec_group_set_gfp192(ECGroup *group, ECCurveName name) -+{ -+ if (name == ECCurve_NIST_P192) { -+ group->meth->field_mod = &ec_GFp_nistp192_mod; -+ group->meth->field_mul = &ec_GFp_nistp192_mul; -+ group->meth->field_sqr = &ec_GFp_nistp192_sqr; -+ group->meth->field_div = &ec_GFp_nistp192_div; -+#ifndef ECL_THIRTY_TWO_BIT -+ group->meth->field_add = &ec_GFp_nistp192_add; -+ group->meth->field_sub = &ec_GFp_nistp192_sub; -+#endif -+ } -+ return MP_OKAY; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_224.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_224.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_224.c 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/ecp_224.c 2023-09-12 13:54:26.293575685 +0800 -@@ -0,0 +1,373 @@ -+/* -+ * Copyright (c) 2007, 2011, Oracle and/or its affiliates. All rights reserved. -+ * Use is subject to license terms. -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public License -+ * along with this library; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* ********************************************************************* -+ * -+ * The Original Code is the elliptic curve math library for prime field curves. -+ * -+ * The Initial Developer of the Original Code is -+ * Sun Microsystems, Inc. -+ * Portions created by the Initial Developer are Copyright (C) 2003 -+ * the Initial Developer. All Rights Reserved. -+ * -+ * Contributor(s): -+ * Douglas Stebila , Sun Microsystems Laboratories -+ * -+ *********************************************************************** */ -+ -+#include "ecp.h" -+#include "mpi.h" -+#include "mplogic.h" -+#include "mpi-priv.h" -+#ifndef _KERNEL -+#include -+#endif -+ -+#define ECP224_DIGITS ECL_CURVE_DIGITS(224) -+ -+/* Fast modular reduction for p224 = 2^224 - 2^96 + 1. a can be r. Uses -+ * algorithm 7 from Brown, Hankerson, Lopez, Menezes. Software -+ * Implementation of the NIST Elliptic Curves over Prime Fields. */ -+mp_err -+ec_GFp_nistp224_mod(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_size a_used = MP_USED(a); -+ -+ int r3b; -+ mp_digit carry; -+#ifdef ECL_THIRTY_TWO_BIT -+ mp_digit a6a = 0, a6b = 0, -+ a5a = 0, a5b = 0, a4a = 0, a4b = 0, a3a = 0, a3b = 0; -+ mp_digit r0a, r0b, r1a, r1b, r2a, r2b, r3a; -+#else -+ mp_digit a6 = 0, a5 = 0, a4 = 0, a3b = 0, a5a = 0; -+ mp_digit a6b = 0, a6a_a5b = 0, a5b = 0, a5a_a4b = 0, a4a_a3b = 0; -+ mp_digit r0, r1, r2, r3; -+#endif -+ -+ /* reduction not needed if a is not larger than field size */ -+ if (a_used < ECP224_DIGITS) { -+ if (a == r) return MP_OKAY; -+ return mp_copy(a, r); -+ } -+ /* for polynomials larger than twice the field size, use regular -+ * reduction */ -+ if (a_used > ECL_CURVE_DIGITS(224*2)) { -+ MP_CHECKOK(mp_mod(a, &meth->irr, r)); -+ } else { -+#ifdef ECL_THIRTY_TWO_BIT -+ /* copy out upper words of a */ -+ switch (a_used) { -+ case 14: -+ a6b = MP_DIGIT(a, 13); -+ case 13: -+ a6a = MP_DIGIT(a, 12); -+ case 12: -+ a5b = MP_DIGIT(a, 11); -+ case 11: -+ a5a = MP_DIGIT(a, 10); -+ case 10: -+ a4b = MP_DIGIT(a, 9); -+ case 9: -+ a4a = MP_DIGIT(a, 8); -+ case 8: -+ a3b = MP_DIGIT(a, 7); -+ } -+ r3a = MP_DIGIT(a, 6); -+ r2b= MP_DIGIT(a, 5); -+ r2a= MP_DIGIT(a, 4); -+ r1b = MP_DIGIT(a, 3); -+ r1a = MP_DIGIT(a, 2); -+ r0b = MP_DIGIT(a, 1); -+ r0a = MP_DIGIT(a, 0); -+ -+ -+ /* implement r = (a3a,a2,a1,a0) -+ +(a5a, a4,a3b, 0) -+ +( 0, a6,a5b, 0) -+ -( 0 0, 0|a6b, a6a|a5b ) -+ -( a6b, a6a|a5b, a5a|a4b, a4a|a3b ) */ -+ MP_ADD_CARRY (r1b, a3b, r1b, 0, carry); -+ MP_ADD_CARRY (r2a, a4a, r2a, carry, carry); -+ MP_ADD_CARRY (r2b, a4b, r2b, carry, carry); -+ MP_ADD_CARRY (r3a, a5a, r3a, carry, carry); -+ r3b = carry; -+ MP_ADD_CARRY (r1b, a5b, r1b, 0, carry); -+ MP_ADD_CARRY (r2a, a6a, r2a, carry, carry); -+ MP_ADD_CARRY (r2b, a6b, r2b, carry, carry); -+ MP_ADD_CARRY (r3a, 0, r3a, carry, carry); -+ r3b += carry; -+ MP_SUB_BORROW(r0a, a3b, r0a, 0, carry); -+ MP_SUB_BORROW(r0b, a4a, r0b, carry, carry); -+ MP_SUB_BORROW(r1a, a4b, r1a, carry, carry); -+ MP_SUB_BORROW(r1b, a5a, r1b, carry, carry); -+ MP_SUB_BORROW(r2a, a5b, r2a, carry, carry); -+ MP_SUB_BORROW(r2b, a6a, r2b, carry, carry); -+ MP_SUB_BORROW(r3a, a6b, r3a, carry, carry); -+ r3b -= carry; -+ MP_SUB_BORROW(r0a, a5b, r0a, 0, carry); -+ MP_SUB_BORROW(r0b, a6a, r0b, carry, carry); -+ MP_SUB_BORROW(r1a, a6b, r1a, carry, carry); -+ if (carry) { -+ MP_SUB_BORROW(r1b, 0, r1b, carry, carry); -+ MP_SUB_BORROW(r2a, 0, r2a, carry, carry); -+ MP_SUB_BORROW(r2b, 0, r2b, carry, carry); -+ MP_SUB_BORROW(r3a, 0, r3a, carry, carry); -+ r3b -= carry; -+ } -+ -+ while (r3b > 0) { -+ int tmp; -+ MP_ADD_CARRY(r1b, r3b, r1b, 0, carry); -+ if (carry) { -+ MP_ADD_CARRY(r2a, 0, r2a, carry, carry); -+ MP_ADD_CARRY(r2b, 0, r2b, carry, carry); -+ MP_ADD_CARRY(r3a, 0, r3a, carry, carry); -+ } -+ tmp = carry; -+ MP_SUB_BORROW(r0a, r3b, r0a, 0, carry); -+ if (carry) { -+ MP_SUB_BORROW(r0b, 0, r0b, carry, carry); -+ MP_SUB_BORROW(r1a, 0, r1a, carry, carry); -+ MP_SUB_BORROW(r1b, 0, r1b, carry, carry); -+ MP_SUB_BORROW(r2a, 0, r2a, carry, carry); -+ MP_SUB_BORROW(r2b, 0, r2b, carry, carry); -+ MP_SUB_BORROW(r3a, 0, r3a, carry, carry); -+ tmp -= carry; -+ } -+ r3b = tmp; -+ } -+ -+ while (r3b < 0) { -+ mp_digit maxInt = MP_DIGIT_MAX; -+ MP_ADD_CARRY (r0a, 1, r0a, 0, carry); -+ MP_ADD_CARRY (r0b, 0, r0b, carry, carry); -+ MP_ADD_CARRY (r1a, 0, r1a, carry, carry); -+ MP_ADD_CARRY (r1b, maxInt, r1b, carry, carry); -+ MP_ADD_CARRY (r2a, maxInt, r2a, carry, carry); -+ MP_ADD_CARRY (r2b, maxInt, r2b, carry, carry); -+ MP_ADD_CARRY (r3a, maxInt, r3a, carry, carry); -+ r3b += carry; -+ } -+ /* check for final reduction */ -+ /* now the only way we are over is if the top 4 words are all ones */ -+ if ((r3a == MP_DIGIT_MAX) && (r2b == MP_DIGIT_MAX) -+ && (r2a == MP_DIGIT_MAX) && (r1b == MP_DIGIT_MAX) && -+ ((r1a != 0) || (r0b != 0) || (r0a != 0)) ) { -+ /* one last subraction */ -+ MP_SUB_BORROW(r0a, 1, r0a, 0, carry); -+ MP_SUB_BORROW(r0b, 0, r0b, carry, carry); -+ MP_SUB_BORROW(r1a, 0, r1a, carry, carry); -+ r1b = r2a = r2b = r3a = 0; -+ } -+ -+ -+ if (a != r) { -+ MP_CHECKOK(s_mp_pad(r, 7)); -+ } -+ /* set the lower words of r */ -+ MP_SIGN(r) = MP_ZPOS; -+ MP_USED(r) = 7; -+ MP_DIGIT(r, 6) = r3a; -+ MP_DIGIT(r, 5) = r2b; -+ MP_DIGIT(r, 4) = r2a; -+ MP_DIGIT(r, 3) = r1b; -+ MP_DIGIT(r, 2) = r1a; -+ MP_DIGIT(r, 1) = r0b; -+ MP_DIGIT(r, 0) = r0a; -+#else -+ /* copy out upper words of a */ -+ switch (a_used) { -+ case 7: -+ a6 = MP_DIGIT(a, 6); -+ a6b = a6 >> 32; -+ a6a_a5b = a6 << 32; -+ case 6: -+ a5 = MP_DIGIT(a, 5); -+ a5b = a5 >> 32; -+ a6a_a5b |= a5b; -+ a5b = a5b << 32; -+ a5a_a4b = a5 << 32; -+ a5a = a5 & 0xffffffff; -+ case 5: -+ a4 = MP_DIGIT(a, 4); -+ a5a_a4b |= a4 >> 32; -+ a4a_a3b = a4 << 32; -+ case 4: -+ a3b = MP_DIGIT(a, 3) >> 32; -+ a4a_a3b |= a3b; -+ a3b = a3b << 32; -+ } -+ -+ r3 = MP_DIGIT(a, 3) & 0xffffffff; -+ r2 = MP_DIGIT(a, 2); -+ r1 = MP_DIGIT(a, 1); -+ r0 = MP_DIGIT(a, 0); -+ -+ /* implement r = (a3a,a2,a1,a0) -+ +(a5a, a4,a3b, 0) -+ +( 0, a6,a5b, 0) -+ -( 0 0, 0|a6b, a6a|a5b ) -+ -( a6b, a6a|a5b, a5a|a4b, a4a|a3b ) */ -+ MP_ADD_CARRY_ZERO (r1, a3b, r1, carry); -+ MP_ADD_CARRY (r2, a4 , r2, carry, carry); -+ MP_ADD_CARRY (r3, a5a, r3, carry, carry); -+ MP_ADD_CARRY_ZERO (r1, a5b, r1, carry); -+ MP_ADD_CARRY (r2, a6 , r2, carry, carry); -+ MP_ADD_CARRY (r3, 0, r3, carry, carry); -+ -+ MP_SUB_BORROW(r0, a4a_a3b, r0, 0, carry); -+ MP_SUB_BORROW(r1, a5a_a4b, r1, carry, carry); -+ MP_SUB_BORROW(r2, a6a_a5b, r2, carry, carry); -+ MP_SUB_BORROW(r3, a6b , r3, carry, carry); -+ MP_SUB_BORROW(r0, a6a_a5b, r0, 0, carry); -+ MP_SUB_BORROW(r1, a6b , r1, carry, carry); -+ if (carry) { -+ MP_SUB_BORROW(r2, 0, r2, carry, carry); -+ MP_SUB_BORROW(r3, 0, r3, carry, carry); -+ } -+ -+ -+ /* if the value is negative, r3 has a 2's complement -+ * high value */ -+ r3b = (int)(r3 >>32); -+ while (r3b > 0) { -+ r3 &= 0xffffffff; -+ MP_ADD_CARRY_ZERO(r1,((mp_digit)r3b) << 32, r1, carry); -+ if (carry) { -+ MP_ADD_CARRY(r2, 0, r2, carry, carry); -+ MP_ADD_CARRY(r3, 0, r3, carry, carry); -+ } -+ MP_SUB_BORROW(r0, r3b, r0, 0, carry); -+ if (carry) { -+ MP_SUB_BORROW(r1, 0, r1, carry, carry); -+ MP_SUB_BORROW(r2, 0, r2, carry, carry); -+ MP_SUB_BORROW(r3, 0, r3, carry, carry); -+ } -+ r3b = (int)(r3 >>32); -+ } -+ -+ while (r3b < 0) { -+ MP_ADD_CARRY_ZERO (r0, 1, r0, carry); -+ MP_ADD_CARRY (r1, MP_DIGIT_MAX <<32, r1, carry, carry); -+ MP_ADD_CARRY (r2, MP_DIGIT_MAX, r2, carry, carry); -+ MP_ADD_CARRY (r3, MP_DIGIT_MAX >> 32, r3, carry, carry); -+ r3b = (int)(r3 >>32); -+ } -+ /* check for final reduction */ -+ /* now the only way we are over is if the top 4 words are all ones */ -+ if ((r3 == (MP_DIGIT_MAX >> 32)) && (r2 == MP_DIGIT_MAX) -+ && ((r1 & MP_DIGIT_MAX << 32)== MP_DIGIT_MAX << 32) && -+ ((r1 != MP_DIGIT_MAX << 32 ) || (r0 != 0)) ) { -+ /* one last subraction */ -+ MP_SUB_BORROW(r0, 1, r0, 0, carry); -+ MP_SUB_BORROW(r1, 0, r1, carry, carry); -+ r2 = r3 = 0; -+ } -+ -+ -+ if (a != r) { -+ MP_CHECKOK(s_mp_pad(r, 4)); -+ } -+ /* set the lower words of r */ -+ MP_SIGN(r) = MP_ZPOS; -+ MP_USED(r) = 4; -+ MP_DIGIT(r, 3) = r3; -+ MP_DIGIT(r, 2) = r2; -+ MP_DIGIT(r, 1) = r1; -+ MP_DIGIT(r, 0) = r0; -+#endif -+ } -+ -+ CLEANUP: -+ return res; -+} -+ -+/* Compute the square of polynomial a, reduce modulo p224. Store the -+ * result in r. r could be a. Uses optimized modular reduction for p224. -+ */ -+mp_err -+ec_GFp_nistp224_sqr(const mp_int *a, mp_int *r, const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ -+ MP_CHECKOK(mp_sqr(a, r)); -+ MP_CHECKOK(ec_GFp_nistp224_mod(r, r, meth)); -+ CLEANUP: -+ return res; -+} -+ -+/* Compute the product of two polynomials a and b, reduce modulo p224. -+ * Store the result in r. r could be a or b; a could be b. Uses -+ * optimized modular reduction for p224. */ -+mp_err -+ec_GFp_nistp224_mul(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ -+ MP_CHECKOK(mp_mul(a, b, r)); -+ MP_CHECKOK(ec_GFp_nistp224_mod(r, r, meth)); -+ CLEANUP: -+ return res; -+} + #endif + ++#if defined(mips64) || defined(mips64el) + -+/* Divides two field elements. If a is NULL, then returns the inverse of -+ * b. */ -+mp_err -+ec_GFp_nistp224_div(const mp_int *a, const mp_int *b, mp_int *r, -+ const GFMethod *meth) -+{ -+ mp_err res = MP_OKAY; -+ mp_int t; ++#define REG_INDEX(reg) sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext_##reg + -+ /* If a is NULL, then return the inverse of b, otherwise return a/b. */ -+ if (a == NULL) { -+ return mp_invmod(b, &meth->irr, r); -+ } else { -+ /* MPI doesn't support divmod, so we implement it using invmod and -+ * mulmod. */ -+ MP_CHECKOK(mp_init(&t, FLAG(b))); -+ MP_CHECKOK(mp_invmod(b, &meth->irr, &t)); -+ MP_CHECKOK(mp_mul(a, &t, r)); -+ MP_CHECKOK(ec_GFp_nistp224_mod(r, r, meth)); -+ CLEANUP: -+ mp_clear(&t); -+ return res; -+ } -+} ++ regs[REG_INDEX(ZERO)] = gregs.regs[0]; ++ regs[REG_INDEX(AT)] = gregs.regs[1]; ++ regs[REG_INDEX(V0)] = gregs.regs[2]; ++ regs[REG_INDEX(V1)] = gregs.regs[3]; ++ regs[REG_INDEX(A0)] = gregs.regs[4]; ++ regs[REG_INDEX(A1)] = gregs.regs[5]; ++ regs[REG_INDEX(A2)] = gregs.regs[6]; ++ regs[REG_INDEX(A3)] = gregs.regs[7]; ++ regs[REG_INDEX(T0)] = gregs.regs[8]; ++ regs[REG_INDEX(T1)] = gregs.regs[9]; ++ regs[REG_INDEX(T2)] = gregs.regs[10]; ++ regs[REG_INDEX(T3)] = gregs.regs[11]; ++ regs[REG_INDEX(T4)] = gregs.regs[12]; ++ regs[REG_INDEX(T5)] = gregs.regs[13]; ++ regs[REG_INDEX(T6)] = gregs.regs[14]; ++ regs[REG_INDEX(T7)] = gregs.regs[15]; ++ regs[REG_INDEX(S0)] = gregs.regs[16]; ++ regs[REG_INDEX(S1)] = gregs.regs[17]; ++ regs[REG_INDEX(S2)] = gregs.regs[18]; ++ regs[REG_INDEX(S3)] = gregs.regs[19]; ++ regs[REG_INDEX(S4)] = gregs.regs[20]; ++ regs[REG_INDEX(S5)] = gregs.regs[21]; ++ regs[REG_INDEX(S6)] = gregs.regs[22]; ++ regs[REG_INDEX(S7)] = gregs.regs[23]; ++ regs[REG_INDEX(T8)] = gregs.regs[24]; ++ regs[REG_INDEX(T9)] = gregs.regs[25]; ++ regs[REG_INDEX(K0)] = gregs.regs[26]; ++ regs[REG_INDEX(K1)] = gregs.regs[27]; ++ regs[REG_INDEX(GP)] = gregs.regs[28]; ++ regs[REG_INDEX(SP)] = gregs.regs[29]; ++ regs[REG_INDEX(FP)] = gregs.regs[30]; ++ regs[REG_INDEX(S8)] = gregs.regs[30]; ++ regs[REG_INDEX(RA)] = gregs.regs[31]; ++#endif /* mips */ + -+/* Wire in fast field arithmetic and precomputation of base point for -+ * named curves. */ -+mp_err -+ec_group_set_gfp224(ECGroup *group, ECCurveName name) -+{ -+ if (name == ECCurve_NIST_P224) { -+ group->meth->field_mod = &ec_GFp_nistp224_mod; -+ group->meth->field_mul = &ec_GFp_nistp224_mul; -+ group->meth->field_sqr = &ec_GFp_nistp224_sqr; -+ group->meth->field_div = &ec_GFp_nistp224_div; -+ } -+ return MP_OKAY; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/oid.c jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/oid.c ---- openjdk/src/jdk.crypto.ec/share/native/libsunec/impl/oid.c 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/src/jdk.crypto.ec/share/native/libsunec/impl/oid.c 2023-09-12 13:54:26.297575690 +0800 -@@ -73,13 +73,87 @@ - /* NOTE: prime192v1 is the same as secp192r1, prime256v1 is the - * same as secp256r1 - */ -+CONST_OID ansiX962prime192v1[] = { ANSI_X962_GFp_OID, 0x01 }; -+CONST_OID ansiX962prime192v2[] = { ANSI_X962_GFp_OID, 0x02 }; -+CONST_OID ansiX962prime192v3[] = { ANSI_X962_GFp_OID, 0x03 }; -+CONST_OID ansiX962prime239v1[] = { ANSI_X962_GFp_OID, 0x04 }; -+CONST_OID ansiX962prime239v2[] = { ANSI_X962_GFp_OID, 0x05 }; -+CONST_OID ansiX962prime239v3[] = { ANSI_X962_GFp_OID, 0x06 }; - CONST_OID ansiX962prime256v1[] = { ANSI_X962_GFp_OID, 0x07 }; - - /* SECG prime curve OIDs */ -+CONST_OID secgECsecp112r1[] = { SECG_OID, 0x06 }; -+CONST_OID secgECsecp112r2[] = { SECG_OID, 0x07 }; -+CONST_OID secgECsecp128r1[] = { SECG_OID, 0x1c }; -+CONST_OID secgECsecp128r2[] = { SECG_OID, 0x1d }; -+CONST_OID secgECsecp160k1[] = { SECG_OID, 0x09 }; -+CONST_OID secgECsecp160r1[] = { SECG_OID, 0x08 }; -+CONST_OID secgECsecp160r2[] = { SECG_OID, 0x1e }; -+CONST_OID secgECsecp192k1[] = { SECG_OID, 0x1f }; -+CONST_OID secgECsecp224k1[] = { SECG_OID, 0x20 }; -+CONST_OID secgECsecp224r1[] = { SECG_OID, 0x21 }; - CONST_OID secgECsecp256k1[] = { SECG_OID, 0x0a }; - CONST_OID secgECsecp384r1[] = { SECG_OID, 0x22 }; - CONST_OID secgECsecp521r1[] = { SECG_OID, 0x23 }; - -+/* SECG characterisitic two curve OIDs */ -+CONST_OID secgECsect113r1[] = {SECG_OID, 0x04 }; -+CONST_OID secgECsect113r2[] = {SECG_OID, 0x05 }; -+CONST_OID secgECsect131r1[] = {SECG_OID, 0x16 }; -+CONST_OID secgECsect131r2[] = {SECG_OID, 0x17 }; -+CONST_OID secgECsect163k1[] = {SECG_OID, 0x01 }; -+CONST_OID secgECsect163r1[] = {SECG_OID, 0x02 }; -+CONST_OID secgECsect163r2[] = {SECG_OID, 0x0f }; -+CONST_OID secgECsect193r1[] = {SECG_OID, 0x18 }; -+CONST_OID secgECsect193r2[] = {SECG_OID, 0x19 }; -+CONST_OID secgECsect233k1[] = {SECG_OID, 0x1a }; -+CONST_OID secgECsect233r1[] = {SECG_OID, 0x1b }; -+CONST_OID secgECsect239k1[] = {SECG_OID, 0x03 }; -+CONST_OID secgECsect283k1[] = {SECG_OID, 0x10 }; -+CONST_OID secgECsect283r1[] = {SECG_OID, 0x11 }; -+CONST_OID secgECsect409k1[] = {SECG_OID, 0x24 }; -+CONST_OID secgECsect409r1[] = {SECG_OID, 0x25 }; -+CONST_OID secgECsect571k1[] = {SECG_OID, 0x26 }; -+CONST_OID secgECsect571r1[] = {SECG_OID, 0x27 }; -+ -+/* ANSI X9.62 characteristic two curve OIDs */ -+CONST_OID ansiX962c2pnb163v1[] = { ANSI_X962_GF2m_OID, 0x01 }; -+CONST_OID ansiX962c2pnb163v2[] = { ANSI_X962_GF2m_OID, 0x02 }; -+CONST_OID ansiX962c2pnb163v3[] = { ANSI_X962_GF2m_OID, 0x03 }; -+CONST_OID ansiX962c2pnb176v1[] = { ANSI_X962_GF2m_OID, 0x04 }; -+CONST_OID ansiX962c2tnb191v1[] = { ANSI_X962_GF2m_OID, 0x05 }; -+CONST_OID ansiX962c2tnb191v2[] = { ANSI_X962_GF2m_OID, 0x06 }; -+CONST_OID ansiX962c2tnb191v3[] = { ANSI_X962_GF2m_OID, 0x07 }; -+CONST_OID ansiX962c2onb191v4[] = { ANSI_X962_GF2m_OID, 0x08 }; -+CONST_OID ansiX962c2onb191v5[] = { ANSI_X962_GF2m_OID, 0x09 }; -+CONST_OID ansiX962c2pnb208w1[] = { ANSI_X962_GF2m_OID, 0x0a }; -+CONST_OID ansiX962c2tnb239v1[] = { ANSI_X962_GF2m_OID, 0x0b }; -+CONST_OID ansiX962c2tnb239v2[] = { ANSI_X962_GF2m_OID, 0x0c }; -+CONST_OID ansiX962c2tnb239v3[] = { ANSI_X962_GF2m_OID, 0x0d }; -+CONST_OID ansiX962c2onb239v4[] = { ANSI_X962_GF2m_OID, 0x0e }; -+CONST_OID ansiX962c2onb239v5[] = { ANSI_X962_GF2m_OID, 0x0f }; -+CONST_OID ansiX962c2pnb272w1[] = { ANSI_X962_GF2m_OID, 0x10 }; -+CONST_OID ansiX962c2pnb304w1[] = { ANSI_X962_GF2m_OID, 0x11 }; -+CONST_OID ansiX962c2tnb359v1[] = { ANSI_X962_GF2m_OID, 0x12 }; -+CONST_OID ansiX962c2pnb368w1[] = { ANSI_X962_GF2m_OID, 0x13 }; -+CONST_OID ansiX962c2tnb431r1[] = { ANSI_X962_GF2m_OID, 0x14 }; -+ -+/* TeleTrusT ECC Brainpool prime curve OIDs */ -+CONST_OID brainpoolP160r1[] = { ECC_BRAINPOOL_EC_V1, 0x01 }; -+CONST_OID brainpoolP160t1[] = { ECC_BRAINPOOL_EC_V1, 0x02 }; -+CONST_OID brainpoolP192r1[] = { ECC_BRAINPOOL_EC_V1, 0x03 }; -+CONST_OID brainpoolP192t1[] = { ECC_BRAINPOOL_EC_V1, 0x04 }; -+CONST_OID brainpoolP224r1[] = { ECC_BRAINPOOL_EC_V1, 0x05 }; -+CONST_OID brainpoolP224t1[] = { ECC_BRAINPOOL_EC_V1, 0x06 }; -+CONST_OID brainpoolP256r1[] = { ECC_BRAINPOOL_EC_V1, 0x07 }; -+CONST_OID brainpoolP256t1[] = { ECC_BRAINPOOL_EC_V1, 0x08 }; -+CONST_OID brainpoolP320r1[] = { ECC_BRAINPOOL_EC_V1, 0x09 }; -+CONST_OID brainpoolP320t1[] = { ECC_BRAINPOOL_EC_V1, 0x0a }; -+CONST_OID brainpoolP384r1[] = { ECC_BRAINPOOL_EC_V1, 0x0b }; -+CONST_OID brainpoolP384t1[] = { ECC_BRAINPOOL_EC_V1, 0x0c }; -+CONST_OID brainpoolP512r1[] = { ECC_BRAINPOOL_EC_V1, 0x0d }; -+CONST_OID brainpoolP512t1[] = { ECC_BRAINPOOL_EC_V1, 0x0e }; -+ - #define OI(x) { siDEROID, (unsigned char *)x, sizeof x } - #ifndef SECOID_NO_STRINGS - #define OD(oid,tag,desc,mech,ext) { OI(oid), tag, desc, mech, ext } -@@ -100,18 +174,30 @@ - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( ansiX962prime192v1, ECCurve_NIST_P192, -+ "ANSI X9.62 elliptic curve prime192v1 (aka secp192r1, NIST P-192)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962prime192v2, ECCurve_X9_62_PRIME_192V2, -+ "ANSI X9.62 elliptic curve prime192v2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962prime192v3, ECCurve_X9_62_PRIME_192V3, -+ "ANSI X9.62 elliptic curve prime192v3", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962prime239v1, ECCurve_X9_62_PRIME_239V1, -+ "ANSI X9.62 elliptic curve prime239v1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962prime239v2, ECCurve_X9_62_PRIME_239V2, -+ "ANSI X9.62 elliptic curve prime239v2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962prime239v3, ECCurve_X9_62_PRIME_239V3, -+ "ANSI X9.62 elliptic curve prime239v3", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - OD( ansiX962prime256v1, ECCurve_NIST_P256, - "ANSI X9.62 elliptic curve prime256v1 (aka secp256r1, NIST P-256)", - CKM_INVALID_MECHANISM, -@@ -122,24 +208,42 @@ - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( secgECsect163k1, ECCurve_NIST_K163, -+ "SECG elliptic curve sect163k1 (aka NIST K-163)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect163r1, ECCurve_SECG_CHAR2_163R1, -+ "SECG elliptic curve sect163r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect239k1, ECCurve_SECG_CHAR2_239K1, -+ "SECG elliptic curve sect239k1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect113r1, ECCurve_SECG_CHAR2_113R1, -+ "SECG elliptic curve sect113r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect113r2, ECCurve_SECG_CHAR2_113R2, -+ "SECG elliptic curve sect113r2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp112r1, ECCurve_SECG_PRIME_112R1, -+ "SECG elliptic curve secp112r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp112r2, ECCurve_SECG_PRIME_112R2, -+ "SECG elliptic curve secp112r2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp160r1, ECCurve_SECG_PRIME_160R1, -+ "SECG elliptic curve secp160r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp160k1, ECCurve_SECG_PRIME_160K1, -+ "SECG elliptic curve secp160k1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - OD( secgECsecp256k1, ECCurve_SECG_PRIME_256K1, - "SECG elliptic curve secp256k1", - CKM_INVALID_MECHANISM, -@@ -152,6 +256,18 @@ - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( secgECsect163r2, ECCurve_NIST_B163, -+ "SECG elliptic curve sect163r2 (aka NIST B-163)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect283k1, ECCurve_NIST_K283, -+ "SECG elliptic curve sect283k1 (aka NIST K-283)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect283r1, ECCurve_NIST_B283, -+ "SECG elliptic curve sect283r1 (aka NIST B-283)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - { { siDEROID, NULL, 0 }, ECCurve_noName, -@@ -160,36 +276,54 @@ - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( secgECsect131r1, ECCurve_SECG_CHAR2_131R1, -+ "SECG elliptic curve sect131r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect131r2, ECCurve_SECG_CHAR2_131R2, -+ "SECG elliptic curve sect131r2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect193r1, ECCurve_SECG_CHAR2_193R1, -+ "SECG elliptic curve sect193r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect193r2, ECCurve_SECG_CHAR2_193R2, -+ "SECG elliptic curve sect193r2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect233k1, ECCurve_NIST_K233, -+ "SECG elliptic curve sect233k1 (aka NIST K-233)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect233r1, ECCurve_NIST_B233, -+ "SECG elliptic curve sect233r1 (aka NIST B-233)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp128r1, ECCurve_SECG_PRIME_128R1, -+ "SECG elliptic curve secp128r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp128r2, ECCurve_SECG_PRIME_128R2, -+ "SECG elliptic curve secp128r2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp160r2, ECCurve_SECG_PRIME_160R2, -+ "SECG elliptic curve secp160r2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp192k1, ECCurve_SECG_PRIME_192K1, -+ "SECG elliptic curve secp192k1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp224k1, ECCurve_SECG_PRIME_224K1, -+ "SECG elliptic curve secp224k1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsecp224r1, ECCurve_NIST_P224, -+ "SECG elliptic curve secp224r1 (aka NIST P-224)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - OD( secgECsecp384r1, ECCurve_NIST_P384, - "SECG elliptic curve secp384r1 (aka NIST P-384)", - CKM_INVALID_MECHANISM, -@@ -198,14 +332,22 @@ - "SECG elliptic curve secp521r1 (aka NIST P-521)", - CKM_INVALID_MECHANISM, - INVALID_CERT_EXTENSION ), -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION } -+ OD( secgECsect409k1, ECCurve_NIST_K409, -+ "SECG elliptic curve sect409k1 (aka NIST K-409)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect409r1, ECCurve_NIST_B409, -+ "SECG elliptic curve sect409r1 (aka NIST B-409)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect571k1, ECCurve_NIST_K571, -+ "SECG elliptic curve sect571k1 (aka NIST K-571)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( secgECsect571r1, ECCurve_NIST_B571, -+ "SECG elliptic curve sect571r1 (aka NIST B-571)", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ) - }; - - static SECOidData ANSI_oids[] = { -@@ -213,46 +355,78 @@ - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - - /* ANSI X9.62 named elliptic curves (characteristic two field) */ -+ OD( ansiX962c2pnb163v1, ECCurve_X9_62_CHAR2_PNB163V1, -+ "ANSI X9.62 elliptic curve c2pnb163v1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2pnb163v2, ECCurve_X9_62_CHAR2_PNB163V2, -+ "ANSI X9.62 elliptic curve c2pnb163v2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2pnb163v3, ECCurve_X9_62_CHAR2_PNB163V3, -+ "ANSI X9.62 elliptic curve c2pnb163v3", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2pnb176v1, ECCurve_X9_62_CHAR2_PNB176V1, -+ "ANSI X9.62 elliptic curve c2pnb176v1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb191v1, ECCurve_X9_62_CHAR2_TNB191V1, -+ "ANSI X9.62 elliptic curve c2tnb191v1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb191v2, ECCurve_X9_62_CHAR2_TNB191V2, -+ "ANSI X9.62 elliptic curve c2tnb191v2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb191v3, ECCurve_X9_62_CHAR2_TNB191V3, -+ "ANSI X9.62 elliptic curve c2tnb191v3", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( ansiX962c2pnb208w1, ECCurve_X9_62_CHAR2_PNB208W1, -+ "ANSI X9.62 elliptic curve c2pnb208w1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb239v1, ECCurve_X9_62_CHAR2_TNB239V1, -+ "ANSI X9.62 elliptic curve c2tnb239v1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb239v2, ECCurve_X9_62_CHAR2_TNB239V2, -+ "ANSI X9.62 elliptic curve c2tnb239v2", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb239v3, ECCurve_X9_62_CHAR2_TNB239V3, -+ "ANSI X9.62 elliptic curve c2tnb239v3", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -- { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION } -+ OD( ansiX962c2pnb272w1, ECCurve_X9_62_CHAR2_PNB272W1, -+ "ANSI X9.62 elliptic curve c2pnb272w1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2pnb304w1, ECCurve_X9_62_CHAR2_PNB304W1, -+ "ANSI X9.62 elliptic curve c2pnb304w1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb359v1, ECCurve_X9_62_CHAR2_TNB359V1, -+ "ANSI X9.62 elliptic curve c2tnb359v1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2pnb368w1, ECCurve_X9_62_CHAR2_PNB368W1, -+ "ANSI X9.62 elliptic curve c2pnb368w1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), -+ OD( ansiX962c2tnb431r1, ECCurve_X9_62_CHAR2_TNB431R1, -+ "ANSI X9.62 elliptic curve c2tnb431r1", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ) - }; - - static SECOidData BRAINPOOL_oids[] = { -@@ -272,14 +446,31 @@ - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( brainpoolP256r1, ECCurve_BrainpoolP256r1, -+ "brainpoolP256r1 domain parameter set", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( brainpoolP320r1, ECCurve_BrainpoolP320r1, -+ "brainpoolP320r1 domain parameter set", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( brainpoolP384r1, ECCurve_BrainpoolP384r1, -+ "brainpoolP384r1 domain parameter set", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, - "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION }, -+ OD( brainpoolP512r1, ECCurve_BrainpoolP512r1, -+ "brainpoolP512r1 domain parameter set", -+ CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION ), - { { siDEROID, NULL, 0 }, ECCurve_noName, -- "Unknown OID", CKM_INVALID_MECHANISM, INVALID_CERT_EXTENSION } -+ "Unknown OID", CKM_INVALID_MECHANISM, -+ INVALID_CERT_EXTENSION } - }; - - int -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h jdk11u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h ---- openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h 2023-09-12 13:54:26.313575711 +0800 + (*env)->ReleaseLongArrayElements(env, array, regs, JNI_COMMIT); + return array; + } +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h +index 8318e8e02..07064e76e 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h @@ -22,6 +22,13 @@ * */ @@ -115119,160 +110886,167 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linu // This C bool type must be int for compatibility with Linux calls and // it would be a mistake to equivalence it to C++ bool on many platforms -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.c jdk11u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.c ---- openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.c 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.c 2023-09-12 13:54:26.313575711 +0800 -@@ -22,6 +22,13 @@ +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c +index c22b5d1cb..36d634396 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c +@@ -22,6 +22,12 @@ * */ +/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made + * available on the same license terms set forth above. -+ * + */ + - #include - #include "libproc.h" - #include "proc_service.h" -@@ -54,10 +61,18 @@ - #include "sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext.h" - #endif - -+#if defined(mips64) || defined(mips64el) -+#include "sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext.h" -+#endif -+ - #ifdef aarch64 - #include "sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext.h" - #endif - -+#ifdef loongarch64 -+#include "sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext.h" -+#endif -+ - static jfieldID p_ps_prochandle_ID = 0; - static jfieldID threadList_ID = 0; - static jfieldID loadObjectList_ID = 0; -@@ -397,7 +412,7 @@ - return (err == PS_OK)? array : 0; - } - --#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) | defined(ppc64) || defined(ppc64le) || defined(aarch64) -+#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) | defined(ppc64) || defined(ppc64le) || defined(aarch64) || defined(loongarch64) - JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0 - (JNIEnv *env, jobject this_obj, jint lwp_id) { - -@@ -425,9 +440,15 @@ - #if defined(sparc) || defined(sparcv9) - #define NPRGREG sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_NPRGREG - #endif -+#ifdef loongarch64 -+#define NPRGREG sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext_NPRGREG -+#endif - #if defined(ppc64) || defined(ppc64le) - #define NPRGREG sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext_NPRGREG - #endif -+#if defined(mips64) || defined(mips64el) -+#define NPRGREG sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext_NPRGREG -+#endif - + #include + #include + #include +@@ -151,7 +157,7 @@ static bool process_get_lwp_regs(struct ps_prochandle* ph, pid_t pid, struct use + return false; + } + return true; +-#elif defined(PTRACE_GETREGS_REQ) ++#elif defined(PTRACE_GETREGS_REQ) && !defined(loongarch64) + if (ptrace_getregs(PTRACE_GETREGS_REQ, pid, user, NULL) < 0) { + print_debug("ptrace(PTRACE_GETREGS, ...) failed for lwp %d\n", pid); + return false; +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java +index 0f5f0119c..1b2f11a06 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java +@@ -23,6 +23,12 @@ + * + */ - array = (*env)->NewLongArray(env, NPRGREG); -@@ -534,6 +555,18 @@ - } - #endif /* aarch64 */ ++/* ++ * This file has been modified by Loongson Technology in 2021. These ++ * modifications are Copyright (c) 2018, 2021, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ * ++ */ + package sun.jvm.hotspot; -+#if defined(loongarch64) + import java.rmi.RemoteException; +@@ -39,6 +45,8 @@ import sun.jvm.hotspot.debugger.MachineDescriptionAArch64; + import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; + import sun.jvm.hotspot.debugger.MachineDescriptionSPARC32Bit; + import sun.jvm.hotspot.debugger.MachineDescriptionSPARC64Bit; ++import sun.jvm.hotspot.debugger.MachineDescriptionMIPS64; ++import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; + import sun.jvm.hotspot.debugger.NoSuchSymbolException; + import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; + import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; +@@ -598,6 +606,10 @@ public class HotSpotAgent { + } else { + machDesc = new MachineDescriptionSPARC32Bit(); + } ++ } else if (cpu.equals("mips64")) { ++ machDesc = new MachineDescriptionMIPS64(); ++ } else if (cpu.equals("loongarch64")) { ++ machDesc = new MachineDescriptionLOONGARCH64(); + } else { + try { + machDesc = (MachineDescription) +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +new file mode 100644 +index 000000000..99cea8c7f +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ + -+#define REG_INDEX(reg) sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext_##reg ++package sun.jvm.hotspot.debugger; + -+ { -+ int i; -+ for (i = 0; i < 31; i++) -+ regs[i] = gregs.regs[i]; -+ regs[REG_INDEX(PC)] = gregs.csr_era; ++public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; + } -+#endif /* loongarch64 */ -+ - #if defined(ppc64) || defined(ppc64le) - #define REG_INDEX(reg) sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext_##reg - -@@ -574,6 +607,45 @@ - - #endif - -+#if defined(mips64) || defined(mips64el) + -+#define REG_INDEX(reg) sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext_##reg + -+ regs[REG_INDEX(ZERO)] = gregs.regs[0]; -+ regs[REG_INDEX(AT)] = gregs.regs[1]; -+ regs[REG_INDEX(V0)] = gregs.regs[2]; -+ regs[REG_INDEX(V1)] = gregs.regs[3]; -+ regs[REG_INDEX(A0)] = gregs.regs[4]; -+ regs[REG_INDEX(A1)] = gregs.regs[5]; -+ regs[REG_INDEX(A2)] = gregs.regs[6]; -+ regs[REG_INDEX(A3)] = gregs.regs[7]; -+ regs[REG_INDEX(T0)] = gregs.regs[8]; -+ regs[REG_INDEX(T1)] = gregs.regs[9]; -+ regs[REG_INDEX(T2)] = gregs.regs[10]; -+ regs[REG_INDEX(T3)] = gregs.regs[11]; -+ regs[REG_INDEX(T4)] = gregs.regs[12]; -+ regs[REG_INDEX(T5)] = gregs.regs[13]; -+ regs[REG_INDEX(T6)] = gregs.regs[14]; -+ regs[REG_INDEX(T7)] = gregs.regs[15]; -+ regs[REG_INDEX(S0)] = gregs.regs[16]; -+ regs[REG_INDEX(S1)] = gregs.regs[17]; -+ regs[REG_INDEX(S2)] = gregs.regs[18]; -+ regs[REG_INDEX(S3)] = gregs.regs[19]; -+ regs[REG_INDEX(S4)] = gregs.regs[20]; -+ regs[REG_INDEX(S5)] = gregs.regs[21]; -+ regs[REG_INDEX(S6)] = gregs.regs[22]; -+ regs[REG_INDEX(S7)] = gregs.regs[23]; -+ regs[REG_INDEX(T8)] = gregs.regs[24]; -+ regs[REG_INDEX(T9)] = gregs.regs[25]; -+ regs[REG_INDEX(K0)] = gregs.regs[26]; -+ regs[REG_INDEX(K1)] = gregs.regs[27]; -+ regs[REG_INDEX(GP)] = gregs.regs[28]; -+ regs[REG_INDEX(SP)] = gregs.regs[29]; -+ regs[REG_INDEX(FP)] = gregs.regs[30]; -+ regs[REG_INDEX(S8)] = gregs.regs[30]; -+ regs[REG_INDEX(RA)] = gregs.regs[31]; -+#endif /* mips */ ++ public boolean isBigEndian() { ++ return false; ++ } + - (*env)->ReleaseLongArrayElements(env, array, regs, JNI_COMMIT); - return array; - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c jdk11u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c ---- openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c 2023-09-12 13:54:26.313575711 +0800 -@@ -22,6 +22,12 @@ - * - */ - ++ public boolean isLP64() { ++ return true; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java +new file mode 100644 +index 000000000..1b49efd20 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java +@@ -0,0 +1,41 @@ +/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * + */ + - #include - #include - #include -@@ -142,7 +148,7 @@ - #define PTRACE_GETREGS_REQ PT_GETREGS - #endif - --#ifdef PTRACE_GETREGS_REQ -+#if defined(PTRACE_GETREGS_REQ) && !defined(loongarch64) - if (ptrace_getregs(PTRACE_GETREGS_REQ, pid, user, NULL) < 0) { - print_debug("ptrace(PTRACE_GETREGS, ...) failed for lwp %d\n", pid); - return false; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2023-09-12 13:54:26.373575786 +0800 ++package sun.jvm.hotspot.debugger; ++ ++public class MachineDescriptionMIPS64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; ++ } ++ ++ ++ public boolean isBigEndian() { ++ return "big".equals(System.getProperty("sun.cpu.endian")); ++ } ++ ++ public boolean isLP64() { ++ return true; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java +index 5e5a6bb71..7d7f6424e 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java @@ -23,6 +23,12 @@ * */ @@ -115286,7 +111060,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.debugger.linux; import java.io.*; -@@ -34,12 +40,16 @@ +@@ -34,12 +40,16 @@ import sun.jvm.hotspot.debugger.x86.*; import sun.jvm.hotspot.debugger.amd64.*; import sun.jvm.hotspot.debugger.aarch64.*; import sun.jvm.hotspot.debugger.sparc.*; @@ -115303,7 +111077,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar import sun.jvm.hotspot.utilities.*; class LinuxCDebugger implements CDebugger { -@@ -102,7 +112,21 @@ +@@ -102,7 +112,21 @@ class LinuxCDebugger implements CDebugger { Address pc = context.getRegisterAsAddress(SPARCThreadContext.R_O7); if (pc == null) return null; return new LinuxSPARCCFrame(dbg, sp, pc, LinuxDebuggerLocal.getAddressSize()); @@ -115326,9 +111100,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar PPC64ThreadContext context = (PPC64ThreadContext) thread.getContext(); Address sp = context.getRegisterAsAddress(PPC64ThreadContext.SP); if (sp == null) return null; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java +index 4b786eecc..4ead33827 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java @@ -22,6 +22,12 @@ * */ @@ -115342,7 +111117,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.debugger.linux; import java.lang.reflect.*; -@@ -30,6 +36,8 @@ +@@ -30,6 +36,8 @@ import sun.jvm.hotspot.debugger.linux.amd64.*; import sun.jvm.hotspot.debugger.linux.x86.*; import sun.jvm.hotspot.debugger.linux.ppc64.*; import sun.jvm.hotspot.debugger.linux.sparc.*; @@ -115351,7 +111126,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar class LinuxThreadContextFactory { static ThreadContext createThreadContext(LinuxDebugger dbg) { -@@ -40,7 +48,11 @@ +@@ -40,7 +48,11 @@ class LinuxThreadContextFactory { return new LinuxAMD64ThreadContext(dbg); } else if (cpu.equals("sparc")) { return new LinuxSPARCThreadContext(dbg); @@ -115364,9 +111139,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar return new LinuxPPC64ThreadContext(dbg); } else { try { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java +new file mode 100644 +index 000000000..0e6caee5a +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -115460,9 +111237,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + private Address fp; + private LinuxDebugger dbg; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..604642598 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -115511,9 +111290,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java +new file mode 100644 +index 000000000..2e3eb564d +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -115595,9 +111376,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + private Address ebp; + private LinuxDebugger dbg; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java +new file mode 100644 +index 000000000..98e0f3f0b +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -115646,9 +111429,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..1de3cb1a4 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -115778,99 +111563,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + tie the implementation to, for example, the debugging system */ + public abstract Address getRegisterAsAddress(int index); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 2023-09-12 13:54:26.361575771 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; -+ -+public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; -+ } -+ -+ -+ public boolean isBigEndian() { -+ return false; -+ } -+ -+ public boolean isLP64() { -+ return true; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java 2023-09-12 13:54:26.365575776 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; -+ -+public class MachineDescriptionMIPS64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; -+ } -+ -+ -+ public boolean isBigEndian() { -+ return "big".equals(System.getProperty("sun.cpu.endian")); -+ } -+ -+ public boolean isLP64() { -+ return true; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java +new file mode 100644 +index 000000000..d3479a65e +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -116000,9 +111697,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + tie the implementation to, for example, the debugging system */ + public abstract Address getRegisterAsAddress(int index); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2023-09-12 13:54:26.373575786 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java +index 7113a3a49..de47531db 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java @@ -22,6 +22,12 @@ * */ @@ -116016,7 +111714,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.debugger.posix.elf; import java.io.FileInputStream; -@@ -63,6 +69,8 @@ +@@ -63,6 +69,8 @@ public interface ELFHeader { public static final int ARCH_i860 = 7; /** MIPS architecture type. */ public static final int ARCH_MIPS = 8; @@ -116025,9 +111723,138 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar /** Returns a file type which is defined by the file type constants. */ public short getFileType(); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java +index 74e957d94..46ece3611 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java +@@ -32,11 +32,13 @@ import sun.jvm.hotspot.debugger.*; + import sun.jvm.hotspot.debugger.cdbg.*; + import sun.jvm.hotspot.debugger.proc.amd64.*; + import sun.jvm.hotspot.debugger.proc.aarch64.*; ++import sun.jvm.hotspot.debugger.proc.mips64.*; + import sun.jvm.hotspot.debugger.proc.sparc.*; + import sun.jvm.hotspot.debugger.proc.ppc64.*; + import sun.jvm.hotspot.debugger.proc.x86.*; + import sun.jvm.hotspot.debugger.ppc64.*; + import sun.jvm.hotspot.debugger.amd64.*; ++import sun.jvm.hotspot.debugger.mips64.*; + import sun.jvm.hotspot.debugger.aarch64.*; + import sun.jvm.hotspot.debugger.sparc.*; + import sun.jvm.hotspot.debugger.x86.*; +@@ -90,6 +92,10 @@ public class ProcDebuggerLocal extends DebuggerBase implements ProcDebugger { + threadFactory = new ProcAMD64ThreadFactory(this); + pcRegIndex = AMD64ThreadContext.RIP; + fpRegIndex = AMD64ThreadContext.RBP; ++ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { ++ threadFactory = new ProcMIPS64ThreadFactory(this); ++ pcRegIndex = MIPS64ThreadContext.PC; ++ fpRegIndex = MIPS64ThreadContext.FP; + } else if (cpu.equals("aarch64")) { + threadFactory = new ProcAARCH64ThreadFactory(this); + pcRegIndex = AARCH64ThreadContext.PC; +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java +new file mode 100644 +index 000000000..1f60fa6cf +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java +@@ -0,0 +1,92 @@ ++/* ++ * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger.proc.loongarch64; ++ ++import sun.jvm.hotspot.debugger.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.proc.*; ++import sun.jvm.hotspot.utilities.*; ++ ++public class ProcLOONGARCH64Thread implements ThreadProxy { ++ private ProcDebugger debugger; ++ private int id; ++ ++ public ProcLOONGARCH64Thread(ProcDebugger debugger, Address addr) { ++ this.debugger = debugger; ++ ++ // FIXME: the size here should be configurable. However, making it ++ // so would produce a dependency on the "types" package from the ++ // debugger package, which is not desired. ++ this.id = (int) addr.getCIntegerAt(0, 4, true); ++ } ++ ++ public ProcLOONGARCH64Thread(ProcDebugger debugger, long id) { ++ this.debugger = debugger; ++ this.id = (int) id; ++ } ++ ++ public ThreadContext getContext() throws IllegalThreadStateException { ++ ProcLOONGARCH64ThreadContext context = new ProcLOONGARCH64ThreadContext(debugger); ++ long[] regs = debugger.getThreadIntegerRegisterSet(id); ++ /* ++ _NGREG in reg.h is defined to be 19. Because we have included ++ debug registers LOONGARCH64ThreadContext.NPRGREG is 25. ++ */ ++ ++ if (Assert.ASSERTS_ENABLED) { ++ Assert.that(regs.length <= LOONGARCH64ThreadContext.NPRGREG, "size of register set is greater than " + LOONGARCH64ThreadContext.NPRGREG); ++ } ++ for (int i = 0; i < regs.length; i++) { ++ context.setRegister(i, regs[i]); ++ } ++ return context; ++ } ++ ++ public boolean canSetContext() throws DebuggerException { ++ return false; ++ } ++ ++ public void setContext(ThreadContext context) ++ throws IllegalThreadStateException, DebuggerException { ++ throw new DebuggerException("Unimplemented"); ++ } ++ ++ public String toString() { ++ return "t@" + id; ++ } ++ ++ public boolean equals(Object obj) { ++ if ((obj == null) || !(obj instanceof ProcLOONGARCH64Thread)) { ++ return false; ++ } ++ ++ return (((ProcLOONGARCH64Thread) obj).id == id); ++ } ++ ++ public int hashCode() { ++ return id; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..ef5597ac4 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. @@ -116076,9 +111903,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java +new file mode 100644 +index 000000000..abad1bb38 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -116125,13 +111954,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return new ProcLOONGARCH64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java +new file mode 100644 +index 000000000..5c1e0be89 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -116154,18 +111985,18 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * + */ + -+package sun.jvm.hotspot.debugger.proc.loongarch64; ++package sun.jvm.hotspot.debugger.proc.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.proc.*; +import sun.jvm.hotspot.utilities.*; + -+public class ProcLOONGARCH64Thread implements ThreadProxy { ++public class ProcMIPS64Thread implements ThreadProxy { + private ProcDebugger debugger; + private int id; + -+ public ProcLOONGARCH64Thread(ProcDebugger debugger, Address addr) { ++ public ProcMIPS64Thread(ProcDebugger debugger, Address addr) { + this.debugger = debugger; + + // FIXME: the size here should be configurable. However, making it @@ -116174,21 +112005,21 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + this.id = (int) addr.getCIntegerAt(0, 4, true); + } + -+ public ProcLOONGARCH64Thread(ProcDebugger debugger, long id) { ++ public ProcMIPS64Thread(ProcDebugger debugger, long id) { + this.debugger = debugger; + this.id = (int) id; + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ ProcLOONGARCH64ThreadContext context = new ProcLOONGARCH64ThreadContext(debugger); ++ ProcMIPS64ThreadContext context = new ProcMIPS64ThreadContext(debugger); + long[] regs = debugger.getThreadIntegerRegisterSet(id); + /* + _NGREG in reg.h is defined to be 19. Because we have included -+ debug registers LOONGARCH64ThreadContext.NPRGREG is 25. ++ debug registers MIPS64ThreadContext.NPRGREG is 25. + */ + + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length <= LOONGARCH64ThreadContext.NPRGREG, "size of register set is greater than " + LOONGARCH64ThreadContext.NPRGREG); ++ Assert.that(regs.length <= MIPS64ThreadContext.NPRGREG, "size of register set is greater than " + MIPS64ThreadContext.NPRGREG); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); @@ -116210,20 +112041,22 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + } + + public boolean equals(Object obj) { -+ if ((obj == null) || !(obj instanceof ProcLOONGARCH64Thread)) { ++ if ((obj == null) || !(obj instanceof ProcMIPS64Thread)) { + return false; + } + -+ return (((ProcLOONGARCH64Thread) obj).id == id); ++ return (((ProcMIPS64Thread) obj).id == id); + } + + public int hashCode() { + return id; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java +new file mode 100644 +index 000000000..d44223d76 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. @@ -116272,9 +112105,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java +new file mode 100644 +index 000000000..bad478fc5 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -116321,13 +112156,58 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return new ProcMIPS64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java 2023-09-12 13:54:26.377575791 +0800 -@@ -0,0 +1,92 @@ +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +index b6253f6d6..5eecb08a1 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +@@ -22,6 +22,12 @@ + * + */ + +/* -+ * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * This file has been modified by Loongson Technology in 2021, These ++ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package sun.jvm.hotspot.debugger.remote; + + import java.rmi.*; +@@ -34,6 +40,8 @@ import sun.jvm.hotspot.debugger.remote.sparc.*; + import sun.jvm.hotspot.debugger.remote.x86.*; + import sun.jvm.hotspot.debugger.remote.amd64.*; + import sun.jvm.hotspot.debugger.remote.ppc64.*; ++import sun.jvm.hotspot.debugger.remote.mips64.*; ++import sun.jvm.hotspot.debugger.remote.loongarch64.*; + + /** An implementation of Debugger which wraps a + RemoteDebugger, providing remote debugging via RMI. +@@ -76,6 +84,16 @@ public class RemoteDebuggerClient extends DebuggerBase implements JVMDebugger { + cachePageSize = 4096; + cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); + unalignedAccessesOkay = true; ++ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { ++ threadFactory = new RemoteMIPS64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); ++ unalignedAccessesOkay = true; ++ } else if (cpu.equals("loongarch64")) { ++ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); ++ unalignedAccessesOkay = true; + } else { + try { + Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +new file mode 100644 +index 000000000..242dd279e +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +@@ -0,0 +1,54 @@ ++/* ++ * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -116350,104 +112230,40 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * + */ + -+package sun.jvm.hotspot.debugger.proc.mips64; ++package sun.jvm.hotspot.debugger.remote.loongarch64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; -+import sun.jvm.hotspot.debugger.proc.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.remote.*; +import sun.jvm.hotspot.utilities.*; + -+public class ProcMIPS64Thread implements ThreadProxy { -+ private ProcDebugger debugger; -+ private int id; -+ -+ public ProcMIPS64Thread(ProcDebugger debugger, Address addr) { -+ this.debugger = debugger; -+ -+ // FIXME: the size here should be configurable. However, making it -+ // so would produce a dependency on the "types" package from the -+ // debugger package, which is not desired. -+ this.id = (int) addr.getCIntegerAt(0, 4, true); ++public class RemoteLOONGARCH64Thread extends RemoteThread { ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { ++ super(debugger, addr); + } + -+ public ProcMIPS64Thread(ProcDebugger debugger, long id) { -+ this.debugger = debugger; -+ this.id = (int) id; ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { ++ super(debugger, id); + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ ProcMIPS64ThreadContext context = new ProcMIPS64ThreadContext(debugger); -+ long[] regs = debugger.getThreadIntegerRegisterSet(id); -+ /* -+ _NGREG in reg.h is defined to be 19. Because we have included -+ debug registers MIPS64ThreadContext.NPRGREG is 25. -+ */ -+ ++ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); ++ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : ++ debugger.getThreadIntegerRegisterSet(id); + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length <= MIPS64ThreadContext.NPRGREG, "size of register set is greater than " + MIPS64ThreadContext.NPRGREG); ++ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); + } + return context; + } -+ -+ public boolean canSetContext() throws DebuggerException { -+ return false; -+ } -+ -+ public void setContext(ThreadContext context) -+ throws IllegalThreadStateException, DebuggerException { -+ throw new DebuggerException("Unimplemented"); -+ } -+ -+ public String toString() { -+ return "t@" + id; -+ } -+ -+ public boolean equals(Object obj) { -+ if ((obj == null) || !(obj instanceof ProcMIPS64Thread)) { -+ return false; -+ } -+ -+ return (((ProcMIPS64Thread) obj).id == id); -+ } -+ -+ public int hashCode() { -+ return id; -+ } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java 2023-09-12 13:54:26.377575791 +0800 -@@ -32,11 +32,13 @@ - import sun.jvm.hotspot.debugger.cdbg.*; - import sun.jvm.hotspot.debugger.proc.amd64.*; - import sun.jvm.hotspot.debugger.proc.aarch64.*; -+import sun.jvm.hotspot.debugger.proc.mips64.*; - import sun.jvm.hotspot.debugger.proc.sparc.*; - import sun.jvm.hotspot.debugger.proc.ppc64.*; - import sun.jvm.hotspot.debugger.proc.x86.*; - import sun.jvm.hotspot.debugger.ppc64.*; - import sun.jvm.hotspot.debugger.amd64.*; -+import sun.jvm.hotspot.debugger.mips64.*; - import sun.jvm.hotspot.debugger.aarch64.*; - import sun.jvm.hotspot.debugger.sparc.*; - import sun.jvm.hotspot.debugger.x86.*; -@@ -90,6 +92,10 @@ - threadFactory = new ProcAMD64ThreadFactory(this); - pcRegIndex = AMD64ThreadContext.RIP; - fpRegIndex = AMD64ThreadContext.RBP; -+ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { -+ threadFactory = new ProcMIPS64ThreadFactory(this); -+ pcRegIndex = MIPS64ThreadContext.PC; -+ fpRegIndex = MIPS64ThreadContext.FP; - } else if (cpu.equals("aarch64")) { - threadFactory = new ProcAARCH64ThreadFactory(this); - pcRegIndex = AARCH64ThreadContext.PC; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..634d5ad04 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -116500,9 +112316,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java +new file mode 100644 +index 000000000..4fb9cc7c0 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -116549,13 +112367,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return new RemoteLOONGARCH64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java +new file mode 100644 +index 000000000..c2f7d841f +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -116578,28 +112398,28 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * + */ + -+package sun.jvm.hotspot.debugger.remote.loongarch64; ++package sun.jvm.hotspot.debugger.remote.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.remote.*; +import sun.jvm.hotspot.utilities.*; + -+public class RemoteLOONGARCH64Thread extends RemoteThread { -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { ++public class RemoteMIPS64Thread extends RemoteThread { ++ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, Address addr) { + super(debugger, addr); + } + -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { ++ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, long id) { + super(debugger, id); + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); ++ RemoteMIPS64ThreadContext context = new RemoteMIPS64ThreadContext(debugger); + long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : + debugger.getThreadIntegerRegisterSet(id); + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); ++ Assert.that(regs.length == MIPS64ThreadContext.NPRGREG, "size of register set must match"); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); @@ -116607,9 +112427,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return context; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java +new file mode 100644 +index 000000000..23646905d +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -116639,82 +112461,35 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar +package sun.jvm.hotspot.debugger.remote.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; -+import sun.jvm.hotspot.debugger.remote.*; -+ -+public class RemoteMIPS64ThreadContext extends MIPS64ThreadContext { -+ private RemoteDebuggerClient debugger; -+ -+ public RemoteMIPS64ThreadContext(RemoteDebuggerClient debugger) { -+ super(); -+ this.debugger = debugger; -+ } -+ -+ /** This can't be implemented in this class since we would have to -+ tie the implementation to, for example, the debugging system */ -+ public void setRegisterAsAddress(int index, Address value) { -+ setRegister(index, debugger.getAddressValue(value)); -+ } -+ -+ /** This can't be implemented in this class since we would have to -+ tie the implementation to, for example, the debugging system */ -+ public Address getRegisterAsAddress(int index) { -+ return debugger.newAddress(getRegister(index)); -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java 2023-09-12 13:54:26.377575791 +0800 -@@ -0,0 +1,45 @@ -+/* -+ * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger.remote.mips64; -+ -+import sun.jvm.hotspot.debugger.*; ++import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.remote.*; + -+public class RemoteMIPS64ThreadFactory implements RemoteThreadFactory { ++public class RemoteMIPS64ThreadContext extends MIPS64ThreadContext { + private RemoteDebuggerClient debugger; + -+ public RemoteMIPS64ThreadFactory(RemoteDebuggerClient debugger) { ++ public RemoteMIPS64ThreadContext(RemoteDebuggerClient debugger) { ++ super(); + this.debugger = debugger; + } + -+ public ThreadProxy createThreadWrapper(Address threadIdentifierAddr) { -+ return new RemoteMIPS64Thread(debugger, threadIdentifierAddr); ++ /** This can't be implemented in this class since we would have to ++ tie the implementation to, for example, the debugging system */ ++ public void setRegisterAsAddress(int index, Address value) { ++ setRegister(index, debugger.getAddressValue(value)); + } + -+ public ThreadProxy createThreadWrapper(long id) { -+ return new RemoteMIPS64Thread(debugger, id); ++ /** This can't be implemented in this class since we would have to ++ tie the implementation to, for example, the debugging system */ ++ public Address getRegisterAsAddress(int index) { ++ return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java 2023-09-12 13:54:26.377575791 +0800 -@@ -0,0 +1,54 @@ +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java +new file mode 100644 +index 000000000..b39b01449 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java +@@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, Loongson Technology. All rights reserved. @@ -116743,35 +112518,27 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar +package sun.jvm.hotspot.debugger.remote.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.remote.*; -+import sun.jvm.hotspot.utilities.*; + -+public class RemoteMIPS64Thread extends RemoteThread { -+ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, Address addr) { -+ super(debugger, addr); ++public class RemoteMIPS64ThreadFactory implements RemoteThreadFactory { ++ private RemoteDebuggerClient debugger; ++ ++ public RemoteMIPS64ThreadFactory(RemoteDebuggerClient debugger) { ++ this.debugger = debugger; + } + -+ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, long id) { -+ super(debugger, id); ++ public ThreadProxy createThreadWrapper(Address threadIdentifierAddr) { ++ return new RemoteMIPS64Thread(debugger, threadIdentifierAddr); + } + -+ public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteMIPS64ThreadContext context = new RemoteMIPS64ThreadContext(debugger); -+ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : -+ debugger.getThreadIntegerRegisterSet(id); -+ if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == MIPS64ThreadContext.NPRGREG, "size of register set must match"); -+ } -+ for (int i = 0; i < regs.length; i++) { -+ context.setRegister(i, regs[i]); -+ } -+ return context; ++ public ThreadProxy createThreadWrapper(long id) { ++ return new RemoteMIPS64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2023-09-12 13:54:26.377575791 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java +index 190062785..04681fa0e 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java @@ -22,6 +22,12 @@ * */ @@ -116782,74 +112549,34 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * available on the same license terms set forth above. + */ + - package sun.jvm.hotspot.debugger.remote; - - import java.rmi.*; -@@ -34,6 +40,8 @@ - import sun.jvm.hotspot.debugger.remote.x86.*; - import sun.jvm.hotspot.debugger.remote.amd64.*; - import sun.jvm.hotspot.debugger.remote.ppc64.*; -+import sun.jvm.hotspot.debugger.remote.mips64.*; -+import sun.jvm.hotspot.debugger.remote.loongarch64.*; - - /** An implementation of Debugger which wraps a - RemoteDebugger, providing remote debugging via RMI. -@@ -76,6 +84,16 @@ - cachePageSize = 4096; - cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); - unalignedAccessesOkay = true; -+ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { -+ threadFactory = new RemoteMIPS64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); -+ unalignedAccessesOkay = true; -+ } else if (cpu.equals("loongarch64")) { -+ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); -+ unalignedAccessesOkay = true; - } else { - try { - Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2023-09-12 13:54:26.345575751 +0800 -@@ -23,6 +23,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2021. These -+ * modifications are Copyright (c) 2018, 2021, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ * -+ */ - package sun.jvm.hotspot; + package sun.jvm.hotspot.runtime; - import java.rmi.RemoteException; -@@ -39,6 +45,8 @@ - import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; - import sun.jvm.hotspot.debugger.MachineDescriptionSPARC32Bit; - import sun.jvm.hotspot.debugger.MachineDescriptionSPARC64Bit; -+import sun.jvm.hotspot.debugger.MachineDescriptionMIPS64; -+import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; - import sun.jvm.hotspot.debugger.NoSuchSymbolException; - import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; - import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; -@@ -598,6 +606,10 @@ + import java.util.*; +@@ -39,6 +45,8 @@ import sun.jvm.hotspot.runtime.linux_x86.LinuxX86JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_ppc64.LinuxPPC64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_mips64.LinuxMIPS64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_sparc.LinuxSPARCJavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_amd64.BsdAMD64JavaThreadPDAccess; +@@ -99,6 +107,10 @@ public class Threads { + access = new LinuxPPC64JavaThreadPDAccess(); + } else if (cpu.equals("aarch64")) { + access = new LinuxAARCH64JavaThreadPDAccess(); ++ } else if (cpu.equals("mips64")) { ++ access = new LinuxMIPS64JavaThreadPDAccess(); ++ } else if (cpu.equals("loongarch64")) { ++ access = new LinuxLOONGARCH64JavaThreadPDAccess(); } else { - machDesc = new MachineDescriptionSPARC32Bit(); - } -+ } else if (cpu.equals("mips64")) { -+ machDesc = new MachineDescriptionMIPS64(); -+ } else if (cpu.equals("loongarch64")) { -+ machDesc = new MachineDescriptionLOONGARCH64(); - } else { - try { - machDesc = (MachineDescription) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 2023-09-12 13:54:26.429575856 +0800 + try { + access = (JavaThreadPDAccess) +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java +new file mode 100644 +index 000000000..ee1003e35 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved. @@ -116984,9 +112711,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java 2023-09-12 13:54:26.429575856 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java +new file mode 100644 +index 000000000..181f431b6 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved. @@ -117121,9 +112850,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 2023-09-12 13:54:26.429575856 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java +new file mode 100644 +index 000000000..824270e13 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java @@ -0,0 +1,250 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -117375,9 +113106,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + pcFound = pc; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 2023-09-12 13:54:26.429575856 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java +new file mode 100644 +index 000000000..058afc94d +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java @@ -0,0 +1,526 @@ +/* + * Copyright (c) 2001, 2015, Oracle and/or its affiliates. All rights reserved. @@ -117905,9 +113638,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 2023-09-12 13:54:26.429575856 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java +new file mode 100644 +index 000000000..0625e10a4 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -117966,9 +113701,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 2023-09-12 13:54:26.429575856 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java +new file mode 100644 +index 000000000..2cf904d38 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -118022,9 +113759,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java 2023-09-12 13:54:26.433575861 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java +new file mode 100644 +index 000000000..c11458abe +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java @@ -0,0 +1,217 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -118243,9 +113982,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + pcFound = pc; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java 2023-09-12 13:54:26.433575861 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java +new file mode 100644 +index 000000000..65d88016e +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java @@ -0,0 +1,537 @@ +/* + * Copyright (c) 2001, 2015, Oracle and/or its affiliates. All rights reserved. @@ -118784,9 +114525,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java 2023-09-12 13:54:26.433575861 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java +new file mode 100644 +index 000000000..dfe3066af +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -118845,9 +114588,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java 2023-09-12 13:54:26.433575861 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java +new file mode 100644 +index 000000000..f2da760af +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -118901,45 +114646,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java 2023-09-12 13:54:26.417575841 +0800 -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2021, These -+ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - package sun.jvm.hotspot.runtime; - - import java.util.*; -@@ -39,6 +45,8 @@ - import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_ppc64.LinuxPPC64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_mips64.LinuxMIPS64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_sparc.LinuxSPARCJavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_amd64.BsdAMD64JavaThreadPDAccess; -@@ -99,6 +107,10 @@ - access = new LinuxPPC64JavaThreadPDAccess(); - } else if (cpu.equals("aarch64")) { - access = new LinuxAARCH64JavaThreadPDAccess(); -+ } else if (cpu.equals("mips64")) { -+ access = new LinuxMIPS64JavaThreadPDAccess(); -+ } else if (cpu.equals("loongarch64")) { -+ access = new LinuxLOONGARCH64JavaThreadPDAccess(); - } else { - try { - access = (JavaThreadPDAccess) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2023-09-12 13:54:26.445575876 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java +index 7d7a6107c..06d79318d 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java @@ -22,6 +22,13 @@ * */ @@ -118954,7 +114664,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.utilities; /** Provides canonicalized OS and CPU information for the rest of the -@@ -54,7 +61,7 @@ +@@ -54,7 +61,7 @@ public class PlatformInfo { public static boolean knownCPU(String cpu) { final String[] KNOWN = @@ -118963,7 +114673,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar for(String s : KNOWN) { if(s.equals(cpu)) -@@ -101,6 +108,12 @@ +@@ -101,6 +108,12 @@ public class PlatformInfo { if (cpu.equals("ppc64le")) return "ppc64"; @@ -118976,9 +114686,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar return cpu; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java 2023-09-12 13:54:26.497575942 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java +new file mode 100644 +index 000000000..0d3953ddf +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java @@ -0,0 +1,220 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -119200,9 +114912,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + return new JVMCIBackend(metaAccess, codeCache, constantReflection, stackIntrospection); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java 2023-09-12 13:54:26.497575942 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java +new file mode 100644 +index 000000000..2ee6a4b84 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java @@ -0,0 +1,297 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -119501,9 +115215,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + return String.format("Allocatable: " + getAllocatableRegisters() + "%n" + "CallerSave: " + getCallerSaveRegisters() + "%n"); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java 2023-09-12 13:54:26.497575942 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java +new file mode 100644 +index 000000000..c8605976a +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. @@ -119582,9 +115298,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + final long loongarch64UAL = getConstant("VM_Version::CPU_UAL", Long.class); + // Checkstyle: resume +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java 2023-09-12 13:54:26.501575947 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java +new file mode 100644 +index 000000000..1048ea9d6 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. @@ -119614,9 +115332,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + * The LoongArch64 HotSpot specific portions of the JVMCI API. + */ +package jdk.vm.ci.hotspot.loongarch64; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java 2023-09-12 13:54:26.513575962 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java +new file mode 100644 +index 000000000..1bb12e7a5 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java @@ -0,0 +1,247 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -119865,9 +115585,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java 2023-09-12 13:54:26.513575962 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java +new file mode 100644 +index 000000000..84b7f2027 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java @@ -0,0 +1,163 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -120032,9 +115754,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java 2023-09-12 13:54:26.513575962 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java +new file mode 100644 +index 000000000..9d020833e +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. @@ -120064,9 +115788,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + * The LoongArch64 platform independent portions of the JVMCI API. + */ +package jdk.vm.ci.loongarch64; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/module-info.java jdk11u-ls/src/jdk.internal.vm.ci/share/classes/module-info.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/module-info.java 2022-10-12 23:00:03.000000000 +0800 -+++ jdk11u-ls/src/jdk.internal.vm.ci/share/classes/module-info.java 2023-09-12 13:54:26.521575972 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/module-info.java b/src/jdk.internal.vm.ci/share/classes/module-info.java +index fed310d38..661f106d3 100644 +--- a/src/jdk.internal.vm.ci/share/classes/module-info.java ++++ b/src/jdk.internal.vm.ci/share/classes/module-info.java @@ -23,6 +23,12 @@ * questions. */ @@ -120080,7 +115805,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha module jdk.internal.vm.ci { exports jdk.vm.ci.services to jdk.internal.vm.compiler; exports jdk.vm.ci.runtime to -@@ -37,6 +43,7 @@ +@@ -37,6 +43,7 @@ module jdk.internal.vm.ci { provides jdk.vm.ci.hotspot.HotSpotJVMCIBackendFactory with jdk.vm.ci.hotspot.aarch64.AArch64HotSpotJVMCIBackendFactory, @@ -120088,10 +115813,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha jdk.vm.ci.hotspot.amd64.AMD64HotSpotJVMCIBackendFactory, jdk.vm.ci.hotspot.sparc.SPARCHotSpotJVMCIBackendFactory; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/utils/hsdis/Makefile jdk11u-ls/src/utils/hsdis/Makefile ---- openjdk/src/utils/hsdis/Makefile 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/src/utils/hsdis/Makefile 2023-09-12 13:54:27.413577093 +0800 -@@ -94,6 +94,9 @@ +diff --git a/src/utils/hsdis/Makefile b/src/utils/hsdis/Makefile +index 2514a895d..08fbe3b95 100644 +--- a/src/utils/hsdis/Makefile ++++ b/src/utils/hsdis/Makefile +@@ -94,6 +94,9 @@ CC = gcc endif CFLAGS += -O DLDFLAGS += -shared @@ -120101,24 +115827,21 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/utils/hsdis/Makefile j LDFLAGS += -ldl OUTFLAGS += -o $@ else -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/.src-rev jdk11u-ls/.src-rev ---- openjdk/.src-rev 2022-10-12 23:00:15.000000000 +0800 -+++ jdk11u-ls/.src-rev 1970-01-01 08:00:00.000000000 +0800 -@@ -1 +0,0 @@ --.:git:69ce82b96fce+ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java jdk11u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java ---- openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java 2023-09-12 13:54:27.665577410 +0800 -@@ -22,11 +22,17 @@ +diff --git a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java +index ac17e567b..9b004a203 100644 +--- a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java ++++ b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java +@@ -21,12 +21,18 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2021, These + * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @library /test/lib / * @modules java.base/jdk.internal.misc @@ -120128,22 +115851,24 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @build sun.hotspot.WhiteBox * @run driver ClassFileInstaller sun.hotspot.WhiteBox * sun.hotspot.WhiteBox$WhiteBoxPermission -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java jdk11u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java ---- openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java 2023-09-12 13:54:27.665577410 +0800 -@@ -22,13 +22,19 @@ +diff --git a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java +index 60b2d0332..981a23997 100644 +--- a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java ++++ b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java +@@ -21,6 +21,12 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2021, These + * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @library /test/lib / - * @modules java.base/jdk.internal.misc +@@ -28,7 +34,7 @@ * java.management * * @build sun.hotspot.WhiteBox @@ -120152,9 +115877,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @requires vm.compiler1.enabled | !vm.graal.enabled * @run driver ClassFileInstaller sun.hotspot.WhiteBox * sun.hotspot.WhiteBox$WhiteBoxPermission -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java jdk11u-ls/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java ---- openjdk/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2023-09-12 13:54:27.717577475 +0800 +diff --git a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java +index faa9fdbae..a635f03d2 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java @@ -21,6 +21,12 @@ * questions. */ @@ -120168,7 +115894,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile package compiler.intrinsics.sha.cli.testcases; import compiler.intrinsics.sha.cli.SHAOptionsBase; -@@ -32,19 +38,20 @@ +@@ -32,19 +38,20 @@ import jdk.test.lib.cli.predicate.OrPredicate; /** * Generic test case for SHA-related options targeted to any CPU except @@ -120192,10 +115918,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile } @Override -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java 2023-09-12 13:54:27.749577516 +0800 -@@ -29,6 +29,7 @@ +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java +index 62d0e9915..c3fa3fb93 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java +@@ -29,6 +29,7 @@ import jdk.vm.ci.code.InstalledCode; import jdk.vm.ci.code.TargetDescription; import jdk.vm.ci.code.test.amd64.AMD64TestAssembler; import jdk.vm.ci.code.test.sparc.SPARCTestAssembler; @@ -120203,7 +115930,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile import jdk.vm.ci.hotspot.HotSpotCompiledCode; import jdk.vm.ci.hotspot.HotSpotJVMCIRuntime; import jdk.vm.ci.hotspot.HotSpotResolvedJavaMethod; -@@ -37,6 +38,7 @@ +@@ -37,6 +38,7 @@ import jdk.vm.ci.meta.MetaAccessProvider; import jdk.vm.ci.runtime.JVMCI; import jdk.vm.ci.runtime.JVMCIBackend; import jdk.vm.ci.sparc.SPARC; @@ -120211,7 +115938,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile import org.junit.Assert; import java.lang.reflect.Method; -@@ -72,6 +74,8 @@ +@@ -72,6 +74,8 @@ public class CodeInstallationTest { return new AMD64TestAssembler(codeCache, config); } else if (arch instanceof SPARC) { return new SPARCTestAssembler(codeCache, config); @@ -120220,9 +115947,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile } else { Assert.fail("unsupported architecture"); return null; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java 2023-09-12 13:54:27.749577516 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java +index 8afc7d7b9..520d7707a 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java @@ -23,7 +23,7 @@ /** @@ -120242,9 +115970,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.DataPatchTest */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java 2023-09-12 13:54:27.749577516 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java +index 75d0748da..a6826e2ff 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java @@ -23,7 +23,7 @@ /** @@ -120264,9 +115993,126 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.InterpreterFrameSizeTest */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java 2023-09-12 13:54:27.753577521 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java +index a67fa2c1d..59cce6454 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java +@@ -23,7 +23,7 @@ + + /** + * @test +- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") ++ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -33,7 +33,8 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.sparc +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.MaxOopMapStackOffsetTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java +index d9e1f24c3..259218b30 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java +@@ -23,7 +23,7 @@ + + /** + * @test +- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") ++ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") + * @library /test/lib / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.code +@@ -33,7 +33,8 @@ + * jdk.internal.vm.ci/jdk.vm.ci.common + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.sparc +- * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java sparc/SPARCTestAssembler.java amd64/AMD64TestAssembler.java ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 ++ * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java sparc/SPARCTestAssembler.java amd64/AMD64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm/native -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Xbootclasspath/a:. jdk.vm.ci.code.test.NativeCallTest + */ + package jdk.vm.ci.code.test; +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java +index 9b9211405..00d0f53cd 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java +@@ -23,7 +23,7 @@ + + /** + * @test +- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") ++ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,7 +32,8 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.sparc +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.SimpleCodeInstallationTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java +index 5b2204868..ecfcb1cf0 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java +@@ -23,7 +23,7 @@ + + /** + * @test +- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") ++ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,7 +32,8 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.sparc +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.SimpleDebugInfoTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java +index a10e90acd..5b1a58c74 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java +@@ -23,7 +23,7 @@ + + /** + * @test +- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") ++ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,7 +32,8 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.sparc +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.VirtualObjectDebugInfoTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java +new file mode 100644 +index 000000000..4c7686845 +--- /dev/null ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java @@ -0,0 +1,568 @@ +/* + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. @@ -120836,119 +116682,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile + } + +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java 2023-09-12 13:54:27.749577516 +0800 -@@ -23,7 +23,7 @@ - - /** - * @test -- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") -+ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -33,7 +33,8 @@ - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.sparc -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.MaxOopMapStackOffsetTest - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java 2023-09-12 13:54:27.749577516 +0800 -@@ -23,7 +23,7 @@ - - /** - * @test -- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") -+ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") - * @library /test/lib / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.code -@@ -33,7 +33,8 @@ - * jdk.internal.vm.ci/jdk.vm.ci.common - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.sparc -- * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java sparc/SPARCTestAssembler.java amd64/AMD64TestAssembler.java -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 -+ * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java sparc/SPARCTestAssembler.java amd64/AMD64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm/native -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Xbootclasspath/a:. jdk.vm.ci.code.test.NativeCallTest - */ - package jdk.vm.ci.code.test; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java 2023-09-12 13:54:27.749577516 +0800 -@@ -23,7 +23,7 @@ - - /** - * @test -- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") -+ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,7 +32,8 @@ - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.sparc -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.SimpleCodeInstallationTest - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java 2023-09-12 13:54:27.749577516 +0800 -@@ -23,7 +23,7 @@ - - /** - * @test -- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") -+ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,7 +32,8 @@ - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.sparc -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.SimpleDebugInfoTest - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java 2023-09-12 13:54:27.749577516 +0800 -@@ -23,7 +23,7 @@ - - /** - * @test -- * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9") -+ * @requires vm.jvmci & (vm.simpleArch == "x64" | vm.simpleArch == "sparcv9" | vm.simpleArch == "loongarch64") - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,7 +32,8 @@ - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.sparc -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java sparc/SPARCTestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Djvmci.Compiler=null jdk.vm.ci.code.test.VirtualObjectDebugInfoTest - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java jdk11u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java ---- openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java 2023-09-12 13:54:27.849577641 +0800 +diff --git a/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java b/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java +index acb86812d..664ea11d0 100644 +--- a/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java ++++ b/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java @@ -21,10 +21,17 @@ * questions. */ @@ -120967,9 +116704,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @run main/othervm/native -Xcomp -XX:+CriticalJNINatives compiler.runtime.criticalnatives.argumentcorruption.CheckLongArgs */ package compiler.runtime.criticalnatives.argumentcorruption; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java jdk11u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java ---- openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java 2023-09-12 13:54:27.849577641 +0800 +diff --git a/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java b/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java +index eab36f931..ee5ab2f6d 100644 +--- a/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java ++++ b/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java @@ -21,10 +21,17 @@ * questions. */ @@ -120988,9 +116726,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @run main/othervm/native -Xcomp -XX:+CriticalJNINatives compiler.runtime.criticalnatives.lookup.LookUp */ package compiler.runtime.criticalnatives.lookup; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java jdk11u-ls/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java ---- openjdk/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2023-09-12 13:54:27.857577651 +0800 +diff --git a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java +index 7774dabcb..c1cb6e00f 100644 +--- a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java ++++ b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java @@ -21,6 +21,12 @@ * questions. */ @@ -121004,7 +116743,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile package compiler.testlibrary.sha.predicate; import jdk.test.lib.Platform; -@@ -63,10 +69,12 @@ +@@ -63,10 +69,12 @@ public class IntrinsicPredicates { = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha1" }, null), new OrPredicate(new CPUSpecificPredicate("s390.*", new String[] { "sha1" }, null), new OrPredicate(new CPUSpecificPredicate("sparc.*", new String[] { "sha1" }, null), @@ -121018,7 +116757,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile public static final BooleanSupplier SHA256_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha256" }, null), -@@ -74,12 +82,14 @@ +@@ -74,12 +82,14 @@ public class IntrinsicPredicates { new OrPredicate(new CPUSpecificPredicate("sparc.*", new String[] { "sha256" }, null), new OrPredicate(new CPUSpecificPredicate("ppc64.*", new String[] { "sha" }, null), new OrPredicate(new CPUSpecificPredicate("ppc64le.*", new String[] { "sha" }, null), @@ -121034,217 +116773,24 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile public static final BooleanSupplier SHA512_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha512" }, null), -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/loongson/25443/Test25443.java jdk11u-ls/test/hotspot/jtreg/loongson/25443/Test25443.java ---- openjdk/test/hotspot/jtreg/loongson/25443/Test25443.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/loongson/25443/Test25443.java 2023-09-12 13:54:27.933577747 +0800 -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+/** -+ * @test -+ * @summary test c2 or2s -+ * -+ * @run main/othervm -Xcomp -XX:-TieredCompilation Test25443 -+ */ -+public class Test25443 { -+ static short test_ori2s(int v1) { -+ short t = (short)(v1 | 0x14); -+ return t; -+ } -+ -+ static short test_or2s(int v1, int v2) { -+ short t = (short)(v1 | v2); -+ return t; -+ } -+ -+ static short ret; -+ public static void main(String[] args) { -+ for (int i = 0; i < 12000; i++) { //warmup -+ test_ori2s(0x333300); -+ test_or2s(0x333300, 0x14); -+ } -+ -+ if ( (test_ori2s(0x333300) == 0x3314) -+ && (test_or2s(0x333300, 0x14) == 0x3314) -+ && (test_or2s(0x333300, 0x1000) == 0x3300) -+ && (test_or2s(0x333300, 0x8000) == 0xffffb300)) { -+ System.out.println("TEST PASSED"); -+ } else { -+ throw new AssertionError("Not be expected results"); -+ } -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/loongson/7432/Test7423.java jdk11u-ls/test/hotspot/jtreg/loongson/7432/Test7423.java ---- openjdk/test/hotspot/jtreg/loongson/7432/Test7423.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/loongson/7432/Test7423.java 2023-09-12 13:54:27.933577747 +0800 -@@ -0,0 +1,61 @@ -+/* -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+/** -+ * @test -+ * @summary Divide by zero -+ * -+ * @run main/othervm -Xint Test7423 -+ * @run main/othervm -Xcomp Test7423 -+ */ -+public class Test7423 { -+ -+ private static int divInt(int n) { -+ int a = 1 / n; -+ return a; -+ } -+ -+ private static long divLong(long n) { -+ long a = (long)1 / n; -+ return a; -+ } -+ -+ public static void main(String[] args) throws Exception { -+ -+ try { -+ for (int i = 0; i < 20000; i++) { -+ if (i == 18000) { -+ divInt(0); -+ divLong((long)0); -+ } else { -+ divInt(1); -+ divLong((long)1); -+ } -+ } -+ } catch (java.lang.ArithmeticException exc) { -+ System.out.println("expected-exception " + exc); -+ } -+ } -+ -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/ProblemList.txt jdk11u-ls/test/hotspot/jtreg/ProblemList.txt ---- openjdk/test/hotspot/jtreg/ProblemList.txt 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/ProblemList.txt 2023-11-01 09:34:26.513946398 +0800 +diff --git a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java +index 127bb6abc..c9277604a 100644 +--- a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java ++++ b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java @@ -21,6 +21,12 @@ - # questions. - # - -+# -+# This file has been modified by Loongson Technology in 2022. These -+# modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# -+ - ############################################################################# - # - # List of quarantined tests -- tests that should not be run by default, because -@@ -234,3 +240,40 @@ - vmTestbase/nsk/jdwp/ThreadReference/ForceEarlyReturn/forceEarlyReturn001/forceEarlyReturn001.java 7199837 generic-all - - ############################################################################# -+ -+# loongson added -+compiler/loopopts/TestSkeletonPredicateNegation.java #25538 generic-loongarch64 -+compiler/profiling/TestTypeProfiling.java #25171 generic-loongarch64 -+compiler/tiered/Level2RecompilationTest.java #10070 generic-mips64el,generic-loongarch64 -+containers/cgroup/PlainRead.java #20028 generic-mips64el -+gc/cms/TestBubbleUpRef.java #17221 generic-mips64el -+gc/stress/gcbasher/TestGCBasherWithCMS.java #17221 generic-mips64el -+resourcehogs/serviceability/sa/ClhsdbRegionDetailsScanOopsForG1.java #24312 generic-loongarch64 -+resourcehogs/serviceability/sa/TestHeapDumpForLargeArray.java #9797 generic-mips64el -+runtime/classFileParserBug/TestEmptyBootstrapMethodsAttr.java generic-all -+runtime/NMT/CheckForProperDetailStackTrace.java #9499 generic-mips64el,generic-loongarch64 -+serviceability/sa/CDSJMapClstats.java #9797 generic-mips64el -+serviceability/sa/ClhsdbCDSJstackPrintAll.java #9797 generic-mips64el -+serviceability/sa/ClhsdbInspect.java #9797 generic-mips64el -+serviceability/sa/ClhsdbJdis.java #9797 generic-mips64el -+serviceability/sa/ClhsdbJstack.java #9797 generic-mips64el -+serviceability/sa/ClhsdbJstackXcompStress.java #10632 generic-mips64el -+serviceability/sa/ClhsdbPrintAs.java #9797 generic-mips64el -+serviceability/sa/ClhsdbPstack.java #9797 generic-mips64el -+serviceability/sa/ClhsdbSource.java #9797 generic-mips64el -+serviceability/sa/ClhsdbThread.java #9797 generic-mips64el -+serviceability/sa/ClhsdbWhere.java #9797 generic-mips64el -+serviceability/sa/DeadlockDetectionTest.java #9797 generic-mips64el -+serviceability/sa/JhsdbThreadInfoTest.java #9797 generic-mips64el -+serviceability/sa/jmap-hprof/JMapHProfLargeHeapTest.java #9797 generic-mips64el -+serviceability/sa/sadebugd/DebugdConnectTest.java #9797 generic-mips64el -+serviceability/sa/TestClhsdbJstackLock.java #9797 generic-mips64el -+serviceability/sa/TestHeapDumpForInvokeDynamic.java #9797 generic-mips64el -+serviceability/sa/TestHeapDumpForLargeArray.java #9797 generic-mips64el -+serviceability/sa/TestInstanceKlassSize.java #9797 generic-mips64el -+serviceability/sa/TestJhsdbJstackLock.java #9797 generic-mips64el -+serviceability/sa/TestJhsdbJstackMixed.java #9797 generic-mips64el -+serviceability/sa/TestJmapCore.java #9797 generic-mips64el -+serviceability/sa/TestJmapCoreMetaspace.java #9797 generic-mips64el -+serviceability/sa/TestPrintMdo.java #9797,#25534 generic-mips64el,generic-loongarch64 -+vmTestbase/jit/tiered/Test.java generic-mips64el -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/ProblemList-Xcomp.txt jdk11u-ls/test/hotspot/jtreg/ProblemList-Xcomp.txt ---- openjdk/test/hotspot/jtreg/ProblemList-Xcomp.txt 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/ProblemList-Xcomp.txt 2023-09-12 13:54:27.489577189 +0800 -@@ -29,3 +29,6 @@ - - vmTestbase/vm/mlvm/meth/stress/jni/nativeAndMH/Test.java 8208235 solaris-all - runtime/appcds/cacheObject/DifferentHeapSizes.java 8210102 solaris-all -+ -+# loongson added -+compiler/intrinsics/bigInteger/TestMultiplyToLenReturnProfile.java generic-mips64el -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java jdk11u-ls/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java ---- openjdk/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java 2023-09-12 13:54:27.981577807 +0800 -@@ -22,6 +22,12 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2021, These + * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test ReservedStackTest * - * @requires vm.opt.DeoptimizeALot != true -@@ -239,7 +245,7 @@ +@@ -239,7 +245,7 @@ public class ReservedStackTest { return Platform.isAix() || (Platform.isLinux() && (Platform.isPPC() || Platform.isS390x() || Platform.isX64() || @@ -121253,10 +116799,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/runtime Platform.isOSX() || Platform.isSolaris(); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java jdk11u-ls/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java ---- openjdk/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java 2022-10-12 23:00:04.000000000 +0800 -+++ jdk11u-ls/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java 2023-09-12 13:54:28.141578008 +0800 -@@ -45,7 +45,7 @@ +diff --git a/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java b/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java +index 126a43a90..55bd135f6 100644 +--- a/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java ++++ b/test/hotspot/jtreg/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java +@@ -45,7 +45,7 @@ import java.util.Set; */ public class TestMutuallyExclusivePlatformPredicates { private static enum MethodGroup { @@ -121265,119 +116812,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/testlib BITNESS("is32bit", "is64bit"), OS("isAix", "isLinux", "isOSX", "isSolaris", "isWindows"), VM_TYPE("isClient", "isServer", "isGraal", "isMinimal", "isZero", "isEmbedded"), -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/java/security/KeyAgreement/KeyAgreementTest.java jdk11u-ls/test/jdk/java/security/KeyAgreement/KeyAgreementTest.java ---- openjdk/test/jdk/java/security/KeyAgreement/KeyAgreementTest.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/java/security/KeyAgreement/KeyAgreementTest.java 2023-09-12 13:54:29.981580321 +0800 -@@ -67,9 +67,27 @@ - // EC curve supported for KeyGeneration can found between intersection - // of curves define in - // "java.base/share/classes/sun/security/util/CurveDB.java" -- -- ECDH("secp256k1", "secp256r1", "secp384r1", "secp521r1"), -- XDH("X25519", "X448", "x25519"), -+ // and -+ // "jdk.crypto.ec/share/native/libsunec/impl/ecdecode.c" -+ ECDH( -+ // SEC2 prime curves -+ "secp112r1", "secp112r2", "secp128r1", "secp128r2", "secp160k1", -+ "secp160r1", "secp192k1", "secp192r1", "secp224k1", "secp224r1", -+ "secp256k1", "secp256r1", "secp384r1", "secp521r1", -+ // ANSI X9.62 prime curves -+ "X9.62 prime192v2", "X9.62 prime192v3", "X9.62 prime239v1", -+ "X9.62 prime239v2", "X9.62 prime239v3", -+ // SEC2 binary curves -+ "sect113r1", "sect113r2", "sect131r1", "sect131r2", "sect163k1", -+ "sect163r1", "sect163r2", "sect193r1", "sect193r2", "sect233k1", -+ "sect233r1", "sect239k1", "sect283k1", "sect283r1", "sect409k1", -+ "sect409r1", "sect571k1", "sect571r1", -+ // ANSI X9.62 binary curves -+ "X9.62 c2tnb191v1", "X9.62 c2tnb191v2", "X9.62 c2tnb191v3", -+ "X9.62 c2tnb239v1", "X9.62 c2tnb239v2", "X9.62 c2tnb239v3", -+ "X9.62 c2tnb359v1", "X9.62 c2tnb431r1" -+ ), -+ XDH("X25519", "X448"), - // There is no curve for DiffieHellman - DiffieHellman(new String[]{}); - -@@ -101,7 +119,7 @@ - } - - /** -- * Perform KeyAgreement operation -+ * Perform KeyAgreement operation using native as well as JCE provider. - */ - private static void testKeyAgreement(String provider, String kaAlgo, - String kpgAlgo, AlgorithmParameterSpec spec) throws Exception { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/java/security/KeyAgreement/KeySizeTest.java jdk11u-ls/test/jdk/java/security/KeyAgreement/KeySizeTest.java ---- openjdk/test/jdk/java/security/KeyAgreement/KeySizeTest.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/java/security/KeyAgreement/KeySizeTest.java 2023-09-12 13:54:29.981580321 +0800 -@@ -37,9 +37,9 @@ - * @run main KeySizeTest DiffieHellman SunJCE DiffieHellman 4096 - * @run main KeySizeTest DiffieHellman SunJCE DiffieHellman 6144 - * @run main KeySizeTest DiffieHellman SunJCE DiffieHellman 8192 -- * @run main/othervm KeySizeTest ECDH SunEC EC 256 -- * @run main/othervm KeySizeTest ECDH SunEC EC 384 -- * @run main/othervm KeySizeTest ECDH SunEC EC 521 -+ * @run main KeySizeTest ECDH SunEC EC 128 -+ * @run main KeySizeTest ECDH SunEC EC 192 -+ * @run main KeySizeTest ECDH SunEC EC 256 - * @run main KeySizeTest XDH SunEC XDH 255 - * @run main KeySizeTest XDH SunEC XDH 448 - */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/javax/net/ssl/templates/SSLSocketTemplate.java jdk11u-ls/test/jdk/javax/net/ssl/templates/SSLSocketTemplate.java ---- openjdk/test/jdk/javax/net/ssl/templates/SSLSocketTemplate.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/javax/net/ssl/templates/SSLSocketTemplate.java 2023-09-12 13:54:30.401580849 +0800 -@@ -358,12 +358,14 @@ - // Trusted certificates. - protected final static Cert[] TRUSTED_CERTS = { - Cert.CA_ECDSA_SECP256R1, -+ Cert.CA_ECDSA_SECT283R1, - Cert.CA_RSA_2048, - Cert.CA_DSA_2048 }; - - // End entity certificate. - protected final static Cert[] END_ENTITY_CERTS = { - Cert.EE_ECDSA_SECP256R1, -+ Cert.EE_ECDSA_SECT283R1, - Cert.EE_RSA_2048, - Cert.EE_EC_RSA_SECP256R1, - Cert.EE_DSA_2048 }; -@@ -697,6 +699,32 @@ - "p1YdWENftmDoNTJ3O6TNlXb90jKWgAirCXNBUompPtHKkO592eDyGcT1h8qjrKlm\n" + - "Kw=="), - -+ CA_ECDSA_SECT283R1( -+ "EC", -+ // SHA1withECDSA, curve sect283r1 -+ // Validity -+ // Not Before: May 26 06:06:52 2020 GMT -+ // Not After : May 21 06:06:52 2040 GMT -+ // Subject Key Identifier: -+ // CF:A3:99:ED:4C:6E:04:41:09:21:31:33:B6:80:D5:A7:BF:2B:98:04 -+ "-----BEGIN CERTIFICATE-----\n" + -+ "MIIB8TCCAY+gAwIBAgIJANQFsBngZ3iMMAsGByqGSM49BAEFADBdMQswCQYDVQQG\n" + -+ "EwJVUzELMAkGA1UECBMCQ0ExCzAJBgNVBAcTAlNBMQ8wDQYDVQQKEwZPcmFjbGUx\n" + -+ "DzANBgNVBAsTBkpQR1NRRTESMBAGA1UEAxMJc2VjdDI4M3IxMB4XDTIwMDUyNjE4\n" + -+ "MDY1MloXDTQwMDUyMTE4MDY1MlowXTELMAkGA1UEBhMCVVMxCzAJBgNVBAgTAkNB\n" + -+ "MQswCQYDVQQHEwJTQTEPMA0GA1UEChMGT3JhY2xlMQ8wDQYDVQQLEwZKUEdTUUUx\n" + -+ "EjAQBgNVBAMTCXNlY3QyODNyMTBeMBAGByqGSM49AgEGBSuBBAARA0oABALatmDt\n" + -+ "QIhjpK4vJjv4GgC8CUH/VAWLUSQRU7yGGQ3NF8rVBARv0aehiII0nzjDVX5KrP/A\n" + -+ "w/DmW7q8PfEAIktuaA/tcKv/OKMyMDAwHQYDVR0OBBYEFM+jme1MbgRBCSExM7aA\n" + -+ "1ae/K5gEMA8GA1UdEwEB/wQFMAMBAf8wCwYHKoZIzj0EAQUAA08AMEwCJAGHsAP8\n" + -+ "HlcVqszra+fxq35juTxHJIfxTKIr7f54Ywtz7AJowgIkAxydv8g+dkuniOUAj0Xt\n" + -+ "FnGVp6HzKX5KM1zLpfqmix8ZPP/A\n" + -+ "-----END CERTIFICATE-----", -+ "MIGQAgEAMBAGByqGSM49AgEGBSuBBAARBHkwdwIBAQQkAdcyn/FxiNvuTsSgDehq\n" + -+ "SGFiTxAKNMMJfmsO6GHekzszFqjPoUwDSgAEAtq2YO1AiGOkri8mO/gaALwJQf9U\n" + -+ "BYtRJBFTvIYZDc0XytUEBG/Rp6GIgjSfOMNVfkqs/8DD8OZburw98QAiS25oD+1w\n" + -+ "q/84"), -+ - CA_RSA_2048( - "RSA", - // SHA256withRSA, 2048 bits -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/jdk/jfr/event/os/TestCPUInformation.java jdk11u-ls/test/jdk/jdk/jfr/event/os/TestCPUInformation.java ---- openjdk/test/jdk/jdk/jfr/event/os/TestCPUInformation.java 2022-10-12 23:00:06.000000000 +0800 -+++ jdk11u-ls/test/jdk/jdk/jfr/event/os/TestCPUInformation.java 2023-09-12 13:54:30.669581186 +0800 +diff --git a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java +index 7990c49a1..025048c6b 100644 +--- a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java ++++ b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java @@ -23,6 +23,12 @@ * questions. */ @@ -121391,7 +116829,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/jdk/jfr/event/os/ package jdk.jfr.event.os; import java.util.List; -@@ -54,8 +60,8 @@ +@@ -54,8 +60,8 @@ public class TestCPUInformation { Events.assertField(event, "hwThreads").atLeast(1); Events.assertField(event, "cores").atLeast(1); Events.assertField(event, "sockets").atLeast(1); @@ -121402,808 +116840,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/jdk/jfr/event/os/ } } } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/jdk/security/jarsigner/Spec.java jdk11u-ls/test/jdk/jdk/security/jarsigner/Spec.java ---- openjdk/test/jdk/jdk/security/jarsigner/Spec.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/jdk/security/jarsigner/Spec.java 2023-09-12 13:54:30.713581241 +0800 -@@ -31,7 +31,7 @@ - * jdk.jartool - * jdk.crypto.ec - * @build jdk.test.lib.util.JarUtils -- * @run main/othervm Spec -+ * @run main Spec - */ - - import com.sun.jarsigner.ContentSigner; -@@ -190,7 +190,7 @@ - .equals("SHA256withDSA")); - - kpg = KeyPairGenerator.getInstance("EC"); -- kpg.initialize(256); -+ kpg.initialize(192); - assertTrue(JarSigner.Builder - .getDefaultSignatureAlgorithm(kpg.generateKeyPair().getPrivate()) - .equals("SHA256withECDSA")); -@@ -198,7 +198,7 @@ - assertTrue(JarSigner.Builder - .getDefaultSignatureAlgorithm(kpg.generateKeyPair().getPrivate()) - .equals("SHA384withECDSA")); -- kpg.initialize(521); -+ kpg.initialize(571); - assertTrue(JarSigner.Builder - .getDefaultSignatureAlgorithm(kpg.generateKeyPair().getPrivate()) - .equals("SHA512withECDSA")); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/ProblemList.txt jdk11u-ls/test/jdk/ProblemList.txt ---- openjdk/test/jdk/ProblemList.txt 2022-10-12 23:00:05.000000000 +0800 -+++ jdk11u-ls/test/jdk/ProblemList.txt 2023-11-01 09:34:26.661946562 +0800 -@@ -21,6 +21,12 @@ - # or visit www.oracle.com if you need additional information or have any - # questions. - # -+ -+# -+# This file has been modified by Loongson Technology in 2022. These -+# modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# - ########################################################################### - # - # List of tests that should not be run by test/Makefile, for various reasons: -@@ -622,7 +628,7 @@ - - sun/security/tools/keytool/ListKeychainStore.sh 8156889 macosx-all - --sun/security/tools/jarsigner/compatibility/SignTwice.java 8217375 windows-all -+sun/security/tools/jarsigner/compatibility/SignTwice.java 8217375,#24291 windows-all,generic-mips64el,generic-loongarch64 - sun/security/tools/jarsigner/warnings/BadKeyUsageTest.java 8026393 generic-all - - javax/net/ssl/ServerName/SSLEngineExplorerMatchedSNI.java 8212096 generic-all -@@ -886,3 +892,40 @@ - - ############################################################################ - -+# loongson added -+java/awt/font/GlyphVector/NLGlyphTest.java #21476 generic-all -+java/lang/System/LoggerFinder/internal/BootstrapLogger/BootstrapLoggerTest.java generic-all -+java/rmi/server/UnicastRemoteObject/exportObject/GcDuringExport.java #10949 generic-mips64el,generic-loongarch64 -+java/util/logging/LocalizedLevelName.java generic-all -+java/util/logging/SimpleFormatterFormat.java generic-all -+jdk/jfr/api/consumer/TestRecordedFrame.java #10010 generic-mips64el,generic-loongarch64 -+jdk/jfr/jcmd/TestJcmdStartWithSettings.java #24259 generic-mips64el,generic-loongarch64 -+jdk/jfr/jvm/TestJFRIntrinsic.java #10011,JDK-8239423 generic-mips64el,generic-loongarch64 -+security/infra/java/security/cert/CertPathValidator/certification/LetsEncryptCA.java #24472 generic-loongarch64 -+sun/tools/jhsdb/BasicLauncherTest.java #9381 generic-mips64el -+sun/tools/jhsdb/HeapDumpTest.java #9381 generic-mips64el -+sun/tools/jhsdb/JShellHeapDumpTest.java #23705 generic-mips64el -+sun/util/logging/SourceClassName.java generic-all -+tools/pack200/DeprecatePack200.java generic-all -+tools/jpackage/linux/AppAboutUrlTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/linux/AppCategoryTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/jdk/jpackage/tests/UsrTreeTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/LicenseTypeTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/LinuxBundleNameTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/LinuxResourceTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/PackageDepsTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/ReleaseTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/linux/ShortcutHintTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/AddLauncherTest.java#id1 #24942 generic-loongarch64 -+tools/jpackage/share/AddLShortcutTest.java #24942 generic-loongarch64 -+tools/jpackage/share/AppContentTest.java #24942 generic-loongarch64 -+tools/jpackage/share/AppImagePackageTest.java #24942 generic-loongarch64 -+tools/jpackage/share/EmptyFolderPackageTest.java #24942 generic-loongarch64 -+tools/jpackage/share/FileAssociationsTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/IconTest.java #24942 generic-loongarch64 -+tools/jpackage/share/InstallDirTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/jdk/jpackage/tests/VendorTest.java#id1 #24942 generic-loongarch64 -+tools/jpackage/share/MultiLauncherTwoPhaseTest.java #24942 generic-loongarch64 -+tools/jpackage/share/MultiNameTwoPhaseTest.java #24942 generic-loongarch64 -+tools/jpackage/share/RuntimePackageTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/SimplePackageTest.java #24942 generic-loongarch64 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/ProblemList-Xcomp.txt jdk11u-ls/test/jdk/ProblemList-Xcomp.txt ---- openjdk/test/jdk/ProblemList-Xcomp.txt 2022-10-12 23:00:05.000000000 +0800 -+++ jdk11u-ls/test/jdk/ProblemList-Xcomp.txt 2023-09-12 13:54:29.105579220 +0800 -@@ -21,6 +21,12 @@ - # questions. - # - -+# -+# This file has been modified by Loongson Technology in 2022. These -+# modifications are Copyright (c) 2020, 2022, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# -+ - ############################################################################# - # - # List of quarantined tests for testing in Xcomp mode. -@@ -29,3 +35,70 @@ - - java/lang/invoke/MethodHandles/CatchExceptionTest.java 8146623 generic-all - java/lang/Class/forName/modules/TestDriver.java 8208212 solaris-all -+ -+# loongson added -+com/sun/jndi/ldap/LdapCBPropertiesTest.java generic-mips64el,generic-loongarch64 -+com/sun/net/httpserver/bugs/6725892/Test.java #uos generic-mips64el -+com/sun/net/httpserver/bugs/B6393710.java generic-mips64el -+com/sun/net/httpserver/bugs/B6529200.java generic-mips64el -+com/sun/net/httpserver/Test10.java generic-mips64el -+com/sun/net/httpserver/Test1.java generic-mips64el -+java/lang/annotation/loaderLeak/Main.java generic-all -+java/lang/Thread/UncaughtExceptions.sh generic-mips64el -+java/net/httpclient/MaxStreams.java generic-mips64el,generic-loongarch64 -+java/net/httpclient/ShortRequestBody.java #uos generic-mips64el -+java/net/httpclient/TimeoutOrdering.java generic-mips64el -+java/net/Socket/DeadlockTest.java #uos generic-mips64el -+java/net/Socket/LingerTest.java #uos generic-mips64el -+java/net/Socket/RejectIPv6.java generic-mips64el -+java/rmi/activation/Activatable/forceLogSnapshot/ForceLogSnapshot.java generic-all -+java/rmi/activation/Activatable/nestedActivate/NestedActivate.java generic-all -+java/rmi/server/RMISocketFactory/useSocketFactory/activatable/UseCustomSocketFactory.java generic-all -+java/rmi/server/RMISocketFactory/useSocketFactory/unicast/UseCustomSocketFactory.java generic-all -+java/rmi/server/Unreferenced/leaseCheckInterval/LeaseCheckInterval.java generic-all -+java/rmi/transport/acceptLoop/CloseServerSocketOnTermination.java generic-all -+java/security/Security/ClassLoaderDeadlock/ClassLoaderDeadlock.sh #uos generic-mips64el -+javax/management/monitor/DerivedGaugeMonitorTest.java generic-mips64el,generic-loongarch64 -+javax/management/remote/mandatory/connection/MultiThreadDeadLockTest.java #27495 generic-mips64el,generic-loongarch64 -+javax/management/rete/mandatory/connection/MultiThreadDeadLockTest.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/ServerName/SSLSocketSNISensitive.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/SSLSession/SessionCacheSizeTests.java #uos generic-mips64el -+javax/net/ssl/SSLSession/SessionTimeOutTests.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/Stapling/HttpsUrlConnClient.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/Stapling/SSLEngineWithStapling.java generic-mips64el -+javax/net/ssl/Stapling/SSLSocketWithStapling.java generic-mips64el -+javax/net/ssl/Stapling/StapleEnableProps.java generic-mips64el -+javax/net/ssl/TLSCommon/TestSessionLocalPrincipal.java generic-mips64el -+javax/net/ssl/TLS/TestJSSEClientProtocol.java #uos generic-mips64el -+javax/net/ssl/TLS/TestJSSEServerProtocol.java #uos generic-mips64el -+jdk/jfr/api/consumer/TestRecordedFullStackTrace.java generic-all -+jdk/jfr/api/metadata/eventtype/TestUnloadingEventClass.java generic-all -+jdk/jfr/event/compiler/TestCompilerInlining.java generic-all -+jdk/jfr/event/profiling/TestFullStackTrace.java generic-all -+jdk/security/logging/TestTLSHandshakeLog.java #uos generic-mips64el -+sun/net/InetAddress/nameservice/simple/DefaultCaching.java #uos generic-mips64el -+sun/net/www/http/HttpClient/B8209178.java generic-all -+sun/net/www/protocol/https/HttpsURLConnection/CookieHttpsClientTest.java generic-mips64el,generic-loongarch64 -+sun/net/www/protocol/https/HttpsURLConnection/PostThruProxy.java #uos generic-mips64el -+sun/net/www/protocol/https/HttpsURLConnection/ReadTimeout.java generic-mips64el,generic-loongarch64 -+sun/security/ec/TestEC.java #uos generic-mips64el -+sun/security/krb5/auto/BogusKDC.java #uos generic-mips64el -+sun/security/krb5/auto/NullRenewUntil.java generic-mips64el -+sun/security/krb5/auto/rcache_usemd5.sh #uos generic-mips64el -+sun/security/krb5/auto/RefreshKrb5Config.java #uos generic-mips64el -+sun/security/krb5/auto/ReplayCacheTestProc.java #uos generic-mips64el -+sun/security/krb5/auto/Unreachable.java generic-mips64el -+sun/security/ssl/SSLSocketImpl/SSLSocketBruceForceClose.java generic-mips64el,generic-loongarch64 -+sun/security/ssl/SSLSocketImpl/SSLSocketCloseHang.java generic-all -+sun/security/ssl/Stapling/StatusResponseManager.java generic-mips64el -+sun/security/tools/jarsigner/certpolicy.sh #uos generic-mips64el -+sun/security/tools/jarsigner/checkusage.sh #uos generic-mips64el -+sun/security/tools/jarsigner/concise_jarsigner.sh generic-mips64el -+sun/security/tools/jarsigner/ec.sh #uos generic-mips64el -+sun/security/tools/keytool/selfissued.sh #uos generic-mips64el -+sun/security/tools/keytool/StorePasswordsByShell.sh #uos generic-mips64el -+sun/security/validator/certreplace.sh #uos generic-mips64el -+sun/security/validator/samedn.sh #uos generic-mips64el -+tools/jar/compat/CLICompatibility.java generic-mips64el -+tools/jar/modularJar/Basic.java generic-mips64el -+tools/jar/multiRelease/Basic.java generic-mips64el -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/ec/keystore jdk11u-ls/test/jdk/sun/security/ec/keystore ---- openjdk/test/jdk/sun/security/ec/keystore 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/ec/keystore 2023-09-12 13:54:31.037581648 +0800 -@@ -1,4 +1,4 @@ --vajraԐr00 -+vajraԐr00 - +*oxF?ұ" - bi;=A5WHi1GBYt}u/`gX[:}kū?\gX< m}܁ sܡ݋]`qH:0=Rpեpm)W 9N{$(R# o"'g7"R}&c5kVJxXS?Mr? - 2jz0'2A#WS'2ָ)g7e1 3XٻUi$T.[1(jcXtvQisohjl/=T1I:SM5X/1uO4/h!U4w'gVc6]Q?9Z#DI KSXjxXӟSԩ?/UF0KEM^rJÙL6UĴH"bwڤ;oc๋XTלNܩ5+^GN|f@G7Y1-(!3W>+дm)\sf}92zY!Ed2糵JKx:Δ岶B2ټ*0xX8Cygvajradsaԑ3'00 -+ boWo;>*0xX8Cygsect193r1server-rsa1024ca G=Et0r0 -++*` phjj/L_wm1a%]XAù1S 3zZ܁ Fߛ~p[qZռQ#vT@}JF 캝 -\ 文件尾没有换行符 -+Sun Microsystems, Inc.10U  Java Software10Uvajra.eng.sun.com00,*H80Su)RJ.RqZȄ$ 'u)7a -\ 文件尾没有换行符 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/ec/pkcs12/sect193r1server-rsa1024ca.p12 jdk11u-ls/test/jdk/sun/security/ec/pkcs12/sect193r1server-rsa1024ca.p12 ---- openjdk/test/jdk/sun/security/ec/pkcs12/sect193r1server-rsa1024ca.p12 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/ec/pkcs12/sect193r1server-rsa1024ca.p12 2023-09-12 13:54:31.037581648 +0800 -@@ -0,0 +1,10 @@ -+00 *H 00W *H H0D0= *H 0 -+*H  0o5Kx⹇fčS)*jB.~t%Se/> DSch3zlڬ*^TCM;=.eBjdAy2OSO4_X0j)`Uoq.S!uBQ=jУQD f5dP(˸7JJ5) ZQoa7\!H$nLd]($r1 c -+!9K=e44UNbķy:AMN1ׁ2kYUsD:az`8[  ôL wxoknc -+r0؆~5m Y)R,ISD}iR&S7 -+8P[vFqJFzV}(ftğ{jGeрǙ<߈Q/x_tLQEc~ݏAC)@;EԭJɧ*8od߈*ei..i}աނT=?8Y8~^f.dxdkAoL-؆Ϩ 00 *H !00 *H  -+00 -+*H  0:6 -+xl)_{N9}*bw{~JxΛp~L4&ZeP)ÜbWoY&TjoL ⊬F\2bht1h0# *H  16k[n7X&iqΨ0A *H  142sect193r1server-rsa1024ca010!0 +J٠ӈ?AĬg$E]̝8 -\ 文件尾没有换行符 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/ec/SignatureDigestTruncate.java jdk11u-ls/test/jdk/sun/security/ec/SignatureDigestTruncate.java ---- openjdk/test/jdk/sun/security/ec/SignatureDigestTruncate.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/ec/SignatureDigestTruncate.java 2023-09-12 13:54:31.037581648 +0800 -@@ -36,7 +36,7 @@ - * group order. - * @library /test/lib - * @build jdk.test.lib.Convert -- * @run main/othervm SignatureDigestTruncate -+ * @run main SignatureDigestTruncate - */ - public class SignatureDigestTruncate { - -@@ -117,12 +117,12 @@ - } - - public static void main(String[] args) throws Exception { -- runTest("SHA384withECDSAinP1363Format", "secp256r1", -+ runTest("SHA384withECDSAinP1363Format", "sect283r1", - "abcdef10234567", "010203040506070809", - "000102030405060708090a0b0c0d0e0f101112131415161718191a1b1c1d" + -- "1e1f20212223", -- "d83534beccde787f9a4c6b0408337d9b9ca2e0a0259228526c15cc17a1d6" + -- "4da6b34bf21b3bc4488c591d8ac9c33d93c7c6137e2ab4c503a42da7" + -- "2fe0b6dda4c4"); -+ "1e1f20212223", -+ "01d7544b5d3935216bd45e2f8042537e1e0296a11e0eb96666199281b409" + -+ "42abccd5358a035de8a314d3e6c2a97614daebf5fb1313540eec3f9a3272" + -+ "068aa10922ccae87d255c84c"); - } - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/ec/TestEC.java jdk11u-ls/test/jdk/sun/security/ec/TestEC.java ---- openjdk/test/jdk/sun/security/ec/TestEC.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/ec/TestEC.java 2023-09-12 13:54:31.037581648 +0800 -@@ -37,8 +37,8 @@ - * @library ../../../java/security/testlibrary - * @library ../../../javax/net/ssl/TLSCommon - * @modules jdk.crypto.cryptoki/sun.security.pkcs11.wrapper -- * @run main/othervm -Djdk.tls.namedGroups="secp256r1" TestEC -- * @run main/othervm/java.security.policy=TestEC.policy -Djdk.tls.namedGroups="secp256r1" TestEC -+ * @run main/othervm -Djdk.tls.namedGroups="secp256r1,sect193r1" TestEC -+ * @run main/othervm/java.security.policy=TestEC.policy -Djdk.tls.namedGroups="secp256r1,sect193r1" TestEC - */ - - import java.security.NoSuchProviderException; -@@ -48,12 +48,13 @@ - /* - * Leverage the collection of EC tests used by PKCS11 - * -- * NOTE: the following 5 files were copied here from the PKCS11 EC Test area -+ * NOTE: the following 6 files were copied here from the PKCS11 EC Test area - * and must be kept in sync with the originals: - * - * ../pkcs11/ec/p12passwords.txt - * ../pkcs11/ec/certs/sunlabscerts.pem - * ../pkcs11/ec/pkcs12/secp256r1server-secp384r1ca.p12 -+ * ../pkcs11/ec/pkcs12/sect193r1server-rsa1024ca.p12 - * ../pkcs11/sslecc/keystore - * ../pkcs11/sslecc/truststore - */ -@@ -98,26 +99,18 @@ - * The entry point used for each test is its instance method - * called main (not its static method called main). - */ -- System.out.println("TestECDH"); - new TestECDH().main(p); -- System.out.println("TestECDSA"); - new TestECDSA().main(p); -- System.out.println("TestCurves"); - new TestCurves().main(p); -- System.out.println("TestKeyFactory"); - new TestKeyFactory().main(p); -- System.out.println("TestECGenSpec"); - new TestECGenSpec().main(p); -- System.out.println("ReadPKCS12"); - new ReadPKCS12().main(p); -- System.out.println("ReadCertificate"); - new ReadCertificates().main(p); - - // ClientJSSEServerJSSE fails on Solaris 11 when both SunEC and - // SunPKCS11-Solaris providers are enabled. - // Workaround: - // Security.removeProvider("SunPKCS11-Solaris"); -- System.out.println("ClientJSSEServerJSSE"); - new ClientJSSEServerJSSE().main(p); - - long stop = System.currentTimeMillis(); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/ec/pkcs12/sect193r1server-rsa1024ca.p12 jdk11u-ls/test/jdk/sun/security/pkcs11/ec/pkcs12/sect193r1server-rsa1024ca.p12 ---- openjdk/test/jdk/sun/security/pkcs11/ec/pkcs12/sect193r1server-rsa1024ca.p12 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/ec/pkcs12/sect193r1server-rsa1024ca.p12 2023-09-12 13:54:31.097581723 +0800 -@@ -0,0 +1,10 @@ -+00 *H 00W *H H0D0= *H 0 -+*H  0o5Kx⹇fčS)*jB.~t%Se/> DSch3zlڬ*^TCM;=.eBjdAy2OSO4_X0j)`Uoq.S!uBQ=jУQD f5dP(˸7JJ5) ZQoa7\!H$nLd]($r1 c -+!9K=e44UNbķy:AMN1ׁ2kYUsD:az`8[  ôL wxoknc -+r0؆~5m Y)R,ISD}iR&S7 -+8P[vFqJFzV}(ftğ{jGeрǙ<߈Q/x_tLQEc~ݏAC)@;EԭJɧ*8od߈*ei..i}աނT=?8Y8~^f.dxdkAoL-؆Ϩ 00 *H !00 *H  -+00 -+*H  0:6 -+xl)_{N9}*bw{~JxΛp~L4&ZeP)ÜbWoY&TjoL ⊬F\2bht1h0# *H  16k[n7X&iqΨ0A *H  142sect193r1server-rsa1024ca010!0 +J٠ӈ?AĬg$E]̝8 -\ 文件尾没有换行符 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/ec/ReadPKCS12.java jdk11u-ls/test/jdk/sun/security/pkcs11/ec/ReadPKCS12.java ---- openjdk/test/jdk/sun/security/pkcs11/ec/ReadPKCS12.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/ec/ReadPKCS12.java 2023-09-12 13:54:31.097581723 +0800 -@@ -29,7 +29,7 @@ - * @library /test/lib .. - * @library ../../../../java/security/testlibrary - * @key randomness -- * @modules jdk.crypto.cryptoki jdk.crypto.ec/sun.security.ec -+ * @modules jdk.crypto.cryptoki - * @run main/othervm ReadPKCS12 - * @run main/othervm ReadPKCS12 sm policy - */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/ec/TestECDH.java jdk11u-ls/test/jdk/sun/security/pkcs11/ec/TestECDH.java ---- openjdk/test/jdk/sun/security/pkcs11/ec/TestECDH.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/ec/TestECDH.java 2023-09-12 13:54:31.097581723 +0800 -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2006, 2020, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2006, 2018, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it -@@ -124,12 +124,9 @@ - return; - } - -- if (getSupportedECParameterSpec("secp192r1", p).isPresent()) { -- test(p, pub192a, priv192a, pub192b, priv192b, secret192); -- } -- if (getSupportedECParameterSpec("sect163r1", p).isPresent()) { -- test(p, pub163a, priv163a, pub163b, priv163b, secret163); -- } -+ test(p, pub192a, priv192a, pub192b, priv192b, secret192); -+ test(p, pub163a, priv163a, pub163b, priv163b, secret163); -+ - if (getSupportedECParameterSpec("brainpoolP256r1", p).isPresent()) { - test(p, pubBrainpoolP256r1a, privBrainpoolP256r1a, pubBrainpoolP256r1b, privBrainpoolP256r1b, secretBrainpoolP256r1); - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/ec/TestECDSA.java jdk11u-ls/test/jdk/sun/security/pkcs11/ec/TestECDSA.java ---- openjdk/test/jdk/sun/security/pkcs11/ec/TestECDSA.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/ec/TestECDSA.java 2023-09-12 13:54:31.097581723 +0800 -@@ -156,14 +156,12 @@ - return; - } - -- if (getSupportedECParameterSpec("secp192r1", provider).isPresent()) { -+ if (getNSSECC() != ECCState.Basic) { - test(provider, pub192, priv192, sig192); -- } -- if (getSupportedECParameterSpec("sect163r1", provider).isPresent()) { - test(provider, pub163, priv163, sig163); -- } -- if (getSupportedECParameterSpec("sect571r1", provider).isPresent()) { - test(provider, pub571, priv571, sig571); -+ } else { -+ System.out.println("ECC Basic only, skipping 192, 163 and 571."); - } - test(provider, pub521, priv521, sig521); - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/ec/TestKeyFactory.java jdk11u-ls/test/jdk/sun/security/pkcs11/ec/TestKeyFactory.java ---- openjdk/test/jdk/sun/security/pkcs11/ec/TestKeyFactory.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/ec/TestKeyFactory.java 2023-09-12 13:54:31.097581723 +0800 -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2006, 2020, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2006, 2018, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it -@@ -130,12 +130,17 @@ - System.out.println("Provider does not support EC, skipping"); - return; - } -- int[] keyLengths = {256, 521}; -+ int[] keyLengths = {192, 163, 409, 521}; -+ int len = 0; -+ if (getNSSECC() == ECCState.Basic) { -+ System.out.println("NSS Basic ECC only. Skipping 192, 163, & 409"); -+ len = 3; -+ } - KeyFactory kf = KeyFactory.getInstance("EC", p); -- for (int len : keyLengths) { -- System.out.println("Length " + len); -+ for (; keyLengths.length > len ; len++) { -+ System.out.println("Length "+keyLengths[len]); - KeyPairGenerator kpg = KeyPairGenerator.getInstance("EC", p); -- kpg.initialize(len); -+ kpg.initialize(keyLengths[len]); - KeyPair kp = kpg.generateKeyPair(); - test(kf, kp.getPrivate()); - test(kf, kp.getPublic()); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/PKCS11Test.java jdk11u-ls/test/jdk/sun/security/pkcs11/PKCS11Test.java ---- openjdk/test/jdk/sun/security/pkcs11/PKCS11Test.java 2022-10-12 23:00:06.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/PKCS11Test.java 2023-11-01 09:34:26.881946806 +0800 -@@ -21,6 +21,12 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - // common infrastructure for SunPKCS11 tests - - import java.io.BufferedReader; -@@ -732,6 +738,9 @@ - "/usr/lib64/" }); - osMap.put("Linux-ppc64-64", new String[] { "/usr/lib64/" }); - osMap.put("Linux-ppc64le-64", new String[] { "/usr/lib64/" }); -+ osMap.put("Linux-mips64el-64", new String[]{"/usr/lib64/"}); -+ osMap.put("Linux-loongarch64-64", new String[]{"/usr/lib/loongarch64-linux-gnu/", -+ "/usr/lib64/" }); - osMap.put("Linux-s390x-64", new String[] { "/usr/lib64/" }); - osMap.put("Windows-x86-32", new String[] {}); - osMap.put("Windows-amd64-64", new String[] {}); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java jdk11u-ls/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java ---- openjdk/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java 2023-09-12 13:54:31.105581733 +0800 -@@ -34,9 +34,9 @@ - * @library /test/lib .. ../../../../javax/net/ssl/TLSCommon - * @library ../../../../java/security/testlibrary - * @modules jdk.crypto.cryptoki -- * @run main/othervm -Djdk.tls.namedGroups="secp256r1" -+ * @run main/othervm -Djdk.tls.namedGroups="secp256r1,sect193r1" - * ClientJSSEServerJSSE -- * @run main/othervm -Djdk.tls.namedGroups="secp256r1" -+ * @run main/othervm -Djdk.tls.namedGroups="secp256r1,sect193r1" - * ClientJSSEServerJSSE sm policy - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/sslecc/keystore jdk11u-ls/test/jdk/sun/security/pkcs11/sslecc/keystore ---- openjdk/test/jdk/sun/security/pkcs11/sslecc/keystore 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/pkcs11/sslecc/keystore 2023-09-12 13:54:31.105581733 +0800 -@@ -1,4 +1,4 @@ --vajraԐr00 -+vajraԐr00 - +*oxF?ұ" - bi;=A5WHi1GBYt}u/`gX[:}kū?\gX< m}܁ sܡ݋]`qH:0=Rpեpm)W 9N{$(R# o"'g7"R}&c5kVJxXS?Mr? - 2jz0'2A#WS'2ָ)g7e1 3XٻUi$T.[1(jcXtvQisohjl/=T1I:SM5X/1uO4/h!U4w'gVc6]Q?9Z#DI KSXjxXӟSԩ?/UF0KEM^rJÙL6UĴH"bwڤ;oc๋XTלNܩ5+^GN|f@G7Y1-(!3W>+дm)\sf}92zY!Ed2糵JKx:Δ岶B2ټ*0xX8Cygvajradsaԑ3'00 -+ boWo;>*0xX8Cygsect193r1server-rsa1024ca G=Et0r0 -++*` phjj/L_wm1a%]XAù1S 3zZ܁ Fߛ~p[qZռQ#vT@}JF 캝 -\ 文件尾没有换行符 -+Sun Microsystems, Inc.10U  Java Software10Uvajra.eng.sun.com00,*H80Su)RJ.RqZȄ$ 'u)7a -\ 文件尾没有换行符 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/provider/KeyStore/DKSTest.java jdk11u-ls/test/jdk/sun/security/provider/KeyStore/DKSTest.java ---- openjdk/test/jdk/sun/security/provider/KeyStore/DKSTest.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/provider/KeyStore/DKSTest.java 2023-09-12 13:54:31.113581744 +0800 -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2013, 2020, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2013, 2015, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it -@@ -52,6 +52,8 @@ - new KeyStore.PasswordProtection("test12".toCharArray())); - put("eckeystore1", - new KeyStore.PasswordProtection("password".toCharArray())); -+ put("eckeystore2", -+ new KeyStore.PasswordProtection("password".toCharArray())); - put("truststore", - new KeyStore.PasswordProtection("changeit".toCharArray())); - put("empty", -@@ -67,6 +69,8 @@ - new KeyStore.PasswordProtection("wrong".toCharArray())); - put("eckeystore1", - new KeyStore.PasswordProtection("wrong".toCharArray())); -+ put("eckeystore2", -+ new KeyStore.PasswordProtection("wrong".toCharArray())); - }}; - - public static void main(String[] args) throws Exception { -@@ -150,7 +154,7 @@ - * domain keystore: keystores - */ - config = new URI(CONFIG + "#keystores"); -- expected = 2 + 1 + 1; -+ expected = 2 + 1 + 1 + 1; - keystore = KeyStore.getInstance("DKS"); - // load entries - keystore.load(new DomainLoadStoreParameter(config, PASSWORDS)); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/provider/KeyStore/domains.cfg jdk11u-ls/test/jdk/sun/security/provider/KeyStore/domains.cfg ---- openjdk/test/jdk/sun/security/provider/KeyStore/domains.cfg 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/provider/KeyStore/domains.cfg 2023-09-12 13:54:31.113581744 +0800 -@@ -25,6 +25,8 @@ - keystoreType="CaseExactJKS" - keystoreURI="${test.src}/pw.jks"; - keystore eckeystore1 -+ keystoreURI="${test.src}/../../pkcs11/ec/pkcs12/sect193r1server-rsa1024ca.p12"; -+ keystore eckeystore2 - keystoreURI="${test.src}/../../pkcs11/ec/pkcs12/secp256r1server-secp384r1ca.p12"; - }; - -@@ -38,6 +40,8 @@ - keystoreType="CaseExactJKS" - keystoreURI="${user.dir}/pw.jks_tmp"; - keystore eckeystore1 -+ keystoreURI="${user.dir}/sect193r1server-rsa1024ca.p12_tmp"; -+ keystore eckeystore2 - keystoreURI="${user.dir}/secp256r1server-secp384r1ca.p12_tmp"; - }; - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/ssl/CipherSuite/DisabledCurve.java jdk11u-ls/test/jdk/sun/security/ssl/CipherSuite/DisabledCurve.java ---- openjdk/test/jdk/sun/security/ssl/CipherSuite/DisabledCurve.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/ssl/CipherSuite/DisabledCurve.java 2023-09-12 13:54:31.145581784 +0800 -@@ -25,10 +25,10 @@ - * @test - * @bug 8246330 - * @library /javax/net/ssl/templates /test/lib -- * @run main/othervm -Djdk.tls.namedGroups="secp384r1" -+ * @run main/othervm -Djdk.tls.namedGroups="sect283r1" - DisabledCurve DISABLE_NONE PASS -- * @run main/othervm -Djdk.tls.namedGroups="secp384r1" -- DisabledCurve secp384r1 FAIL -+ * @run main/othervm -Djdk.tls.namedGroups="sect283r1" -+ DisabledCurve sect283r1 FAIL - */ - import java.security.Security; - import java.util.Arrays; -@@ -51,18 +51,18 @@ - protected SSLContext createClientSSLContext() throws Exception { - return createSSLContext( - new SSLSocketTemplate.Cert[] { -- SSLSocketTemplate.Cert.CA_ECDSA_SECP384R1 }, -+ SSLSocketTemplate.Cert.CA_ECDSA_SECT283R1 }, - new SSLSocketTemplate.Cert[] { -- SSLSocketTemplate.Cert.EE_ECDSA_SECP384R1 }, -+ SSLSocketTemplate.Cert.EE_ECDSA_SECT283R1 }, - getClientContextParameters()); - } - - protected SSLContext createServerSSLContext() throws Exception { - return createSSLContext( - new SSLSocketTemplate.Cert[] { -- SSLSocketTemplate.Cert.CA_ECDSA_SECP384R1 }, -+ SSLSocketTemplate.Cert.CA_ECDSA_SECT283R1 }, - new SSLSocketTemplate.Cert[] { -- SSLSocketTemplate.Cert.EE_ECDSA_SECP384R1 }, -+ SSLSocketTemplate.Cert.EE_ECDSA_SECT283R1 }, - getServerContextParameters()); - } - -@@ -91,13 +91,10 @@ - public static void main(String[] args) throws Exception { - String expected = args[1]; - String disabledName = ("DISABLE_NONE".equals(args[0]) ? "" : args[0]); -- boolean disabled = false; - if (disabledName.equals("")) { - Security.setProperty("jdk.disabled.namedCurves", ""); -- } else { -- disabled = true; -- Security.setProperty("jdk.certpath.disabledAlgorithms", "secp384r1"); - } -+ System.setProperty("jdk.sunec.disableNative", "false"); - - // Re-enable TLSv1 and TLSv1.1 since test depends on it. - SecurityUtils.removeFromDisabledTlsAlgs("TLSv1", "TLSv1.1"); -@@ -107,10 +104,12 @@ - (new DisabledCurve()).run(); - if (expected.equals("FAIL")) { - throw new RuntimeException( -- "Expected test to fail, but it passed"); -+ "The test case should not reach here"); - } - } catch (SSLException | IllegalStateException ssle) { -- if (expected.equals("FAIL") && disabled) { -+ if ((expected.equals("FAIL")) -+ && Security.getProperty("jdk.disabled.namedCurves") -+ .contains(disabledName)) { - System.out.println( - "Expected exception was thrown: TEST PASSED"); - } else { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/tools/jarsigner/RestrictedAlgo.java jdk11u-ls/test/jdk/sun/security/tools/jarsigner/RestrictedAlgo.java ---- openjdk/test/jdk/sun/security/tools/jarsigner/RestrictedAlgo.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/tools/jarsigner/RestrictedAlgo.java 2023-09-12 13:54:31.185581834 +0800 -@@ -93,6 +93,11 @@ - System.out.println("\nTesting DSA Keysize: DSA keySize < 1024\n"); - test("DSA", "SHA256withDSA", "KeySizeDSA", "SHA-256", true, - "-keysize", "512"); -+ -+ System.out.println("\nTesting Native Curve:" -+ + " include jdk.disabled.namedCurves\n"); -+ test("EC", "SHA256withECDSA", "curve", "SHA-256", true, -+ "-groupname", "secp112r1"); - } - - private static void test(String keyAlg, String sigAlg, String aliasPrefix, -@@ -118,7 +123,8 @@ - "-ext", "bc:c", - "-keyalg", keyAlg, - "-sigalg", sigAlg, -- "-alias", alias); -+ "-alias", alias, -+ "-J-Djdk.sunec.disableNative=false"); - for (String additionalCMDArg : additionalCmdArgs) { - cmd.add(additionalCMDArg); - } -@@ -141,7 +147,8 @@ - "-digestalg", digestAlg, - "-signedjar", SIGNED_JARFILE, - UNSIGNED_JARFILE, -- alias); -+ alias, -+ "-J-Djdk.sunec.disableNative=false"); - - OutputAnalyzer analyzer = SecurityTools.jarsigner(cmd) - .shouldHaveExitValue(0); -@@ -155,7 +162,8 @@ - System.out.println("\nTesting JarSigner Verification\n"); - List cmd = prepareCommand( - "-verify", -- SIGNED_JARFILE); -+ SIGNED_JARFILE, -+ "-J-Djdk.sunec.disableNative=false"); - - OutputAnalyzer analyzer = SecurityTools.jarsigner(cmd) - .shouldHaveExitValue(0); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/tools/keytool/fakegen/DefaultSignatureAlgorithm.java jdk11u-ls/test/jdk/sun/security/tools/keytool/fakegen/DefaultSignatureAlgorithm.java ---- openjdk/test/jdk/sun/security/tools/keytool/fakegen/DefaultSignatureAlgorithm.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/tools/keytool/fakegen/DefaultSignatureAlgorithm.java 2023-09-12 13:54:31.197581849 +0800 -@@ -60,9 +60,11 @@ - check("DSA", 1024, null, "SHA256withDSA"); - check("DSA", 3072, null, "SHA256withDSA"); - -+ check("EC", 192, null, "SHA256withECDSA"); - check("EC", 384, null, "SHA384withECDSA"); -+ check("EC", 571, null, "SHA512withECDSA"); - -- check("EC", 384, "SHA256withECDSA", "SHA256withECDSA"); -+ check("EC", 571, "SHA256withECDSA", "SHA256withECDSA"); - } - - private static void check(String keyAlg, int keySize, -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/tools/keytool/fakegen/jdk.crypto.ec/sun/security/ec/ECKeyPairGenerator.java jdk11u-ls/test/jdk/sun/security/tools/keytool/fakegen/jdk.crypto.ec/sun/security/ec/ECKeyPairGenerator.java ---- openjdk/test/jdk/sun/security/tools/keytool/fakegen/jdk.crypto.ec/sun/security/ec/ECKeyPairGenerator.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/tools/keytool/fakegen/jdk.crypto.ec/sun/security/ec/ECKeyPairGenerator.java 2023-09-12 13:54:31.197581849 +0800 -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2019, 2020, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2019, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it -@@ -58,6 +58,14 @@ - public KeyPair generateKeyPair() { - BigInteger s, x, y; - switch (keySize) { -+ case 192: -+ s = new BigInteger("144089953963995451666433763881605261867377" -+ + "0287449914970417"); -+ x = new BigInteger("527580219290493448707803038403444129676461" -+ + "560927008883862"); -+ y = new BigInteger("171489247081620145247240656640887886126295" -+ + "376102134763235"); -+ break; - case 384: - s = new BigInteger("230878276322370828604837367594276033697165" - + "328633328282930557390817326627704675451851870430805" -@@ -69,10 +77,22 @@ - + "792287657810480793861620950159864617021540168828129" - + "97920015041145259782242"); - break; -+ case 571: -+ s = new BigInteger("102950007413729156017516513076331886543538" -+ + "947044937190140406420556321983301533699021909556189" -+ + "150601557539520495361099574425100081169640300555562" -+ + "4280643194744140660275077121"); -+ x = new BigInteger("640598847385582251482893323029655037929442" -+ + "593800810090252942944624854811134311418807076811195" -+ + "132373308708007447666896675761104237802118413642543" -+ + "8277858107132017492037336593"); -+ y = new BigInteger("254271270803422773271985083014247202480077" -+ + "131823713050110789460550383275777195766342550786766" -+ + "080401402424961690914429074822281551140068729472439" -+ + "477216613432839953714415981"); -+ break; - default: -- throw new AssertionError("SunEC ECKeyPairGenerator" + -- "has been patched. Key size " + keySize + -- " is not supported"); -+ throw new AssertionError("Unsupported keysize " + keySize); - } - ECParameterSpec ecParams = ECUtil.getECParameterSpec(null, keySize); - try { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/tools/keytool/GroupName.java jdk11u-ls/test/jdk/sun/security/tools/keytool/GroupName.java ---- openjdk/test/jdk/sun/security/tools/keytool/GroupName.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/jdk/sun/security/tools/keytool/GroupName.java 2023-09-12 13:54:31.193581844 +0800 -@@ -65,9 +65,10 @@ - .shouldNotContain("Specifying -keysize for generating EC keys is deprecated"); - checkCurveName("e", "secp256r1"); - -- kt("-list -v") -+ gen("f", "-keyalg EC -groupname brainpoolP256r1") - .shouldHaveExitValue(0) -- .shouldContain("Subject Public Key Algorithm: 256-bit EC (secp256r1) key"); -+ .shouldNotContain("Specifying -keysize for generating EC keys is deprecated"); -+ checkCurveName("f", "brainpoolP256r1"); - } - - private static void checkCurveName(String a, String name) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/langtools/ProblemList.txt jdk11u-ls/test/langtools/ProblemList.txt ---- openjdk/test/langtools/ProblemList.txt 2022-10-12 23:00:06.000000000 +0800 -+++ jdk11u-ls/test/langtools/ProblemList.txt 2023-09-12 13:54:31.321582005 +0800 -@@ -21,6 +21,12 @@ - # or visit www.oracle.com if you need additional information or have any - # questions. - # -+ -+# -+# This file has been modified by Loongson Technology in 2021. These -+# modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# - ########################################################################### - - ########################################################################### -@@ -78,3 +84,4 @@ - # - # jdeps - -+# loongson added -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/langtools/ProblemList-Xcomp.txt jdk11u-ls/test/langtools/ProblemList-Xcomp.txt ---- openjdk/test/langtools/ProblemList-Xcomp.txt 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/langtools/ProblemList-Xcomp.txt 2023-09-12 13:54:31.321582005 +0800 -@@ -0,0 +1,35 @@ -+# -+# Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. -+# Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. -+# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+# -+# This code is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License version 2 only, as -+# published by the Free Software Foundation. -+# -+# This code is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+# version 2 for more details (a copy is included in the LICENSE file that -+# accompanied this code). -+# -+# You should have received a copy of the GNU General Public License version -+# 2 along with this work; if not, write to the Free Software Foundation, -+# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+# -+# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+# or visit www.oracle.com if you need additional information or have any -+# questions. -+# -+ -+############################################################################# -+# loongson added -+jdk/jshell/FailOverExecutionControlTest.java generic-mips64el -+jdk/jshell/JdiBadOptionLaunchExecutionControlTest.java generic-mips64el -+jdk/jshell/JdiFailingLaunchExecutionControlTest.java generic-mips64el -+jdk/jshell/JdiFailingListenExecutionControlTest.java generic-mips64el -+jdk/jshell/JdiHangingLaunchExecutionControlTest.java generic-mips64el,generic-loongarch64 -+tools/javac/completionDeps/DepsAndAnno.java #error generic-mips64el -+tools/javac/Paths/Class-Path.sh #error generic-mips64el -+tools/javac/Paths/Diagnostics.sh #error generic-mips64el -+tools/javac/Paths/wcMineField.sh #error generic-mips64el -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java jdk11u-ls/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java ---- openjdk/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java 2023-09-12 13:54:31.901582734 +0800 +diff --git a/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java b/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java +new file mode 100644 +index 000000000..426b0db85 +--- /dev/null ++++ b/test/langtools/tools/javadoc/api/basic/taglets/UnderlineTaglet.java @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -122357,9 +116998,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/langtools/tools/javad + } +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/lib/jdk/test/lib/Platform.java jdk11u-ls/test/lib/jdk/test/lib/Platform.java ---- openjdk/test/lib/jdk/test/lib/Platform.java 2022-10-12 23:00:07.000000000 +0800 -+++ jdk11u-ls/test/lib/jdk/test/lib/Platform.java 2023-11-01 09:34:27.001946939 +0800 +diff --git a/test/lib/jdk/test/lib/Platform.java b/test/lib/jdk/test/lib/Platform.java +index 6269373c2..440ec4664 100644 +--- a/test/lib/jdk/test/lib/Platform.java ++++ b/test/lib/jdk/test/lib/Platform.java @@ -21,6 +21,12 @@ * questions. */ @@ -122372,8 +117014,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/lib/jdk/test/lib/Plat + package jdk.test.lib; - import java.io.FileNotFoundException; -@@ -225,6 +231,14 @@ + import java.io.BufferedReader; +@@ -229,6 +235,14 @@ public class Platform { return isArch("(i386)|(x86(?!_64))"); } @@ -122388,9 +117030,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/lib/jdk/test/lib/Plat public static String getOsArch() { return osArch; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java jdk11u-ls/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java ---- openjdk/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java 2023-09-12 13:54:31.981582834 +0800 +diff --git a/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java b/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java +new file mode 100644 +index 000000000..81fd956a4 +--- /dev/null ++++ b/test/micro/org/openjdk/bench/java/lang/RotateBenchmark.java @@ -0,0 +1,87 @@ +// +// Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. @@ -122479,80 +117123,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/micro/org/openjdk/ben + } + +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/micro/org/openjdk/bench/loongarch/C2Memory.java jdk11u-ls/test/micro/org/openjdk/bench/loongarch/C2Memory.java ---- openjdk/test/micro/org/openjdk/bench/loongarch/C2Memory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/micro/org/openjdk/bench/loongarch/C2Memory.java 2023-09-12 13:54:32.005582864 +0800 -@@ -0,0 +1,67 @@ -+/* -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+package org.openjdk.bench.loongarch; -+ -+import org.openjdk.jmh.annotations.Benchmark; -+ -+public class C2Memory { -+ public static int sum; -+ public static int array1[] = new int[0x8000]; -+ public static int array2[] = new int[0x8000]; -+ -+ @Benchmark -+ public void testMethod() { -+ for (int i = 0; i<10000;i++) { -+ sum = array1[0x7fff] + array2[0x1f0]; -+ array1[0x7fff] += array2[0x1f0]; -+ } -+ } -+ -+ @Benchmark -+ public void testBasePosIndexOffset() { -+ int xstart = 30000; -+ long carry = 63; -+ -+ for (int j=xstart; j >= 0; j--) { -+ array2[j] = array1[xstart]; -+ } -+ -+ array2[xstart] = (int)carry; -+ } -+ -+ public static byte b_array1[] = new byte[0x8000]; -+ public static byte b_array2[] = new byte[0x8000]; -+ -+ @Benchmark -+ public void testBaseIndexOffset() { -+ int xstart = 10000; -+ byte carry = 63; -+ -+ for (int j=xstart; j >= 0; j--) { -+ b_array2[j] = b_array1[xstart]; -+ } -+ -+ b_array2[xstart] = carry; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java jdk11u-ls/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java ---- openjdk/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk11u-ls/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java 2023-09-12 13:54:32.009582869 +0800 +diff --git a/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java b/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java +new file mode 100644 +index 000000000..58400cadf +--- /dev/null ++++ b/test/micro/org/openjdk/bench/vm/compiler/MacroLogicOpt.java @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. diff --git a/rh1750419-redhat_alt_java.patch b/rh1750419-redhat_alt_java.patch index e6355f2..37d600a 100644 --- a/rh1750419-redhat_alt_java.patch +++ b/rh1750419-redhat_alt_java.patch @@ -1,7 +1,8 @@ -diff -r 1356affa5e44 make/launcher/Launcher-java.base.gmk ---- openjdk/make/launcher/Launcher-java.base.gmk Wed Nov 25 08:27:15 2020 +0100 -+++ openjdk/make/launcher/Launcher-java.base.gmk Tue Dec 01 12:29:30 2020 +0100 -@@ -41,6 +41,16 @@ +diff --git openjdk.orig/make/launcher/Launcher-java.base.gmk openjdk/make/launcher/Launcher-java.base.gmk +index a8990dd0ef..320fec6e51 100644 +--- openjdk.orig/make/launcher/Launcher-java.base.gmk ++++ openjdk/make/launcher/Launcher-java.base.gmk +@@ -41,6 +41,16 @@ $(eval $(call SetupBuildLauncher, java, \ OPTIMIZATION := HIGH, \ )) @@ -15,13 +16,14 @@ diff -r 1356affa5e44 make/launcher/Launcher-java.base.gmk + OPTIMIZATION := HIGH, \ +)) + - ifeq ($(OPENJDK_TARGET_OS), windows) + ifeq ($(call isTargetOs, windows), true) $(eval $(call SetupBuildLauncher, javaw, \ CFLAGS := -DJAVAW -DEXPAND_CLASSPATH_WILDCARDS -DENABLE_ARG_FILES, \ - -diff -r 25e94aa812b2 src/share/bin/alt_main.h ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ openjdk/src/java.base/share/native/launcher/alt_main.h Tue Jun 02 17:15:28 2020 +0100 +diff --git openjdk.orig/src/java.base/share/native/launcher/alt_main.h openjdk/src/java.base/share/native/launcher/alt_main.h +new file mode 100644 +index 0000000000..697df2898a +--- /dev/null ++++ openjdk/src/java.base/share/native/launcher/alt_main.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2019, Red Hat, Inc. All rights reserved. @@ -96,9 +98,10 @@ diff -r 25e94aa812b2 src/share/bin/alt_main.h +} + +#endif // REDHAT_ALT_JAVA -diff -r 25e94aa812b2 src/share/bin/main.c ---- openjdk/src/java.base/share/native/launcher/main.c Wed Feb 05 12:20:36 2020 -0300 -+++ openjdk/src/java.base/share/native/launcher/main.c Tue Jun 02 17:15:28 2020 +0100 +diff --git openjdk.orig/src/java.base/share/native/launcher/main.c openjdk/src/java.base/share/native/launcher/main.c +index b734fe2ba7..79dc830765 100644 +--- openjdk.orig/src/java.base/share/native/launcher/main.c ++++ openjdk/src/java.base/share/native/launcher/main.c @@ -34,6 +34,14 @@ #include "jli_util.h" #include "jni.h" -- Gitee