From 31560fb6430b9b642ecf677b2b8a52be58045f6b Mon Sep 17 00:00:00 2001 From: mgb01105731 Date: Wed, 4 Jun 2025 05:46:17 -0400 Subject: [PATCH] [Feature] Add support for phytium host-model and s5000c model To #N/A Add support for phytium host-model and s5000c model Project: TC2024080204 Signed-off-by: wh02252983 wh02252983@alibaba-inc.com --- ...phytium-live-migrate-and-s5000c-mode.patch | 130 ++++++++++++++++++ libvirt.spec | 6 +- 2 files changed, 135 insertions(+), 1 deletion(-) create mode 100644 0015-Add-support-for-phytium-live-migrate-and-s5000c-mode.patch diff --git a/0015-Add-support-for-phytium-live-migrate-and-s5000c-mode.patch b/0015-Add-support-for-phytium-live-migrate-and-s5000c-mode.patch new file mode 100644 index 0000000..100a481 --- /dev/null +++ b/0015-Add-support-for-phytium-live-migrate-and-s5000c-mode.patch @@ -0,0 +1,130 @@ +diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c +index 324c701..c160552 100644 +--- a/src/cpu/cpu_arm.c ++++ b/src/cpu/cpu_arm.c +@@ -661,6 +661,7 @@ virCPUarmDecode(virCPUDef *cpu, + + if (cpuData->features) { + cpu->nfeatures = g_strv_length(cpuData->features); ++ cpu->nfeatures_max = cpu->nfeatures; + cpu->features = g_new0(virCPUFeatureDef, cpu->nfeatures); + + for (i = 0; i < cpu->nfeatures; i++) { +diff --git a/src/cpu_map/arm_Tengyun-S5000C.xml b/src/cpu_map/arm_Tengyun-S5000C.xml +new file mode 100644 +index 0000000..f8fa593 +--- /dev/null ++++ b/src/cpu_map/arm_Tengyun-S5000C.xml +@@ -0,0 +1,6 @@ ++ ++ ++ ++ ++ ++ +diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml +index fed5fe3..ba2f72c 100644 +--- a/src/cpu_map/index.xml ++++ b/src/cpu_map/index.xml +@@ -119,6 +119,7 @@ + + + ++ + + + +diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build +index 98d74bc..949c3e4 100644 +--- a/src/cpu_map/meson.build ++++ b/src/cpu_map/meson.build +@@ -11,6 +11,7 @@ cpumap_data = [ + 'arm_Neoverse-N2.xml', + 'arm_Neoverse-V1.xml', + 'arm_Tengyun-S2500.xml', ++ 'arm_Tengyun-S5000C.xml', + 'arm_ThunderX299xx.xml', + 'arm_vendors.xml', + 'index.xml', +diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c +index cf6416f..cc11f9b 100644 +--- a/src/qemu/qemu_capabilities.c ++++ b/src/qemu/qemu_capabilities.c +@@ -3729,6 +3729,62 @@ virQEMUCapsInitCPUModelX86(virQEMUCaps *qemuCaps, + return 0; + } + ++/** ++ * Returns 0 when host CPU model provided by QEMU was filled in qemuCaps, ++ * 1 when the caller should fall back to using virCaps *->host.cpu, ++ * 2 when cpu model info is not supported for this configuration, ++ * -1 on error. ++ */ ++static int ++virQEMUCapsInitCPUModelARM(virQEMUCaps *qemuCaps, ++ virDomainVirtType type, ++ qemuMonitorCPUModelInfo *modelInfo, ++ virCPUDef *cpu, ++ bool migratable) ++{ ++ size_t i; ++ g_autoptr(virCPUDef) hostCPU = NULL; ++ ++ if (!modelInfo) { ++ if (type == VIR_DOMAIN_VIRT_KVM) { ++ virReportError(VIR_ERR_INTERNAL_ERROR, ++ _("missing host CPU model info from QEMU " ++ "capabilities for binary %s"), ++ qemuCaps->binary); ++ return -1; ++ } ++ return 2; ++ } ++ ++ if (!(hostCPU = virQEMUCapsProbeHostCPU(qemuCaps->arch, NULL))) ++ return -1; ++ ++ cpu->model = g_strdup(hostCPU->model); ++ cpu->features = g_new0(virCPUFeatureDef, modelInfo->nprops); ++ ++ cpu->nfeatures_max = modelInfo->nprops; ++ cpu->nfeatures = 0; ++ ++ for (i = 0; i < modelInfo->nprops; i++) { ++ virCPUFeatureDef *feature = cpu->features + cpu->nfeatures; ++ qemuMonitorCPUProperty *prop = modelInfo->props + i; ++ const char *name = virQEMUCapsCPUFeatureFromQEMU(qemuCaps->arch, prop->name); ++ ++ if (prop->type != QEMU_MONITOR_CPU_PROPERTY_BOOLEAN) ++ continue; ++ ++ feature->name = g_strdup(name); ++ ++ if (!prop->value.boolean || ++ (migratable && prop->migratable == VIR_TRISTATE_BOOL_NO)) ++ feature->policy = VIR_CPU_FEATURE_DISABLE; ++ else ++ feature->policy = VIR_CPU_FEATURE_REQUIRE; ++ cpu->nfeatures++; ++ } ++ ++ return 0; ++} + + /** + * Returns 0 when host CPU model provided by QEMU was filled in qemuCaps, +@@ -3754,7 +3810,10 @@ virQEMUCapsInitCPUModel(virQEMUCaps *qemuCaps, + } else if (ARCH_IS_X86(qemuCaps->arch)) { + ret = virQEMUCapsInitCPUModelX86(qemuCaps, type, modelInfo, + cpu, migratable); +- } else if (ARCH_IS_ARM(qemuCaps->arch) || ARCH_IS_LOONGARCH(qemuCaps->arch)) { ++ } else if (ARCH_IS_ARM(qemuCaps->arch)) { ++ ret = virQEMUCapsInitCPUModelARM(qemuCaps, type, modelInfo, ++ cpu, migratable); ++ } else if (ARCH_IS_LOONGARCH(qemuCaps->arch)) { + ret = 2; + } + +-- +2.41.0 + diff --git a/libvirt.spec b/libvirt.spec index cfb5a90..d461c11 100644 --- a/libvirt.spec +++ b/libvirt.spec @@ -1,4 +1,4 @@ -%define anolis_release 12 +%define anolis_release 13 %define arches_qemu_kvm x86_64 aarch64 loongarch64 sw_64 riscv64 @@ -178,6 +178,7 @@ Patch0012: Add-sw64-architecture-support-for-libvirt-9.10.0.patch Patch0013: 0013-conf-qemu-Fix-some-code-about-Reuse-ASID-for-Hygon-C.patch # Support provide blobs for secret injection for Hygon Confidential VMs Patch0014: 0014-conf-qemu-support-provide-inject-secret-for-Hygon-CS.patch +Patch0015: 0015-Add-support-for-phytium-live-migrate-and-s5000c-mode.patch Requires: libvirt-daemon = %{version}-%{release} Requires: libvirt-daemon-config-network = %{version}-%{release} @@ -2158,6 +2159,9 @@ exit 0 %changelog +* Tue Jun 3 2025 wh02252983 - 9.10.0-13 +- Add support for phytium host-model and s5000c model + * Wed May 7 2025 Yihao Yan - 9.10.0-12 - add support for riscv64 -- Gitee