diff --git a/1000-add-amd-CPU-for-qat_sw.patch b/1000-add-amd-CPU-for-qat_sw.patch
new file mode 100644
index 0000000000000000000000000000000000000000..d3673cc271fb1aae4fc296787ba9cb7326e859ec
--- /dev/null
+++ b/1000-add-amd-CPU-for-qat_sw.patch
@@ -0,0 +1,53 @@
+From 1b61883226e2dafe7e95ba8ce2b467509ecb8dae Mon Sep 17 00:00:00 2001
+From: Guanjun <guanjun@linux.alibaba.com>
+Date: Fri, 17 May 2024 11:32:11 +0800
+Subject: [PATCH 1/1] add amd CPU for qat_sw
+
+Signed-off-by: Guanjun <guanjun@linux.alibaba.com>
+---
+ e_qat.c   | 7 +++++--
+ qat_evp.c | 2 +-
+ 2 files changed, 6 insertions(+), 3 deletions(-)
+
+diff --git a/e_qat.c b/e_qat.c
+index 3e74468..373f3c9 100644
+--- a/e_qat.c
++++ b/e_qat.c
+@@ -143,6 +143,9 @@
+ # define Genu 0x756e6547
+ # define ineI 0x49656e69
+ # define ntel 0x6c65746e
++# define Auth 0x68747541
++# define enti 0x69746e65
++# define cAMD 0x444d4163
+ # define VAES_BIT 9
+ # define VPCLMULQDQ_BIT 10
+ # define AVX512F_BIT 16
+@@ -518,9 +521,9 @@ int qat_sw_cpu_support(void)
+     ecx = &info[2];
+     edx = &info[3];
+ 
+-    /* Is this an Intel CPU? */
++    /* Is this an Intel or AMD CPU? */
+     __cpuid(info, 0x00, 0);
+-    if (*ebx != Genu || *ecx != ntel || *edx != ineI)
++    if (!(*ebx == Genu && *ecx == ntel && *edx == ineI) && !(*ebx == Auth || *ecx == cAMD || *edx == enti))
+         return 0;
+ 
+     __cpuid(info, 0x07, 0);
+diff --git a/qat_evp.c b/qat_evp.c
+index 2d6f05a..ca95fe1 100644
+--- a/qat_evp.c
++++ b/qat_evp.c
+@@ -755,7 +755,7 @@ const EVP_CIPHER *qat_create_gcm_cipher_meth(int nid, int keylen)
+ 
+ #ifdef ENABLE_QAT_SW_GCM
+     if (qat_sw_offload && (qat_sw_algo_enable_mask & ALGO_ENABLE_MASK_AES_GCM)) {
+-        res &= EVP_CIPHER_meth_set_iv_length(c, GCM_IV_DATA_LEN);
++        res &= EVP_CIPHER_meth_set_iv_length(c, IMB_GCM_IV_DATA_LEN);
+         res &= EVP_CIPHER_meth_set_flags(c, VAESGCM_FLAG);
+ #ifndef QAT_OPENSSL_PROVIDER
+         res &= EVP_CIPHER_meth_set_init(c, vaesgcm_ciphers_init);
+-- 
+2.39.3
+
diff --git a/qatengine.spec b/qatengine.spec
index f2b620a7b2d596c35a2eed6b82061fde1bc4a1ae..03809b754c5aa5f5f0ddf6e6c2d59f6c59150ae1 100644
--- a/qatengine.spec
+++ b/qatengine.spec
@@ -1,4 +1,4 @@
-%define anolis_release 1
+%define anolis_release 2
 %global enginesdir %(pkg-config --variable=enginesdir libcrypto)
 %global githubname QAT_Engine
 
@@ -9,6 +9,7 @@ Summary:        Intel® QuickAssist Technology OpenSSL* Engine(QAT_Engine)
 License:        BSD and OpenSSL
 URL:            https://github.com/intel/%{githubname}
 Source0:        https://github.com/intel/%{githubname}/archive/v%{version}/v%{version}.tar.gz
+Patch1000:      1000-add-amd-CPU-for-qat_sw.patch
 
 BuildRequires:  gcc make pkg-config autoconf automake libtool openssl-devel
 BuildRequires:  intel-ipp-crypto-mb-devel intel-ipsec-mb-devel intel-QAT20-devel udma-devel
@@ -53,6 +54,9 @@ rm -rf %{buildroot}/%{_libdir}/engines-1.1/qatengine.la
 %doc README.md docs*
 
 %changelog
+* Wed May 22 2024 Guanjun <guanjun@linux.alibaba.com> - 1.2.0-2
+- Add amd CPU for qat_sw
+
 * Wed Aug 16 2023 Guanjun <guanjun@linux.alibaba.com> - 1.2.0-1
 - Add build requires intel-QAT20-devel
 - enable qat_hw and qat_sw