diff --git a/LOONGARCH-Fix-link-binary-fail.patch b/LOONGARCH-Fix-link-binary-fail.patch deleted file mode 100644 index f20147128e8a45f3ba2c8944e797cf51d4631139..0000000000000000000000000000000000000000 --- a/LOONGARCH-Fix-link-binary-fail.patch +++ /dev/null @@ -1,14 +0,0 @@ -diff -uNr binutils-2.37.org1/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loongarch.c ---- binutils-2.37.org1/bfd/elfnn-loongarch.c 2022-03-24 16:45:58.881469947 +0800 -+++ binutils-2.37/bfd/elfnn-loongarch.c 2022-04-19 08:26:23.579981434 +0800 -@@ -395,6 +395,10 @@ - if (!_bfd_elf_merge_object_attributes (ibfd, info)) - return false; - -+ if (bfd_get_arch_info (ibfd)->the_default -+ && elf_elfheader (ibfd)->e_flags == 0) -+ return true; -+ - if (!elf_flags_init (obfd)) - { - elf_flags_init (obfd) = true; diff --git a/binutils-LOONGARCH-support.patch b/binutils-LoongArch-support.patch similarity index 51% rename from binutils-LOONGARCH-support.patch rename to binutils-LoongArch-support.patch index 85ed081a12acf122d0bc4d3d1f90bd8cfa5ccfab..5f90383bf4f951951cb0b9f8cdef4f6a26283f48 100644 --- a/binutils-LOONGARCH-support.patch +++ b/binutils-LoongArch-support.patch @@ -1,7 +1,180 @@ -diff -uNr binutils-2.37.org/bfd/archures.c binutils-2.37/bfd/archures.c ---- binutils-2.37.org/bfd/archures.c 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/bfd/archures.c 2022-03-24 16:30:09.266114239 +0800 -@@ -555,6 +555,9 @@ +diff --git a/bfd/Makefile.am b/bfd/Makefile.am +index cfea10ac..1d4ab7e5 100644 +--- a/bfd/Makefile.am ++++ b/bfd/Makefile.am +@@ -118,6 +118,7 @@ ALL_MACHINES = \ + cpu-ip2k.lo \ + cpu-iq2000.lo \ + cpu-lm32.lo \ ++ cpu-loongarch.lo \ + cpu-m10200.lo \ + cpu-m10300.lo \ + cpu-m32c.lo \ +@@ -202,6 +203,7 @@ ALL_MACHINES_CFILES = \ + cpu-ip2k.c \ + cpu-iq2000.c \ + cpu-lm32.c \ ++ cpu-loongarch.c \ + cpu-m10200.c \ + cpu-m10300.c \ + cpu-m32c.c \ +@@ -548,6 +550,9 @@ BFD64_BACKENDS = \ + elf64-ia64.lo \ + elf64-ia64-vms.lo \ + elfxx-ia64.lo \ ++ elf32-loongarch.lo \ ++ elf64-loongarch.lo \ ++ elfxx-loongarch.lo \ + elfn32-mips.lo \ + elf64-mips.lo \ + elfxx-mips.lo \ +@@ -601,6 +606,7 @@ BFD64_BACKENDS_CFILES = \ + elfn32-mips.c \ + elfxx-aarch64.c \ + elfxx-ia64.c \ ++ elfxx-loongarch.c \ + elfxx-mips.c \ + elfxx-riscv.c \ + mach-o-aarch64.c \ +@@ -665,6 +671,7 @@ SOURCE_CFILES = \ + BUILD_CFILES = \ + elf32-aarch64.c elf64-aarch64.c \ + elf32-ia64.c elf64-ia64.c \ ++ elf32-loongarch.c elf64-loongarch.c \ + elf32-riscv.c elf64-riscv.c \ + peigen.c pepigen.c pex64igen.c + +@@ -686,7 +693,7 @@ SOURCE_HFILES = \ + elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ + elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ + elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ +- elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ ++ elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ + genlink.h go32stub.h \ + libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ + libpei.h libxcoff.h \ +@@ -842,6 +849,14 @@ elf64-ia64.c : elfnn-ia64.c + echo "#line 1 \"elfnn-ia64.c\"" > $@ + $(SED) -e s/NN/64/g < $< >> $@ + ++elf32-loongarch.c : elfnn-loongarch.c ++ echo "#line 1 \"elfnn-loongarch.c\"" > $@ ++ $(SED) -e s/NN/32/g < $< >> $@ ++ ++elf64-loongarch.c : elfnn-loongarch.c ++ echo "#line 1 \"elfnn-loongarch.c\"" > $@ ++ $(SED) -e s/NN/64/g < $< >> $@ ++ + elf32-riscv.c : elfnn-riscv.c + echo "#line 1 \"elfnn-riscv.c\"" > $@ + $(SED) -e s/NN/32/g < $< >> $@ +diff --git a/bfd/Makefile.in b/bfd/Makefile.in +index 92388586..8bc1f187 100644 +--- a/bfd/Makefile.in ++++ b/bfd/Makefile.in +@@ -543,6 +543,7 @@ ALL_MACHINES = \ + cpu-ip2k.lo \ + cpu-iq2000.lo \ + cpu-lm32.lo \ ++ cpu-loongarch.lo \ + cpu-m10200.lo \ + cpu-m10300.lo \ + cpu-m32c.lo \ +@@ -627,6 +628,7 @@ ALL_MACHINES_CFILES = \ + cpu-ip2k.c \ + cpu-iq2000.c \ + cpu-lm32.c \ ++ cpu-loongarch.c \ + cpu-m10200.c \ + cpu-m10300.c \ + cpu-m32c.c \ +@@ -975,6 +977,9 @@ BFD64_BACKENDS = \ + elf64-ia64.lo \ + elf64-ia64-vms.lo \ + elfxx-ia64.lo \ ++ elf32-loongarch.lo \ ++ elf64-loongarch.lo \ ++ elfxx-loongarch.lo \ + elfn32-mips.lo \ + elf64-mips.lo \ + elfxx-mips.lo \ +@@ -1028,6 +1033,7 @@ BFD64_BACKENDS_CFILES = \ + elfn32-mips.c \ + elfxx-aarch64.c \ + elfxx-ia64.c \ ++ elfxx-loongarch.c \ + elfxx-mips.c \ + elfxx-riscv.c \ + mach-o-aarch64.c \ +@@ -1091,6 +1097,7 @@ SOURCE_CFILES = \ + BUILD_CFILES = \ + elf32-aarch64.c elf64-aarch64.c \ + elf32-ia64.c elf64-ia64.c \ ++ elf32-loongarch.c elf64-loongarch.c \ + elf32-riscv.c elf64-riscv.c \ + peigen.c pepigen.c pex64igen.c + +@@ -1109,7 +1116,7 @@ SOURCE_HFILES = \ + elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ + elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ + elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ +- elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ ++ elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ + genlink.h go32stub.h \ + libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ + libpei.h libxcoff.h \ +@@ -1349,6 +1356,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-k1om.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-l1om.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-lm32.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-loongarch.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10200.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10300.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m32c.Plo@am__quote@ +@@ -1442,6 +1450,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-ip2k.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-iq2000.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-lm32.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-loongarch.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m32c.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m32r.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc11.Plo@am__quote@ +@@ -1492,6 +1501,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-loongarch.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@ +@@ -1506,6 +1516,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfn32-mips.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-aarch64.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-ia64.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-loongarch.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-mips.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-riscv.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-sparc.Plo@am__quote@ +@@ -1972,6 +1983,14 @@ elf64-ia64.c : elfnn-ia64.c + echo "#line 1 \"elfnn-ia64.c\"" > $@ + $(SED) -e s/NN/64/g < $< >> $@ + ++elf32-loongarch.c : elfnn-loongarch.c ++ echo "#line 1 \"elfnn-loongarch.c\"" > $@ ++ $(SED) -e s/NN/32/g < $< >> $@ ++ ++elf64-loongarch.c : elfnn-loongarch.c ++ echo "#line 1 \"elfnn-loongarch.c\"" > $@ ++ $(SED) -e s/NN/64/g < $< >> $@ ++ + elf32-riscv.c : elfnn-riscv.c + echo "#line 1 \"elfnn-riscv.c\"" > $@ + $(SED) -e s/NN/32/g < $< >> $@ +diff --git a/bfd/archures.c b/bfd/archures.c +index 390691bf..b1e88697 100644 +--- a/bfd/archures.c ++++ b/bfd/archures.c +@@ -555,6 +555,9 @@ DESCRIPTION .#define bfd_mach_ck807 6 .#define bfd_mach_ck810 7 .#define bfd_mach_ck860 8 @@ -11,7 +184,7 @@ diff -uNr binutils-2.37.org/bfd/archures.c binutils-2.37/bfd/archures.c . bfd_arch_last . }; */ -@@ -635,6 +638,7 @@ +@@ -635,6 +638,7 @@ extern const bfd_arch_info_type bfd_iq2000_arch; extern const bfd_arch_info_type bfd_k1om_arch; extern const bfd_arch_info_type bfd_l1om_arch; extern const bfd_arch_info_type bfd_lm32_arch; @@ -19,7 +192,7 @@ diff -uNr binutils-2.37.org/bfd/archures.c binutils-2.37/bfd/archures.c extern const bfd_arch_info_type bfd_m32c_arch; extern const bfd_arch_info_type bfd_m32r_arch; extern const bfd_arch_info_type bfd_m68hc11_arch; -@@ -724,6 +728,7 @@ +@@ -724,6 +728,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_k1om_arch, &bfd_l1om_arch, &bfd_lm32_arch, @@ -27,10 +200,11 @@ diff -uNr binutils-2.37.org/bfd/archures.c binutils-2.37/bfd/archures.c &bfd_m32c_arch, &bfd_m32r_arch, &bfd_m68hc11_arch, -diff -uNr binutils-2.37.org/bfd/bfd-in2.h binutils-2.37/bfd/bfd-in2.h ---- binutils-2.37.org/bfd/bfd-in2.h 2022-03-23 16:44:11.991041604 +0800 -+++ binutils-2.37/bfd/bfd-in2.h 2022-03-24 16:30:09.267114228 +0800 -@@ -1927,6 +1927,9 @@ +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 5abde5fe..c8761a61 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -1927,6 +1927,9 @@ enum bfd_architecture #define bfd_mach_ck807 6 #define bfd_mach_ck810 7 #define bfd_mach_ck860 8 @@ -40,7 +214,7 @@ diff -uNr binutils-2.37.org/bfd/bfd-in2.h binutils-2.37/bfd/bfd-in2.h bfd_arch_last }; -@@ -6258,6 +6261,51 @@ +@@ -6258,6 +6261,88 @@ assembler and not (currently) written to any object files. */ /* S12Z relocations. */ BFD_RELOC_S12Z_OPR, @@ -89,12 +263,50 @@ diff -uNr binutils-2.37.org/bfd/bfd-in2.h binutils-2.37/bfd/bfd-in2.h + BFD_RELOC_LARCH_SUB24, + BFD_RELOC_LARCH_SUB32, + BFD_RELOC_LARCH_SUB64, ++ BFD_RELOC_LARCH_B16, ++ BFD_RELOC_LARCH_B21, ++ BFD_RELOC_LARCH_B26, ++ BFD_RELOC_LARCH_ABS_HI20, ++ BFD_RELOC_LARCH_ABS_LO12, ++ BFD_RELOC_LARCH_ABS64_LO20, ++ BFD_RELOC_LARCH_ABS64_HI12, ++ BFD_RELOC_LARCH_PCALA_HI20, ++ BFD_RELOC_LARCH_PCALA_LO12, ++ BFD_RELOC_LARCH_PCALA64_LO20, ++ BFD_RELOC_LARCH_PCALA64_HI12, ++ BFD_RELOC_LARCH_GOT_PC_HI20, ++ BFD_RELOC_LARCH_GOT_PC_LO12, ++ BFD_RELOC_LARCH_GOT64_PC_LO20, ++ BFD_RELOC_LARCH_GOT64_PC_HI12, ++ BFD_RELOC_LARCH_GOT_HI20, ++ BFD_RELOC_LARCH_GOT_LO12, ++ BFD_RELOC_LARCH_GOT64_LO20, ++ BFD_RELOC_LARCH_GOT64_HI12, ++ BFD_RELOC_LARCH_TLS_LE_HI20, ++ BFD_RELOC_LARCH_TLS_LE_LO12, ++ BFD_RELOC_LARCH_TLS_LE64_LO20, ++ BFD_RELOC_LARCH_TLS_LE64_HI12, ++ BFD_RELOC_LARCH_TLS_IE_PC_HI20, ++ BFD_RELOC_LARCH_TLS_IE_PC_LO12, ++ BFD_RELOC_LARCH_TLS_IE64_PC_LO20, ++ BFD_RELOC_LARCH_TLS_IE64_PC_HI12, ++ BFD_RELOC_LARCH_TLS_IE_HI20, ++ BFD_RELOC_LARCH_TLS_IE_LO12, ++ BFD_RELOC_LARCH_TLS_IE64_LO20, ++ BFD_RELOC_LARCH_TLS_IE64_HI12, ++ BFD_RELOC_LARCH_TLS_LD_PC_HI20, ++ BFD_RELOC_LARCH_TLS_LD_HI20, ++ BFD_RELOC_LARCH_TLS_GD_PC_HI20, ++ BFD_RELOC_LARCH_TLS_GD_HI20, ++ BFD_RELOC_LARCH_32_PCREL, ++ BFD_RELOC_LARCH_RELAX, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; -diff -uNr binutils-2.37.org/bfd/config.bfd binutils-2.37/bfd/config.bfd ---- binutils-2.37.org/bfd/config.bfd 2022-03-23 16:44:12.029041179 +0800 -+++ binutils-2.37/bfd/config.bfd 2022-03-24 16:30:09.328113543 +0800 +diff --git a/bfd/config.bfd b/bfd/config.bfd +index 30087e3b..dcdcb33a 100644 +--- a/bfd/config.bfd ++++ b/bfd/config.bfd @@ -182,6 +182,7 @@ hppa*) targ_archs=bfd_hppa_arch ;; i[3-7]86) targ_archs=bfd_i386_arch ;; ia16) targ_archs=bfd_i386_arch ;; @@ -103,7 +315,7 @@ diff -uNr binutils-2.37.org/bfd/config.bfd binutils-2.37/bfd/config.bfd m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m68*) targ_archs=bfd_m68k_arch ;; -@@ -1413,6 +1414,20 @@ +@@ -1413,6 +1414,20 @@ case "${targ}" in targ_underscore=yes ;; @@ -111,7 +323,7 @@ diff -uNr binutils-2.37.org/bfd/config.bfd binutils-2.37/bfd/config.bfd + loongarch32-*) + targ_defvec=loongarch_elf32_vec + targ_selvecs="loongarch_elf32_vec" -+ want64=false ++ want64=true + ;; + + loongarch64-*) @@ -124,10 +336,11 @@ diff -uNr binutils-2.37.org/bfd/config.bfd binutils-2.37/bfd/config.bfd # END OF targmatch.h bpf-*-*) echo "*** Configuration $targ is not fully supported." >&2 -diff -uNr binutils-2.37.org/bfd/configure binutils-2.37/bfd/configure ---- binutils-2.37.org/bfd/configure 2022-03-23 16:44:12.373037333 +0800 -+++ binutils-2.37/bfd/configure 2022-03-24 16:30:09.672109677 +0800 -@@ -13372,6 +13372,8 @@ +diff --git a/bfd/configure b/bfd/configure +index 5528d0d9..0ba573fb 100755 +--- a/bfd/configure ++++ b/bfd/configure +@@ -13372,6 +13372,8 @@ do l1om_elf64_fbsd_vec) tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; lm32_elf32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; lm32_elf32_fdpic_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; @@ -136,10 +349,11 @@ diff -uNr binutils-2.37.org/bfd/configure binutils-2.37/bfd/configure m32c_elf32_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;; m32r_elf32_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; m32r_elf32_le_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; -diff -uNr binutils-2.37.org/bfd/configure.ac binutils-2.37/bfd/configure.ac ---- binutils-2.37.org/bfd/configure.ac 2022-03-23 16:44:12.035041112 +0800 -+++ binutils-2.37/bfd/configure.ac 2022-03-24 16:30:09.333113487 +0800 -@@ -528,6 +528,8 @@ +diff --git a/bfd/configure.ac b/bfd/configure.ac +index fec067b2..4000b5fc 100644 +--- a/bfd/configure.ac ++++ b/bfd/configure.ac +@@ -528,6 +528,8 @@ do l1om_elf64_fbsd_vec) tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; lm32_elf32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; lm32_elf32_fdpic_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; @@ -148,9 +362,11 @@ diff -uNr binutils-2.37.org/bfd/configure.ac binutils-2.37/bfd/configure.ac m32c_elf32_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;; m32r_elf32_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; m32r_elf32_le_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; -diff -uNr binutils-2.37.org/bfd/cpu-loongarch.c binutils-2.37/bfd/cpu-loongarch.c ---- binutils-2.37.org/bfd/cpu-loongarch.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/bfd/cpu-loongarch.c 2022-03-24 16:30:09.269114206 +0800 +diff --git a/bfd/cpu-loongarch.c b/bfd/cpu-loongarch.c +new file mode 100644 +index 00000000..bf6702a8 +--- /dev/null ++++ b/bfd/cpu-loongarch.c @@ -0,0 +1,61 @@ +/* BFD support for LoongArch. + Copyright (C) 2021 Free Software Foundation, Inc. @@ -213,10 +429,11 @@ diff -uNr binutils-2.37.org/bfd/cpu-loongarch.c binutils-2.37/bfd/cpu-loongarch. + &bfd_loongarch32_arch, /* Next in list. */ + 0, +}; -diff -uNr binutils-2.37.org/bfd/elf-bfd.h binutils-2.37/bfd/elf-bfd.h ---- binutils-2.37.org/bfd/elf-bfd.h 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/bfd/elf-bfd.h 2022-03-24 16:30:09.270114195 +0800 -@@ -508,6 +508,7 @@ +diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h +index 8f985ab8..651db974 100644 +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -508,6 +508,7 @@ enum elf_target_id I386_ELF_DATA, IA64_ELF_DATA, LM32_ELF_DATA, @@ -224,7 +441,7 @@ diff -uNr binutils-2.37.org/bfd/elf-bfd.h binutils-2.37/bfd/elf-bfd.h M32R_ELF_DATA, M68HC11_ELF_DATA, M68K_ELF_DATA, -@@ -2845,6 +2846,14 @@ +@@ -2845,6 +2846,14 @@ extern char *elfcore_write_register_note (bfd *, char *, int *, const char *, const void *, int); extern char *elfcore_write_file_note (bfd *, char *, int *, const void*, int); @@ -239,10 +456,11 @@ diff -uNr binutils-2.37.org/bfd/elf-bfd.h binutils-2.37/bfd/elf-bfd.h /* Internal structure which holds information to be included in the PRPSINFO section of Linux core files. -diff -uNr binutils-2.37.org/bfd/elf.c binutils-2.37/bfd/elf.c ---- binutils-2.37.org/bfd/elf.c 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/bfd/elf.c 2022-03-24 16:30:09.271114183 +0800 -@@ -9975,6 +9975,30 @@ +diff --git a/bfd/elf.c b/bfd/elf.c +index de5abafa..8811cfc4 100644 +--- a/bfd/elf.c ++++ b/bfd/elf.c +@@ -9975,6 +9975,30 @@ elfcore_grok_gdb_tdesc (bfd *abfd, Elf_Internal_Note *note) return elfcore_make_note_pseudosection (abfd, ".gdb-tdesc", note); } @@ -273,7 +491,7 @@ diff -uNr binutils-2.37.org/bfd/elf.c binutils-2.37/bfd/elf.c #if defined (HAVE_PRPSINFO_T) typedef prpsinfo_t elfcore_psinfo_t; #if defined (HAVE_PRPSINFO32_T) /* Sparc64 cross Sparc32 */ -@@ -10654,6 +10678,34 @@ +@@ -10654,6 +10678,34 @@ elfcore_grok_note (bfd *abfd, Elf_Internal_Note *note) else return true; @@ -308,7 +526,7 @@ diff -uNr binutils-2.37.org/bfd/elf.c binutils-2.37/bfd/elf.c case NT_PRPSINFO: case NT_PSINFO: if (bed->elf_backend_grok_psinfo) -@@ -12047,6 +12099,55 @@ +@@ -12047,6 +12099,55 @@ elfcore_write_arc_v2 (bfd *abfd, note_name, NT_ARC_V2, arc_v2, size); } @@ -364,7 +582,7 @@ diff -uNr binutils-2.37.org/bfd/elf.c binutils-2.37/bfd/elf.c /* Write the buffer of csr values in CSRS (length SIZE) into the note buffer BUF and update *BUFSIZ. ABFD is the bfd the note is being written into. Return a pointer to the new start of the note buffer, to -@@ -12171,6 +12272,14 @@ +@@ -12171,6 +12272,14 @@ elfcore_write_register_note (bfd *abfd, return elfcore_write_gdb_tdesc (abfd, buf, bufsiz, data, size); if (strcmp (section, ".reg-riscv-csr") == 0) return elfcore_write_riscv_csr (abfd, buf, bufsiz, data, size); @@ -379,12 +597,14 @@ diff -uNr binutils-2.37.org/bfd/elf.c binutils-2.37/bfd/elf.c return NULL; } -diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loongarch.c ---- binutils-2.37.org/bfd/elfnn-loongarch.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/bfd/elfnn-loongarch.c 2022-03-24 16:30:09.290113970 +0800 -@@ -0,0 +1,3272 @@ +diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c +new file mode 100644 +index 00000000..43182ead +--- /dev/null ++++ b/bfd/elfnn-loongarch.c +@@ -0,0 +1,4128 @@ +/* LoongArch-specific support for NN-bit ELF. -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of BFD, the Binary File Descriptor library. @@ -427,9 +647,6 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +{ + struct elf_link_hash_entry elf; + -+ /* Track dynamic relocs copied for this symbol. */ -+ struct elf_dyn_relocs *dyn_relocs; -+ +#define GOT_UNKNOWN 0 +#define GOT_NORMAL 1 +#define GOT_TLS_GD 2 @@ -455,13 +672,15 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +#define _bfd_loongarch_elf_local_got_tls_type(abfd) \ + (_bfd_loongarch_elf_tdata (abfd)->local_got_tls_type) + -+#define _bfd_loongarch_elf_tls_type(abfd, h, symndx) \ -+ (*((h) != NULL ? &loongarch_elf_hash_entry (h)->tls_type \ -+ : &_bfd_loongarch_elf_local_got_tls_type (abfd)[symndx])) ++#define _bfd_loongarch_elf_tls_type(abfd, h, symndx) \ ++ (*((h) != NULL \ ++ ? &loongarch_elf_hash_entry (h)->tls_type \ ++ : &_bfd_loongarch_elf_local_got_tls_type (abfd)[symndx])) + -+#define is_loongarch_elf(bfd) \ -+ (bfd_get_flavour (bfd) == bfd_target_elf_flavour && \ -+ elf_tdata (bfd) != NULL && elf_object_id (bfd) == LARCH_ELF_DATA) ++#define is_loongarch_elf(bfd) \ ++ (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ ++ && elf_tdata (bfd) != NULL \ ++ && elf_object_id (bfd) == LARCH_ELF_DATA) + +struct loongarch_elf_link_hash_table +{ @@ -483,10 +702,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + +/* Get the LoongArch ELF linker hash table from a link_info structure. */ +#define loongarch_elf_hash_table(p) \ -+ (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ -+ == LARCH_ELF_DATA \ -+ ? ((struct loongarch_elf_link_hash_table *) ((p)->hash)) \ -+ : NULL) ++ (elf_hash_table_id (elf_hash_table (p)) == LARCH_ELF_DATA \ ++ ? ((struct loongarch_elf_link_hash_table *) ((p)->hash)) \ ++ : NULL) + +#define MINUS_ONE ((bfd_vma) 0 - 1) + @@ -509,17 +727,17 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + +#define elf_backend_plt_readonly 1 + -+#define elf_backend_want_plt_sym 0 ++#define elf_backend_want_plt_sym 1 +#define elf_backend_plt_alignment 4 +#define elf_backend_can_gc_sections 1 -+/* #define elf_backend_can_refcount 1 */ ++#define elf_backend_can_refcount 1 +#define elf_backend_want_got_sym 1 + +#define elf_backend_got_header_size (GOT_ENTRY_SIZE * 1) + +#define elf_backend_want_dynrelro 1 -+/* #define elf_backend_rela_normal 1 -+#define elf_backend_default_execstack 0 */ ++#define elf_backend_rela_normal 1 ++#define elf_backend_default_execstack 0 + +/* Generate a PLT header. */ + @@ -532,7 +750,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (pcrel + 0x80000800 > 0xffffffff) + { -+ _bfd_error_handler (_ ("0x%lx invaild imm"), pcrel); ++ _bfd_error_handler (_("%#" PRIx64 " invaild imm"), (uint64_t) pcrel); + bfd_set_error (bfd_error_bad_value); + return false; + } @@ -584,7 +802,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (pcrel + 0x80000800 > 0xffffffff) + { -+ _bfd_error_handler (_ ("0x%lx invaild imm"), pcrel); ++ _bfd_error_handler (_("%#" PRIx64 " invaild imm"), (uint64_t) pcrel); + bfd_set_error (bfd_error_bad_value); + return false; + } @@ -592,8 +810,8 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + lo = pcrel & 0xfff; + + entry[0] = 0x1c00000f | (hi & 0xfffff) << 5; -+ entry[1] = (GOT_ENTRY_SIZE == 8 ? 0x28c001ef : 0x288001ef) -+ | (lo & 0xfff) << 10; ++ entry[1] = ((GOT_ENTRY_SIZE == 8 ? 0x28c001ef : 0x288001ef) ++ | (lo & 0xfff) << 10); + entry[2] = 0x4c0001ed; /* jirl $r13, $15, 0 */ + entry[3] = 0x03400000; /* nop */ + @@ -606,12 +824,13 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +link_hash_newfunc (struct bfd_hash_entry *entry, struct bfd_hash_table *table, + const char *string) +{ ++ struct loongarch_elf_link_hash_entry *eh; ++ + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (entry == NULL) + { -+ entry = bfd_hash_allocate ( -+ table, sizeof (struct loongarch_elf_link_hash_entry)); ++ entry = bfd_hash_allocate (table, sizeof (*eh)); + if (entry == NULL) + return entry; + } @@ -620,10 +839,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + entry = _bfd_elf_link_hash_newfunc (entry, table, string); + if (entry != NULL) + { -+ struct loongarch_elf_link_hash_entry *eh; -+ + eh = (struct loongarch_elf_link_hash_entry *) entry; -+ eh->dyn_relocs = NULL; + eh->tls_type = GOT_UNKNOWN; + } + @@ -678,9 +894,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return &ret->elf; + } + -+ ret = (struct loongarch_elf_link_hash_entry *) -+ objalloc_alloc ((struct objalloc *) htab->loc_hash_memory, -+ sizeof (struct loongarch_elf_link_hash_entry)); ++ ret = ((struct loongarch_elf_link_hash_entry *) ++ objalloc_alloc ((struct objalloc *) htab->loc_hash_memory, ++ sizeof (struct loongarch_elf_link_hash_entry))); + if (ret) + { + memset (ret, 0, sizeof (*ret)); @@ -730,9 +946,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + if (ret == NULL) + return NULL; + -+ if (!_bfd_elf_link_hash_table_init ( -+ &ret->elf, abfd, link_hash_newfunc, -+ sizeof (struct loongarch_elf_link_hash_entry), LARCH_ELF_DATA)) ++ if (!_bfd_elf_link_hash_table_init ++ (&ret->elf, abfd, link_hash_newfunc, ++ sizeof (struct loongarch_elf_link_hash_entry), LARCH_ELF_DATA)) + { + free (ret); + return NULL; @@ -764,22 +980,41 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + flagword out_flags = elf_elfheader (obfd)->e_flags; + + if (!is_loongarch_elf (ibfd) || !is_loongarch_elf (obfd)) -+ { -+ return true; -+ } ++ return true; + + if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0) + { -+ _bfd_error_handler ( -+ _ ("%pB: ABI is incompatible with that of the selected emulation:\n" -+ " target emulation `%s' does not match `%s'"), -+ ibfd, bfd_get_target (ibfd), bfd_get_target (obfd)); ++ _bfd_error_handler (_("%pB: ABI is incompatible with that of " ++ "the selected emulation:\n" ++ " target emulation `%s' does not match `%s'"), ++ ibfd, bfd_get_target (ibfd), bfd_get_target (obfd)); + return false; + } + + if (!_bfd_elf_merge_object_attributes (ibfd, info)) + return false; + ++ /* If the input BFD is not a dynamic object and it does not contain any ++ non-data sections, do not account its ABI. For example, various ++ packages produces such data-only relocatable objects with ++ `ld -r -b binary` or `objcopy`, and these objects have zero e_flags. ++ But they are compatible with all ABIs. */ ++ if (!(ibfd->flags & DYNAMIC)) ++ { ++ asection *sec; ++ bool have_code_sections = false; ++ for (sec = ibfd->sections; sec != NULL; sec = sec->next) ++ if ((bfd_section_flags (sec) ++ & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) ++ == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) ++ { ++ have_code_sections = true; ++ break; ++ } ++ if (!have_code_sections) ++ return true; ++ } ++ + if (!elf_flags_init (obfd)) + { + elf_flags_init (obfd) = true; @@ -788,15 +1023,15 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + } + + /* Disallow linking different ABIs. */ -+ if ((out_flags ^ in_flags) & EF_LOONGARCH_ABI) ++ if (EF_LOONGARCH_ABI(out_flags ^ in_flags) & EF_LOONGARCH_ABI_MASK) + { -+ _bfd_error_handler (_ ("%pB: can't link different ABI object."), ibfd); ++ _bfd_error_handler (_("%pB: can't link different ABI object."), ibfd); + goto fail; + } + + return true; + -+fail: ++ fail: + bfd_set_error (bfd_error_bad_value); + return false; +} @@ -877,13 +1112,12 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return false; + + if (!bfd_link_pic (info)) -+ { -+ htab->sdyntdata = bfd_make_section_anyway_with_flags ( -+ dynobj, ".tdata.dyn", SEC_ALLOC | SEC_THREAD_LOCAL); -+ } ++ htab->sdyntdata ++ = bfd_make_section_anyway_with_flags (dynobj, ".tdata.dyn", ++ SEC_ALLOC | SEC_THREAD_LOCAL); + + if (!htab->elf.splt || !htab->elf.srelplt || !htab->elf.sdynbss -+ ||(!bfd_link_pic (info) && (!htab->elf.srelbss || !htab->sdyntdata))) ++ || (!bfd_link_pic (info) && (!htab->elf.srelbss || !htab->sdyntdata))) + abort (); + + return true; @@ -932,7 +1166,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + /* No need for GOT. */ + break; + default: -+ _bfd_error_handler (_ ("Internal error: unreachable.")); ++ _bfd_error_handler (_("Internal error: unreachable.")); + return false; + } + @@ -940,9 +1174,10 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + *new_tls_type |= tls_type; + if ((*new_tls_type & GOT_NORMAL) && (*new_tls_type & ~GOT_NORMAL)) + { -+ _bfd_error_handler ( -+ _ ("%pB: `%s' accessed both as normal and thread local symbol"), abfd, -+ h ? h->root.root.string : ""); ++ _bfd_error_handler (_("%pB: `%s' accessed both as normal and " ++ "thread local symbol"), ++ abfd, ++ h ? h->root.root.string : ""); + return false; + } + @@ -980,22 +1215,19 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + struct elf_link_hash_entry *h; + Elf_Internal_Sym *isym = NULL; + -+ int need_dynreloc; -+ int only_need_pcrel; -+ + r_symndx = ELFNN_R_SYM (rel->r_info); + r_type = ELFNN_R_TYPE (rel->r_info); + + if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr)) + { -+ _bfd_error_handler (_ ("%pB: bad symbol index: %d"), abfd, r_symndx); ++ _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx); + return false; + } + + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ -+ isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, r_symndx); + if (isym == NULL) + return false; + @@ -1019,14 +1251,27 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + h = (struct elf_link_hash_entry *) h->root.u.i.link; + } + ++ /* It is referenced by a non-shared object. */ ++ if (h != NULL) ++ h->ref_regular = 1; ++ + if (h && h->type == STT_GNU_IFUNC) + { + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + -+ if (!htab->elf.splt ++ /* Create 'irelifunc' in PIC object. */ ++ if (bfd_link_pic (info) ++ && !_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) ++ return false; ++ /* If '.plt' not represent, create '.iplt' to deal with ifunc. */ ++ else if (!htab->elf.splt ++ && !_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) ++ return false; ++ /* Create the ifunc sections, iplt and ipltgot, for static ++ executables. */ ++ if ((r_type == R_LARCH_64 || r_type == R_LARCH_32) + && !_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) -+ /* If '.plt' not represent, create '.iplt' to deal with ifunc. */ + return false; + + if (h->plt.refcount < 0) @@ -1037,43 +1282,61 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + elf_tdata (info->output_bfd)->has_gnu_osabi |= elf_gnu_osabi_ifunc; + } + -+ need_dynreloc = 0; -+ only_need_pcrel = 0; ++ int need_dynreloc = 0; ++ int only_need_pcrel = 0; ++ + switch (r_type) + { ++ case R_LARCH_GOT_PC_HI20: ++ case R_LARCH_GOT_HI20: + case R_LARCH_SOP_PUSH_GPREL: -+ if (!loongarch_elf_record_tls_and_got_reference ( -+ abfd, info, h, r_symndx, GOT_NORMAL)) ++ /* For la.global. */ ++ if (h) ++ h->pointer_equality_needed = 1; ++ if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, ++ r_symndx, ++ GOT_NORMAL)) + return false; + break; + ++ case R_LARCH_TLS_LD_PC_HI20: ++ case R_LARCH_TLS_LD_HI20: ++ case R_LARCH_TLS_GD_PC_HI20: ++ case R_LARCH_TLS_GD_HI20: + case R_LARCH_SOP_PUSH_TLS_GD: -+ if (!loongarch_elf_record_tls_and_got_reference ( -+ abfd, info, h, r_symndx, GOT_TLS_GD)) ++ if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, ++ r_symndx, ++ GOT_TLS_GD)) + return false; + break; + ++ case R_LARCH_TLS_IE_PC_HI20: ++ case R_LARCH_TLS_IE_HI20: + case R_LARCH_SOP_PUSH_TLS_GOT: + if (bfd_link_pic (info)) + /* May fail for lazy-bind. */ + info->flags |= DF_STATIC_TLS; + -+ if (!loongarch_elf_record_tls_and_got_reference ( -+ abfd, info, h, r_symndx, GOT_TLS_IE)) ++ if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, ++ r_symndx, ++ GOT_TLS_IE)) + return false; + break; + ++ case R_LARCH_TLS_LE_HI20: + case R_LARCH_SOP_PUSH_TLS_TPREL: + if (!bfd_link_executable (info)) + return false; + + info->flags |= DF_STATIC_TLS; + -+ if (!loongarch_elf_record_tls_and_got_reference ( -+ abfd, info, h, r_symndx, GOT_TLS_LE)) ++ if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, ++ r_symndx, ++ GOT_TLS_LE)) + return false; + break; + ++ case R_LARCH_ABS_HI20: + case R_LARCH_SOP_PUSH_ABSOLUTE: + if (h != NULL) + /* If this reloc is in a read-only section, we might @@ -1085,16 +1348,45 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + h->non_got_ref = 1; + break; + -+ case R_LARCH_SOP_PUSH_PCREL: ++ case R_LARCH_PCALA_HI20: + if (h != NULL) + { + h->non_got_ref = 1; ++ h->pointer_equality_needed = 1; ++ } ++ ++ break; ++ ++ case R_LARCH_B21: ++ case R_LARCH_B16: ++ case R_LARCH_B26: ++ if (h != NULL) ++ { ++ h->needs_plt = 1; ++ if (!bfd_link_pic (info)) ++ h->non_got_ref = 1; ++ ++ /* We try to create PLT stub for all non-local function. */ ++ if (h->plt.refcount < 0) ++ h->plt.refcount = 0; ++ h->plt.refcount++; ++ } ++ ++ break; ++ ++ case R_LARCH_SOP_PUSH_PCREL: ++ if (h != NULL) ++ { ++ if (!bfd_link_pic (info)) ++ h->non_got_ref = 1; + + /* We try to create PLT stub for all non-local function. */ + if (h->plt.refcount < 0) + h->plt.refcount = 0; + h->plt.refcount++; ++ h->pointer_equality_needed = 1; + } ++ + break; + + case R_LARCH_SOP_PUSH_PLT_PCREL: @@ -1121,6 +1413,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + case R_LARCH_JUMP_SLOT: + case R_LARCH_32: + case R_LARCH_64: ++ + need_dynreloc = 1; + + /* If resolved symbol is defined in this object, @@ -1133,8 +1426,23 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + Thus, only under pde, it needs pcrel only. We discard it. */ + only_need_pcrel = bfd_link_pde (info); + -+ if (h != NULL) -+ h->non_got_ref = 1; ++ if (h != NULL ++ && (!bfd_link_pic (info) ++ || h->type == STT_GNU_IFUNC)) ++ { ++ /* This reloc might not bind locally. */ ++ h->non_got_ref = 1; ++ h->pointer_equality_needed = 1; ++ ++ if (!h->def_regular ++ || (sec->flags & (SEC_CODE | SEC_READONLY)) != 0) ++ { ++ /* We may need a .plt entry if the symbol is a function ++ defined in a shared lib or is a function referenced ++ from the code or read-only section. */ ++ h->plt.refcount += 1; ++ } ++ } + break; + + case R_LARCH_GNU_VTINHERIT: @@ -1162,10 +1470,10 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (sreloc == NULL) + { -+ sreloc = _bfd_elf_make_dynamic_reloc_section ( -+ sec, htab->elf.dynobj, LARCH_ELF_LOG_WORD_BYTES, abfd, -+ /*rela?*/ true); -+ ++ sreloc ++ = _bfd_elf_make_dynamic_reloc_section (sec, htab->elf.dynobj, ++ LARCH_ELF_LOG_WORD_BYTES, ++ abfd, /*rela?*/ true); + if (sreloc == NULL) + return false; + } @@ -1173,7 +1481,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + /* If this is a global symbol, we count the number of + relocations we need for this symbol. */ + if (h != NULL) -+ head = &((struct loongarch_elf_link_hash_entry *) h)->dyn_relocs; ++ head = &h->dyn_relocs; + else + { + /* Track dynamic relocs needed for local syms too. @@ -1220,7 +1528,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +{ + struct elf_dyn_relocs *p; + -+ for (p = loongarch_elf_hash_entry (h)->dyn_relocs; p != NULL; p = p->next) ++ for (p = h->dyn_relocs; p != NULL; p = p->next) + { + asection *s = p->sec->output_section; + @@ -1240,9 +1548,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + struct elf_link_hash_entry *h) +{ + struct loongarch_elf_link_hash_table *htab; -+ struct loongarch_elf_link_hash_entry *eh; + bfd *dynobj; -+ asection *s, *srel; + + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); @@ -1292,73 +1598,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return true; + } + -+ /* This is a reference to a symbol defined by a dynamic object which -+ is not a function. */ -+ -+ /* If we are creating a shared library, we must presume that the -+ only references to the symbol are via the global offset table. -+ For such cases we need not do anything here; the relocations will -+ be handled correctly by relocate_section. */ -+ if (bfd_link_dll (info)) -+ return true; -+ -+ /* If there are no references to this symbol that do not use the -+ GOT, we don't need to generate a copy reloc. */ -+ if (!h->non_got_ref) -+ return true; -+ -+ /* If -z nocopyreloc was given, we won't generate them either. */ -+ if (info->nocopyreloc) -+ { -+ h->non_got_ref = 0; -+ return true; -+ } -+ -+ /* If we don't find any dynamic relocs in read-only sections, then -+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */ -+ if (!readonly_dynrelocs (h)) -+ { -+ h->non_got_ref = 0; -+ return true; -+ } -+ -+ /* We must allocate the symbol in our .dynbss section, which will -+ become part of the .bss section of the executable. There will be -+ an entry for this symbol in the .dynsym section. The dynamic -+ object will contain position independent code, so all references -+ from the dynamic object to this symbol will go through the global -+ offset table. The dynamic linker will use the .dynsym entry to -+ determine the address it must put in the global offset table, so -+ both the dynamic object and the regular object will refer to the -+ same memory location for the variable. */ -+ -+ /* We must generate a R_LARCH_COPY reloc to tell the dynamic linker -+ to copy the initial value out of the dynamic object and into the -+ runtime process image. We need to remember the offset into the -+ .rel.bss section we are going to use. */ -+ eh = (struct loongarch_elf_link_hash_entry *) h; -+ if (eh->tls_type & ~GOT_NORMAL) -+ { -+ s = htab->sdyntdata; -+ srel = htab->elf.srelbss; -+ } -+ else if ((h->root.u.def.section->flags & SEC_READONLY) != 0) -+ { -+ s = htab->elf.sdynrelro; -+ srel = htab->elf.sreldynrelro; -+ } -+ else -+ { -+ s = htab->elf.sdynbss; -+ srel = htab->elf.srelbss; -+ } -+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0) -+ { -+ srel->size += sizeof (ElfNN_External_Rela); -+ h->needs_copy = 1; -+ } -+ -+ return _bfd_elf_adjust_dynamic_copy (info, h, s); ++ /* R_LARCH_COPY is not adept glibc, not to generate. */ ++ /* Can not print anything, because make check ld. */ ++ return true; +} + +/* Allocate space in .plt, .got and associated reloc sections for @@ -1369,15 +1611,18 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +{ + struct bfd_link_info *info; + struct loongarch_elf_link_hash_table *htab; -+ struct loongarch_elf_link_hash_entry *eh; + struct elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) + return true; + -+ eh = (struct loongarch_elf_link_hash_entry *) h; ++ if (h->type == STT_GNU_IFUNC ++ && h->def_regular) ++ return true; ++ + info = (struct bfd_link_info *) inf; + htab = loongarch_elf_hash_table (info); ++ bool dyn = htab->elf.dynamic_sections_created; + BFD_ASSERT (htab != NULL); + + do @@ -1391,9 +1636,12 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (htab->elf.splt) + { -+ if (h->dynindx == -1 && !h->forced_local -+ && !bfd_elf_link_record_dynamic_symbol (info, h)) -+ return false; ++ if (h->dynindx == -1 && !h->forced_local && dyn ++ && h->root.type == bfd_link_hash_undefweak) ++ { ++ if (!bfd_elf_link_record_dynamic_symbol (info, h)) ++ return false; ++ } + + if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h) + && h->type != STT_GNU_IFUNC) @@ -1424,6 +1672,18 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + gotplt->size += GOT_ENTRY_SIZE; + relplt->size += sizeof (ElfNN_External_Rela); + ++ /* If this symbol is not defined in a regular file, and we are ++ not generating a shared library, then set the symbol to this ++ location in the .plt. This is required to make function ++ pointers compare as equal between the normal executable and ++ the shared library. */ ++ if (!bfd_link_pic (info) ++ && !h->def_regular) ++ { ++ h->root.u.def.section = plt; ++ h->root.u.def.value = h->plt.offset; ++ } ++ + h->needs_plt = 1; + } + while (0); @@ -1434,55 +1694,88 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + if (0 < h->got.refcount) + { + asection *s; -+ bool dyn; + int tls_type = loongarch_elf_hash_entry (h)->tls_type; + + /* Make sure this symbol is output as a dynamic symbol. -+ Undefined weak syms won't yet be marked as dynamic. -+ __start/stop had been output (or not) earlier, pr21964-4. */ -+ if (!h->start_stop && h->dynindx == -1 && !h->forced_local -+ && !bfd_elf_link_record_dynamic_symbol (info, h)) -+ return false; ++ Undefined weak syms won't yet be marked as dynamic. */ ++ if (h->dynindx == -1 && !h->forced_local && dyn ++ && h->root.type == bfd_link_hash_undefweak) ++ { ++ if (!bfd_elf_link_record_dynamic_symbol (info, h)) ++ return false; ++ } + + s = htab->elf.sgot; + h->got.offset = s->size; -+ dyn = htab->elf.dynamic_sections_created; + if (tls_type & (GOT_TLS_GD | GOT_TLS_IE)) + { + /* TLS_GD needs two dynamic relocs and two GOT slots. */ + if (tls_type & GOT_TLS_GD) + { + s->size += 2 * GOT_ENTRY_SIZE; -+ htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela); ++ if (bfd_link_executable (info)) ++ { ++ /* Link exe and not defined local. */ ++ if (!SYMBOL_REFERENCES_LOCAL (info, h)) ++ htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela); ++ } ++ else ++ { ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); ++ else ++ htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela); ++ } + } + + /* TLS_IE needs one dynamic reloc and one GOT slot. */ + if (tls_type & GOT_TLS_IE) + { + s->size += GOT_ENTRY_SIZE; -+ htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); ++ ++ if (bfd_link_executable (info)) ++ { ++ /* Link exe and not defined local. */ ++ if (!SYMBOL_REFERENCES_LOCAL (info, h)) ++ htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); ++ } ++ else ++ { ++ htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); ++ } + } + } + else + { + s->size += GOT_ENTRY_SIZE; -+ if ((WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h) -+ && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) -+ || h->type == STT_GNU_IFUNC) ++ if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT ++ || h->root.type != bfd_link_hash_undefweak) ++ && (bfd_link_pic (info) ++ || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), ++ h)) ++ && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) ++ /* Undefined weak symbol in static PIE resolves to 0 without ++ any dynamic relocations. */ + htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); + } + } + else + h->got.offset = MINUS_ONE; + -+ if (eh->dyn_relocs == NULL) ++ if (h->dyn_relocs == NULL) + return true; + -+ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ /* Extra dynamic relocate, ++ * R_LARCH_64 ++ * R_LARCH_TLS_DTPRELNN ++ * R_LARCH_JUMP_SLOT ++ * R_LARCH_NN. */ ++ ++ if (SYMBOL_CALLS_LOCAL (info, h)) + { + struct elf_dyn_relocs **pp; + -+ for (pp = &eh->dyn_relocs; (p = *pp) != NULL;) ++ for (pp = &h->dyn_relocs; (p = *pp) != NULL;) + { + p->count -= p->pc_count; + p->pc_count = 0; @@ -1495,16 +1788,23 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (h->root.type == bfd_link_hash_undefweak) + { -+ if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) -+ eh->dyn_relocs = NULL; -+ else if (h->dynindx == -1 && !h->forced_local -+ /* Make sure this symbol is output as a dynamic symbol. -+ Undefined weak syms won't yet be marked as dynamic. */ -+ && !bfd_elf_link_record_dynamic_symbol (info, h)) -+ return false; ++ if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h) ++ || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT ++ || (!bfd_link_pic (info) && h->non_got_ref)) ++ h->dyn_relocs = NULL; ++ else if (h->dynindx == -1 && !h->forced_local) ++ { ++ /* Make sure this symbol is output as a dynamic symbol. ++ Undefined weak syms won't yet be marked as dynamic. */ ++ if (!bfd_elf_link_record_dynamic_symbol (info, h)) ++ return false; ++ ++ if (h->dynindx == -1) ++ h->dyn_relocs = NULL; ++ } + } + -+ for (p = eh->dyn_relocs; p != NULL; p = p->next) ++ for (p = h->dyn_relocs; p != NULL; p = p->next) + { + asection *sreloc = elf_section_data (p->sec)->sreloc; + sreloc->size += p->count * sizeof (ElfNN_External_Rela); @@ -1513,16 +1813,322 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return true; +} + ++/* A modified version of _bfd_elf_allocate_ifunc_dyn_relocs. ++ For local def and ref ifunc, ++ dynamic relocations are stored in ++ 1. rela.srelgot section in dynamic object (dll or exec). ++ 2. rela.irelplt section in static executable. ++ Unlike _bfd_elf_allocate_ifunc_dyn_relocs, rela.srelgot is used ++ instead of rela.srelplt. Glibc ELF loader will not support ++ R_LARCH_IRELATIVE relocation in rela.plt. */ ++ ++static bool ++local_allocate_ifunc_dyn_relocs (struct bfd_link_info *info, ++ struct elf_link_hash_entry *h, ++ struct elf_dyn_relocs **head, ++ unsigned int plt_entry_size, ++ unsigned int plt_header_size, ++ unsigned int got_entry_size, ++ bool avoid_plt) ++{ ++ asection *plt, *gotplt, *relplt; ++ struct elf_dyn_relocs *p; ++ unsigned int sizeof_reloc; ++ const struct elf_backend_data *bed; ++ struct elf_link_hash_table *htab; ++ /* If AVOID_PLT is TRUE, don't use PLT if possible. */ ++ bool use_plt = !avoid_plt || h->plt.refcount > 0; ++ bool need_dynreloc = !use_plt || bfd_link_pic (info); ++ ++ /* When a PIC object references a STT_GNU_IFUNC symbol defined ++ in executable or it isn't referenced via PLT, the address of ++ the resolved function may be used. But in non-PIC executable, ++ the address of its plt slot may be used. Pointer equality may ++ not work correctly. PIE or non-PLT reference should be used if ++ pointer equality is required here. ++ ++ If STT_GNU_IFUNC symbol is defined in position-dependent executable, ++ backend should change it to the normal function and set its address ++ to its PLT entry which should be resolved by R_*_IRELATIVE at ++ run-time. All external references should be resolved to its PLT in ++ executable. */ ++ if (!need_dynreloc ++ && !(bfd_link_pde (info) && h->def_regular) ++ && (h->dynindx != -1 ++ || info->export_dynamic) ++ && h->pointer_equality_needed) ++ { ++ info->callbacks->einfo ++ /* xgettext:c-format. */ ++ (_("%F%P: dynamic STT_GNU_IFUNC symbol `%s' with pointer " ++ "equality in `%pB' can not be used when making an " ++ "executable; recompile with -fPIE and relink with -pie\n"), ++ h->root.root.string, ++ h->root.u.def.section->owner); ++ bfd_set_error (bfd_error_bad_value); ++ return false; ++ } ++ ++ htab = elf_hash_table (info); ++ ++ /* When the symbol is marked with regular reference, if PLT isn't used ++ or we are building a PIC object, we must keep dynamic relocation ++ if there is non-GOT reference and use PLT if there is PC-relative ++ reference. */ ++ if (need_dynreloc && h->ref_regular) ++ { ++ bool keep = false; ++ for (p = *head; p != NULL; p = p->next) ++ if (p->count) ++ { ++ h->non_got_ref = 1; ++ /* Need dynamic relocations for non-GOT reference. */ ++ keep = true; ++ if (p->pc_count) ++ { ++ /* Must use PLT for PC-relative reference. */ ++ use_plt = true; ++ need_dynreloc = bfd_link_pic (info); ++ break; ++ } ++ } ++ if (keep) ++ goto keep; ++ } ++ ++ /* Support garbage collection against STT_GNU_IFUNC symbols. */ ++ if (h->plt.refcount <= 0 && h->got.refcount <= 0) ++ { ++ h->got = htab->init_got_offset; ++ h->plt = htab->init_plt_offset; ++ *head = NULL; ++ return true; ++ } ++ ++ /* Return and discard space for dynamic relocations against it if ++ it is never referenced. */ ++ if (!h->ref_regular) ++ { ++ if (h->plt.refcount > 0 ++ || h->got.refcount > 0) ++ abort (); ++ h->got = htab->init_got_offset; ++ h->plt = htab->init_plt_offset; ++ *head = NULL; ++ return true; ++ } ++ ++ keep: ++ bed = get_elf_backend_data (info->output_bfd); ++ if (bed->rela_plts_and_copies_p) ++ sizeof_reloc = bed->s->sizeof_rela; ++ else ++ sizeof_reloc = bed->s->sizeof_rel; ++ ++ /* When building a static executable, use iplt, igot.plt and ++ rela.iplt sections for STT_GNU_IFUNC symbols. */ ++ if (htab->splt != NULL) ++ { ++ plt = htab->splt; ++ gotplt = htab->sgotplt; ++ /* Change dynamic info of ifunc gotplt from srelplt to srelgot. */ ++ relplt = htab->srelgot; ++ ++ /* If this is the first plt entry and PLT is used, make room for ++ the special first entry. */ ++ if (plt->size == 0 && use_plt) ++ plt->size += plt_header_size; ++ } ++ else ++ { ++ plt = htab->iplt; ++ gotplt = htab->igotplt; ++ relplt = htab->irelplt; ++ } ++ ++ if (use_plt) ++ { ++ /* Don't update value of STT_GNU_IFUNC symbol to PLT. We need ++ the original value for R_*_IRELATIVE. */ ++ h->plt.offset = plt->size; ++ ++ /* Make room for this entry in the plt/iplt section. */ ++ plt->size += plt_entry_size; ++ ++ /* We also need to make an entry in the got.plt/got.iplt section, ++ which will be placed in the got section by the linker script. */ ++ gotplt->size += got_entry_size; ++ } ++ ++ /* We also need to make an entry in the rela.plt/.rela.iplt ++ section for GOTPLT relocation if PLT is used. */ ++ if (use_plt) ++ { ++ relplt->size += sizeof_reloc; ++ relplt->reloc_count++; ++ } ++ ++ /* We need dynamic relocation for STT_GNU_IFUNC symbol only when ++ there is a non-GOT reference in a PIC object or PLT isn't used. */ ++ if (!need_dynreloc || !h->non_got_ref) ++ *head = NULL; ++ ++ /* Finally, allocate space. */ ++ p = *head; ++ if (p != NULL) ++ { ++ bfd_size_type count = 0; ++ do ++ { ++ count += p->count; ++ p = p->next; ++ } ++ while (p != NULL); ++ ++ htab->ifunc_resolvers = count != 0; ++ ++ /* Dynamic relocations are stored in ++ 1. rela.srelgot section in PIC object. ++ 2. rela.srelgot section in dynamic executable. ++ 3. rela.irelplt section in static executable. */ ++ if (htab->splt != NULL) ++ htab->srelgot->size += count * sizeof_reloc; ++ else ++ { ++ relplt->size += count * sizeof_reloc; ++ relplt->reloc_count += count; ++ } ++ } ++ ++ /* For STT_GNU_IFUNC symbol, got.plt has the real function address ++ and got has the PLT entry adddress. We will load the GOT entry ++ with the PLT entry in finish_dynamic_symbol if it is used. For ++ branch, it uses got.plt. For symbol value, if PLT is used, ++ 1. Use got.plt in a PIC object if it is forced local or not ++ dynamic. ++ 2. Use got.plt in a non-PIC object if pointer equality isn't ++ needed. ++ 3. Use got.plt in PIE. ++ 4. Use got.plt if got isn't used. ++ 5. Otherwise use got so that it can be shared among different ++ objects at run-time. ++ If PLT isn't used, always use got for symbol value. ++ We only need to relocate got entry in PIC object or in dynamic ++ executable without PLT. */ ++ if (use_plt ++ && (h->got.refcount <= 0 ++ || (bfd_link_pic (info) ++ && (h->dynindx == -1 ++ || h->forced_local)) ++ || ( ++ !h->pointer_equality_needed) ++ || htab->sgot == NULL)) ++ { ++ /* Use got.plt. */ ++ h->got.offset = (bfd_vma) -1; ++ } ++ else ++ { ++ if (!use_plt) ++ { ++ /* PLT isn't used. */ ++ h->plt.offset = (bfd_vma) -1; ++ } ++ if (h->got.refcount <= 0) ++ { ++ /* GOT isn't need when there are only relocations for static ++ pointers. */ ++ h->got.offset = (bfd_vma) -1; ++ } ++ else ++ { ++ h->got.offset = htab->sgot->size; ++ htab->sgot->size += got_entry_size; ++ /* Need to relocate the GOT entry in a PIC object or PLT isn't ++ used. Otherwise, the GOT entry will be filled with the PLT ++ entry and dynamic GOT relocation isn't needed. */ ++ if (need_dynreloc) ++ { ++ /* For non-static executable, dynamic GOT relocation is in ++ rela.got section, but for static executable, it is ++ in rela.iplt section. */ ++ if (htab->splt != NULL) ++ htab->srelgot->size += sizeof_reloc; ++ else ++ { ++ relplt->size += sizeof_reloc; ++ relplt->reloc_count++; ++ } ++ } ++ } ++ } ++ ++ return true; ++} ++ ++/* Allocate space in .plt, .got and associated reloc sections for ++ ifunc dynamic relocs. */ ++ ++static bool ++elfNN_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h, void *inf) ++{ ++ struct bfd_link_info *info; ++ /* An example of a bfd_link_hash_indirect symbol is versioned ++ symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect) ++ -> __gxx_personality_v0(bfd_link_hash_defined) ++ ++ There is no need to process bfd_link_hash_indirect symbols here ++ because we will also be presented with the concrete instance of ++ the symbol and loongarch_elf_copy_indirect_symbol () will have been ++ called to copy all relevant data from the generic to the concrete ++ symbol instance. */ ++ if (h->root.type == bfd_link_hash_indirect) ++ return true; ++ ++ if (h->root.type == bfd_link_hash_warning) ++ h = (struct elf_link_hash_entry *) h->root.u.i.link; ++ ++ info = (struct bfd_link_info *) inf; ++ ++ /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it ++ here if it is defined and referenced in a non-shared object. */ ++ if (h->type == STT_GNU_IFUNC && h->def_regular) ++ { ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ return local_allocate_ifunc_dyn_relocs (info, h, ++ &h->dyn_relocs, ++ PLT_ENTRY_SIZE, ++ PLT_HEADER_SIZE, ++ GOT_ENTRY_SIZE, ++ false); ++ else ++ return _bfd_elf_allocate_ifunc_dyn_relocs (info, h, ++ &h->dyn_relocs, ++ PLT_ENTRY_SIZE, ++ PLT_HEADER_SIZE, ++ GOT_ENTRY_SIZE, ++ false); ++ } ++ ++ return true; ++} ++ ++/* Allocate space in .plt, .got and associated reloc sections for ++ ifunc dynamic relocs. */ ++ +static bool -+elfNN_loongarch_allocate_local_dynrelocs (void **slot, void *inf) ++elfNN_allocate_local_ifunc_dynrelocs (void **slot, void *inf) +{ + struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot; + -+ if (!h->def_regular || !h->ref_regular || !h->forced_local ++ if (h->type != STT_GNU_IFUNC ++ || !h->def_regular ++ || !h->ref_regular ++ || !h->forced_local + || h->root.type != bfd_link_hash_defined) + abort (); + -+ return allocate_dynrelocs (h, inf); ++ return elfNN_allocate_ifunc_dynrelocs (h, inf); +} + +/* Set DF_TEXTREL if we find any dynamic relocs that apply to @@ -1542,8 +2148,8 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + struct bfd_link_info *info = (struct bfd_link_info *) info_p; + + info->flags |= DF_TEXTREL; -+ info->callbacks->minfo (_ ("%pB: dynamic relocation against `%pT' in " -+ "read-only section `%pA'\n"), ++ info->callbacks->minfo (_("%pB: dynamic relocation against `%pT' in " ++ "read-only section `%pA'\n"), + sec->owner, h->root.root.string, sec); + + /* Not an error, just cut short the traversal. */ @@ -1575,7 +2181,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + flagword flags = elf_elfheader (output_bfd)->e_flags; + s = bfd_get_linker_section (dynobj, ".interp"); + BFD_ASSERT (s != NULL); -+ if (EF_LOONGARCH_IS_LP32 (flags)) ++ if (EF_LOONGARCH_IS_ILP32 (flags)) + interpreter = "/lib32/ld.so.1"; + else if (EF_LOONGARCH_IS_LP64 (flags)) + interpreter = "/lib64/ld.so.1"; @@ -1640,16 +2246,21 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + if (0 < *local_got) + { + *local_got = s->size; -+ s->size += GOT_ENTRY_SIZE; + ++ /* TLS gd use two got. */ + if (*local_tls_type & GOT_TLS_GD) ++ s->size += GOT_ENTRY_SIZE * 2; ++ else ++ /* Normal got, tls ie/ld use one got. */ + s->size += GOT_ENTRY_SIZE; + -+ /* If R_LARCH_RELATIVE. */ -+ if (bfd_link_pic (info) -+ /* Or R_LARCH_TLS_DTPRELNN or R_LARCH_TLS_TPRELNN. */ -+ || (*local_tls_type & (GOT_TLS_GD | GOT_TLS_IE))) -+ srel->size += sizeof (ElfNN_External_Rela); ++ if (bfd_link_executable (info) ++ && (*local_tls_type & (GOT_TLS_GD| GOT_TLS_IE))) ++ ;/* Do nothing. */ ++ else ++ { ++ srel->size += sizeof (ElfNN_External_Rela); ++ } + } + else + *local_got = MINUS_ONE; @@ -1659,9 +2270,14 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ + elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); ++ ++ /* Allocate global ifunc sym .plt and .got entries, and space for global ++ ifunc sym dynamic relocs. */ ++ elf_link_hash_traverse (&htab->elf, elfNN_allocate_ifunc_dynrelocs, info); ++ + /* Allocate .plt and .got entries, and space for local ifunc symbols. */ + htab_traverse (htab->loc_hash_table, -+ (void *) elfNN_loongarch_allocate_local_dynrelocs, info); ++ (void *) elfNN_allocate_local_ifunc_dynrelocs, info); + + /* Don't allocate .got.plt section if there are no PLT. */ + if (htab->elf.sgotplt && htab->elf.sgotplt->size == GOTPLT_HEADER_SIZE @@ -1810,18 +2426,21 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +static void +loongarch_elf_append_rela (bfd *abfd, asection *s, Elf_Internal_Rela *rel) +{ ++ BFD_ASSERT (s && s->contents); + const struct elf_backend_data *bed; + bfd_byte *loc; + + bed = get_elf_backend_data (abfd); ++ if (!(s->size > s->reloc_count * bed->s->sizeof_rela)) ++ BFD_ASSERT (s->size > s->reloc_count * bed->s->sizeof_rela); + loc = s->contents + (s->reloc_count++ * bed->s->sizeof_rela); + bed->s->swap_reloca_out (abfd, rel, loc); +} + -+/* FIXME, check rel->r_offset in range of contents. */ ++/* Check rel->r_offset in range of contents. */ +static bfd_reloc_status_type +loongarch_check_offset (const Elf_Internal_Rela *rel, -+ const asection *input_section) ++ const asection *input_section) +{ + if (0 == strcmp(input_section->name, ".text") + && rel->r_offset > input_section->size) @@ -1830,82 +2449,47 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return bfd_reloc_ok; +} + -+ +#define LARCH_RELOC_PERFORM_3OP(op1, op2, op3) \ + ({ \ + bfd_reloc_status_type ret = loongarch_pop (&op2); \ + if (ret == bfd_reloc_ok) \ + { \ -+ ret = loongarch_pop (&op1); \ -+ if (ret == bfd_reloc_ok) \ -+ ret = loongarch_push (op3); \ ++ ret = loongarch_pop (&op1); \ ++ if (ret == bfd_reloc_ok) \ ++ ret = loongarch_push (op3); \ + } \ + ret; \ + }) + -+#define LARCH_RELOC_UINT32_BIT_MASK(bitsize) \ -+ (~((0x1U << (bitsize)) - 1)) -+ +static bfd_reloc_status_type +loongarch_reloc_rewrite_imm_insn (const Elf_Internal_Rela *rel, + const asection *input_section ATTRIBUTE_UNUSED, + reloc_howto_type *howto, bfd *input_bfd, -+ bfd_byte *contents, int64_t op, -+ bool is_signed) ++ bfd_byte *contents, bfd_vma reloc_val) +{ -+ -+ /* Check op low bits if rightshift != 0, before rightshift */ -+ if (howto->rightshift -+ && (((0x1U << howto->rightshift) - 1) & op)) -+ return bfd_reloc_overflow; -+ -+ uint32_t imm = (uint32_t)(int32_t)(op >> howto->rightshift); -+ -+ if (is_signed) -+ { -+ if (op >= 0) -+ { -+ if (LARCH_RELOC_UINT32_BIT_MASK (howto->bitsize - 1) & imm) -+ return bfd_reloc_overflow; -+ } -+ else -+ { -+ if ((LARCH_RELOC_UINT32_BIT_MASK (howto->bitsize - 1) & imm) -+ != LARCH_RELOC_UINT32_BIT_MASK (howto->bitsize - 1)) -+ return bfd_reloc_overflow; -+ } -+ } -+ else -+ { -+ if (LARCH_RELOC_UINT32_BIT_MASK (howto->bitsize) & imm) -+ return bfd_reloc_overflow; -+ } -+ + int bits = bfd_get_reloc_size (howto) * 8; + uint32_t insn = bfd_get (bits, input_bfd, contents + rel->r_offset); + -+ imm = imm & ((0x1U << howto->bitsize) - 1); -+ imm <<= howto->bitpos; -+ insn = (insn & howto->src_mask) -+ | ((insn & (~(uint32_t) howto->dst_mask)) | imm); ++ if (!loongarch_adjust_reloc_bitsfield(howto, &reloc_val)) ++ return bfd_reloc_overflow; ++ ++ insn = (insn & (uint32_t)howto->src_mask) ++ | ((insn & (~(uint32_t)howto->dst_mask)) | reloc_val); ++ + bfd_put (bits, input_bfd, insn, contents + rel->r_offset); + + return bfd_reloc_ok; +} + -+/* Emplace a static relocation. */ -+ +static bfd_reloc_status_type +perform_relocation (const Elf_Internal_Rela *rel, asection *input_section, + reloc_howto_type *howto, bfd_vma value, + bfd *input_bfd, bfd_byte *contents) +{ -+ uint32_t insn1; + int64_t opr1, opr2, opr3; + bfd_reloc_status_type r = bfd_reloc_ok; + int bits = bfd_get_reloc_size (howto) * 8; + -+ + switch (ELFNN_R_TYPE (rel->r_info)) + { + case R_LARCH_SOP_PUSH_PCREL: @@ -1930,14 +2514,14 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + case R_LARCH_SOP_ASSERT: + r = loongarch_pop (&opr1); -+ if (r != bfd_reloc_ok || opr1 == false) ++ if (r != bfd_reloc_ok || !opr1) + r = bfd_reloc_notsupported; + break; + + case R_LARCH_SOP_NOT: + r = loongarch_pop (&opr1); + if (r == bfd_reloc_ok) -+ r= loongarch_push (!opr1); ++ r = loongarch_push (!opr1); + break; + + case R_LARCH_SOP_SUB: @@ -1978,20 +2562,11 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + case R_LARCH_SOP_POP_32_S_10_12: + case R_LARCH_SOP_POP_32_S_10_16: + case R_LARCH_SOP_POP_32_S_10_16_S2: ++ case R_LARCH_SOP_POP_32_S_0_5_10_16_S2: ++ case R_LARCH_SOP_POP_32_S_0_10_10_16_S2: + case R_LARCH_SOP_POP_32_S_5_20: -+ r = loongarch_pop (&opr1); -+ if (r != bfd_reloc_ok) -+ break; -+ r = loongarch_check_offset (rel, input_section); -+ if (r != bfd_reloc_ok) -+ break; -+ -+ r = loongarch_reloc_rewrite_imm_insn (rel, input_section, -+ howto, input_bfd, -+ contents, opr1, true); -+ break; -+ + case R_LARCH_SOP_POP_32_U_10_12: ++ case R_LARCH_SOP_POP_32_U: + r = loongarch_pop (&opr1); + if (r != bfd_reloc_ok) + break; @@ -2001,84 +2576,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + r = loongarch_reloc_rewrite_imm_insn (rel, input_section, + howto, input_bfd, -+ contents, opr1, false); -+ break; -+ -+ case R_LARCH_SOP_POP_32_S_0_5_10_16_S2: -+ { -+ r = loongarch_pop (&opr1); -+ if (r != bfd_reloc_ok) -+ break; -+ -+ if ((opr1 & 0x3) != 0) -+ { -+ r = bfd_reloc_overflow; -+ break; -+ } -+ -+ uint32_t imm = opr1 >> howto->rightshift; -+ if ((imm & (~0xfffffU)) && ((imm & (~0xfffffU)) != (~0xfffffU))) -+ { -+ r = bfd_reloc_overflow; -+ break; -+ } -+ -+ r = loongarch_check_offset (rel, input_section); -+ if (r != bfd_reloc_ok) -+ break; -+ -+ insn1 = bfd_get (bits, input_bfd, contents + rel->r_offset); -+ insn1 = (insn1 & howto->src_mask) -+ | ((imm & 0xffffU) << 10) -+ | ((imm & 0x1f0000U) >> 16); -+ bfd_put (bits, input_bfd, insn1, contents + rel->r_offset); -+ break; -+ } -+ -+ case R_LARCH_SOP_POP_32_S_0_10_10_16_S2: -+ { -+ r = loongarch_pop (&opr1); -+ if (r != bfd_reloc_ok) -+ break; -+ -+ if ((opr1 & 0x3) != 0) -+ { -+ r = bfd_reloc_overflow; -+ break; -+ } -+ -+ uint32_t imm = opr1 >> howto->rightshift; -+ if ((imm & (~0x1ffffffU)) && (imm & (~0x1ffffffU)) != (~0x1ffffffU)) -+ { -+ r = bfd_reloc_overflow; -+ break; -+ } -+ -+ r = loongarch_check_offset (rel, input_section); -+ if (r != bfd_reloc_ok) -+ break; -+ -+ insn1 = bfd_get (bits, input_bfd, contents + rel->r_offset); -+ insn1 = (insn1 & howto->src_mask) -+ | ((imm & 0xffffU) << 10) -+ | ((imm & 0x3ff0000U) >> 16); -+ bfd_put (bits, input_bfd, insn1, contents + rel->r_offset); -+ break; -+ } -+ -+ case R_LARCH_SOP_POP_32_U: -+ r = loongarch_pop (&opr1); -+ if (r != bfd_reloc_ok) -+ break; -+ if ((uint64_t)opr1 & ~(uint64_t) 0xffffffff) -+ r = bfd_reloc_overflow; -+ if (r != bfd_reloc_ok) -+ break; -+ r = loongarch_check_offset (rel, input_section); -+ if (r != bfd_reloc_ok) -+ break; -+ -+ bfd_put (bits, input_bfd, opr1, contents + rel->r_offset); ++ contents, (bfd_vma)opr1); + break; + + case R_LARCH_TLS_DTPREL32: @@ -2102,8 +2600,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + break; + + opr1 = bfd_get (bits, input_bfd, contents + rel->r_offset); -+ bfd_put (bits, input_bfd, opr1 + value, -+ contents + rel->r_offset); ++ bfd_put (bits, input_bfd, opr1 + value, contents + rel->r_offset); + break; + + case R_LARCH_SUB8: @@ -2116,8 +2613,67 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + break; + + opr1 = bfd_get (bits, input_bfd, contents + rel->r_offset); -+ bfd_put (bits, input_bfd, opr1 - value, -+ contents + rel->r_offset); ++ bfd_put (bits, input_bfd, opr1 - value, contents + rel->r_offset); ++ break; ++ ++ /* For eh_frame and debug info. */ ++ case R_LARCH_32_PCREL: ++ value -= sec_addr (input_section) + rel->r_offset; ++ value += rel->r_addend; ++ bfd_vma word = bfd_get (howto->bitsize, input_bfd, ++ contents + rel->r_offset); ++ word = (word & ~howto->dst_mask) | (value & howto->dst_mask); ++ bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset); ++ r = bfd_reloc_ok; ++ break; ++ ++ /* New reloc type. ++ R_LARCH_B16 ~ R_LARCH_TLS_GD_HI20. */ ++ case R_LARCH_B16: ++ case R_LARCH_B21: ++ case R_LARCH_B26: ++ case R_LARCH_ABS_HI20: ++ case R_LARCH_ABS_LO12: ++ case R_LARCH_ABS64_LO20: ++ case R_LARCH_ABS64_HI12: ++ case R_LARCH_PCALA_HI20: ++ case R_LARCH_PCALA_LO12: ++ case R_LARCH_PCALA64_LO20: ++ case R_LARCH_PCALA64_HI12: ++ case R_LARCH_GOT_PC_HI20: ++ case R_LARCH_GOT_PC_LO12: ++ case R_LARCH_GOT64_PC_LO20: ++ case R_LARCH_GOT64_PC_HI12: ++ case R_LARCH_GOT_HI20: ++ case R_LARCH_GOT_LO12: ++ case R_LARCH_GOT64_LO20: ++ case R_LARCH_GOT64_HI12: ++ case R_LARCH_TLS_LE_HI20: ++ case R_LARCH_TLS_LE_LO12: ++ case R_LARCH_TLS_LE64_LO20: ++ case R_LARCH_TLS_LE64_HI12: ++ case R_LARCH_TLS_IE_PC_HI20: ++ case R_LARCH_TLS_IE_PC_LO12: ++ case R_LARCH_TLS_IE64_PC_LO20: ++ case R_LARCH_TLS_IE64_PC_HI12: ++ case R_LARCH_TLS_IE_HI20: ++ case R_LARCH_TLS_IE_LO12: ++ case R_LARCH_TLS_IE64_LO20: ++ case R_LARCH_TLS_IE64_HI12: ++ case R_LARCH_TLS_LD_PC_HI20: ++ case R_LARCH_TLS_LD_HI20: ++ case R_LARCH_TLS_GD_PC_HI20: ++ case R_LARCH_TLS_GD_HI20: ++ r = loongarch_check_offset (rel, input_section); ++ if (r != bfd_reloc_ok) ++ break; ++ ++ r = loongarch_reloc_rewrite_imm_insn (rel, input_section, ++ howto, input_bfd, ++ contents, value); ++ break; ++ ++ case R_LARCH_RELAX: + break; + + default: @@ -2148,8 +2704,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +{ + const char *ret = NULL; + if (sym) -+ ret = bfd_elf_string_from_elf_section ( -+ input_bfd, elf_symtab_hdr (input_bfd).sh_link, sym->st_name); ++ ret = bfd_elf_string_from_elf_section (input_bfd, ++ elf_symtab_hdr (input_bfd).sh_link, ++ sym->st_name); + else if (h) + ret = h->root.root.string; + @@ -2164,8 +2721,8 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + struct elf_link_hash_entry *h, bfd_vma addend) +{ + if ((larch_reloc_queue_head == 0 -+ && larch_reloc_queue_tail == LARCH_RECENT_RELOC_QUEUE_LENGTH - 1) -+ || (larch_reloc_queue_head == larch_reloc_queue_tail + 1)) ++ && larch_reloc_queue_tail == LARCH_RECENT_RELOC_QUEUE_LENGTH - 1) ++ || larch_reloc_queue_head == larch_reloc_queue_tail + 1) + larch_reloc_queue_head = + (larch_reloc_queue_head + 1) % LARCH_RECENT_RELOC_QUEUE_LENGTH; + larch_reloc_queue[larch_reloc_queue_tail].bfd = abfd; @@ -2227,7 +2784,6 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + "-- Record dump end --\n\n"); +} + -+ +static bool +loongarch_reloc_is_fatal (struct bfd_link_info *info, + bfd *input_bfd, @@ -2246,25 +2802,25 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + 'unsupport' means out of ability of relocation type + 'undefined' means we can't deal with the undefined symbol. */ + case bfd_reloc_undefined: -+ info->callbacks->undefined_symbol ( -+ info, name, input_bfd, input_section, rel->r_offset, true); -+ info->callbacks->info ( -+ "%X%pB(%pA+0x%v): error: %s against %s`%s':\n%s\n", -+ input_bfd, input_section, (bfd_vma) rel->r_offset, howto->name, -+ is_undefweak ? "[undefweak] " : "", name, msg); ++ info->callbacks->undefined_symbol (info, name, input_bfd, input_section, ++ rel->r_offset, true); ++ info->callbacks->info ("%X%pB(%pA+0x%v): error: %s against %s`%s':\n%s\n", ++ input_bfd, input_section, rel->r_offset, ++ howto->name, ++ is_undefweak ? "[undefweak] " : "", name, msg); + break; + case bfd_reloc_dangerous: -+ info->callbacks->info ( -+ "%pB(%pA+0x%v): warning: %s against %s`%s':\n%s\n", -+ input_bfd, input_section, (bfd_vma) rel->r_offset, howto->name, -+ is_undefweak ? "[undefweak] " : "", name, msg); ++ info->callbacks->info ("%pB(%pA+0x%v): warning: %s against %s`%s':\n%s\n", ++ input_bfd, input_section, rel->r_offset, ++ howto->name, ++ is_undefweak ? "[undefweak] " : "", name, msg); + fatal = false; + break; + case bfd_reloc_notsupported: -+ info->callbacks->info ( -+ "%X%pB(%pA+0x%v): error: %s against %s`%s':\n%s\n", -+ input_bfd, input_section, (bfd_vma) rel->r_offset, howto->name, -+ is_undefweak ? "[undefweak] " : "", name, msg); ++ info->callbacks->info ("%X%pB(%pA+0x%v): error: %s against %s`%s':\n%s\n", ++ input_bfd, input_section, rel->r_offset, ++ howto->name, ++ is_undefweak ? "[undefweak] " : "", name, msg); + break; + default: + break; @@ -2272,8 +2828,27 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return fatal; +} + -+ -+ ++#define RELOCATE_CALC_PC32_HI20(relocation, pc) \ ++ ({ \ ++ bfd_vma lo = (relocation) & ((bfd_vma)0xfff); \ ++ pc = pc & (~(bfd_vma)0xfff); \ ++ if (lo > 0x7ff) \ ++ { \ ++ relocation += 0x1000; \ ++ } \ ++ relocation &= ~(bfd_vma)0xfff; \ ++ relocation -= pc; \ ++ }) ++ ++#define RELOCATE_CALC_PC64_HI32(relocation, pc) \ ++ ({ \ ++ bfd_vma lo = (relocation) & ((bfd_vma)0xfff); \ ++ if (lo > 0x7ff) \ ++ { \ ++ relocation -= 0x100000000; \ ++ } \ ++ relocation -= (pc & ~(bfd_vma)0xffffffff); \ ++ }) + +static int +loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, @@ -2310,8 +2885,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + bool is_ie, is_undefweak, unresolved_reloc, defined_local; + bool resolved_local, resolved_dynly, resolved_to_const; + char tls_type; -+ bfd_vma relocation; -+ bfd_vma off, ie_off; ++ bfd_vma relocation, off, ie_off; + int i, j; + + howto = loongarch_elf_rtype_to_howto (input_bfd, r_type); @@ -2345,19 +2919,21 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + resolved_local = true; + resolved_dynly = false; + resolved_to_const = false; ++ ++ /* Calc in funtion elf_link_input_bfd, ++ * if #define elf_backend_rela_normal to 1. */ + if (bfd_link_relocatable (info) + && ELF_ST_TYPE (sym->st_info) == STT_SECTION) -+ { -+ rel->r_addend += sec->output_offset; -+ } ++ continue; + } + else + { + bool warned, ignored; + -+ RELOC_FOR_GLOBAL_SYMBOL ( -+ info, input_bfd, input_section, rel, r_symndx, symtab_hdr, -+ sym_hashes, h, sec, relocation, unresolved_reloc, warned, ignored); ++ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, ++ r_symndx, symtab_hdr, sym_hashes, ++ h, sec, relocation, ++ unresolved_reloc, warned, ignored); + /* Here means symbol isn't local symbol only and 'h != NULL'. */ + + /* The 'unresolved_syms_in_objects' specify how to deal with undefined @@ -2368,8 +2944,8 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + { + defined_local = false; + resolved_local = false; -+ resolved_to_const = !is_dyn || h->dynindx == -1 -+ || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h); ++ resolved_to_const = (!is_dyn || h->dynindx == -1 ++ || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)); + resolved_dynly = !resolved_local && !resolved_to_const; + } + else if (warned) @@ -2381,9 +2957,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + /* To avoid generating warning messages about truncated + relocations, set the relocation's address to be the same as + the start of this section. */ -+ relocation = input_section->output_section -+ ? input_section->output_section->vma -+ : 0; ++ relocation = (input_section->output_section ++ ? input_section->output_section->vma ++ : 0); + + defined_local = relocation != 0; + resolved_local = defined_local; @@ -2413,17 +2989,16 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + from removed linkonce sections, or sections discarded by a linker + script. Also for R_*_SOP_PUSH_ABSOLUTE and PCREL to specify const. */ + if (r_symndx == STN_UNDEF || bfd_is_abs_section (sec)) -+ resolved_dynly = resolved_local = defined_local = false, -+ resolved_to_const = true; ++ { ++ defined_local = false; ++ resolved_local = false; ++ resolved_dynly = false; ++ resolved_to_const = true; ++ } + -+ if (h && h->type == STT_GNU_IFUNC) ++ /* The ifunc reference generate plt. */ ++ if (h && h->type == STT_GNU_IFUNC && h->plt.offset != MINUS_ONE) + { -+ if (h->plt.offset == MINUS_ONE) -+ info->callbacks->info ("%X%pB(%pA+0x%v): error: %s against `%s':\n" -+ "STT_GNU_IFUNC must have PLT stub" -+ "\n", -+ input_bfd, input_section, -+ (bfd_vma) rel->r_offset, howto->name, name); + defined_local = true; + resolved_local = true; + resolved_dynly = false; @@ -2431,16 +3006,12 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + relocation = sec_addr (plt) + h->plt.offset; + } + -+ /* We droped sections by --gc-section while r_sym still being in -+ reloc section. Its dynindx is -1 and unresolved_reloc. personality */ -+ if (sec && unresolved_reloc && h && h->dynindx == -1) -+ RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, rel, -+ 1, relend, howto, 0, contents); -+ + unresolved_reloc = resolved_dynly; + + BFD_ASSERT (resolved_local + resolved_dynly + resolved_to_const == 1); + ++ /* BFD_ASSERT (!resolved_dynly || (h && h->dynindx != -1));. */ ++ + BFD_ASSERT (!resolved_local || defined_local); + + is_ie = false; @@ -2462,16 +3033,64 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + /* When generating a shared object, these relocations are copied + into the output file to be resolved at run time. */ + -+ outrel.r_offset = _bfd_elf_section_offset ( -+ output_bfd, info, input_section, rel->r_offset); ++ outrel.r_offset = _bfd_elf_section_offset (output_bfd, info, ++ input_section, ++ rel->r_offset); + -+ unresolved_reloc = !((bfd_vma) -2 <= outrel.r_offset) -+ && (input_section->flags & SEC_ALLOC); ++ unresolved_reloc = (!((bfd_vma) -2 <= outrel.r_offset) ++ && (input_section->flags & SEC_ALLOC)); + + outrel.r_offset += sec_addr (input_section); -+ if (resolved_dynly) ++ ++ /* A pointer point to a ifunc symbol. */ ++ if (h && h->type == STT_GNU_IFUNC) ++ { ++ if (h->dynindx == -1) ++ { ++ outrel.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); ++ outrel.r_addend = (h->root.u.def.value ++ + h->root.u.def.section->output_section->vma ++ + h->root.u.def.section->output_offset); ++ } ++ else ++ { ++ outrel.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); ++ outrel.r_addend = 0; ++ } ++ ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ { ++ ++ if (htab->elf.splt != NULL) ++ sreloc = htab->elf.srelgot; ++ else ++ sreloc = htab->elf.irelplt; ++ } ++ else ++ { ++ ++ if (bfd_link_pic (info)) ++ sreloc = htab->elf.irelifunc; ++ else if (htab->elf.splt != NULL) ++ sreloc = htab->elf.srelgot; ++ else ++ sreloc = htab->elf.irelplt; ++ } ++ } ++ else if (resolved_dynly) + { -+ outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type); ++ if (h->dynindx == -1) ++ { ++ if (h->root.type == bfd_link_hash_undefined) ++ (*info->callbacks->undefined_symbol) ++ (info, name, input_bfd, input_section, ++ rel->r_offset, true); ++ ++ outrel.r_info = ELFNN_R_INFO (0, r_type); ++ } ++ else ++ outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type); ++ + outrel.r_addend = rel->r_addend; + } + else @@ -2480,7 +3099,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + outrel.r_addend = relocation + rel->r_addend; + } + -+ if (unresolved_reloc) ++ /* No alloc space of func allocate_dynrelocs. */ ++ if (unresolved_reloc ++ && !(h && (h->is_weakalias || !h->dyn_relocs))) + loongarch_elf_append_rela (output_bfd, sreloc, &outrel); + } + @@ -2498,20 +3119,17 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + case R_LARCH_SUB32: + case R_LARCH_SUB64: + if (resolved_dynly) -+ { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, bfd_reloc_undefined, -+ is_undefweak, name, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_undefined, is_undefweak, name, + "Can't be resolved dynamically. " -+ "If this procedure is hand-writing assemble,\n" ++ "If this procedure is hand-written assembly,\n" + "there must be something like '.dword sym1 - sym2' " + "to generate these relocs\n" + "and we can't get known link-time address of " -+ "these symbols. "); -+ } ++ "these symbols.")); + else + relocation += rel->r_addend; -+ + break; + + case R_LARCH_TLS_DTPREL32: @@ -2520,11 +3138,11 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + { + Elf_Internal_Rela outrel; + -+ outrel.r_offset = _bfd_elf_section_offset ( -+ output_bfd, info, input_section, rel->r_offset); -+ -+ unresolved_reloc = !((bfd_vma) -2 <= outrel.r_offset) -+ && (input_section->flags & SEC_ALLOC); ++ outrel.r_offset = _bfd_elf_section_offset (output_bfd, info, ++ input_section, ++ rel->r_offset); ++ unresolved_reloc = (!((bfd_vma) -2 <= outrel.r_offset) ++ && (input_section->flags & SEC_ALLOC)); + outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type); + outrel.r_offset += sec_addr (input_section); + outrel.r_addend = rel->r_addend; @@ -2534,14 +3152,11 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + } + + if (resolved_to_const) -+ { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, bfd_reloc_notsupported, -+ is_undefweak, name, -+ "Internal:"); -+ } -+ break; -+ case R_LARCH_SOP_PUSH_TLS_TPREL: ++ fatal = loongarch_reloc_is_fatal (info, input_bfd, input_section, ++ rel, howto, ++ bfd_reloc_notsupported, ++ is_undefweak, name, ++ "Internal:"); + if (resolved_local) + { + if (!elf_hash_table (info)->tls_sec) @@ -2560,22 +3175,41 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + is_undefweak, name, + "TLS LE just can be resolved local only."); + } ++ + break; + -+ case R_LARCH_SOP_PUSH_ABSOLUTE: -+ if (is_undefweak) ++ case R_LARCH_SOP_PUSH_TLS_TPREL: ++ if (resolved_local) ++ { ++ if (!elf_hash_table (info)->tls_sec) ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_notsupported, is_undefweak, name, ++ "TLS section not be created")); ++ else ++ relocation -= elf_hash_table (info)->tls_sec->vma; ++ } ++ else ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_undefined, is_undefweak, name, ++ "TLS LE just can be resolved local only.")); ++ break; ++ ++ case R_LARCH_SOP_PUSH_ABSOLUTE: ++ if (is_undefweak) + { + if (resolved_dynly) -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_dangerous, is_undefweak, name, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_dangerous, is_undefweak, name, + "Someone require us to resolve undefweak " + "symbol dynamically. \n" + "But this reloc can't be done. " + "I think I can't throw error " + "for this\n" + "so I resolved it to 0. " -+ "I suggest to re-compile with '-fpic'. "); ++ "I suggest to re-compile with '-fpic'.")); + + relocation = 0; + unresolved_reloc = false; @@ -2590,32 +3224,32 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (is_pic) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, bfd_reloc_notsupported, -+ is_undefweak, name, -+ "Under PIC we don't know load address. Re-compile src " -+ "with '-fpic'?"); -+ break; ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_notsupported, is_undefweak, name, ++ "Under PIC we don't know load address. Re-compile " ++ "with '-fpic'?")); ++ break; + } + + if (resolved_dynly) + { + if (!(plt && h && h->plt.offset != MINUS_ONE)) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, bfd_reloc_undefined, -+ is_undefweak, name, -+ "Can't be resolved dynamically. Try to re-compile " -+ "src with '-fpic'?"); -+ break; ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_undefined, is_undefweak, name, ++ "Can't be resolved dynamically. Try to re-compile " ++ "with '-fpic'?")); ++ break; + } + + if (rel->r_addend != 0) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "Shouldn't be with r_addend."); ++ "Shouldn't be with r_addend.")); + break; + } + @@ -2636,12 +3270,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + case R_LARCH_SOP_PUSH_PLT_PCREL: + unresolved_reloc = false; + -+ if (resolved_to_const) -+ { -+ relocation += rel->r_addend; -+ break; -+ } -+ else if (is_undefweak) ++ if (is_undefweak) + { + i = 0, j = 0; + relocation = 0; @@ -2650,22 +3279,22 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + if (h && h->plt.offset != MINUS_ONE) + i = 1, j = 2; + else -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Undefweak need to be resolved dynamically, " -+ "but PLT stub doesn't represent."); ++ "but PLT stub doesn't represent.")); + } + } + else + { + if (!(defined_local || (h && h->plt.offset != MINUS_ONE))) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_undefined, is_undefweak, name, + "PLT stub does not represent and " -+ "symbol not defined."); ++ "symbol not defined.")); + break; + } + @@ -2674,11 +3303,11 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + else /* if (resolved_dynly) */ + { + if (!(h && h->plt.offset != MINUS_ONE)) -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Internal: PLT stub doesn't represent. " -+ "Resolve it with pcrel"); ++ "Resolve it with pcrel")); + i = 1, j = 3; + } + } @@ -2696,10 +3325,10 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + { + if (rel->r_addend != 0) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "PLT shouldn't be with r_addend."); ++ "PLT shouldn't be with r_addend.")); + break; + } + relocation = sec_addr (plt) + h->plt.offset - pc; @@ -2713,96 +3342,139 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (rel->r_addend != 0) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "Shouldn't be with r_addend."); ++ "Shouldn't be with r_addend.")); + break; + } + + if (h != NULL) + { -+ off = h->got.offset; ++ off = h->got.offset & (~1); + -+ if (off == MINUS_ONE) ++ if (h->got.offset == MINUS_ONE && h->type != STT_GNU_IFUNC) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: GOT entry doesn't represent."); ++ "Internal: GOT entry doesn't represent.")); + break; + } + -+ if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dyn, is_pic, h) -+ || (is_pic && SYMBOL_REFERENCES_LOCAL (info, h))) ++ /* Hidden symbol not has .got entry, only .got.plt entry ++ so gprel is (plt - got). */ ++ if (h->got.offset == MINUS_ONE && h->type == STT_GNU_IFUNC) + { -+ /* This is actually a static link, or it is a -+ -Bsymbolic link and the symbol is defined -+ locally, or the symbol was forced to be local -+ because of a version file. We must initialize -+ this entry in the global offset table. Since the -+ offset must always be a multiple of the word size, -+ we use the least significant bit to record whether -+ we have initialized it already. -+ -+ When doing a dynamic link, we create a .rela.got -+ relocation entry to initialize the value. This -+ is done in the finish_dynamic_symbol routine. */ -+ -+ if (resolved_dynly) ++ if (h->plt.offset == (bfd_vma) -1) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_dangerous, is_undefweak, name, -+ "Internal: here shouldn't dynamic. "); ++ abort(); + } + -+ if (!(defined_local || resolved_to_const)) ++ bfd_vma plt_index = h->plt.offset / PLT_ENTRY_SIZE; ++ off = plt_index * GOT_ENTRY_SIZE; ++ ++ if (htab->elf.splt != NULL) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_undefined, is_undefweak, name, -+ "Internal: "); -+ break; ++ /* Section .plt header is 2 times of plt entry. */ ++ off = sec_addr (htab->elf.sgotplt) + off ++ - sec_addr (htab->elf.sgot); + } -+ -+ if ((off & 1) != 0) -+ off &= ~1; + else + { -+ bfd_put_NN (output_bfd, relocation, got->contents + off); -+ h->got.offset |= 1; ++ /* Section iplt not has plt header. */ ++ off = sec_addr (htab->elf.igotplt) + off ++ - sec_addr (htab->elf.sgot); ++ } ++ } ++ ++ if ((h->got.offset & 1) == 0) ++ { ++ if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dyn, ++ bfd_link_pic (info), h) ++ && ((bfd_link_pic (info) ++ && SYMBOL_REFERENCES_LOCAL (info, h)))) ++ { ++ /* This is actually a static link, or it is a ++ -Bsymbolic link and the symbol is defined ++ locally, or the symbol was forced to be local ++ because of a version file. We must initialize ++ this entry in the global offset table. Since the ++ offset must always be a multiple of the word size, ++ we use the least significant bit to record whether ++ we have initialized it already. ++ ++ When doing a dynamic link, we create a rela.got ++ relocation entry to initialize the value. This ++ is done in the finish_dynamic_symbol routine. */ ++ ++ if (resolved_dynly) ++ { ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_dangerous, is_undefweak, name, ++ "Internal: here shouldn't dynamic.")); ++ } ++ ++ if (!(defined_local || resolved_to_const)) ++ { ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, ++ bfd_reloc_undefined, is_undefweak, name, ++ "Internal: ")); ++ break; ++ } ++ ++ asection *s; ++ Elf_Internal_Rela outrel; ++ /* We need to generate a R_LARCH_RELATIVE reloc ++ for the dynamic linker. */ ++ s = htab->elf.srelgot; ++ if (!s) ++ { ++ fatal = loongarch_reloc_is_fatal ++ (info, input_bfd, ++ input_section, rel, howto, ++ bfd_reloc_notsupported, is_undefweak, name, ++ "Internal: '.rel.got' not represent"); ++ break; ++ } ++ ++ outrel.r_offset = sec_addr (got) + off; ++ outrel.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); ++ outrel.r_addend = relocation; /* Link-time addr. */ ++ loongarch_elf_append_rela (output_bfd, s, &outrel); + } ++ bfd_put_NN (output_bfd, relocation, got->contents + off); ++ h->got.offset |= 1; + } + } + else + { + if (!local_got_offsets) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: local got offsets not reporesent."); ++ "Internal: local got offsets not reporesent.")); + break; + } + -+ off = local_got_offsets[r_symndx]; ++ off = local_got_offsets[r_symndx] & (~1); + -+ if (off == MINUS_ONE) ++ if (local_got_offsets[r_symndx] == MINUS_ONE) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: GOT entry doesn't represent."); ++ "Internal: GOT entry doesn't represent.")); + break; + } + + /* The offset must always be a multiple of the word size. + So, we can use the least significant bit to record + whether we have already processed this entry. */ -+ if ((off & 1) != 0) -+ off &= ~1; -+ else ++ if (local_got_offsets[r_symndx] == 0) + { + if (is_pic) + { @@ -2813,10 +3485,10 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + s = htab->elf.srelgot; + if (!s) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: '.rel.got' not represent"); ++ "Internal: '.rel.got' not represent")); + break; + } + @@ -2831,150 +3503,516 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + } + } + relocation = off; ++ + break; + + case R_LARCH_SOP_PUSH_TLS_GOT: + case R_LARCH_SOP_PUSH_TLS_GD: -+ if (r_type == R_LARCH_SOP_PUSH_TLS_GOT) -+ is_ie = true; ++ { ++ unresolved_reloc = false; ++ if (r_type == R_LARCH_SOP_PUSH_TLS_GOT) ++ is_ie = true; ++ ++ bfd_vma got_off = 0; ++ if (h != NULL) ++ { ++ got_off = h->got.offset; ++ h->got.offset |= 1; ++ } ++ else ++ { ++ got_off = local_got_offsets[r_symndx]; ++ local_got_offsets[r_symndx] |= 1; ++ } ++ ++ BFD_ASSERT (got_off != MINUS_ONE); ++ ++ ie_off = 0; ++ tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); ++ if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) ++ ie_off = 2 * GOT_ENTRY_SIZE; ++ ++ if ((got_off & 1) == 0) ++ { ++ Elf_Internal_Rela rela; ++ asection *srel = htab->elf.srelgot; ++ bfd_vma tls_block_off = 0; ++ ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ { ++ BFD_ASSERT (elf_hash_table (info)->tls_sec); ++ tls_block_off = relocation ++ - elf_hash_table (info)->tls_sec->vma; ++ } ++ ++ if (tls_type & GOT_TLS_GD) ++ { ++ rela.r_offset = sec_addr (got) + got_off; ++ rela.r_addend = 0; ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ { ++ /* Local sym, used in exec, set module id 1. */ ++ if (bfd_link_executable (info)) ++ bfd_put_NN (output_bfd, 1, got->contents + got_off); ++ else ++ { ++ rela.r_info = ELFNN_R_INFO (0, ++ R_LARCH_TLS_DTPMODNN); ++ loongarch_elf_append_rela (output_bfd, srel, &rela); ++ } ++ ++ bfd_put_NN (output_bfd, tls_block_off, ++ got->contents + got_off + GOT_ENTRY_SIZE); ++ } ++ /* Dynamic resolved. */ ++ else ++ { ++ /* Dynamic relocate module id. */ ++ rela.r_info = ELFNN_R_INFO (h->dynindx, ++ R_LARCH_TLS_DTPMODNN); ++ loongarch_elf_append_rela (output_bfd, srel, &rela); ++ ++ /* Dynamic relocate offset of block. */ ++ rela.r_offset += GOT_ENTRY_SIZE; ++ rela.r_info = ELFNN_R_INFO (h->dynindx, ++ R_LARCH_TLS_DTPRELNN); ++ loongarch_elf_append_rela (output_bfd, srel, &rela); ++ } ++ } ++ if (tls_type & GOT_TLS_IE) ++ { ++ rela.r_offset = sec_addr (got) + got_off + ie_off; ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ { ++ /* Local sym, used in exec, set module id 1. */ ++ if (!bfd_link_executable (info)) ++ { ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_TPRELNN); ++ rela.r_addend = tls_block_off; ++ loongarch_elf_append_rela (output_bfd, srel, &rela); ++ } ++ ++ bfd_put_NN (output_bfd, tls_block_off, ++ got->contents + got_off + ie_off); ++ } ++ /* Dynamic resolved. */ ++ else ++ { ++ /* Dynamic relocate offset of block. */ ++ rela.r_info = ELFNN_R_INFO (h->dynindx, ++ R_LARCH_TLS_TPRELNN); ++ rela.r_addend = 0; ++ loongarch_elf_append_rela (output_bfd, srel, &rela); ++ } ++ } ++ } ++ ++ relocation = (got_off & (~(bfd_vma)1)) + (is_ie ? ie_off : 0); ++ } ++ break; ++ ++ /* New reloc types. */ ++ case R_LARCH_B21: ++ case R_LARCH_B26: ++ case R_LARCH_B16: + unresolved_reloc = false; ++ if (is_undefweak) ++ { ++ relocation = 0; ++ } + -+ if (rel->r_addend != 0) ++ if (resolved_local) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_notsupported, is_undefweak, name, -+ "Shouldn't be with r_addend."); ++ relocation -= pc; ++ relocation += rel->r_addend; ++ } ++ else if (resolved_dynly) ++ { ++ BFD_ASSERT (h ++ && (h->plt.offset != MINUS_ONE ++ || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) ++ && rel->r_addend == 0); ++ if (h && h->plt.offset == MINUS_ONE ++ && ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) ++ { ++ relocation -= pc; ++ relocation += rel->r_addend; ++ } ++ else ++ relocation = sec_addr (plt) + h->plt.offset - pc; ++ } ++ ++ break; ++ ++ case R_LARCH_ABS_HI20: ++ case R_LARCH_ABS_LO12: ++ case R_LARCH_ABS64_LO20: ++ case R_LARCH_ABS64_HI12: ++ BFD_ASSERT (!is_pic); ++ ++ if (is_undefweak) ++ { ++ BFD_ASSERT (resolved_dynly); ++ relocation = 0; + break; + } ++ else if (resolved_to_const || resolved_local) ++ { ++ relocation += rel->r_addend; ++ } ++ else if (resolved_dynly) ++ { ++ unresolved_reloc = false; ++ BFD_ASSERT ((plt && h && h->plt.offset != MINUS_ONE) ++ && rel->r_addend == 0); ++ relocation = sec_addr (plt) + h->plt.offset; ++ } ++ ++ break; ++ ++ case R_LARCH_PCALA_HI20: ++ unresolved_reloc = false; ++ if (h && h->plt.offset != MINUS_ONE) ++ relocation = sec_addr (plt) + h->plt.offset; ++ else ++ relocation += rel->r_addend; ++ ++ RELOCATE_CALC_PC32_HI20 (relocation, pc); ++ ++ break; ++ ++ case R_LARCH_PCALA_LO12: ++ /* Not support if sym_addr in 2k page edge. ++ pcalau12i pc_hi20 (sym_addr) ++ ld.w/d pc_lo12 (sym_addr) ++ ld.w/d pc_lo12 (sym_addr + x) ++ ... ++ can not calc correct address ++ if sym_addr < 0x800 && sym_addr + x >= 0x800. */ ++ ++ if (h && h->plt.offset != MINUS_ONE) ++ relocation = sec_addr (plt) + h->plt.offset; ++ else ++ relocation += rel->r_addend; ++ ++ { ++ relocation &= 0xfff; ++ /* Signed extend. */ ++ relocation = (relocation ^ 0x800) - 0x800; ++ ++ /* For 2G jump, generate pcalau12i, jirl. */ ++ /* If use jirl, turns to R_LARCH_B16. */ ++ uint32_t insn = bfd_get (32, input_bfd, contents + rel->r_offset); ++ if ((insn & 0x4c000000) == 0x4c000000) ++ { ++ rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_B16); ++ howto = loongarch_elf_rtype_to_howto (input_bfd, R_LARCH_B16); ++ } ++ } ++ break; ++ ++ case R_LARCH_PCALA64_LO20: ++ case R_LARCH_PCALA64_HI12: ++ if (h && h->plt.offset != MINUS_ONE) ++ relocation = sec_addr (plt) + h->plt.offset; ++ else ++ relocation += rel->r_addend; + ++ RELOCATE_CALC_PC64_HI32 (relocation, pc); ++ ++ break; + -+ if (resolved_to_const && is_undefweak && h->dynindx != -1) ++ case R_LARCH_GOT_PC_HI20: ++ case R_LARCH_GOT_HI20: ++ /* Calc got offset. */ + { -+ /* What if undefweak? Let rtld make a decision. */ -+ resolved_to_const = resolved_local = false; -+ resolved_dynly = true; ++ unresolved_reloc = false; ++ BFD_ASSERT (rel->r_addend == 0); ++ ++ bfd_vma got_off = 0; ++ if (h != NULL) ++ { ++ /* GOT ref or ifunc. */ ++ BFD_ASSERT (h->got.offset != MINUS_ONE ++ || h->type == STT_GNU_IFUNC); ++ ++ got_off = h->got.offset & (~(bfd_vma)1); ++ /* Hidden symbol not has got entry, ++ * only got.plt entry so it is (plt - got). */ ++ if (h->got.offset == MINUS_ONE && h->type == STT_GNU_IFUNC) ++ { ++ bfd_vma idx; ++ if (htab->elf.splt != NULL) ++ { ++ idx = (h->plt.offset - PLT_HEADER_SIZE) ++ / PLT_ENTRY_SIZE; ++ got_off = sec_addr (htab->elf.sgotplt) ++ + GOTPLT_HEADER_SIZE ++ + (idx * GOT_ENTRY_SIZE) ++ - sec_addr (htab->elf.sgot); ++ } ++ else ++ { ++ idx = h->plt.offset / PLT_ENTRY_SIZE; ++ got_off = sec_addr (htab->elf.sgotplt) ++ + (idx * GOT_ENTRY_SIZE) ++ - sec_addr (htab->elf.sgot); ++ } ++ } ++ ++ if ((h->got.offset & 1) == 0) ++ { ++ /* We need to generate a R_LARCH_RELATIVE reloc once ++ * in loongarch_elf_finish_dynamic_symbol or now, ++ * call finish_dyn && nopic ++ * or !call finish_dyn && pic. */ ++ if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dyn, ++ bfd_link_pic (info), ++ h) ++ && bfd_link_pic (info) ++ && SYMBOL_REFERENCES_LOCAL (info, h)) ++ { ++ Elf_Internal_Rela rela; ++ rela.r_offset = sec_addr (got) + got_off; ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); ++ rela.r_addend = relocation; ++ loongarch_elf_append_rela (output_bfd, ++ htab->elf.srelgot, &rela); ++ } ++ h->got.offset |= 1; ++ } ++ } ++ else ++ { ++ BFD_ASSERT (local_got_offsets ++ && local_got_offsets[r_symndx] != MINUS_ONE); ++ ++ got_off = local_got_offsets[r_symndx] & (~(bfd_vma)1); ++ if ((local_got_offsets[r_symndx] & 1) == 0) ++ { ++ if (bfd_link_pic (info)) ++ { ++ Elf_Internal_Rela rela; ++ rela.r_offset = sec_addr (got) + got_off; ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); ++ rela.r_addend = relocation; ++ loongarch_elf_append_rela (output_bfd, ++ htab->elf.srelgot, &rela); ++ } ++ local_got_offsets[r_symndx] |= 1; ++ } ++ } ++ ++ bfd_put_NN (output_bfd, relocation, got->contents + got_off); ++ ++ relocation = got_off + sec_addr (got); + } + -+ if (resolved_to_const) ++ if (r_type == R_LARCH_GOT_PC_HI20) ++ RELOCATE_CALC_PC32_HI20 (relocation, pc); ++ ++ break; ++ ++ case R_LARCH_GOT_PC_LO12: ++ case R_LARCH_GOT64_PC_LO20: ++ case R_LARCH_GOT64_PC_HI12: ++ case R_LARCH_GOT_LO12: ++ case R_LARCH_GOT64_LO20: ++ case R_LARCH_GOT64_HI12: + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: Shouldn't be resolved to const."); -+ break; ++ unresolved_reloc = false; ++ bfd_vma got_off; ++ if (h) ++ got_off = h->got.offset & (~(bfd_vma)1); ++ else ++ got_off = local_got_offsets[r_symndx] & (~(bfd_vma)1); ++ ++ if (h && h->got.offset == MINUS_ONE && h->type == STT_GNU_IFUNC) ++ { ++ bfd_vma idx; ++ if (htab->elf.splt != NULL) ++ idx = (h->plt.offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; ++ else ++ idx = h->plt.offset / PLT_ENTRY_SIZE; ++ ++ got_off = sec_addr (htab->elf.sgotplt) ++ + GOTPLT_HEADER_SIZE ++ + (idx * GOT_ENTRY_SIZE) ++ - sec_addr (htab->elf.sgot); ++ } ++ relocation = got_off + sec_addr (got); + } + ++ if (r_type == R_LARCH_GOT_PC_LO12) ++ relocation &= (bfd_vma)0xfff; ++ else if (r_type == R_LARCH_GOT64_PC_LO20 ++ || r_type == R_LARCH_GOT64_PC_HI12) ++ RELOCATE_CALC_PC64_HI32 (relocation, pc); ++ ++ break; ++ ++ case R_LARCH_TLS_LE_HI20: ++ case R_LARCH_TLS_LE_LO12: ++ case R_LARCH_TLS_LE64_LO20: ++ case R_LARCH_TLS_LE64_HI12: ++ BFD_ASSERT (resolved_local && elf_hash_table (info)->tls_sec); ++ ++ relocation -= elf_hash_table (info)->tls_sec->vma; ++ break; ++ ++ /* TLS IE LD/GD process separately is troublesome. ++ When a symbol is both ie and LD/GD, h->got.off |= 1 ++ make only one type be relocated. We must use ++ h->got.offset |= 1 and h->got.offset |= 2 ++ diff IE and LD/GD. And all (got_off & (~(bfd_vma)1)) ++ (IE LD/GD and reusable GOT reloc) must change to ++ (got_off & (~(bfd_vma)3)), beause we use lowest 2 bits ++ as a tag. ++ Now, LD and GD is both GOT_TLS_GD type, LD seems to ++ can be omitted. */ ++ case R_LARCH_TLS_IE_PC_HI20: ++ case R_LARCH_TLS_IE_HI20: ++ case R_LARCH_TLS_LD_PC_HI20: ++ case R_LARCH_TLS_LD_HI20: ++ case R_LARCH_TLS_GD_PC_HI20: ++ case R_LARCH_TLS_GD_HI20: ++ BFD_ASSERT (rel->r_addend == 0); ++ unresolved_reloc = false; ++ ++ if (r_type == R_LARCH_TLS_IE_PC_HI20 ++ || r_type == R_LARCH_TLS_IE_HI20) ++ is_ie = true; ++ ++ bfd_vma got_off = 0; + if (h != NULL) + { -+ off = h->got.offset; ++ got_off = h->got.offset; + h->got.offset |= 1; + } + else + { -+ off = local_got_offsets[r_symndx]; ++ got_off = local_got_offsets[r_symndx]; + local_got_offsets[r_symndx] |= 1; + } + -+ if (off == MINUS_ONE) -+ { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: TLS GOT entry doesn't represent."); -+ break; -+ } -+ -+ tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); ++ BFD_ASSERT (got_off != MINUS_ONE); + -+ /* If this symbol is referenced by both GD and IE TLS, the IE -+ reference's GOT slot follows the GD reference's slots. */ + ie_off = 0; ++ tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); + if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) + ie_off = 2 * GOT_ENTRY_SIZE; + -+ if ((off & 1) != 0) -+ off &= ~1; -+ else ++ if ((got_off & 1) == 0) + { ++ Elf_Internal_Rela rela; ++ asection *relgot = htab->elf.srelgot; + bfd_vma tls_block_off = 0; -+ Elf_Internal_Rela outrel; + -+ if (resolved_local) ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) + { -+ if (!elf_hash_table (info)->tls_sec) -+ { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, -+ bfd_reloc_notsupported, is_undefweak, name, -+ "Internal: TLS sec not represent."); -+ break; -+ } -+ tls_block_off = -+ relocation - elf_hash_table (info)->tls_sec->vma; ++ BFD_ASSERT (elf_hash_table (info)->tls_sec); ++ tls_block_off = relocation ++ - elf_hash_table (info)->tls_sec->vma; + } + + if (tls_type & GOT_TLS_GD) + { -+ outrel.r_offset = sec_addr (got) + off; -+ outrel.r_addend = 0; -+ bfd_put_NN (output_bfd, 0, got->contents + off); -+ if (resolved_local && bfd_link_executable (info)) -+ bfd_put_NN (output_bfd, 1, got->contents + off); -+ else if (resolved_local /* && !bfd_link_executable (info) */) -+ { -+ outrel.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_DTPMODNN); -+ loongarch_elf_append_rela (output_bfd, htab->elf.srelgot, -+ &outrel); -+ } -+ else /* if (resolved_dynly) */ ++ rela.r_offset = sec_addr (got) + got_off; ++ rela.r_addend = 0; ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) + { -+ outrel.r_info = -+ ELFNN_R_INFO (h->dynindx, R_LARCH_TLS_DTPMODNN); -+ loongarch_elf_append_rela (output_bfd, htab->elf.srelgot, -+ &outrel); -+ } ++ /* Local sym, used in exec, set module id 1. */ ++ if (bfd_link_executable (info)) ++ bfd_put_NN (output_bfd, 1, got->contents + got_off); ++ else ++ { ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_DTPMODNN); ++ loongarch_elf_append_rela (output_bfd, relgot, &rela); ++ } + -+ outrel.r_offset += GOT_ENTRY_SIZE; -+ bfd_put_NN (output_bfd, tls_block_off, -+ got->contents + off + GOT_ENTRY_SIZE); -+ if (resolved_local) -+ /* DTPREL known. */; -+ else /* if (resolved_dynly) */ ++ bfd_put_NN (output_bfd, tls_block_off, ++ got->contents + got_off + GOT_ENTRY_SIZE); ++ } ++ /* Dynamic resolved. */ ++ else + { -+ outrel.r_info = -+ ELFNN_R_INFO (h->dynindx, R_LARCH_TLS_DTPRELNN); -+ loongarch_elf_append_rela (output_bfd, htab->elf.srelgot, -+ &outrel); ++ /* Dynamic relocate module id. */ ++ rela.r_info = ELFNN_R_INFO (h->dynindx, ++ R_LARCH_TLS_DTPMODNN); ++ loongarch_elf_append_rela (output_bfd, relgot, &rela); ++ ++ /* Dynamic relocate offset of block. */ ++ rela.r_offset += GOT_ENTRY_SIZE; ++ rela.r_info = ELFNN_R_INFO (h->dynindx, ++ R_LARCH_TLS_DTPRELNN); ++ loongarch_elf_append_rela (output_bfd, relgot, &rela); + } + } -+ + if (tls_type & GOT_TLS_IE) + { -+ outrel.r_offset = sec_addr (got) + off + ie_off; -+ bfd_put_NN (output_bfd, tls_block_off, -+ got->contents + off + ie_off); -+ if (resolved_local && bfd_link_executable (info)) -+ /* TPREL known. */; -+ else if (resolved_local /* && !bfd_link_executable (info) */) ++ rela.r_offset = sec_addr (got) + got_off + ie_off; ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) + { -+ outrel.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_TPRELNN); -+ outrel.r_addend = tls_block_off; -+ loongarch_elf_append_rela (output_bfd, htab->elf.srelgot, -+ &outrel); ++ /* Local sym, used in exec, set module id 1. */ ++ if (!bfd_link_executable (info)) ++ { ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_TPRELNN); ++ rela.r_addend = tls_block_off; ++ loongarch_elf_append_rela (output_bfd, relgot, &rela); ++ } ++ ++ bfd_put_NN (output_bfd, tls_block_off, ++ got->contents + got_off + ie_off); + } -+ else /* if (resolved_dynly) */ ++ /* Dynamic resolved. */ ++ else + { -+ outrel.r_info = -+ ELFNN_R_INFO (h->dynindx, R_LARCH_TLS_TPRELNN); -+ outrel.r_addend = 0; -+ loongarch_elf_append_rela (output_bfd, htab->elf.srelgot, -+ &outrel); ++ /* Dynamic relocate offset of block. */ ++ rela.r_info = ELFNN_R_INFO (h->dynindx, ++ R_LARCH_TLS_TPRELNN); ++ rela.r_addend = 0; ++ loongarch_elf_append_rela (output_bfd, relgot, &rela); + } + } + } ++ relocation = (got_off & (~(bfd_vma)1)) + sec_addr (got) ++ + (is_ie ? ie_off : 0); ++ ++ if (r_type == R_LARCH_TLS_LD_PC_HI20 ++ || r_type == R_LARCH_TLS_GD_PC_HI20 ++ || r_type == R_LARCH_TLS_IE_PC_HI20) ++ RELOCATE_CALC_PC32_HI20 (relocation, pc); ++ ++ break; ++ ++ case R_LARCH_TLS_IE_PC_LO12: ++ case R_LARCH_TLS_IE64_PC_LO20: ++ case R_LARCH_TLS_IE64_PC_HI12: ++ case R_LARCH_TLS_IE_LO12: ++ case R_LARCH_TLS_IE64_LO20: ++ case R_LARCH_TLS_IE64_HI12: ++ unresolved_reloc = false; ++ ++ if (h) ++ relocation = sec_addr (got) + (h->got.offset & (~(bfd_vma)3)); ++ else ++ relocation = sec_addr (got) ++ + (local_got_offsets[r_symndx] & (~(bfd_vma)3)); ++ ++ tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); ++ /* Use both TLS_GD and TLS_IE. */ ++ if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) ++ relocation += 2 * GOT_ENTRY_SIZE; ++ ++ if (r_type == R_LARCH_TLS_IE_PC_LO12) ++ relocation &= (bfd_vma)0xfff; ++ else if (r_type == R_LARCH_TLS_IE64_PC_LO20 ++ || r_type == R_LARCH_TLS_IE64_PC_HI12) ++ RELOCATE_CALC_PC64_HI32 (relocation, pc); ++ ++ break; + -+ relocation = off + (is_ie ? ie_off : 0); ++ case R_LARCH_RELAX: + break; + + default: @@ -2994,16 +4032,16 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + if (_bfd_elf_section_offset (output_bfd, info, input_section, + rel->r_offset) == MINUS_ONE) + /* WHY? May because it's invalid so skip checking. -+ But why dynamic reloc a invalid section? */ ++ But why dynamic reloc a invalid section? */ + break; + + if (input_section->output_section->flags & SEC_DEBUGGING) + { -+ fatal = loongarch_reloc_is_fatal (info, input_bfd, -+ input_section, rel, howto, ++ fatal = (loongarch_reloc_is_fatal ++ (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Seems dynamic linker not process " -+ "sections 'SEC_DEBUGGING'. "); ++ "sections 'SEC_DEBUGGING'.")); + } + if (!is_dyn) + break; @@ -3034,18 +4072,18 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + case bfd_reloc_overflow: + /* Overflow value can't be filled in. */ + loongarch_dump_reloc_record (info->callbacks->info); -+ info->callbacks->reloc_overflow ( -+ info, (h ? &h->root : NULL), name, howto->name, rel->r_addend, -+ input_bfd, input_section, rel->r_offset); ++ info->callbacks->reloc_overflow ++ (info, h ? &h->root : NULL, name, howto->name, rel->r_addend, ++ input_bfd, input_section, rel->r_offset); + break; + + case bfd_reloc_outofrange: + /* Stack state incorrect. */ + loongarch_dump_reloc_record (info->callbacks->info); -+ info->callbacks->info ( -+ "%X%H: Internal stack state is incorrect.\n" -+ "Want to push to full stack or pop from empty stack?\n", -+ input_bfd, input_section, rel->r_offset); ++ info->callbacks->info ++ ("%X%H: Internal stack state is incorrect.\n" ++ "Want to push to full stack or pop from empty stack?\n", ++ input_bfd, input_section, rel->r_offset); + break; + + case bfd_reloc_notsupported: @@ -3060,7 +4098,6 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + } + + fatal = true; -+ break; + } + + return !fatal; @@ -3077,31 +4114,29 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +{ + struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); + const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); -+ asection *plt = NULL; + + if (h->plt.offset != MINUS_ONE) + { + size_t i, plt_idx; -+ asection *gotplt, *relplt; ++ asection *plt, *gotplt, *relplt; + bfd_vma got_address; + uint32_t plt_entry[PLT_ENTRY_INSNS]; + bfd_byte *loc; + Elf_Internal_Rela rela; + -+ plt_idx = (h->plt.offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; -+ -+ /* One of '.plt' and '.iplt' represents. */ -+ BFD_ASSERT (!!htab->elf.splt ^ !!htab->elf.iplt); -+ + if (htab->elf.splt) + { -+ BFD_ASSERT ( -+ (h->type == STT_GNU_IFUNC && SYMBOL_REFERENCES_LOCAL (info, h)) -+ || h->dynindx != -1); ++ BFD_ASSERT ((h->type == STT_GNU_IFUNC ++ && SYMBOL_REFERENCES_LOCAL (info, h)) ++ || h->dynindx != -1); + + plt = htab->elf.splt; + gotplt = htab->elf.sgotplt; -+ relplt = htab->elf.srelplt; ++ if (h->type == STT_GNU_IFUNC && SYMBOL_REFERENCES_LOCAL (info, h)) ++ relplt = htab->elf.srelgot; ++ else ++ relplt = htab->elf.srelplt; ++ plt_idx = (h->plt.offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; + got_address = + sec_addr (gotplt) + GOTPLT_HEADER_SIZE + plt_idx * GOT_ENTRY_SIZE; + } @@ -3113,6 +4148,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + plt = htab->elf.iplt; + gotplt = htab->elf.igotplt; + relplt = htab->elf.irelplt; ++ plt_idx = h->plt.offset / PLT_ENTRY_SIZE; + got_address = sec_addr (gotplt) + plt_idx * GOT_ENTRY_SIZE; + } + @@ -3120,35 +4156,60 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + loc = plt->contents + h->plt.offset; + + /* Fill in the PLT entry itself. */ -+ if (!loongarch_make_plt_entry (got_address, sec_addr (plt) + h->plt.offset, -+ plt_entry)) ++ if (!loongarch_make_plt_entry (got_address, ++ sec_addr (plt) + h->plt.offset, ++ plt_entry)) + return false; + + for (i = 0; i < PLT_ENTRY_INSNS; i++) + bfd_put_32 (output_bfd, plt_entry[i], loc + 4 * i); + -+ /* Fill in the initial value of the .got.plt entry. */ ++ /* Fill in the initial value of the got.plt entry. */ + loc = gotplt->contents + (got_address - sec_addr (gotplt)); + bfd_put_NN (output_bfd, sec_addr (plt), loc); + + rela.r_offset = got_address; -+ if (h->type == STT_GNU_IFUNC && SYMBOL_REFERENCES_LOCAL (info, h)) ++ ++ /* TRUE if this is a PLT reference to a local IFUNC. */ ++ if (PLT_LOCAL_IFUNC_P (info, h) ++ && (relplt == htab->elf.srelgot ++ || relplt == htab->elf.irelplt)) + { -+ rela.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); -+ rela.r_addend = h->root.u.def.value -+ + h->root.u.def.section->output_section->vma -+ + h->root.u.def.section->output_offset; ++ { ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); ++ rela.r_addend = (h->root.u.def.value ++ + h->root.u.def.section->output_section->vma ++ + h->root.u.def.section->output_offset); ++ } ++ ++ /* Find the space after dyn sort. */ ++ { ++ Elf_Internal_Rela *dyn = (Elf_Internal_Rela *)relplt->contents; ++ bool fill = false; ++ for (;dyn < dyn + relplt->size / sizeof (*dyn); dyn++) ++ { ++ if (0 == dyn->r_offset) ++ { ++ bed->s->swap_reloca_out (output_bfd, &rela, ++ (bfd_byte *)dyn); ++ relplt->reloc_count++; ++ fill = true; ++ break; ++ } ++ } ++ BFD_ASSERT (fill); ++ } ++ + } + else + { -+ /* Fill in the entry in the .rela.plt section. */ ++ /* Fill in the entry in the rela.plt section. */ + rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_JUMP_SLOT); + rela.r_addend = 0; ++ loc = relplt->contents + plt_idx * sizeof (ElfNN_External_Rela); ++ bed->s->swap_reloca_out (output_bfd, &rela, loc); + } + -+ loc = relplt->contents + plt_idx * sizeof (ElfNN_External_Rela); -+ bed->s->swap_reloca_out (output_bfd, &rela, loc); -+ + if (!h->def_regular) + { + /* Mark the symbol as undefined, rather than as defined in @@ -3164,57 +4225,76 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + } + + if (h->got.offset != MINUS_ONE -+ -+ && /* TLS got entry have been handled in elf_relocate_section. */ -+ !(loongarch_elf_hash_entry (h)->tls_type & (GOT_TLS_GD | GOT_TLS_IE)) -+ -+ && /* have allocated got entry but not allocated rela before. */ -+ !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) ++ /* TLS got entry have been handled in elf_relocate_section. */ ++ && !(loongarch_elf_hash_entry (h)->tls_type & (GOT_TLS_GD | GOT_TLS_IE)) ++ /* Have allocated got entry but not allocated rela before. */ ++ && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) + { + asection *sgot, *srela; + Elf_Internal_Rela rela; -+ bfd_vma off = h->got.offset & ~(bfd_vma) 1; ++ bfd_vma off = h->got.offset & ~(bfd_vma)1; + + /* This symbol has an entry in the GOT. Set it up. */ -+ + sgot = htab->elf.sgot; + srela = htab->elf.srelgot; + BFD_ASSERT (sgot && srela); + + rela.r_offset = sec_addr (sgot) + off; + -+ if (h->type == STT_GNU_IFUNC) ++ if (h->def_regular ++ && h->type == STT_GNU_IFUNC) + { -+ if (elf_hash_table (info)->dynamic_sections_created -+ && SYMBOL_REFERENCES_LOCAL (info, h)) -+ { -+ asection *sec = h->root.u.def.section; -+ rela.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); -+ rela.r_addend = h->root.u.def.value + sec->output_section->vma -+ + sec->output_offset; -+ bfd_put_NN (output_bfd, 0, sgot->contents + off); -+ } -+ else ++ if(h->plt.offset == MINUS_ONE) + { -+ BFD_ASSERT (plt); -+ rela.r_info = ELFNN_R_INFO ( -+ 0, bfd_link_pic (info) ? R_LARCH_RELATIVE : R_LARCH_NONE); -+ rela.r_addend = -+ plt->output_section->vma + plt->output_offset + h->plt.offset; ++ if (htab->elf.splt == NULL) ++ srela = htab->elf.irelplt; ++ ++ if (SYMBOL_REFERENCES_LOCAL (info, h)) ++ { ++ asection *sec = h->root.u.def.section; ++ rela.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); ++ rela.r_addend = h->root.u.def.value + sec->output_section->vma ++ + sec->output_offset; ++ bfd_put_NN (output_bfd, 0, sgot->contents + off); ++ } ++ else ++ { ++ BFD_ASSERT (h->dynindx != -1); ++ rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); ++ rela.r_addend = 0; ++ bfd_put_NN (output_bfd, (bfd_vma) 0, sgot->contents + off); ++ } ++ } ++ else if(bfd_link_pic (info)) ++ { ++ rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); ++ rela.r_addend = 0; + bfd_put_NN (output_bfd, rela.r_addend, sgot->contents + off); + } ++ else ++ { ++ asection *plt; ++ /* For non-shared object, we can't use .got.plt, which ++ contains the real function address if we need pointer ++ equality. We load the GOT entry with the PLT entry. */ ++ plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt; ++ bfd_put_NN (output_bfd, ++ (plt->output_section->vma ++ + plt->output_offset ++ + h->plt.offset), ++ sgot->contents + off); ++ return true; ++ } + } + else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h)) + { -+ BFD_ASSERT (h->got.offset & 1 /* Has been filled in addr. */); + asection *sec = h->root.u.def.section; + rela.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); -+ rela.r_addend = h->root.u.def.value + sec->output_section->vma -+ + sec->output_offset; ++ rela.r_addend = (h->root.u.def.value + sec->output_section->vma ++ + sec->output_offset); + } + else + { -+ BFD_ASSERT ((h->got.offset & 1) == 0); + BFD_ASSERT (h->dynindx != -1); + rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); + rela.r_addend = 0; @@ -3223,24 +4303,6 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + loongarch_elf_append_rela (output_bfd, srela, &rela); + } + -+ if (h->needs_copy) -+ { -+ Elf_Internal_Rela rela; -+ asection *s; -+ -+ /* This symbols needs a copy reloc. Set it up. */ -+ BFD_ASSERT (h->dynindx != -1); -+ -+ rela.r_offset = sec_addr (h->root.u.def.section) + h->root.u.def.value; -+ rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_COPY); -+ rela.r_addend = 0; -+ if (h->root.u.def.section == htab->elf.sdynrelro) -+ s = htab->elf.sreldynrelro; -+ else -+ s = htab->elf.srelbss; -+ loongarch_elf_append_rela (output_bfd, s, &rela); -+ } -+ + /* Mark some specially defined symbols as absolute. */ + if (h == htab->elf.hdynamic || h == htab->elf.hgot || h == htab->elf.hplt) + sym->st_shndx = SHN_ABS; @@ -3334,17 +4396,15 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return false; + } + -+ if ((plt = htab->elf.splt)) -+ gotplt = htab->elf.sgotplt; -+ else if ((plt = htab->elf.iplt)) -+ gotplt = htab->elf.igotplt; ++ plt = htab->elf.splt; ++ gotplt = htab->elf.sgotplt; + + if (plt && 0 < plt->size) + { + size_t i; + uint32_t plt_header[PLT_HEADER_INSNS]; + if (!loongarch_make_plt_header (sec_addr (gotplt), sec_addr (plt), -+ plt_header)) ++ plt_header)) + return false; + + for (i = 0; i < PLT_HEADER_INSNS; i++) @@ -3360,7 +4420,7 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (bfd_is_abs_section (output_section)) + { -+ _bfd_error_handler (_ ("discarded output section: `%pA'"), ++ _bfd_error_handler (_("discarded output section: `%pA'"), + htab->elf.sgotplt); + return false; + } @@ -3434,8 +4494,8 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + 0, &sym)) + { + /* xgettext:c-format */ -+ _bfd_error_handler (_ ("%pB symbol number %lu references" -+ " nonexistent SHT_SYMTAB_SHNDX section"), ++ _bfd_error_handler (_("%pB symbol number %lu references" ++ " nonexistent SHT_SYMTAB_SHNDX section"), + abfd, r_symndx); + /* Ideally an error class should be returned here. */ + } @@ -3466,10 +4526,10 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) +{ -+ struct loongarch_elf_link_hash_entry *edir, *eind; ++ struct elf_link_hash_entry *edir, *eind; + -+ edir = (struct loongarch_elf_link_hash_entry *) dir; -+ eind = (struct loongarch_elf_link_hash_entry *) ind; ++ edir = dir; ++ eind = ind; + + if (eind->dyn_relocs != NULL) + { @@ -3504,8 +4564,9 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + + if (ind->root.type == bfd_link_hash_indirect && dir->got.refcount < 0) + { -+ edir->tls_type = eind->tls_type; -+ eind->tls_type = GOT_UNKNOWN; ++ loongarch_elf_hash_entry(edir)->tls_type ++ = loongarch_elf_hash_entry(eind)->tls_type; ++ loongarch_elf_hash_entry(eind)->tls_type = GOT_UNKNOWN; + } + _bfd_elf_link_hash_copy_indirect (info, dir, ind); +} @@ -3551,7 +4612,6 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +#define PRPSINFO_OFFSET_PR_PS_ARGS 0x38 +#define PRPSINFO_SIZEOF_PR_PS_ARGS 0x50 + -+ +static bool +loongarch_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) +{ @@ -3567,14 +4627,14 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + bfd_get_32 (abfd, note->descdata + PRPSINFO_OFFSET_PR_PID); + + /* pr_fname */ -+ elf_tdata (abfd)->core->program = _bfd_elfcore_strndup ( -+ abfd, note->descdata + PRPSINFO_OFFSET_PR_FNAME, -+ PRPSINFO_SIZEOF_PR_FNAME); ++ elf_tdata (abfd)->core->program = ++ _bfd_elfcore_strndup (abfd, note->descdata + PRPSINFO_OFFSET_PR_FNAME, ++ PRPSINFO_SIZEOF_PR_FNAME); + + /* pr_psargs */ -+ elf_tdata (abfd)->core->command = _bfd_elfcore_strndup ( -+ abfd, note->descdata + PRPSINFO_OFFSET_PR_PS_ARGS, -+ PRPSINFO_SIZEOF_PR_PS_ARGS); ++ elf_tdata (abfd)->core->command = ++ _bfd_elfcore_strndup (abfd, note->descdata + PRPSINFO_OFFSET_PR_PS_ARGS, ++ PRPSINFO_SIZEOF_PR_PS_ARGS); + break; + } + @@ -3622,6 +4682,21 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); +} + ++/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For ++ executable PLT slots where the executable never takes the address of those ++ functions, the function symbols are not added to the hash table. */ ++ ++static bool ++elf_loongarch64_hash_symbol (struct elf_link_hash_entry *h) ++{ ++ if (h->plt.offset != (bfd_vma) -1 ++ && !h->def_regular ++ && !h->pointer_equality_needed) ++ return false; ++ ++ return _bfd_elf_hash_symbol (h); ++} ++ +#define TARGET_LITTLE_SYM loongarch_elfNN_vec +#define TARGET_LITTLE_NAME "elfNN-loongarch" +#define ELF_ARCH bfd_arch_loongarch @@ -3653,17 +4728,20 @@ diff -uNr binutils-2.37.org/bfd/elfnn-loongarch.c binutils-2.37/bfd/elfnn-loonga +#define elf_backend_plt_sym_val loongarch_elf_plt_sym_val +#define elf_backend_grok_prstatus loongarch_elf_grok_prstatus +#define elf_backend_grok_psinfo loongarch_elf_grok_psinfo ++#define elf_backend_hash_symbol elf_loongarch64_hash_symbol + +#include "elfNN-target.h" -diff -uNr binutils-2.37.org/bfd/elfxx-loongarch.c binutils-2.37/bfd/elfxx-loongarch.c ---- binutils-2.37.org/bfd/elfxx-loongarch.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/bfd/elfxx-loongarch.c 2022-03-24 16:30:09.292113947 +0800 -@@ -0,0 +1,661 @@ +diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c +new file mode 100644 +index 00000000..641d16c0 +--- /dev/null ++++ b/bfd/elfxx-loongarch.c +@@ -0,0 +1,1618 @@ +/* LoongArch-specific support for ELF. -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + -+ Based on RISC-V target. ++ Based on LoongArch target. + + This file is part of BFD, the Binary File Descriptor library. + @@ -3690,693 +4768,1667 @@ diff -uNr binutils-2.37.org/bfd/elfxx-loongarch.c binutils-2.37/bfd/elfxx-loonga + +#define ALL_ONES (~ (bfd_vma) 0) + ++typedef struct loongarch_reloc_howto_type_struct ++{ ++ /* The first must be reloc_howto_type! */ ++ reloc_howto_type howto; ++ bfd_reloc_code_real_type bfd_type; ++ bool (*adjust_reloc_bits)(reloc_howto_type *, bfd_vma *); ++ const char *larch_reloc_type_name; ++} loongarch_reloc_howto_type; ++ ++#define LOONGARCH_DEFAULT_HOWTO(r_name) \ ++ { HOWTO (R_LARCH_##r_name, 0, 2, 32, false, 0, complain_overflow_signed, \ ++ bfd_elf_generic_reloc, "R_LARCH_" #r_name, false, 0, ALL_ONES, \ ++ false), BFD_RELOC_LARCH_##r_name, NULL, NULL } ++ ++#define LOONGARCH_HOWTO(type, right, size, bits, pcrel, left, ovf, func, \ ++ name, inplace, src_mask, dst_mask, pcrel_off, btype, afunc,lname) \ ++ { HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \ ++ inplace, src_mask, dst_mask, pcrel_off), btype, afunc, lname } ++ ++#define LOONGARCH_EMPTY_HOWTO(C) \ ++ { EMPTY_HOWTO (C), BFD_RELOC_NONE, NULL, NULL } ++ ++static bool ++reloc_bits (reloc_howto_type *howto, bfd_vma *val); ++static bool ++reloc_bits_b16 (reloc_howto_type *howto, bfd_vma *fix_val); ++static bool ++reloc_bits_b21 (reloc_howto_type *howto, bfd_vma *fix_val); ++static bool ++reloc_bits_b26 (reloc_howto_type *howto, bfd_vma *val); ++ +/* This does not include any relocation information, but should be + good enough for GDB or objdump to read the file. */ -+ -+static reloc_howto_type howto_table[] = ++static loongarch_reloc_howto_type loongarch_howto_table[] = +{ -+#define LOONGARCH_HOWTO(r_name) \ -+ HOWTO (R_LARCH_##r_name, 0, 2, 32, false, 0, complain_overflow_signed, \ -+ bfd_elf_generic_reloc, "R_LARCH_" #r_name, false, 0, 0xffffffff, false) -+ + /* No relocation. */ -+ HOWTO (R_LARCH_NONE, /* type (0). */ -+ 0, /* rightshift */ -+ 3, /* size */ -+ 0, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_NONE", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0, /* dst_mask */ -+ false), /* pcrel_offset */ ++ LOONGARCH_HOWTO (R_LARCH_NONE, /* type (0). */ ++ 0, /* rightshift */ ++ 3, /* size */ ++ 0, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_NONE", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ + + /* 32 bit relocation. */ -+ HOWTO (R_LARCH_32, /* type (1). */ -+ 0, /* rightshift */ -+ 2, /* size */ -+ 32, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_32", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset */ ++ LOONGARCH_HOWTO (R_LARCH_32, /* type (1). */ ++ 0, /* rightshift */ ++ 2, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_32, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ + + /* 64 bit relocation. */ -+ HOWTO (R_LARCH_64, /* type (2). */ -+ 0, /* rightshift */ -+ 4, /* size */ -+ 64, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_64", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ ALL_ONES, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_RELATIVE, /* type (3). */ -+ 0, /* rightshift */ -+ 2, /* size */ -+ 32, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_RELATIVE", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_COPY, /* type (4). */ -+ 0, /* rightshift */ -+ 0, /* this one is variable size */ -+ 0, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_bitfield, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_COPY", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_JUMP_SLOT, /* type (5). */ -+ 0, /* rightshift */ -+ 4, /* size */ -+ 64, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_bitfield, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_JUMP_SLOT", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0, /* dst_mask */ -+ false), /* pcrel_offset */ ++ LOONGARCH_HOWTO (R_LARCH_64, /* type (2). */ ++ 0, /* rightshift */ ++ 4, /* size */ ++ 64, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_64", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_64, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_RELATIVE, /* type (3). */ ++ 0, /* rightshift */ ++ 2, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_RELATIVE", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* undefined? */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_COPY, /* type (4). */ ++ 0, /* rightshift */ ++ 3, /* this one is variable size */ ++ 0, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_bitfield, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_COPY", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* undefined? */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_JUMP_SLOT, /* type (5). */ ++ 0, /* rightshift */ ++ 4, /* size */ ++ 64, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_bitfield, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_JUMP_SLOT", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* undefined? */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ + + /* Dynamic TLS relocations. */ -+ HOWTO (R_LARCH_TLS_DTPMOD32, /* type (6). */ -+ 0, /* rightshift */ -+ 2, /* size */ -+ 32, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_TLS_DTPMOD32", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_TLS_DTPMOD64, /* type (7). */ -+ 0, /* rightshift */ -+ 4, /* size */ -+ 64, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_TLS_DTPMOD64", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ ALL_ONES, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_TLS_DTPREL32, /* type (8). */ -+ 0, /* rightshift */ -+ 2, /* size */ -+ 32, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_TLS_DTPREL32", /* name */ -+ true, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_TLS_DTPREL64, /* type (9). */ -+ 0, /* rightshift */ -+ 4, /* size */ -+ 64, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_TLS_DTPREL64", /* name */ -+ true, /* partial_inplace */ -+ 0, /* src_mask */ -+ ALL_ONES, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_TLS_TPREL32, /* type (10). */ -+ 0, /* rightshift */ -+ 2, /* size */ -+ 32, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_TLS_TPREL32", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_TLS_TPREL64, /* type (11). */ -+ 0, /* rightshift */ -+ 4, /* size */ -+ 64, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_TLS_TPREL64", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ ALL_ONES, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ HOWTO (R_LARCH_IRELATIVE, /* type (12). */ -+ 0, /* rightshift */ -+ 2, /* size */ -+ 32, /* bitsize */ -+ false, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_LARCH_IRELATIVE", /* name */ -+ false, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset */ -+ -+ EMPTY_HOWTO(13), -+ EMPTY_HOWTO(14), -+ EMPTY_HOWTO(15), -+ EMPTY_HOWTO(16), -+ EMPTY_HOWTO(17), -+ EMPTY_HOWTO(18), -+ EMPTY_HOWTO(19), -+ -+ HOWTO (R_LARCH_MARK_LA, /* type (20). */ -+ 0, /* rightshift. */ -+ 3, /* size. */ -+ 0, /* bitsize. */ ++ LOONGARCH_HOWTO (R_LARCH_TLS_DTPMOD32, /* type (6). */ ++ 0, /* rightshift */ ++ 2, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_TLS_DTPMOD32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_DTPMOD32, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_DTPMOD64, /* type (7). */ ++ 0, /* rightshift */ ++ 4, /* size */ ++ 64, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_TLS_DTPMOD64", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_DTPMOD64, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_DTPREL32, /* type (8). */ ++ 0, /* rightshift */ ++ 2, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_TLS_DTPREL32", /* name */ ++ true, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_DTPREL32, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_DTPREL64, /* type (9). */ ++ 0, /* rightshift */ ++ 4, /* size */ ++ 64, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_TLS_DTPREL64", /* name */ ++ true, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_DTPREL64, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_TPREL32, /* type (10). */ ++ 0, /* rightshift */ ++ 2, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_TLS_TPREL32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_TPREL32, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_TPREL64, /* type (11). */ ++ 0, /* rightshift */ ++ 4, /* size */ ++ 64, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_TLS_TPREL64", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_TPREL64, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_IRELATIVE, /* type (12). */ ++ 0, /* rightshift */ ++ 2, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_IRELATIVE", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* undefined? */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_EMPTY_HOWTO (13), ++ LOONGARCH_EMPTY_HOWTO (14), ++ LOONGARCH_EMPTY_HOWTO (15), ++ LOONGARCH_EMPTY_HOWTO (16), ++ LOONGARCH_EMPTY_HOWTO (17), ++ LOONGARCH_EMPTY_HOWTO (18), ++ LOONGARCH_EMPTY_HOWTO (19), ++ ++ LOONGARCH_HOWTO (R_LARCH_MARK_LA, /* type (20). */ ++ 0, /* rightshift. */ ++ 3, /* size. */ ++ 0, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_MARK_LA", /* name. */ -+ false, /* partial_inplace. */ ++ false, /* partial_inplace. */ + 0, /* src_mask. */ + 0, /* dst_mask. */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_MARK_PCREL, /* type (21). */ -+ 0, /* rightshift. */ -+ 3, /* size. */ -+ 0, /* bitsize. */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_MARK_LA, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_MARK_PCREL, /* type (21). */ ++ 0, /* rightshift. */ ++ 3, /* size. */ ++ 0, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_MARK_PCREL", /* name. */ -+ false, /* partial_inplace. */ ++ false, /* partial_inplace. */ + 0, /* src_mask. */ + 0, /* dst_mask. */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_PUSH_PCREL, /* type (22). */ -+ 2, /* rightshift. */ -+ 2, /* size. */ -+ 32, /* bitsize. */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_MARK_PCREL, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_PUSH_PCREL, /* type (22). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 32, /* bitsize. */ + true /* FIXME: somewhat use this. */, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_PUSH_PCREL", /* name. */ -+ false, /* partial_inplace. */ -+ 0x03ffffff, /* src_mask. */ -+ 0x03ffffff, /* dst_mask. */ -+ false), /* pcrel_offset. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_PUSH_PCREL", /* name. */ ++ false, /* partial_inplace. */ ++ 0x03ffffff, /* src_mask. */ ++ 0x03ffffff, /* dst_mask. */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_PUSH_PCREL, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ + + /* type 23-37. */ -+ LOONGARCH_HOWTO (SOP_PUSH_ABSOLUTE), -+ LOONGARCH_HOWTO (SOP_PUSH_DUP), -+ LOONGARCH_HOWTO (SOP_PUSH_GPREL), -+ LOONGARCH_HOWTO (SOP_PUSH_TLS_TPREL), -+ LOONGARCH_HOWTO (SOP_PUSH_TLS_GOT), -+ LOONGARCH_HOWTO (SOP_PUSH_TLS_GD), -+ LOONGARCH_HOWTO (SOP_PUSH_PLT_PCREL), -+ LOONGARCH_HOWTO (SOP_ASSERT), -+ LOONGARCH_HOWTO (SOP_NOT), -+ LOONGARCH_HOWTO (SOP_SUB), -+ LOONGARCH_HOWTO (SOP_SL), -+ LOONGARCH_HOWTO (SOP_SR), -+ LOONGARCH_HOWTO (SOP_ADD), -+ LOONGARCH_HOWTO (SOP_AND), -+ LOONGARCH_HOWTO (SOP_IF_ELSE), -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_10_5, /* type (38). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 5, /* bitsize. */ ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_ABSOLUTE), ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_DUP), ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_GPREL), ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_TLS_TPREL), ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_TLS_GOT), ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_TLS_GD), ++ LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_PLT_PCREL), ++ LOONGARCH_DEFAULT_HOWTO (SOP_ASSERT), ++ LOONGARCH_DEFAULT_HOWTO (SOP_NOT), ++ LOONGARCH_DEFAULT_HOWTO (SOP_SUB), ++ LOONGARCH_DEFAULT_HOWTO (SOP_SL), ++ LOONGARCH_DEFAULT_HOWTO (SOP_SR), ++ LOONGARCH_DEFAULT_HOWTO (SOP_ADD), ++ LOONGARCH_DEFAULT_HOWTO (SOP_AND), ++ LOONGARCH_DEFAULT_HOWTO (SOP_IF_ELSE), ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_5, /* type (38). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 5, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_10_5", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x7c00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_5, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_U_10_12, /* type (39). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_unsigned, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_U_10_12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_U_10_12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_12, /* type (40). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_10_12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_16, /* type (41). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 16, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_10_16", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3fffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_16, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_16_S2, /* type (42). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 16, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_10_16_S2", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3fffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2, /* bfd_reloc_code_real_type */ ++ reloc_bits_b16, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_5_20, /* type (43). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_5_20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_5_20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_0_5_10_16_S2, ++ /* type (44). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 21, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_0_5_10_16_S2", /* name. */ ++ false, /* partial_inplace. */ ++ 0xfc0003e0, /* src_mask */ ++ 0xfc0003e0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2, ++ /* bfd_reloc_code_real_type */ ++ reloc_bits_b21, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_0_10_10_16_S2, /* type (45). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 26, /* bitsize. */ + false, /* pc_relative. */ -+ 10, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_10_5", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_0_10_10_16_S2", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0x7c00, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_U_10_12, /* type (39). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 12, /* bitsize. */ ++ 0x03ffffff, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2, ++ /* bfd_reloc_code_real_type */ ++ reloc_bits_b26, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_U, /* type (46). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 32, /* bitsize. */ + false, /* pc_relative. */ -+ 10, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_U_10_12", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_unsigned, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SOP_POP_32_S_U", /* name. */ ++ false, /* partial_inplace. */ ++ 0xffffffff00000000, /* src_mask */ ++ 0x00000000ffffffff, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SOP_POP_32_U, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ADD8, /* type (47). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 8, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ADD8", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0x3ffc00, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_10_12, /* type (40). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 12, /* bitsize. */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ADD8, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ADD16, /* type (48). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 16, /* bitsize. */ + false, /* pc_relative. */ -+ 10, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_10_12", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ADD16", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0x3ffc00, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_10_16, /* type (41). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 16, /* bitsize. */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ADD16, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ADD24, /* type (49). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 24, /* bitsize. */ + false, /* pc_relative. */ -+ 10, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_10_16", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ADD24", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0x3fffc00, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_10_16_S2, /* type (42). */ -+ 2, /* rightshift. */ -+ 2, /* size. */ -+ 16, /* bitsize. */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ADD24, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ADD32, /* type (50). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 32, /* bitsize. */ + false, /* pc_relative. */ -+ 10, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_10_16_S2", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ADD32", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0x3fffc00, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_5_20, /* type (43). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 20, /* bitsize. */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ADD32, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ADD64, /* type (51). */ ++ 0, /* rightshift. */ ++ 4, /* size. */ ++ 64, /* bitsize. */ + false, /* pc_relative. */ -+ 5, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_5_20", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ADD64", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0x1fffe0, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_0_5_10_16_S2, /* type (44). */ -+ 2, /* rightshift. */ -+ 2, /* size. */ -+ 21, /* bitsize. */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ADD64, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SUB8, /* type (52). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 8, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SUB8", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SUB8, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SUB16, /* type (53). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 16, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SUB16", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SUB16, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SUB24, /* type (54). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 24, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SUB24", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SUB24, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SUB32, /* type (55). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 32, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_0_5_10_16_S2", /* name. */ -+ false, /* partial_inplace. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SUB32", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SUB32, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_SUB64, /* type (56). */ ++ 0, /* rightshift. */ ++ 4, /* size. */ ++ 64, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_SUB64", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ ALL_ONES, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_SUB64, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GNU_VTINHERIT, /* type (57). */ ++ 0, /* rightshift. */ ++ 3, /* size. */ ++ 0, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GNU_VTINHERIT", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GNU_VTENTRY, /* type (58). */ ++ 0, /* rightshift. */ ++ 3, /* size. */ ++ 0, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ NULL, /* special_function. */ ++ "R_LARCH_GNU_VTENTRY", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_NONE, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_EMPTY_HOWTO (59), ++ LOONGARCH_EMPTY_HOWTO (60), ++ LOONGARCH_EMPTY_HOWTO (61), ++ LOONGARCH_EMPTY_HOWTO (62), ++ LOONGARCH_EMPTY_HOWTO (63), ++ ++ /* New reloc types. */ ++ LOONGARCH_HOWTO (R_LARCH_B16, /* type (64). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 16, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_B16", /* name. */ ++ false, /* partial_inplace. */ ++ 0x3fffc00, /* src_mask */ ++ 0x3fffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_B16, /* bfd_reloc_code_real_type */ ++ reloc_bits_b16, /* adjust_reloc_bits */ ++ "b16"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_B21, /* type (65). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 21, /* bitsize. */ ++ false, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_B21", /* name. */ ++ false, /* partial_inplace. */ + 0xfc0003e0, /* src_mask */ + 0xfc0003e0, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_S_0_10_10_16_S2, /* type (45). */ -+ 2, /* rightshift. */ -+ 2, /* size. */ -+ 26, /* bitsize. */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_B21, /* bfd_reloc_code_real_type */ ++ reloc_bits_b21, /* adjust_reloc_bits */ ++ "b21"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_B26, /* type (66). */ ++ 2, /* rightshift. */ ++ 2, /* size. */ ++ 26, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_0_10_10_16_S2", /* name. */ -+ false, /* partial_inplace. */ -+ 0xfc000000, /* src_mask */ -+ 0xfc000000, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SOP_POP_32_U, /* type (46). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 32, /* bitsize. */ ++ 0, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_B26", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x03ffffff, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_B26, /* bfd_reloc_code_real_type */ ++ reloc_bits_b26, /* adjust_reloc_bits */ ++ "b26"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ABS_HI20, /* type (67). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SOP_POP_32_S_U", /* name. */ -+ false, /* partial_inplace. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ABS_HI20", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_ADD8, /* type (47). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 8, /* bitsize. */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ABS_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "abs_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ABS_LO12, /* type (68). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_ADD8", /* name. */ -+ false, /* partial_inplace. */ ++ 10, /* bitpos. */ ++ complain_overflow_unsigned, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ABS_LO12", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_ADD16, /* type (48). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 16, /* bitsize. */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ABS_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "abs_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ABS64_LO20, /* type (69). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_ADD16", /* name. */ -+ false, /* partial_inplace. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ABS64_LO20", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_ADD24, /* type (49). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 24, /* bitsize. */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ABS64_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "abs64_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_ABS64_HI12, /* type (70). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_ADD24", /* name. */ -+ false, /* partial_inplace. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_ABS64_HI12", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_ADD32, /* type (50). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 32, /* bitsize. */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_ABS64_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "abs64_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_PCALA_HI20, /* type (71). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_ADD32", /* name. */ -+ false, /* partial_inplace. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_PCALA_HI20", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_ADD64, /* type (51). */ -+ 0, /* rightshift. */ -+ 4, /* size. */ -+ 64, /* bitsize. */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_PCALA_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "pc_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_PCALA_LO12, /* type (72). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_ADD64", /* name. */ -+ false, /* partial_inplace. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_PCALA_LO12", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ ALL_ONES, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SUB8, /* type (52). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 8, /* bitsize. */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_PCALA_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "pc_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_PCALA64_LO20, /* type (73). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SUB8", /* name. */ -+ false, /* partial_inplace. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_PCALA64_LO20", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SUB16, /* type (53). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 16, /* bitsize. */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_PCALA64_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "pc64_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_PCALA64_HI12, /* type (74). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SUB16", /* name. */ -+ false, /* partial_inplace. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_PCALA64_HI12", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SUB24, /* type (54). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 24, /* bitsize. */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_PCALA64_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "pc64_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT_PC_HI20, /* type (75). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SUB24", /* name. */ -+ false, /* partial_inplace. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT_PC_HI20", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SUB32, /* type (55). */ -+ 0, /* rightshift. */ -+ 2, /* size. */ -+ 32, /* bitsize. */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT_PC_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got_pc_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT_PC_LO12, /* type (76). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SUB32", /* name. */ -+ false, /* partial_inplace. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT_PC_LO12", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ 0xffffffff, /* dst_mask */ -+ false), /* pcrel_offset. */ -+ -+ HOWTO (R_LARCH_SUB64, /* type (56). */ -+ 0, /* rightshift. */ -+ 4, /* size. */ -+ 64, /* bitsize. */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT_PC_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got_pc_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT64_PC_LO20, /* type (77). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ + false, /* pc_relative. */ -+ 0, /* bitpos. */ -+ complain_overflow_signed, /* complain_on_overflow. */ -+ bfd_elf_generic_reloc, /* special_function. */ -+ "R_LARCH_SUB64", /* name. */ -+ false, /* partial_inplace. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT64_PC_LO20", /* name. */ ++ false, /* partial_inplace. */ + 0, /* src_mask */ -+ ALL_ONES, /* dst_mask */ -+ false), /* pcrel_offset. */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT64_PC_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got64_pc_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT64_PC_HI12, /* type (78). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT64_PC_HI12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT64_PC_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got64_pc_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT_HI20, /* type (79). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT_LO12, /* type (80). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT_LO12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT64_LO20, /* type (81). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT64_LO20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT64_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got64_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_GOT64_HI12, /* type (82). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_GOT64_HI12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_GOT64_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "got64_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20, /* type (83). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_LE_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_LE_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "le_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12, /* type (84). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_LE_LO12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_LE_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "le_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_LE64_LO20, /* type (85). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_LE64_LO20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_LE64_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "le64_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_LE64_HI12, /* type (86). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_LE64_HI12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_LE64_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "le64_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE_PC_HI20, /* type (87). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE_PC_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE_PC_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie_pc_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE_PC_LO12, /* type (88). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_unsigned, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE_PC_LO12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE_PC_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie_pc_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE64_PC_LO20, /* type (89). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE64_PC_LO20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE64_PC_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie64_pc_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE64_PC_HI12, /* type (90). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE64_PC_HI12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE64_PC_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie64_pc_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE_HI20, /* type (91). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE_LO12, /* type (92). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE_LO12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE_LO12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie_lo12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE64_LO20, /* type (93). */ ++ 32, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE64_LO20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE64_LO20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie64_lo20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_IE64_HI12, /* type (94). */ ++ 52, /* rightshift. */ ++ 2, /* size. */ ++ 12, /* bitsize. */ ++ false, /* pc_relative. */ ++ 10, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_IE64_HI12", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x3ffc00, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_IE64_HI12, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ie64_hi12"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_LD_PC_HI20, /* type (95). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_LD_PC_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_LD_PC_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ld_pc_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_LD_HI20, /* type (96). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_LD_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_LD_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "ld_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_GD_PC_HI20, /* type (97). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_GD_PC_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_GD_PC_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "gd_pc_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_TLS_GD_HI20, /* type (98). */ ++ 12, /* rightshift. */ ++ 2, /* size. */ ++ 20, /* bitsize. */ ++ false, /* pc_relative. */ ++ 5, /* bitpos. */ ++ complain_overflow_signed, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_TLS_GD_HI20", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0x1ffffe0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_TLS_GD_HI20, /* bfd_reloc_code_real_type */ ++ reloc_bits, /* adjust_reloc_bits */ ++ "gd_hi20"), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_32_PCREL, /* type (99). */ ++ 0, /* rightshift. */ ++ 2, /* size. */ ++ 32, /* bitsize. */ ++ true, /* pc_relative. */ ++ 0, /* bitpos. */ ++ complain_overflow_dont, /* complain_on_overflow. */ ++ bfd_elf_generic_reloc, /* special_function. */ ++ "R_LARCH_32_PCREL", /* name. */ ++ false, /* partial_inplace. */ ++ 0, /* src_mask */ ++ 0xffffffff, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_32_PCREL, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ ++ ++ LOONGARCH_HOWTO (R_LARCH_RELAX, /* type (100). */ ++ 0, /* rightshift */ ++ 0, /* size */ ++ 0, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_LARCH_RELAX", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0, /* dst_mask */ ++ false, /* pcrel_offset */ ++ BFD_RELOC_LARCH_RELAX, /* bfd_reloc_code_real_type */ ++ NULL, /* adjust_reloc_bits */ ++ NULL), /* larch_reloc_type_name */ + +}; + -+struct elf_reloc_map ++reloc_howto_type * ++loongarch_elf_rtype_to_howto (bfd *abfd, unsigned int r_type) +{ -+ bfd_reloc_code_real_type bfd_val; -+ enum elf_loongarch_reloc_type elf_val; -+}; ++ if(r_type < R_LARCH_count) ++ { ++ /* For search table fast. */ ++ BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count); + -+static const struct elf_reloc_map larch_reloc_map[] = -+{ -+ { BFD_RELOC_NONE, R_LARCH_NONE }, -+ { BFD_RELOC_32, R_LARCH_32 }, -+ { BFD_RELOC_64, R_LARCH_64 }, ++ if (loongarch_howto_table[r_type].howto.type == r_type) ++ return (reloc_howto_type *)&loongarch_howto_table[r_type]; + -+#define LOONGARCH_reloc_map(r_name) \ -+ { \ -+ BFD_RELOC_LARCH_##r_name, R_LARCH_##r_name \ -+ } -+ LOONGARCH_reloc_map (TLS_DTPMOD32), -+ LOONGARCH_reloc_map (TLS_DTPMOD64), -+ LOONGARCH_reloc_map (TLS_DTPREL32), -+ LOONGARCH_reloc_map (TLS_DTPREL64), -+ LOONGARCH_reloc_map (TLS_TPREL32), -+ LOONGARCH_reloc_map (TLS_TPREL64), -+ -+ LOONGARCH_reloc_map (MARK_LA), -+ LOONGARCH_reloc_map (MARK_PCREL), -+ LOONGARCH_reloc_map (SOP_PUSH_PCREL), -+ LOONGARCH_reloc_map (SOP_PUSH_ABSOLUTE), -+ LOONGARCH_reloc_map (SOP_PUSH_DUP), -+ LOONGARCH_reloc_map (SOP_PUSH_GPREL), -+ LOONGARCH_reloc_map (SOP_PUSH_TLS_TPREL), -+ LOONGARCH_reloc_map (SOP_PUSH_TLS_GOT), -+ LOONGARCH_reloc_map (SOP_PUSH_TLS_GD), -+ LOONGARCH_reloc_map (SOP_PUSH_PLT_PCREL), -+ LOONGARCH_reloc_map (SOP_ASSERT), -+ LOONGARCH_reloc_map (SOP_NOT), -+ LOONGARCH_reloc_map (SOP_SUB), -+ LOONGARCH_reloc_map (SOP_SL), -+ LOONGARCH_reloc_map (SOP_SR), -+ LOONGARCH_reloc_map (SOP_ADD), -+ LOONGARCH_reloc_map (SOP_AND), -+ LOONGARCH_reloc_map (SOP_IF_ELSE), -+ LOONGARCH_reloc_map (SOP_POP_32_S_10_5), -+ LOONGARCH_reloc_map (SOP_POP_32_U_10_12), -+ LOONGARCH_reloc_map (SOP_POP_32_S_10_12), -+ LOONGARCH_reloc_map (SOP_POP_32_S_10_16), -+ LOONGARCH_reloc_map (SOP_POP_32_S_10_16_S2), -+ LOONGARCH_reloc_map (SOP_POP_32_S_5_20), -+ LOONGARCH_reloc_map (SOP_POP_32_S_0_5_10_16_S2), -+ LOONGARCH_reloc_map (SOP_POP_32_S_0_10_10_16_S2), -+ LOONGARCH_reloc_map (SOP_POP_32_U), -+ LOONGARCH_reloc_map (ADD8), -+ LOONGARCH_reloc_map (ADD16), -+ LOONGARCH_reloc_map (ADD24), -+ LOONGARCH_reloc_map (ADD32), -+ LOONGARCH_reloc_map (ADD64), -+ LOONGARCH_reloc_map (SUB8), -+ LOONGARCH_reloc_map (SUB16), -+ LOONGARCH_reloc_map (SUB24), -+ LOONGARCH_reloc_map (SUB32), -+ LOONGARCH_reloc_map (SUB64), -+}; ++ for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) ++ if (loongarch_howto_table[i].howto.type == r_type) ++ return (reloc_howto_type *)&loongarch_howto_table[i]; ++ } ++ ++ (*_bfd_error_handler) (_("%pB: unsupported relocation type %#x"), ++ abfd, r_type); ++ bfd_set_error (bfd_error_bad_value); ++ return NULL; ++} + +reloc_howto_type * -+loongarch_elf_rtype_to_howto (bfd *abfd, unsigned int r_type) ++loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name) +{ -+ size_t i; -+ for (i = 0; i < ARRAY_SIZE (howto_table); i++) -+ if (howto_table[i].type == r_type) -+ return &howto_table[i]; ++ BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count); + -+ (*_bfd_error_handler) (_("%pB: unsupported relocation type %#x"), -+ abfd, r_type); ++ for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) ++ if (loongarch_howto_table[i].howto.name ++ && strcasecmp (loongarch_howto_table[i].howto.name, r_name) == 0) ++ return (reloc_howto_type *)&loongarch_howto_table[i]; ++ ++ (*_bfd_error_handler) (_("%pB: unsupported relocation type %s"), ++ abfd, r_name); + bfd_set_error (bfd_error_bad_value); ++ + return NULL; +} + ++/* Cost so much. */ +reloc_howto_type * +loongarch_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ -+ unsigned int i; -+ for (i = 0; i < ARRAY_SIZE (larch_reloc_map); i++) -+ if (larch_reloc_map[i].bfd_val == code) -+ return loongarch_elf_rtype_to_howto (abfd, -+ (int) larch_reloc_map[i].elf_val); ++ BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count); ++ ++ /* Fast search for new reloc types. */ ++ if (BFD_RELOC_LARCH_B16 <= code && code < BFD_RELOC_LARCH_RELAX) ++ { ++ BFD_ASSERT (BFD_RELOC_LARCH_RELAX - BFD_RELOC_LARCH_B16 ++ == R_LARCH_RELAX - R_LARCH_B16); ++ loongarch_reloc_howto_type *ht = NULL; ++ ht = &loongarch_howto_table[code - BFD_RELOC_LARCH_B16 + R_LARCH_B16]; ++ BFD_ASSERT (ht->bfd_type == code); ++ return (reloc_howto_type *)ht; ++ } ++ ++ for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) ++ if (loongarch_howto_table[i].bfd_type == code) ++ return (reloc_howto_type *)&loongarch_howto_table[i]; ++ ++ (*_bfd_error_handler) (_("%pB: unsupported bfd relocation type %#x"), ++ abfd, code); ++ bfd_set_error (bfd_error_bad_value); + + return NULL; +} + -+reloc_howto_type * -+loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name) ++bfd_reloc_code_real_type ++loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, ++ const char *l_r_name) ++{ ++ for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) ++ { ++ loongarch_reloc_howto_type *lht = &loongarch_howto_table[i]; ++ if ((NULL != lht->larch_reloc_type_name) ++ && (0 == strcmp (lht->larch_reloc_type_name, l_r_name))) ++ return lht->bfd_type; ++ } ++ ++ (*_bfd_error_handler) (_("%pB: unsupported relocation type name %s"), ++ abfd, l_r_name); ++ bfd_set_error (bfd_error_bad_value); ++ return BFD_RELOC_NONE; ++} ++ ++ ++/* Functions for reloc bits field. ++ 1. Signed extend *fix_val. ++ 2. Return false if overflow. */ ++ ++#define LARCH_RELOC_BFD_VMA_BIT_MASK(bitsize) \ ++ (~((((bfd_vma)0x1) << (bitsize)) - 1)) ++ ++/* Adjust val to perform insn ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_5 ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_12 ++ BFD_RELOC_LARCH_SOP_POP_32_U_10_12 ++ BFD_RELOC_LARCH_SOP_POP_32_S_10_16 ++ BFD_RELOC_LARCH_SOP_POP_32_S_5_20 ++ BFD_RELOC_LARCH_SOP_POP_32_U. */ ++static bool ++reloc_bits (reloc_howto_type *howto, bfd_vma *fix_val) +{ -+ unsigned int i; ++ bfd_signed_vma val = ((bfd_signed_vma)(*fix_val)) >> howto->rightshift; + -+ for (i = 0; i < ARRAY_SIZE (howto_table); i++) -+ if (howto_table[i].name && strcasecmp (howto_table[i].name, r_name) == 0) -+ return &howto_table[i]; ++ /* Perform insn bits field. */ ++ val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); ++ val <<= howto->bitpos; + -+ return NULL; ++ *fix_val = (bfd_vma)val; ++ ++ return true; +} -diff -uNr binutils-2.37.org/bfd/elfxx-loongarch.h binutils-2.37/bfd/elfxx-loongarch.h ---- binutils-2.37.org/bfd/elfxx-loongarch.h 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/bfd/elfxx-loongarch.h 2022-03-24 16:30:09.292113947 +0800 -@@ -0,0 +1,31 @@ -+/* LoongArch-specific backend routines. -+ Copyright (C) 2021 Free Software Foundation, Inc. -+ Contributed by Loongson Ltd. + -+ This file is part of BFD, the Binary File Descriptor library. ++/* Adjust val to perform insn ++ R_LARCH_SOP_POP_32_S_10_16_S2 ++ R_LARCH_B16. */ ++static bool ++reloc_bits_b16 (reloc_howto_type *howto, bfd_vma *fix_val) ++{ ++ if (howto->complain_on_overflow != complain_overflow_signed) ++ return false; + -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3 of the License, or -+ (at your option) any later version. ++ bfd_signed_vma val = *fix_val; + -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. ++ /* Judge whether 4 bytes align. */ ++ if (val & ((0x1UL << howto->rightshift) - 1)) ++ return false; + -+ You should have received a copy of the GNU General Public License -+ along with this program; see the file COPYING3. If not, -+ see . */ ++ int bitsize = howto->bitsize + howto->rightshift; ++ bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; + -+#include "elf/common.h" -+#include "elf/internal.h" ++ /* If val < 0, sign bit is 1. */ ++ if (sig_bit) ++ { ++ /* Signed bits is 1. */ ++ if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) ++ != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) ++ return false; ++ } ++ else ++ { ++ /* Signed bits is 0. */ ++ if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) ++ return false; ++ } + -+extern reloc_howto_type * -+loongarch_elf_rtype_to_howto (bfd *abfd, unsigned int r_type); ++ /* Perform insn bits field. */ ++ val >>= howto->rightshift; ++ val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); ++ val <<= howto->bitpos; + -+extern reloc_howto_type * -+loongarch_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code); ++ *fix_val = val; + -+extern reloc_howto_type * -+loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name); -diff -uNr binutils-2.37.org/bfd/libbfd.h binutils-2.37/bfd/libbfd.h ---- binutils-2.37.org/bfd/libbfd.h 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/bfd/libbfd.h 2022-03-24 16:30:09.292113947 +0800 -@@ -3413,6 +3413,49 @@ - "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4", - "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4", - "BFD_RELOC_S12Z_OPR", -+ "BFD_RELOC_LARCH_TLS_DTPMOD32", -+ "BFD_RELOC_LARCH_TLS_DTPREL32", -+ "BFD_RELOC_LARCH_TLS_DTPMOD64", -+ "BFD_RELOC_LARCH_TLS_DTPREL64", -+ "BFD_RELOC_LARCH_TLS_TPREL32", -+ "BFD_RELOC_LARCH_TLS_TPREL64", -+ "BFD_RELOC_LARCH_MARK_LA", -+ "BFD_RELOC_LARCH_MARK_PCREL", -+ "BFD_RELOC_LARCH_SOP_PUSH_PCREL", -+ "BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE", -+ "BFD_RELOC_LARCH_SOP_PUSH_DUP", -+ "BFD_RELOC_LARCH_SOP_PUSH_GPREL", -+ "BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL", -+ "BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT", -+ "BFD_RELOC_LARCH_SOP_PUSH_TLS_GD", ++ return true; ++} ++ ++/* Reloc type : ++ R_LARCH_SOP_POP_32_S_0_5_10_16_S2 ++ R_LARCH_B21. */ ++static bool ++reloc_bits_b21 (reloc_howto_type *howto, ++ bfd_vma *fix_val) ++{ ++ if (howto->complain_on_overflow != complain_overflow_signed) ++ return false; ++ ++ bfd_signed_vma val = *fix_val; ++ ++ if (val & ((0x1UL << howto->rightshift) - 1)) ++ return false; ++ ++ int bitsize = howto->bitsize + howto->rightshift; ++ bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; ++ ++ /* If val < 0. */ ++ if (sig_bit) ++ { ++ if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) ++ != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) ++ return false; ++ } ++ else ++ { ++ if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) ++ return false; ++ } ++ ++ /* Perform insn bits field. */ ++ val >>= howto->rightshift; ++ val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); ++ ++ /* Perform insn bits field. 15:0<<10, 20:16>>16. */ ++ val = ((val & 0xffff) << 10) | ((val >> 16) & 0x1f); ++ ++ *fix_val = val; ++ ++ return true; ++} ++ ++/* Reloc type: ++ R_LARCH_SOP_POP_32_S_0_10_10_16_S2 ++ R_LARCH_B26. */ ++static bool ++reloc_bits_b26 (reloc_howto_type *howto, ++ bfd_vma *fix_val) ++{ ++ /* Return false if overflow. */ ++ if (howto->complain_on_overflow != complain_overflow_signed) ++ return false; ++ ++ bfd_signed_vma val = *fix_val; ++ ++ if (val & ((0x1UL << howto->rightshift) - 1)) ++ return false; ++ ++ int bitsize = howto->bitsize + howto->rightshift; ++ bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; ++ ++ /* If val < 0. */ ++ if (sig_bit) ++ { ++ if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) ++ != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) ++ return false; ++ } ++ else ++ { ++ if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) ++ return false; ++ } ++ ++ /* Perform insn bits field. */ ++ val >>= howto->rightshift; ++ val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); ++ ++ /* Perform insn bits field. 25:16>>16, 15:0<<10. */ ++ val = ((val & 0xffff) << 10) | ((val >> 16) & 0x3ff); ++ ++ *fix_val = val; ++ ++ return true; ++} ++ ++bool ++loongarch_adjust_reloc_bitsfield (reloc_howto_type *howto, ++ bfd_vma *fix_val) ++{ ++ BFD_ASSERT (((loongarch_reloc_howto_type *)howto)->adjust_reloc_bits); ++ return ((loongarch_reloc_howto_type *) ++ howto)->adjust_reloc_bits(howto, fix_val); ++} +diff --git a/bfd/elfxx-loongarch.h b/bfd/elfxx-loongarch.h +new file mode 100644 +index 00000000..7b8a7213 +--- /dev/null ++++ b/bfd/elfxx-loongarch.h +@@ -0,0 +1,45 @@ ++/* LoongArch-specific backend routines. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. ++ Contributed by Loongson Ltd. ++ ++ This file is part of BFD, the Binary File Descriptor library. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; see the file COPYING3. If not, ++ see . */ ++ ++#include "elf/common.h" ++#include "elf/internal.h" ++ ++extern reloc_howto_type * ++loongarch_elf_rtype_to_howto (bfd *abfd, unsigned int r_type); ++ ++extern reloc_howto_type * ++loongarch_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code); ++ ++extern reloc_howto_type * ++loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name); ++ ++extern bfd_reloc_code_real_type ++loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, ++ const char *l_r_name); ++ ++bool loongarch_adjust_reloc_bitsfield (reloc_howto_type *howto, bfd_vma *fix_val); ++ ++/* TRUE if this is a PLT reference to a local IFUNC. */ ++#define PLT_LOCAL_IFUNC_P(INFO, H) \ ++ ((H)->dynindx == -1 \ ++ || ((bfd_link_executable (INFO) \ ++ || ELF_ST_VISIBILITY ((H)->other) != STV_DEFAULT) \ ++ && (H)->def_regular \ ++ && (H)->type == STT_GNU_IFUNC)) +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index c37ddc03..1b689f2d 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -3413,6 +3413,86 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4", + "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4", + "BFD_RELOC_S12Z_OPR", ++ "BFD_RELOC_LARCH_TLS_DTPMOD32", ++ "BFD_RELOC_LARCH_TLS_DTPREL32", ++ "BFD_RELOC_LARCH_TLS_DTPMOD64", ++ "BFD_RELOC_LARCH_TLS_DTPREL64", ++ "BFD_RELOC_LARCH_TLS_TPREL32", ++ "BFD_RELOC_LARCH_TLS_TPREL64", ++ "BFD_RELOC_LARCH_MARK_LA", ++ "BFD_RELOC_LARCH_MARK_PCREL", ++ "BFD_RELOC_LARCH_SOP_PUSH_PCREL", ++ "BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE", ++ "BFD_RELOC_LARCH_SOP_PUSH_DUP", ++ "BFD_RELOC_LARCH_SOP_PUSH_GPREL", ++ "BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL", ++ "BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT", ++ "BFD_RELOC_LARCH_SOP_PUSH_TLS_GD", + "BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL", + "BFD_RELOC_LARCH_SOP_ASSERT", + "BFD_RELOC_LARCH_SOP_NOT", @@ -4405,182 +6457,50 @@ diff -uNr binutils-2.37.org/bfd/libbfd.h binutils-2.37/bfd/libbfd.h + "BFD_RELOC_LARCH_SUB24", + "BFD_RELOC_LARCH_SUB32", + "BFD_RELOC_LARCH_SUB64", ++ "BFD_RELOC_LARCH_B16", ++ "BFD_RELOC_LARCH_B21", ++ "BFD_RELOC_LARCH_B26", ++ "BFD_RELOC_LARCH_ABS_HI20", ++ "BFD_RELOC_LARCH_ABS_LO12", ++ "BFD_RELOC_LARCH_ABS64_LO20", ++ "BFD_RELOC_LARCH_ABS64_HI12", ++ "BFD_RELOC_LARCH_PCALA_HI20", ++ "BFD_RELOC_LARCH_PCALA_LO12", ++ "BFD_RELOC_LARCH_PCALA64_LO20", ++ "BFD_RELOC_LARCH_PCALA64_HI12", ++ "BFD_RELOC_LARCH_GOT_PC_HI20", ++ "BFD_RELOC_LARCH_GOT_PC_LO12", ++ "BFD_RELOC_LARCH_GOT64_PC_LO20", ++ "BFD_RELOC_LARCH_GOT64_PC_HI12", ++ "BFD_RELOC_LARCH_GOT_HI20", ++ "BFD_RELOC_LARCH_GOT_LO12", ++ "BFD_RELOC_LARCH_GOT64_LO20", ++ "BFD_RELOC_LARCH_GOT64_HI12", ++ "BFD_RELOC_LARCH_TLS_LE_HI20", ++ "BFD_RELOC_LARCH_TLS_LE_LO12", ++ "BFD_RELOC_LARCH_TLS_LE64_LO20", ++ "BFD_RELOC_LARCH_TLS_LE64_HI12", ++ "BFD_RELOC_LARCH_TLS_IE_PC_HI20", ++ "BFD_RELOC_LARCH_TLS_IE_PC_LO12", ++ "BFD_RELOC_LARCH_TLS_IE64_PC_LO20", ++ "BFD_RELOC_LARCH_TLS_IE64_PC_HI12", ++ "BFD_RELOC_LARCH_TLS_IE_HI20", ++ "BFD_RELOC_LARCH_TLS_IE_LO12", ++ "BFD_RELOC_LARCH_TLS_IE64_LO20", ++ "BFD_RELOC_LARCH_TLS_IE64_HI12", ++ "BFD_RELOC_LARCH_TLS_LD_PC_HI20", ++ "BFD_RELOC_LARCH_TLS_LD_HI20", ++ "BFD_RELOC_LARCH_TLS_GD_PC_HI20", ++ "BFD_RELOC_LARCH_TLS_GD_HI20", ++ "BFD_RELOC_LARCH_32_PCREL", ++ "BFD_RELOC_LARCH_RELAX", "@@overflow: BFD_RELOC_UNUSED@@", }; #endif -diff -uNr binutils-2.37.org/bfd/Makefile.am binutils-2.37/bfd/Makefile.am ---- binutils-2.37.org/bfd/Makefile.am 2022-03-23 16:44:12.018041302 +0800 -+++ binutils-2.37/bfd/Makefile.am 2022-03-24 16:30:09.317113666 +0800 -@@ -118,6 +118,7 @@ - cpu-ip2k.lo \ - cpu-iq2000.lo \ - cpu-lm32.lo \ -+ cpu-loongarch.lo \ - cpu-m10200.lo \ - cpu-m10300.lo \ - cpu-m32c.lo \ -@@ -202,6 +203,7 @@ - cpu-ip2k.c \ - cpu-iq2000.c \ - cpu-lm32.c \ -+ cpu-loongarch.c \ - cpu-m10200.c \ - cpu-m10300.c \ - cpu-m32c.c \ -@@ -548,6 +550,9 @@ - elf64-ia64.lo \ - elf64-ia64-vms.lo \ - elfxx-ia64.lo \ -+ elf32-loongarch.lo \ -+ elf64-loongarch.lo \ -+ elfxx-loongarch.lo \ - elfn32-mips.lo \ - elf64-mips.lo \ - elfxx-mips.lo \ -@@ -601,6 +606,7 @@ - elfn32-mips.c \ - elfxx-aarch64.c \ - elfxx-ia64.c \ -+ elfxx-loongarch.c \ - elfxx-mips.c \ - elfxx-riscv.c \ - mach-o-aarch64.c \ -@@ -665,6 +671,7 @@ - BUILD_CFILES = \ - elf32-aarch64.c elf64-aarch64.c \ - elf32-ia64.c elf64-ia64.c \ -+ elf32-loongarch.c elf64-loongarch.c \ - elf32-riscv.c elf64-riscv.c \ - peigen.c pepigen.c pex64igen.c - -@@ -686,7 +693,7 @@ - elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ - elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ - elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ -- elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ -+ elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ - genlink.h go32stub.h \ - libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ - libpei.h libxcoff.h \ -@@ -842,6 +849,14 @@ - echo "#line 1 \"elfnn-ia64.c\"" > $@ - $(SED) -e s/NN/64/g < $< >> $@ - -+elf32-loongarch.c : elfnn-loongarch.c -+ echo "#line 1 \"elfnn-loongarch.c\"" > $@ -+ $(SED) -e s/NN/32/g < $< >> $@ -+ -+elf64-loongarch.c : elfnn-loongarch.c -+ echo "#line 1 \"elfnn-loongarch.c\"" > $@ -+ $(SED) -e s/NN/64/g < $< >> $@ -+ - elf32-riscv.c : elfnn-riscv.c - echo "#line 1 \"elfnn-riscv.c\"" > $@ - $(SED) -e s/NN/32/g < $< >> $@ -diff -uNr binutils-2.37.org/bfd/Makefile.in binutils-2.37/bfd/Makefile.in ---- binutils-2.37.org/bfd/Makefile.in 2022-03-23 16:44:12.021041269 +0800 -+++ binutils-2.37/bfd/Makefile.in 2022-03-24 16:30:09.320113633 +0800 -@@ -543,6 +543,7 @@ - cpu-ip2k.lo \ - cpu-iq2000.lo \ - cpu-lm32.lo \ -+ cpu-loongarch.lo \ - cpu-m10200.lo \ - cpu-m10300.lo \ - cpu-m32c.lo \ -@@ -627,6 +628,7 @@ - cpu-ip2k.c \ - cpu-iq2000.c \ - cpu-lm32.c \ -+ cpu-loongarch.c \ - cpu-m10200.c \ - cpu-m10300.c \ - cpu-m32c.c \ -@@ -975,6 +977,9 @@ - elf64-ia64.lo \ - elf64-ia64-vms.lo \ - elfxx-ia64.lo \ -+ elf32-loongarch.lo \ -+ elf64-loongarch.lo \ -+ elfxx-loongarch.lo \ - elfn32-mips.lo \ - elf64-mips.lo \ - elfxx-mips.lo \ -@@ -1028,6 +1033,7 @@ - elfn32-mips.c \ - elfxx-aarch64.c \ - elfxx-ia64.c \ -+ elfxx-loongarch.c \ - elfxx-mips.c \ - elfxx-riscv.c \ - mach-o-aarch64.c \ -@@ -1091,6 +1097,7 @@ - BUILD_CFILES = \ - elf32-aarch64.c elf64-aarch64.c \ - elf32-ia64.c elf64-ia64.c \ -+ elf32-loongarch.c elf64-loongarch.c \ - elf32-riscv.c elf64-riscv.c \ - peigen.c pepigen.c pex64igen.c - -@@ -1109,7 +1116,7 @@ - elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ - elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ - elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ -- elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ -+ elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ - genlink.h go32stub.h \ - libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ - libpei.h libxcoff.h \ -@@ -1349,6 +1356,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-k1om.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-l1om.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-lm32.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-loongarch.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10200.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10300.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m32c.Plo@am__quote@ -@@ -1442,6 +1450,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-ip2k.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-iq2000.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-lm32.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-loongarch.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m32c.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m32r.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc11.Plo@am__quote@ -@@ -1492,6 +1501,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-loongarch.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@ -@@ -1506,6 +1516,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfn32-mips.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-aarch64.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-ia64.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-loongarch.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-mips.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-riscv.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-sparc.Plo@am__quote@ -@@ -1972,6 +1983,14 @@ - echo "#line 1 \"elfnn-ia64.c\"" > $@ - $(SED) -e s/NN/64/g < $< >> $@ - -+elf32-loongarch.c : elfnn-loongarch.c -+ echo "#line 1 \"elfnn-loongarch.c\"" > $@ -+ $(SED) -e s/NN/32/g < $< >> $@ -+ -+elf64-loongarch.c : elfnn-loongarch.c -+ echo "#line 1 \"elfnn-loongarch.c\"" > $@ -+ $(SED) -e s/NN/64/g < $< >> $@ -+ - elf32-riscv.c : elfnn-riscv.c - echo "#line 1 \"elfnn-riscv.c\"" > $@ - $(SED) -e s/NN/32/g < $< >> $@ -diff -uNr binutils-2.37.org/bfd/po/BLD-POTFILES.in binutils-2.37/bfd/po/BLD-POTFILES.in ---- binutils-2.37.org/bfd/po/BLD-POTFILES.in 2021-07-19 00:37:04.000000000 +0800 -+++ binutils-2.37/bfd/po/BLD-POTFILES.in 2022-03-24 16:30:09.292113947 +0800 +diff --git a/bfd/po/BLD-POTFILES.in b/bfd/po/BLD-POTFILES.in +index f81e2b40..0ecbbcff 100644 +--- a/bfd/po/BLD-POTFILES.in ++++ b/bfd/po/BLD-POTFILES.in @@ -1,10 +1,12 @@ bfdver.h elf32-aarch64.c @@ -4594,10 +6514,11 @@ diff -uNr binutils-2.37.org/bfd/po/BLD-POTFILES.in binutils-2.37/bfd/po/BLD-POTF elf64-riscv.c elf64-target.h peigen.c -diff -uNr binutils-2.37.org/bfd/po/SRC-POTFILES.in binutils-2.37/bfd/po/SRC-POTFILES.in ---- binutils-2.37.org/bfd/po/SRC-POTFILES.in 2021-07-19 00:37:04.000000000 +0800 -+++ binutils-2.37/bfd/po/SRC-POTFILES.in 2022-03-24 16:30:09.293113936 +0800 -@@ -72,6 +72,7 @@ +diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in +index c83b86cd..d509335b 100644 +--- a/bfd/po/SRC-POTFILES.in ++++ b/bfd/po/SRC-POTFILES.in +@@ -72,6 +72,7 @@ cpu-iq2000.c cpu-k1om.c cpu-l1om.c cpu-lm32.c @@ -4605,10 +6526,11 @@ diff -uNr binutils-2.37.org/bfd/po/SRC-POTFILES.in binutils-2.37/bfd/po/SRC-POTF cpu-m10200.c cpu-m10300.c cpu-m32c.c -diff -uNr binutils-2.37.org/bfd/reloc.c binutils-2.37/bfd/reloc.c ---- binutils-2.37.org/bfd/reloc.c 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/bfd/reloc.c 2022-03-24 16:30:09.293113936 +0800 -@@ -8171,6 +8171,95 @@ +diff --git a/bfd/reloc.c b/bfd/reloc.c +index 6d920e1d..3c768b64 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -8171,6 +8171,177 @@ ENUM ENUMDOC S12Z relocations. @@ -4685,29 +6607,112 @@ diff -uNr binutils-2.37.org/bfd/reloc.c binutils-2.37/bfd/reloc.c +ENUMX + BFD_RELOC_LARCH_ADD24 +ENUMX -+ BFD_RELOC_LARCH_ADD32 ++ BFD_RELOC_LARCH_ADD32 ++ENUMX ++ BFD_RELOC_LARCH_ADD64 ++ENUMX ++ BFD_RELOC_LARCH_SUB8 ++ENUMX ++ BFD_RELOC_LARCH_SUB16 ++ENUMX ++ BFD_RELOC_LARCH_SUB24 ++ENUMX ++ BFD_RELOC_LARCH_SUB32 ++ENUMX ++ BFD_RELOC_LARCH_SUB64 ++ ++ENUMX ++ BFD_RELOC_LARCH_B16 ++ENUMX ++ BFD_RELOC_LARCH_B21 ++ENUMX ++ BFD_RELOC_LARCH_B26 ++ ++ENUMX ++ BFD_RELOC_LARCH_ABS_HI20 ++ENUMX ++ BFD_RELOC_LARCH_ABS_LO12 ++ENUMX ++ BFD_RELOC_LARCH_ABS64_LO20 ++ENUMX ++ BFD_RELOC_LARCH_ABS64_HI12 ++ ++ENUMX ++ BFD_RELOC_LARCH_PCALA_HI20 ++ENUMX ++ BFD_RELOC_LARCH_PCALA_LO12 ++ENUMX ++ BFD_RELOC_LARCH_PCALA64_LO20 ++ENUMX ++ BFD_RELOC_LARCH_PCALA64_HI12 ++ ++ENUMX ++ BFD_RELOC_LARCH_GOT_PC_HI20 ++ENUMX ++ BFD_RELOC_LARCH_GOT_PC_LO12 ++ENUMX ++ BFD_RELOC_LARCH_GOT64_PC_LO20 ++ENUMX ++ BFD_RELOC_LARCH_GOT64_PC_HI12 ++ENUMX ++ BFD_RELOC_LARCH_GOT_HI20 ++ENUMX ++ BFD_RELOC_LARCH_GOT_LO12 ++ENUMX ++ BFD_RELOC_LARCH_GOT64_LO20 ++ENUMX ++ BFD_RELOC_LARCH_GOT64_HI12 ++ ++ENUMX ++ BFD_RELOC_LARCH_TLS_LE_HI20 ++ENUMX ++ BFD_RELOC_LARCH_TLS_LE_LO12 ++ENUMX ++ BFD_RELOC_LARCH_TLS_LE64_LO20 ++ENUMX ++ BFD_RELOC_LARCH_TLS_LE64_HI12 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE_PC_HI20 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE_PC_LO12 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE64_PC_LO20 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE64_PC_HI12 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE_HI20 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE_LO12 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE64_LO20 ++ENUMX ++ BFD_RELOC_LARCH_TLS_IE64_HI12 +ENUMX -+ BFD_RELOC_LARCH_ADD64 ++ BFD_RELOC_LARCH_TLS_LD_PC_HI20 +ENUMX -+ BFD_RELOC_LARCH_SUB8 ++ BFD_RELOC_LARCH_TLS_LD_HI20 +ENUMX -+ BFD_RELOC_LARCH_SUB16 ++ BFD_RELOC_LARCH_TLS_GD_PC_HI20 +ENUMX -+ BFD_RELOC_LARCH_SUB24 ++ BFD_RELOC_LARCH_TLS_GD_HI20 ++ +ENUMX -+ BFD_RELOC_LARCH_SUB32 ++ BFD_RELOC_LARCH_32_PCREL ++ +ENUMX -+ BFD_RELOC_LARCH_SUB64 ++ BFD_RELOC_LARCH_RELAX ++ +ENUMDOC + LARCH relocations. + ENDSENUM BFD_RELOC_UNUSED CODE_FRAGMENT -diff -uNr binutils-2.37.org/bfd/targets.c binutils-2.37/bfd/targets.c ---- binutils-2.37.org/bfd/targets.c 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/bfd/targets.c 2022-03-24 16:30:09.293113936 +0800 -@@ -768,6 +768,8 @@ +diff --git a/bfd/targets.c b/bfd/targets.c +index 89b49e72..8f5abb17 100644 +--- a/bfd/targets.c ++++ b/bfd/targets.c +@@ -768,6 +768,8 @@ extern const bfd_target l1om_elf64_vec; extern const bfd_target l1om_elf64_fbsd_vec; extern const bfd_target lm32_elf32_vec; extern const bfd_target lm32_elf32_fdpic_vec; @@ -4716,7 +6721,7 @@ diff -uNr binutils-2.37.org/bfd/targets.c binutils-2.37/bfd/targets.c extern const bfd_target m32c_elf32_vec; extern const bfd_target m32r_elf32_vec; extern const bfd_target m32r_elf32_le_vec; -@@ -1359,6 +1361,12 @@ +@@ -1359,6 +1361,12 @@ static const bfd_target * const _bfd_target_vector[] = &z80_elf32_vec, &z8k_coff_vec, @@ -4729,9 +6734,10 @@ diff -uNr binutils-2.37.org/bfd/targets.c binutils-2.37/bfd/targets.c #endif /* not SELECT_VECS */ /* Always support S-records, for convenience. */ -diff -uNr binutils-2.37.org/binutils/readelf.c binutils-2.37/binutils/readelf.c ---- binutils-2.37.org/binutils/readelf.c 2022-03-23 16:44:12.009041403 +0800 -+++ binutils-2.37/binutils/readelf.c 2022-03-24 16:30:09.296113902 +0800 +diff --git a/binutils/readelf.c b/binutils/readelf.c +index cc9023aa..72286fef 100644 +--- a/binutils/readelf.c ++++ b/binutils/readelf.c @@ -162,6 +162,7 @@ #include "elf/xstormy16.h" #include "elf/xtensa.h" @@ -4740,7 +6746,7 @@ diff -uNr binutils-2.37.org/binutils/readelf.c binutils-2.37/binutils/readelf.c #include "getopt.h" #include "libiberty.h" -@@ -1799,6 +1800,11 @@ +@@ -1799,6 +1800,11 @@ dump_relocations (Filedata * filedata, case EM_Z80: rtype = elf_z80_reloc_type (type); break; @@ -4752,23 +6758,28 @@ diff -uNr binutils-2.37.org/binutils/readelf.c binutils-2.37/binutils/readelf.c } if (rtype == NULL) -@@ -4091,6 +4097,15 @@ +@@ -4091,6 +4097,20 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine) strcat (buf, _(", unknown")); break; } break; + case EM_LOONGARCH: + if (EF_LOONGARCH_IS_LP64 (e_flags)) + strcat (buf, ", LP64"); -+ else if (EF_LOONGARCH_IS_LP32 (e_flags)) -+ strcat (buf, ", LP32"); -+ else if (EF_LOONGARCH_IS_XLP32 (e_flags)) -+ strcat (buf, ", XLP32"); ++ else if (EF_LOONGARCH_IS_ILP32 (e_flags)) ++ strcat (buf, ", ILP32"); ++ ++ if (EF_LOONGARCH_IS_SOFT_FLOAT (e_flags)) ++ strcat (buf, ", SOFT-FLOAT"); ++ else if (EF_LOONGARCH_IS_SINGLE_FLOAT (e_flags)) ++ strcat (buf, ", SINGLE-FLOAT"); ++ else if (EF_LOONGARCH_IS_DOUBLE_FLOAT (e_flags)) ++ strcat (buf, ", DOUBLE-FLOAT"); + + break; } } -@@ -13841,6 +13856,8 @@ +@@ -13841,6 +13861,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) return reloc_type == 2; /* R_IQ2000_32. */ case EM_LATTICEMICO32: return reloc_type == 3; /* R_LM32_32. */ @@ -4777,7 +6788,16 @@ diff -uNr binutils-2.37.org/binutils/readelf.c binutils-2.37/binutils/readelf.c case EM_M32C_OLD: case EM_M32C: return reloc_type == 3; /* R_M32C_32. */ -@@ -14058,6 +14075,8 @@ +@@ -13995,6 +14017,8 @@ is_32bit_pcrel_reloc (Filedata * filedata, unsigned int reloc_type) + case EM_AVR_OLD: + case EM_AVR: + return reloc_type == 36; /* R_AVR_32_PCREL. */ ++ case EM_LOONGARCH: ++ return reloc_type == 99; /* R_LARCH_32_PCREL. */ + case EM_MICROBLAZE: + return reloc_type == 2; /* R_MICROBLAZE_32_PCREL. */ + case EM_OR1K: +@@ -14058,6 +14082,8 @@ is_64bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) case EM_IA_64: return (reloc_type == 0x26 /* R_IA64_DIR64MSB. */ || reloc_type == 0x27 /* R_IA64_DIR64LSB. */); @@ -4786,10 +6806,11 @@ diff -uNr binutils-2.37.org/binutils/readelf.c binutils-2.37/binutils/readelf.c case EM_PARISC: return reloc_type == 80; /* R_PARISC_DIR64. */ case EM_PPC64: -diff -uNr binutils-2.37.org/binutils/testsuite/binutils-all/objdump.exp binutils-2.37/binutils/testsuite/binutils-all/objdump.exp ---- binutils-2.37.org/binutils/testsuite/binutils-all/objdump.exp 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/binutils/testsuite/binutils-all/objdump.exp 2022-03-24 16:30:09.296113902 +0800 -@@ -40,7 +40,7 @@ +diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp +index c9a7eec7..5b59ae30 100644 +--- a/binutils/testsuite/binutils-all/objdump.exp ++++ b/binutils/testsuite/binutils-all/objdump.exp +@@ -40,7 +40,7 @@ lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k MCore mep c5 h1 MicroB lappend cpus_expected mips mn10200 mn10300 ms1 msp MSP430 nds32 n1h_v3 ns32k lappend cpus_expected or1k or1knd pj powerpc pyramid riscv romp rs6000 s390 sh sparc lappend cpus_expected tic54x tilegx tms320c30 tms320c4x tms320c54x @@ -4798,12 +6819,178 @@ diff -uNr binutils-2.37.org/binutils/testsuite/binutils-all/objdump.exp binutils # Make sure the target CPU shows up in the list. lappend cpus_expected ${target_cpu} -diff -uNr binutils-2.37.org/gas/config/loongarch-lex.h binutils-2.37/gas/config/loongarch-lex.h ---- binutils-2.37.org/gas/config/loongarch-lex.h 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/config/loongarch-lex.h 2022-03-24 16:30:09.297113891 +0800 -@@ -0,0 +1,34 @@ +diff --git a/gas/Makefile.am b/gas/Makefile.am +index 34190e78..7678ee61 100644 +--- a/gas/Makefile.am ++++ b/gas/Makefile.am +@@ -154,6 +154,7 @@ TARGET_CPU_CFILES = \ + config/tc-ip2k.c \ + config/tc-iq2000.c \ + config/tc-lm32.c \ ++ config/tc-loongarch.c \ + config/tc-m32c.c \ + config/tc-m32r.c \ + config/tc-m68hc11.c \ +@@ -374,7 +375,8 @@ EXTRA_SCRIPTS = .gdbinit + EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \ + config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \ + config/rl78-parse.c config/rl78-parse.h \ +- config/rx-parse.c config/rx-parse.h ++ config/rx-parse.c config/rx-parse.h \ ++ config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c + + diststuff: $(EXTRA_DIST) info + +@@ -471,6 +473,19 @@ config/rx-parse.c: $(srcdir)/config/rx-parse.y + config/rx-parse.h: config/rx-parse.c + @true + ++# The LoongArch lexical analyzer and parser. ++EXTRA_as_new_SOURCES += config/loongarch-parse.y ++config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y ++ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ; ++config/loongarch-parse.h: config/loongarch-parse.c ++ @true ++ ++EXTRA_as_new_SOURCES += config/loongarch-lex.l ++config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l ++ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE) ++ ++config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h ++ + # The mips instruction table specification lexical analyzer and parser. + + itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h +diff --git a/gas/Makefile.in b/gas/Makefile.in +index f3d66b8e..ce26e420 100644 +--- a/gas/Makefile.in ++++ b/gas/Makefile.in +@@ -544,6 +544,7 @@ TARGET_CPU_CFILES = \ + config/tc-ip2k.c \ + config/tc-iq2000.c \ + config/tc-lm32.c \ ++ config/tc-loongarch.c \ + config/tc-m32c.c \ + config/tc-m32r.c \ + config/tc-m68hc11.c \ +@@ -757,7 +758,8 @@ EXTRA_SCRIPTS = .gdbinit + EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \ + config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \ + config/rl78-parse.c config/rl78-parse.h \ +- config/rx-parse.c config/rx-parse.h ++ config/rx-parse.c config/rx-parse.h \ ++ config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c + + DISTCLEANFILES = targ-cpu.h obj-format.h targ-env.h itbl-cpu.h cgen-desc.h + +@@ -789,12 +791,14 @@ as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ + as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ + $(extra_objects) $(GASLIBS) $(LIBINTL_DEP) + ++ ++# The LoongArch lexical analyzer and parser. + EXTRA_as_new_SOURCES = $(CFILES) $(HFILES) $(TARGET_CPU_CFILES) \ + $(TARGET_CPU_HFILES) $(TARGET_EXTRA_FILES) $(TARG_ENV_CFILES) \ + $(OBJ_FORMAT_CFILES) $(OBJ_FORMAT_HFILES) \ + $(CONFIG_ATOF_CFILES) $(MULTI_CFILES) config/m68k-parse.y \ + config/bfin-parse.y config/bfin-lex.l config/rl78-parse.y \ +- config/rx-parse.y ++ config/rx-parse.y config/loongarch-parse.y + EXPECT = expect + RUNTEST = runtest + RUNTESTFLAGS = +@@ -939,6 +943,8 @@ config/tc-iq2000.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) + config/tc-lm32.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) ++config/tc-loongarch.$(OBJEXT): config/$(am__dirstamp) \ ++ config/$(DEPDIR)/$(am__dirstamp) + config/tc-m32c.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) + config/tc-m32r.$(OBJEXT): config/$(am__dirstamp) \ +@@ -1085,6 +1091,8 @@ config/rl78-parse.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) + config/rx-parse.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) ++config/loongarch-parse.$(OBJEXT): config/$(am__dirstamp) \ ++ config/$(DEPDIR)/$(am__dirstamp) + + as-new$(EXEEXT): $(as_new_OBJECTS) $(as_new_DEPENDENCIES) $(EXTRA_as_new_DEPENDENCIES) + @rm -f as-new$(EXEEXT) +@@ -1146,6 +1154,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386coff.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386elf.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-mipself.Po@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/loongarch-parse.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/m68k-parse.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-aout.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-coff.Po@am__quote@ +@@ -1183,6 +1192,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-ip2k.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-iq2000.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-lm32.Po@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-loongarch.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32c.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32r.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m68hc11.Po@am__quote@ +@@ -1452,6 +1462,7 @@ maintainer-clean-generic: + @echo "it deletes files that may require special tools to rebuild." + -rm -f config/bfin-lex.c + -rm -f config/bfin-parse.c ++ -rm -f config/loongarch-parse.c + -rm -f config/m68k-parse.c + -rm -f config/rl78-parse.c + -rm -f config/rx-parse.c +@@ -1602,6 +1613,15 @@ config/rx-parse.c: $(srcdir)/config/rx-parse.y + config/rx-parse.h: config/rx-parse.c + @true + ++config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y ++ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ; ++config/loongarch-parse.h: config/loongarch-parse.c ++ @true ++config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l ++ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE) ++ ++config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h ++ + # The mips instruction table specification lexical analyzer and parser. + + itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h +diff --git a/gas/config/loongarch-lex-wrapper.c b/gas/config/loongarch-lex-wrapper.c +new file mode 100644 +index 00000000..3bb0b14c +--- /dev/null ++++ b/gas/config/loongarch-lex-wrapper.c +@@ -0,0 +1,20 @@ ++/* Copyright (C) 2021-2022 Free Software Foundation, Inc. ++ ++ This file is part of GAS, the GNU Assembler. ++ ++ GAS is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GAS is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; see the file COPYING3. If not, ++ see . */ ++ ++#include "sysdep.h" ++#include "config/loongarch-lex.c" +diff --git a/gas/config/loongarch-lex.h b/gas/config/loongarch-lex.h +new file mode 100644 +index 00000000..35d22dbd +--- /dev/null ++++ b/gas/config/loongarch-lex.h +@@ -0,0 +1,37 @@ +/* -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + @@ -4836,13 +7023,18 @@ diff -uNr binutils-2.37.org/gas/config/loongarch-lex.h binutils-2.37/gas/config/ + size_t max_reloc_num, + size_t *reloc_num, + offsetT *imm); -diff -uNr binutils-2.37.org/gas/config/loongarch-lex.l binutils-2.37/gas/config/loongarch-lex.l ---- binutils-2.37.org/gas/config/loongarch-lex.l 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/config/loongarch-lex.l 2022-03-24 16:30:09.297113891 +0800 ++bfd_reloc_code_real_type ++loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, ++ const char *l_r_name); +diff --git a/gas/config/loongarch-lex.l b/gas/config/loongarch-lex.l +new file mode 100644 +index 00000000..d96f77ea +--- /dev/null ++++ b/gas/config/loongarch-lex.l @@ -0,0 +1,61 @@ +%option noyywrap +/* -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + @@ -4901,36 +7093,14 @@ diff -uNr binutils-2.37.org/gas/config/loongarch-lex.l binutils-2.37/gas/config/ +. { return yytext[0];} + +%% -diff -uNr binutils-2.37.org/gas/config/loongarch-lex-wrapper.c binutils-2.37/gas/config/loongarch-lex-wrapper.c ---- binutils-2.37.org/gas/config/loongarch-lex-wrapper.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/config/loongarch-lex-wrapper.c 2022-03-24 16:30:09.297113891 +0800 -@@ -0,0 +1,20 @@ -+/* Copyright (C) 2021 Free Software Foundation, Inc. -+ -+ This file is part of GAS, the GNU Assembler. -+ -+ GAS is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3, or (at your option) -+ any later version. -+ -+ GAS is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; see the file COPYING3. If not, -+ see . */ -+ -+#include "sysdep.h" -+#include "config/loongarch-lex.c" -diff -uNr binutils-2.37.org/gas/config/loongarch-parse.y binutils-2.37/gas/config/loongarch-parse.y ---- binutils-2.37.org/gas/config/loongarch-parse.y 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/config/loongarch-parse.y 2022-03-24 16:30:09.297113891 +0800 -@@ -0,0 +1,441 @@ +diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y +new file mode 100644 +index 00000000..902d7204 +--- /dev/null ++++ b/gas/config/loongarch-parse.y +@@ -0,0 +1,407 @@ +/* -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + @@ -4968,8 +7138,8 @@ diff -uNr binutils-2.37.org/gas/config/loongarch-parse.y binutils-2.37/gas/confi +static int +is_const (struct reloc_info *info) +{ -+ return info->type == BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE -+ && info->value.X_op == O_constant; ++ return (info->type == BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE ++ && info->value.X_op == O_constant); +} + +int @@ -5014,11 +7184,11 @@ diff -uNr binutils-2.37.org/gas/config/loongarch-parse.y binutils-2.37/gas/confi +my_getExpression (expressionS *ep, const char *str) +{ + char *save_in, *ret; ++ + if (*str == ':') + { + unsigned long j; + char *str_1 = (char *) str; -+ str_1++; + j = strtol (str_1, &str_1, 10); + get_internal_label (ep, j, *str_1 == 'f'); + return NULL; @@ -5035,65 +7205,31 @@ diff -uNr binutils-2.37.org/gas/config/loongarch-parse.y binutils-2.37/gas/confi +reloc (const char *op_c_str, const char *id_c_str, offsetT addend) +{ + expressionS id_sym_expr; ++ bfd_reloc_code_real_type btype; + + if (end <= top) + as_fatal (_("expr too huge")); + -+ if (id_c_str) -+ { -+ my_getExpression (&id_sym_expr, id_c_str); -+ id_sym_expr.X_add_number += addend; -+ } ++ /* For compatible old asm code. */ ++ if (0 == strcmp (op_c_str, "plt")) ++ btype = BFD_RELOC_LARCH_B26; + else -+ { -+ id_sym_expr.X_op = O_constant; -+ id_sym_expr.X_add_number = addend; -+ } ++ btype = loongarch_larch_reloc_name_lookup (NULL, op_c_str); + -+ if (strcmp (op_c_str, "abs") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE; -+ top++; -+ } -+ else if (strcmp (op_c_str, "pcrel") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_PCREL; -+ top++; -+ } -+ else if (strcmp (op_c_str, "gprel") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_GPREL; -+ top++; -+ } -+ else if (strcmp (op_c_str, "tprel") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL; -+ top++; -+ } -+ else if (strcmp (op_c_str, "tlsgot") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT; -+ top++; -+ } -+ else if (strcmp (op_c_str, "tlsgd") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_TLS_GD; -+ top++; -+ } -+ else if (strcmp (op_c_str, "plt") == 0) -+ { -+ top->value = id_sym_expr; -+ top->type = BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL; -+ top++; -+ } ++ if (id_c_str) ++ { ++ my_getExpression (&id_sym_expr, id_c_str); ++ id_sym_expr.X_add_number += addend; ++ } + else -+ as_fatal (_("unknown reloc hint: %s"), op_c_str); ++ { ++ id_sym_expr.X_op = O_constant; ++ id_sym_expr.X_add_number = addend; ++ } ++ ++ top->value = id_sym_expr; ++ top->type = btype; ++ top++; +} + +static void @@ -5370,13 +7506,15 @@ diff -uNr binutils-2.37.org/gas/config/loongarch-parse.y binutils-2.37/gas/confi + ; +%% + -diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/tc-loongarch.c ---- binutils-2.37.org/gas/config/tc-loongarch.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/config/tc-loongarch.c 2022-03-24 16:30:09.297113891 +0800 -@@ -0,0 +1,1339 @@ +diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c +new file mode 100644 +index 00000000..fbbaca55 +--- /dev/null ++++ b/gas/config/tc-loongarch.c +@@ -0,0 +1,1362 @@ +/* tc-loongarch.c -- Assemble for the LoongArch ISA + -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GAS. @@ -5401,6 +7539,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +#include "elf/loongarch.h" +#include "opcode/loongarch.h" +#include "obj-elf.h" ++#include "bfd/elfxx-loongarch.h" +#include +#include +#include @@ -5447,6 +7586,10 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + fixS *fixp[MAX_RELOC_NUMBER_A_INSN]; +}; + ++#ifndef DEFAULT_ARCH ++#define DEFAULT_ARCH "loongarch64" ++#endif ++ +/* This array holds the chars that always start a comment. If the + pre-processor is disabled, these aren't very useful. */ +const char comment_chars[] = "#"; @@ -5473,13 +7616,16 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + +const char *md_shortopts = "O::g::G:"; + ++static const char default_arch[] = DEFAULT_ARCH; ++ +enum options +{ + OPTION_IGNORE = OPTION_MD_BASE, + + OPTION_ABI, -+ OPTION_SOFT_FLOAT, -+ OPTION_HARD_FLOAT, ++ OPTION_FLOAT_ABI, ++ ++ OPTION_FLOAT_ISA, + + OPTION_LA_LOCAL_WITH_ABS, + OPTION_LA_GLOBAL_WITH_PCREL, @@ -5491,8 +7637,8 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +struct option md_longopts[] = +{ + { "mabi", required_argument, NULL, OPTION_ABI }, -+ { "msoft-float", no_argument, NULL, OPTION_SOFT_FLOAT }, -+ { "mhard-float", no_argument, NULL, OPTION_HARD_FLOAT }, ++ ++ { "mfpu", required_argument, NULL, OPTION_FLOAT_ISA }, + + { "mla-local-with-abs", no_argument, NULL, OPTION_LA_LOCAL_WITH_ABS }, + { "mla-global-with-pcrel", no_argument, NULL, OPTION_LA_GLOBAL_WITH_PCREL }, @@ -5507,30 +7653,48 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +md_parse_option (int c, const char *arg) +{ + int ret = 1; ++ char lp64[256] = ""; ++ char ilp32[256] = ""; ++ unsigned char *suf = (unsigned char *)arg; ++ ++ lp64['s'] = lp64['S'] = EF_LOONGARCH_ABI_LP64_SOFT_FLOAT; ++ lp64['f'] = lp64['F'] = EF_LOONGARCH_ABI_LP64_SINGLE_FLOAT; ++ lp64['d'] = lp64['D'] = EF_LOONGARCH_ABI_LP64_DOUBLE_FLOAT; ++ ++ ilp32['s'] = ilp32['S'] = EF_LOONGARCH_ABI_ILP32_SOFT_FLOAT; ++ ilp32['f'] = ilp32['F'] = EF_LOONGARCH_ABI_ILP32_SINGLE_FLOAT; ++ ilp32['d'] = ilp32['D'] = EF_LOONGARCH_ABI_ILP32_DOUBLE_FLOAT; ++ + switch (c) + { + case OPTION_ABI: -+ if (strncasecmp (arg, "lp64", sizeof("lp64") - 1) == 0) ++ if (strncasecmp (arg, "lp64", 4) == 0 && lp64[suf[4]] != 0) + { -+ LARCH_opts.ase_abi |= EF_LOONGARCH_ABI_LP64; -+ LARCH_opts.ase_lp32 = 1; ++ LARCH_opts.ase_ilp32 = 1; + LARCH_opts.ase_lp64 = 1; ++ LARCH_opts.ase_abi = lp64[suf[4]]; + } -+ else if (strncasecmp (arg, "lp32", sizeof("lp32") - 1) == 0) ++ else if (strncasecmp (arg, "ilp32", 5) == 0 && ilp32[suf[5]] != 0) + { -+ LARCH_opts.ase_abi |= EF_LOONGARCH_ABI_LP32; -+ LARCH_opts.ase_lp32 = 1; ++ LARCH_opts.ase_abi = ilp32[suf[5]]; ++ LARCH_opts.ase_ilp32 = 1; + } + else + ret = 0; + break; + -+ case OPTION_SOFT_FLOAT: -+ LARCH_opts.ase_float = 0; -+ break; -+ -+ case OPTION_HARD_FLOAT: -+ LARCH_opts.ase_float = 1; ++ case OPTION_FLOAT_ISA: ++ if (strcasecmp (arg, "soft") == 0) ++ LARCH_opts.ase_nf = 1; ++ else if (strcasecmp (arg, "single") == 0) ++ LARCH_opts.ase_sf = 1; ++ else if (strcasecmp (arg, "double") == 0) ++ { ++ LARCH_opts.ase_sf = 1; ++ LARCH_opts.ase_df = 1; ++ } ++ else ++ ret = 0; + break; + + case OPTION_LA_LOCAL_WITH_ABS: @@ -5565,26 +7729,39 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +void +loongarch_after_parse_args () +{ -+ /* Set default ABI/ISA LP64. */ ++ /* Set default ABI/ISA LP64D. */ + if (!EF_LOONGARCH_IS_LP64(LARCH_opts.ase_abi) -+ && !EF_LOONGARCH_IS_LP32(LARCH_opts.ase_abi)) ++ && !EF_LOONGARCH_IS_ILP32(LARCH_opts.ase_abi)) + { -+ LARCH_opts.ase_abi |= EF_LOONGARCH_ABI_LP64; -+ LARCH_opts.ase_lp32 = 1; -+ LARCH_opts.ase_lp64 = 1; ++ if (strcmp (default_arch, "loongarch64") == 0) ++ { ++ LARCH_opts.ase_abi = EF_LOONGARCH_ABI_LP64_DOUBLE_FLOAT; ++ LARCH_opts.ase_ilp32 = 1; ++ LARCH_opts.ase_lp64 = 1; ++ } ++ else if (strcmp (default_arch, "loongarch32") == 0) ++ { ++ LARCH_opts.ase_abi = EF_LOONGARCH_ABI_ILP32_DOUBLE_FLOAT; ++ LARCH_opts.ase_ilp32 = 1; ++ } ++ else ++ as_bad ("unknown default architecture `%s'", default_arch); + } + + /* Set default ISA double-float. */ -+ if (!LARCH_opts.ase_float) ++ if (!LARCH_opts.ase_nf ++ && !LARCH_opts.ase_sf ++ && !LARCH_opts.ase_df) + { -+ LARCH_opts.ase_float = 1; ++ LARCH_opts.ase_sf = 1; ++ LARCH_opts.ase_df = 1; + } + + size_t i; + -+ assert(LARCH_opts.ase_lp32); ++ assert(LARCH_opts.ase_ilp32); + -+ /* Init lp32/lp64 registers names. */ ++ /* Init ilp32/lp64 registers names. */ + if (!r_htab) + r_htab = str_htab_create (), str_hash_insert (r_htab, "", 0, 0); + @@ -5597,8 +7774,8 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + for (i = 0; i < ARRAY_SIZE (loongarch_cr_normal_name); i++) + str_hash_insert (cr_htab, loongarch_cr_normal_name[i], (void *) (i + 1), 0); + -+ /* Init float registers names. */ -+ if (LARCH_opts.ase_float) ++ /* Init single/double float registers names. */ ++ if (LARCH_opts.ase_sf || LARCH_opts.ase_df) + { + if (!f_htab) + f_htab = str_htab_create (), str_hash_insert (f_htab, "", 0, 0); @@ -5648,7 +7825,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + } + + /* Init float-lp64 registers alias */ -+ if ((LARCH_opts.ase_float) && LARCH_opts.ase_lp64) ++ if ((LARCH_opts.ase_sf || LARCH_opts.ase_df) && LARCH_opts.ase_lp64) + { + for (i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name); i++) + str_hash_insert (f_htab, loongarch_f_lp64_name[i], @@ -5674,16 +7851,15 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + for (it = ase->opcodes; it->name; it++) + { + if (loongarch_check_format (it->format) != 0) -+ as_fatal (_ ("insn name: %s\tformat: %s\tsyntax error"), ++ as_fatal (_("insn name: %s\tformat: %s\tsyntax error"), + it->name, it->format); + if (it->mask == 0 && it->macro == 0) -+ as_fatal (_ ("insn name: %s\nformat: %s\nwe want macro but " -+ "macro is NULL"), ++ as_fatal (_("insn name: %s\nformat: %s\nwe want macro but " ++ "macro is NULL"), + it->name, it->format); + if (it->macro + && loongarch_check_macro (it->format, it->macro) != 0) -+ as_fatal ( -+ _ ("insn name: %s\nformat: %s\nmacro: %s\tsyntax error"), ++ as_fatal (_("insn name: %s\nformat: %s\nmacro: %s\tsyntax error"), + it->name, it->format, it->macro); + } + @@ -5692,20 +7868,14 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + assert (8 <= sizeof (offsetT)); +} + -+static const expressionS const_0 = { .X_op = O_constant, .X_add_number = 0 }; -+ -+static const char * -+my_getExpression (expressionS *ep, const char *str) ++unsigned long ++loongarch_mach (void) +{ -+ char *save_in, *ret; -+ save_in = input_line_pointer; -+ input_line_pointer = (char *) str; -+ expression (ep); -+ ret = input_line_pointer; -+ input_line_pointer = save_in; -+ return ret; ++ return LARCH_opts.ase_lp64 ? bfd_mach_loongarch64 : bfd_mach_loongarch32; +} + ++static const expressionS const_0 = { .X_op = O_constant, .X_add_number = 0 }; ++ +static void +s_loongarch_align (int arg) +{ @@ -5732,7 +7902,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + + if (ex.X_op != O_symbol) + { -+ as_bad (_ ("Unsupported use of %s"), ++ as_bad (_("Unsupported use of %s"), + (bytes == 8 ? ".dtpreldword" : ".dtprelword")); + ignore_rest_of_line (); + } @@ -5740,8 +7910,9 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + p = frag_more (bytes); + md_number_to_chars (p, 0, bytes); + fix_new_exp (frag_now, p - frag_now->fr_literal, bytes, &ex, FALSE, -+ (bytes == 8 ? BFD_RELOC_LARCH_TLS_DTPREL64 -+ : BFD_RELOC_LARCH_TLS_DTPREL32)); ++ (bytes == 8 ++ ? BFD_RELOC_LARCH_TLS_DTPREL64 ++ : BFD_RELOC_LARCH_TLS_DTPREL32)); + + demand_empty_rest_of_line (); +} @@ -5804,18 +7975,13 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +{ + assert (label < INTERNAL_LABEL_SPECIAL); + if (augend == 0 && internal_label_count[label] == 0) -+ as_fatal (_ ("internal error: we have no internal label yet")); ++ as_fatal (_("internal error: we have no internal label yet")); + label_expr->X_op = O_symbol; + label_expr->X_add_symbol = + symbol_find_or_make (loongarch_internal_label_name (label, augend)); + label_expr->X_add_number = 0; +} + -+extern int loongarch_parse_expr (const char *expr, -+ struct reloc_info *reloc_stack_top, -+ size_t max_reloc_num, size_t *reloc_num, -+ offsetT *imm_if_no_reloc); -+ +static int +is_internal_label (const char *c_str) +{ @@ -5914,7 +8080,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + default: + ip->match_now = is_label (arg); + if (!ip->match_now && is_label_with_addend (arg)) -+ as_fatal (_ ("This label shouldn't be with addend.")); ++ as_fatal (_("This label shouldn't be with addend.")); + break; + case 'a': + ip->match_now = is_label_with_addend (arg); @@ -5954,7 +8120,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + bfd_reloc_code_real_type reloc_type = BFD_RELOC_NONE; + reloc_num_we_have -= reloc_num; + if (reloc_num_we_have == 0) -+ as_fatal (_ ("expr too huge") /* Want one more reloc. */); ++ as_fatal (_("expr too huge") /* Want one more reloc. */); + if (esc_ch1 == 'u') + { + if (strncmp (bit_field, "10:12", strlen ("10:12")) == 0) @@ -5981,8 +8147,17 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + } + if (reloc_type == BFD_RELOC_NONE) + as_fatal ( -+ _ ("not support reloc bit-field\nfmt: %c%c %s\nargs: %s"), ++ _("not support reloc bit-field\nfmt: %c%c %s\nargs: %s"), + esc_ch1, esc_ch2, bit_field, arg); ++ if (ip->reloc_info[0].type >= BFD_RELOC_LARCH_B16 ++ && ip->reloc_info[0].type < BFD_RELOC_LARCH_RELAX) ++ { ++ /* As we compact stack-relocs, it is no need for pop operation. ++ But break out until here in order to check the imm field. ++ May be reloc_num > 1 if implement relax? */ ++ ip->reloc_num += reloc_num; ++ break; ++ } + reloc_num++; + ip->reloc_num += reloc_num; + ip->reloc_info[ip->reloc_num - 1].type = reloc_type; @@ -5990,12 +8165,12 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + } + break; + case 'r': -+ imm = (offsetT) str_hash_find (r_htab, arg); ++ imm = (intptr_t) str_hash_find (r_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'f': -+ imm = (offsetT) str_hash_find (f_htab, arg); ++ imm = (intptr_t) str_hash_find (f_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; @@ -6003,21 +8178,21 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + switch (esc_ch2) + { + case 'r': -+ imm = (offsetT) str_hash_find (cr_htab, arg); ++ imm = (intptr_t) str_hash_find (cr_htab, arg); + break; + default: -+ imm = (offsetT) str_hash_find (c_htab, arg); ++ imm = (intptr_t) str_hash_find (c_htab, arg); + } + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'v': -+ imm = (offsetT) str_hash_find (v_htab, arg); ++ imm = (intptr_t) str_hash_find (v_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'x': -+ imm = (offsetT) str_hash_find (x_htab, arg); ++ imm = (intptr_t) str_hash_find (x_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; @@ -6029,7 +8204,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + ip->relax_max_length = ip->insn_length; + break; + default: -+ as_fatal (_ ("unknown escape")); ++ as_fatal (_("unknown escape")); + } + + do @@ -6056,7 +8231,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + int i = strtol (t += 2, &t, 10), j; + for (j = i; 0 < j; j--, imm >>= 1) + if (imm & 1) -+ as_fatal (_ ("require imm low %d bit is 0."), i); ++ as_fatal (_("require imm low %d bit is 0."), i); + } + + if (*t == '+') @@ -6068,9 +8243,9 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + if ((esc_ch1 == 's' && bit_width < bits_needed_s) + || (esc_ch1 != 's' && bit_width < bits_needed_u)) + /* How to do after we detect overflow. */ -+ as_fatal (_ ("Immediate overflow.\n" -+ "format: %c%c%s\n" -+ "arg: %s"), ++ as_fatal (_("Immediate overflow.\n" ++ "format: %c%c%s\n" ++ "arg: %s"), + esc_ch1, esc_ch2, bit_field, arg); + } + while (0); @@ -6098,7 +8273,12 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + { + ase->name_hash_entry = str_htab_create (); + for (it = ase->opcodes; it->name; it++) -+ str_hash_insert (ase->name_hash_entry, it->name, (void *) it, 0); ++ { ++ if ((!it->include || (it->include && *it->include)) ++ && (!it->exclude || (it->exclude && !(*it->exclude)))) ++ str_hash_insert (ase->name_hash_entry, it->name, ++ (void *) it, 0); ++ } + } + + if ((it = str_hash_find (ase->name_hash_entry, insn->name)) == NULL) @@ -6111,11 +8291,12 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + insn->all_match = 0; + insn->arg_num = 0; + insn->reloc_num = 0; -+ insn->insn_bin = loongarch_foreach_args ( -+ it->format, insn->arg_strs, -+ loongarch_args_parser_can_match_arg_helper, insn); ++ insn->insn_bin = (loongarch_foreach_args ++ (it->format, insn->arg_strs, ++ loongarch_args_parser_can_match_arg_helper, ++ insn)); + if (insn->all_match && !(it->include && !*it->include) -+ && !(it->exclude && *it->exclude)) ++ && !(it->exclude && *it->exclude)) + { + insn->insn_bin |= it->match; + return; @@ -6130,10 +8311,11 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +check_this_insn_before_appending (struct loongarch_cl_insn *ip) +{ + int ret = 0; -+ if (strcmp (ip->name, "la.abs") == 0) ++ ++ if (strncmp (ip->name, "la.abs", 6) == 0) + { + ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_MARK_LA; -+ my_getExpression (&ip->reloc_info[ip->reloc_num].value, ip->arg_strs[1]); ++ ip->reloc_info[ip->reloc_num].value = const_0; + ip->reloc_num++; + } + else if (ip->insn->mask == 0xffff8000 @@ -6147,8 +8329,8 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + /* For AMO insn amswap.[wd], amadd.[wd], etc. */ + if (ip->args[0] != 0 + && (ip->args[0] == ip->args[1] || ip->args[0] == ip->args[2])) -+ as_fatal ( -+ _ ("AMO insns require rd != base && rd != rt when rd isn't $r0")); ++ as_fatal (_("AMO insns require rd != base && rd != rt" ++ " when rd isn't $r0")); + } + else if ((ip->insn->mask == 0xffe08000 + /* bstrins.w rd, rj, msbw, lsbw */ @@ -6159,12 +8341,12 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + { + /* For bstr(ins|pick).[wd]. */ + if (ip->args[2] < ip->args[3]) -+ as_fatal (_ ("bstr(ins|pick).[wd] require msbd >= lsbd")); ++ as_fatal (_("bstr(ins|pick).[wd] require msbd >= lsbd")); + } + else if (ip->insn->mask != 0 && (ip->insn_bin & 0xfe0003c0) == 0x04000000 + /* csrxchg rd, rj, csr_num */ + && (strcmp ("csrxchg", ip->name) == 0)) -+ as_fatal (_ ("csrxchg require rj != $r0 && rj != $r1")); ++ as_fatal (_("csrxchg require rj != $r0 && rj != $r1")); + + return ret; +} @@ -6214,7 +8396,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + reloc_type = reloc_info[i].type; + howto = bfd_reloc_type_lookup (stdoutput, reloc_type); + if (howto == NULL) -+ as_fatal (_ ("no HOWTO loong relocation number %d"), reloc_type); ++ as_fatal (_("no HOWTO loong relocation number %d"), reloc_type); + + ip->fixp[i] = + fix_new_exp (ip->frag, ip->where, bfd_get_reloc_size (howto), @@ -6222,7 +8404,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + } + + if (ip->insn_length < ip->relax_max_length) -+ as_fatal (_ ("Internal error: not support relax now")); ++ as_fatal (_("Internal error: not support relax now")); + else + append_fixed_insn (ip); +} @@ -6250,12 +8432,12 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + if (strcmp (insn->name, "li.w") == 0) + { + if (hi32 != 0 && hi32 != 0xffffffff) -+ as_fatal (_ ("li overflow: hi32:0x%x lo32:0x%x"), hi32, lo32); ++ as_fatal (_("li overflow: hi32:0x%x lo32:0x%x"), hi32, lo32); + hi32 = lo32 & 0x80000000 ? 0xffffffff : 0; + } + + if (strcmp (insn->name, "li.d") == 0 && !LARCH_opts.ase_lp64) -+ as_fatal (_ ("we can't li.d on 32bit-arch")); ++ as_fatal (_("we can't li.d on 32bit-arch")); + + snprintf (args_buf, sizeof (args_buf), "0x%x,0x%x,0x%x,0x%x,%s", + (hi32 >> 20) & 0xfff, hi32 & 0xfffff, (lo32 >> 12) & 0xfffff, @@ -6263,15 +8445,16 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + loongarch_split_args_by_comma (args_buf, arg_strs); + + all0_bit_vec = -+ (((hi32 & 0xfff00000) == 0) << 3) | (((hi32 & 0x000fffff) == 0) << 2) -+ | (((lo32 & 0xfffff000) == 0) << 1) | ((lo32 & 0x00000fff) == 0); ++ ((((hi32 & 0xfff00000) == 0) << 3) | (((hi32 & 0x000fffff) == 0) << 2) ++ | (((lo32 & 0xfffff000) == 0) << 1) | ((lo32 & 0x00000fff) == 0)); + sign_bit_vec = -+ (((hi32 & 0x80000000) != 0) << 3) | (((hi32 & 0x00080000) != 0) << 2) -+ | (((lo32 & 0x80000000) != 0) << 1) | ((lo32 & 0x00000800) != 0); -+ allf_bit_vec = (((hi32 & 0xfff00000) == 0xfff00000) << 3) -+ | (((hi32 & 0x000fffff) == 0x000fffff) << 2) -+ | (((lo32 & 0xfffff000) == 0xfffff000) << 1) -+ | ((lo32 & 0x00000fff) == 0x00000fff); ++ ((((hi32 & 0x80000000) != 0) << 3) | (((hi32 & 0x00080000) != 0) << 2) ++ | (((lo32 & 0x80000000) != 0) << 1) | ((lo32 & 0x00000800) != 0)); ++ allf_bit_vec = ++ ((((hi32 & 0xfff00000) == 0xfff00000) << 3) ++ | (((hi32 & 0x000fffff) == 0x000fffff) << 2) ++ | (((lo32 & 0xfffff000) == 0xfffff000) << 1) ++ | ((lo32 & 0x00000fff) == 0x00000fff)); + paritial_is_sext_of_prev = + (all0_bit_vec ^ allf_bit_vec) & (all0_bit_vec ^ (sign_bit_vec << 1)); + @@ -6285,7 +8468,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + static const char *const li_hi_32bit[] = + { + "lu32i.d %5,%2&0x80000?%2-0x100000:%2;" -+ "lu52i.d %5,%5,%1&0x800?%1-0x1000:%1;", ++ "lu52i.d %5,%5,%1&0x800?%1-0x1000:%1;", + "lu52i.d %5,%5,%1&0x800?%1-0x1000:%1;", + "lu32i.d %5,%2&0x80000?%2-0x100000:%2;", + "", @@ -6306,8 +8489,10 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + } + while (0); + -+ ret = loongarch_expand_macro (insns_buf, arg_strs, NULL, NULL); ++ ret = loongarch_expand_macro (insns_buf, arg_strs, NULL, NULL, ++ sizeof (args_buf)); + } ++ + return ret; +} + @@ -6318,6 +8503,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +loongarch_assemble_INSNs (char *str) +{ + char *rest; ++ size_t len_str = strlen(str); + + for (rest = str; *rest != ';' && *rest != '\0'; rest++); + if (*rest == ';') @@ -6349,7 +8535,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + if (!the_one.all_match) + { + char *ss = loongarch_cat_splited_strs (the_one.arg_strs); -+ as_bad (_ ("no match insn: %s\t%s"), the_one.name, ss ? ss : ""); ++ as_bad (_("no match insn: %s\t%s"), the_one.name, ss ? ss : ""); + free(ss); + return; + } @@ -6363,7 +8549,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + char *c_str = loongarch_expand_macro (the_one.insn->macro, + the_one.arg_strs, + assember_macro_helper, -+ &the_one); ++ &the_one, len_str); + loongarch_assemble_INSNs (c_str); + free (c_str); + } @@ -6400,13 +8586,30 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + return 0; +} + ++static void fix_reloc_insn (fixS *fixP, bfd_vma reloc_val, char *buf) ++{ ++ reloc_howto_type *howto; ++ insn_t insn; ++ howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); ++ ++ insn = bfd_getl32 (buf); ++ ++ if (!loongarch_adjust_reloc_bitsfield(howto, &reloc_val)) ++ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); ++ ++ insn = (insn & (insn_t)howto->src_mask) ++ | ((insn & (~(insn_t)howto->dst_mask)) | reloc_val); ++ ++ bfd_putl32 (insn, buf); ++} ++ +void +md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) +{ + static int64_t stack_top; + static int last_reloc_is_sop_push_pcrel_1 = 0; + int last_reloc_is_sop_push_pcrel = last_reloc_is_sop_push_pcrel_1; -+ insn_t insn; ++ segT sub_segment; + last_reloc_is_sop_push_pcrel_1 = 0; + + char *buf = fixP->fx_frag->fr_literal + fixP->fx_where; @@ -6415,143 +8618,77 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + case BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL: + case BFD_RELOC_LARCH_SOP_PUSH_TLS_GD: + case BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT: -+ if (fixP->fx_addsy) -+ S_SET_THREAD_LOCAL (fixP->fx_addsy); -+ else ++ case BFD_RELOC_LARCH_TLS_LE_HI20: ++ case BFD_RELOC_LARCH_TLS_LE_LO12: ++ case BFD_RELOC_LARCH_TLS_LE64_LO20: ++ case BFD_RELOC_LARCH_TLS_LE64_HI12: ++ case BFD_RELOC_LARCH_TLS_IE_PC_HI20: ++ case BFD_RELOC_LARCH_TLS_IE_PC_LO12: ++ case BFD_RELOC_LARCH_TLS_IE64_PC_LO20: ++ case BFD_RELOC_LARCH_TLS_IE64_PC_HI12: ++ case BFD_RELOC_LARCH_TLS_IE_HI20: ++ case BFD_RELOC_LARCH_TLS_IE_LO12: ++ case BFD_RELOC_LARCH_TLS_IE64_LO20: ++ case BFD_RELOC_LARCH_TLS_IE64_HI12: ++ case BFD_RELOC_LARCH_TLS_LD_PC_HI20: ++ case BFD_RELOC_LARCH_TLS_LD_HI20: ++ case BFD_RELOC_LARCH_TLS_GD_PC_HI20: ++ case BFD_RELOC_LARCH_TLS_GD_HI20: ++ /* Add tls lo (got_lo reloc type). */ ++ if (fixP->fx_addsy == NULL) + as_bad_where (fixP->fx_file, fixP->fx_line, -+ _ ("Relocation against a constant")); ++ _("Relocation against a constant")); ++ S_SET_THREAD_LOCAL (fixP->fx_addsy); + break; ++ + case BFD_RELOC_LARCH_SOP_PUSH_PCREL: -+ case BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL: + if (fixP->fx_addsy == NULL) + as_bad_where (fixP->fx_file, fixP->fx_line, -+ _ ("Relocation against a constant")); -+ if (fixP->fx_r_type == BFD_RELOC_LARCH_SOP_PUSH_PCREL) -+ { -+ last_reloc_is_sop_push_pcrel_1 = 1; -+ if (S_GET_SEGMENT (fixP->fx_addsy) == seg) -+ stack_top = S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset -+ - (fixP->fx_where + fixP->fx_frag->fr_address); -+ else -+ stack_top = 0; -+ } -+ break; -+ -+ case BFD_RELOC_LARCH_SOP_POP_32_S_10_5: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if ((stack_top & ~(uint64_t) 0xf) != 0x0 -+ && (stack_top & ~(uint64_t) 0xf) != ~(uint64_t) 0xf) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & (~(uint32_t) 0x7c00)) | ((stack_top & 0x1f) << 10); -+ bfd_putl32 (insn, buf); -+ break; ++ _("Relocation against a constant")); + -+ case BFD_RELOC_LARCH_SOP_POP_32_U_10_12: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if (stack_top & ~(uint64_t) 0xfff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & (~(uint32_t) 0x3ffc00)) | ((stack_top & 0xfff) << 10); -+ bfd_putl32 (insn, buf); ++ last_reloc_is_sop_push_pcrel_1 = 1; ++ if (S_GET_SEGMENT (fixP->fx_addsy) == seg) ++ stack_top = (S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset ++ - (fixP->fx_where + fixP->fx_frag->fr_address)); ++ else ++ stack_top = 0; + break; + ++ case BFD_RELOC_LARCH_SOP_POP_32_S_10_5: + case BFD_RELOC_LARCH_SOP_POP_32_S_10_12: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if ((stack_top & ~(uint64_t) 0x7ff) != 0x0 -+ && (stack_top & ~(uint64_t) 0x7ff) != ~(uint64_t) 0x7ff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & (~(uint32_t) 0x3ffc00)) | ((stack_top & 0xfff) << 10); -+ bfd_putl32 (insn, buf); -+ break; -+ ++ case BFD_RELOC_LARCH_SOP_POP_32_U_10_12: + case BFD_RELOC_LARCH_SOP_POP_32_S_10_16: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if ((stack_top & ~(uint64_t) 0x7fff) != 0x0 -+ && (stack_top & ~(uint64_t) 0x7fff) != ~(uint64_t) 0x7fff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & 0xfc0003ff) | ((stack_top & 0xffff) << 10); -+ bfd_putl32 (insn, buf); -+ break; -+ + case BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if ((stack_top & 0x3) != 0) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ stack_top >>= 2; -+ if ((stack_top & ~(uint64_t) 0x7fff) != 0x0 -+ && (stack_top & ~(uint64_t) 0x7fff) != ~(uint64_t) 0x7fff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & 0xfc0003ff) | ((stack_top & 0xffff) << 10); -+ bfd_putl32 (insn, buf); -+ break; -+ -+ case BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if ((stack_top & 0x3) != 0) -+ break; -+ stack_top >>= 2; -+ if ((stack_top & ~(uint64_t) 0xfffff) != 0x0 -+ && (stack_top & ~(uint64_t) 0xfffff) != ~(uint64_t) 0xfffff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & 0xfc0003e0) -+ | ((stack_top & 0xffff) << 10) -+ | ((stack_top & 0x1f0000) >> 16); -+ bfd_putl32 (insn, buf); -+ break; -+ + case BFD_RELOC_LARCH_SOP_POP_32_S_5_20: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if ((stack_top & ~(uint64_t) 0x7ffff) != 0x0 -+ && (stack_top & ~(uint64_t) 0x7ffff) != ~(uint64_t) 0x7ffff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & (~(uint32_t) 0x1ffffe0)) | ((stack_top & 0xfffff) << 5); -+ bfd_putl32 (insn, buf); -+ break; -+ ++ case BFD_RELOC_LARCH_SOP_POP_32_U: ++ case BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2: + case BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2: + if (!last_reloc_is_sop_push_pcrel) + break; -+ if ((stack_top & 0x3) != 0) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ stack_top >>= 2; -+ if ((stack_top & ~(uint64_t) 0x1ffffff) != 0x0 -+ && (stack_top & ~(uint64_t) 0x1ffffff) != ~(uint64_t) 0x1ffffff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ insn = bfd_getl32 (buf); -+ insn = (insn & 0xfc000000) -+ | ((stack_top & 0xffff) << 10) -+ | ((stack_top & 0x3ff0000) >> 16); -+ bfd_putl32 (insn, buf); -+ break; + -+ case BFD_RELOC_LARCH_SOP_POP_32_U: -+ if (!last_reloc_is_sop_push_pcrel) -+ break; -+ if (stack_top & ~(uint64_t) 0xffffffff) -+ as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); -+ bfd_putl32 (stack_top, buf); ++ fix_reloc_insn (fixP, (bfd_vma)stack_top, buf); + break; + + case BFD_RELOC_64: + case BFD_RELOC_32: ++ case BFD_RELOC_24: ++ case BFD_RELOC_16: ++ case BFD_RELOC_8: ++ ++ if (fixP->fx_r_type == BFD_RELOC_32 ++ && fixP->fx_addsy && fixP->fx_subsy ++ && (sub_segment = S_GET_SEGMENT (fixP->fx_subsy)) ++ && strcmp (sub_segment->name, ".eh_frame") == 0 ++ && S_GET_VALUE (fixP->fx_subsy) ++ == fixP->fx_frag->fr_address + fixP->fx_where) ++ { ++ fixP->fx_r_type = BFD_RELOC_LARCH_32_PCREL; ++ fixP->fx_subsy = NULL; ++ break; ++ } ++ + if (fixP->fx_subsy) + { -+ case BFD_RELOC_24: -+ case BFD_RELOC_16: -+ case BFD_RELOC_8: + fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); + fixP->fx_next->fx_addsy = fixP->fx_subsy; + fixP->fx_next->fx_subsy = NULL; @@ -6594,6 +8731,25 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + } + break; + ++ case BFD_RELOC_LARCH_B16: ++ case BFD_RELOC_LARCH_B21: ++ case BFD_RELOC_LARCH_B26: ++ if (fixP->fx_addsy == NULL) ++ { ++ as_bad_where (fixP->fx_file, fixP->fx_line, ++ _ ("Relocation against a constant.")); ++ } ++ if (S_GET_SEGMENT (fixP->fx_addsy) == seg ++ && !S_FORCE_RELOC (fixP->fx_addsy, 1)) ++ { ++ int64_t sym_addend = S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset; ++ int64_t pc = fixP->fx_where + fixP->fx_frag->fr_address; ++ fix_reloc_insn (fixP, sym_addend - pc, buf); ++ fixP->fx_done = 1; ++ } ++ ++ break; ++ + default: + break; + } @@ -6614,6 +8770,18 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + return 0; +} + ++int ++loongarch_fix_adjustable (fixS *fix) ++{ ++ /* Prevent all adjustments to global symbols. */ ++ if (S_IS_EXTERNAL (fix->fx_addsy) ++ || S_IS_WEAK (fix->fx_addsy) ++ || S_FORCE_RELOC (fix->fx_addsy, true)) ++ return 0; ++ ++ return 1; ++} ++ +/* Translate internal representation of relocation info to BFD target + format. */ +arelent * @@ -6630,7 +8798,7 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + if (reloc->howto == NULL) + { + as_bad_where (fixp->fx_file, fixp->fx_line, -+ _ ("cannot represent %s relocation in object file"), ++ _("cannot represent %s relocation in object file"), + bfd_get_reloc_code_name (fixp->fx_r_type)); + return NULL; + } @@ -6653,12 +8821,6 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + cfi_add_CFA_def_cfa_register (3 /* $sp */); +} + -+int -+loongarch_dwarf2_addr_size (void) -+{ -+ return LARCH_opts.ase_lp64 ? 8 : 4; -+} -+ +void +tc_loongarch_parse_to_dw2regnum (expressionS *exp) +{ @@ -6668,9 +8830,8 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +void +md_show_usage (FILE *stream) +{ -+ fprintf (stream, _ ("\ -+ LARCH options:\n\ -+ ")); ++ fprintf (stream, _("LARCH options:\n")); ++ /* FIXME */ +} + +/* Fill in an rs_align_code fragment. We want to fill 'andi $r0,$r0,0'. */ @@ -6685,8 +8846,8 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t + if (fragp->fr_type != rs_align_code) + return; + -+ struct loongarch_cl_insn nop = { .name = "andi", -+ .arg_strs = { "$r0", "$r0", "0", NULL } }; ++ struct loongarch_cl_insn nop = ++ { .name = "andi", .arg_strs = { "$r0", "$r0", "0", NULL } }; + + get_loongarch_opcode (&nop); + gas_assert (nop.all_match); @@ -6711,14 +8872,16 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.c binutils-2.37/gas/config/t +void +loongarch_elf_final_processing (void) +{ -+ elf_elfheader (stdoutput)->e_flags |= LARCH_opts.ase_abi; ++ elf_elfheader (stdoutput)->e_flags = LARCH_opts.ase_abi; +} -diff -uNr binutils-2.37.org/gas/config/tc-loongarch.h binutils-2.37/gas/config/tc-loongarch.h ---- binutils-2.37.org/gas/config/tc-loongarch.h 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/config/tc-loongarch.h 2022-03-24 16:30:09.297113891 +0800 +diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h +new file mode 100644 +index 00000000..f05926d7 +--- /dev/null ++++ b/gas/config/tc-loongarch.h @@ -0,0 +1,91 @@ +/* tc-loongarch.h -- Header file for tc-loongarch.c. -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GAS. @@ -6743,6 +8906,9 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.h binutils-2.37/gas/config/t +#define TARGET_BYTES_BIG_ENDIAN 0 +#define TARGET_ARCH bfd_arch_loongarch + ++#define TARGET_MACH (loongarch_mach ()) ++extern unsigned long loongarch_mach (void); ++ +#define WORKING_DOT_WORD 1 +#define REPEAT_CONS_EXPRESSIONS + @@ -6765,7 +8931,8 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.h binutils-2.37/gas/config/t + +/* This is called to see whether a reloc against a defined symbol + should be converted into a reloc against a section. */ -+#define tc_fix_adjustable(fixp) 0 ++extern int loongarch_fix_adjustable (struct fix *fix); ++#define tc_fix_adjustable(fixp) loongarch_fix_adjustable(fixp) + +/* Values passed to md_apply_fix don't include symbol values. */ +#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1 @@ -6775,10 +8942,6 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.h binutils-2.37/gas/config/t +#define TARGET_USE_CFIPOP 1 +#define DWARF2_DEFAULT_RETURN_COLUMN 1 /* $ra. */ +#define DWARF2_CIE_DATA_ALIGNMENT -4 -+extern int loongarch_dwarf2_addr_size (void); -+#define DWARF2_FDE_RELOC_SIZE loongarch_dwarf2_addr_size () -+#define DWARF2_ADDR_SIZE(bfd) loongarch_dwarf2_addr_size () -+#define CFI_DIFF_EXPR_OK 0 + +#define tc_cfi_frame_initial_instructions \ + loongarch_cfi_frame_initial_instructions @@ -6808,10 +8971,11 @@ diff -uNr binutils-2.37.org/gas/config/tc-loongarch.h binutils-2.37/gas/config/t +}; + +#endif -diff -uNr binutils-2.37.org/gas/configure binutils-2.37/gas/configure ---- binutils-2.37.org/gas/configure 2022-03-23 16:44:12.373037333 +0800 -+++ binutils-2.37/gas/configure 2022-03-24 16:30:09.672109677 +0800 -@@ -12230,6 +12230,15 @@ +diff --git a/gas/configure b/gas/configure +index 73750257..3c97a465 100755 +--- a/gas/configure ++++ b/gas/configure +@@ -12230,6 +12230,15 @@ _ACEOF using_cgen=yes ;; @@ -6827,10 +8991,11 @@ diff -uNr binutils-2.37.org/gas/configure binutils-2.37/gas/configure m32c) using_cgen=yes ;; -diff -uNr binutils-2.37.org/gas/configure.ac binutils-2.37/gas/configure.ac ---- binutils-2.37.org/gas/configure.ac 2022-03-23 16:44:12.056040878 +0800 -+++ binutils-2.37/gas/configure.ac 2022-03-24 16:30:09.354113250 +0800 -@@ -446,6 +446,15 @@ +diff --git a/gas/configure.ac b/gas/configure.ac +index 78efba88..d1a4667b 100644 +--- a/gas/configure.ac ++++ b/gas/configure.ac +@@ -446,6 +446,15 @@ changequote([,])dnl using_cgen=yes ;; @@ -6846,10 +9011,11 @@ diff -uNr binutils-2.37.org/gas/configure.ac binutils-2.37/gas/configure.ac m32c) using_cgen=yes ;; -diff -uNr binutils-2.37.org/gas/configure.tgt binutils-2.37/gas/configure.tgt ---- binutils-2.37.org/gas/configure.tgt 2022-03-23 16:44:12.061040822 +0800 -+++ binutils-2.37/gas/configure.tgt 2022-03-24 16:30:09.359113194 +0800 -@@ -67,6 +67,7 @@ +diff --git a/gas/configure.tgt b/gas/configure.tgt +index 338892ad..4a399c7c 100644 +--- a/gas/configure.tgt ++++ b/gas/configure.tgt +@@ -67,6 +67,7 @@ case ${cpu} in ip2k) cpu_type=ip2k endian=big ;; iq2000) cpu_type=iq2000 endian=big ;; lm32) cpu_type=lm32 ;; @@ -6857,7 +9023,7 @@ diff -uNr binutils-2.37.org/gas/configure.tgt binutils-2.37/gas/configure.tgt m32c) cpu_type=m32c endian=little ;; m32r) cpu_type=m32r endian=big ;; m32rle) cpu_type=m32r endian=little ;; -@@ -275,6 +276,8 @@ +@@ -275,6 +276,8 @@ case ${generic_target} in lm32-*-*) fmt=elf ;; @@ -6866,7 +9032,7 @@ diff -uNr binutils-2.37.org/gas/configure.tgt binutils-2.37/gas/configure.tgt m32c-*-elf) fmt=elf ;; m32r-*-elf*) fmt=elf ;; -@@ -435,7 +438,7 @@ +@@ -435,7 +438,7 @@ esac case ${cpu_type} in aarch64 | alpha | arm | csky | i386 | ia64 | microblaze | mips | ns32k | \ @@ -6875,10 +9041,11 @@ diff -uNr binutils-2.37.org/gas/configure.tgt binutils-2.37/gas/configure.tgt bfd_gas=yes ;; esac -diff -uNr binutils-2.37.org/gas/doc/as.texi binutils-2.37/gas/doc/as.texi ---- binutils-2.37.org/gas/doc/as.texi 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/gas/doc/as.texi 2022-03-24 16:30:09.300113857 +0800 -@@ -379,6 +379,11 @@ +diff --git a/gas/doc/as.texi b/gas/doc/as.texi +index 292c4af2..9445cda4 100644 +--- a/gas/doc/as.texi ++++ b/gas/doc/as.texi +@@ -379,6 +379,11 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @emph{Target IP2K options:} [@b{-mip2022}|@b{-mip2022ext}] @end ifset @@ -6890,7 +9057,7 @@ diff -uNr binutils-2.37.org/gas/doc/as.texi binutils-2.37/gas/doc/as.texi @ifset M32C @emph{Target M32C options:} -@@ -1756,6 +1761,25 @@ +@@ -1756,6 +1761,25 @@ Assemble for a little endian target. @end ifset @c man end @@ -6907,219 +9074,86 @@ diff -uNr binutils-2.37.org/gas/doc/as.texi binutils-2.37/gas/doc/as.texi +LoongArch processor. +@c man end +@c man begin INCLUDE -+@include c-loongarch.texi -+@c ended inside the included file -+@end ifset -+ -+@end ifset -+ - @ifset METAG - - @ifclear man -@@ -7837,6 +7861,9 @@ - @ifset IP2K - * IP2K-Dependent:: IP2K Dependent Features - @end ifset -+@ifset LOONGARCH -+* LoongArch-Dependent:: LoongArch Dependent Features -+@end ifset - @ifset LM32 - * LM32-Dependent:: LM32 Dependent Features - @end ifset -@@ -8061,6 +8088,10 @@ - @include c-lm32.texi - @end ifset - -+@ifset LOONGARCH -+@include c-loongarch.texi -+@end ifset -+ - @ifset M32C - @include c-m32c.texi - @end ifset -diff -uNr binutils-2.37.org/gas/doc/c-loongarch.texi binutils-2.37/gas/doc/c-loongarch.texi ---- binutils-2.37.org/gas/doc/c-loongarch.texi 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/doc/c-loongarch.texi 2022-03-24 16:30:09.300113857 +0800 -@@ -0,0 +1,39 @@ -+@c Copyright (C) 2021 Free Software Foundation, Inc. -+@c This is part of the GAS anual. -+@c For copying conditions, see the file as.texinfo -+@c man end -+ -+@ifset GENERIC -+@page -+@node LoongArch-Dependent -+@chapter LoongArch Dependent Features -+@end ifset -+@ifclear GENERIC -+@node Machine Dependencies -+@chapter LoongArch Dependent Features -+@end ifclear -+ -+@cindex LoongArch support -+@menu -+* LoongArch-Options:: LoongArch Options -+@end menu -+ -+@node LoongArch-Options -+@section LoongArch Options -+ -+The following table lists all available LoongArch specific options. -+ -+@c man begin OPTIONS -+@table @gcctabopt -+ -+@cindex @samp{-fpic} option, LoongArch -+@item -fpic -+@itemx -fPIC -+Generate position-independent code -+ -+@cindex @samp{-fno-pic} option, LoongArch -+@item -fno-pic -+Don't generate position-independent code (default) -+ -+@end table -+@c man end -diff -uNr binutils-2.37.org/gas/Makefile.am binutils-2.37/gas/Makefile.am ---- binutils-2.37.org/gas/Makefile.am 2022-03-23 16:44:12.358037501 +0800 -+++ binutils-2.37/gas/Makefile.am 2022-03-24 16:30:09.657109845 +0800 -@@ -155,6 +155,7 @@ - config/tc-ip2k.c \ - config/tc-iq2000.c \ - config/tc-lm32.c \ -+ config/tc-loongarch.c \ - config/tc-m32c.c \ - config/tc-m32r.c \ - config/tc-m68hc11.c \ -@@ -375,7 +376,8 @@ - EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \ - config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \ - config/rl78-parse.c config/rl78-parse.h \ -- config/rx-parse.c config/rx-parse.h -+ config/rx-parse.c config/rx-parse.h \ -+ config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c - - diststuff: $(EXTRA_DIST) info - -@@ -472,6 +474,19 @@ - config/rx-parse.h: config/rx-parse.c - @true - -+# The LoongArch lexical analyzer and parser. -+EXTRA_as_new_SOURCES += config/loongarch-parse.y -+config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y -+ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ; -+config/loongarch-parse.h: config/loongarch-parse.c -+ @true -+ -+EXTRA_as_new_SOURCES += config/loongarch-lex.l -+config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l -+ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE) -+ -+config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h -+ - # The mips instruction table specification lexical analyzer and parser. - - itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h -diff -uNr binutils-2.37.org/gas/Makefile.in binutils-2.37/gas/Makefile.in ---- binutils-2.37.org/gas/Makefile.in 2022-03-23 16:44:12.367037401 +0800 -+++ binutils-2.37/gas/Makefile.in 2022-03-24 16:30:09.666109744 +0800 -@@ -544,6 +544,7 @@ - config/tc-ip2k.c \ - config/tc-iq2000.c \ - config/tc-lm32.c \ -+ config/tc-loongarch.c \ - config/tc-m32c.c \ - config/tc-m32r.c \ - config/tc-m68hc11.c \ -@@ -757,7 +758,8 @@ - EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \ - config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \ - config/rl78-parse.c config/rl78-parse.h \ -- config/rx-parse.c config/rx-parse.h -+ config/rx-parse.c config/rx-parse.h \ -+ config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c - - DISTCLEANFILES = targ-cpu.h obj-format.h targ-env.h itbl-cpu.h cgen-desc.h - -@@ -789,12 +791,14 @@ - as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ - $(extra_objects) $(GASLIBS) $(LIBINTL_DEP) - -+ -+# The LoongArch lexical analyzer and parser. - EXTRA_as_new_SOURCES = $(CFILES) $(HFILES) $(TARGET_CPU_CFILES) \ - $(TARGET_CPU_HFILES) $(TARGET_EXTRA_FILES) $(TARG_ENV_CFILES) \ - $(OBJ_FORMAT_CFILES) $(OBJ_FORMAT_HFILES) \ - $(CONFIG_ATOF_CFILES) $(MULTI_CFILES) config/m68k-parse.y \ - config/bfin-parse.y config/bfin-lex.l config/rl78-parse.y \ -- config/rx-parse.y -+ config/rx-parse.y config/loongarch-parse.y - EXPECT = expect - RUNTEST = runtest - RUNTESTFLAGS = -@@ -939,6 +943,8 @@ - config/$(DEPDIR)/$(am__dirstamp) - config/tc-lm32.$(OBJEXT): config/$(am__dirstamp) \ - config/$(DEPDIR)/$(am__dirstamp) -+config/tc-loongarch.$(OBJEXT): config/$(am__dirstamp) \ -+ config/$(DEPDIR)/$(am__dirstamp) - config/tc-m32c.$(OBJEXT): config/$(am__dirstamp) \ - config/$(DEPDIR)/$(am__dirstamp) - config/tc-m32r.$(OBJEXT): config/$(am__dirstamp) \ -@@ -1085,6 +1091,8 @@ - config/$(DEPDIR)/$(am__dirstamp) - config/rx-parse.$(OBJEXT): config/$(am__dirstamp) \ - config/$(DEPDIR)/$(am__dirstamp) -+config/loongarch-parse.$(OBJEXT): config/$(am__dirstamp) \ -+ config/$(DEPDIR)/$(am__dirstamp) - - as-new$(EXEEXT): $(as_new_OBJECTS) $(as_new_DEPENDENCIES) $(EXTRA_as_new_DEPENDENCIES) - @rm -f as-new$(EXEEXT) -@@ -1146,6 +1154,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386coff.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386elf.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-mipself.Po@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/loongarch-parse.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/m68k-parse.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-aout.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-coff.Po@am__quote@ -@@ -1183,6 +1192,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-ip2k.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-iq2000.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-lm32.Po@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-loongarch.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32c.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32r.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m68hc11.Po@am__quote@ -@@ -1452,6 +1462,7 @@ - @echo "it deletes files that may require special tools to rebuild." - -rm -f config/bfin-lex.c - -rm -f config/bfin-parse.c -+ -rm -f config/loongarch-parse.c - -rm -f config/m68k-parse.c - -rm -f config/rl78-parse.c - -rm -f config/rx-parse.c -@@ -1602,6 +1613,15 @@ - config/rx-parse.h: config/rx-parse.c - @true - -+config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y -+ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ; -+config/loongarch-parse.h: config/loongarch-parse.c -+ @true -+config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l -+ $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE) ++@include c-loongarch.texi ++@c ended inside the included file ++@end ifset + -+config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h ++@end ifset + - # The mips instruction table specification lexical analyzer and parser. + @ifset METAG - itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h -diff -uNr binutils-2.37.org/gas/po/POTFILES.in binutils-2.37/gas/po/POTFILES.in ---- binutils-2.37.org/gas/po/POTFILES.in 2021-07-19 00:37:46.000000000 +0800 -+++ binutils-2.37/gas/po/POTFILES.in 2022-03-24 16:30:09.300113857 +0800 -@@ -87,6 +87,7 @@ + @ifclear man +@@ -7837,6 +7861,9 @@ subject, see the hardware manufacturer's manual. + @ifset IP2K + * IP2K-Dependent:: IP2K Dependent Features + @end ifset ++@ifset LOONGARCH ++* LoongArch-Dependent:: LoongArch Dependent Features ++@end ifset + @ifset LM32 + * LM32-Dependent:: LM32 Dependent Features + @end ifset +@@ -8061,6 +8088,10 @@ family. + @include c-lm32.texi + @end ifset + ++@ifset LOONGARCH ++@include c-loongarch.texi ++@end ifset ++ + @ifset M32C + @include c-m32c.texi + @end ifset +diff --git a/gas/doc/c-loongarch.texi b/gas/doc/c-loongarch.texi +new file mode 100644 +index 00000000..2a139484 +--- /dev/null ++++ b/gas/doc/c-loongarch.texi +@@ -0,0 +1,39 @@ ++@c Copyright (C) 2021 Free Software Foundation, Inc. ++@c This is part of the GAS anual. ++@c For copying conditions, see the file as.texinfo ++@c man end ++ ++@ifset GENERIC ++@page ++@node LoongArch-Dependent ++@chapter LoongArch Dependent Features ++@end ifset ++@ifclear GENERIC ++@node Machine Dependencies ++@chapter LoongArch Dependent Features ++@end ifclear ++ ++@cindex LoongArch support ++@menu ++* LoongArch-Options:: LoongArch Options ++@end menu ++ ++@node LoongArch-Options ++@section LoongArch Options ++ ++The following table lists all available LoongArch specific options. ++ ++@c man begin OPTIONS ++@table @gcctabopt ++ ++@cindex @samp{-fpic} option, LoongArch ++@item -fpic ++@itemx -fPIC ++Generate position-independent code ++ ++@cindex @samp{-fno-pic} option, LoongArch ++@item -fno-pic ++Don't generate position-independent code (default) ++ ++@end table ++@c man end +diff --git a/gas/po/POTFILES.in b/gas/po/POTFILES.in +index 35b4a794..c25d4f50 100644 +--- a/gas/po/POTFILES.in ++++ b/gas/po/POTFILES.in +@@ -87,6 +87,7 @@ config/tc-iq2000.c config/tc-iq2000.h config/tc-lm32.c config/tc-lm32.h @@ -7127,10 +9161,11 @@ diff -uNr binutils-2.37.org/gas/po/POTFILES.in binutils-2.37/gas/po/POTFILES.in config/tc-m32c.c config/tc-m32c.h config/tc-m32r.c -diff -uNr binutils-2.37.org/gas/testsuite/gas/all/gas.exp binutils-2.37/gas/testsuite/gas/all/gas.exp ---- binutils-2.37.org/gas/testsuite/gas/all/gas.exp 2021-07-08 19:37:19.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/all/gas.exp 2022-03-24 16:30:09.300113857 +0800 -@@ -68,7 +68,8 @@ +diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp +index 389634f6..b39acfa0 100644 +--- a/gas/testsuite/gas/all/gas.exp ++++ b/gas/testsuite/gas/all/gas.exp +@@ -68,7 +68,8 @@ if { ![istarget alpha*-*-*vms*] && ![istarget riscv*-*-*] && ![istarget rl78-*-*] && ![istarget rs6000*-*-aix*] @@ -7140,30 +9175,20 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/all/gas.exp binutils-2.37/gas/test gas_test_error "diff1.s" "" "difference of two undefined symbols" } -@@ -160,9 +161,11 @@ - # symbols on relocs. - setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*" - setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*" -+ setup_xfail "loongarch*-*-*" - run_dump_test redef2 - setup_xfail "m68hc1*-*-*" "m6811-*-*" "m6812-*-*" "rl78-*-*" - setup_xfail "riscv*-*-*" "rx-*-*" "vax*-*-*" "xgate*-*-*" "z8k-*-*" -+ setup_xfail "loongarch*-*-*" - # rs6000-aix disallows redefinition via .comm. - if [is_xcoff_format] { - setup_xfail *-*-* -diff -uNr binutils-2.37.org/gas/testsuite/gas/elf/bad-bss.d binutils-2.37/gas/testsuite/gas/elf/bad-bss.d ---- binutils-2.37.org/gas/testsuite/gas/elf/bad-bss.d 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/elf/bad-bss.d 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/elf/bad-bss.d b/gas/testsuite/gas/elf/bad-bss.d +index 972a6ceb..a221167d 100644 +--- a/gas/testsuite/gas/elf/bad-bss.d ++++ b/gas/testsuite/gas/elf/bad-bss.d @@ -1,4 +1,4 @@ #name: bad .bss / .struct data allocation directives #source: bss.s #error_output: bad-bss.err -#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-* +#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-* loongarch*-*-* -diff -uNr binutils-2.37.org/gas/testsuite/gas/elf/bss.d binutils-2.37/gas/testsuite/gas/elf/bss.d ---- binutils-2.37.org/gas/testsuite/gas/elf/bss.d 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/elf/bss.d 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/elf/bss.d b/gas/testsuite/gas/elf/bss.d +index 711e74a9..29a2cd7c 100644 +--- a/gas/testsuite/gas/elf/bss.d ++++ b/gas/testsuite/gas/elf/bss.d @@ -2,7 +2,7 @@ #as: --defsym okay=1 #warning: Warning: zero assumed @@ -7173,10 +9198,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/elf/bss.d binutils-2.37/gas/testsu There are [1-9][0-9]* section headers, starting at offset 0x[0-9a-f]*: -diff -uNr binutils-2.37.org/gas/testsuite/gas/elf/elf.exp binutils-2.37/gas/testsuite/gas/elf/elf.exp ---- binutils-2.37.org/gas/testsuite/gas/elf/elf.exp 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/elf/elf.exp 2022-03-24 16:30:09.301113846 +0800 -@@ -178,6 +178,7 @@ +diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp +index 23804758..20a4ada4 100644 +--- a/gas/testsuite/gas/elf/elf.exp ++++ b/gas/testsuite/gas/elf/elf.exp +@@ -178,6 +178,7 @@ if { [is_elf_format] } then { rl78-*-* { } riscv*-*-* { } rx-*-* { } @@ -7184,11 +9210,13 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/elf/elf.exp binutils-2.37/gas/test default { # The next test can fail if the target does not convert fixups # against ordinary symbols into relocations against section symbols. -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.d binutils-2.37/gas/testsuite/gas/loongarch/4opt_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/4opt_op.d 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/4opt_op.d b/gas/testsuite/gas/loongarch/4opt_op.d +new file mode 100644 +index 00000000..4e8e2cf0 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/4opt_op.d @@ -0,0 +1,70 @@ -+#as: ++#as-new: +#objdump: -dr + +.*:[ ]+file format .* @@ -7196,7 +9224,7 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.d binutils-2.37/ + +Disassembly of section .text: + -+0000000000000000 <.text>: ++00000000.* <.text>: +[ ]+0:[ ]+08118820 [ ]+fmadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+4:[ ]+08218820 [ ]+fmadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+8:[ ]+08518820 [ ]+fmsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 @@ -7258,9 +9286,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.d binutils-2.37/ +[ ]+e8:[ ]+0c2c0820 [ ]+fcmp.cune.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+ec:[ ]+0c2c8820 [ ]+fcmp.sune.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+f0:[ ]+0d000820 [ ]+fsel[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fcc0 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.s binutils-2.37/gas/testsuite/gas/loongarch/4opt_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/4opt_op.s 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/4opt_op.s b/gas/testsuite/gas/loongarch/4opt_op.s +new file mode 100644 +index 00000000..f14fbd6b +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/4opt_op.s @@ -0,0 +1,61 @@ +fmadd.s $f0,$f1,$f2,$f3 +fmadd.d $f0,$f1,$f2,$f3 @@ -7323,9 +9353,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/4opt_op.s binutils-2.37/ +fcmp.cune.d $fcc0,$f1,$f2 +fcmp.sune.d $fcc0,$f1,$f2 +fsel $f0,$f1,$f2,$fcc0 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.d binutils-2.37/gas/testsuite/gas/loongarch/fix_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/fix_op.d 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/fix_op.d b/gas/testsuite/gas/loongarch/fix_op.d +new file mode 100644 +index 00000000..7125f2e3 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/fix_op.d @@ -0,0 +1,134 @@ +#as: +#objdump: -dr @@ -7335,7 +9367,7 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.d binutils-2.37/g + +Disassembly of section .text: + -+0000000000000000 <.text>: ++00000000.* <.text>: +[ ]+0:[ ]+000010a4 [ ]+clo.w[ ]+[ ]+\$a0, \$a1 +[ ]+4:[ ]+000014a4 [ ]+clz.w[ ]+[ ]+\$a0, \$a1 +[ ]+8:[ ]+000018a4 [ ]+cto.w[ ]+[ ]+\$a0, \$a1 @@ -7461,9 +9493,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.d binutils-2.37/g +[ ]+1e8:[ ]+00df04a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x1f, 0x1 +[ ]+1ec:[ ]+00e000a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x20, 0x0 +[ ]+1f0:[ ]+00ff00a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x3f, 0x0 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.s binutils-2.37/gas/testsuite/gas/loongarch/fix_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/fix_op.s 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/fix_op.s b/gas/testsuite/gas/loongarch/fix_op.s +new file mode 100644 +index 00000000..d0523f95 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/fix_op.s @@ -0,0 +1,125 @@ +clo.w $r4,$r5 +clz.w $r4,$r5 @@ -7590,9 +9624,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/fix_op.s binutils-2.37/g +bstrpick.d $r4,$r5,31,1 +bstrpick.d $r4,$r5,32,0 +bstrpick.d $r4,$r5,63,0 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/float_op.d binutils-2.37/gas/testsuite/gas/loongarch/float_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/float_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/float_op.d 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/float_op.d b/gas/testsuite/gas/loongarch/float_op.d +new file mode 100644 +index 00000000..cdc41d4d +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/float_op.d @@ -0,0 +1,85 @@ +#as: +#objdump: -dr @@ -7679,9 +9715,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/float_op.d binutils-2.37 +[ ]+124:[ ]+011d2820 [ ]+ffint.d.l[ ]+[ ]+\$fa0, \$fa1 +[ ]+128:[ ]+011e4420 [ ]+frint.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+12c:[ ]+011e4820 [ ]+frint.d[ ]+[ ]+\$fa0, \$fa1 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/float_op.s binutils-2.37/gas/testsuite/gas/loongarch/float_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/float_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/float_op.s 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/float_op.s b/gas/testsuite/gas/loongarch/float_op.s +new file mode 100644 +index 00000000..da1a198e +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/float_op.s @@ -0,0 +1,76 @@ +fadd.s $f0,$f1,$f2 +fadd.d $f0,$f1,$f2 @@ -7759,9 +9797,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/float_op.s binutils-2.37 +ffint.d.l $f0,$f1 +frint.s $f0,$f1 +frint.d $f0,$f1 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.d binutils-2.37/gas/testsuite/gas/loongarch/imm_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/imm_op.d 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/imm_op.d b/gas/testsuite/gas/loongarch/imm_op.d +new file mode 100644 +index 00000000..a017aaf5 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/imm_op.d @@ -0,0 +1,48 @@ +#as: +#objdump: -dr @@ -7771,7 +9811,7 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.d binutils-2.37/g + +Disassembly of section .text: + -+0000000000000000 <.text>: ++00000000.* <.text>: +[ ]+0:[ ]+020000a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 0 +[ ]+4:[ ]+021ffca4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+8:[ ]+022004a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) @@ -7811,9 +9851,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.d binutils-2.37/g +[ ]+90:[ ]+1e000004 [ ]+pcaddu18i[ ]+[ ]+\$a0, 0 +[ ]+94:[ ]+1effffe4 [ ]+pcaddu18i[ ]+[ ]+\$a0, 524287\(0x7ffff\) +[ ]+98:[ ]+1f000024 [ ]+pcaddu18i[ ]+[ ]+\$a0, -524287\(0x80001\) -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.s binutils-2.37/gas/testsuite/gas/loongarch/imm_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/imm_op.s 2022-03-24 16:30:09.301113846 +0800 +diff --git a/gas/testsuite/gas/loongarch/imm_op.s b/gas/testsuite/gas/loongarch/imm_op.s +new file mode 100644 +index 00000000..7e1c5518 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/imm_op.s @@ -0,0 +1,39 @@ +slti $r4,$r5,0 +slti $r4,$r5,0x7ff @@ -7854,108 +9896,76 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/imm_op.s binutils-2.37/g +pcaddu18i $r4,0 +pcaddu18i $r4,0x7ffff +pcaddu18i $r4,-0x7ffff -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/jmp_op.d binutils-2.37/gas/testsuite/gas/loongarch/jmp_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/jmp_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/jmp_op.d 2022-03-24 16:30:09.301113846 +0800 -@@ -0,0 +1,68 @@ +diff --git a/gas/testsuite/gas/loongarch/jmp_op.d b/gas/testsuite/gas/loongarch/jmp_op.d +new file mode 100644 +index 00000000..fa939c78 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/jmp_op.d +@@ -0,0 +1,30 @@ +#as: +#objdump: -dr + -+.*:[ ]+file format .* ++.*:[ ]+file format .* + + +Disassembly of section .text: + -+0000000000000000 <.text>: -+[ ]+0:[ ]+03400000 [ ]+andi[ ]+[ ]+\$zero, \$zero, 0x0 -+[ ]+4:[ ]+60000004 [ ]+bgtz[ ]+[ ]+\$a0, 0[ ]+# 0x4 -+[ ]+[ ]+[ ]+4: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+4: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+8:[ ]+64000080 [ ]+bgez[ ]+[ ]+\$a0, 0[ ]+# 0x8 -+[ ]+[ ]+[ ]+8: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+8: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+c:[ ]+64000004 [ ]+blez[ ]+[ ]+\$a0, 0[ ]+# 0xc -+[ ]+[ ]+[ ]+c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+10:[ ]+40000080 [ ]+beqz[ ]+[ ]+\$a0, 0[ ]+# 0x10 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+14:[ ]+44000080 [ ]+bnez[ ]+[ ]+\$a0, 0[ ]+# 0x14 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+18:[ ]+48000000 [ ]+bceqz[ ]+[ ]+\$fcc0, 0[ ]+# 0x18 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+1c:[ ]+48000100 [ ]+bcnez[ ]+[ ]+\$fcc0, 0[ ]+# 0x1c -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+20:[ ]+4c000080 [ ]+jirl[ ]+[ ]+\$zero, \$a0, 0 -+[ ]+24:[ ]+50000000 [ ]+b[ ]+[ ]+0[ ]+# 0x24 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\* -+[ ]+28:[ ]+54000000 [ ]+bl[ ]+[ ]+0[ ]+# 0x28 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\* -+[ ]+2c:[ ]+58000085 [ ]+beq[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x2c -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+30:[ ]+5c000085 [ ]+bne[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x30 -+[ ]+[ ]+[ ]+30: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+30: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+34:[ ]+60000085 [ ]+blt[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x34 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+38:[ ]+600000a4 [ ]+blt[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x38 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+3c:[ ]+64000085 [ ]+bge[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x3c -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+40:[ ]+640000a4 [ ]+bge[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x40 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+44:[ ]+68000085 [ ]+bltu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x44 -+[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+44: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+48:[ ]+680000a4 [ ]+bltu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x48 -+[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+48: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+4c:[ ]+6c000085 [ ]+bgeu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x4c -+[ ]+[ ]+[ ]+4c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+4c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+50:[ ]+6c0000a4 [ ]+bgeu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x50 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/jmp_op.s binutils-2.37/gas/testsuite/gas/loongarch/jmp_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/jmp_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/jmp_op.s 2022-03-24 16:30:09.301113846 +0800 ++00000000.* <.text>: ++[ ]+0:[ ]+03400000[ ]+[ ]+andi[ ]+\$zero, \$zero, 0x0 ++[ ]+4:[ ]+63fffc04[ ]+[ ]+bgtz[ ]+\$a0, -4\(0x3fffc\)[ ]+# 0x0 ++[ ]+8:[ ]+67fff880[ ]+[ ]+bgez[ ]+\$a0, -8\(0x3fff8\)[ ]+# 0x0 ++[ ]+c:[ ]+67fff404[ ]+[ ]+blez[ ]+\$a0, -12\(0x3fff4\)[ ]+# 0x0 ++[ ]+10:[ ]+43fff09f[ ]+[ ]+beqz[ ]+\$a0, -16\(0x7ffff0\)[ ]+# 0x0 ++[ ]+14:[ ]+47ffec9f[ ]+[ ]+bnez[ ]+\$a0, -20\(0x7fffec\)[ ]+# 0x0 ++[ ]+18:[ ]+4bffe81f[ ]+[ ]+bceqz[ ]+\$fcc0, -24\(0x7fffe8\)[ ]+# 0x0 ++[ ]+1c:[ ]+4bffe51f[ ]+[ ]+bcnez[ ]+\$fcc0, -28\(0x7fffe4\)[ ]+# 0x0 ++[ ]+20:[ ]+4c000080[ ]+[ ]+jirl[ ]+\$zero, \$a0, 0 ++[ ]+24:[ ]+53ffdfff[ ]+[ ]+b[ ]+-36\(0xfffffdc\)[ ]+# 0x0 ++[ ]+28:[ ]+57ffdbff[ ]+[ ]+bl[ ]+-40\(0xfffffd8\)[ ]+# 0x0 ++[ ]+2c:[ ]+5bffd485[ ]+[ ]+beq[ ]+\$a0, \$a1, -44\(0x3ffd4\)[ ]+# 0x0 ++[ ]+30:[ ]+5fffd085[ ]+[ ]+bne[ ]+\$a0, \$a1, -48\(0x3ffd0\)[ ]+# 0x0 ++[ ]+34:[ ]+63ffcc85[ ]+[ ]+blt[ ]+\$a0, \$a1, -52\(0x3ffcc\)[ ]+# 0x0 ++[ ]+38:[ ]+63ffc8a4[ ]+[ ]+blt[ ]+\$a1, \$a0, -56\(0x3ffc8\)[ ]+# 0x0 ++[ ]+3c:[ ]+67ffc485[ ]+[ ]+bge[ ]+\$a0, \$a1, -60\(0x3ffc4\)[ ]+# 0x0 ++[ ]+40:[ ]+67ffc0a4[ ]+[ ]+bge[ ]+\$a1, \$a0, -64\(0x3ffc0\)[ ]+# 0x0 ++[ ]+44:[ ]+6bffbc85[ ]+[ ]+bltu[ ]+\$a0, \$a1, -68\(0x3ffbc\)[ ]+# 0x0 ++[ ]+48:[ ]+6bffb8a4[ ]+[ ]+bltu[ ]+\$a1, \$a0, -72\(0x3ffb8\)[ ]+# 0x0 ++[ ]+4c:[ ]+6fffb485[ ]+[ ]+bgeu[ ]+\$a0, \$a1, -76\(0x3ffb4\)[ ]+# 0x0 ++[ ]+50:[ ]+6fffb0a4[ ]+[ ]+bgeu[ ]+\$a1, \$a0, -80\(0x3ffb0\)[ ]+# 0x0 +diff --git a/gas/testsuite/gas/loongarch/jmp_op.s b/gas/testsuite/gas/loongarch/jmp_op.s +new file mode 100644 +index 00000000..1deb165a +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/jmp_op.s @@ -0,0 +1,22 @@ +.L1: +nop -+bgtz $r4,L1 -+bgez $r4,L1 -+blez $r4,L1 -+beqz $r4,L1 -+bnez $r4,L1 -+bceqz $fcc0,L1 -+bcnez $fcc0,L1 ++bgtz $r4,.L1 ++bgez $r4,.L1 ++blez $r4,.L1 ++beqz $r4,.L1 ++bnez $r4,.L1 ++bceqz $fcc0,.L1 ++bcnez $fcc0,.L1 +jr $r4 -+b L1 -+bl L1 -+beq $r4,$r5,L1 -+bne $r4,$r5,L1 -+blt $r4,$r5,L1 -+bgt $r4,$r5,L1 -+bge $r4,$r5,L1 -+ble $r4,$r5,L1 -+bltu $r4,$r5,L1 -+bgtu $r4,$r5,L1 -+bgeu $r4,$r5,L1 -+bleu $r4,$r5,L1 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.d binutils-2.37/gas/testsuite/gas/loongarch/load_store_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/load_store_op.d 2022-03-24 16:30:09.302113835 +0800 -@@ -0,0 +1,190 @@ ++b .L1 ++bl .L1 ++beq $r4,$r5,.L1 ++bne $r4,$r5,.L1 ++blt $r4,$r5,.L1 ++bgt $r4,$r5,.L1 ++bge $r4,$r5,.L1 ++ble $r4,$r5,.L1 ++bltu $r4,$r5,.L1 ++bgtu $r4,$r5,.L1 ++bgeu $r4,$r5,.L1 ++bleu $r4,$r5,.L1 +diff --git a/gas/testsuite/gas/loongarch/load_store_op.d b/gas/testsuite/gas/loongarch/load_store_op.d +new file mode 100644 +index 00000000..fc15773c +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/load_store_op.d +@@ -0,0 +1,178 @@ +#as: +#objdump: -dr + @@ -7964,7 +9974,7 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.d binutils + +Disassembly of section .text: + -+0000000000000000 <.text>: ++00000000.* <.text>: +[ ]+0:[ ]+200000a4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+4:[ ]+203ffca4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+8:[ ]+210000a4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 0 @@ -8042,10 +10052,10 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.d binutils + 128:[ ]+382818a4 [ ]+ldx.wu[ ]+[ ]+\$a0, \$a1, \$a2 + 12c:[ ]+382c18a0 [ ]+preldx[ ]+[ ]+0x0, \$a1, \$a2 + 130:[ ]+382c18bf [ ]+preldx[ ]+[ ]+0x1f, \$a1, \$a2 -+ 134:[ ]+383018a0 [ ]+fldx.s[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 138:[ ]+383418a0 [ ]+fldx.d[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 13c:[ ]+383818a0 [ ]+fstx.s[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 140:[ ]+383c18a0 [ ]+fstx.d[ ]+[ ]+\$fa0, \$a1, \$a2 ++ 134:[ ]+38720000 [ ]+dbar[ ]+[ ]+0x0 ++ 138:[ ]+38727fff [ ]+dbar[ ]+[ ]+0x7fff ++ 13c:[ ]+38728000 [ ]+ibar[ ]+[ ]+0x0 ++ 140:[ ]+3872ffff [ ]+ibar[ ]+[ ]+0x7fff + 144:[ ]+386014c4 [ ]+amswap.w[ ]+[ ]+\$a0, \$a1, \$a2 + 148:[ ]+386018a4 [ ]+amswap.w[ ]+[ ]+\$a0, \$a2, \$a1 + 14c:[ ]+386094c4 [ ]+amswap.d[ ]+[ ]+\$a0, \$a1, \$a2 @@ -8118,38 +10128,28 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.d binutils + 258:[ ]+387118a4 [ ]+ammin_db.wu [ ]+\$a0, \$a2, \$a1 + 25c:[ ]+387194c4 [ ]+ammin_db.du [ ]+\$a0, \$a1, \$a2 + 260:[ ]+387198a4 [ ]+ammin_db.du [ ]+\$a0, \$a2, \$a1 -+ 264:[ ]+38720000 [ ]+dbar[ ]+[ ]+0x0 -+ 268:[ ]+38727fff [ ]+dbar[ ]+[ ]+0x7fff -+ 26c:[ ]+38728000 [ ]+ibar[ ]+[ ]+0x0 -+ 270:[ ]+3872ffff [ ]+ibar[ ]+[ ]+0x7fff -+ 274:[ ]+387418a0 [ ]+fldgt.s[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 278:[ ]+387498a0 [ ]+fldgt.d[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 27c:[ ]+387518a0 [ ]+fldle.s[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 280:[ ]+387598a0 [ ]+fldle.d[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 284:[ ]+387618a0 [ ]+fstgt.s[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 288:[ ]+387698a0 [ ]+fstgt.d[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 28c:[ ]+387718a0 [ ]+fstle.s[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 290:[ ]+387798a0 [ ]+fstle.d[ ]+[ ]+\$fa0, \$a1, \$a2 -+ 294:[ ]+387818a4 [ ]+ldgt.b[ ]+[ ]+\$a0, \$a1, \$a2 -+ 298:[ ]+387898a4 [ ]+ldgt.h[ ]+[ ]+\$a0, \$a1, \$a2 -+ 29c:[ ]+387918a4 [ ]+ldgt.w[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2a0:[ ]+387998a4 [ ]+ldgt.d[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2a4:[ ]+387a18a4 [ ]+ldle.b[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2a8:[ ]+387a98a4 [ ]+ldle.h[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2ac:[ ]+387b18a4 [ ]+ldle.w[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2b0:[ ]+387b98a4 [ ]+ldle.d[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2b4:[ ]+387c18a4 [ ]+stgt.b[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2b8:[ ]+387c98a4 [ ]+stgt.h[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2bc:[ ]+387d18a4 [ ]+stgt.w[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2c0:[ ]+387d98a4 [ ]+stgt.d[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2c4:[ ]+387e18a4 [ ]+stle.b[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2c8:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2cc:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2 -+ 2d0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.s binutils-2.37/gas/testsuite/gas/loongarch/load_store_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/load_store_op.s 2022-03-24 16:30:09.302113835 +0800 -@@ -0,0 +1,181 @@ ++ 264:[ ]+387818a4 [ ]+ldgt.b[ ]+[ ]+\$a0, \$a1, \$a2 ++ 268:[ ]+387898a4 [ ]+ldgt.h[ ]+[ ]+\$a0, \$a1, \$a2 ++ 26c:[ ]+387918a4 [ ]+ldgt.w[ ]+[ ]+\$a0, \$a1, \$a2 ++ 270:[ ]+387998a4 [ ]+ldgt.d[ ]+[ ]+\$a0, \$a1, \$a2 ++ 274:[ ]+387a18a4 [ ]+ldle.b[ ]+[ ]+\$a0, \$a1, \$a2 ++ 278:[ ]+387a98a4 [ ]+ldle.h[ ]+[ ]+\$a0, \$a1, \$a2 ++ 27c:[ ]+387b18a4 [ ]+ldle.w[ ]+[ ]+\$a0, \$a1, \$a2 ++ 280:[ ]+387b98a4 [ ]+ldle.d[ ]+[ ]+\$a0, \$a1, \$a2 ++ 284:[ ]+387c18a4 [ ]+stgt.b[ ]+[ ]+\$a0, \$a1, \$a2 ++ 288:[ ]+387c98a4 [ ]+stgt.h[ ]+[ ]+\$a0, \$a1, \$a2 ++ 28c:[ ]+387d18a4 [ ]+stgt.w[ ]+[ ]+\$a0, \$a1, \$a2 ++ 290:[ ]+387d98a4 [ ]+stgt.d[ ]+[ ]+\$a0, \$a1, \$a2 ++ 294:[ ]+387e18a4 [ ]+stle.b[ ]+[ ]+\$a0, \$a1, \$a2 ++ 298:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2 ++ 29c:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2 ++ 2a0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2 +diff --git a/gas/testsuite/gas/loongarch/load_store_op.s b/gas/testsuite/gas/loongarch/load_store_op.s +new file mode 100644 +index 00000000..efbd124a +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/load_store_op.s +@@ -0,0 +1,169 @@ +ll.w $r4,$r5,0 +ll.w $r4,$r5,0x3ffc +sc.w $r4,$r5,0 @@ -8227,10 +10227,10 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.s binutils +ldx.wu $r4,$r5,$r6 +preldx 0,$r5,$r6 +preldx 31,$r5,$r6 -+fldx.s $f0,$r5,$r6 -+fldx.d $f0,$r5,$r6 -+fstx.s $f0,$r5,$r6 -+fstx.d $f0,$r5,$r6 ++dbar 0 ++dbar 0x7fff ++ibar 0 ++ibar 0x7fff +amswap.w $r4,$r5,$r6,0 +amswap.w $r4,$r6,$r5 +amswap.d $r4,$r5,$r6,0 @@ -8303,18 +10303,6 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.s binutils +ammin_db.wu $r4,$r6,$r5 +ammin_db.du $r4,$r5,$r6,0 +ammin_db.du $r4,$r6,$r5 -+dbar 0 -+dbar 0x7fff -+ibar 0 -+ibar 0x7fff -+fldgt.s $f0,$r5,$r6 -+fldgt.d $f0,$r5,$r6 -+fldle.s $f0,$r5,$r6 -+fldle.d $f0,$r5,$r6 -+fstgt.s $f0,$r5,$r6 -+fstgt.d $f0,$r5,$r6 -+fstle.s $f0,$r5,$r6 -+fstle.d $f0,$r5,$r6 +ldgt.b $r4,$r5,$r6 +ldgt.h $r4,$r5,$r6 +ldgt.w $r4,$r5,$r6 @@ -8331,12 +10319,14 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/load_store_op.s binutils +stle.h $r4,$r5,$r6 +stle.w $r4,$r5,$r6 +stle.d $r4,$r5,$r6 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/loongarch.exp binutils-2.37/gas/testsuite/gas/loongarch/loongarch.exp ---- binutils-2.37.org/gas/testsuite/gas/loongarch/loongarch.exp 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/loongarch.exp 2022-03-24 16:30:09.302113835 +0800 +diff --git a/gas/testsuite/gas/loongarch/loongarch.exp b/gas/testsuite/gas/loongarch/loongarch.exp +new file mode 100644 +index 00000000..34a2f78c +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/loongarch.exp @@ -0,0 +1,23 @@ +# Expect script for LoongArch assembler tests. -+# Copyright (C) 2021 Free Software Foundation, Inc. ++# Copyright (C) 2021-2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# @@ -8358,778 +10348,376 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/loongarch.exp binutils-2 +if [istarget loongarch*-*-*] { + run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]] +} -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/macro_op.d binutils-2.37/gas/testsuite/gas/loongarch/macro_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/macro_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/macro_op.d 2022-03-24 16:30:09.302113835 +0800 -@@ -0,0 +1,732 @@ +diff --git a/gas/testsuite/gas/loongarch/macro_op.d b/gas/testsuite/gas/loongarch/macro_op.d +new file mode 100644 +index 00000000..d264c4f2 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op.d +@@ -0,0 +1,59 @@ +#as: +#objdump: -dr ++#skip: loongarch32-*-* + -+.*:[ ]+file format .* ++.*:[ ]+file format .* ++ ++ ++Disassembly of section .text: ++ ++00000000.* <.text>: ++[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 ++[ ]+14:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 ++[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 ++[ ]+1c:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 ++[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 ++[ ]+24:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* ++[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.L1 ++[ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.L1 ++[ ]+30:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+30:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 ++[ ]+34:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+34:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 ++[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+38:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 ++[ ]+3c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+40:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+40:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 ++[ ]+44:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+44:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 ++[ ]+48:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+48:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 ++[ ]+4c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+4c:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 ++[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+54:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+54:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+5c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+60:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+60:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+64:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+64:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +diff --git a/gas/testsuite/gas/loongarch/macro_op.s b/gas/testsuite/gas/loongarch/macro_op.s +new file mode 100644 +index 00000000..0c333141 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op.s +@@ -0,0 +1,15 @@ ++li.w $r4, 0 ++li.w $r4, 0xffffffff ++li.d $r4, 0 ++li.d $r4, 0xffffffffffffffff ++la $r4, .L1 ++la.global $r4, .L1 ++la.local $r4, .L1 ++la.abs $r4, .L1 ++la.pcrel $r4, .L1 ++la.got $r4, .L1 ++ ++la.tls.le $r4, TLS1 ++la.tls.ie $r4, TLS1 ++la.tls.ld $r4, TLS1 ++la.tls.gd $r4, TLS1 +diff --git a/gas/testsuite/gas/loongarch/macro_op_32.d b/gas/testsuite/gas/loongarch/macro_op_32.d +new file mode 100644 +index 00000000..145d852b +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op_32.d +@@ -0,0 +1,55 @@ ++#as: ++#objdump: -dr ++#skip: loongarch64-*-* ++ ++.*:[ ]+file format .* ++ ++ ++Disassembly of section .text: ++ ++00000000.* <.text>: ++[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+14:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+1c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+24:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* ++[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.text ++[ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.text ++[ ]+30:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+34:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+3c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+40:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+40:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 ++[ ]+44:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+44:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 ++[ ]+48:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+48:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+4c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+4c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+54:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+5c:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +diff --git a/gas/testsuite/gas/loongarch/macro_op_32.s b/gas/testsuite/gas/loongarch/macro_op_32.s +new file mode 100644 +index 00000000..7f19565e +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op_32.s +@@ -0,0 +1,16 @@ ++.L1: ++ li.w $r4, 0 ++ li.w $r4, 0xffffffff ++ li.w $r4, 0 ++ li.w $r4, 0xffffffff ++ la $r4, .L1 ++ la.global $r4, .L1 ++ la.local $r4, .L1 ++ la.abs $r4, .L1 ++ la.pcrel $r4, .L1 ++ la.got $r4, .L1 ++ ++ la.tls.le $r4, TLS1 ++ la.tls.ie $r4, TLS1 ++ la.tls.ld $r4, TLS1 ++ la.tls.gd $r4, TLS1 +diff --git a/gas/testsuite/gas/loongarch/macro_op_large_abs.d b/gas/testsuite/gas/loongarch/macro_op_large_abs.d +new file mode 100644 +index 00000000..c3214a85 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op_large_abs.d +@@ -0,0 +1,77 @@ ++#as: ++#objdump: -dr ++#skip: loongarch32-*-* ++ ++.*:[ ]+file format .* ++ ++ ++Disassembly of section .text: ++ ++00000000.* <.text>: ++[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+10:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+14:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+18:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+18:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+1c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+20:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+20:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+24:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+28:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+2c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+2c:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+30:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+30:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+34:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+34:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+38:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+50:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 ++[ ]+54:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+54:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 ++[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 ++[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+64:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 ++[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+6c:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+70:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+70:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+74:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+74:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 ++[ ]+78:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+78:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 ++[ ]+7c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+80:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+80:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+84:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+84:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+88:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+88:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 ++[ ]+8c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+8c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 ++[ ]+90:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +diff --git a/gas/testsuite/gas/loongarch/macro_op_large_abs.s b/gas/testsuite/gas/loongarch/macro_op_large_abs.s +new file mode 100644 +index 00000000..fd76391d +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op_large_abs.s +@@ -0,0 +1,9 @@ ++.L1: ++la.local $r4, $r5, .L1 ++la.global $r4, $r5, .L1 ++la.pcrel $r4, $r5, .L1 ++la.got $r4, $r5, .L1 ++la.tls.le $r4, TLS1 ++la.tls.ie $r4, $r5, TLS1 ++la.tls.ld $r4, $r5, TLS1 ++la.tls.gd $r4, $r5, TLS1 +diff --git a/gas/testsuite/gas/loongarch/macro_op_large_pc.d b/gas/testsuite/gas/loongarch/macro_op_large_pc.d +new file mode 100644 +index 00000000..c3214a85 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op_large_pc.d +@@ -0,0 +1,77 @@ ++#as: ++#objdump: -dr ++#skip: loongarch32-*-* ++ ++.*:[ ]+file format .* + + +Disassembly of section .text: + -+0000000000000000 <.text>: -+[ ]+0:[ ]+00150004 [ ]+move[ ]+[ ]+\$a0, \$zero -+[ ]+4:[ ]+02bffc04 [ ]+addi.w[ ]+[ ]+\$a0, \$zero, -1\(0xfff\) -+[ ]+8:[ ]+00150004 [ ]+move[ ]+[ ]+\$a0, \$zero -+[ ]+c:[ ]+02bffc04 [ ]+addi.w[ ]+[ ]+\$a0, \$zero, -1\(0xfff\) -+[ ]+10:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+14:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+18:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+1c:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+20:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+24:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+28:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+2c:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+30:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+34:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+38:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+3c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+40:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 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]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+58:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+58: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+5c:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+5c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+5c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+5c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+5c: 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-+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+100:[ ]+03000084 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1 -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+104:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+108:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+10c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+110:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+110: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+114:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+118:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_PCREL[ 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R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+130:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+134:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+138:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+13c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+140:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+144:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+148:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+14c:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+150:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+154:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/macro_op.s binutils-2.37/gas/testsuite/gas/loongarch/macro_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/macro_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/macro_op.s 2022-03-24 16:30:09.302113835 +0800 -@@ -0,0 +1,29 @@ ++00000000.* <.text>: ++[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+10:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+14:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+18:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+18:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+1c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+20:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+20:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+24:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+28:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+2c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+2c:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+30:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+30:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+34:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+34:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+38:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+50:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 ++[ ]+54:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+54:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 ++[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 ++[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+64:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 ++[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+6c:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+70:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+70:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+74:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+74:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 ++[ ]+78:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+78:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 ++[ ]+7c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+80:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+80:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+84:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+84:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+88:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+88:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 ++[ ]+8c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+8c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 ++[ ]+90:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +diff --git a/gas/testsuite/gas/loongarch/macro_op_large_pc.s b/gas/testsuite/gas/loongarch/macro_op_large_pc.s +new file mode 100644 +index 00000000..fd76391d +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/macro_op_large_pc.s +@@ -0,0 +1,9 @@ +.L1: -+li.w $r4,0 -+li.w $r4,0xffffffff -+li.d $r4,0 -+li.d $r4,0xffffffffffffffff -+la $r4,L1 -+la.global $r4,L1 -+la.global $r4,$r5,L1 -+la.global $r4,L1 -+la.global $r4,$r5,L1 -+la.global $r4,L1 -+la.global $r4,$r5,L1 -+la.local $r4,L1 -+la.local $r4,$r5,L1 -+la.local $r4,L1 -+la.local $r4,$r5,L1 -+la.abs $r4,L1 -+la.pcrel $r4,L1 -+la.pcrel $r4,L1 -+la.pcrel $r4,$r5,L1 -+la.got $r4,L1 -+la.got $r4,$r5,L1 -+la.tls.le $r4,L1 -+la.tls.ie $r4,L1 -+la.tls.ie $r4,$r5,L1 -+la.tls.ld $r4,L1 -+la.tls.ld $r4,$r5,L1 -+la.tls.gd $r4,L1 -+la.tls.gd $r4,$r5,L1 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/nop.d binutils-2.37/gas/testsuite/gas/loongarch/nop.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/nop.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/nop.d 2022-03-24 16:30:09.303113824 +0800 ++la.local $r4, $r5, .L1 ++la.global $r4, $r5, .L1 ++la.pcrel $r4, $r5, .L1 ++la.got $r4, $r5, .L1 ++la.tls.le $r4, TLS1 ++la.tls.ie $r4, $r5, TLS1 ++la.tls.ld $r4, $r5, TLS1 ++la.tls.gd $r4, $r5, TLS1 +diff --git a/gas/testsuite/gas/loongarch/nop.d b/gas/testsuite/gas/loongarch/nop.d +new file mode 100644 +index 00000000..4cdcc5ce +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/nop.d @@ -0,0 +1,10 @@ +#as: +#objdump: -dr @@ -9141,15 +10729,19 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/nop.d binutils-2.37/gas/ + +0+000 : +[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero, \$zero, 0x0 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/nop.s binutils-2.37/gas/testsuite/gas/loongarch/nop.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/nop.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/nop.s 2022-03-24 16:30:09.303113824 +0800 +diff --git a/gas/testsuite/gas/loongarch/nop.s b/gas/testsuite/gas/loongarch/nop.s +new file mode 100644 +index 00000000..99456883 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/nop.s @@ -0,0 +1,2 @@ +target: + nop -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.d binutils-2.37/gas/testsuite/gas/loongarch/privilege_op.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/privilege_op.d 2022-03-24 16:30:09.303113824 +0800 +diff --git a/gas/testsuite/gas/loongarch/privilege_op.d b/gas/testsuite/gas/loongarch/privilege_op.d +new file mode 100644 +index 00000000..12d4790a +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/privilege_op.d @@ -0,0 +1,44 @@ +#as: +#objdump: -dr @@ -9159,7 +10751,7 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.d binutils- + +Disassembly of section .text: + -+0000000000000000 <.text>: ++00000000.* <.text>: +[ ]+0:[ ]+04000004 [ ]+csrrd[ ]+[ ]+\$a0, 0x0 +[ ]+4:[ ]+04fffc04 [ ]+csrrd[ ]+[ ]+\$a0, 0x3fff +[ ]+8:[ ]+04000024 [ ]+csrwr[ ]+[ ]+\$a0, 0x0 @@ -9195,9 +10787,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.d binutils- +[ ]+80:[ ]+0648ffff [ ]+idle[ ]+[ ]+0x7fff +[ ]+84:[ ]+064998a0 [ ]+invtlb[ ]+[ ]+0x0, \$a1, \$a2 +[ ]+88:[ ]+064998bf [ ]+invtlb[ ]+[ ]+0x1f, \$a1, \$a2 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.s binutils-2.37/gas/testsuite/gas/loongarch/privilege_op.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/privilege_op.s 2022-03-24 16:30:09.303113824 +0800 +diff --git a/gas/testsuite/gas/loongarch/privilege_op.s b/gas/testsuite/gas/loongarch/privilege_op.s +new file mode 100644 +index 00000000..cdc35732 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/privilege_op.s @@ -0,0 +1,35 @@ +csrrd $r4,0 +csrrd $r4,0x3fff @@ -9234,9 +10828,334 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/privilege_op.s binutils- +idle 0x7fff +invtlb 0,$r5,$r6 +invtlb 0x1f,$r5,$r6 -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/syscall.d binutils-2.37/gas/testsuite/gas/loongarch/syscall.d ---- binutils-2.37.org/gas/testsuite/gas/loongarch/syscall.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/syscall.d 2022-03-24 16:30:09.303113824 +0800 +diff --git a/gas/testsuite/gas/loongarch/reloc.d b/gas/testsuite/gas/loongarch/reloc.d +new file mode 100644 +index 00000000..6f5f110b +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/reloc.d +@@ -0,0 +1,167 @@ ++#as: ++#objdump: -dr ++#skip: loongarch32-*-* ++ ++.*:[ ]+file format .* ++ ++ ++Disassembly of section .text: ++ ++00000000.* <.text>: ++[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero,[ ]+\$zero,[ ]+0x0 ++[ ]+4:[ ]+58000085[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x4 ++[ ]+4:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+8:[ ]+5c000085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x8 ++[ ]+8:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+c:[ ]+60000085[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xc ++[ ]+c:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+10:[ ]+64000085[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x10 ++[ ]+10:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+14:[ ]+68000085[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x14 ++[ ]+14:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+18:[ ]+6c000085[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x18 ++[ ]+18:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+1c:[ ]+4c0000a4[ ]+jirl[ ]+\$a0,[ ]+\$a1,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_B16[ ]+.L1 ++[ ]+20:[ ]+40000080[ ]+beqz[ ]+\$a0,[ ]+0[ ]+#[ ]+0x20 ++[ ]+20:[ ]+R_LARCH_B21[ ]+.L1 ++[ ]+24:[ ]+44000080[ ]+bnez[ ]+\$a0,[ ]+0[ ]+#[ ]+0x24 ++[ ]+24:[ ]+R_LARCH_B21[ ]+.L1 ++[ ]+28:[ ]+50000000[ ]+b[ ]+0[ ]+#[ ]+0x28 ++[ ]+28:[ ]+R_LARCH_B26[ ]+.L1 ++[ ]+2c:[ ]+54000000[ ]+bl[ ]+0[ ]+#[ ]+0x2c ++[ ]+2c:[ ]+R_LARCH_B26[ ]+.L1 ++[ ]+30:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+30:[ ]+R_LARCH_ABS_HI20[ ]+.L1 ++[ ]+34:[ ]+038000a4[ ]+ori[ ]+\$a0,[ ]+\$a1,[ ]+0x0 ++[ ]+34:[ ]+R_LARCH_ABS_LO12[ ]+.L1 ++[ ]+38:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+38:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 ++[ ]+3c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 ++[ ]+40:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+40:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 ++[ ]+44:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+44:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 ++[ ]+48:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+48:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 ++[ ]+4c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+4c:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLSL1 ++[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLSL1 ++[ ]+54:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+54:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLSL1 ++[ ]+58:[ ]+02800085[ ]+addi.w[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+5c:[ ]+02c00085[ ]+addi.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+60:[ ]+28000085[ ]+ld.b[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+60:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+64:[ ]+28400085[ ]+ld.h[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+64:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+68:[ ]+28800085[ ]+ld.w[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+68:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+6c:[ ]+28c00085[ ]+ld.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+6c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 ++[ ]+70:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+70:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 ++[ ]+74:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+74:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 ++[ ]+78:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+78:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 ++[ ]+7c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+7c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 ++[ ]+80:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+80:[ ]+R_LARCH_GOT_HI20[ ]+.L1 ++[ ]+84:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+84:[ ]+R_LARCH_GOT_LO12[ ]+.L1 ++[ ]+88:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+88:[ ]+R_LARCH_GOT64_LO20[ ]+.L1 ++[ ]+8c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+8c:[ ]+R_LARCH_GOT64_HI12[ ]+.L1 ++[ ]+90:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+90:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLSL1 ++[ ]+94:[ ]+03800085[ ]+ori[ ]+\$a1,[ ]+\$a0,[ ]+0x0 ++[ ]+94:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLSL1 ++[ ]+98:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+98:[ ]+R_LARCH_TLS_LE64_LO20[ ]+TLSL1 ++[ ]+9c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+9c:[ ]+R_LARCH_TLS_LE64_HI12[ ]+TLSL1 ++[ ]+a0:[ ]+58000085[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xa0 ++[ ]+a0:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+a4:[ ]+5c000085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xa4 ++[ ]+a4:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+a8:[ ]+60000085[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xa8 ++[ ]+a8:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+ac:[ ]+64000085[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xac ++[ ]+ac:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+b0:[ ]+68000085[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xb0 ++[ ]+b0:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+b4:[ ]+6c000085[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xb4 ++[ ]+b4:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+b8:[ ]+4c0000a4[ ]+jirl[ ]+\$a0,[ ]+\$a1,[ ]+0 ++[ ]+b8:[ ]+R_LARCH_B16[ ]+.L1\+0x8 ++[ ]+bc:[ ]+40000080[ ]+beqz[ ]+\$a0,[ ]+0[ ]+#[ ]+0xbc ++[ ]+bc:[ ]+R_LARCH_B21[ ]+.L1\+0x8 ++[ ]+c0:[ ]+44000080[ ]+bnez[ ]+\$a0,[ ]+0[ ]+#[ ]+0xc0 ++[ ]+c0:[ ]+R_LARCH_B21[ ]+.L1\+0x8 ++[ ]+c4:[ ]+50000000[ ]+b[ ]+0[ ]+#[ ]+0xc4 ++[ ]+c4:[ ]+R_LARCH_B26[ ]+.L1\+0x8 ++[ ]+c8:[ ]+54000000[ ]+bl[ ]+0[ ]+#[ ]+0xc8 ++[ ]+c8:[ ]+R_LARCH_B26[ ]+.L1\+0x8 ++[ ]+cc:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+cc:[ ]+R_LARCH_ABS_HI20[ ]+.L1\+0x8 ++[ ]+d0:[ ]+038000a4[ ]+ori[ ]+\$a0,[ ]+\$a1,[ ]+0x0 ++[ ]+d0:[ ]+R_LARCH_ABS_LO12[ ]+.L1\+0x8 ++[ ]+d4:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+d4:[ ]+R_LARCH_ABS64_LO20[ ]+.L1\+0x8 ++[ ]+d8:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+d8:[ ]+R_LARCH_ABS64_HI12[ ]+.L1\+0x8 ++[ ]+dc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+dc:[ ]+R_LARCH_PCALA_HI20[ ]+.L1\+0x8 ++[ ]+e0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+e0:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1\+0x8 ++[ ]+e4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+e4:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1\+0x8 ++[ ]+e8:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+e8:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLSL1\+0x8 ++[ ]+ec:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+ec:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLSL1\+0x8 ++[ ]+f0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+f0:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLSL1\+0x8 ++[ ]+f4:[ ]+02800085[ ]+addi.w[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+f4:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 ++[ ]+f8:[ ]+02c00085[ ]+addi.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+f8:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 ++[ ]+fc:[ ]+28000085[ ]+ld.b[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+fc:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 ++[ ]+100:[ ]+28400085[ ]+ld.h[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+100:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 ++[ ]+104:[ ]+28800085[ ]+ld.w[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+104:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 ++[ ]+108:[ ]+28c00085[ ]+ld.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+108:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 ++[ ]+10c:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+10c:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1\+0x8 ++[ ]+110:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+110:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1\+0x8 ++[ ]+114:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+114:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1\+0x8 ++[ ]+118:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+118:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1\+0x8 ++[ ]+11c:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+11c:[ ]+R_LARCH_GOT_HI20[ ]+.L1\+0x8 ++[ ]+120:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+120:[ ]+R_LARCH_GOT_LO12[ ]+.L1\+0x8 ++[ ]+124:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+124:[ ]+R_LARCH_GOT64_LO20[ ]+.L1\+0x8 ++[ ]+128:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+128:[ ]+R_LARCH_GOT64_HI12[ ]+.L1\+0x8 ++[ ]+12c:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+12c:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLSL1\+0x8 ++[ ]+130:[ ]+03800085[ ]+ori[ ]+\$a1,[ ]+\$a0,[ ]+0x0 ++[ ]+130:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLSL1\+0x8 ++[ ]+134:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+134:[ ]+R_LARCH_TLS_LE64_LO20[ ]+TLSL1\+0x8 ++[ ]+138:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 ++[ ]+138:[ ]+R_LARCH_TLS_LE64_HI12[ ]+TLSL1\+0x8 +diff --git a/gas/testsuite/gas/loongarch/reloc.s b/gas/testsuite/gas/loongarch/reloc.s +new file mode 100644 +index 00000000..a67fecd9 +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/reloc.s +@@ -0,0 +1,144 @@ ++/* Test insn relocs. */ ++.text ++nop ++ ++/* Jump Insns. */ ++/* b16. */ ++beq $r4,$r5,%b16(.L1) ++bne $r4,$r5,%b16(.L1) ++blt $r4,$r5,%b16(.L1) ++bge $r4,$r5,%b16(.L1) ++bltu $r4,$r5,%b16(.L1) ++bgeu $r4,$r5,%b16(.L1) ++jirl $r4,$r5,%b16(.L1) ++ ++/* b21. */ ++beqz $r4,%b21(.L1) ++bnez $r4,%b21(.L1) ++ ++/* b26. */ ++b %b26(.L1) ++bl %b26(.L1) ++ ++ ++/* ABS Insns. */ ++/* lu12i.w. */ ++lu12i.w $r4,%abs_hi20(.L1) ++ ++/* ori */ ++ori $r4,$r5,%abs_lo12(.L1) ++ ++/* lu32i.d. */ ++lu32i.d $r4,%abs64_lo20(.L1) ++ ++/* lu52i.d. */ ++lu52i.d $r5,$r4,%abs64_hi12(.L1) ++ ++ ++/* Pcala Insns. */ ++/* pcalau12i. */ ++pcalau12i $r4,%pc_hi20(.L1) ++pcalau12i $r4,%got_pc_hi20(.L1) ++pcalau12i $r4,%got_pc_lo12(.L1) ++pcalau12i $r4,%ie_pc_hi20(TLSL1) ++pcalau12i $r4,%ld_pc_hi20(TLSL1) ++pcalau12i $r4,%gd_pc_hi20(TLSL1) ++ ++/* addi.w/d ld.b/h/w/d. */ ++addi.w $r5,$r4,%pc_lo12(.L1) ++addi.d $r5,$r4,%pc_lo12(.L1) ++ld.b $r5,$r4,%pc_lo12(.L1) ++ld.h $r5,$r4,%pc_lo12(.L1) ++ld.w $r5,$r4,%pc_lo12(.L1) ++ld.d $r5,$r4,%pc_lo12(.L1) ++lu32i.d $r4,%pc64_lo20(.L1) ++lu52i.d $r5,$r4,%pc64_lo20(.L1) ++lu32i.d $r4,%got64_pc_lo20(.L1) ++lu52i.d $r5,$r4,%got64_pc_hi12(.L1) ++ ++ ++/* GOT64 Insns. */ ++/* lu12i.w. */ ++lu12i.w $r4,%got_hi20(.L1) ++ori $r4,$r4,%got_lo12(.L1) ++lu32i.d $r4,%got64_lo20(.L1) ++lu52i.d $r5,$r4,%got64_hi12(.L1) ++ ++ ++/* TLS Insns. */ ++lu12i.w $r4,%le_hi20(TLSL1) ++ori $r5,$r4,%le_lo12(TLSL1) ++lu32i.d $r4,%le64_lo20(TLSL1) ++lu52i.d $r5,$r4,%le64_hi12(TLSL1) ++ ++ ++ ++/* Insns with addend. */ ++/* Jump Insns. */ ++/* b16. */ ++beq $r4,$r5,%b16(.L1 + 0x8) ++bne $r4,$r5,%b16(.L1 + 0x8) ++blt $r4,$r5,%b16(.L1 + 0x8) ++bge $r4,$r5,%b16(.L1 + 0x8) ++bltu $r4,$r5,%b16(.L1 + 0x8) ++bgeu $r4,$r5,%b16(.L1 + 0x8) ++jirl $r4,$r5,%b16(.L1 + 0x8) ++ ++/* b21. */ ++beqz $r4,%b21(.L1 + 0x8) ++bnez $r4,%b21(.L1 + 0x8) ++ ++/* b26. */ ++b %b26(.L1 + 0x8) ++bl %b26(.L1 + 0x8) ++ ++ ++/* ABS Insns. */ ++/* lu12i.w. */ ++lu12i.w $r4,%abs_hi20(.L1 + 0x8) ++ ++/* ori */ ++ori $r4,$r5,%abs_lo12(.L1 + 0x8) ++ ++/* lu32i.d. */ ++lu32i.d $r4,%abs64_lo20(.L1 + 0x8) ++ ++/* lu52i.d. */ ++lu52i.d $r5,$r4,%abs64_hi12(.L1 + 0x8) ++ ++ ++/* Pcala Insns. */ ++/* pcalau12i. */ ++pcalau12i $r4,%pc_hi20(.L1 + 0x8) ++pcalau12i $r4,%got_pc_hi20(.L1 + 0x8) ++pcalau12i $r4,%got_pc_lo12(.L1 + 0x8) ++pcalau12i $r4,%ie_pc_hi20(TLSL1 + 0x8) ++pcalau12i $r4,%ld_pc_hi20(TLSL1 + 0x8) ++pcalau12i $r4,%gd_pc_hi20(TLSL1 + 0x8) ++ ++/* addi.w/d ld.b/h/w/d. */ ++addi.w $r5,$r4,%pc_lo12(.L1 + 0x8) ++addi.d $r5,$r4,%pc_lo12(.L1 + 0x8) ++ld.b $r5,$r4,%pc_lo12(.L1 + 0x8) ++ld.h $r5,$r4,%pc_lo12(.L1 + 0x8) ++ld.w $r5,$r4,%pc_lo12(.L1 + 0x8) ++ld.d $r5,$r4,%pc_lo12(.L1 + 0x8) ++lu32i.d $r4,%pc64_lo20(.L1 + 0x8) ++lu52i.d $r5,$r4,%pc64_lo20(.L1 + 0x8) ++lu32i.d $r4,%got64_pc_lo20(.L1 + 0x8) ++lu52i.d $r5,$r4,%got64_pc_hi12(.L1 + 0x8) ++ ++ ++/* GOT64 Insns. */ ++/* lu12i.w. */ ++lu12i.w $r4,%got_hi20(.L1 + 0x8) ++ori $r4,$r4,%got_lo12(.L1 + 0x8) ++lu32i.d $r4,%got64_lo20(.L1 + 0x8) ++lu52i.d $r5,$r4,%got64_hi12(.L1 + 0x8) ++ ++ ++/* TLS Insns. */ ++lu12i.w $r4,%le_hi20(TLSL1 + 0x8) ++ori $r5,$r4,%le_lo12(TLSL1 + 0x8) ++lu32i.d $r4,%le64_lo20(TLSL1 + 0x8) ++lu52i.d $r5,$r4,%le64_hi12(TLSL1 + 0x8) +diff --git a/gas/testsuite/gas/loongarch/syscall.d b/gas/testsuite/gas/loongarch/syscall.d +new file mode 100644 +index 00000000..1625664f +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/syscall.d @@ -0,0 +1,11 @@ +#as: +#objdump: -dr @@ -9246,19 +11165,22 @@ diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/syscall.d binutils-2.37/ + +Disassembly of section .text: + -+0000000000000000 <.text>: ++00000000.* <.text>: +[ ]+0:[ ]+002b0000 [ ]+syscall[ ]+[ ]+0x0 +[ ]+4:[ ]+002b7fff [ ]+syscall[ ]+[ ]+0x7fff -diff -uNr binutils-2.37.org/gas/testsuite/gas/loongarch/syscall.s binutils-2.37/gas/testsuite/gas/loongarch/syscall.s ---- binutils-2.37.org/gas/testsuite/gas/loongarch/syscall.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/gas/testsuite/gas/loongarch/syscall.s 2022-03-24 16:30:09.303113824 +0800 +diff --git a/gas/testsuite/gas/loongarch/syscall.s b/gas/testsuite/gas/loongarch/syscall.s +new file mode 100644 +index 00000000..168b713f +--- /dev/null ++++ b/gas/testsuite/gas/loongarch/syscall.s @@ -0,0 +1,2 @@ +syscall 0 +syscall 0x7fff -diff -uNr binutils-2.37.org/gas/testsuite/lib/gas-defs.exp binutils-2.37/gas/testsuite/lib/gas-defs.exp ---- binutils-2.37.org/gas/testsuite/lib/gas-defs.exp 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/gas/testsuite/lib/gas-defs.exp 2022-03-24 16:30:09.303113824 +0800 -@@ -360,6 +360,10 @@ +diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp +index f9ee6f4a..6074c2ee 100644 +--- a/gas/testsuite/lib/gas-defs.exp ++++ b/gas/testsuite/lib/gas-defs.exp +@@ -360,6 +360,10 @@ proc verbose_eval { expr { level 1 } } { # This definition is taken from an unreleased version of DejaGnu. Once # that version gets released, and has been out in the world for a few # months at least, it may be safe to delete this copy. @@ -9269,10 +11191,11 @@ diff -uNr binutils-2.37.org/gas/testsuite/lib/gas-defs.exp binutils-2.37/gas/tes if ![string length [info proc prune_warnings]] { # # prune_warnings -- delete various system verbosities from TEXT. -diff -uNr binutils-2.37.org/include/dis-asm.h binutils-2.37/include/dis-asm.h ---- binutils-2.37.org/include/dis-asm.h 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/include/dis-asm.h 2022-03-24 16:30:09.303113824 +0800 -@@ -307,6 +307,7 @@ +diff --git a/include/dis-asm.h b/include/dis-asm.h +index 0b91ab47..c0bc1d54 100644 +--- a/include/dis-asm.h ++++ b/include/dis-asm.h +@@ -307,6 +307,7 @@ extern void print_arm_disassembler_options (FILE *); extern void print_arc_disassembler_options (FILE *); extern void print_s390_disassembler_options (FILE *); extern void print_wasm32_disassembler_options (FILE *); @@ -9280,9 +11203,10 @@ diff -uNr binutils-2.37.org/include/dis-asm.h binutils-2.37/include/dis-asm.h extern bool aarch64_symbol_is_valid (asymbol *, struct disassemble_info *); extern bool arm_symbol_is_valid (asymbol *, struct disassemble_info *); extern bool csky_symbol_is_valid (asymbol *, struct disassemble_info *); -diff -uNr binutils-2.37.org/include/elf/common.h binutils-2.37/include/elf/common.h ---- binutils-2.37.org/include/elf/common.h 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/include/elf/common.h 2022-03-24 16:30:09.304113812 +0800 +diff --git a/include/elf/common.h b/include/elf/common.h +index 0cca2867..0fbcd49f 100644 +--- a/include/elf/common.h ++++ b/include/elf/common.h @@ -677,8 +677,18 @@ /* note name must be "LINUX". */ #define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */ @@ -9303,11 +11227,13 @@ diff -uNr binutils-2.37.org/include/elf/common.h binutils-2.37/include/elf/commo #define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */ #define NT_FILE 0x46494c45 /* Description of mapped files. */ -diff -uNr binutils-2.37.org/include/elf/loongarch.h binutils-2.37/include/elf/loongarch.h ---- binutils-2.37.org/include/elf/loongarch.h 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/include/elf/loongarch.h 2022-03-24 16:30:09.304113812 +0800 -@@ -0,0 +1,110 @@ -+/* Copyright (C) 2021 Free Software Foundation, Inc. +diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h +new file mode 100644 +index 00000000..74757b82 +--- /dev/null ++++ b/include/elf/loongarch.h +@@ -0,0 +1,267 @@ ++/* Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GNU Binutils. @@ -9399,31 +11325,190 @@ diff -uNr binutils-2.37.org/include/elf/loongarch.h binutils-2.37/include/elf/lo +RELOC_NUMBER (R_LARCH_GNU_VTINHERIT, 57) +RELOC_NUMBER (R_LARCH_GNU_VTENTRY, 58) + ++ ++/* B16: ++ beq/bne/blt/bge/bltu/bgeu/jirl ++ %b16 (sym). */ ++RELOC_NUMBER (R_LARCH_B16, 64) ++/* B21: ++ beqz/bnez ++ %b16 (sym). */ ++RELOC_NUMBER (R_LARCH_B21, 65) ++/* B26: ++ b/bl ++ %b26 (sym) or %plt (sym). */ ++RELOC_NUMBER (R_LARCH_B26, 66) ++ ++/* ABS: 32/64 ++ lu12i.w ++ %abs_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_ABS_HI20, 67) ++/* ABS: 32/64 ++ ori ++ %abs_lo12 (sym). */ ++RELOC_NUMBER (R_LARCH_ABS_LO12, 68) ++ ++/* ABS: 64 ++ lu32i.d ++ %abs64_lo20 (sym). */ ++RELOC_NUMBER (R_LARCH_ABS64_LO20, 69) ++/* ABS: 64 ++ lu52i.d ++ %abs64_hi12 (sym). */ ++RELOC_NUMBER (R_LARCH_ABS64_HI12, 70) ++ ++/* PCREL: 32/64 ++ pcalau12i ++ %pc_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_PCALA_HI20, 71) ++/* PCREL: 32/64 ++ addi.w/addi.d ++ %pc_lo12 (sym). */ ++RELOC_NUMBER (R_LARCH_PCALA_LO12, 72) ++/* PCREL: 64 ++ lu32i.d ++ %pc64_lo20 (sym). */ ++RELOC_NUMBER (R_LARCH_PCALA64_LO20, 73) ++/* PCREL: 64 ++ lu52i.d ++ %pc64_hi12 (sym). */ ++RELOC_NUMBER (R_LARCH_PCALA64_HI12, 74) ++ ++/* GOT: 32/64 ++ pcalau12i ++ %got_pc_hi20 (got). */ ++RELOC_NUMBER (R_LARCH_GOT_PC_HI20, 75) ++/* GOT: 32/64 ++ ld.w/ld.d ++ %got_pc_lo12 (got). */ ++RELOC_NUMBER (R_LARCH_GOT_PC_LO12, 76) ++/* GOT: 32/64 ++ lu32i.d ++ %got_pc_lo12 (got). */ ++RELOC_NUMBER (R_LARCH_GOT64_PC_LO20, 77) ++/* GOT64: PCREL ++ lu52i.d ++ %got64_pc_hi12 (got). */ ++RELOC_NUMBER (R_LARCH_GOT64_PC_HI12, 78) ++/* GOT32/64: ABS ++ lu12i.w ++ %got_hi20 (got). */ ++RELOC_NUMBER (R_LARCH_GOT_HI20, 79) ++/* GOT: 32/64: ABS ++ ori ++ %got_lo12 (got). */ ++RELOC_NUMBER (R_LARCH_GOT_LO12, 80) ++/* GOT64: ABS ++ lu32i.d ++ %got64_lo20 (got). */ ++RELOC_NUMBER (R_LARCH_GOT64_LO20, 81) ++/* GOT64: ABS ++ lu52i.d ++ %got64_hi12 (got). */ ++RELOC_NUMBER (R_LARCH_GOT64_HI12, 82) ++ ++/* TLS-LE: 32/64 ++ lu12i.w ++ %le_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_LE_HI20, 83) ++/* TLS-LE: 32/64 ++ ori ++ %le_lo12 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_LE_LO12, 84) ++/* TLS-LE: 64 ++ lu32i.d ++ %le64_lo20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_LE64_LO20, 85) ++/* TLS-LE: 64 ++ lu52i.d ++ %le64_hi12 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_LE64_HI12, 86) ++ ++/* TLS-IE: 32/64 ++ pcalau12i ++ %ie_pc_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_IE_PC_HI20, 87) ++RELOC_NUMBER (R_LARCH_TLS_IE_PC_LO12, 88) ++RELOC_NUMBER (R_LARCH_TLS_IE64_PC_LO20, 89) ++RELOC_NUMBER (R_LARCH_TLS_IE64_PC_HI12, 90) ++ ++/* TLS-IE: 32/64: ABS ++ lu12i.w ++ %ie_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_IE_HI20, 91) ++RELOC_NUMBER (R_LARCH_TLS_IE_LO12, 92) ++RELOC_NUMBER (R_LARCH_TLS_IE64_LO20, 93) ++RELOC_NUMBER (R_LARCH_TLS_IE64_HI12, 94) ++ ++/* TLS-LD: 32/64 ++ pcalau12i ++ %ld_pc_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_LD_PC_HI20, 95) ++/* TLS-LD: 32/64: ABS ++ lu12i.w ++ %ld_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_LD_HI20, 96) ++ ++/* TLS-GD: 32/64 ++ pcalau12i ++ %gd_pc_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_GD_PC_HI20, 97) ++/* TLS-GD: 32/64: ABS ++ lu12i.w ++ %gd_hi20 (sym). */ ++RELOC_NUMBER (R_LARCH_TLS_GD_HI20, 98) ++ ++/* For eh_frame and debug info. */ ++RELOC_NUMBER (R_LARCH_32_PCREL, 99) ++ ++/* RELAX. */ ++RELOC_NUMBER (R_LARCH_RELAX, 100) ++ +END_RELOC_NUMBERS (R_LARCH_count) + +/* Processor specific flags for the ELF header e_flags field. */ -+#define EF_LOONGARCH_ABI_LP32 0b01 -+#define EF_LOONGARCH_ABI_XLP32 0b10 -+#define EF_LOONGARCH_ABI_LP64 0b11 -+#define EF_LOONGARCH_ABI_MASK 0b11 ++/*The flag lp64s/lp64f/lp64d/ilp32s/ilp32f/ilp32d 3bits. */ ++#define EF_LOONGARCH_ABI_LP64_SOFT_FLOAT 0x1 ++#define EF_LOONGARCH_ABI_LP64_SINGLE_FLOAT 0x2 ++#define EF_LOONGARCH_ABI_LP64_DOUBLE_FLOAT 0x3 ++ ++#define EF_LOONGARCH_ABI_ILP32_SOFT_FLOAT 0x5 ++#define EF_LOONGARCH_ABI_ILP32_SINGLE_FLOAT 0x6 ++#define EF_LOONGARCH_ABI_ILP32_DOUBLE_FLOAT 0x7 ++ ++#define EF_LOONGARCH_ABI_MASK 0x7 ++#define EF_LOONGARCH_ABI_ILP32_MASK 0x4 ++#define EF_LOONGARCH_ABI_FLOAT_MASK 0x3 ++#define EF_LOONGARCH_ABI_SOFT_FLOAT_MASK 0x1 ++#define EF_LOONGARCH_ABI_SINGLE_FLOAT_MASK 0x2 ++#define EF_LOONGARCH_ABI_DOUBLE_FLOAT_MASK 0x3 ++ ++#define EF_LOONGARCH_ABI(abi) (EF_LOONGARCH_ABI_MASK & (abi)) + +#define EF_LOONGARCH_IS_LP64(abi) \ -+ ((abi & EF_LOONGARCH_ABI_MASK) == EF_LOONGARCH_ABI_LP64) -+#define EF_LOONGARCH_IS_LP32(abi) \ -+ ((abi & EF_LOONGARCH_ABI_MASK) == EF_LOONGARCH_ABI_LP32) -+#define EF_LOONGARCH_IS_XLP32(abi) \ -+ ((abi & EF_LOONGARCH_ABI_MASK) == EF_LOONGARCH_ABI_XLP32) ++ (EF_LOONGARCH_ABI(abi) && (!(EF_LOONGARCH_ABI(abi) & EF_LOONGARCH_ABI_ILP32_MASK))) ++#define EF_LOONGARCH_IS_ILP32(abi) \ ++ (EF_LOONGARCH_ABI(abi) && (EF_LOONGARCH_ABI(abi) & EF_LOONGARCH_ABI_ILP32_MASK)) + -+#define EF_LOONGARCH_ABI (EF_LOONGARCH_ABI_MASK) ++#define EF_LOONGARCH_IS_SOFT_FLOAT(abi) \ ++ (!((EF_LOONGARCH_ABI(abi) & EF_LOONGARCH_ABI_FLOAT_MASK) ^ EF_LOONGARCH_ABI_SOFT_FLOAT_MASK)) ++ ++#define EF_LOONGARCH_IS_SINGLE_FLOAT(abi) \ ++ (!((EF_LOONGARCH_ABI(abi) & EF_LOONGARCH_ABI_FLOAT_MASK) ^ EF_LOONGARCH_ABI_SINGLE_FLOAT_MASK)) ++ ++#define EF_LOONGARCH_IS_DOUBLE_FLOAT(abi) \ ++ (!((EF_LOONGARCH_ABI(abi) & EF_LOONGARCH_ABI_FLOAT_MASK) ^ EF_LOONGARCH_ABI_DOUBLE_FLOAT_MASK)) + +#endif /* _ELF_LOONGARCH_H */ -diff -uNr binutils-2.37.org/include/opcode/loongarch.h binutils-2.37/include/opcode/loongarch.h ---- binutils-2.37.org/include/opcode/loongarch.h 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/include/opcode/loongarch.h 2022-03-24 16:30:09.304113812 +0800 -@@ -0,0 +1,235 @@ +diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h +new file mode 100644 +index 00000000..c3922348 +--- /dev/null ++++ b/include/opcode/loongarch.h +@@ -0,0 +1,239 @@ +/* LoongArch assembler/disassembler support. + -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GNU Binutils. @@ -9586,11 +11671,11 @@ diff -uNr binutils-2.37.org/include/opcode/loongarch.h binutils-2.37/include/opc + const char *format, const char *macro, const char *const arg_strs[], + const char *(*map) (char esc1, char esc2, const char *arg), + char *(*helper) (const char *const arg_strs[], void *context), -+ void *context); ++ void *context, size_t len_str); + extern char *loongarch_expand_macro ( + const char *macro, const char *const arg_strs[], + char *(*helper) (const char *const arg_strs[], void *context), -+ void *context); ++ void *context, size_t len_str); + extern size_t loongarch_bits_imm_needed (int64_t imm, int si); + + extern void loongarch_eliminate_adjacent_repeat_char (char *dest, char c); @@ -9623,10 +11708,12 @@ diff -uNr binutils-2.37.org/include/opcode/loongarch.h binutils-2.37/include/opc + + struct opt_isa + { -+ int use_lp32; ++ int use_ilp32; + int use_lp64; + -+ int use_float; ++ int use_soft_float; ++ int use_single_float; ++ int use_double_float; + + int use_lsx; + int use_lasx; @@ -9635,10 +11722,12 @@ diff -uNr binutils-2.37.org/include/opcode/loongarch.h binutils-2.37/include/opc + int use_la_global_with_pcrel; + int use_la_global_with_abs; + } isa; -+#define ase_lp32 isa.use_lp32 ++#define ase_ilp32 isa.use_ilp32 +#define ase_lp64 isa.use_lp64 + -+#define ase_float isa.use_float ++#define ase_nf isa.use_soft_float ++#define ase_sf isa.use_single_float ++#define ase_df isa.use_double_float + +#define ase_lsx isa.use_lsx +#define ase_lasx isa.use_lasx @@ -9656,10 +11745,91 @@ diff -uNr binutils-2.37.org/include/opcode/loongarch.h binutils-2.37/include/opc +#endif + +#endif /* _LOONGARCH_H_ */ -diff -uNr binutils-2.37.org/ld/configure.tgt binutils-2.37/ld/configure.tgt ---- binutils-2.37.org/ld/configure.tgt 2022-03-23 16:44:12.087040531 +0800 -+++ binutils-2.37/ld/configure.tgt 2022-03-24 16:30:09.385112902 +0800 -@@ -1021,6 +1021,10 @@ +diff --git a/ld/Makefile.am b/ld/Makefile.am +index f8e99325..933741df 100644 +--- a/ld/Makefile.am ++++ b/ld/Makefile.am +@@ -401,6 +401,7 @@ ALL_64_EMULATION_SOURCES = \ + eelf32elmip.c \ + eelf32elmipvxworks.c \ + eelf32l4300.c \ ++ eelf32loongarch.c \ + eelf32lmip.c \ + eelf32lr5900.c \ + eelf32lr5900n32.c \ +@@ -434,6 +435,7 @@ ALL_64_EMULATION_SOURCES = \ + eelf64hppa.c \ + eelf64lppc.c \ + eelf64lppc_fbsd.c \ ++ eelf64loongarch.c \ + eelf64lriscv.c \ + eelf64lriscv_lp64f.c \ + eelf64lriscv_lp64.c \ +@@ -893,6 +895,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32elmip.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32elmipvxworks.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32l4300.Pc@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32loongarch.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lmip.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900n32.Pc@am__quote@ +@@ -920,6 +923,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Pc@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Pc@am__quote@ +diff --git a/ld/Makefile.in b/ld/Makefile.in +index ef2e99e0..966194ae 100644 +--- a/ld/Makefile.in ++++ b/ld/Makefile.in +@@ -891,6 +891,7 @@ ALL_64_EMULATION_SOURCES = \ + eelf32elmipvxworks.c \ + eelf32l4300.c \ + eelf32lmip.c \ ++ eelf32loongarch.c \ + eelf32lr5900.c \ + eelf32lr5900n32.c \ + eelf32lsmip.c \ +@@ -923,6 +924,7 @@ ALL_64_EMULATION_SOURCES = \ + eelf64hppa.c \ + eelf64lppc.c \ + eelf64lppc_fbsd.c \ ++ eelf64loongarch.c \ + eelf64lriscv.c \ + eelf64lriscv_lp64f.c \ + eelf64lriscv_lp64.c \ +@@ -1347,6 +1349,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq10.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq2000.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32l4300.Po@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32loongarch.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lm32.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lm32fd.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lmip.Po@am__quote@ +@@ -1417,6 +1420,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip_fbsd.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Po@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Po@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Po@am__quote@ +@@ -2578,6 +2582,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Pc@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Pc@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Pc@am__quote@ +diff --git a/ld/configure.tgt b/ld/configure.tgt +index 6205d7c9..86ce0919 100644 +--- a/ld/configure.tgt ++++ b/ld/configure.tgt +@@ -1021,6 +1021,10 @@ z8k-*-coff) targ_emul=z8002 targ_extra_emuls=z8001 targ_extra_ofiles= ;; @@ -9670,9 +11840,11 @@ diff -uNr binutils-2.37.org/ld/configure.tgt binutils-2.37/ld/configure.tgt *-*-ieee*) targ_emul=vanilla targ_extra_ofiles= ;; -diff -uNr binutils-2.37.org/ld/emulparams/elf32loongarch-defs.sh binutils-2.37/ld/emulparams/elf32loongarch-defs.sh ---- binutils-2.37.org/ld/emulparams/elf32loongarch-defs.sh 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/emulparams/elf32loongarch-defs.sh 2022-03-24 16:30:09.305113801 +0800 +diff --git a/ld/emulparams/elf32loongarch-defs.sh b/ld/emulparams/elf32loongarch-defs.sh +new file mode 100644 +index 00000000..f80f5742 +--- /dev/null ++++ b/ld/emulparams/elf32loongarch-defs.sh @@ -0,0 +1,36 @@ +# This is an ELF platform. +SCRIPT_NAME=elf @@ -9710,9 +11882,11 @@ diff -uNr binutils-2.37.org/ld/emulparams/elf32loongarch-defs.sh binutils-2.37/l +SEPARATE_GOTPLT=0 +INITIAL_READONLY_SECTIONS=".interp : { *(.interp) } ${CREATE_PIE-${INITIAL_READONLY_SECTIONS}}" +INITIAL_READONLY_SECTIONS="${RELOCATING+${CREATE_SHLIB-${INITIAL_READONLY_SECTIONS}}}" -diff -uNr binutils-2.37.org/ld/emulparams/elf32loongarch.sh binutils-2.37/ld/emulparams/elf32loongarch.sh ---- binutils-2.37.org/ld/emulparams/elf32loongarch.sh 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/emulparams/elf32loongarch.sh 2022-03-24 16:30:09.306113790 +0800 +diff --git a/ld/emulparams/elf32loongarch.sh b/ld/emulparams/elf32loongarch.sh +new file mode 100644 +index 00000000..edc85ece +--- /dev/null ++++ b/ld/emulparams/elf32loongarch.sh @@ -0,0 +1,11 @@ +source_sh ${srcdir}/emulparams/elf32loongarch-defs.sh +OUTPUT_FORMAT="elf32-loongarch" @@ -9725,9 +11899,11 @@ diff -uNr binutils-2.37.org/ld/emulparams/elf32loongarch.sh binutils-2.37/ld/emu + esac + ;; +esac -diff -uNr binutils-2.37.org/ld/emulparams/elf64loongarch-defs.sh binutils-2.37/ld/emulparams/elf64loongarch-defs.sh ---- binutils-2.37.org/ld/emulparams/elf64loongarch-defs.sh 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/emulparams/elf64loongarch-defs.sh 2022-03-24 16:30:09.306113790 +0800 +diff --git a/ld/emulparams/elf64loongarch-defs.sh b/ld/emulparams/elf64loongarch-defs.sh +new file mode 100644 +index 00000000..c793f5d8 +--- /dev/null ++++ b/ld/emulparams/elf64loongarch-defs.sh @@ -0,0 +1,39 @@ +# This is an ELF platform. +SCRIPT_NAME=elf @@ -9768,10 +11944,12 @@ diff -uNr binutils-2.37.org/ld/emulparams/elf64loongarch-defs.sh binutils-2.37/l +SEPARATE_GOTPLT=0 +INITIAL_READONLY_SECTIONS=".interp : { *(.interp) } ${CREATE_PIE-${INITIAL_READONLY_SECTIONS}}" +INITIAL_READONLY_SECTIONS="${RELOCATING+${CREATE_SHLIB-${INITIAL_READONLY_SECTIONS}}}" -diff -uNr binutils-2.37.org/ld/emulparams/elf64loongarch.sh binutils-2.37/ld/emulparams/elf64loongarch.sh ---- binutils-2.37.org/ld/emulparams/elf64loongarch.sh 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/emulparams/elf64loongarch.sh 2022-03-24 16:30:09.306113790 +0800 -@@ -0,0 +1,12 @@ +diff --git a/ld/emulparams/elf64loongarch.sh b/ld/emulparams/elf64loongarch.sh +new file mode 100644 +index 00000000..d7b2229e +--- /dev/null ++++ b/ld/emulparams/elf64loongarch.sh +@@ -0,0 +1,11 @@ +source_sh ${srcdir}/emulparams/elf64loongarch-defs.sh +OUTPUT_FORMAT="elf64-loongarch" + @@ -9779,14 +11957,15 @@ diff -uNr binutils-2.37.org/ld/emulparams/elf64loongarch.sh binutils-2.37/ld/emu + loongarch64*-linux*) + case "$EMULATION_NAME" in + *64*) -+ LIBPATH_SUFFIX="64 /$target";; ++ LIBPATH_SUFFIX="64";; + esac + ;; +esac -+LIBPATH_SUFFIX=`echo $LIBPATH_SUFFIX | sed -e 's/\-unknown\-/\-/g'` -diff -uNr binutils-2.37.org/ld/emultempl/loongarchelf.em binutils-2.37/ld/emultempl/loongarchelf.em ---- binutils-2.37.org/ld/emultempl/loongarchelf.em 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/emultempl/loongarchelf.em 2022-03-24 16:30:09.306113790 +0800 +diff --git a/ld/emultempl/loongarchelf.em b/ld/emultempl/loongarchelf.em +new file mode 100644 +index 00000000..b688ef7b +--- /dev/null ++++ b/ld/emultempl/loongarchelf.em @@ -0,0 +1,87 @@ +# This shell script emits a C file. -*- C -*- +# Copyright (C) 2021 Free Software Foundation, Inc. @@ -9875,88 +12054,1323 @@ diff -uNr binutils-2.37.org/ld/emultempl/loongarchelf.em binutils-2.37/ld/emulte +LDEMUL_BEFORE_ALLOCATION=larch_elf_before_allocation +LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation +LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=larch_create_output_section_statements -diff -uNr binutils-2.37.org/ld/Makefile.am binutils-2.37/ld/Makefile.am ---- binutils-2.37.org/ld/Makefile.am 2022-03-23 16:44:12.360037479 +0800 -+++ binutils-2.37/ld/Makefile.am 2022-03-24 16:30:09.659109823 +0800 -@@ -402,6 +402,7 @@ - eelf32elmip.c \ - eelf32elmipvxworks.c \ - eelf32l4300.c \ -+ eelf32loongarch.c \ - eelf32lmip.c \ - eelf32lr5900.c \ - eelf32lr5900n32.c \ -@@ -435,6 +436,7 @@ - eelf64hppa.c \ - eelf64lppc.c \ - eelf64lppc_fbsd.c \ -+ eelf64loongarch.c \ - eelf64lriscv.c \ - eelf64lriscv_lp64f.c \ - eelf64lriscv_lp64.c \ -@@ -894,6 +896,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32elmip.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32elmipvxworks.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32l4300.Pc@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32loongarch.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lmip.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900n32.Pc@am__quote@ -@@ -921,6 +924,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Pc@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Pc@am__quote@ -diff -uNr binutils-2.37.org/ld/Makefile.in binutils-2.37/ld/Makefile.in ---- binutils-2.37.org/ld/Makefile.in 2022-03-23 16:44:12.372037345 +0800 -+++ binutils-2.37/ld/Makefile.in 2022-03-24 16:30:09.671109688 +0800 -@@ -891,6 +891,7 @@ - eelf32elmipvxworks.c \ - eelf32l4300.c \ - eelf32lmip.c \ -+ eelf32loongarch.c \ - eelf32lr5900.c \ - eelf32lr5900n32.c \ - eelf32lsmip.c \ -@@ -923,6 +924,7 @@ - eelf64hppa.c \ - eelf64lppc.c \ - eelf64lppc_fbsd.c \ -+ eelf64loongarch.c \ - eelf64lriscv.c \ - eelf64lriscv_lp64f.c \ - eelf64lriscv_lp64.c \ -@@ -1347,6 +1349,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq10.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq2000.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32l4300.Po@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32loongarch.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lm32.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lm32fd.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lmip.Po@am__quote@ -@@ -1417,6 +1420,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip_fbsd.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Po@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Po@am__quote@ -@@ -2578,6 +2582,7 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Pc@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Pc@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Pc@am__quote@ -diff -uNr binutils-2.37.org/ld/po/BLD-POTFILES.in binutils-2.37/ld/po/BLD-POTFILES.in ---- binutils-2.37.org/ld/po/BLD-POTFILES.in 2021-07-19 00:40:43.000000000 +0800 -+++ binutils-2.37/ld/po/BLD-POTFILES.in 2022-03-24 16:30:09.307113779 +0800 -@@ -111,6 +111,7 @@ +diff --git a/ld/ldlex.c b/ld/ldlex.c +index 48d27df1..23ead0c5 100644 +--- a/ld/ldlex.c ++++ b/ld/ldlex.c +@@ -1,5 +1,5 @@ + +-#line 2 "ldlex.c" ++#line 2 "../../ld/ldlex.c" + + #define YY_INT_ALIGNED short int + +@@ -1665,8 +1665,8 @@ int yy_flex_debug = 0; + #define YY_MORE_ADJ 0 + #define YY_RESTORE_YY_MORE_OFFSET + char *yytext; +-#line 1 "ldlex.l" +-#line 4 "ldlex.l" ++#line 1 "../../ld/ldlex.l" ++#line 4 "../../ld/ldlex.l" + + /* Copyright (C) 1991-2021 Free Software Foundation, Inc. + Written by Steve Chamberlain of Cygnus Support. +@@ -1752,9 +1752,9 @@ static void lex_warn_invalid (char *where, char *what); + */ + #define RTOKEN(x) { yylval.token = x; return x; } + +-#line 1755 "ldlex.c" ++#line 1755 "../../ld/ldlex.c" + +-#line 1757 "ldlex.c" ++#line 1757 "../../ld/ldlex.c" + + #define INITIAL 0 + #define SCRIPT 1 +@@ -1977,10 +1977,10 @@ YY_DECL + } + + { +-#line 113 "ldlex.l" ++#line 113 "../../ld/ldlex.l" + + +-#line 116 "ldlex.l" ++#line 116 "../../ld/ldlex.l" + if (parser_input != input_selected) + { + /* The first token of the input determines the initial parser state. */ +@@ -1997,7 +1997,7 @@ YY_DECL + } + } + +-#line 2000 "ldlex.c" ++#line 2000 "../../ld/ldlex.c" + + while ( /*CONSTCOND*/1 ) /* loops until end-of-file is reached */ + { +@@ -2056,12 +2056,12 @@ do_action: /* This label is used only to access EOF actions. */ + + case 1: + YY_RULE_SETUP +-#line 132 "ldlex.l" ++#line 132 "../../ld/ldlex.l" + { comment (); } + YY_BREAK + case 2: + YY_RULE_SETUP +-#line 135 "ldlex.l" ++#line 135 "../../ld/ldlex.l" + { + yylval.integer = bfd_scan_vma (yytext + 1, 0, 16); + yylval.bigint.str = NULL; +@@ -2070,7 +2070,7 @@ YY_RULE_SETUP + YY_BREAK + case 3: + YY_RULE_SETUP +-#line 141 "ldlex.l" ++#line 141 "../../ld/ldlex.l" + { + int ibase ; + switch (yytext[yyleng - 1]) { +@@ -2099,7 +2099,7 @@ YY_RULE_SETUP + YY_BREAK + case 4: + YY_RULE_SETUP +-#line 166 "ldlex.l" ++#line 166 "../../ld/ldlex.l" + { + char *s = yytext; + int ibase = 0; +@@ -2132,834 +2132,834 @@ YY_RULE_SETUP + YY_BREAK + case 5: + YY_RULE_SETUP +-#line 195 "ldlex.l" ++#line 195 "../../ld/ldlex.l" + { RTOKEN(']');} + YY_BREAK + case 6: + YY_RULE_SETUP +-#line 196 "ldlex.l" ++#line 196 "../../ld/ldlex.l" + { RTOKEN('[');} + YY_BREAK + case 7: + YY_RULE_SETUP +-#line 197 "ldlex.l" ++#line 197 "../../ld/ldlex.l" + { RTOKEN(LSHIFTEQ);} + YY_BREAK + case 8: + YY_RULE_SETUP +-#line 198 "ldlex.l" ++#line 198 "../../ld/ldlex.l" + { RTOKEN(RSHIFTEQ);} + YY_BREAK + case 9: + YY_RULE_SETUP +-#line 199 "ldlex.l" ++#line 199 "../../ld/ldlex.l" + { RTOKEN(OROR);} + YY_BREAK + case 10: + YY_RULE_SETUP +-#line 200 "ldlex.l" ++#line 200 "../../ld/ldlex.l" + { RTOKEN(EQ);} + YY_BREAK + case 11: + YY_RULE_SETUP +-#line 201 "ldlex.l" ++#line 201 "../../ld/ldlex.l" + { RTOKEN(NE);} + YY_BREAK + case 12: + YY_RULE_SETUP +-#line 202 "ldlex.l" ++#line 202 "../../ld/ldlex.l" + { RTOKEN(GE);} + YY_BREAK + case 13: + YY_RULE_SETUP +-#line 203 "ldlex.l" ++#line 203 "../../ld/ldlex.l" + { RTOKEN(LE);} + YY_BREAK + case 14: + YY_RULE_SETUP +-#line 204 "ldlex.l" ++#line 204 "../../ld/ldlex.l" + { RTOKEN(LSHIFT);} + YY_BREAK + case 15: + YY_RULE_SETUP +-#line 205 "ldlex.l" ++#line 205 "../../ld/ldlex.l" + { RTOKEN(RSHIFT);} + YY_BREAK + case 16: + YY_RULE_SETUP +-#line 206 "ldlex.l" ++#line 206 "../../ld/ldlex.l" + { RTOKEN(PLUSEQ);} + YY_BREAK + case 17: + YY_RULE_SETUP +-#line 207 "ldlex.l" ++#line 207 "../../ld/ldlex.l" + { RTOKEN(MINUSEQ);} + YY_BREAK + case 18: + YY_RULE_SETUP +-#line 208 "ldlex.l" ++#line 208 "../../ld/ldlex.l" + { RTOKEN(MULTEQ);} + YY_BREAK + case 19: + YY_RULE_SETUP +-#line 209 "ldlex.l" ++#line 209 "../../ld/ldlex.l" + { RTOKEN(DIVEQ);} + YY_BREAK + case 20: + YY_RULE_SETUP +-#line 210 "ldlex.l" ++#line 210 "../../ld/ldlex.l" + { RTOKEN(ANDEQ);} + YY_BREAK + case 21: + YY_RULE_SETUP +-#line 211 "ldlex.l" ++#line 211 "../../ld/ldlex.l" + { RTOKEN(OREQ);} + YY_BREAK + case 22: + YY_RULE_SETUP +-#line 212 "ldlex.l" ++#line 212 "../../ld/ldlex.l" + { RTOKEN(ANDAND);} + YY_BREAK + case 23: + YY_RULE_SETUP +-#line 213 "ldlex.l" ++#line 213 "../../ld/ldlex.l" + { RTOKEN('>');} + YY_BREAK + case 24: + YY_RULE_SETUP +-#line 214 "ldlex.l" ++#line 214 "../../ld/ldlex.l" + { RTOKEN(',');} + YY_BREAK + case 25: + YY_RULE_SETUP +-#line 215 "ldlex.l" ++#line 215 "../../ld/ldlex.l" + { RTOKEN('&');} + YY_BREAK + case 26: + YY_RULE_SETUP +-#line 216 "ldlex.l" ++#line 216 "../../ld/ldlex.l" + { RTOKEN('|');} + YY_BREAK + case 27: + YY_RULE_SETUP +-#line 217 "ldlex.l" ++#line 217 "../../ld/ldlex.l" + { RTOKEN('~');} + YY_BREAK + case 28: + YY_RULE_SETUP +-#line 218 "ldlex.l" ++#line 218 "../../ld/ldlex.l" + { RTOKEN('!');} + YY_BREAK + case 29: + YY_RULE_SETUP +-#line 219 "ldlex.l" ++#line 219 "../../ld/ldlex.l" + { RTOKEN('?');} + YY_BREAK + case 30: + YY_RULE_SETUP +-#line 220 "ldlex.l" ++#line 220 "../../ld/ldlex.l" + { RTOKEN('*');} + YY_BREAK + case 31: + YY_RULE_SETUP +-#line 221 "ldlex.l" ++#line 221 "../../ld/ldlex.l" + { RTOKEN('+');} + YY_BREAK + case 32: + YY_RULE_SETUP +-#line 222 "ldlex.l" ++#line 222 "../../ld/ldlex.l" + { RTOKEN('-');} + YY_BREAK + case 33: + YY_RULE_SETUP +-#line 223 "ldlex.l" ++#line 223 "../../ld/ldlex.l" + { RTOKEN('/');} + YY_BREAK + case 34: + YY_RULE_SETUP +-#line 224 "ldlex.l" ++#line 224 "../../ld/ldlex.l" + { RTOKEN('%');} + YY_BREAK + case 35: + YY_RULE_SETUP +-#line 225 "ldlex.l" ++#line 225 "../../ld/ldlex.l" + { RTOKEN('<');} + YY_BREAK + case 36: + YY_RULE_SETUP +-#line 226 "ldlex.l" ++#line 226 "../../ld/ldlex.l" + { RTOKEN('=');} + YY_BREAK + case 37: + YY_RULE_SETUP +-#line 227 "ldlex.l" ++#line 227 "../../ld/ldlex.l" + { RTOKEN('}') ; } + YY_BREAK + case 38: + YY_RULE_SETUP +-#line 228 "ldlex.l" ++#line 228 "../../ld/ldlex.l" + { RTOKEN('{'); } + YY_BREAK + case 39: + YY_RULE_SETUP +-#line 229 "ldlex.l" ++#line 229 "../../ld/ldlex.l" + { RTOKEN(')');} + YY_BREAK + case 40: + YY_RULE_SETUP +-#line 230 "ldlex.l" ++#line 230 "../../ld/ldlex.l" + { RTOKEN('(');} + YY_BREAK + case 41: + YY_RULE_SETUP +-#line 231 "ldlex.l" ++#line 231 "../../ld/ldlex.l" + { RTOKEN(':'); } + YY_BREAK + case 42: + YY_RULE_SETUP +-#line 232 "ldlex.l" ++#line 232 "../../ld/ldlex.l" + { RTOKEN(';');} + YY_BREAK + case 43: + YY_RULE_SETUP +-#line 233 "ldlex.l" ++#line 233 "../../ld/ldlex.l" + { RTOKEN(MEMORY);} + YY_BREAK + case 44: + YY_RULE_SETUP +-#line 234 "ldlex.l" ++#line 234 "../../ld/ldlex.l" + { RTOKEN(REGION_ALIAS);} + YY_BREAK + case 45: + YY_RULE_SETUP +-#line 235 "ldlex.l" ++#line 235 "../../ld/ldlex.l" + { RTOKEN(LD_FEATURE);} + YY_BREAK + case 46: + YY_RULE_SETUP +-#line 236 "ldlex.l" ++#line 236 "../../ld/ldlex.l" + { RTOKEN(ORIGIN);} + YY_BREAK + case 47: + YY_RULE_SETUP +-#line 237 "ldlex.l" ++#line 237 "../../ld/ldlex.l" + { RTOKEN(VERSIONK);} + YY_BREAK + case 48: + YY_RULE_SETUP +-#line 238 "ldlex.l" ++#line 238 "../../ld/ldlex.l" + { RTOKEN(BLOCK);} + YY_BREAK + case 49: + YY_RULE_SETUP +-#line 239 "ldlex.l" ++#line 239 "../../ld/ldlex.l" + { RTOKEN(BIND);} + YY_BREAK + case 50: + YY_RULE_SETUP +-#line 240 "ldlex.l" ++#line 240 "../../ld/ldlex.l" + { RTOKEN(LENGTH);} + YY_BREAK + case 51: + YY_RULE_SETUP +-#line 241 "ldlex.l" ++#line 241 "../../ld/ldlex.l" + { RTOKEN(ALIGN_K);} + YY_BREAK + case 52: + YY_RULE_SETUP +-#line 242 "ldlex.l" ++#line 242 "../../ld/ldlex.l" + { RTOKEN(DATA_SEGMENT_ALIGN);} + YY_BREAK + case 53: + YY_RULE_SETUP +-#line 243 "ldlex.l" ++#line 243 "../../ld/ldlex.l" + { RTOKEN(DATA_SEGMENT_RELRO_END);} + YY_BREAK + case 54: + YY_RULE_SETUP +-#line 244 "ldlex.l" ++#line 244 "../../ld/ldlex.l" + { RTOKEN(DATA_SEGMENT_END);} + YY_BREAK + case 55: + YY_RULE_SETUP +-#line 245 "ldlex.l" ++#line 245 "../../ld/ldlex.l" + { RTOKEN(ADDR);} + YY_BREAK + case 56: + YY_RULE_SETUP +-#line 246 "ldlex.l" ++#line 246 "../../ld/ldlex.l" + { RTOKEN(LOADADDR);} + YY_BREAK + case 57: + YY_RULE_SETUP +-#line 247 "ldlex.l" ++#line 247 "../../ld/ldlex.l" + { RTOKEN(ALIGNOF); } + YY_BREAK + case 58: + YY_RULE_SETUP +-#line 248 "ldlex.l" ++#line 248 "../../ld/ldlex.l" + { RTOKEN(MAX_K); } + YY_BREAK + case 59: + YY_RULE_SETUP +-#line 249 "ldlex.l" ++#line 249 "../../ld/ldlex.l" + { RTOKEN(MIN_K); } + YY_BREAK + case 60: + YY_RULE_SETUP +-#line 250 "ldlex.l" ++#line 250 "../../ld/ldlex.l" + { RTOKEN(LOG2CEIL); } + YY_BREAK + case 61: + YY_RULE_SETUP +-#line 251 "ldlex.l" ++#line 251 "../../ld/ldlex.l" + { RTOKEN(ASSERT_K); } + YY_BREAK + case 62: + YY_RULE_SETUP +-#line 252 "ldlex.l" ++#line 252 "../../ld/ldlex.l" + { RTOKEN(ENTRY);} + YY_BREAK + case 63: + YY_RULE_SETUP +-#line 253 "ldlex.l" ++#line 253 "../../ld/ldlex.l" + { RTOKEN(EXTERN);} + YY_BREAK + case 64: + YY_RULE_SETUP +-#line 254 "ldlex.l" ++#line 254 "../../ld/ldlex.l" + { RTOKEN(NEXT);} + YY_BREAK + case 65: + YY_RULE_SETUP +-#line 255 "ldlex.l" ++#line 255 "../../ld/ldlex.l" + { RTOKEN(SIZEOF_HEADERS);} + YY_BREAK + case 66: + YY_RULE_SETUP +-#line 256 "ldlex.l" ++#line 256 "../../ld/ldlex.l" + { RTOKEN(SIZEOF_HEADERS);} + YY_BREAK + case 67: + YY_RULE_SETUP +-#line 257 "ldlex.l" ++#line 257 "../../ld/ldlex.l" + { RTOKEN(SEGMENT_START);} + YY_BREAK + case 68: + YY_RULE_SETUP +-#line 258 "ldlex.l" ++#line 258 "../../ld/ldlex.l" + { RTOKEN(MAP);} + YY_BREAK + case 69: + YY_RULE_SETUP +-#line 259 "ldlex.l" ++#line 259 "../../ld/ldlex.l" + { RTOKEN(SIZEOF);} + YY_BREAK + case 70: + YY_RULE_SETUP +-#line 260 "ldlex.l" ++#line 260 "../../ld/ldlex.l" + { RTOKEN(TARGET_K);} + YY_BREAK + case 71: + YY_RULE_SETUP +-#line 261 "ldlex.l" ++#line 261 "../../ld/ldlex.l" + { RTOKEN(SEARCH_DIR);} + YY_BREAK + case 72: + YY_RULE_SETUP +-#line 262 "ldlex.l" ++#line 262 "../../ld/ldlex.l" + { RTOKEN(OUTPUT);} + YY_BREAK + case 73: + YY_RULE_SETUP +-#line 263 "ldlex.l" ++#line 263 "../../ld/ldlex.l" + { RTOKEN(INPUT);} + YY_BREAK + case 74: + YY_RULE_SETUP +-#line 264 "ldlex.l" ++#line 264 "../../ld/ldlex.l" + { RTOKEN(GROUP);} + YY_BREAK + case 75: + YY_RULE_SETUP +-#line 265 "ldlex.l" ++#line 265 "../../ld/ldlex.l" + { RTOKEN(AS_NEEDED);} + YY_BREAK + case 76: + YY_RULE_SETUP +-#line 266 "ldlex.l" ++#line 266 "../../ld/ldlex.l" + { RTOKEN(DEFINED);} + YY_BREAK + case 77: + YY_RULE_SETUP +-#line 267 "ldlex.l" ++#line 267 "../../ld/ldlex.l" + { RTOKEN(CREATE_OBJECT_SYMBOLS);} + YY_BREAK + case 78: + YY_RULE_SETUP +-#line 268 "ldlex.l" ++#line 268 "../../ld/ldlex.l" + { RTOKEN( CONSTRUCTORS);} + YY_BREAK + case 79: + YY_RULE_SETUP +-#line 269 "ldlex.l" ++#line 269 "../../ld/ldlex.l" + { RTOKEN(FORCE_COMMON_ALLOCATION);} + YY_BREAK + case 80: + YY_RULE_SETUP +-#line 270 "ldlex.l" ++#line 270 "../../ld/ldlex.l" + { RTOKEN(FORCE_GROUP_ALLOCATION);} + YY_BREAK + case 81: + YY_RULE_SETUP +-#line 271 "ldlex.l" ++#line 271 "../../ld/ldlex.l" + { RTOKEN(INHIBIT_COMMON_ALLOCATION);} + YY_BREAK + case 82: + YY_RULE_SETUP +-#line 272 "ldlex.l" ++#line 272 "../../ld/ldlex.l" + { RTOKEN(SECTIONS);} + YY_BREAK + case 83: + YY_RULE_SETUP +-#line 273 "ldlex.l" ++#line 273 "../../ld/ldlex.l" + { RTOKEN(INSERT_K);} + YY_BREAK + case 84: + YY_RULE_SETUP +-#line 274 "ldlex.l" ++#line 274 "../../ld/ldlex.l" + { RTOKEN(AFTER);} + YY_BREAK + case 85: + YY_RULE_SETUP +-#line 275 "ldlex.l" ++#line 275 "../../ld/ldlex.l" + { RTOKEN(BEFORE);} + YY_BREAK + case 86: + YY_RULE_SETUP +-#line 276 "ldlex.l" ++#line 276 "../../ld/ldlex.l" + { RTOKEN(FILL);} + YY_BREAK + case 87: + YY_RULE_SETUP +-#line 277 "ldlex.l" ++#line 277 "../../ld/ldlex.l" + { RTOKEN(STARTUP);} + YY_BREAK + case 88: + YY_RULE_SETUP +-#line 278 "ldlex.l" ++#line 278 "../../ld/ldlex.l" + { RTOKEN(OUTPUT_FORMAT);} + YY_BREAK + case 89: + YY_RULE_SETUP +-#line 279 "ldlex.l" ++#line 279 "../../ld/ldlex.l" + { RTOKEN( OUTPUT_ARCH);} + YY_BREAK + case 90: + YY_RULE_SETUP +-#line 280 "ldlex.l" ++#line 280 "../../ld/ldlex.l" + { RTOKEN(HLL);} + YY_BREAK + case 91: + YY_RULE_SETUP +-#line 281 "ldlex.l" ++#line 281 "../../ld/ldlex.l" + { RTOKEN(SYSLIB);} + YY_BREAK + case 92: + YY_RULE_SETUP +-#line 282 "ldlex.l" ++#line 282 "../../ld/ldlex.l" + { RTOKEN(FLOAT);} + YY_BREAK + case 93: + YY_RULE_SETUP +-#line 283 "ldlex.l" ++#line 283 "../../ld/ldlex.l" + { RTOKEN( QUAD);} + YY_BREAK + case 94: + YY_RULE_SETUP +-#line 284 "ldlex.l" ++#line 284 "../../ld/ldlex.l" + { RTOKEN( SQUAD);} + YY_BREAK + case 95: + YY_RULE_SETUP +-#line 285 "ldlex.l" ++#line 285 "../../ld/ldlex.l" + { RTOKEN( LONG);} + YY_BREAK + case 96: + YY_RULE_SETUP +-#line 286 "ldlex.l" ++#line 286 "../../ld/ldlex.l" + { RTOKEN( SHORT);} + YY_BREAK + case 97: + YY_RULE_SETUP +-#line 287 "ldlex.l" ++#line 287 "../../ld/ldlex.l" + { RTOKEN( BYTE);} + YY_BREAK + case 98: + YY_RULE_SETUP +-#line 288 "ldlex.l" ++#line 288 "../../ld/ldlex.l" + { RTOKEN(NOFLOAT);} + YY_BREAK + case 99: + YY_RULE_SETUP +-#line 289 "ldlex.l" ++#line 289 "../../ld/ldlex.l" + { RTOKEN(NOCROSSREFS);} + YY_BREAK + case 100: + YY_RULE_SETUP +-#line 290 "ldlex.l" ++#line 290 "../../ld/ldlex.l" + { RTOKEN(NOCROSSREFS_TO);} + YY_BREAK + case 101: + YY_RULE_SETUP +-#line 291 "ldlex.l" ++#line 291 "../../ld/ldlex.l" + { RTOKEN(OVERLAY); } + YY_BREAK + case 102: + YY_RULE_SETUP +-#line 292 "ldlex.l" ++#line 292 "../../ld/ldlex.l" + { RTOKEN(SORT_BY_NAME); } + YY_BREAK + case 103: + YY_RULE_SETUP +-#line 293 "ldlex.l" ++#line 293 "../../ld/ldlex.l" + { RTOKEN(SORT_BY_ALIGNMENT); } + YY_BREAK + case 104: + YY_RULE_SETUP +-#line 294 "ldlex.l" ++#line 294 "../../ld/ldlex.l" + { RTOKEN(SORT_BY_NAME); } + YY_BREAK + case 105: + YY_RULE_SETUP +-#line 295 "ldlex.l" ++#line 295 "../../ld/ldlex.l" + { RTOKEN(SORT_BY_INIT_PRIORITY); } + YY_BREAK + case 106: + YY_RULE_SETUP +-#line 296 "ldlex.l" ++#line 296 "../../ld/ldlex.l" + { RTOKEN(SORT_NONE); } + YY_BREAK + case 107: + YY_RULE_SETUP +-#line 297 "ldlex.l" ++#line 297 "../../ld/ldlex.l" + { RTOKEN(NOLOAD);} + YY_BREAK + case 108: + YY_RULE_SETUP +-#line 298 "ldlex.l" ++#line 298 "../../ld/ldlex.l" + { RTOKEN(DSECT);} + YY_BREAK + case 109: + YY_RULE_SETUP +-#line 299 "ldlex.l" ++#line 299 "../../ld/ldlex.l" + { RTOKEN(COPY);} + YY_BREAK + case 110: + YY_RULE_SETUP +-#line 300 "ldlex.l" ++#line 300 "../../ld/ldlex.l" + { RTOKEN(INFO);} + YY_BREAK + case 111: + YY_RULE_SETUP +-#line 301 "ldlex.l" ++#line 301 "../../ld/ldlex.l" + { RTOKEN(OVERLAY);} + YY_BREAK + case 112: + YY_RULE_SETUP +-#line 302 "ldlex.l" ++#line 302 "../../ld/ldlex.l" + { RTOKEN(ONLY_IF_RO); } + YY_BREAK + case 113: + YY_RULE_SETUP +-#line 303 "ldlex.l" ++#line 303 "../../ld/ldlex.l" + { RTOKEN(ONLY_IF_RW); } + YY_BREAK + case 114: + YY_RULE_SETUP +-#line 304 "ldlex.l" ++#line 304 "../../ld/ldlex.l" + { RTOKEN(SPECIAL); } + YY_BREAK + case 115: + YY_RULE_SETUP +-#line 305 "ldlex.l" ++#line 305 "../../ld/ldlex.l" + { RTOKEN(ORIGIN);} + YY_BREAK + case 116: + YY_RULE_SETUP +-#line 306 "ldlex.l" ++#line 306 "../../ld/ldlex.l" + { RTOKEN(ORIGIN);} + YY_BREAK + case 117: + YY_RULE_SETUP +-#line 307 "ldlex.l" ++#line 307 "../../ld/ldlex.l" + { RTOKEN( LENGTH);} + YY_BREAK + case 118: + YY_RULE_SETUP +-#line 308 "ldlex.l" ++#line 308 "../../ld/ldlex.l" + { RTOKEN( LENGTH);} + YY_BREAK + case 119: + YY_RULE_SETUP +-#line 309 "ldlex.l" ++#line 309 "../../ld/ldlex.l" + { RTOKEN(INPUT_SECTION_FLAGS); } + YY_BREAK + case 120: + YY_RULE_SETUP +-#line 310 "ldlex.l" ++#line 310 "../../ld/ldlex.l" + { RTOKEN(INCLUDE);} + YY_BREAK + case 121: + YY_RULE_SETUP +-#line 311 "ldlex.l" ++#line 311 "../../ld/ldlex.l" + { RTOKEN (PHDRS); } + YY_BREAK + case 122: + YY_RULE_SETUP +-#line 312 "ldlex.l" ++#line 312 "../../ld/ldlex.l" + { RTOKEN(AT);} + YY_BREAK + case 123: + YY_RULE_SETUP +-#line 313 "ldlex.l" ++#line 313 "../../ld/ldlex.l" + { RTOKEN(ALIGN_WITH_INPUT);} + YY_BREAK + case 124: + YY_RULE_SETUP +-#line 314 "ldlex.l" ++#line 314 "../../ld/ldlex.l" + { RTOKEN(SUBALIGN);} + YY_BREAK + case 125: + YY_RULE_SETUP +-#line 315 "ldlex.l" ++#line 315 "../../ld/ldlex.l" + { RTOKEN(HIDDEN); } + YY_BREAK + case 126: + YY_RULE_SETUP +-#line 316 "ldlex.l" ++#line 316 "../../ld/ldlex.l" + { RTOKEN(PROVIDE); } + YY_BREAK + case 127: + YY_RULE_SETUP +-#line 317 "ldlex.l" ++#line 317 "../../ld/ldlex.l" + { RTOKEN(PROVIDE_HIDDEN); } + YY_BREAK + case 128: + YY_RULE_SETUP +-#line 318 "ldlex.l" ++#line 318 "../../ld/ldlex.l" + { RTOKEN(KEEP); } + YY_BREAK + case 129: + YY_RULE_SETUP +-#line 319 "ldlex.l" ++#line 319 "../../ld/ldlex.l" + { RTOKEN(EXCLUDE_FILE); } + YY_BREAK + case 130: + YY_RULE_SETUP +-#line 320 "ldlex.l" ++#line 320 "../../ld/ldlex.l" + { RTOKEN(CONSTANT);} + YY_BREAK + case 131: + /* rule 131 can match eol */ + YY_RULE_SETUP +-#line 321 "ldlex.l" ++#line 321 "../../ld/ldlex.l" + { ++ lineno; } + YY_BREAK + case 132: + /* rule 132 can match eol */ + YY_RULE_SETUP +-#line 322 "ldlex.l" ++#line 322 "../../ld/ldlex.l" + { ++ lineno; RTOKEN(NEWLINE); } + YY_BREAK + case 133: + YY_RULE_SETUP +-#line 323 "ldlex.l" ++#line 323 "../../ld/ldlex.l" + { /* Mri comment line */ } + YY_BREAK + case 134: + YY_RULE_SETUP +-#line 324 "ldlex.l" ++#line 324 "../../ld/ldlex.l" + { /* Mri comment line */ } + YY_BREAK + case 135: + YY_RULE_SETUP +-#line 325 "ldlex.l" ++#line 325 "../../ld/ldlex.l" + { RTOKEN(ENDWORD); } + YY_BREAK + case 136: + YY_RULE_SETUP +-#line 326 "ldlex.l" ++#line 326 "../../ld/ldlex.l" + { RTOKEN(ALIGNMOD);} + YY_BREAK + case 137: + YY_RULE_SETUP +-#line 327 "ldlex.l" ++#line 327 "../../ld/ldlex.l" + { RTOKEN(ALIGN_K);} + YY_BREAK + case 138: + YY_RULE_SETUP +-#line 328 "ldlex.l" ++#line 328 "../../ld/ldlex.l" + { RTOKEN(CHIP); } + YY_BREAK + case 139: + YY_RULE_SETUP +-#line 329 "ldlex.l" ++#line 329 "../../ld/ldlex.l" + { RTOKEN(BASE); } + YY_BREAK + case 140: + YY_RULE_SETUP +-#line 330 "ldlex.l" ++#line 330 "../../ld/ldlex.l" + { RTOKEN(ALIAS); } + YY_BREAK + case 141: + YY_RULE_SETUP +-#line 331 "ldlex.l" ++#line 331 "../../ld/ldlex.l" + { RTOKEN(TRUNCATE); } + YY_BREAK + case 142: + YY_RULE_SETUP +-#line 332 "ldlex.l" ++#line 332 "../../ld/ldlex.l" + { RTOKEN(LOAD); } + YY_BREAK + case 143: + YY_RULE_SETUP +-#line 333 "ldlex.l" ++#line 333 "../../ld/ldlex.l" + { RTOKEN(PUBLIC); } + YY_BREAK + case 144: + YY_RULE_SETUP +-#line 334 "ldlex.l" ++#line 334 "../../ld/ldlex.l" + { RTOKEN(ORDER); } + YY_BREAK + case 145: + YY_RULE_SETUP +-#line 335 "ldlex.l" ++#line 335 "../../ld/ldlex.l" + { RTOKEN(NAMEWORD); } + YY_BREAK + case 146: + YY_RULE_SETUP +-#line 336 "ldlex.l" ++#line 336 "../../ld/ldlex.l" + { RTOKEN(FORMAT); } + YY_BREAK + case 147: + YY_RULE_SETUP +-#line 337 "ldlex.l" ++#line 337 "../../ld/ldlex.l" + { RTOKEN(CASE); } + YY_BREAK + case 148: + YY_RULE_SETUP +-#line 338 "ldlex.l" ++#line 338 "../../ld/ldlex.l" + { RTOKEN(START); } + YY_BREAK + case 149: + YY_RULE_SETUP +-#line 339 "ldlex.l" ++#line 339 "../../ld/ldlex.l" + { RTOKEN(LIST); /* LIST and ignore to end of line */ } + YY_BREAK + case 150: + YY_RULE_SETUP +-#line 340 "ldlex.l" ++#line 340 "../../ld/ldlex.l" + { RTOKEN(SECT); } + YY_BREAK + case 151: + YY_RULE_SETUP +-#line 341 "ldlex.l" ++#line 341 "../../ld/ldlex.l" + { RTOKEN(ABSOLUTE); } + YY_BREAK + case 152: + YY_RULE_SETUP +-#line 342 "ldlex.l" ++#line 342 "../../ld/ldlex.l" + { RTOKEN(ENDWORD); } + YY_BREAK + case 153: + YY_RULE_SETUP +-#line 343 "ldlex.l" ++#line 343 "../../ld/ldlex.l" + { RTOKEN(ALIGNMOD);} + YY_BREAK + case 154: + YY_RULE_SETUP +-#line 344 "ldlex.l" ++#line 344 "../../ld/ldlex.l" + { RTOKEN(ALIGN_K);} + YY_BREAK + case 155: + YY_RULE_SETUP +-#line 345 "ldlex.l" ++#line 345 "../../ld/ldlex.l" + { RTOKEN(CHIP); } + YY_BREAK + case 156: + YY_RULE_SETUP +-#line 346 "ldlex.l" ++#line 346 "../../ld/ldlex.l" + { RTOKEN(BASE); } + YY_BREAK + case 157: + YY_RULE_SETUP +-#line 347 "ldlex.l" ++#line 347 "../../ld/ldlex.l" + { RTOKEN(ALIAS); } + YY_BREAK + case 158: + YY_RULE_SETUP +-#line 348 "ldlex.l" ++#line 348 "../../ld/ldlex.l" + { RTOKEN(TRUNCATE); } + YY_BREAK + case 159: + YY_RULE_SETUP +-#line 349 "ldlex.l" ++#line 349 "../../ld/ldlex.l" + { RTOKEN(LOAD); } + YY_BREAK + case 160: + YY_RULE_SETUP +-#line 350 "ldlex.l" ++#line 350 "../../ld/ldlex.l" + { RTOKEN(PUBLIC); } + YY_BREAK + case 161: + YY_RULE_SETUP +-#line 351 "ldlex.l" ++#line 351 "../../ld/ldlex.l" + { RTOKEN(ORDER); } + YY_BREAK + case 162: + YY_RULE_SETUP +-#line 352 "ldlex.l" ++#line 352 "../../ld/ldlex.l" + { RTOKEN(NAMEWORD); } + YY_BREAK + case 163: + YY_RULE_SETUP +-#line 353 "ldlex.l" ++#line 353 "../../ld/ldlex.l" + { RTOKEN(FORMAT); } + YY_BREAK + case 164: + YY_RULE_SETUP +-#line 354 "ldlex.l" ++#line 354 "../../ld/ldlex.l" + { RTOKEN(CASE); } + YY_BREAK + case 165: + YY_RULE_SETUP +-#line 355 "ldlex.l" ++#line 355 "../../ld/ldlex.l" + { RTOKEN(EXTERN); } + YY_BREAK + case 166: + YY_RULE_SETUP +-#line 356 "ldlex.l" ++#line 356 "../../ld/ldlex.l" + { RTOKEN(START); } + YY_BREAK + case 167: + YY_RULE_SETUP +-#line 357 "ldlex.l" ++#line 357 "../../ld/ldlex.l" + { RTOKEN(LIST); /* LIST and ignore to end of line */ } + YY_BREAK + case 168: + YY_RULE_SETUP +-#line 358 "ldlex.l" ++#line 358 "../../ld/ldlex.l" + { RTOKEN(SECT); } + YY_BREAK + case 169: + YY_RULE_SETUP +-#line 359 "ldlex.l" ++#line 359 "../../ld/ldlex.l" + { RTOKEN(ABSOLUTE); } + YY_BREAK + case 170: + YY_RULE_SETUP +-#line 361 "ldlex.l" ++#line 361 "../../ld/ldlex.l" + { + /* Filename without commas, needed to parse mri stuff */ + yylval.name = xstrdup (yytext); +@@ -2968,7 +2968,7 @@ YY_RULE_SETUP + YY_BREAK + case 171: + YY_RULE_SETUP +-#line 368 "ldlex.l" ++#line 368 "../../ld/ldlex.l" + { + yylval.name = xstrdup (yytext); + return NAME; +@@ -2976,7 +2976,7 @@ YY_RULE_SETUP + YY_BREAK + case 172: + YY_RULE_SETUP +-#line 372 "ldlex.l" ++#line 372 "../../ld/ldlex.l" + { + /* Filename to be prefixed by --sysroot or when non-sysrooted, nothing. */ + yylval.name = xstrdup (yytext); +@@ -2985,7 +2985,7 @@ YY_RULE_SETUP + YY_BREAK + case 173: + YY_RULE_SETUP +-#line 377 "ldlex.l" ++#line 377 "../../ld/ldlex.l" + { + yylval.name = xstrdup (yytext + 2); + return LNAME; +@@ -2993,7 +2993,7 @@ YY_RULE_SETUP + YY_BREAK + case 174: + YY_RULE_SETUP +-#line 381 "ldlex.l" ++#line 381 "../../ld/ldlex.l" + { + yylval.name = xstrdup (yytext); + return NAME; +@@ -3001,7 +3001,7 @@ YY_RULE_SETUP + YY_BREAK + case 175: + YY_RULE_SETUP +-#line 385 "ldlex.l" ++#line 385 "../../ld/ldlex.l" + { + yylval.name = xstrdup (yytext); + return NAME; +@@ -3009,7 +3009,7 @@ YY_RULE_SETUP + YY_BREAK + case 176: + YY_RULE_SETUP +-#line 389 "ldlex.l" ++#line 389 "../../ld/ldlex.l" + { + yylval.name = xstrdup (yytext + 2); + return LNAME; +@@ -3017,7 +3017,7 @@ YY_RULE_SETUP + YY_BREAK + case 177: + YY_RULE_SETUP +-#line 393 "ldlex.l" ++#line 393 "../../ld/ldlex.l" + { + /* Annoyingly, this pattern can match comments, and we have + longest match issues to consider. So if the first two +@@ -3038,7 +3038,7 @@ YY_RULE_SETUP + case 178: + /* rule 178 can match eol */ + YY_RULE_SETUP +-#line 410 "ldlex.l" ++#line 410 "../../ld/ldlex.l" + { + /* No matter the state, quotes + give what's inside. */ +@@ -3056,54 +3056,54 @@ YY_RULE_SETUP + case 179: + /* rule 179 can match eol */ + YY_RULE_SETUP +-#line 423 "ldlex.l" ++#line 423 "../../ld/ldlex.l" + { lineno++;} + YY_BREAK + case 180: + YY_RULE_SETUP +-#line 424 "ldlex.l" ++#line 424 "../../ld/ldlex.l" + { } + YY_BREAK + case 181: + YY_RULE_SETUP +-#line 426 "ldlex.l" ++#line 426 "../../ld/ldlex.l" + { return *yytext; } + YY_BREAK + case 182: + YY_RULE_SETUP +-#line 428 "ldlex.l" ++#line 428 "../../ld/ldlex.l" + { RTOKEN(GLOBAL); } + YY_BREAK + case 183: + YY_RULE_SETUP +-#line 430 "ldlex.l" ++#line 430 "../../ld/ldlex.l" + { RTOKEN(LOCAL); } + YY_BREAK + case 184: + YY_RULE_SETUP +-#line 432 "ldlex.l" ++#line 432 "../../ld/ldlex.l" + { RTOKEN(EXTERN); } + YY_BREAK + case 185: + YY_RULE_SETUP +-#line 434 "ldlex.l" ++#line 434 "../../ld/ldlex.l" + { yylval.name = xstrdup (yytext); + return VERS_IDENTIFIER; } + YY_BREAK + case 186: + YY_RULE_SETUP +-#line 437 "ldlex.l" ++#line 437 "../../ld/ldlex.l" + { yylval.name = xstrdup (yytext); + return VERS_TAG; } + YY_BREAK + case 187: + YY_RULE_SETUP +-#line 440 "ldlex.l" ++#line 440 "../../ld/ldlex.l" + { BEGIN(VERS_SCRIPT); return *yytext; } + YY_BREAK + case 188: + YY_RULE_SETUP +-#line 442 "ldlex.l" ++#line 442 "../../ld/ldlex.l" + { BEGIN(VERS_NODE); + vers_node_nesting = 0; + return *yytext; +@@ -3111,17 +3111,17 @@ YY_RULE_SETUP + YY_BREAK + case 189: + YY_RULE_SETUP +-#line 446 "ldlex.l" ++#line 446 "../../ld/ldlex.l" + { return *yytext; } + YY_BREAK + case 190: + YY_RULE_SETUP +-#line 447 "ldlex.l" ++#line 447 "../../ld/ldlex.l" + { vers_node_nesting++; return *yytext; } + YY_BREAK + case 191: + YY_RULE_SETUP +-#line 448 "ldlex.l" ++#line 448 "../../ld/ldlex.l" + { if (--vers_node_nesting < 0) + BEGIN(VERS_SCRIPT); + return *yytext; +@@ -3130,17 +3130,17 @@ YY_RULE_SETUP + case 192: + /* rule 192 can match eol */ + YY_RULE_SETUP +-#line 453 "ldlex.l" ++#line 453 "../../ld/ldlex.l" + { lineno++; } + YY_BREAK + case 193: + YY_RULE_SETUP +-#line 455 "ldlex.l" ++#line 455 "../../ld/ldlex.l" + { /* Eat up comments */ } + YY_BREAK + case 194: + YY_RULE_SETUP +-#line 457 "ldlex.l" ++#line 457 "../../ld/ldlex.l" + { /* Eat up whitespace */ } + YY_BREAK + case YY_STATE_EOF(INITIAL): +@@ -3152,7 +3152,7 @@ case YY_STATE_EOF(MRI): + case YY_STATE_EOF(VERS_START): + case YY_STATE_EOF(VERS_SCRIPT): + case YY_STATE_EOF(VERS_NODE): +-#line 459 "ldlex.l" ++#line 459 "../../ld/ldlex.l" + { + include_stack_ptr--; + if (include_stack_ptr == 0) +@@ -3171,20 +3171,20 @@ case YY_STATE_EOF(VERS_NODE): + YY_BREAK + case 195: + YY_RULE_SETUP +-#line 475 "ldlex.l" ++#line 475 "../../ld/ldlex.l" + lex_warn_invalid (" in script", yytext); + YY_BREAK + case 196: + YY_RULE_SETUP +-#line 476 "ldlex.l" ++#line 476 "../../ld/ldlex.l" + lex_warn_invalid (" in expression", yytext); + YY_BREAK + case 197: + YY_RULE_SETUP +-#line 478 "ldlex.l" ++#line 478 "../../ld/ldlex.l" + ECHO; + YY_BREAK +-#line 3187 "ldlex.c" ++#line 3187 "../../ld/ldlex.c" + + case YY_END_OF_BUFFER: + { +@@ -4150,7 +4150,7 @@ void yyfree (void * ptr ) + + #define YYTABLES_NAME "yytables" + +-#line 478 "ldlex.l" ++#line 478 "../../ld/ldlex.l" + + + +diff --git a/ld/po/BLD-POTFILES.in b/ld/po/BLD-POTFILES.in +index ba9f4279..d56a9027 100644 +--- a/ld/po/BLD-POTFILES.in ++++ b/ld/po/BLD-POTFILES.in +@@ -111,6 +111,7 @@ eelf32ip2k.c eelf32iq10.c eelf32iq2000.c eelf32l4300.c @@ -9964,7 +13378,7 @@ diff -uNr binutils-2.37.org/ld/po/BLD-POTFILES.in binutils-2.37/ld/po/BLD-POTFIL eelf32lm32.c eelf32lm32fd.c eelf32lmip.c -@@ -181,6 +182,7 @@ +@@ -181,6 +182,7 @@ eelf64briscv_lp64f.c eelf64btsmip.c eelf64btsmip_fbsd.c eelf64hppa.c @@ -9972,148 +13386,260 @@ diff -uNr binutils-2.37.org/ld/po/BLD-POTFILES.in binutils-2.37/ld/po/BLD-POTFIL eelf64lppc.c eelf64lppc_fbsd.c eelf64lriscv.c -diff -uNr binutils-2.37.org/ld/testsuite/ld-elf/shared.exp binutils-2.37/ld/testsuite/ld-elf/shared.exp ---- binutils-2.37.org/ld/testsuite/ld-elf/shared.exp 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-elf/shared.exp 2022-03-24 16:30:09.307113779 +0800 -@@ -502,6 +502,7 @@ - setup_xfail *-*-* - clear_xfail alpha-*-* bfin-*-linux* csky-*-* frv-*-* hppa*-*-* i?86-*-* - clear_xfail ia64-*-* microblaze-*-* powerpc*-*-* x86_64-*-* xtensa-*-* -+clear_xfail loongarch*-*-* - run_ld_link_tests { - {"pr22374 function pointer initialization" - "" "tmpdir/pr22374.so" "" "pr22374a.s" -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/disas-jirl.d binutils-2.37/ld/testsuite/ld-loongarch-elf/disas-jirl.d ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/disas-jirl.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/disas-jirl.d 2022-03-24 16:30:09.307113779 +0800 +diff --git a/ld/testsuite/ld-elf/pr21884.d b/ld/testsuite/ld-elf/pr21884.d +index 3d44ccfe..e289b419 100644 +--- a/ld/testsuite/ld-elf/pr21884.d ++++ b/ld/testsuite/ld-elf/pr21884.d +@@ -3,7 +3,7 @@ + #ld: -T pr21884.t + #objdump: -b binary -s + #xfail: aarch64*-*-* arm*-*-* avr-*-* ia64-*-* m68hc1*-*-* nds32*-*-* +-#xfail: riscv*-*-* score-*-* v850-*-* ++#xfail: riscv*-*-* score-*-* v850-*-* loongarch*-*-* + # Skip targets which can't change output format to binary. + + .*: file format binary +diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp +index d00358e4..8b7069c2 100644 +--- a/ld/testsuite/ld-elf/shared.exp ++++ b/ld/testsuite/ld-elf/shared.exp +@@ -346,6 +346,7 @@ if { [check_gc_sections_available] } { + mips*-*-* { } + tic6x-*-* { } + xtensa-*-* { } ++ loongarch*-*-* { } + default { + run_ld_link_tests [list \ + [list \ +@@ -464,7 +465,7 @@ run_ld_link_tests [list \ + ] + + # These targets don't copy dynamic variables into .bss. +-setup_xfail "alpha-*-*" "bfin-*-*" "ia64-*-*" "xtensa-*-*" ++setup_xfail "alpha-*-*" "bfin-*-*" "ia64-*-*" "xtensa-*-*" "loongarch*-*-*" + # or don't have .data.rel.ro + setup_xfail "hppa*64*-*-hpux*" "tic6x-*-*" + # or complain about relocs in read-only sections +@@ -484,7 +485,7 @@ run_ld_link_tests [list \ + {pr20995c.s} {{readelf {-l --wide} pr20995-2so.r}} "pr20995-2.so"] \ + ] {![check_relro_support]} + +-setup_xfail alpha-*-* xtensa-*-* ++setup_xfail alpha-*-* xtensa-*-* loongarch*-*-* + run_ld_link_tests [list \ + [list \ + "pr20995-2" \ +diff --git a/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.c b/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.c +new file mode 100644 +index 00000000..5c87445b +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.c +@@ -0,0 +1,23 @@ ++/* { dg-do run } */ ++/* { dg-require-ifunc "" } */ ++/* { dg-options "" } */ ++ ++#include ++ ++static int implementation (void) ++{ ++ printf ("'ere I am JH\n"); ++ return 0; ++} ++ ++static __typeof__ (implementation)* resolver (void) ++{ ++ return implementation; ++} ++ ++static int magic (void) __attribute__ ((ifunc ("resolver"))); ++ ++int main () ++{ ++ return magic () != 0; ++} +diff --git a/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out b/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out +new file mode 100644 +index 00000000..2d9cc343 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out +@@ -0,0 +1 @@ ++'ere I am JH +diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d +new file mode 100644 +index 00000000..2f2a41af +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d +@@ -0,0 +1,15 @@ ++#as: ++#objdump: -dr ++#skip: loongarch64-*-* ++ ++.*:[ ]+file format .* ++ ++ ++Disassembly of section .text: ++ ++00000000.* <_start>: ++[ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 ++[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start ++[ ]+4:[ ]+02800294[ ]+addi.w[ ]+\$t8,[ ]+\$t8,[ ]+0 ++[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start ++[ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 +diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl-32.s b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.s +new file mode 100644 +index 00000000..d6027c9c +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.s +@@ -0,0 +1,5 @@ ++ .text ++ .globl _start ++_start: ++ la.local $r20,_start ++ jirl $r1, $r20, 0 +diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl.d b/ld/testsuite/ld-loongarch-elf/disas-jirl.d +new file mode 100644 +index 00000000..595c30c7 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/disas-jirl.d @@ -0,0 +1,14 @@ -+#name: jirl zero-offset symbols -+#source: disas-jirl.s -+#ld: --no-relax -+#objdump: -d ++#as: ++#objdump: -dr + -+.*:[ ]+file format .* ++.*:[ ]+file format .* + + +Disassembly of section .text: + -+0000000120000078 <_start>: -+[ ]+120000078:[ ]+1c000014 [ ]+pcaddu12i[ ]+[ ]+\$t8, 0 -+[ ]+12000007c:[ ]+02c00294 [ ]+addi.d[ ]+[ ]+\$t8, \$t8, 0 -+[ ]+120000080:[ ]+4c000281 [ ]+jirl[ ]+[ ]+\$ra, \$t8, 0 -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/disas-jirl.s binutils-2.37/ld/testsuite/ld-loongarch-elf/disas-jirl.s ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/disas-jirl.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/disas-jirl.s 2022-03-24 16:30:09.307113779 +0800 ++00000000.*: ++[ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 ++[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start ++[ ]+4:[ ]+02c00294[ ]+addi.d[ ]+\$t8,[ ]+\$t8,[ ]+0 ++[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start ++[ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 +diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl.s b/ld/testsuite/ld-loongarch-elf/disas-jirl.s +new file mode 100644 +index 00000000..d6027c9c +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/disas-jirl.s @@ -0,0 +1,5 @@ + .text + .globl _start +_start: + la.local $r20,_start + jirl $r1, $r20, 0 -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/jmp_op.d binutils-2.37/ld/testsuite/ld-loongarch-elf/jmp_op.d ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/jmp_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/jmp_op.d 2022-03-24 16:30:09.308113768 +0800 -@@ -0,0 +1,68 @@ +diff --git a/ld/testsuite/ld-loongarch-elf/ifunc.exp b/ld/testsuite/ld-loongarch-elf/ifunc.exp +new file mode 100644 +index 00000000..2b55002f +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/ifunc.exp +@@ -0,0 +1,34 @@ ++# Expect script for LoongArch assembler tests. ++# Copyright (C) 2021-2022 Free Software Foundation, Inc. ++# ++# This file is part of the GNU Binutils. ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, ++# MA 02110-1301, USA. ++ ++ ++ ++if [istarget loongarch*-*-*] { ++ run_ld_link_exec_tests [list \ ++ [list \ ++ "Run attr-ifunc-4" \ ++ "" \ ++ "" \ ++ {attr-ifunc-4.c} \ ++ "attr-ifunc-4" \ ++ "attr-ifunc-4.out" \ ++ ] \ ++ ] ++} +diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.d b/ld/testsuite/ld-loongarch-elf/jmp_op.d +new file mode 100644 +index 00000000..93452c31 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/jmp_op.d +@@ -0,0 +1,30 @@ +#as: +#objdump: -dr + -+.*:[ ]+file format .* ++.*:[ ]+file format .* + + +Disassembly of section .text: + -+0000000000000000 <.text>: -+[ ]+0:[ ]+03400000 [ ]+andi[ ]+[ ]+\$zero, \$zero, 0x0 -+[ ]+4:[ ]+60000004 [ ]+bgtz[ ]+[ ]+\$a0, 0[ ]+# 0x4 -+[ ]+[ ]+[ ]+4: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+4: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+8:[ ]+64000080 [ ]+bgez[ ]+[ ]+\$a0, 0[ ]+# 0x8 -+[ ]+[ ]+[ ]+8: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+8: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+c:[ ]+64000004 [ ]+blez[ ]+[ ]+\$a0, 0[ ]+# 0xc -+[ ]+[ ]+[ ]+c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+10:[ ]+40000080 [ ]+beqz[ ]+[ ]+\$a0, 0[ ]+# 0x10 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+14:[ ]+44000080 [ ]+bnez[ ]+[ ]+\$a0, 0[ ]+# 0x14 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+18:[ ]+48000000 [ ]+bceqz[ ]+[ ]+\$fcc0, 0[ ]+# 0x18 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+1c:[ ]+48000100 [ ]+bcnez[ ]+[ ]+\$fcc0, 0[ ]+# 0x1c -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\* -+[ ]+20:[ ]+4c000080 [ ]+jirl[ ]+[ ]+\$zero, \$a0, 0 -+[ ]+24:[ ]+50000000 [ ]+b[ ]+[ ]+0[ ]+# 0x24 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\* -+[ ]+28:[ ]+54000000 [ ]+bl[ ]+[ ]+0[ ]+# 0x28 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\* -+[ ]+2c:[ ]+58000085 [ ]+beq[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x2c -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+30:[ ]+5c000085 [ ]+bne[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x30 -+[ ]+[ ]+[ ]+30: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+30: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+34:[ ]+60000085 [ ]+blt[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x34 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+38:[ ]+600000a4 [ ]+blt[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x38 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+3c:[ ]+64000085 [ ]+bge[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x3c -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+40:[ ]+640000a4 [ ]+bge[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x40 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+44:[ ]+68000085 [ ]+bltu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x44 -+[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+44: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+48:[ ]+680000a4 [ ]+bltu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x48 -+[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+48: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+4c:[ ]+6c000085 [ ]+bgeu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x4c -+[ ]+[ ]+[ ]+4c: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+4c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -+[ ]+50:[ ]+6c0000a4 [ ]+bgeu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x50 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_PCREL[ ]+L1 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\* -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/jmp_op.s binutils-2.37/ld/testsuite/ld-loongarch-elf/jmp_op.s ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/jmp_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/jmp_op.s 2022-03-24 16:30:09.308113768 +0800 ++00000000.* <.text>: ++[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero,[ ]+\$zero,[ ]+0x0 ++[ ]+4:[ ]+63fffc04[ ]+bgtz[ ]+\$a0,[ ]+-4\(0x3fffc\)[ ]+#[ ]+0x0 ++[ ]+8:[ ]+67fff880[ ]+bgez[ ]+\$a0,[ ]+-8\(0x3fff8\)[ ]+#[ ]+0x0 ++[ ]+c:[ ]+67fff404[ ]+blez[ ]+\$a0,[ ]+-12\(0x3fff4\)[ ]+#[ ]+0x0 ++[ ]+10:[ ]+43fff09f[ ]+beqz[ ]+\$a0,[ ]+-16\(0x7ffff0\)[ ]+#[ ]+0x0 ++[ ]+14:[ ]+47ffec9f[ ]+bnez[ ]+\$a0,[ ]+-20\(0x7fffec\)[ ]+#[ ]+0x0 ++[ ]+18:[ ]+4bffe81f[ ]+bceqz[ ]+\$fcc0,[ ]+-24\(0x7fffe8\)[ ]+#[ ]+0x0 ++[ ]+1c:[ ]+4bffe51f[ ]+bcnez[ ]+\$fcc0,[ ]+-28\(0x7fffe4\)[ ]+#[ ]+0x0 ++[ ]+20:[ ]+4c000080[ ]+jirl[ ]+\$zero,[ ]+\$a0,[ ]+0 ++[ ]+24:[ ]+53ffdfff[ ]+b[ ]+-36\(0xfffffdc\)[ ]+#[ ]+0x0 ++[ ]+28:[ ]+57ffdbff[ ]+bl[ ]+-40\(0xfffffd8\)[ ]+#[ ]+0x0 ++[ ]+2c:[ ]+5bffd485[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+-44\(0x3ffd4\)[ ]+#[ ]+0x0 ++[ ]+30:[ ]+5fffd085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+-48\(0x3ffd0\)[ ]+#[ ]+0x0 ++[ ]+34:[ ]+63ffcc85[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+-52\(0x3ffcc\)[ ]+#[ ]+0x0 ++[ ]+38:[ ]+63ffc8a4[ ]+blt[ ]+\$a1,[ ]+\$a0,[ ]+-56\(0x3ffc8\)[ ]+#[ ]+0x0 ++[ ]+3c:[ ]+67ffc485[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+-60\(0x3ffc4\)[ ]+#[ ]+0x0 ++[ ]+40:[ ]+67ffc0a4[ ]+bge[ ]+\$a1,[ ]+\$a0,[ ]+-64\(0x3ffc0\)[ ]+#[ ]+0x0 ++[ ]+44:[ ]+6bffbc85[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+-68\(0x3ffbc\)[ ]+#[ ]+0x0 ++[ ]+48:[ ]+6bffb8a4[ ]+bltu[ ]+\$a1,[ ]+\$a0,[ ]+-72\(0x3ffb8\)[ ]+#[ ]+0x0 ++[ ]+4c:[ ]+6fffb485[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+-76\(0x3ffb4\)[ ]+#[ ]+0x0 ++[ ]+50:[ ]+6fffb0a4[ ]+bgeu[ ]+\$a1,[ ]+\$a0,[ ]+-80\(0x3ffb0\)[ ]+#[ ]+0x0 +diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.s b/ld/testsuite/ld-loongarch-elf/jmp_op.s +new file mode 100644 +index 00000000..1deb165a +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/jmp_op.s @@ -0,0 +1,22 @@ +.L1: -+ nop -+ bgtz $r4,L1 -+ bgez $r4,L1 -+ blez $r4,L1 -+ beqz $r4,L1 -+ bnez $r4,L1 -+ bceqz $fcc0,L1 -+ bcnez $fcc0,L1 -+ jr $r4 -+ b L1 -+ bl L1 -+ beq $r4,$r5,L1 -+ bne $r4,$r5,L1 -+ blt $r4,$r5,L1 -+ bgt $r4,$r5,L1 -+ bge $r4,$r5,L1 -+ ble $r4,$r5,L1 -+ bltu $r4,$r5,L1 -+ bgtu $r4,$r5,L1 -+ bgeu $r4,$r5,L1 -+ bleu $r4,$r5,L1 -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp binutils-2.37/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp 2022-03-24 16:30:09.308113768 +0800 -@@ -0,0 +1,34 @@ ++nop ++bgtz $r4,.L1 ++bgez $r4,.L1 ++blez $r4,.L1 ++beqz $r4,.L1 ++bnez $r4,.L1 ++bceqz $fcc0,.L1 ++bcnez $fcc0,.L1 ++jr $r4 ++b .L1 ++bl .L1 ++beq $r4,$r5,.L1 ++bne $r4,$r5,.L1 ++blt $r4,$r5,.L1 ++bgt $r4,$r5,.L1 ++bge $r4,$r5,.L1 ++ble $r4,$r5,.L1 ++bltu $r4,$r5,.L1 ++bgtu $r4,$r5,.L1 ++bgeu $r4,$r5,.L1 ++bleu $r4,$r5,.L1 +diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp +new file mode 100644 +index 00000000..dfa8ee18 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp +@@ -0,0 +1,41 @@ +# Expect script for LoongArch ELF linker tests -+# Copyright (C) 2021 Free Software Foundation, Inc. ++# Copyright (C) 2021-2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# @@ -10140,784 +13666,2369 @@ diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b + return "elf64lloongarch" +} + -+if [istarget "loongarch*-*-*"] { ++if [istarget "loongarch64-*-*"] { + run_dump_test "jmp_op" + run_dump_test "macro_op" + run_dump_test "syscall" + run_dump_test "disas-jirl" +} -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/macro_op.d binutils-2.37/ld/testsuite/ld-loongarch-elf/macro_op.d ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/macro_op.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/macro_op.d 2022-03-24 16:30:09.309113756 +0800 -@@ -0,0 +1,732 @@ ++ ++if [istarget "loongarch32-*-*"] { ++ run_dump_test "jmp_op" ++ run_dump_test "macro_op_32" ++ run_dump_test "syscall" ++ run_dump_test "disas-jirl-32" ++} +diff --git a/ld/testsuite/ld-loongarch-elf/libnopic-global.s b/ld/testsuite/ld-loongarch-elf/libnopic-global.s +new file mode 100644 +index 00000000..39d7dc68 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/libnopic-global.s +@@ -0,0 +1,113 @@ ++ .file "libnopic-global.c" ++ .text ++.Ltext0: ++ .file 1 "libnopic-global.c" ++ .globl g_nopic ++ .data ++ .align 2 ++ .type g_nopic, @object ++ .size g_nopic, 4 ++g_nopic: ++ .word 305419896 ++ .text ++.Letext0: ++ .section .debug_info,"",@progbits ++.Ldebug_info0: ++ .4byte 0x38 ++ .2byte 0x5 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .Ldebug_abbrev0 ++ .uleb128 0x1 ++ .4byte .LASF0 ++ .byte 0x1d ++ .4byte .LASF1 ++ .4byte .LASF2 ++ .4byte .Ldebug_line0 ++ .uleb128 0x2 ++ .4byte .LASF3 ++ .byte 0x1 ++ .byte 0x1 ++ .byte 0x5 ++ .4byte 0x34 ++ .uleb128 0x9 ++ .byte 0x3 ++ .8byte g_nopic ++ .uleb128 0x3 ++ .byte 0x4 ++ .byte 0x5 ++ .ascii "int\000" ++ .byte 0 ++ .section .debug_abbrev,"",@progbits ++.Ldebug_abbrev0: ++ .uleb128 0x1 ++ .uleb128 0x11 ++ .byte 0x1 ++ .uleb128 0x25 ++ .uleb128 0xe ++ .uleb128 0x13 ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x1b ++ .uleb128 0xe ++ .uleb128 0x10 ++ .uleb128 0x17 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x2 ++ .uleb128 0x34 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x2 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0x8 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .section .debug_aranges,"",@progbits ++ .4byte 0x1c ++ .2byte 0x2 ++ .4byte .Ldebug_info0 ++ .byte 0x8 ++ .byte 0 ++ .2byte 0 ++ .2byte 0 ++ .8byte 0 ++ .8byte 0 ++ .section .debug_line,"",@progbits ++.Ldebug_line0: ++ .section .debug_str,"MS",@progbits,1 ++.LASF1: ++ .ascii "libnopic-global.c\000" ++.LASF0: ++ .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" ++ .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" ++ .ascii "O0 -fPIC\000" ++.LASF2: ++ .ascii "/home/liuzhensong/test/ld/nopic/test/global_var\000" ++.LASF3: ++ .ascii "g_nopic\000" ++ .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" ++ .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.d b/ld/testsuite/ld-loongarch-elf/macro_op.d +new file mode 100644 +index 00000000..a1c64fcf +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/macro_op.d +@@ -0,0 +1,164 @@ +#as: +#objdump: -dr + -+.*:[ ]+file format .* ++.*:[ ]+file format .* + + +Disassembly of section .text: + -+0000000000000000 <.text>: -+[ ]+0:[ ]+00150004 [ ]+move[ ]+[ ]+\$a0, \$zero -+[ ]+4:[ ]+02bffc04 [ ]+addi.w[ ]+[ ]+\$a0, \$zero, -1\(0xfff\) -+[ ]+8:[ ]+00150004 [ ]+move[ ]+[ ]+\$a0, \$zero -+[ ]+c:[ ]+02bffc04 [ ]+addi.w[ ]+[ ]+\$a0, \$zero, -1\(0xfff\) -+[ ]+10:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+14:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+18:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+1c:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+20:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+20: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+24:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+28:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+2c:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+30:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+34:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+38:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+3c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+40:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+40: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ 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]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+50: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+54:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+54: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ 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R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+60: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+60: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+60: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+60: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+64:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+64: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+64: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+64: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+64: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+64: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+64: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+68:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+6c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+6c: R_LARCH_SOP_PUSH_PCREL[ ]+L1\+0x800 -+[ ]+[ ]+[ ]+6c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+6c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+6c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+70:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, 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R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+e8: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+e8: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+ec:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+ec: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+ec: R_LARCH_SOP_PUSH_GPREL[ ]+L1 -+[ ]+[ ]+[ ]+ec: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+ec: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+ec: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+ec: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+f0:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+f4:[ ]+14000004 [ ]+lu12i.w[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+f4: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1 -+[ ]+[ ]+[ ]+f4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+f4: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+f4: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+f4: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+f4: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+f8:[ ]+03800084 [ ]+ori[ ]+[ ]+\$a0, \$a0, 0x0 -+[ ]+[ ]+[ ]+f8: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1 -+[ ]+[ ]+[ ]+f8: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+f8: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+f8: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+fc:[ ]+16000004 [ ]+lu32i.d[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1 -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+fc: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+100:[ ]+03000084 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_PUSH_TLS_TPREL[ ]+L1 -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+100: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+104:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+104: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+108:[ ]+28c00084 [ ]+ld.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+108: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+10c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ 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R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+114: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+118:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_TLS_GOT[ ]+L1 -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+118: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+11c:[ ]+380c1484 [ ]+ldx.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+120:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+120: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+120: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+120: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+120: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+120: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+120: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+124:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+124: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+128:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+128: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+128: R_LARCH_SOP_PUSH_PCREL[ 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R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+12c: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+130:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+130: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+134:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+134: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+138:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1 -+[ ]+13c:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x800 -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+13c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+140:[ ]+02c00084 [ ]+addi.d[ ]+[ ]+\$a0, \$a0, 0 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x804 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+140: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+144:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_ -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000000 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+144: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+148:[ ]+03800005 [ ]+ori[ ]+[ ]+\$a1, \$zero, 0x0 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x4 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000004 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x20 -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_SUB[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xfff -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_AND[ ]+\*ABS\* -+[ ]+[ ]+[ ]+148: R_LARCH_SOP_POP_32_U_10_12[ ]+\*ABS\* -+[ ]+14c:[ ]+16000005 [ ]+lu32i.d[ ]+[ ]+\$a1, 0 -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x80000008 -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0xc -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_SL[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x2c -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+14c: R_LARCH_SOP_POP_32_S_5_20[ ]+\*ABS\* -+[ ]+150:[ ]+030000a5 [ ]+lu52i.d[ ]+[ ]+\$a1, \$a1, 0 -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_PCREL[ ]+_GLOBAL_OFFSET_TABLE_\+0x8000000c -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_TLS_GD[ ]+L1 -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_ADD[ ]+\*ABS\* -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_PUSH_ABSOLUTE[ ]+\*ABS\*\+0x34 -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_SR[ ]+\*ABS\* -+[ ]+[ ]+[ ]+150: R_LARCH_SOP_POP_32_S_10_12[ ]+\*ABS\* -+[ ]+154:[ ]+00109484 [ ]+add.d[ ]+[ ]+\$a0, \$a0, \$a1 -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/macro_op.s binutils-2.37/ld/testsuite/ld-loongarch-elf/macro_op.s ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/macro_op.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/macro_op.s 2022-03-24 16:30:09.309113756 +0800 -@@ -0,0 +1,29 @@ ++00000000.* <.text>: ++[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+14:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+1c:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+20:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+24:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+24:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+28:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+28:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+2c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+2c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+30:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+34:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+34:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+38:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+38:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+54:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+60:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+64:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+6c:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+70:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+70:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+74:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+74:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+78:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+78:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+7c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+7c:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+80:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+80:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+84:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+88:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+88:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+8c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+8c:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+90:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+90:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+94:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+94:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+98:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+98:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+9c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+9c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+a0:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+a4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+a4:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* ++[ ]+a4:[ ]+R_LARCH_ABS_HI20[ ]+.text ++[ ]+a8:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+a8:[ ]+R_LARCH_ABS_LO12[ ]+.text ++[ ]+ac:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 ++[ ]+ac:[ ]+R_LARCH_ABS64_LO20[ ]+.text ++[ ]+b0:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+b0:[ ]+R_LARCH_ABS64_HI12[ ]+.text ++[ ]+b4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+b4:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+b8:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+b8:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+bc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+bc:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+c0:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+c0:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+c4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+c4:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+c8:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+c8:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+cc:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+cc:[ ]+R_LARCH_PCALA64_LO20[ ]+.text ++[ ]+d0:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+d0:[ ]+R_LARCH_PCALA64_HI12[ ]+.text ++[ ]+d4:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+d8:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+d8:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+dc:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+dc:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+e0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+e0:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+e4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+e4:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+e8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+e8:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text ++[ ]+ec:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+ec:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text ++[ ]+f0:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+f4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+f4:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 ++[ ]+f8:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+f8:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 ++[ ]+fc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+fc:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+100:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+100:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+104:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+104:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+108:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+108:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+10c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+10c:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 ++[ ]+110:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+110:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 ++[ ]+114:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+118:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+118:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+11c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+11c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+120:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+120:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+124:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+124:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+128:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+128:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 ++[ ]+12c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+12c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 ++[ ]+130:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 ++[ ]+134:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+134:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+138:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+138:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+13c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+13c:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+140:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 ++[ ]+140:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+144:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 ++[ ]+144:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 ++[ ]+148:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 ++[ ]+148:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 ++[ ]+14c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.s b/ld/testsuite/ld-loongarch-elf/macro_op.s +new file mode 100644 +index 00000000..5cf066c3 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/macro_op.s +@@ -0,0 +1,30 @@ +.L1: -+ li.w $r4,0 -+ li.w $r4,0xffffffff -+ li.d $r4,0 -+ li.d $r4,0xffffffffffffffff -+ la $r4,L1 -+ la.global $r4,L1 -+ la.global $r4,$r5,L1 -+ la.global $r4,L1 -+ la.global $r4,$r5,L1 -+ la.global $r4,L1 -+ la.global $r4,$r5,L1 -+ la.local $r4,L1 -+ la.local $r4,$r5,L1 -+ la.local $r4,L1 -+ la.local $r4,$r5,L1 -+ la.abs $r4,L1 -+ la.pcrel $r4,L1 -+ la.pcrel $r4,L1 -+ la.pcrel $r4,$r5,L1 -+ la.got $r4,L1 -+ la.got $r4,$r5,L1 -+ la.tls.le $r4,L1 -+ la.tls.ie $r4,L1 -+ la.tls.ie $r4,$r5,L1 -+ la.tls.ld $r4,L1 -+ la.tls.ld $r4,$r5,L1 -+ la.tls.gd $r4,L1 -+ la.tls.gd $r4,$r5,L1 -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall-0.s binutils-2.37/ld/testsuite/ld-loongarch-elf/syscall-0.s ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall-0.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/syscall-0.s 2022-03-24 16:30:09.309113756 +0800 ++li.w $r4, 0 ++li.w $r4, 0xffffffff ++li.d $r4, 0 ++li.d $r4, 0xffffffffffffffff ++la $r4, .L1 ++la.global $r4, .L1 ++la.global $r4, $r5, .L1 ++la.global $r4, .L1 ++la.global $r4, $r5, .L1 ++la.global $r4, .L1 ++la.global $r4, $r5, .L1 ++la.local $r4, .L1 ++la.local $r4, $r5, .L1 ++la.local $r4, .L1 ++la.local $r4, $r5, .L1 ++la.abs $r4, .L1 ++la.pcrel $r4, .L1 ++la.pcrel $r4, .L1 ++la.pcrel $r4, $r5, .L1 ++la.got $r4, .L1 ++la.got $r4, $r5, .L1 ++ ++la.tls.le $r4, TLS1 ++la.tls.ie $r4, TLS1 ++la.tls.ie $r4, $r5, TLS1 ++la.tls.ld $r4, TLS1 ++la.tls.ld $r4, $r5, TLS1 ++la.tls.gd $r4, TLS1 ++la.tls.gd $r4, $r5, TLS1 +diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.d b/ld/testsuite/ld-loongarch-elf/macro_op_32.d +new file mode 100644 +index 00000000..145d852b +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.d +@@ -0,0 +1,55 @@ ++#as: ++#objdump: -dr ++#skip: loongarch64-*-* ++ ++.*:[ ]+file format .* ++ ++ ++Disassembly of section .text: ++ ++00000000.* <.text>: ++[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero ++[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) ++[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+14:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+1c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+24:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* ++[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.text ++[ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.text ++[ ]+30:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.text ++[ ]+34:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.text ++[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text ++[ ]+3c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text ++[ ]+40:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 ++[ ]+40:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 ++[ ]+44:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 ++[ ]+44:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 ++[ ]+48:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+48:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 ++[ ]+4c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+4c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 ++[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 ++[ ]+54:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 ++[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 ++[ ]+58:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 ++[ ]+5c:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 ++[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.s b/ld/testsuite/ld-loongarch-elf/macro_op_32.s +new file mode 100644 +index 00000000..7f19565e +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.s +@@ -0,0 +1,16 @@ ++.L1: ++ li.w $r4, 0 ++ li.w $r4, 0xffffffff ++ li.w $r4, 0 ++ li.w $r4, 0xffffffff ++ la $r4, .L1 ++ la.global $r4, .L1 ++ la.local $r4, .L1 ++ la.abs $r4, .L1 ++ la.pcrel $r4, .L1 ++ la.got $r4, .L1 ++ ++ la.tls.le $r4, TLS1 ++ la.tls.ie $r4, TLS1 ++ la.tls.ld $r4, TLS1 ++ la.tls.gd $r4, TLS1 +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global-so.rd b/ld/testsuite/ld-loongarch-elf/nopic-global-so.rd +new file mode 100644 +index 00000000..2bcc718a +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-global-so.rd +@@ -0,0 +1,5 @@ ++Relocation section '.rela.dyn'.* ++ +Offset +Info +Type +Sym\. +Value +Sym\. +Name +\+ +Addend ++#... ++[0-9a-f]+ +[0-9a-f]+ +R_LARCH_64 +[0-9a-f]+ +g_nopic +\+ +[0-9] ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global-so.sd b/ld/testsuite/ld-loongarch-elf/nopic-global-so.sd +new file mode 100644 +index 00000000..c0e7a66b +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-global-so.sd +@@ -0,0 +1,10 @@ ++Symbol table '\.dynsym' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]+: +[0-9a-f]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +UND+ +g_nopic ++#... ++Symbol table '\.symtab' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]+: +[0-9a-f]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +UND+ +g_nopic ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.out b/ld/testsuite/ld-loongarch-elf/nopic-global.out +new file mode 100644 +index 00000000..3a179f66 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-global.out +@@ -0,0 +1 @@ ++0x12345678 +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.s b/ld/testsuite/ld-loongarch-elf/nopic-global.s +new file mode 100644 +index 00000000..189fa675 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-global.s +@@ -0,0 +1,373 @@ ++ .file "nopic-global.c" ++ .text ++.Ltext0: ++ .file 1 "nopic-global.c" ++ .section .rodata ++ .align 3 ++.LC0: ++ .ascii "0x%x\012\000" ++ .text ++ .align 2 ++ .globl main ++ .type main, @function ++main: ++.LFB6 = . ++ .loc 1 7 1 ++ .cfi_startproc ++ addi.d $r3,$r3,-16 ++ .cfi_def_cfa_offset 16 ++ st.d $r1,$r3,8 ++ stptr.d $r22,$r3,0 ++ .cfi_offset 1, -8 ++ .cfi_offset 22, -16 ++ addi.d $r22,$r3,16 ++ .cfi_def_cfa 22, 0 ++ .loc 1 8 15 ++ pcalau12i $r12,%got_pc_hi20(g_nopic) ++ ld.d $r12,$r12,%got_pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ .loc 1 8 6 ++ or $r13,$r12,$r0 ++ lu12i.w $r12,305418240>>12 # 0x12345000 ++ ori $r12,$r12,1656 ++ bne $r13,$r12,.L2 ++ .loc 1 9 5 ++ pcalau12i $r12,%got_pc_hi20(g_nopic) ++ ld.d $r12,$r12,%got_pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ or $r5,$r12,$r0 ++ pcalau12i $r12,%pc_hi20(.LC0) ++ addi.d $r4,$r12,%pc_lo12(.LC0) ++ bl %plt(printf) ++ b .L5 ++.L2: ++ .loc 1 11 5 ++ bl %plt(abort) ++.L5: ++ .loc 1 12 10 ++ or $r12,$r0,$r0 ++ .loc 1 13 1 ++ or $r4,$r12,$r0 ++ ld.d $r1,$r3,8 ++ .cfi_restore 1 ++ ldptr.d $r22,$r3,0 ++ .cfi_restore 22 ++ addi.d $r3,$r3,16 ++ .cfi_def_cfa_register 3 ++ jr $r1 ++ .cfi_endproc ++.LFE6: ++ .size main, .-main ++.Letext0: ++ .file 2 "/usr/include/stdlib.h" ++ .file 3 "/usr/include/stdio.h" ++ .section .debug_info,"",@progbits ++.Ldebug_info0: ++ .4byte 0xce ++ .2byte 0x5 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .Ldebug_abbrev0 ++ .uleb128 0x2 ++ .4byte .LASF10 ++ .byte 0x1d ++ .4byte .LASF11 ++ .4byte .LASF12 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .4byte .Ldebug_line0 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF0 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .LASF1 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x7 ++ .4byte .LASF2 ++ .uleb128 0x1 ++ .byte 0x4 ++ .byte 0x7 ++ .4byte .LASF3 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF4 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x5 ++ .4byte .LASF5 ++ .uleb128 0x3 ++ .byte 0x4 ++ .byte 0x5 ++ .ascii "int\000" ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF6 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF7 ++ .uleb128 0x4 ++ .4byte 0x66 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF8 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF9 ++ .uleb128 0x5 ++ .4byte .LASF13 ++ .byte 0x1 ++ .byte 0x4 ++ .byte 0xc ++ .4byte 0x58 ++ .uleb128 0x6 ++ .4byte .LASF14 ++ .byte 0x2 ++ .2byte 0x256 ++ .byte 0xd ++ .uleb128 0x7 ++ .4byte .LASF15 ++ .byte 0x3 ++ .2byte 0x164 ++ .byte 0xc ++ .4byte 0x58 ++ .4byte 0xad ++ .uleb128 0x8 ++ .4byte 0xad ++ .uleb128 0x9 ++ .byte 0 ++ .uleb128 0xa ++ .byte 0x8 ++ .4byte 0x6d ++ .uleb128 0xb ++ .4byte .LASF16 ++ .byte 0x1 ++ .byte 0x6 ++ .byte 0x5 ++ .4byte 0x58 ++ .8byte .LFB6 ++ .8byte .LFE6-.LFB6 ++ .uleb128 0x1 ++ .byte 0x9c ++ .byte 0 ++ .section .debug_abbrev,"",@progbits ++.Ldebug_abbrev0: ++ .uleb128 0x1 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .byte 0 ++ .byte 0 ++ .uleb128 0x2 ++ .uleb128 0x11 ++ .byte 0x1 ++ .uleb128 0x25 ++ .uleb128 0xe ++ .uleb128 0x13 ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x1b ++ .uleb128 0xe ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x10 ++ .uleb128 0x17 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0x8 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x4 ++ .uleb128 0x26 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x5 ++ .uleb128 0x34 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x6 ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x87 ++ .uleb128 0x19 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x7 ++ .uleb128 0x2e ++ .byte 0x1 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .uleb128 0x1 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x8 ++ .uleb128 0x5 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x9 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xa ++ .uleb128 0xf ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x40 ++ .uleb128 0x18 ++ .uleb128 0x7c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .section .debug_aranges,"",@progbits ++ .4byte 0x2c ++ .2byte 0x2 ++ .4byte .Ldebug_info0 ++ .byte 0x8 ++ .byte 0 ++ .2byte 0 ++ .2byte 0 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .8byte 0 ++ .8byte 0 ++ .section .debug_line,"",@progbits ++.Ldebug_line0: ++ .section .debug_str,"MS",@progbits,1 ++.LASF8: ++ .ascii "long long int\000" ++.LASF3: ++ .ascii "unsigned int\000" ++.LASF11: ++ .ascii "nopic-global.c\000" ++.LASF0: ++ .ascii "long unsigned int\000" ++.LASF9: ++ .ascii "long long unsigned int\000" ++.LASF10: ++ .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" ++ .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" ++ .ascii "O0\000" ++.LASF1: ++ .ascii "unsigned char\000" ++.LASF12: ++ .ascii "/home/liuzhensong/test/ld/nopic/test/global_var\000" ++.LASF7: ++ .ascii "char\000" ++.LASF6: ++ .ascii "long int\000" ++.LASF13: ++ .ascii "g_nopic\000" ++.LASF2: ++ .ascii "short unsigned int\000" ++.LASF15: ++ .ascii "printf\000" ++.LASF16: ++ .ascii "main\000" ++.LASF14: ++ .ascii "abort\000" ++.LASF5: ++ .ascii "short int\000" ++.LASF4: ++ .ascii "signed char\000" ++ .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" ++ .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.sd b/ld/testsuite/ld-loongarch-elf/nopic-global.sd +new file mode 100644 +index 00000000..605206a2 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-global.sd +@@ -0,0 +1,5 @@ ++Symbol table '\.symtab' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]: +[0-9]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +[0-9] +g_nopic ++#xpass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.xd b/ld/testsuite/ld-loongarch-elf/nopic-global.xd +new file mode 100644 +index 00000000..d0130663 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-global.xd +@@ -0,0 +1,3 @@ ++Hex dump of section '\.data': ++ +0x[0-9]+ +78563412.* ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.out b/ld/testsuite/ld-loongarch-elf/nopic-local.out +new file mode 100644 +index 00000000..3a179f66 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-local.out +@@ -0,0 +1 @@ ++0x12345678 +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.rd b/ld/testsuite/ld-loongarch-elf/nopic-local.rd +new file mode 100644 +index 00000000..e69de29b +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.s b/ld/testsuite/ld-loongarch-elf/nopic-local.s +new file mode 100644 +index 00000000..4a496f03 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-local.s +@@ -0,0 +1,383 @@ ++ .file "nopic-local.c" ++ .text ++.Ltext0: ++ .file 1 "nopic-local.c" ++ .globl g_nopic ++ .data ++ .align 2 ++ .type g_nopic, @object ++ .size g_nopic, 4 ++g_nopic: ++ .word 305419896 ++ .section .rodata ++ .align 3 ++.LC0: ++ .ascii "0x%x\012\000" ++ .text ++ .align 2 ++ .globl main ++ .type main, @function ++main: ++.LFB6 = . ++ .loc 1 7 1 ++ .cfi_startproc ++ addi.d $r3,$r3,-16 ++ .cfi_def_cfa_offset 16 ++ st.d $r1,$r3,8 ++ stptr.d $r22,$r3,0 ++ .cfi_offset 1, -8 ++ .cfi_offset 22, -16 ++ addi.d $r22,$r3,16 ++ .cfi_def_cfa 22, 0 ++ .loc 1 8 15 ++ pcalau12i $r12,%pc_hi20(g_nopic) ++ addi.d $r12,$r12,%pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ .loc 1 8 6 ++ or $r13,$r12,$r0 ++ lu12i.w $r12,305418240>>12 # 0x12345000 ++ ori $r12,$r12,1656 ++ bne $r13,$r12,.L2 ++ .loc 1 9 5 ++ pcalau12i $r12,%pc_hi20(g_nopic) ++ addi.d $r12,$r12,%pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ or $r5,$r12,$r0 ++ pcalau12i $r12,%pc_hi20(.LC0) ++ addi.d $r4,$r12,%pc_lo12(.LC0) ++ bl %plt(printf) ++ b .L5 ++.L2: ++ .loc 1 11 5 ++ bl %plt(abort) ++.L5: ++ .loc 1 12 10 ++ or $r12,$r0,$r0 ++ .loc 1 13 1 ++ or $r4,$r12,$r0 ++ ld.d $r1,$r3,8 ++ .cfi_restore 1 ++ ldptr.d $r22,$r3,0 ++ .cfi_restore 22 ++ addi.d $r3,$r3,16 ++ .cfi_def_cfa_register 3 ++ jr $r1 ++ .cfi_endproc ++.LFE6: ++ .size main, .-main ++.Letext0: ++ .file 2 "/usr/include/stdlib.h" ++ .file 3 "/usr/include/stdio.h" ++ .section .debug_info,"",@progbits ++.Ldebug_info0: ++ .4byte 0xd8 ++ .2byte 0x5 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .Ldebug_abbrev0 ++ .uleb128 0x2 ++ .4byte .LASF10 ++ .byte 0x1d ++ .4byte .LASF11 ++ .4byte .LASF12 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .4byte .Ldebug_line0 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF0 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .LASF1 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x7 ++ .4byte .LASF2 ++ .uleb128 0x1 ++ .byte 0x4 ++ .byte 0x7 ++ .4byte .LASF3 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF4 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x5 ++ .4byte .LASF5 ++ .uleb128 0x3 ++ .byte 0x4 ++ .byte 0x5 ++ .ascii "int\000" ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF6 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF7 ++ .uleb128 0x4 ++ .4byte 0x66 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF8 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF9 ++ .uleb128 0x5 ++ .4byte .LASF13 ++ .byte 0x1 ++ .byte 0x4 ++ .byte 0x5 ++ .4byte 0x58 ++ .uleb128 0x9 ++ .byte 0x3 ++ .8byte g_nopic ++ .uleb128 0x6 ++ .4byte .LASF14 ++ .byte 0x2 ++ .2byte 0x256 ++ .byte 0xd ++ .uleb128 0x7 ++ .4byte .LASF15 ++ .byte 0x3 ++ .2byte 0x164 ++ .byte 0xc ++ .4byte 0x58 ++ .4byte 0xb7 ++ .uleb128 0x8 ++ .4byte 0xb7 ++ .uleb128 0x9 ++ .byte 0 ++ .uleb128 0xa ++ .byte 0x8 ++ .4byte 0x6d ++ .uleb128 0xb ++ .4byte .LASF16 ++ .byte 0x1 ++ .byte 0x6 ++ .byte 0x5 ++ .4byte 0x58 ++ .8byte .LFB6 ++ .8byte .LFE6-.LFB6 ++ .uleb128 0x1 ++ .byte 0x9c ++ .byte 0 ++ .section .debug_abbrev,"",@progbits ++.Ldebug_abbrev0: ++ .uleb128 0x1 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .byte 0 ++ .byte 0 ++ .uleb128 0x2 ++ .uleb128 0x11 ++ .byte 0x1 ++ .uleb128 0x25 ++ .uleb128 0xe ++ .uleb128 0x13 ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x1b ++ .uleb128 0xe ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x10 ++ .uleb128 0x17 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0x8 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x4 ++ .uleb128 0x26 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x5 ++ .uleb128 0x34 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x2 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x6 ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x87 ++ .uleb128 0x19 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x7 ++ .uleb128 0x2e ++ .byte 0x1 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .uleb128 0x1 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x8 ++ .uleb128 0x5 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x9 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xa ++ .uleb128 0xf ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x40 ++ .uleb128 0x18 ++ .uleb128 0x7c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .section .debug_aranges,"",@progbits ++ .4byte 0x2c ++ .2byte 0x2 ++ .4byte .Ldebug_info0 ++ .byte 0x8 ++ .byte 0 ++ .2byte 0 ++ .2byte 0 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .8byte 0 ++ .8byte 0 ++ .section .debug_line,"",@progbits ++.Ldebug_line0: ++ .section .debug_str,"MS",@progbits,1 ++.LASF8: ++ .ascii "long long int\000" ++.LASF3: ++ .ascii "unsigned int\000" ++.LASF16: ++ .ascii "main\000" ++.LASF0: ++ .ascii "long unsigned int\000" ++.LASF9: ++ .ascii "long long unsigned int\000" ++.LASF11: ++ .ascii "nopic-local.c\000" ++.LASF10: ++ .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" ++ .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" ++ .ascii "O0\000" ++.LASF1: ++ .ascii "unsigned char\000" ++.LASF7: ++ .ascii "char\000" ++.LASF6: ++ .ascii "long int\000" ++.LASF13: ++ .ascii "g_nopic\000" ++.LASF2: ++ .ascii "short unsigned int\000" ++.LASF15: ++ .ascii "printf\000" ++.LASF12: ++ .ascii "/home/liuzhensong/test/ld/nopic/test/local_var\000" ++.LASF14: ++ .ascii "abort\000" ++.LASF5: ++ .ascii "short int\000" ++.LASF4: ++ .ascii "signed char\000" ++ .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" ++ .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.sd b/ld/testsuite/ld-loongarch-elf/nopic-local.sd +new file mode 100644 +index 00000000..2dd16be5 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-local.sd +@@ -0,0 +1,5 @@ ++Symbol table '\.symtab' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]: +[0-9]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +[0-9] +g_nopic ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.xd b/ld/testsuite/ld-loongarch-elf/nopic-local.xd +new file mode 100644 +index 00000000..d0130663 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-local.xd +@@ -0,0 +1,3 @@ ++Hex dump of section '\.data': ++ +0x[0-9]+ +78563412.* ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd +new file mode 100644 +index 00000000..2c32a543 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd +@@ -0,0 +1,5 @@ ++Relocation section '.rela.dyn'.* ++ +Offset +Info +Type +Sym\. +Value +Sym\. +Name +\+ +Addend ++#... ++[0-9a-f]+ +[0-9a-f]+ +R_LARCH_64 +[0-9a-f]+ +g_nopic +\+ +[0-9a-f] ++#... +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd +new file mode 100644 +index 00000000..4745ff78 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd +@@ -0,0 +1,10 @@ ++Symbol table '\.dynsym' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]+: +[0-9]+ +[0-9] +OBJECT +WEAK +DEFAULT +UND +g_nopic ++#... ++Symbol table '\.symtab' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]+: +[0-9]+ +[0-9] +OBJECT +WEAK +DEFAULT +UND +g_nopic ++#... +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.out b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.out +new file mode 100644 +index 00000000..3a179f66 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.out +@@ -0,0 +1 @@ ++0x12345678 +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.s b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.s +new file mode 100644 +index 00000000..298780a3 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.s +@@ -0,0 +1,374 @@ ++ .file "nopic-weak-global.c" ++ .text ++.Ltext0: ++ .file 1 "nopic-weak-global.c" ++ .section .rodata ++ .align 3 ++.LC0: ++ .ascii "0x%x\012\000" ++ .text ++ .align 2 ++ .globl main ++ .type main, @function ++main: ++.LFB6 = . ++ .loc 1 7 1 ++ .cfi_startproc ++ addi.d $r3,$r3,-16 ++ .cfi_def_cfa_offset 16 ++ st.d $r1,$r3,8 ++ stptr.d $r22,$r3,0 ++ .cfi_offset 1, -8 ++ .cfi_offset 22, -16 ++ addi.d $r22,$r3,16 ++ .cfi_def_cfa 22, 0 ++ .loc 1 8 15 ++ pcalau12i $r12,%got_pc_hi20(g_nopic) ++ ld.d $r12,$r12,%got_pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ .loc 1 8 6 ++ or $r13,$r12,$r0 ++ lu12i.w $r12,305418240>>12 # 0x12345000 ++ ori $r12,$r12,1656 ++ bne $r13,$r12,.L2 ++ .loc 1 9 5 ++ pcalau12i $r12,%got_pc_hi20(g_nopic) ++ ld.d $r12,$r12,%got_pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ or $r5,$r12,$r0 ++ pcalau12i $r12,%pc_hi20(.LC0) ++ addi.d $r4,$r12,%pc_lo12(.LC0) ++ bl %plt(printf) ++ b .L5 ++.L2: ++ .loc 1 11 5 ++ bl %plt(abort) ++.L5: ++ .loc 1 12 10 ++ or $r12,$r0,$r0 ++ .loc 1 13 1 ++ or $r4,$r12,$r0 ++ ld.d $r1,$r3,8 ++ .cfi_restore 1 ++ ldptr.d $r22,$r3,0 ++ .cfi_restore 22 ++ addi.d $r3,$r3,16 ++ .cfi_def_cfa_register 3 ++ jr $r1 ++ .cfi_endproc ++.LFE6: ++ .size main, .-main ++ .weak g_nopic ++.Letext0: ++ .file 2 "/usr/include/stdlib.h" ++ .file 3 "/usr/include/stdio.h" ++ .section .debug_info,"",@progbits ++.Ldebug_info0: ++ .4byte 0xce ++ .2byte 0x5 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .Ldebug_abbrev0 ++ .uleb128 0x2 ++ .4byte .LASF10 ++ .byte 0x1d ++ .4byte .LASF11 ++ .4byte .LASF12 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .4byte .Ldebug_line0 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF0 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .LASF1 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x7 ++ .4byte .LASF2 ++ .uleb128 0x1 ++ .byte 0x4 ++ .byte 0x7 ++ .4byte .LASF3 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF4 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x5 ++ .4byte .LASF5 ++ .uleb128 0x3 ++ .byte 0x4 ++ .byte 0x5 ++ .ascii "int\000" ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF6 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF7 ++ .uleb128 0x4 ++ .4byte 0x66 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF8 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF9 ++ .uleb128 0x5 ++ .4byte .LASF13 ++ .byte 0x1 ++ .byte 0x4 ++ .byte 0x22 ++ .4byte 0x58 ++ .uleb128 0x6 ++ .4byte .LASF14 ++ .byte 0x2 ++ .2byte 0x256 ++ .byte 0xd ++ .uleb128 0x7 ++ .4byte .LASF15 ++ .byte 0x3 ++ .2byte 0x164 ++ .byte 0xc ++ .4byte 0x58 ++ .4byte 0xad ++ .uleb128 0x8 ++ .4byte 0xad ++ .uleb128 0x9 ++ .byte 0 ++ .uleb128 0xa ++ .byte 0x8 ++ .4byte 0x6d ++ .uleb128 0xb ++ .4byte .LASF16 ++ .byte 0x1 ++ .byte 0x6 ++ .byte 0x5 ++ .4byte 0x58 ++ .8byte .LFB6 ++ .8byte .LFE6-.LFB6 ++ .uleb128 0x1 ++ .byte 0x9c ++ .byte 0 ++ .section .debug_abbrev,"",@progbits ++.Ldebug_abbrev0: ++ .uleb128 0x1 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .byte 0 ++ .byte 0 ++ .uleb128 0x2 ++ .uleb128 0x11 ++ .byte 0x1 ++ .uleb128 0x25 ++ .uleb128 0xe ++ .uleb128 0x13 ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x1b ++ .uleb128 0xe ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x10 ++ .uleb128 0x17 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0x8 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x4 ++ .uleb128 0x26 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x5 ++ .uleb128 0x34 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x6 ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x87 ++ .uleb128 0x19 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x7 ++ .uleb128 0x2e ++ .byte 0x1 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .uleb128 0x1 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x8 ++ .uleb128 0x5 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x9 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xa ++ .uleb128 0xf ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x40 ++ .uleb128 0x18 ++ .uleb128 0x7c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .section .debug_aranges,"",@progbits ++ .4byte 0x2c ++ .2byte 0x2 ++ .4byte .Ldebug_info0 ++ .byte 0x8 ++ .byte 0 ++ .2byte 0 ++ .2byte 0 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .8byte 0 ++ .8byte 0 ++ .section .debug_line,"",@progbits ++.Ldebug_line0: ++ .section .debug_str,"MS",@progbits,1 ++.LASF8: ++ .ascii "long long int\000" ++.LASF3: ++ .ascii "unsigned int\000" ++.LASF16: ++ .ascii "main\000" ++.LASF0: ++ .ascii "long unsigned int\000" ++.LASF9: ++ .ascii "long long unsigned int\000" ++.LASF10: ++ .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" ++ .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" ++ .ascii "O0\000" ++.LASF1: ++ .ascii "unsigned char\000" ++.LASF12: ++ .ascii "/home/liuzhensong/test/ld/nopic/test/global_var\000" ++.LASF7: ++ .ascii "char\000" ++.LASF6: ++ .ascii "long int\000" ++.LASF13: ++ .ascii "g_nopic\000" ++.LASF2: ++ .ascii "short unsigned int\000" ++.LASF15: ++ .ascii "printf\000" ++.LASF14: ++ .ascii "abort\000" ++.LASF5: ++ .ascii "short int\000" ++.LASF11: ++ .ascii "nopic-weak-global.c\000" ++.LASF4: ++ .ascii "signed char\000" ++ .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" ++ .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd +new file mode 100644 +index 00000000..f4634d20 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd +@@ -0,0 +1,5 @@ ++#xfail: *-*-* ++Symbol table '\.symtab' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]: +[0-9]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +[0-9] +g_nopic +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd +new file mode 100644 +index 00000000..d0130663 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd +@@ -0,0 +1,3 @@ ++Hex dump of section '\.data': ++ +0x[0-9]+ +78563412.* ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.out b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.out +new file mode 100644 +index 00000000..3a179f66 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.out +@@ -0,0 +1 @@ ++0x12345678 +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.rd b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.rd +new file mode 100644 +index 00000000..e69de29b +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.s b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.s +new file mode 100644 +index 00000000..00a4b616 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.s +@@ -0,0 +1,383 @@ ++ .file "nopic-weak-local.c" ++ .text ++.Ltext0: ++ .file 1 "nopic-weak-local.c" ++ .weak g_nopic ++ .data ++ .align 2 ++ .type g_nopic, @object ++ .size g_nopic, 4 ++g_nopic: ++ .word 305419896 ++ .section .rodata ++ .align 3 ++.LC0: ++ .ascii "0x%x\012\000" ++ .text ++ .align 2 ++ .globl main ++ .type main, @function ++main: ++.LFB6 = . ++ .loc 1 7 1 ++ .cfi_startproc ++ addi.d $r3,$r3,-16 ++ .cfi_def_cfa_offset 16 ++ st.d $r1,$r3,8 ++ stptr.d $r22,$r3,0 ++ .cfi_offset 1, -8 ++ .cfi_offset 22, -16 ++ addi.d $r22,$r3,16 ++ .cfi_def_cfa 22, 0 ++ .loc 1 8 15 ++ pcalau12i $r12,%pc_hi20(g_nopic) ++ addi.d $r12,$r12,%pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ .loc 1 8 6 ++ or $r13,$r12,$r0 ++ lu12i.w $r12,305418240>>12 # 0x12345000 ++ ori $r12,$r12,1656 ++ bne $r13,$r12,.L2 ++ .loc 1 9 5 ++ pcalau12i $r12,%pc_hi20(g_nopic) ++ addi.d $r12,$r12,%pc_lo12(g_nopic) ++ ldptr.w $r12,$r12,0 ++ or $r5,$r12,$r0 ++ pcalau12i $r12,%pc_hi20(.LC0) ++ addi.d $r4,$r12,%pc_lo12(.LC0) ++ bl %plt(printf) ++ b .L5 ++.L2: ++ .loc 1 11 5 ++ bl %plt(abort) ++.L5: ++ .loc 1 12 10 ++ or $r12,$r0,$r0 ++ .loc 1 13 1 ++ or $r4,$r12,$r0 ++ ld.d $r1,$r3,8 ++ .cfi_restore 1 ++ ldptr.d $r22,$r3,0 ++ .cfi_restore 22 ++ addi.d $r3,$r3,16 ++ .cfi_def_cfa_register 3 ++ jr $r1 ++ .cfi_endproc ++.LFE6: ++ .size main, .-main ++.Letext0: ++ .file 2 "/usr/include/stdlib.h" ++ .file 3 "/usr/include/stdio.h" ++ .section .debug_info,"",@progbits ++.Ldebug_info0: ++ .4byte 0xd8 ++ .2byte 0x5 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .Ldebug_abbrev0 ++ .uleb128 0x2 ++ .4byte .LASF10 ++ .byte 0x1d ++ .4byte .LASF11 ++ .4byte .LASF12 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .4byte .Ldebug_line0 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF0 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x8 ++ .4byte .LASF1 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x7 ++ .4byte .LASF2 ++ .uleb128 0x1 ++ .byte 0x4 ++ .byte 0x7 ++ .4byte .LASF3 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF4 ++ .uleb128 0x1 ++ .byte 0x2 ++ .byte 0x5 ++ .4byte .LASF5 ++ .uleb128 0x3 ++ .byte 0x4 ++ .byte 0x5 ++ .ascii "int\000" ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF6 ++ .uleb128 0x1 ++ .byte 0x1 ++ .byte 0x6 ++ .4byte .LASF7 ++ .uleb128 0x4 ++ .4byte 0x66 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x5 ++ .4byte .LASF8 ++ .uleb128 0x1 ++ .byte 0x8 ++ .byte 0x7 ++ .4byte .LASF9 ++ .uleb128 0x5 ++ .4byte .LASF13 ++ .byte 0x1 ++ .byte 0x4 ++ .byte 0x1b ++ .4byte 0x58 ++ .uleb128 0x9 ++ .byte 0x3 ++ .8byte g_nopic ++ .uleb128 0x6 ++ .4byte .LASF14 ++ .byte 0x2 ++ .2byte 0x256 ++ .byte 0xd ++ .uleb128 0x7 ++ .4byte .LASF15 ++ .byte 0x3 ++ .2byte 0x164 ++ .byte 0xc ++ .4byte 0x58 ++ .4byte 0xb7 ++ .uleb128 0x8 ++ .4byte 0xb7 ++ .uleb128 0x9 ++ .byte 0 ++ .uleb128 0xa ++ .byte 0x8 ++ .4byte 0x6d ++ .uleb128 0xb ++ .4byte .LASF16 ++ .byte 0x1 ++ .byte 0x6 ++ .byte 0x5 ++ .4byte 0x58 ++ .8byte .LFB6 ++ .8byte .LFE6-.LFB6 ++ .uleb128 0x1 ++ .byte 0x9c ++ .byte 0 ++ .section .debug_abbrev,"",@progbits ++.Ldebug_abbrev0: ++ .uleb128 0x1 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .byte 0 ++ .byte 0 ++ .uleb128 0x2 ++ .uleb128 0x11 ++ .byte 0x1 ++ .uleb128 0x25 ++ .uleb128 0xe ++ .uleb128 0x13 ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x1b ++ .uleb128 0xe ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x10 ++ .uleb128 0x17 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0x24 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x3e ++ .uleb128 0xb ++ .uleb128 0x3 ++ .uleb128 0x8 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x4 ++ .uleb128 0x26 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x5 ++ .uleb128 0x34 ++ .byte 0 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x2 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x6 ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x87 ++ .uleb128 0x19 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x7 ++ .uleb128 0x2e ++ .byte 0x1 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0x5 ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x27 ++ .uleb128 0x19 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x3c ++ .uleb128 0x19 ++ .uleb128 0x1 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x8 ++ .uleb128 0x5 ++ .byte 0 ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0x9 ++ .uleb128 0x18 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xa ++ .uleb128 0xf ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .byte 0 ++ .byte 0 ++ .uleb128 0xb ++ .uleb128 0x2e ++ .byte 0 ++ .uleb128 0x3f ++ .uleb128 0x19 ++ .uleb128 0x3 ++ .uleb128 0xe ++ .uleb128 0x3a ++ .uleb128 0xb ++ .uleb128 0x3b ++ .uleb128 0xb ++ .uleb128 0x39 ++ .uleb128 0xb ++ .uleb128 0x49 ++ .uleb128 0x13 ++ .uleb128 0x11 ++ .uleb128 0x1 ++ .uleb128 0x12 ++ .uleb128 0x7 ++ .uleb128 0x40 ++ .uleb128 0x18 ++ .uleb128 0x7c ++ .uleb128 0x19 ++ .byte 0 ++ .byte 0 ++ .byte 0 ++ .section .debug_aranges,"",@progbits ++ .4byte 0x2c ++ .2byte 0x2 ++ .4byte .Ldebug_info0 ++ .byte 0x8 ++ .byte 0 ++ .2byte 0 ++ .2byte 0 ++ .8byte .Ltext0 ++ .8byte .Letext0-.Ltext0 ++ .8byte 0 ++ .8byte 0 ++ .section .debug_line,"",@progbits ++.Ldebug_line0: ++ .section .debug_str,"MS",@progbits,1 ++.LASF8: ++ .ascii "long long int\000" ++.LASF3: ++ .ascii "unsigned int\000" ++.LASF16: ++ .ascii "main\000" ++.LASF0: ++ .ascii "long unsigned int\000" ++.LASF9: ++ .ascii "long long unsigned int\000" ++.LASF10: ++ .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" ++ .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" ++ .ascii "O0\000" ++.LASF1: ++ .ascii "unsigned char\000" ++.LASF7: ++ .ascii "char\000" ++.LASF6: ++ .ascii "long int\000" ++.LASF11: ++ .ascii "nopic-weak-local.c\000" ++.LASF13: ++ .ascii "g_nopic\000" ++.LASF2: ++ .ascii "short unsigned int\000" ++.LASF15: ++ .ascii "printf\000" ++.LASF12: ++ .ascii "/home/liuzhensong/test/ld/nopic/test/local_var\000" ++.LASF14: ++ .ascii "abort\000" ++.LASF5: ++ .ascii "short int\000" ++.LASF4: ++ .ascii "signed char\000" ++ .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" ++ .section .note.GNU-stack,"",@progbits +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd +new file mode 100644 +index 00000000..b2970676 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd +@@ -0,0 +1,5 @@ ++Symbol table '\.symtab' contains [0-9]+ entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++#... ++ +[0-9]: +[0-9]+ +[0-9] +OBJECT +WEAK +DEFAULT +[0-9] +g_nopic ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd +new file mode 100644 +index 00000000..d0130663 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd +@@ -0,0 +1,3 @@ ++Hex dump of section '\.data': ++ +0x[0-9]+ +78563412.* ++#pass +diff --git a/ld/testsuite/ld-loongarch-elf/pic.exp b/ld/testsuite/ld-loongarch-elf/pic.exp +new file mode 100644 +index 00000000..40a5138a +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/pic.exp +@@ -0,0 +1,202 @@ ++# Expect script for LoongArch ELF linker tests ++# Copyright (C) 2022 Free Software Foundation, Inc. ++# ++# This file is part of the GNU Binutils. ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, ++# MA 02110-1301, USA. ++# ++ ++if ![istarget loongarch*-*-*] { ++ return ++} ++ ++global verbose ++set old_verbose verbose ++# set verbose 3 ++ ++# Check to see if the C compiler works ++if { ![check_compiler_available] } { ++ return ++} ++ ++ ++set testname "nopic link test pre build" ++set pre_builds [list \ ++ [list \ ++ "$testname" \ ++ "-shared $NOSANITIZE_CFLAGS" \ ++ "-fPIC $NOSANITIZE_CFLAGS" \ ++ {libnopic-global.s} \ ++ {} \ ++ "libnopic-global.so" \ ++ ] \ ++] ++ ++# 0:name ++# 1:ld or ar options ++# 2:compile options ++# 3:filenames of source files ++# 4:action and options. ++# 5:name of output file ++# 6:language (optional) ++run_cc_link_tests $pre_builds ++ ++ ++ ++set testname "nopic link test" ++ ++set link_tests [list \ ++ [list \ ++ "$testname readelf -s/-x nopic-local" \ ++ "-T pic.ld" "" \ ++ "" \ ++ { nopic-local.s } \ ++ [list \ ++ [list readelf -s nopic-local.sd] \ ++ [list readelf "-x .data" nopic-local.xd] \ ++ ] \ ++ "nopic-local" \ ++ ] \ ++ [list \ ++ "$testname readelf -s/-x nopic-weak-local" \ ++ "-T pic.ld" "" \ ++ "" \ ++ {nopic-weak-local.s} \ ++ [list \ ++ [list readelf -s nopic-weak-local.sd] \ ++ [list readelf "-x .data" nopic-weak-local.xd] \ ++ ] \ ++ "nopic-weak-local" \ ++ ] \ ++ [list \ ++ "$testname readelf -s/-x nopic-global" \ ++ "-T pic.ld" "" \ ++ "" \ ++ {nopic-global.s libnopic-global.s} \ ++ [list \ ++ [list readelf -s nopic-global.sd] \ ++ [list readelf "-x .data" nopic-global.xd] \ ++ ] \ ++ "nopic-global" \ ++ ] \ ++ [list \ ++ "$testname readelf -s/-r nopic-global-so" \ ++ "-L./tmpdir -lnopic-global -L/usr/lib -lc" "" \ ++ "" \ ++ {nopic-global.s} \ ++ [list \ ++ [list readelf -s nopic-global-so.sd] \ ++ [list readelf -r nopic-global-so.rd] \ ++ ] \ ++ "nopic-global-so" \ ++ ] \ ++ [list \ ++ "$testname readelf -s/-x nopic-weak-global" \ ++ "-T pic.ld" "" \ ++ "" \ ++ {nopic-weak-global.s libnopic-global.s} \ ++ [list \ ++ [list readelf -s nopic-weak-global.sd] \ ++ [list readelf "-x .data" nopic-weak-global.xd] \ ++ ] \ ++ "nopic-weak-global" \ ++ ] \ ++ [list \ ++ "$testname readelf -s/-x nopic-weak-global-so" \ ++ "-L./tmpdir -lnopic-global -L/usr/lib -lc" "" \ ++ "" \ ++ {nopic-weak-global.s} \ ++ [list \ ++ [list readelf -s nopic-weak-global-so.sd] \ ++ [list readelf -r nopic-weak-global-so.rd] \ ++ ] \ ++ "nopic-weak-global-so" \ ++ ] \ ++] ++ ++# 0:name ++# 1:ld/ar leading options, placed before object files ++# 2:ld/ar trailing options, placed after object files ++# 3:assembler options ++# 4:filenames of assembler files ++# 5:list of actions, options and expected outputs. ++# 6:name of output file ++# 7:compiler flags (optional) ++run_ld_link_tests $link_tests ++ ++set testname "nopic link exec test" ++ ++set link_exec_tests [list \ ++ [list \ ++ "$testname" \ ++ "" "" \ ++ { nopic-local.s } \ ++ "nopic-local" \ ++ "nopic-local.out" \ ++ ] \ ++ [list \ ++ "$testname" \ ++ "" "" \ ++ { nopic-weak-local.s } \ ++ "nopic-weak-local" \ ++ "nopic-weak-local.out" \ ++ ] \ ++ [list \ ++ "$testname" \ ++ "" "" \ ++ { nopic-global.s libnopic-global.s } \ ++ "nopic-global" \ ++ "nopic-global.out" \ ++ ] \ ++ [list \ ++ "$testname" \ ++ "-L./tmpdir -lnopic-global -lc -Wl,-rpath=./tmpdir -no-pie" "" \ ++ { nopic-global.s } \ ++ "nopic-global-so" \ ++ "nopic-global.out" \ ++ ] \ ++ [list \ ++ "$testname" \ ++ "" "" \ ++ { nopic-weak-global.s libnopic-global.s } \ ++ "nopic-weak-global" \ ++ "nopic-weak-global.out" \ ++ ] \ ++ [list \ ++ "$testname" \ ++ "-L./tmpdir -lnopic-global -lc -Wl,-rpath=./tmpdir -no-pie" "" \ ++ { nopic-weak-global.s } \ ++ "nopic-weak-global-so" \ ++ "nopic-weak-global.out" \ ++ ] \ ++] ++ ++# ldtests contains test-items with 3 items followed by 1 lists, 2 items ++# and 3 optional items: ++# 0:name ++# 1:ld leading options, placed before object files ++# 2:assembler options ++# 3:filenames of source files ++# 4:name of output file ++# 5:expected output ++# 6:compiler flags (optional) ++# 7:language (optional) ++# 8:linker warning (optional) ++# 9:ld trailing options, placed after object files (optional) ++run_ld_link_exec_tests $link_exec_tests ++ ++ ++#set verbose old_verbose +diff --git a/ld/testsuite/ld-loongarch-elf/pic.ld b/ld/testsuite/ld-loongarch-elf/pic.ld +new file mode 100644 +index 00000000..d57b37f5 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/pic.ld +@@ -0,0 +1,18 @@ ++SECTIONS ++{ ++ .bss : { *(.dynbss) } ++ .got : { *(.got.plt) *(.got) } ++ .dynamic : { *(.dynamic) } ++ .data : { *(.data) } ++ .rela.dyn : { *(.rela.*) } ++ .interp : { *(.interp) } ++ .hash : { *(.hash) } ++ .gnu.hash : { *(.gnu.hash) } ++ .dynsym : { *(.dynsym) } ++ .dynstr : { *(.dynstr) } ++ .debug_foo : { *(.debug_foo) } ++ .shstrtab : { *(.shstrtab) } ++ .symtab : { *(.symtab) } ++ .strtab : { *(.strtab) } ++ /DISCARD/ : { *(*) } ++} +diff --git a/ld/testsuite/ld-loongarch-elf/syscall-0.s b/ld/testsuite/ld-loongarch-elf/syscall-0.s +new file mode 100644 +index 00000000..f31e05f3 +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/syscall-0.s @@ -0,0 +1,9 @@ +.globl _start + @@ -10928,9 +16039,11 @@ diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall-0.s binutils-2 + addi.w $r11,$r0,93 + addi.w $r4,$r0,0 + syscall 0 -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall-1.s binutils-2.37/ld/testsuite/ld-loongarch-elf/syscall-1.s ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall-1.s 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/syscall-1.s 2022-03-24 16:30:09.309113756 +0800 +diff --git a/ld/testsuite/ld-loongarch-elf/syscall-1.s b/ld/testsuite/ld-loongarch-elf/syscall-1.s +new file mode 100644 +index 00000000..e9acee9e +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/syscall-1.s @@ -0,0 +1,20 @@ +.globl cc + @@ -10952,19 +16065,22 @@ diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall-1.s binutils-2 + .align 2 + .globl world + .type world, @function -diff -uNr binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall.d binutils-2.37/ld/testsuite/ld-loongarch-elf/syscall.d ---- binutils-2.37.org/ld/testsuite/ld-loongarch-elf/syscall.d 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-loongarch-elf/syscall.d 2022-03-24 16:30:09.309113756 +0800 +diff --git a/ld/testsuite/ld-loongarch-elf/syscall.d b/ld/testsuite/ld-loongarch-elf/syscall.d +new file mode 100644 +index 00000000..b599277f +--- /dev/null ++++ b/ld/testsuite/ld-loongarch-elf/syscall.d @@ -0,0 +1,5 @@ +#name: syscall +#source: syscall-0.s +#source: syscall-1.s +#objdump: -d +#pass -diff -uNr binutils-2.37.org/ld/testsuite/ld-srec/srec.exp binutils-2.37/ld/testsuite/ld-srec/srec.exp ---- binutils-2.37.org/ld/testsuite/ld-srec/srec.exp 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-srec/srec.exp 2022-03-24 16:30:09.309113756 +0800 -@@ -291,6 +291,12 @@ +diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp +index c8d561b8..efe10ba2 100644 +--- a/ld/testsuite/ld-srec/srec.exp ++++ b/ld/testsuite/ld-srec/srec.exp +@@ -291,6 +291,12 @@ proc run_srec_test { test objs } { setup_xfail "riscv*-*-*" } @@ -10977,9 +16093,10 @@ diff -uNr binutils-2.37.org/ld/testsuite/ld-srec/srec.exp binutils-2.37/ld/tests # V850 targets need libgcc.a if [istarget v850*-*-elf] { set objs "$objs -L ../gcc -lgcc" -diff -uNr binutils-2.37.org/ld/testsuite/ld-unique/pr21529.d binutils-2.37/ld/testsuite/ld-unique/pr21529.d ---- binutils-2.37.org/ld/testsuite/ld-unique/pr21529.d 2021-07-08 19:37:20.000000000 +0800 -+++ binutils-2.37/ld/testsuite/ld-unique/pr21529.d 2022-03-24 16:30:09.309113756 +0800 +diff --git a/ld/testsuite/ld-unique/pr21529.d b/ld/testsuite/ld-unique/pr21529.d +index fb637943..896f8722 100644 +--- a/ld/testsuite/ld-unique/pr21529.d ++++ b/ld/testsuite/ld-unique/pr21529.d @@ -1,6 +1,6 @@ #ld: --oformat binary -T pr21529.ld -e main #objdump: -s -b binary @@ -10988,10 +16105,49 @@ diff -uNr binutils-2.37.org/ld/testsuite/ld-unique/pr21529.d binutils-2.37/ld/te # Skip targets which can't change output format to binary. #pass -diff -uNr binutils-2.37.org/opcodes/configure binutils-2.37/opcodes/configure ---- binutils-2.37.org/opcodes/configure 2022-03-23 16:44:12.373037333 +0800 -+++ binutils-2.37/opcodes/configure 2022-03-24 16:30:09.672109677 +0800 -@@ -12318,6 +12318,7 @@ +diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am +index 0e04b4c0..c45fc295 100644 +--- a/opcodes/Makefile.am ++++ b/opcodes/Makefile.am +@@ -164,6 +164,9 @@ TARGET_LIBOPCODES_CFILES = \ + lm32-ibld.c \ + lm32-opc.c \ + lm32-opinst.c \ ++ loongarch-opc.c \ ++ loongarch-dis.c \ ++ loongarch-coder.c \ + m10200-dis.c \ + m10200-opc.c \ + m10300-dis.c \ +diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in +index 42c15f00..8ba01c9f 100644 +--- a/opcodes/Makefile.in ++++ b/opcodes/Makefile.in +@@ -555,6 +555,9 @@ TARGET_LIBOPCODES_CFILES = \ + lm32-ibld.c \ + lm32-opc.c \ + lm32-opinst.c \ ++ loongarch-opc.c \ ++ loongarch-dis.c \ ++ loongarch-coder.c \ + m10200-dis.c \ + m10200-opc.c \ + m10300-dis.c \ +@@ -973,6 +976,9 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-ibld.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opinst.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-coder.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-dis.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-opc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-dis.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-opc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10300-dis.Plo@am__quote@ +diff --git a/opcodes/configure b/opcodes/configure +index 6ca33dd5..e4e198cd 100755 +--- a/opcodes/configure ++++ b/opcodes/configure +@@ -12318,6 +12318,7 @@ if test x${all_targets} = xfalse ; then bfd_z80_arch) ta="$ta z80-dis.lo" ;; bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; @@ -10999,10 +16155,11 @@ diff -uNr binutils-2.37.org/opcodes/configure binutils-2.37/opcodes/configure "") ;; *) as_fn_error $? "*** unknown target architecture $arch" "$LINENO" 5 ;; -diff -uNr binutils-2.37.org/opcodes/configure.ac binutils-2.37/opcodes/configure.ac ---- binutils-2.37.org/opcodes/configure.ac 2022-03-23 16:44:12.099040397 +0800 -+++ binutils-2.37/opcodes/configure.ac 2022-03-24 16:30:09.397112767 +0800 -@@ -355,6 +355,7 @@ +diff --git a/opcodes/configure.ac b/opcodes/configure.ac +index e564f067..4853b9e3 100644 +--- a/opcodes/configure.ac ++++ b/opcodes/configure.ac +@@ -355,6 +355,7 @@ if test x${all_targets} = xfalse ; then bfd_z80_arch) ta="$ta z80-dis.lo" ;; bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; @@ -11010,9 +16167,10 @@ diff -uNr binutils-2.37.org/opcodes/configure.ac binutils-2.37/opcodes/configure "") ;; *) AC_MSG_ERROR(*** unknown target architecture $arch) ;; -diff -uNr binutils-2.37.org/opcodes/disassemble.c binutils-2.37/opcodes/disassemble.c ---- binutils-2.37.org/opcodes/disassemble.c 2021-07-08 19:37:21.000000000 +0800 -+++ binutils-2.37/opcodes/disassemble.c 2022-03-24 16:30:09.311113734 +0800 +diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c +index 8590e945..61e666c1 100644 +--- a/opcodes/disassemble.c ++++ b/opcodes/disassemble.c @@ -49,6 +49,7 @@ #define ARCH_ip2k #define ARCH_iq2000 @@ -11021,19 +16179,19 @@ diff -uNr binutils-2.37.org/opcodes/disassemble.c binutils-2.37/opcodes/disassem #define ARCH_m32c #define ARCH_m32r #define ARCH_m68hc11 -@@ -552,6 +553,11 @@ +@@ -551,6 +552,11 @@ disassembler (enum bfd_architecture a, + case bfd_arch_tilepro: disassemble = print_insn_tilepro; break; - #endif ++#endif +#ifdef ARCH_loongarch + case bfd_arch_loongarch: + disassemble = print_insn_loongarch; + break; -+#endif + #endif default: return 0; - } -@@ -591,6 +597,9 @@ +@@ -591,6 +597,9 @@ disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) #ifdef ARCH_wasm32 print_wasm32_disassembler_options (stream); #endif @@ -11043,10 +16201,11 @@ diff -uNr binutils-2.37.org/opcodes/disassemble.c binutils-2.37/opcodes/disassem return; } -diff -uNr binutils-2.37.org/opcodes/disassemble.h binutils-2.37/opcodes/disassemble.h ---- binutils-2.37.org/opcodes/disassemble.h 2021-07-08 19:37:21.000000000 +0800 -+++ binutils-2.37/opcodes/disassemble.h 2022-03-24 16:30:09.311113734 +0800 -@@ -100,6 +100,7 @@ +diff --git a/opcodes/disassemble.h b/opcodes/disassemble.h +index 8ee54dc9..4e3ea232 100644 +--- a/opcodes/disassemble.h ++++ b/opcodes/disassemble.h +@@ -100,6 +100,7 @@ extern int print_insn_xtensa (bfd_vma, disassemble_info *); extern int print_insn_z80 (bfd_vma, disassemble_info *); extern int print_insn_z8001 (bfd_vma, disassemble_info *); extern int print_insn_z8002 (bfd_vma, disassemble_info *); @@ -11054,12 +16213,14 @@ diff -uNr binutils-2.37.org/opcodes/disassemble.h binutils-2.37/opcodes/disassem extern disassembler_ftype csky_get_disassembler (bfd *); extern disassembler_ftype rl78_get_disassembler (bfd *); -diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loongarch-coder.c ---- binutils-2.37.org/opcodes/loongarch-coder.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/opcodes/loongarch-coder.c 2022-03-24 16:30:09.312113723 +0800 -@@ -0,0 +1,472 @@ +diff --git a/opcodes/loongarch-coder.c b/opcodes/loongarch-coder.c +new file mode 100644 +index 00000000..f5e10b94 +--- /dev/null ++++ b/opcodes/loongarch-coder.c +@@ -0,0 +1,481 @@ +/* LoongArch opcode support. -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of the GNU opcodes library. @@ -11166,11 +16327,13 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + else if (*bit_field_1 == '+') + ret += atoi (bit_field_1 + 1); + ++ /* Extend signed bit. */ + if (si) + { -+ ret <<= sizeof (ret) * 8 - len; -+ ret >>= sizeof (ret) * 8 - len; ++ uint32_t sign = 1u << (len - 1); ++ ret = (ret ^ sign) - sign; + } ++ + return ret; +} + @@ -11193,7 +16356,8 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + else if (*t == '+') + uimm -= atoi (t + 1); + -+ uimm <<= sizeof (uimm) * 8 - width; ++ uimm = width ? (uimm << (sizeof (uimm) * 8 - width)) : 0; ++ + while (1) + { + b_start = strtol (bit_field_1, &bit_field_1, 10); @@ -11201,10 +16365,10 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + break; + width = strtol (bit_field_1 + 1, &bit_field_1, 10); + i = uimm; -+ i >>= sizeof (i) * 8 - width; -+ i <<= b_start; ++ i = width ? (i >> (sizeof (i) * 8 - width)) : 0; ++ i = (b_start == 32) ? 0 : (i << b_start); + ret |= i; -+ uimm <<= width; ++ uimm = (width == 32) ? 0 : (uimm << width); + + if (*bit_field_1 != '|') + break; @@ -11301,7 +16465,7 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + return -1; + } + -+end: ++ end: + *esc1s = '\0'; + return 0; +} @@ -11368,9 +16532,10 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + if (ok && helper) + { + for (i = 0; arg_strs[i]; i++) -+ ret |= loongarch_encode_imm ( -+ bit_fields[i], -+ helper (esc1s[i], esc2s[i], bit_fields[i], arg_strs[i], context)); ++ ret |= loongarch_encode_imm (bit_fields[i], ++ helper (esc1s[i], esc2s[i], ++ bit_fields[i], arg_strs[i], ++ context)); + ret |= helper ('\0', '\0', NULL, NULL, context); + } + @@ -11434,13 +16599,18 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon +loongarch_expand_macro_with_format_map ( + const char *format, const char *macro, const char *const arg_strs[], + const char *(*map) (char esc1, char esc2, const char *arg), -+ char *(*helper) (const char *const arg_strs[], void *context), void *context) ++ char *(*helper) (const char *const arg_strs[], void *context), void *context, ++ size_t len_str) +{ + char esc1s[MAX_ARG_NUM_PLUS_2 - 1], esc2s[MAX_ARG_NUM_PLUS_2 - 1]; + const char *bit_fields[MAX_ARG_NUM_PLUS_2 - 1]; + const char *src; + char *dest; -+ char buffer[16384]; ++ ++ /* The expanded macro character length does not exceed 1000, and number of ++ label is 6 at most in the expanded macro. The len_str is the length of ++ str. */ ++ char *buffer =(char *) malloc(1024 + 6 * len_str); + + if (format) + loongarch_parse_format (format, esc1s, esc2s, bit_fields); @@ -11478,17 +16648,17 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + *dest++ = *src++; + + *dest = '\0'; -+ return strdup (buffer); ++ return buffer; +} + +char * +loongarch_expand_macro (const char *macro, const char *const arg_strs[], + char *(*helper) (const char *const arg_strs[], + void *context), -+ void *context) ++ void *context, size_t len_str) +{ + return loongarch_expand_macro_with_format_map (NULL, macro, arg_strs, I, -+ helper, context); ++ helper, context, len_str); +} + +size_t @@ -11499,8 +16669,8 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + { + if (imm < 0) + { -+ uint64_t uimm = (uint64_t)imm; -+ uint64_t uimax = 0x1UL<<63; ++ uint64_t uimm = (uint64_t) imm; ++ uint64_t uimax = UINT64_C (1) << 63; + for (ret = 0; (uimm & uimax) != 0; uimm <<= 1, ret++) + ; + ret = 64 - ret + 1; @@ -11530,12 +16700,14 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-coder.c binutils-2.37/opcodes/loon + *dest++ = *src++; + } +} -diff -uNr binutils-2.37.org/opcodes/loongarch-dis.c binutils-2.37/opcodes/loongarch-dis.c ---- binutils-2.37.org/opcodes/loongarch-dis.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/opcodes/loongarch-dis.c 2022-03-24 16:30:09.312113723 +0800 -@@ -0,0 +1,341 @@ +diff --git a/opcodes/loongarch-dis.c b/opcodes/loongarch-dis.c +new file mode 100644 +index 00000000..9dcf989d +--- /dev/null ++++ b/opcodes/loongarch-dis.c +@@ -0,0 +1,342 @@ +/* LoongArch opcode support. -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of the GNU opcodes library. @@ -11605,9 +16777,10 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-dis.c binutils-2.37/opcodes/loonga +static void +set_default_loongarch_dis_options (void) +{ -+ LARCH_opts.ase_lp32 = 1; ++ LARCH_opts.ase_ilp32 = 1; + LARCH_opts.ase_lp64 = 1; -+ LARCH_opts.ase_float = 1; ++ LARCH_opts.ase_sf = 1; ++ LARCH_opts.ase_df = 1; + LARCH_opts.ase_lsx = 1; + LARCH_opts.ase_lasx = 1; + @@ -11832,13 +17005,13 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-dis.c binutils-2.37/opcodes/loonga +void +print_loongarch_disassembler_options (FILE *stream) +{ -+ fprintf (stream, _ ("\n\ ++ fprintf (stream, _("\n\ +The following LoongArch disassembler options are supported for use\n\ +with the -M switch (multiple options should be separated by commas):\n")); + -+ fprintf (stream, _ ("\n\ ++ fprintf (stream, _("\n\ + numeric Print numeric register names, rather than ABI names.\n")); -+ fprintf (stream, _ ("\n")); ++ fprintf (stream, _("\n")); +} + +int @@ -11875,12 +17048,14 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-dis.c binutils-2.37/opcodes/loonga + my_disinfo.target = pc; + disassemble_one (insn, &my_disinfo); +} -diff -uNr binutils-2.37.org/opcodes/loongarch-opc.c binutils-2.37/opcodes/loongarch-opc.c ---- binutils-2.37.org/opcodes/loongarch-opc.c 1970-01-01 08:00:00.000000000 +0800 -+++ binutils-2.37/opcodes/loongarch-opc.c 2022-03-24 16:30:09.312113723 +0800 -@@ -0,0 +1,811 @@ +diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c +new file mode 100644 +index 00000000..be0de61c +--- /dev/null ++++ b/opcodes/loongarch-opc.c +@@ -0,0 +1,870 @@ +/* LoongArch opcode support. -+ Copyright (C) 2021 Free Software Foundation, Inc. ++ Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of the GNU opcodes library. @@ -11901,27 +17076,14 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-opc.c binutils-2.37/opcodes/loonga + +#include +#include "opcode/loongarch.h" ++#include "libiberty.h" + -+struct loongarch_ASEs_option LARCH_opts = -+{ -+ .ase_abi = 0, -+ -+ .ase_lp32 = 0, -+ .ase_lp64 = 0, -+ -+ .ase_float = 0, -+ .ase_lsx = 0, -+ .ase_lasx = 0, -+ -+ .ase_labs = 0, -+ .ase_gpcr = 0, -+ .ase_gabs = 0, -+}; ++struct loongarch_ASEs_option LARCH_opts; + +size_t -+loongarch_insn_length (insn_t insn) ++loongarch_insn_length (insn_t insn ATTRIBUTE_UNUSED) +{ -+ return insn ? 4 : 4; /* Eliminate warning. */ ++ return 4; +} + +const char *const loongarch_r_normal_name[32] = @@ -11997,158 +17159,230 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-opc.c binutils-2.37/opcodes/loonga + "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31", +}; + ++/* Can not use xx_pa for abs. */ ++ ++/* For LoongArch32 abs. */ ++#define INSN_LA_ABS32 \ ++ "lu12i.w %1,%%abs_hi20(%2);" \ ++ "ori %1,%1,%%abs_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_ABS64 \ ++ "lu12i.w %1,%%abs_hi20(%2);" \ ++ "ori %1,%1,%%abs_lo12(%2);" \ ++ "lu32i.d %1,%%abs64_lo20(%2);" \ ++ "lu52i.d %1,%1,%%abs64_hi12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++ ++#define INSN_LA_PCREL32 \ ++ "pcalau12i %1,%%pc_hi20(%2);" \ ++ "addi.w %1,%1,%%pc_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_PCREL64 \ ++ "pcalau12i %1,%%pc_hi20(%2);" \ ++ "addi.d %1,%1,%%pc_lo12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++#define INSN_LA_PCREL64_LARGE \ ++ "pcalau12i %1,%%pc_hi20(%3);" \ ++ "addi.d %2,$r0,%%pc_lo12(%3);" \ ++ "lu32i.d %2,%%pc64_lo20(%3);" \ ++ "lu52i.d %2,%2,%%pc64_hi12(%3);" \ ++ "add.d %1,%1,%2;", \ ++ &LARCH_opts.ase_lp64, 0 ++ ++#define INSN_LA_GOT32 \ ++ "pcalau12i %1,%%got_pc_hi20(%2);" \ ++ "ld.w %1,%1,%%got_pc_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, \ ++ &LARCH_opts.ase_lp64 ++/* got32 abs. */ ++#define INSN_LA_GOT32_ABS \ ++ "lu12i.w %1,%%got_hi20(%2);" \ ++ "ori %1,%1,%%got_lo12(%2);" \ ++ "ld.w %1,%1,0;", \ ++ &LARCH_opts.ase_gabs, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_GOT64 \ ++ "pcalau12i %1,%%got_pc_hi20(%2);" \ ++ "ld.d %1,%1,%%got_pc_lo12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++/* got64 abs. */ ++#define INSN_LA_GOT64_LARGE_ABS \ ++ "lu12i.w %1,%%got_hi20(%2);" \ ++ "ori %1,%1,%%got_lo12(%2);" \ ++ "lu32i.d %1,%%got64_lo20(%2);" \ ++ "lu52i.d %1,%1,%%got64_hi12(%2);" \ ++ "ld.d %1,%1,0", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gpcr ++/* got64 pic. */ ++#define INSN_LA_GOT64_LARGE_PCREL \ ++ "pcalau12i %1,%%got_pc_hi20(%3);" \ ++ "addi.d %2,$r0,%%got_pc_lo12(%3);" \ ++ "lu32i.d %2,%%got64_pc_lo20(%3);" \ ++ "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ ++ "ldx.d %1,%1,%2;", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gabs ++ ++/* For LoongArch32/64 cmode=normal. */ ++#define INSN_LA_TLS_LE \ ++ "lu12i.w %1,%%le_hi20(%2);" \ ++ "ori %1,%1,%%le_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, 0 ++ ++/* For LoongArch64 cmode=large. */ ++#define INSN_LA_TLS_LE64_LARGE \ ++ "lu12i.w %1,%%le_hi20(%2);" \ ++ "ori %1,%1,%%le_lo12(%2);" \ ++ "lu32i.d %1,%%le64_lo20(%2);" \ ++ "lu52i.d %1,%1,%%le64_hi12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++ ++#define INSN_LA_TLS_IE32 \ ++ "pcalau12i %1,%%ie_pc_hi20(%2);" \ ++ "ld.w %1,%1,%%ie_pc_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, \ ++ &LARCH_opts.ase_lp64 ++/* For ie32 abs. */ ++#define INSN_LA_TLS_IE32_ABS \ ++ "lu12i.w %1,%%ie_hi20(%2);" \ ++ "ori %1,%1,%%ie_lo12(%2);" \ ++ "ld.w %1,%1,0", \ ++ &LARCH_opts.ase_gabs, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_TLS_IE64 \ ++ "pcalau12i %1,%%ie_pc_hi20(%2);" \ ++ "ld.d %1,%1,%%ie_pc_lo12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++/* For ie64 pic. */ ++#define INSN_LA_TLS_IE64_LARGE_PCREL \ ++ "pcalau12i %1,%%ie_pc_hi20(%3);" \ ++ "addi.d %2,$r0,%%ie_pc_lo12(%3);" \ ++ "lu32i.d %2,%%ie64_pc_lo20(%3);" \ ++ "lu52i.d %2,%2,%%ie64_pc_hi12(%3);"\ ++ "ldx.d %1,%1,%2;", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gabs ++/* For ie64 abs. */ ++#define INSN_LA_TLS_IE64_LARGE_ABS \ ++ "lu12i.w %1,%%ie_hi20(%2);" \ ++ "ori %1,%1,%%ie_lo12(%2);" \ ++ "lu32i.d %1,%%ie64_lo20(%2);" \ ++ "lu52i.d %1,%1,%%ie64_hi12(%2);" \ ++ "ld.d %1,%1,0", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gpcr ++ ++/* For LoongArch32/64 cmode=normal. */ ++#define INSN_LA_TLS_LD32 \ ++ "pcalau12i %1,%%ld_pc_hi20(%2);" \ ++ "addi.w %1,%1,%%got_pc_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_TLS_LD32_ABS \ ++ "lu12i.w %1,%%ld_hi20(%2);" \ ++ "ori %1,%1,%%got_lo12(%2);", \ ++ &LARCH_opts.ase_gabs, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_TLS_LD64 \ ++ "pcalau12i %1,%%ld_pc_hi20(%2);" \ ++ "addi.d %1,%1,%%got_pc_lo12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++#define INSN_LA_TLS_LD64_LARGE_PCREL \ ++ "pcalau12i %1,%%ld_pc_hi20(%3);" \ ++ "addi.d %2,$r0,%%got_pc_lo12(%3);" \ ++ "lu32i.d %2,%%got64_pc_lo20(%3);" \ ++ "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ ++ "add.d %1,%1,%2;", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gabs ++#define INSN_LA_TLS_LD64_LARGE_ABS \ ++ "lu12i.w %1,%%ld_hi20(%2);" \ ++ "ori %1,%1,%%got_lo12(%2);" \ ++ "lu32i.d %1,%%got64_lo20(%2);" \ ++ "lu52i.d %1,%1,%%got64_hi12(%2);", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gpcr ++ ++#define INSN_LA_TLS_GD32 \ ++ "pcalau12i %1,%%gd_pc_hi20(%2);" \ ++ "addi.w %1,%1,%%got_pc_lo12(%2);", \ ++ &LARCH_opts.ase_ilp32, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_TLS_GD32_ABS \ ++ "lu12i.w %1,%%gd_hi20(%2);" \ ++ "ori %1,%1,%%got_lo12(%2);", \ ++ &LARCH_opts.ase_gabs, \ ++ &LARCH_opts.ase_lp64 ++#define INSN_LA_TLS_GD64 \ ++ "pcalau12i %1,%%gd_pc_hi20(%2);" \ ++ "addi.d %1,%1,%%got_pc_lo12(%2);", \ ++ &LARCH_opts.ase_lp64, 0 ++#define INSN_LA_TLS_GD64_LARGE_PCREL \ ++ "pcalau12i %1,%%gd_pc_hi20(%3);" \ ++ "addi.d %2,$r0,%%got_pc_lo12(%3);" \ ++ "lu32i.d %2,%%got64_pc_lo20(%3);" \ ++ "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ ++ "add.d %1,%1,%2;", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gabs ++#define INSN_LA_TLS_GD64_LARGE_ABS \ ++ "lu12i.w %1,%%gd_hi20(%2);" \ ++ "ori %1,%1,%%got_lo12(%2);" \ ++ "lu32i.d %1,%%got64_lo20(%2);" \ ++ "lu52i.d %1,%1,%%got64_hi12(%2);", \ ++ &LARCH_opts.ase_lp64, \ ++ &LARCH_opts.ase_gpcr ++ ++ +static struct loongarch_opcode loongarch_macro_opcodes[] = +{ -+ /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0, 0, "li.w", "r,sc", "%f", 0, 0, 0}, -+ { 0, 0, "li.d", "r,sc", "%f", 0, 0, 0}, -+ { 0, 0, "la", "r,la", "la.global %1,%2", 0, 0, 0 }, -+ -+ { 0, 0, "la.global", "r,la", "la.pcrel %1,%2", -+ &LARCH_opts.ase_gpcr, 0, 0 }, -+ { 0, 0, "la.global", "r,r,la", "la.pcrel %1,%2,%3", -+ &LARCH_opts.ase_gpcr, 0, 0 }, -+ { 0, 0, "la.global", "r,la", "la.abs %1,%2", -+ &LARCH_opts.ase_gabs, 0, 0 }, -+ { 0, 0, "la.global", "r,r,la", "la.abs %1,%3", -+ &LARCH_opts.ase_gabs, 0, 0 }, -+ { 0, 0, "la.global", "r,l", "la.got %1,%2", 0, 0, 0 }, -+ { 0, 0, "la.global", "r,r,l", "la.got %1,%2,%3", 0, 0, 0 }, -+ -+ { 0, 0, "la.local", "r,la", "la.abs %1,%2", -+ &LARCH_opts.ase_labs, 0, 0 }, -+ { 0, 0, "la.local", "r,r,la", "la.abs %1,%3", -+ &LARCH_opts.ase_labs, 0, 0 }, -+ { 0, 0, "la.local", "r,la", "la.pcrel %1,%2", 0, 0, 0 }, -+ { 0, 0, "la.local", "r,r,la", "la.pcrel %1,%2,%3", 0, 0, 0 }, -+ -+ { 0, 0, "la.abs", "r,la", -+ "lu12i.w %1,%%abs(%2)>>12;" -+ "ori %1,%1,%%abs(%2)&0xfff;", -+ &LARCH_opts.ase_lp32, &LARCH_opts.ase_lp64, 0 }, -+ { 0, 0, "la.abs", "r,la", -+ "lu12i.w %1,%%abs(%2)<<32>>44;" -+ "ori %1,%1,%%abs(%2)&0xfff;" -+ "lu32i.d %1,%%abs(%2)<<12>>44;" -+ "lu52i.d %1,%1,%%abs(%2)>>52;", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ -+ { 0, 0, "la.pcrel", "r,la", -+ "pcaddu12i %1,%%pcrel(%2+0x800)<<32>>44;" -+ "addi.w %1,%1,%%pcrel(%2+4)-(%%pcrel(%2+4+0x800)>>12<<12);", -+ &LARCH_opts.ase_lp32, &LARCH_opts.ase_lp64, 0 }, -+ -+ { 0, 0, "la.pcrel", "r,la", -+ "pcaddu12i %1,%%pcrel(%2+0x800)>>12;" -+ "addi.d %1,%1,%%pcrel(%2+4)-(%%pcrel(%2+4+0x800)>>12<<12);", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ { 0, 0, "la.pcrel", "r,r,la", -+ "pcaddu12i %1,(%%pcrel(%3)-(%%pcrel(%3+0x80000000)>>32<<32))<<32>>44;" -+ "ori %2,$r0,(%%pcrel(%3+4)-(%%pcrel(%3+4+0x80000000)>>32<<32))&0xfff;" -+ "lu32i.d %2,%%pcrel(%3+8+0x80000000)<<12>>44;" -+ "lu52i.d %2,%2,%%pcrel(%3+12+0x80000000)>>52;" -+ "add.d %1,%1,%2;", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ -+ { 0, 0, "la.got", "r,l", -+ "pcaddu12i %1,(%%pcrel(_GLOBAL_OFFSET_TABLE_+0x800)+%%gprel(%2))<<32>>44;" -+ "ld.w " -+ "%1,%1,%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%gprel(%2)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x800)+%%gprel(%2))>>12<<12);", -+ &LARCH_opts.ase_lp32, &LARCH_opts.ase_lp64, 0 }, -+ -+ { 0, 0, "la.got", "r,l", -+ "pcaddu12i %1,(%%pcrel(_GLOBAL_OFFSET_TABLE_+0x800)+%%gprel(%2))>>12;" -+ "ld.d " -+ "%1,%1,%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%gprel(%2)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x800)+%%gprel(%2))>>12<<12);", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ { 0, 0, "la.got", "r,r,l", -+ "pcaddu12i " -+ "%1,(%%pcrel(_GLOBAL_OFFSET_TABLE_)+%%gprel(%3)-((%%pcrel(_GLOBAL_OFFSET_" -+ "TABLE_+0x80000000)+%%gprel(%3))>>32<<32))<<32>>44;" -+ "ori " -+ "%2,$r0,(%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%gprel(%3)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x80000000)+%%gprel(%3))>>32<<32))&0xfff;" -+ "lu32i.d " -+ "%2,(%%pcrel(_GLOBAL_OFFSET_TABLE_+8+0x80000000)+%%gprel(%3))<<12>>44;" -+ "lu52i.d " -+ "%2,%2,(%%pcrel(_GLOBAL_OFFSET_TABLE_+12+0x80000000)+%%gprel(%3))>>52;" -+ "ldx.d %1,%1,%2;", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ -+ { 0, 0, "la.tls.le", "r,la", -+ "lu12i.w %1,%%tprel(%2)>>12;" -+ "ori %1,%1,%%tprel(%2)&0xfff", -+ &LARCH_opts.ase_lp32, &LARCH_opts.ase_lp64, 0 }, -+ /* { 0, 0, "la.tls.le", "r,la", -+ * "lu12i.w %1,%%tprel(%2)>>12;" -+ * "ori %1,%1,%%tprel(%2)&0xfff" -+ * , &LARCH_opts.addrwidth_is_64, 0, 0}, */ -+ { 0, 0, "la.tls.le", "r,la", -+ "lu12i.w %1,%%tprel(%2)<<32>>44;" -+ "ori %1,%1,%%tprel(%2)&0xfff;" -+ "lu32i.d %1,%%tprel(%2)<<12>>44;" -+ "lu52i.d %1,%1,%%tprel(%2)>>52;", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ -+ { 0, 0, "la.tls.ie", "r,l", -+ "pcaddu12i %1,(%%pcrel(_GLOBAL_OFFSET_TABLE_+0x800)+%%tlsgot(%2))<<32>>44;" -+ "ld.w " -+ "%1,%1,%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%tlsgot(%2)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x800)+%%tlsgot(%2))>>12<<12);", -+ &LARCH_opts.ase_lp32, &LARCH_opts.ase_lp64, 0 }, -+ -+ { 0, 0, "la.tls.ie", "r,l", -+ "pcaddu12i %1,(%%pcrel(_GLOBAL_OFFSET_TABLE_+0x800)+%%tlsgot(%2))>>12;" -+ "ld.d " -+ "%1,%1,%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%tlsgot(%2)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x800)+%%tlsgot(%2))>>12<<12);", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ { 0, 0, "la.tls.ie", "r,r,l", -+ "pcaddu12i " -+ "%1,(%%pcrel(_GLOBAL_OFFSET_TABLE_)+%%tlsgot(%3)-((%%pcrel(_GLOBAL_OFFSET_" -+ "TABLE_+0x80000000)+%%tlsgot(%3))>>32<<32))<<32>>44;" -+ "ori " -+ "%2,$r0,(%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%tlsgot(%3)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x80000000)+%%tlsgot(%3))>>32<<32))&0xfff;" -+ "lu32i.d " -+ "%2,(%%pcrel(_GLOBAL_OFFSET_TABLE_+8+0x80000000)+%%tlsgot(%3))<<12>>44;" -+ "lu52i.d " -+ "%2,%2,(%%pcrel(_GLOBAL_OFFSET_TABLE_+12+0x80000000)+%%tlsgot(%3))>>52;" -+ "ldx.d %1,%1,%2;", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ -+ { 0, 0, "la.tls.ld", "r,l", "la.tls.gd %1,%2", 0, 0, 0 }, -+ { 0, 0, "la.tls.ld", "r,r,l", "la.tls.gd %1,%2,%3", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ -+ { 0, 0, "la.tls.gd", "r,l", -+ "pcaddu12i %1,(%%pcrel(_GLOBAL_OFFSET_TABLE_+0x800)+%%tlsgd(%2))<<32>>44;" -+ "addi.w " -+ "%1,%1,%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%tlsgd(%2)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x800)+%%tlsgd(%2))>>12<<12);", -+ &LARCH_opts.ase_lp32, &LARCH_opts.ase_lp64, 0 }, -+ -+ { 0, 0, "la.tls.gd", "r,l", -+ "pcaddu12i %1,(%%pcrel(_GLOBAL_OFFSET_TABLE_+0x800)+%%tlsgd(%2))>>12;" -+ "addi.d " -+ "%1,%1,%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%tlsgd(%2)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x800)+%%tlsgd(%2))>>12<<12);", -+ &LARCH_opts.ase_lp64, 0, 0 }, -+ { 0, 0, "la.tls.gd", "r,r,l", -+ "pcaddu12i " -+ "%1,(%%pcrel(_GLOBAL_OFFSET_TABLE_)+%%tlsgd(%3)-((%%pcrel(_GLOBAL_OFFSET_" -+ "TABLE_+0x80000000)+%%tlsgd(%3))>>32<<32))<<32>>44;" -+ "ori " -+ "%2,$r0,(%%pcrel(_GLOBAL_OFFSET_TABLE_+4)+%%tlsgd(%3)-((%%pcrel(_GLOBAL_" -+ "OFFSET_TABLE_+4+0x80000000)+%%tlsgd(%3))>>32<<32))&0xfff;" -+ "lu32i.d " -+ "%2,(%%pcrel(_GLOBAL_OFFSET_TABLE_+8+0x80000000)+%%tlsgd(%3))<<12>>44;" -+ "lu52i.d " -+ "%2,%2,(%%pcrel(_GLOBAL_OFFSET_TABLE_+12+0x80000000)+%%tlsgd(%3))>>52;" -+ "add.d %1,%1,%2;", -+ &LARCH_opts.ase_lp64, 0, 0 }, ++ /* match, mask, name, format, macro, include, exclude, pinfo. */ ++ { 0, 0, "li.w", "r,sc", "%f", 0, 0, 0 }, ++ { 0, 0, "li.d", "r,sc", "%f", 0, 0, 0 }, ++ ++ { 0, 0, "la", "r,la", "la.global %1,%2", 0, 0, 0 }, ++ { 0, 0, "la.global", "r,la", "la.pcrel %1,%2", &LARCH_opts.ase_gpcr, 0, 0 }, ++ { 0, 0, "la.global", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_gpcr, 0, 0 }, ++ { 0, 0, "la.global", "r,la", "la.abs %1,%2", &LARCH_opts.ase_gabs, 0, 0 }, ++ { 0, 0, "la.global", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_gabs, 0, 0 }, ++ { 0, 0, "la.global", "r,la", "la.got %1,%2", 0, 0, 0 }, ++ { 0, 0, "la.global", "r,r,la", "la.got %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 }, ++ ++ { 0, 0, "la.local", "r,la", "la.abs %1,%2", &LARCH_opts.ase_labs, 0, 0 }, ++ { 0, 0, "la.local", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_labs, 0, 0 }, ++ { 0, 0, "la.local", "r,la", "la.pcrel %1,%2", 0, 0, 0 }, ++ { 0, 0, "la.local", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 }, ++ ++ { 0, 0, "la.abs", "r,la", INSN_LA_ABS32, 0 }, ++ { 0, 0, "la.abs", "r,la", INSN_LA_ABS64, 0 }, ++ { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL32, 0 }, ++ { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL64, 0 }, ++ { 0, 0, "la.pcrel", "r,r,la", INSN_LA_PCREL64_LARGE, 0 }, ++ { 0, 0, "la.got", "r,la", INSN_LA_GOT32, 0 }, ++ { 0, 0, "la.got", "r,la", INSN_LA_GOT32_ABS, 0 }, ++ { 0, 0, "la.got", "r,la", INSN_LA_GOT64, 0 }, ++ { 0, 0, "la.got", "r,la", INSN_LA_GOT64_LARGE_ABS, 0 }, ++ { 0, 0, "la.got", "r,r,la", INSN_LA_GOT64_LARGE_PCREL, 0 }, ++ { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE, 0 }, ++ { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE64_LARGE, 0 }, ++ { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32, 0 }, ++ { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32_ABS, 0 }, ++ { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64, 0 }, ++ { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64_LARGE_ABS, 0 }, ++ { 0, 0, "la.tls.ie", "r,r,l", INSN_LA_TLS_IE64_LARGE_PCREL, 0 }, ++ { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32, 0 }, ++ { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32_ABS, 0 }, ++ { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64, 0 }, ++ { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64_LARGE_ABS, 0 }, ++ { 0, 0, "la.tls.ld", "r,r,l", INSN_LA_TLS_LD64_LARGE_PCREL, 0 }, ++ { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32, 0 }, ++ { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32_ABS, 0 }, ++ { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64, 0 }, ++ { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64_LARGE_ABS, 0 }, ++ { 0, 0, "la.tls.gd", "r,r,l", INSN_LA_TLS_GD64_LARGE_PCREL, 0 }, + + { 0 } /* Terminate the list. */ +}; @@ -12340,7 +17574,7 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-opc.c binutils-2.37/opcodes/loonga + { 0 } /* Terminate the list. */ +}; + -+static struct loongarch_opcode loongarch_lmm_opcodes[] = ++static struct loongarch_opcode loongarch_imm_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x02000000, 0xffc00000, "slti", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, @@ -12622,9 +17856,9 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-opc.c binutils-2.37/opcodes/loonga + +static struct loongarch_opcode loongarch_float_jmp_opcodes[] = +{ -+ { 0x0, 0x0, "bceqz", "c,la", "bceqz %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "bceqz", "c,la", "bceqz %1,%%b21(%2)", 0, 0, 0 }, + { 0x48000000, 0xfc000300, "bceqz", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bcnez", "c,la", "bcnez %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "bcnez", "c,la", "bcnez %1,%%b21(%2)", 0, 0, 0 }, + { 0x48000100, 0xfc000300, "bcnez", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; @@ -12632,104 +17866,69 @@ diff -uNr binutils-2.37.org/opcodes/loongarch-opc.c binutils-2.37/opcodes/loonga +static struct loongarch_opcode loongarch_jmp_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ -+ { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%b16(%2)", 0, 0, 0 }, + { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%b16(%2)", 0, 0, 0 }, + { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%b16(%2)", 0, 0, 0 }, + { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "blez", "r,la", "blez %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "blez", "r,la", "blez %1,%%b16(%2)", 0, 0, 0 }, + { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, + { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%pcrel(%2)", 0, 0, 0 }, ++ { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, + { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "b", "la", "b %%pcrel(%1)", 0, 0, 0 }, ++ { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, + { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bl", "la", "bl %%pcrel(%1)", 0, 0, 0 }, ++ { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, + { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x58000000, 0xfc000000, "beq", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bne", "r,r,la", "bne %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bne", "r,r,la", "bne %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, -+ { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%pcrel(%3)", 0, 0, 0 }, ++ { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +struct loongarch_ase loongarch_ASEs[] = +{ -+ { &LARCH_opts.ase_lp32, loongarch_macro_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lp32, loongarch_lmm_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lp32, loongarch_privilege_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lp32, loongarch_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lp32, loongarch_fix_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_lp32, loongarch_jmp_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_float_jmp_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_single_float_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_4opt_single_float_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_4opt_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_single_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, -+ { &LARCH_opts.ase_float, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_ilp32, loongarch_macro_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_ilp32, loongarch_imm_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_ilp32, loongarch_privilege_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_ilp32, loongarch_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_ilp32, loongarch_fix_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_ilp32, loongarch_jmp_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_sf, loongarch_float_jmp_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_sf, loongarch_single_float_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_df, loongarch_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_sf, loongarch_4opt_single_float_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_df, loongarch_4opt_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_sf, loongarch_single_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, + { 0 }, +}; -diff -uNr binutils-2.37.org/opcodes/Makefile.am binutils-2.37/opcodes/Makefile.am ---- binutils-2.37.org/opcodes/Makefile.am 2022-03-23 16:44:12.023041246 +0800 -+++ binutils-2.37/opcodes/Makefile.am 2022-03-24 16:30:09.322113610 +0800 -@@ -164,6 +164,9 @@ - lm32-ibld.c \ - lm32-opc.c \ - lm32-opinst.c \ -+ loongarch-opc.c \ -+ loongarch-dis.c \ -+ loongarch-coder.c \ - m10200-dis.c \ - m10200-opc.c \ - m10300-dis.c \ -diff -uNr binutils-2.37.org/opcodes/Makefile.in binutils-2.37/opcodes/Makefile.in ---- binutils-2.37.org/opcodes/Makefile.in 2022-03-23 16:44:12.025041224 +0800 -+++ binutils-2.37/opcodes/Makefile.in 2022-03-24 16:30:09.324113588 +0800 -@@ -555,6 +555,9 @@ - lm32-ibld.c \ - lm32-opc.c \ - lm32-opinst.c \ -+ loongarch-opc.c \ -+ loongarch-dis.c \ -+ loongarch-coder.c \ - m10200-dis.c \ - m10200-opc.c \ - m10300-dis.c \ -@@ -973,6 +976,9 @@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-ibld.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opinst.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-coder.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-dis.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-opc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-dis.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-opc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10300-dis.Plo@am__quote@ -diff -uNr binutils-2.37.org/opcodes/po/POTFILES.in binutils-2.37/opcodes/po/POTFILES.in ---- binutils-2.37.org/opcodes/po/POTFILES.in 2021-07-19 00:37:34.000000000 +0800 -+++ binutils-2.37/opcodes/po/POTFILES.in 2022-03-24 16:30:09.312113723 +0800 -@@ -111,6 +111,9 @@ +diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in +index 0659b99b..b1037a47 100644 +--- a/opcodes/po/POTFILES.in ++++ b/opcodes/po/POTFILES.in +@@ -111,6 +111,9 @@ lm32-ibld.c lm32-opc.c lm32-opc.h lm32-opinst.c diff --git a/binutils.spec b/binutils.spec index f21cf46f6eec0824900e925925fa305a4aa9e1da..4d604fc2963b86287b84cd577c8cf5d4b45c664c 100644 --- a/binutils.spec +++ b/binutils.spec @@ -1,7 +1,7 @@ Summary: Binary utilities Name: binutils Version: 2.37 -Release: 9 +Release: 10 License: GPLv3+ URL: https://sourceware.org/binutils @@ -30,9 +30,7 @@ Patch7: backport-0001-CVE-2021-42574.patch Patch8: backport-0002-CVE-2021-42574.patch Patch9: backport-0003-CVE-2021-42574.patch Patch10: bfd-Close-the-file-descriptor-if-there-is-no-archive.patch - -Patch11: binutils-LOONGARCH-support.patch -Patch12: LOONGARCH-Fix-link-binary-fail.patch +Patch11: binutils-LoongArch-support.patch Provides: bundled(libiberty) @@ -373,20 +371,29 @@ fi %{_infodir}/bfd*info* %changelog -* Tue Apr 26 2022 liyanan - 2.37-9 -- fix build error for openEuler:22.03:LTS:LoongArch +* Fri Sep 2 2022 lixing - 2.37-10 +- Type:requirements +- ID:NA +- SUG:NA +- DESC: Add LoongArch support + +* Fri Sep 2 2022 lixing - 2.37-9 +- Type:requirements +- ID:NA +- SUG:NA +- DESC: Revert "Add Loongarch support" -* Tue Apr 19 2022 lixing - 2.37-8 +* Fri Sep 2 2022 lixing - 2.37-8 - Type:requirements - ID:NA - SUG:NA -- DESC:Fix Loongarch link binary fail +- DESC: Revert "Fix Loongarch link binary fail" -* Mon Mar 28 2022 lixing - 2.37-7 +* Fri Sep 2 2022 lixing - 2.37-7 - Type:requirements - ID:NA - SUG:NA -- DESC:Add Loongarch support +- DESC: Revert "fix build error for openEuler:22.03:LTS:LoongArch" * Tue Mar 15 2022 zoulin - 2.37-6 - Type:requirements