diff --git a/Fixup-check-file-for-ifunc-reloc.patch b/Fixup-check-file-for-ifunc-reloc.patch
new file mode 100644
index 0000000000000000000000000000000000000000..fcf851a392147dc7be7cb394a0d60f472a5f755a
--- /dev/null
+++ b/Fixup-check-file-for-ifunc-reloc.patch
@@ -0,0 +1,26 @@
+From 7ba7aee2bc5b2df22fdba26c436e64b1bc9e735a Mon Sep 17 00:00:00 2001
+From: XingLi <lixing@loongson.cn>
+Date: Wed, 26 Jul 2023 15:28:31 +0800
+Subject: [PATCH 3/3] Fixup check file for ifunc reloc
+
+---
+ ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d
+index 29f2d3f3..3723326b 100644
+--- a/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d
++++ b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d
+@@ -5,6 +5,6 @@
+ .*: +file format .*
+ 
+ DYNAMIC RELOCATION RECORDS
+-OFFSET +TYPE +VALUE
+-[[:xdigit:]]+ R_LARCH_IRELATIVE +\*ABS\*\+0x[[:xdigit:]]+
+-[[:xdigit:]]+ R_LARCH_64 +test
++OFFSET +TYPE +VALUE 
++[[:xdigit:]]+ R_LARCH_IRELATIVE  +\*ABS\*\+0x[[:xdigit:]]+
++[[:xdigit:]]+ R_LARCH_64        +test+
+-- 
+2.27.0
+
diff --git a/Fixup-gas-check-illegal-for-b-label.patch b/Fixup-gas-check-illegal-for-b-label.patch
new file mode 100644
index 0000000000000000000000000000000000000000..eabba0b4a26e888525ccf3a4ca56b2511d6bddf7
--- /dev/null
+++ b/Fixup-gas-check-illegal-for-b-label.patch
@@ -0,0 +1,26 @@
+From 70a4a09cc223d761b261859fbf21af578894d776 Mon Sep 17 00:00:00 2001
+From: XingLi <lixing@loongson.cn>
+Date: Sat, 22 Jul 2023 15:49:36 +0800
+Subject: [PATCH 2/3] Fixup gas check illegal for 'b label'
+
+---
+ opcodes/loongarch-opc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
+index be0de61c..e3833007 100644
+--- a/opcodes/loongarch-opc.c
++++ b/opcodes/loongarch-opc.c
+@@ -823,8 +823,8 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] =
+   { 0x0,	0x0,		"bnez",		"r,la",				"bnez %1,%%b21(%2)",		0, 0, 0 },
+   { 0x44000000, 0xfc000000,	"bnez",		"r5:5,sb0:5|10:16<<2",		0,				0, 0, 0 },
+   { 0x0,	0x0,		"jr",		"r",				"jirl $r0,%1,0",		0, 0, 0 },
+-  { 0x50000000, 0xfc000000,	"b",		"sb0:10|10:16<<2",		0,				0, 0, 0 },
+   { 0x0,	0x0,		"b",		"la",				"b %%b26(%1)",			0, 0, 0 },
++  { 0x50000000, 0xfc000000,	"b",		"sb0:10|10:16<<2",		0,				0, 0, 0 },
+   { 0x4c000000, 0xfc000000,	"jirl",		"r0:5,r5:5,s10:16<<2",		0,				0, 0, 0 },
+   { 0x0,	0x0,		"bl",		"la",				"bl %%b26(%1)",			0, 0, 0 },
+   { 0x54000000, 0xfc000000,	"bl",		"sb0:10|10:16<<2",		0,				0, 0, 0 },
+-- 
+2.27.0
+
diff --git a/LoongArch-gas-add-support-using-constant-variable-in.patch b/LoongArch-gas-add-support-using-constant-variable-in.patch
new file mode 100644
index 0000000000000000000000000000000000000000..25c667522f730224a7f3d24150f14392c9c46fff
--- /dev/null
+++ b/LoongArch-gas-add-support-using-constant-variable-in.patch
@@ -0,0 +1,506 @@
+From 31896a5e1105c4d5c1954750c6145fbab040430d Mon Sep 17 00:00:00 2001
+From: tangxiaolin <tangxiaolin@loongson.cn>
+Date: Wed, 17 Aug 2022 15:12:43 +0800
+Subject: [PATCH 1/3] LoongArch: gas: add support using constant variable in
+ instructions.
+
+        Instructions that can load immediate support using constant
+        variable like ".equ var, 123    li.w/d resgister, var".
+
+gas/
+        * config/loongarch-parse.y
+        * config/tc-loongarch.c
+
+        Add four testcases.One is a program using constant variable,
+        one test using label is unsupported, and another two test
+        almost instructions that can load immediate.
+
+gas/
+        * testsuite/gas/loongarch/li.d
+        * testsuite/gas/loongarch/li.s
+        * testsuite/gas/loongarch/imm_ins_label-fail.d
+        * testsuite/gas/loongarch/imm_ins_label-fail.l
+        * testsuite/gas/loongarch/imm_ins_label-fail.s
+        * testsuite/gas/loongarch/imm_ins.d
+        * testsuite/gas/loongarch/imm_ins.s
+        * testsuite/gas/loongarch/imm_ins_32.d
+        * testsuite/gas/loongarch/imm_ins_32.s
+---
+ gas/config/loongarch-parse.y                  | 20 +++++
+ gas/config/tc-loongarch.c                     | 18 ----
+ gas/testsuite/gas/loongarch/imm_ins.d         | 80 ++++++++++++++++++
+ gas/testsuite/gas/loongarch/imm_ins.s         | 83 +++++++++++++++++++
+ gas/testsuite/gas/loongarch/imm_ins_32.d      | 57 +++++++++++++
+ gas/testsuite/gas/loongarch/imm_ins_32.s      | 60 ++++++++++++++
+ .../gas/loongarch/imm_ins_label-fail.d        |  3 +
+ .../gas/loongarch/imm_ins_label-fail.l        |  3 +
+ .../gas/loongarch/imm_ins_label-fail.s        |  3 +
+ gas/testsuite/gas/loongarch/li.d              | 21 +++++
+ gas/testsuite/gas/loongarch/li.s              | 22 +++++
+ 11 files changed, 352 insertions(+), 18 deletions(-)
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins.d
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins.s
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins_32.d
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins_32.s
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins_label-fail.d
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins_label-fail.l
+ create mode 100644 gas/testsuite/gas/loongarch/imm_ins_label-fail.s
+ create mode 100644 gas/testsuite/gas/loongarch/li.d
+ create mode 100644 gas/testsuite/gas/loongarch/li.s
+
+diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y
+index 902d7204..87046877 100644
+--- a/gas/config/loongarch-parse.y
++++ b/gas/config/loongarch-parse.y
+@@ -100,6 +100,25 @@ my_getExpression (expressionS *ep, const char *str)
+   return ret;
+ }
+ 
++static void
++emit_const_var (const char *op)
++{
++  expressionS ep;
++
++  if (end <= top)
++    as_fatal (_("expr too huge"));
++
++  my_getExpression (&ep, op);
++
++  if (ep.X_op != O_constant)
++    as_bad ("illegal operand: %s", op);
++
++  top->value.X_op = O_constant;
++  top->value.X_add_number = ep.X_add_number;
++  top->type = BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE;
++  top++;
++}
++
+ static void
+ reloc (const char *op_c_str, const char *id_c_str, offsetT addend)
+ {
+@@ -318,6 +337,7 @@ offsetT imm;
+ 
+ primary_expression
+ 	: INTEGER {emit_const ($1);}
++	| IDENTIFIER {emit_const_var ($1);}
+ 	| '(' expression ')'
+ 	| '%' IDENTIFIER '(' IDENTIFIER addend ')' {reloc ($2, $4, $5); free ($2); free ($4);}
+ 	| '%' IDENTIFIER '(' INTEGER addend ')' {reloc ($2, NULL, $4 + $5); free ($2);}
+diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
+index 93412b69..1e0d5ab5 100644
+--- a/gas/config/tc-loongarch.c
++++ b/gas/config/tc-loongarch.c
+@@ -582,24 +582,6 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2,
+       if (!ip->match_now)
+ 	break;
+ 
+-      if (esc_ch1 == 's')
+-	switch (esc_ch2)
+-	  {
+-	  case 'c':
+-	    ip->match_now = reloc_num == 0;
+-	    break;
+-	  }
+-      else
+-	switch (esc_ch2)
+-	  {
+-	  case 'c':
+-	    ip->match_now = reloc_num == 0 && 0 <= imm;
+-	    break;
+-	  }
+-
+-      if (!ip->match_now)
+-	break;
+-
+       ret = imm;
+       if (reloc_num)
+ 	{
+diff --git a/gas/testsuite/gas/loongarch/imm_ins.d b/gas/testsuite/gas/loongarch/imm_ins.d
+new file mode 100644
+index 00000000..0ceaead3
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins.d
+@@ -0,0 +1,80 @@
++#as:
++#objdump: -dr
++#skip: loongarch32-*-*
++
++.*:[    ]+file format .*
++
++
++Disassembly of section .text:
++
++00000000.* <.text>:
++[ 	]+0:[ 	]+03848c0c[ 	]+ori[ 	]+\$t0,[ 	]+\$zero,[ 	]+0x123
++[ 	]+4:[ 	]+15ffe00d[ 	]+lu12i.w[ 	]+\$t1,[ 	]+-256\(0xfff00\)
++[ 	]+8:[ 	]+16001fed[ 	]+lu32i.d[ 	]+\$t1,[ 	]+255\(0xff\)
++[ 	]+c:[ 	]+02bffc0e[ 	]+addi.w[ 	]+\$t2,[ 	]+\$zero,[ 	]+-1\(0xfff\)
++[ 	]+10:[ 	]+1601ffee[ 	]+lu32i.d[ 	]+\$t2,[ 	]+4095\(0xfff\)
++[ 	]+14:[ 	]+0004b58b[ 	]+alsl.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+18:[ 	]+0006b58b[ 	]+alsl.wu[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+1c:[ 	]+0009358b[ 	]+bytepick.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+20:[ 	]+000d358b[ 	]+bytepick.d[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+24:[ 	]+002a0002[ 	]+break[ 	]+0x2
++[ 	]+28:[ 	]+002a8002[ 	]+dbcl[ 	]+0x2
++[ 	]+2c:[ 	]+002b0002[ 	]+syscall[ 	]+0x2
++[ 	]+30:[ 	]+002cb58b[ 	]+alsl.d[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+34:[ 	]+0040898b[ 	]+slli.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+0x2
++[ 	]+38:[ 	]+0041098b[ 	]+slli.d[ 	]+\$a7,[ 	]+\$t0,[ 	]+0x2
++[ 	]+3c:[ 	]+0044898b[ 	]+srli.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+0x2
++[ 	]+40:[ 	]+004509ac[ 	]+srli.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+44:[ 	]+004889ac[ 	]+srai.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+48:[ 	]+004909ac[ 	]+srai.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+4c:[ 	]+006209ac[ 	]+bstrins.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2,[ 	]+0x2
++[ 	]+50:[ 	]+008209ac[ 	]+bstrins.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2,[ 	]+0x2
++[ 	]+54:[ 	]+00c209ac[ 	]+bstrpick.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2,[ 	]+0x2
++[ 	]+58:[ 	]+00c209ac[ 	]+bstrpick.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2,[ 	]+0x2
++[ 	]+5c:[ 	]+02048dac[ 	]+slti[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+60:[ 	]+02448dac[ 	]+sltui[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+64:[ 	]+02848dac[ 	]+addi.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+68:[ 	]+02c48dac[ 	]+addi.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+6c:[ 	]+03048dac[ 	]+lu52i.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+70:[ 	]+034009ac[ 	]+andi[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+74:[ 	]+038009ac[ 	]+ori[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+78:[ 	]+03c009ac[ 	]+xori[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+7c:[ 	]+100009ac[ 	]+addu16i.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+2\(0x2\)
++[ 	]+80:[ 	]+1400246c[ 	]+lu12i.w[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+84:[ 	]+1600246c[ 	]+lu32i.d[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+88:[ 	]+1800246c[ 	]+pcaddi[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+8c:[ 	]+1a00246c[ 	]+pcalau12i[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+90:[ 	]+1c00246c[ 	]+pcaddu12i[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+94:[ 	]+1e00246c[ 	]+pcaddu18i[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+98:[ 	]+04048c0c[ 	]+csrrd[ 	]+\$t0,[ 	]+0x123
++[ 	]+9c:[ 	]+04048c2c[ 	]+csrwr[ 	]+\$t0,[ 	]+0x123
++[ 	]+a0:[ 	]+040009ac[ 	]+csrxchg[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+a4:[ 	]+060009a2[ 	]+cacop[ 	]+0x2,[ 	]+\$t1,[ 	]+2\(0x2\)
++[ 	]+a8:[ 	]+064009ac[ 	]+lddir[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+ac:[ 	]+06440980[ 	]+ldpte[ 	]+\$t0,[ 	]+0x2
++[ 	]+b0:[ 	]+0649b9a2[ 	]+invtlb[ 	]+0x2,[ 	]+\$t1,[ 	]+\$t2
++[ 	]+b4:[ 	]+200101ac[ 	]+ll.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+b8:[ 	]+210101ac[ 	]+sc.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+bc:[ 	]+220101ac[ 	]+ll.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+c0:[ 	]+230101ac[ 	]+sc.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+c4:[ 	]+240101ac[ 	]+ldptr.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+c8:[ 	]+250101ac[ 	]+stptr.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+cc:[ 	]+260101ac[ 	]+ldptr.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+d0:[ 	]+270101ac[ 	]+stptr.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+d4:[ 	]+280401ac[ 	]+ld.b[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+d8:[ 	]+284401ac[ 	]+ld.h[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+dc:[ 	]+288401ac[ 	]+ld.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+e0:[ 	]+28c401ac[ 	]+ld.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+e4:[ 	]+290401ac[ 	]+st.b[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+e8:[ 	]+294401ac[ 	]+st.h[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+ec:[ 	]+298401ac[ 	]+st.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+f0:[ 	]+29c401ac[ 	]+st.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+f4:[ 	]+2a0401ac[ 	]+ld.bu[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+f8:[ 	]+2a4401ac[ 	]+ld.hu[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+fc:[ 	]+2a8401ac[ 	]+ld.wu[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+100:[ 	]+2ac401a2[ 	]+preld[ 	]+0x2,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+104:[ 	]+382c39a2[ 	]+preldx[ 	]+0x2,[ 	]+\$t1,[ 	]+\$t2
++[ 	]+108:[ 	]+2b048d8a[ 	]+fld.s[ 	]+\$ft2,[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+10c:[ 	]+2b448d8a[ 	]+fst.s[ 	]+\$ft2,[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+110:[ 	]+2b848d8a[ 	]+fld.d[ 	]+\$ft2,[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+114:[ 	]+2bc48d8a[ 	]+fst.d[ 	]+\$ft2,[ 	]+\$t0,[ 	]+291\(0x123\)
+diff --git a/gas/testsuite/gas/loongarch/imm_ins.s b/gas/testsuite/gas/loongarch/imm_ins.s
+new file mode 100644
+index 00000000..f6a4e745
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins.s
+@@ -0,0 +1,83 @@
++.equ a, 0x123
++.equ b, 0xfffff00000
++.equ c, 0xfffffffffff
++.equ d, 2
++.equ e,0x100
++
++li.w $r12, a
++li.d $r13, b
++li.d $r14, c
++
++alsl.w $r11,$r12,$r13,d
++alsl.wu $r11,$r12,$r13,d
++bytepick.w $r11,$r12,$r13,d
++bytepick.d $r11,$r12,$r13,d
++
++break d
++dbcl d
++syscall d
++
++alsl.d $r11,$r12, $r13,d
++slli.w $r11,$r12,d
++slli.d $r11,$r12,d
++srli.w $r11,$r12,d
++srli.d $r12,$r13,d
++srai.w $r12,$r13,d
++srai.d $r12,$r13,d
++
++bstrins.w $r12,$r13,d,d
++bstrins.d $r12,$r13,d,d
++bstrpick.d $r12,$r13,d,d
++bstrpick.d $r12,$r13,d,d
++
++slti $r12,$r13,a
++sltui $r12,$r13,a
++addi.w $r12,$r13,a
++addi.d $r12,$r13,a
++lu52i.d $r12,$r13,a
++andi $r12,$r13,d
++ori  $r12,$r13,d
++xori $r12,$r13,d
++addu16i.d $r12,$r13,d
++lu12i.w $r12,a
++lu32i.d $r12,a
++pcaddi $r12,a
++pcalau12i $r12,a
++pcaddu12i $r12,a
++pcaddu18i $r12,a
++
++csrrd $r12,a
++csrwr $r12,a
++csrxchg $r12,$r13,d
++cacop d,$r13,d
++lddir $r12,$r13,d
++ldpte $r12,d
++
++invtlb d,$r13,$r14
++
++ll.w $r12,$r13,e
++sc.w $r12,$r13,e
++ll.d $r12,$r13,e
++sc.d $r12,$r13,e
++ldptr.w $r12,$r13,e
++stptr.w $r12,$r13,e
++ldptr.d $r12,$r13,e
++stptr.d $r12,$r13,e
++ld.b $r12,$r13,e
++ld.h $r12,$r13,e
++ld.w $r12,$r13,e
++ld.d $r12,$r13,e
++st.b $r12,$r13,e
++st.h $r12,$r13,e
++st.w $r12,$r13,e
++st.d $r12,$r13,e
++ld.bu $r12,$r13,e
++ld.hu $r12,$r13,e
++ld.wu $r12,$r13,e
++preld d,$r13,e
++preldx d,$r13,$r14
++
++fld.s $f10,$r12,a
++fst.s $f10,$r12,a
++fld.d $f10,$r12,a
++fst.d $f10,$r12,a
+diff --git a/gas/testsuite/gas/loongarch/imm_ins_32.d b/gas/testsuite/gas/loongarch/imm_ins_32.d
+new file mode 100644
+index 00000000..0a826bfb
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins_32.d
+@@ -0,0 +1,57 @@
++#as:
++#objdump: -dr
++#skip: loongarch64-*-*
++
++.*:[    ]+file format .*
++
++
++Disassembly of section .text:
++
++00000000.* <.text>:
++[ 	]+0:[ 	]+03848c0c[ 	]+ori[ 	]+\$t0,[ 	]+\$zero,[ 	]+0x123
++[ 	]+4:[ 	]+0004b58b[ 	]+alsl.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+8:[ 	]+0006b58b[ 	]+alsl.wu[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+c:[ 	]+0009358b[ 	]+bytepick.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+10:[ 	]+002a0002[ 	]+break[ 	]+0x2
++[ 	]+14:[ 	]+002a8002[ 	]+dbcl[ 	]+0x2
++[ 	]+18:[ 	]+002b0002[ 	]+syscall[ 	]+0x2
++[ 	]+1c:[ 	]+0040898b[ 	]+slli.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+0x2
++[ 	]+20:[ 	]+0044898b[ 	]+srli.w[ 	]+\$a7,[ 	]+\$t0,[ 	]+0x2
++[ 	]+24:[ 	]+004889ac[ 	]+srai.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+28:[ 	]+006209ac[ 	]+bstrins.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2,[ 	]+0x2
++[ 	]+2c:[ 	]+02048dac[ 	]+slti[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+30:[ 	]+02448dac[ 	]+sltui[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+34:[ 	]+02848dac[ 	]+addi.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+291\(0x123\)
++[ 	]+38:[ 	]+034009ac[ 	]+andi[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+3c:[ 	]+038009ac[ 	]+ori[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+40:[ 	]+03c009ac[ 	]+xori[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+44:[ 	]+1400246c[ 	]+lu12i.w[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+48:[ 	]+1800246c[ 	]+pcaddi[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+4c:[ 	]+1a00246c[ 	]+pcalau12i[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+50:[ 	]+1c00246c[ 	]+pcaddu12i[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+54:[ 	]+1e00246c[ 	]+pcaddu18i[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+58:[ 	]+04048c0c[ 	]+csrrd[ 	]+\$t0,[ 	]+0x123
++[ 	]+5c:[ 	]+04048c2c[ 	]+csrwr[ 	]+\$t0,[ 	]+0x123
++[ 	]+60:[ 	]+040009ac[ 	]+csrxchg[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+64:[ 	]+060009a2[ 	]+cacop[ 	]+0x2,[ 	]+\$t1,[ 	]+2\(0x2\)
++[ 	]+68:[ 	]+064009ac[ 	]+lddir[ 	]+\$t0,[ 	]+\$t1,[ 	]+0x2
++[ 	]+6c:[ 	]+06440980[ 	]+ldpte[ 	]+\$t0,[ 	]+0x2
++[ 	]+70:[ 	]+0649b9a2[ 	]+invtlb[ 	]+0x2,[ 	]+\$t1,[ 	]+\$t2
++[ 	]+74:[ 	]+200101ac[ 	]+ll.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+78:[ 	]+210101ac[ 	]+sc.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+7c:[ 	]+220101ac[ 	]+ll.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+80:[ 	]+230101ac[ 	]+sc.d[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+84:[ 	]+240101ac[ 	]+ldptr.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+88:[ 	]+250101ac[ 	]+stptr.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+8c:[ 	]+284401ac[ 	]+ld.h[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+90:[ 	]+288401ac[ 	]+ld.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+94:[ 	]+290401ac[ 	]+st.b[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+98:[ 	]+294401ac[ 	]+st.h[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+9c:[ 	]+298401ac[ 	]+st.w[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+a0:[ 	]+2a0401ac[ 	]+ld.bu[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+a4:[ 	]+2a4401ac[ 	]+ld.hu[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+a8:[ 	]+2a8401ac[ 	]+ld.wu[ 	]+\$t0,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+ac:[ 	]+2ac401a2[ 	]+preld[ 	]+0x2,[ 	]+\$t1,[ 	]+256\(0x100\)
++[ 	]+b0:[ 	]+382c39a2[ 	]+preldx[ 	]+0x2,[ 	]+\$t1,[ 	]+\$t2
++[ 	]+b4:[ 	]+2b048d8a[ 	]+fld.s[ 	]+\$ft2,[ 	]+\$t0,[ 	]+291\(0x123\)
++[ 	]+b8:[ 	]+2b448d8a[ 	]+fst.s[ 	]+\$ft2,[ 	]+\$t0,[ 	]+291\(0x123\)
+diff --git a/gas/testsuite/gas/loongarch/imm_ins_32.s b/gas/testsuite/gas/loongarch/imm_ins_32.s
+new file mode 100644
+index 00000000..e105548e
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins_32.s
+@@ -0,0 +1,60 @@
++.equ a, 0x123
++.equ d, 2
++.equ e,0x100
++
++li.w $r12, a
++
++alsl.w $r11,$r12,$r13,d
++alsl.wu $r11,$r12,$r13,d
++bytepick.w $r11,$r12,$r13,d
++
++break d
++dbcl d
++syscall d
++
++slli.w $r11,$r12,d
++srli.w $r11,$r12,d
++srai.w $r12,$r13,d
++
++bstrins.w $r12,$r13,d,d
++
++slti $r12,$r13,a
++sltui $r12,$r13,a
++addi.w $r12,$r13,a
++andi $r12,$r13,d
++ori  $r12,$r13,d
++xori $r12,$r13,d
++lu12i.w $r12,a
++pcaddi $r12,a
++pcalau12i $r12,a
++pcaddu12i $r12,a
++pcaddu18i $r12,a
++
++csrrd $r12,a
++csrwr $r12,a
++csrxchg $r12,$r13,d
++cacop d,$r13,d
++lddir $r12,$r13,d
++ldpte $r12,d
++
++invtlb d,$r13,$r14
++
++ll.w $r12,$r13,e
++sc.w $r12,$r13,e
++ll.d $r12,$r13,e
++sc.d $r12,$r13,e
++ldptr.w $r12,$r13,e
++stptr.w $r12,$r13,e
++ld.h $r12,$r13,e
++ld.w $r12,$r13,e
++st.b $r12,$r13,e
++st.h $r12,$r13,e
++st.w $r12,$r13,e
++ld.bu $r12,$r13,e
++ld.hu $r12,$r13,e
++ld.wu $r12,$r13,e
++preld d,$r13,e
++preldx d,$r13,$r14
++
++fld.s $f10,$r12,a
++fst.s $f10,$r12,a
+diff --git a/gas/testsuite/gas/loongarch/imm_ins_label-fail.d b/gas/testsuite/gas/loongarch/imm_ins_label-fail.d
+new file mode 100644
+index 00000000..4301a007
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins_label-fail.d
+@@ -0,0 +1,3 @@
++#as:
++#source: imm_ins_label-fail.s
++#error_output: imm_ins_label-fail.l
+diff --git a/gas/testsuite/gas/loongarch/imm_ins_label-fail.l b/gas/testsuite/gas/loongarch/imm_ins_label-fail.l
+new file mode 100644
+index 00000000..e0fec2fe
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins_label-fail.l
+@@ -0,0 +1,3 @@
++.*Assembler messages:
++.*Error: illegal operand: Label
++.*Error: illegal operand: Label
+diff --git a/gas/testsuite/gas/loongarch/imm_ins_label-fail.s b/gas/testsuite/gas/loongarch/imm_ins_label-fail.s
+new file mode 100644
+index 00000000..84b2d192
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/imm_ins_label-fail.s
+@@ -0,0 +1,3 @@
++Label:
++    li.w $r12, Label
++    addi.w $r12, $r13, Label
+diff --git a/gas/testsuite/gas/loongarch/li.d b/gas/testsuite/gas/loongarch/li.d
+new file mode 100644
+index 00000000..850a3f48
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/li.d
+@@ -0,0 +1,21 @@
++#as:
++#objdump: -dr
++#skip: loongarch32-*-*
++
++.*:[    ]+file format .*
++
++
++Disassembly of section .text:
++
++00000000.* <_start>:
++[ 	]+0:[ 	]+03803c06[ 	]+ori[ 	]+\$a2,[ 	]+\$zero,[ 	]+0xf
++[ 	]+4:[ 	]+1a000005[ 	]+pcalau12i[ 	]+\$a1,[ 	]+0
++[ 	]+4:[ 	]+R_LARCH_PCALA_HI20[ 	]+.rodata
++[ 	]+8:[ 	]+02c000a5[ 	]+addi.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
++[ 	]+8:[ 	]+R_LARCH_PCALA_LO12[ 	]+.rodata
++[ 	]+c:[ 	]+03800404[ 	]+ori[ 	]+\$a0,[ 	]+\$zero,[ 	]+0x1
++[ 	]+10:[ 	]+0381000b[ 	]+ori[ 	]+\$a7,[ 	]+\$zero,[ 	]+0x40
++[ 	]+14:[ 	]+002b0000[ 	]+syscall[ 	]+0x0
++[ 	]+18:[ 	]+00150004[ 	]+move[ 	]+\$a0,[ 	]+\$zero
++[ 	]+1c:[ 	]+0381740b[ 	]+ori[ 	]+\$a7,[ 	]+\$zero,[ 	]+0x5d
++[ 	]+20:[ 	]+002b0000[ 	]+syscall[ 	]+0x0
+diff --git a/gas/testsuite/gas/loongarch/li.s b/gas/testsuite/gas/loongarch/li.s
+new file mode 100644
+index 00000000..e95a527f
+--- /dev/null
++++ b/gas/testsuite/gas/loongarch/li.s
+@@ -0,0 +1,22 @@
++.equ EXIT_SUCCESS, 0
++.equ STDOUT, 1
++.equ SYS_exit, 93
++.equ SYS_write, 64
++
++.section .rodata
++msg:
++    .string "hello, world!\n"
++    len = . - msg
++
++.text
++    .globl  _start
++_start:
++    li.w        $a2, len
++    la.local    $a1, msg
++    li.w        $a0, STDOUT
++    li.w        $a7, SYS_write
++    syscall     0x0
++
++    li.w        $a0, EXIT_SUCCESS
++    li.w        $a7, SYS_exit
++    syscall     0x0
+-- 
+2.27.0
+
diff --git a/binutils.spec b/binutils.spec
index 4205d6cba7b7e126b0e9c9257aaf303547744b24..dcb73654b4c233ba002d207c50521ed150d6fe57 100644
--- a/binutils.spec
+++ b/binutils.spec
@@ -1,7 +1,7 @@
 Summary: Binary utilities
 Name:    binutils
 Version: 2.37
-Release: 15
+Release: 16
 License: GPLv3+
 URL:     https://sourceware.org/binutils
 
@@ -43,6 +43,9 @@ Patch19: backport-PR28540-segmentation-fault-on-NULL-byte_get.patch
 Patch20: binutils-Add-LoongArch-support.patch
 Patch21: Fixup-unresolve-symbols-problem.patch
 Patch23: LoongArch-Fix-PLT-entry-generate-bug.patch
+Patch24: LoongArch-gas-add-support-using-constant-variable-in.patch
+Patch25: Fixup-gas-check-illegal-for-b-label.patch
+Patch26: Fixup-check-file-for-ifunc-reloc.patch
 %endif
 Patch22: Fix-gold-relocation-offset-and-adrp-signed-shife.patch
 
@@ -386,6 +389,9 @@ fi
 %{_infodir}/bfd*info*
 
 %changelog
+* Fri Jul 28 2023 lixing <lixing@loongson.cn> - 2.37-16
+- DESC: Add .equ support for LoongArch and fix some bugs
+
 * Sat May 20 2023 lixing <lixing@loongson.cn> - 2.37-15
 - DESC: Fix LoongArch PLT entry generate bug