diff --git a/backport-Add-support-for-Loongarch.patch b/backport-Add-support-for-Loongarch.patch
new file mode 100644
index 0000000000000000000000000000000000000000..7b8a43434711165b56fd7b0cabe93d11debca504
--- /dev/null
+++ b/backport-Add-support-for-Loongarch.patch
@@ -0,0 +1,89 @@
+From 1e64387af427ea8b610ea444715822ec7e2c874d Mon Sep 17 00:00:00 2001
+From: Jean Delvare <jdelvare@suse.de>
+Date: Fri, 26 May 2023 17:41:59 +0200
+Subject: [PATCH] dmidecode: Add support for Loongarch
+
+SMBIOS specification version 3.6.0 adds support for the Loongarch
+processor architecture.
+
+Signed-off-by: Jean Delvare <jdelvare@suse.de>
+---
+ dmidecode.c | 28 ++++++++++++++++++++++++++++
+ dmidecode.h |  1 +
+ 2 files changed, 29 insertions(+)
+
+diff --git a/dmidecode.c b/dmidecode.c
+index f5b91d4..8e4ae7b 100644
+--- a/dmidecode.c
++++ b/dmidecode.c
+@@ -58,6 +58,8 @@
+  *    https://trustedcomputinggroup.org/pc-client-platform-tpm-profile-ptp-specification/
+  *  - "RedFish Host Interface Specification" (DMTF DSP0270)
+  *    https://www.dmtf.org/sites/default/files/DSP0270_1.0.1.pdf
++ *  - LoongArch Reference Manual, volume 1
++ *    https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_cpucfg
+  */
+ 
+ #include <fcntl.h>
+@@ -988,6 +990,24 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
+ 		{ 0x200, "RV32" },
+ 		{ 0x201, "RV64" },
+ 		{ 0x202, "RV128" },
++
++		{ 0x258, "LoongArch" },
++		{ 0x259, "Loongson 1" },
++		{ 0x25A, "Loongson 2" },
++		{ 0x25B, "Loongson 3" },
++		{ 0x25C, "Loongson 2K" },
++		{ 0x25D, "Loongson 3A" },
++		{ 0x25E, "Loongson 3B" },
++		{ 0x25F, "Loongson 3C" },
++		{ 0x260, "Loongson 3D" },
++		{ 0x261, "Loongson 3E" },
++		{ 0x262, "Dual-Core Loongson 2K 2xxx" },
++		{ 0x26C, "Quad-Core Loongson 3A 5xxx" },
++		{ 0x26D, "Multi-Core Loongson 3A 5xxx" },
++		{ 0x26E, "Quad-Core Loongson 3B 5xxx" },
++		{ 0x26F, "Multi-Core Loongson 3B 5xxx" },
++		{ 0x270, "Multi-Core Loongson 3C 5xxx" },
++		{ 0x271, "Multi-Core Loongson 3D 5xxx" },
+ 	};
+ 	/*
+ 	 * Note to developers: when adding entries to this list, check if
+@@ -1106,6 +1126,9 @@ static enum cpuid_type dmi_get_cpuid_type(const struct dmi_header *h)
+ 	      || (type >= 0xB6 && type <= 0xB7) /* AMD */
+ 	      || (type >= 0xE4 && type <= 0xEF)) /* AMD */
+ 		return cpuid_x86_amd;
++	else if ((type >= 0x258 && type <= 0x262) /* Loongarch */
++	      || (type >= 0x26C && type <= 0x271)) /* Loongarch */
++		return cpuid_loongarch;
+ 	else if (type == 0x01 || type == 0x02)
+ 	{
+ 		const char *version = dmi_string(h, data[0x10]);
+@@ -1221,6 +1244,11 @@ void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...)
+ 				 ((eax >> 4) & 0xF) | (((eax >> 8) & 0xF) == 0xF ? (eax >> 12) & 0xF0 : 0),
+ 				 eax & 0xF);
+ 			break;
++
++		case cpuid_loongarch: /* LoongArch Reference Manual, volume 1 */
++			eax = DWORD(p);
++			print_cb(label, "Processor Identity 0x%08x\n", eax);
++			break;
+ 		default:
+ 			return;
+ 	}
+diff --git a/dmidecode.h b/dmidecode.h
+index 318cdc6..04c9c93 100644
+--- a/dmidecode.h
++++ b/dmidecode.h
+@@ -40,6 +40,7 @@ enum cpuid_type
+ 	cpuid_arm_soc_id,
+ 	cpuid_x86_intel,
+ 	cpuid_x86_amd,
++	cpuid_loongarch,
+ };
+ 
+ extern enum cpuid_type cpuid_type;
+-- 
+2.27.0
+
diff --git a/dmidecode.spec b/dmidecode.spec
index 34805a75e7c58de2c94cb14f58b8cdfa04ec05ae..8d95241758baa66600b3cd6159f8493f7f81afdd 100644
--- a/dmidecode.spec
+++ b/dmidecode.spec
@@ -1,6 +1,6 @@
 Name:	 dmidecode
 Version: 3.4
-Release: 5
+Release: 6
 Epoch:   1
 Summary: DMI data report tool
 
@@ -13,6 +13,7 @@ Patch6001: dmidecode-Split-table-fetching-from-decoding.patch
 Patch6002: dmidecode-Write-the-whole-dump-file-at-once.patch
 Patch6003: dmidecode-Do-not-let-dump-bin-overwrite-an-existing-.patch
 Patch6004: dmioem-Fix-segmentation-fault-in-dmi_hp_240_attr.patch
+Patch6005: backport-Add-support-for-Loongarch.patch
 
 BuildRequires: make gcc xz
 
@@ -54,6 +55,12 @@ make %{?_smp_mflags} CFLAGS="%{__global_cflags}" LDFLAGS="%{__global_ldflags}"
 %{_mandir}/man8/*.8.gz
 
 %changelog
+* Thu Sep 12 2024 liyunqing <liyunqing@kylinos.cn> - 1:3.4-6
+- Type:backport
+- ID:NA
+- SUG:NA
+- DESC: Add support for Loongarch processor architecture
+
 * Tue Jan 20 2024 Yuanfeng Chen <yuanfeng.chen@shingroup.cn> - 1:3.4-5
 - init support for arch ppc64le