diff --git a/1000-add-sw_64-support-not-upstream-modified.patch b/1000-add-sw_64-support-not-upstream-modified.patch new file mode 100644 index 0000000000000000000000000000000000000000..d7d6a5e1c996f6fbff9dacfc0a1cecfae10f6d64 --- /dev/null +++ b/1000-add-sw_64-support-not-upstream-modified.patch @@ -0,0 +1,250 @@ +From 90273829df4ae4059d1976cbb64989fb9c5d11c8 Mon Sep 17 00:00:00 2001 +From: herengui +Date: Wed, 30 Aug 2023 16:44:55 +0800 +Subject: [PATCH 1000/1001] add sw_64 support not upstream modified + +Signed-off-by: herengui +--- + app/test/test_xmmt_ops.h | 16 ++++++++++ + config/meson.build | 1 + + drivers/net/i40e/i40e_rxtx.c | 52 +++++++++++++++++++++++++++++++ + drivers/net/ixgbe/ixgbe_rxtx.c | 4 +-- + drivers/net/memif/rte_eth_memif.h | 2 ++ + drivers/net/tap/tap_bpf.h | 2 ++ + examples/l3fwd/l3fwd_em.c | 8 +++++ + examples/l3fwd/l3fwd_lpm.c | 8 +++++ + lib/lpm/rte_lpm.h | 2 ++ + meson.build | 2 ++ + 10 files changed, 95 insertions(+), 2 deletions(-) + +diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h +index 21490e7..b969008 100644 +--- a/app/test/test_xmmt_ops.h ++++ b/app/test/test_xmmt_ops.h +@@ -61,6 +61,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0) + + return data; + } ++ ++#elif defined(RTE_ARCH_SW_64) ++ ++#define vect_loadu_sil128(p) (*(xmm_t *)p) ++ ++static __rte_always_inline xmm_t ++vect_set_epi32(int i3, int i2, int i1, int i0) ++{ ++ uint64_t h = ((uint64_t)i2 & 0xffffffff) | ((uint64_t)i3 << 32); ++ uint64_t l = ((uint64_t)i0 & 0xffffffff) | ((uint64_t)i1 << 32); ++ ++ xmm_t data = {l,h}; ++ ++ return data; ++} ++ + #endif + + #endif /* _TEST_XMMT_OPS_H_ */ +diff --git a/config/meson.build b/config/meson.build +index 7e44983..d599995 100644 +--- a/config/meson.build ++++ b/config/meson.build +@@ -134,6 +134,7 @@ machine_args = [] + if host_machine.cpu_family().startswith('ppc') + machine_args += '-mcpu=' + cpu_instruction_set + machine_args += '-mtune=' + cpu_instruction_set ++elif host_machine.cpu_family().startswith('sw_64') + else + machine_args += '-march=' + cpu_instruction_set + endif +diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c +index 9a00a9b..f4cd2a3 100644 +--- a/drivers/net/i40e/i40e_rxtx.c ++++ b/drivers/net/i40e/i40e_rxtx.c +@@ -3606,6 +3606,58 @@ i40e_set_default_pctype_table(struct rte_eth_dev *dev) + } + } + ++#ifdef RTE_ARCH_SW_64 ++int ++i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev __rte_unused *dev) ++{ ++ return -1; ++} ++ ++uint16_t ++i40e_recv_pkts_vec( ++ void __rte_unused *rx_queue, ++ struct rte_mbuf __rte_unused **rx_pkts, ++ uint16_t __rte_unused nb_pkts) ++{ ++ return 0; ++} ++ ++uint16_t ++i40e_recv_scattered_pkts_vec( ++ void __rte_unused *rx_queue, ++ struct rte_mbuf __rte_unused **rx_pkts, ++ uint16_t __rte_unused nb_pkts) ++{ ++ return 0; ++} ++ ++int ++i40e_rxq_vec_setup(struct i40e_rx_queue __rte_unused *rxq) ++{ ++ return -1; ++} ++ ++int ++i40e_txq_vec_setup(struct i40e_tx_queue __rte_unused *txq) ++{ ++ return -1; ++} ++ ++void ++i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue __rte_unused*rxq) ++{ ++ return; ++} ++ ++uint16_t ++i40e_xmit_fixed_burst_vec(void __rte_unused * tx_queue, ++ struct rte_mbuf __rte_unused **tx_pkts, ++ uint16_t __rte_unused nb_pkts) ++{ ++ return 0; ++} ++#endif ++ + #ifndef CC_AVX2_SUPPORT + uint16_t + i40e_recv_pkts_vec_avx2(void __rte_unused *rx_queue, +diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c +index 60850f6..535737c 100644 +--- a/drivers/net/ixgbe/ixgbe_rxtx.c ++++ b/drivers/net/ixgbe/ixgbe_rxtx.c +@@ -5953,8 +5953,8 @@ ixgbe_config_rss_filter(struct rte_eth_dev *dev, + return 0; + } + +-/* Stubs needed for linkage when RTE_ARCH_PPC_64 or RTE_ARCH_LOONGARCH is set */ +-#if defined(RTE_ARCH_PPC_64) || defined(RTE_ARCH_LOONGARCH) ++/* Stubs needed for linkage when RTE_ARCH_PPC_64, RTE_ARCH_LOONGARCH or RTE_ARCH_SW_64 is set */ ++#if defined(RTE_ARCH_PPC_64) || defined(RTE_ARCH_LOONGARCH) || defined(RTE_ARCH_SW_64) + int + ixgbe_rx_vec_dev_conf_condition_check(struct rte_eth_dev __rte_unused *dev) + { +diff --git a/drivers/net/memif/rte_eth_memif.h b/drivers/net/memif/rte_eth_memif.h +index 864a498..77ed5cd 100644 +--- a/drivers/net/memif/rte_eth_memif.h ++++ b/drivers/net/memif/rte_eth_memif.h +@@ -180,6 +180,8 @@ const char *memif_version(void); + #define __NR_memfd_create 360 + #elif defined __i386__ + #define __NR_memfd_create 356 ++#elif defined __sw_64__ ++#define __NR_memfd_create 512 + #elif defined __loongarch__ + #define __NR_memfd_create 279 + #else +diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h +index de7ab91..21a9006 100644 +--- a/drivers/net/tap/tap_bpf.h ++++ b/drivers/net/tap/tap_bpf.h +@@ -103,6 +103,8 @@ union bpf_attr { + # define __NR_bpf 361 + # elif defined(__loongarch__) + # define __NR_bpf 280 ++# elif defined(__sw_64__) ++# define __NR_bpf 170 + # else + # error __NR_bpf not defined + # endif +diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c +index 67e042f..df5186a 100644 +--- a/examples/l3fwd/l3fwd_em.c ++++ b/examples/l3fwd/l3fwd_em.c +@@ -278,6 +278,14 @@ em_mask_key(void *key, xmm_t mask) + + return vect_and(data, mask); + } ++#elif defined(RTE_ARCH_SW_64) ++static inline xmm_t ++em_mask_key(void *key, xmm_t mask) ++{ ++ xmm_t data = vect_load_128(key); ++ ++ return vect_and(data, mask); ++} + #else + #error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain + #endif +diff --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c +index 160a7c6..9e4258b 100644 +--- a/examples/l3fwd/l3fwd_lpm.c ++++ b/examples/l3fwd/l3fwd_lpm.c +@@ -28,6 +28,7 @@ + #include + + #include "l3fwd.h" ++#include "l3fwd_common.h" + #include "l3fwd_event.h" + + #include "l3fwd_route.h" +@@ -240,6 +241,7 @@ lpm_process_event_pkt(const struct lcore_conf *lconf, struct rte_mbuf *mbuf) + + struct rte_ether_hdr *eth_hdr = rte_pktmbuf_mtod(mbuf, + struct rte_ether_hdr *); ++#ifndef RTE_ARCH_SW_64 + #ifdef DO_RFC_1812_CHECKS + struct rte_ipv4_hdr *ipv4_hdr; + if (RTE_ETH_IS_IPV4_HDR(mbuf->packet_type)) { +@@ -257,6 +259,7 @@ lpm_process_event_pkt(const struct lcore_conf *lconf, struct rte_mbuf *mbuf) + --(ipv4_hdr->time_to_live); + ++(ipv4_hdr->hdr_checksum); + } ++#endif + #endif + /* dst addr */ + *(uint64_t *)ð_hdr->dst_addr = dest_eth_addr[mbuf->port]; +@@ -264,6 +267,11 @@ lpm_process_event_pkt(const struct lcore_conf *lconf, struct rte_mbuf *mbuf) + /* src addr */ + rte_ether_addr_copy(&ports_eth_addr[mbuf->port], + ð_hdr->src_addr); ++#ifdef RTE_ARCH_SW_64 ++ rfc1812_process(rte_pktmbuf_mtod_offset(mbuf, struct rte_ipv4_hdr *, ++ sizeof(struct rte_ether_hdr)), ++ &mbuf->port, mbuf->packet_type); ++#endif + #endif + return mbuf->port; + } +diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h +index 49cfa5b..de3d3a0 100644 +--- a/lib/lpm/rte_lpm.h ++++ b/lib/lpm/rte_lpm.h +@@ -411,6 +411,8 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4], + #include "rte_lpm_altivec.h" + #elif defined(RTE_ARCH_X86) + #include "rte_lpm_sse.h" ++#elif defined(RTE_ARCH_SW_64) ++#include "rte_lpm_sw.h" + #else + #include "rte_lpm_scalar.h" + #endif +diff --git a/meson.build b/meson.build +index 1052fba..baceafa 100644 +--- a/meson.build ++++ b/meson.build +@@ -46,6 +46,8 @@ elif host_machine.cpu_family().startswith('loongarch') + arch_subdir = 'loongarch' + elif host_machine.cpu_family().startswith('ppc') + arch_subdir = 'ppc' ++elif host_machine.cpu_family().startswith('sw_64') ++ arch_subdir = 'sw_64' + endif + + # configure the build, and make sure configs here and in config folder are +-- +2.41.0 + diff --git a/1001-add-sw_64-support-not-upstream-new.patch b/1001-add-sw_64-support-not-upstream-new.patch new file mode 100644 index 0000000000000000000000000000000000000000..1ddf8485c3047315935f9bdd2afc5e1cd32103e4 --- /dev/null +++ b/1001-add-sw_64-support-not-upstream-new.patch @@ -0,0 +1,1015 @@ +From 9ffc05b778335e9e78ea2b9bd8ffe86dc982653f Mon Sep 17 00:00:00 2001 +From: herengui +Date: Wed, 30 Aug 2023 16:45:20 +0800 +Subject: [PATCH 1001/1001] add sw_64 support not upstream new + +Signed-off-by: herengui +--- + config/sw_64/meson.build | 12 ++ + config/sw_64/sw_64-sunway-linuxapp-gcc | 11 ++ + lib/eal/sw_64/include/meson.build | 22 ++++ + lib/eal/sw_64/include/rte_altivec.h | 22 ++++ + lib/eal/sw_64/include/rte_atomic.h | 48 ++++++++ + lib/eal/sw_64/include/rte_byteorder.h | 57 +++++++++ + lib/eal/sw_64/include/rte_cpuflags.h | 21 ++++ + lib/eal/sw_64/include/rte_cycles.h | 36 ++++++ + lib/eal/sw_64/include/rte_io.h | 15 +++ + lib/eal/sw_64/include/rte_mcslock.h | 18 +++ + lib/eal/sw_64/include/rte_memcpy.h | 62 ++++++++++ + lib/eal/sw_64/include/rte_pause.h | 21 ++++ + lib/eal/sw_64/include/rte_pflock.h | 18 +++ + lib/eal/sw_64/include/rte_power_intrinsics.h | 20 +++ + lib/eal/sw_64/include/rte_prefetch.h | 47 +++++++ + lib/eal/sw_64/include/rte_rwlock.h | 39 ++++++ + lib/eal/sw_64/include/rte_spinlock.h | 57 +++++++++ + lib/eal/sw_64/include/rte_ticketlock.h | 18 +++ + lib/eal/sw_64/include/rte_vect.h | 37 ++++++ + lib/eal/sw_64/meson.build | 11 ++ + lib/eal/sw_64/rte_cpuflags.c | 19 +++ + lib/eal/sw_64/rte_cycles.c | 7 ++ + lib/eal/sw_64/rte_hypervisor.c | 11 ++ + lib/eal/sw_64/rte_power_intrinsics.c | 53 ++++++++ + lib/lpm/rte_lpm_sw.h | 121 +++++++++++++++++++ + 25 files changed, 803 insertions(+) + create mode 100644 config/sw_64/meson.build + create mode 100644 config/sw_64/sw_64-sunway-linuxapp-gcc + create mode 100644 lib/eal/sw_64/include/meson.build + create mode 100644 lib/eal/sw_64/include/rte_altivec.h + create mode 100644 lib/eal/sw_64/include/rte_atomic.h + create mode 100644 lib/eal/sw_64/include/rte_byteorder.h + create mode 100644 lib/eal/sw_64/include/rte_cpuflags.h + create mode 100644 lib/eal/sw_64/include/rte_cycles.h + create mode 100644 lib/eal/sw_64/include/rte_io.h + create mode 100644 lib/eal/sw_64/include/rte_mcslock.h + create mode 100644 lib/eal/sw_64/include/rte_memcpy.h + create mode 100644 lib/eal/sw_64/include/rte_pause.h + create mode 100644 lib/eal/sw_64/include/rte_pflock.h + create mode 100644 lib/eal/sw_64/include/rte_power_intrinsics.h + create mode 100644 lib/eal/sw_64/include/rte_prefetch.h + create mode 100644 lib/eal/sw_64/include/rte_rwlock.h + create mode 100644 lib/eal/sw_64/include/rte_spinlock.h + create mode 100644 lib/eal/sw_64/include/rte_ticketlock.h + create mode 100644 lib/eal/sw_64/include/rte_vect.h + create mode 100644 lib/eal/sw_64/meson.build + create mode 100644 lib/eal/sw_64/rte_cpuflags.c + create mode 100644 lib/eal/sw_64/rte_cycles.c + create mode 100644 lib/eal/sw_64/rte_hypervisor.c + create mode 100644 lib/eal/sw_64/rte_power_intrinsics.c + create mode 100644 lib/lpm/rte_lpm_sw.h + +diff --git a/config/sw_64/meson.build b/config/sw_64/meson.build +new file mode 100644 +index 0000000..9575a5c +--- /dev/null ++++ b/config/sw_64/meson.build +@@ -0,0 +1,12 @@ ++# SPDX-License-Identifier: BSD-3-Clause ++# Copyright(c) 2018 Luca Boccassi ++ ++if not dpdk_conf.get('RTE_ARCH_64') ++ error('Only 64-bit compiles are supported for this platform type') ++endif ++dpdk_conf.set('RTE_ARCH', 'sw_64') ++dpdk_conf.set('RTE_ARCH_SW_64', 1) ++dpdk_conf.set('RTE_MAX_LCORE', 1536) ++dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) ++dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) ++dpdk_conf.set('RTE_FORCE_INTRINSICS', 'y') +diff --git a/config/sw_64/sw_64-sunway-linuxapp-gcc b/config/sw_64/sw_64-sunway-linuxapp-gcc +new file mode 100644 +index 0000000..d8b32bc +--- /dev/null ++++ b/config/sw_64/sw_64-sunway-linuxapp-gcc +@@ -0,0 +1,11 @@ ++[binaries] ++c = 'sw_64-linux-gcc' ++cpp = 'sw_64-linux-cpp' ++ar = 'sw_64-linux-gcc-ar' ++strip = 'sw_64-linux-strip' ++ ++[host_machine] ++system = 'linux' ++cpu_family = 'sw_64' ++cpu = 'sw_64' ++endian = 'little' +diff --git a/lib/eal/sw_64/include/meson.build b/lib/eal/sw_64/include/meson.build +new file mode 100644 +index 0000000..8230b26 +--- /dev/null ++++ b/lib/eal/sw_64/include/meson.build +@@ -0,0 +1,22 @@ ++# SPDX-License-Identifier: BSD-3-Clause ++# Copyright(c) 2018 Luca Boccassi ++ ++arch_headers = files( ++ 'rte_byteorder.h', ++ 'rte_cycles.h', ++ 'rte_mcslock.h', ++ 'rte_pause.h', ++ 'rte_rwlock.h', ++ 'rte_ticketlock.h', ++ 'rte_atomic.h', ++ 'rte_cpuflags.h', ++ 'rte_io.h', ++ 'rte_memcpy.h', ++ 'rte_prefetch.h', ++ 'rte_spinlock.h', ++ 'rte_vect.h', ++ 'rte_power_intrinsics.h', ++ 'rte_pflock.h', ++) ++ ++install_headers(arch_headers, subdir: get_option('include_subdir_arch')) +diff --git a/lib/eal/sw_64/include/rte_altivec.h b/lib/eal/sw_64/include/rte_altivec.h +new file mode 100644 +index 0000000..1551a94 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_altivec.h +@@ -0,0 +1,22 @@ ++/* ++ * SPDX-License-Identifier: BSD-3-Clause ++ * Copyright (C) Mellanox 2020. ++ */ ++ ++#ifndef _RTE_ALTIVEC_H_ ++#define _RTE_ALTIVEC_H_ ++ ++/* To include altivec.h, GCC version must be >= 4.8 */ ++#include ++ ++/* ++ * Compilation workaround for PPC64 when AltiVec is fully enabled, e.g. std=c11. ++ * Otherwise there would be a type conflict between stdbool and altivec. ++ */ ++#if defined(__PPC64__) && !defined(__APPLE_ALTIVEC__) ++#undef bool ++/* redefine as in stdbool.h */ ++#define bool _Bool ++#endif ++ ++#endif /* _RTE_ALTIVEC_H_ */ +diff --git a/lib/eal/sw_64/include/rte_atomic.h b/lib/eal/sw_64/include/rte_atomic.h +new file mode 100644 +index 0000000..d25058b +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_atomic.h +@@ -0,0 +1,48 @@ ++#ifndef _RTE_ATOMIC_sw_64_H_ ++#define _RTE_ATOMIC_sw_64_H_ ++ ++#ifndef RTE_FORCE_INTRINSICS ++//# error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS ++#endif ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_atomic.h" ++ ++#define swmb() asm volatile("memb": : :"memory") ++ ++#define rte_mb() swmb() ++ ++#define rte_wmb() swmb() ++ ++#define rte_rmb() swmb() ++ ++#define rte_smp_mb() swmb() ++ ++#define rte_smp_wmb() swmb() ++ ++#define rte_smp_rmb() swmb() ++ ++#define rte_io_mb() rte_mb() ++ ++#define rte_io_wmb() rte_wmb() ++ ++#define rte_io_rmb() rte_rmb() ++ ++#define rte_cio_rmb() rte_rmb() ++ ++#define rte_cio_wmb() rte_wmb() ++ ++static __rte_always_inline void ++rte_atomic_thread_fence(int memorder) ++{ ++ __atomic_thread_fence(memorder); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_ATOMIC_sw_64_H_ */ +diff --git a/lib/eal/sw_64/include/rte_byteorder.h b/lib/eal/sw_64/include/rte_byteorder.h +new file mode 100644 +index 0000000..3a0aad2 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_byteorder.h +@@ -0,0 +1,57 @@ ++#ifndef _RTE_BYTEORDER_sw_64_H_ ++#define _RTE_BYTEORDER_sw_64_H_ ++ ++#ifndef RTE_FORCE_INTRINSICS ++// # error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS ++#endif ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_byteorder.h" ++#if !(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)) ++#define rte_bswap16(x) rte_constant_bswap16(x) ++#endif ++ ++#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN ++#define rte_cpu_to_le_16(x) (x) ++#define rte_cpu_to_le_32(x) (x) ++#define rte_cpu_to_le_64(x) (x) ++ ++#define rte_cpu_to_be_16(x) rte_bswap16(x) ++#define rte_cpu_to_be_32(x) rte_bswap32(x) ++#define rte_cpu_to_be_64(x) rte_bswap64(x) ++ ++#define rte_le_to_cpu_16(x) (x) ++#define rte_le_to_cpu_32(x) (x) ++#define rte_le_to_cpu_64(x) (x) ++ ++#define rte_be_to_cpu_16(x) rte_bswap16(x) ++#define rte_be_to_cpu_32(x) rte_bswap32(x) ++#define rte_be_to_cpu_64(x) rte_bswap64(x) ++ ++#else /* RTE_BIG_ENDIAN */ ++ ++#define rte_cpu_to_le_16(x) rte_bswap16(x) ++#define rte_cpu_to_le_32(x) rte_bswap32(x) ++#define rte_cpu_to_le_64(x) rte_bswap64(x) ++ ++#define rte_cpu_to_be_16(x) (x) ++#define rte_cpu_to_be_32(x) (x) ++#define rte_cpu_to_be_64(x) (x) ++ ++#define rte_le_to_cpu_16(x) rte_bswap16(x) ++#define rte_le_to_cpu_32(x) rte_bswap32(x) ++#define rte_le_to_cpu_64(x) rte_bswap64(x) ++ ++#define rte_be_to_cpu_16(x) (x) ++#define rte_be_to_cpu_32(x) (x) ++#define rte_be_to_cpu_64(x) (x) ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif +diff --git a/lib/eal/sw_64/include/rte_cpuflags.h b/lib/eal/sw_64/include/rte_cpuflags.h +new file mode 100644 +index 0000000..94a3fc2 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_cpuflags.h +@@ -0,0 +1,21 @@ ++#ifndef _RTE_CPUFLAGS_sw_64_H_ ++#define _RTE_CPUFLAGS_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* Enumeration of all CPU features supported */ ++ ++enum rte_cpu_flag_t { ++ RTE_CPUFLAG_NUMFLAGS /**< This should always be the last! */ ++ }; ++ ++#include "generic/rte_cpuflags.h" ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_CPUFLAGS_sw_64_H_ */ ++ +diff --git a/lib/eal/sw_64/include/rte_cycles.h b/lib/eal/sw_64/include/rte_cycles.h +new file mode 100644 +index 0000000..9564382 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_cycles.h +@@ -0,0 +1,36 @@ ++#ifndef _RTE_CYCLES_sw_64_H_ ++#define _RTE_CYCLES_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_cycles.h" ++ ++static inline uint64_t ++rte_rdtsc(void) ++{ ++ uint64_t u64_TSC; ++ asm volatile("RTC %0":"=r"(u64_TSC)); ++ return u64_TSC; ++} ++ ++static inline uint64_t ++rte_rdtsc_precise(void) ++{ ++ rte_mb(); ++ return rte_rdtsc(); ++} ++ ++static inline uint64_t ++rte_get_tsc_cycles(void) ++{ ++ return rte_rdtsc(); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_CYCLES_sw_64_H_ */ ++ +diff --git a/lib/eal/sw_64/include/rte_io.h b/lib/eal/sw_64/include/rte_io.h +new file mode 100644 +index 0000000..76f822e +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_io.h +@@ -0,0 +1,15 @@ ++#ifndef _RTE_IO_sw_64_H_ ++#define _RTE_IO_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_io.h" ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_IO_sw_64_H_ */ ++ +diff --git a/lib/eal/sw_64/include/rte_mcslock.h b/lib/eal/sw_64/include/rte_mcslock.h +new file mode 100644 +index 0000000..a900443 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_mcslock.h +@@ -0,0 +1,18 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright(c) 2019 Arm Limited ++ */ ++ ++#ifndef _RTE_MCSLOCK_sw_64_H_ ++#define _RTE_MCSLOCK_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_mcslock.h" ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_MCSLOCK_sw_64_H_ */ +diff --git a/lib/eal/sw_64/include/rte_memcpy.h b/lib/eal/sw_64/include/rte_memcpy.h +new file mode 100644 +index 0000000..45cccc1 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_memcpy.h +@@ -0,0 +1,62 @@ ++#ifndef _RTE_MEMCPY_sw_64_H_ ++#define _RTE_MEMCPY_sw_64_H_ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include ++#include ++ ++#include "generic/rte_memcpy.h" ++ ++static inline void ++rte_mov16(uint8_t *dst, const uint8_t *src) ++{ ++ memcpy(dst, src, 16); ++} ++ ++static inline void ++rte_mov32(uint8_t *dst, const uint8_t *src) ++{ ++ memcpy(dst, src, 32); ++} ++ ++static inline void ++rte_mov48(uint8_t *dst, const uint8_t *src) ++{ ++ memcpy(dst, src, 48); ++} ++ ++static inline void ++rte_mov64(uint8_t *dst, const uint8_t *src) ++{ ++ memcpy(dst, src, 64); ++} ++ ++static inline void ++rte_mov128(uint8_t *dst, const uint8_t *src) ++{ ++ memcpy(dst, src, 128); ++} ++ ++static inline void ++rte_mov256(uint8_t *dst, const uint8_t *src) ++{ ++ memcpy(dst, src, 256); ++} ++ ++#define rte_memcpy(d, s, n) memcpy((d), (s), (n)) ++ ++static inline void * ++rte_memcpy_func(void *dst, const void *src, size_t n) ++{ ++ return memcpy(dst, src, n); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_MEMCPY_sw_64_H_ */ ++ ++ +diff --git a/lib/eal/sw_64/include/rte_pause.h b/lib/eal/sw_64/include/rte_pause.h +new file mode 100644 +index 0000000..7798a3c +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_pause.h +@@ -0,0 +1,21 @@ ++#ifndef _RTE_PAUSE_sw_64_H_ ++#define _RTE_PAUSE_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include ++#include "generic/rte_pause.h" ++ ++static inline void rte_pause(void) ++{ ++ asm volatile("memb" ::: "memory"); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_PAUSE_sw_64_H_ */ ++ +diff --git a/lib/eal/sw_64/include/rte_pflock.h b/lib/eal/sw_64/include/rte_pflock.h +new file mode 100644 +index 0000000..bb9934e +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_pflock.h +@@ -0,0 +1,18 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright(c) 2021 Microsoft Corporation ++ */ ++ ++#ifndef _RTE_PFLOCK_ARM_H_ ++#define _RTE_PFLOCK_ARM_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_pflock.h" ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_PFLOCK_ARM_H_ */ +diff --git a/lib/eal/sw_64/include/rte_power_intrinsics.h b/lib/eal/sw_64/include/rte_power_intrinsics.h +new file mode 100644 +index 0000000..c0e9ac2 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_power_intrinsics.h +@@ -0,0 +1,20 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright(c) 2020 Intel Corporation ++ */ ++ ++#ifndef _RTE_POWER_INTRINSIC_PPC_H_ ++#define _RTE_POWER_INTRINSIC_PPC_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include ++ ++#include "generic/rte_power_intrinsics.h" ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_POWER_INTRINSIC_PPC_H_ */ +diff --git a/lib/eal/sw_64/include/rte_prefetch.h b/lib/eal/sw_64/include/rte_prefetch.h +new file mode 100644 +index 0000000..3ff322a +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_prefetch.h +@@ -0,0 +1,47 @@ ++#ifndef _RTE_PREFETCH_sw_64_H_ ++#define _RTE_PREFETCH_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include ++#include "generic/rte_prefetch.h" ++ ++static inline void ++rte_prefetch0(const volatile void *p) ++{ ++ __builtin_prefetch((const void *)(uintptr_t)p, 0, 3); ++} ++ ++static inline void ++rte_prefetch1(const volatile void *p) ++{ ++ __builtin_prefetch((const void *)(uintptr_t)p, 0, 2); ++} ++ ++static inline void ++rte_prefetch2(const volatile void *p) ++{ ++ __builtin_prefetch((const void *)(uintptr_t)p, 0, 1); ++} ++ ++static inline void ++rte_prefetch_non_temporal(const volatile void *p) ++{ ++ /* non-temporal version not available, fallback to rte_prefetch0 */ ++ rte_prefetch0(p); ++} ++ ++__rte_experimental ++static inline void ++rte_cldemote(const volatile void *p) ++{ ++ RTE_SET_USED(p); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_PREFETCH_sw_64_H_ */ +diff --git a/lib/eal/sw_64/include/rte_rwlock.h b/lib/eal/sw_64/include/rte_rwlock.h +new file mode 100644 +index 0000000..a72df43 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_rwlock.h +@@ -0,0 +1,39 @@ ++#ifndef _RTE_RWLOCK_sw_64_H_ ++#define _RTE_RWLOCK_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_rwlock.h" ++ ++static inline void ++rte_rwlock_read_lock_tm(rte_rwlock_t *rwl) ++{ ++ rte_rwlock_read_lock(rwl); ++} ++ ++static inline void ++rte_rwlock_read_unlock_tm(rte_rwlock_t *rwl) ++{ ++ rte_rwlock_read_unlock(rwl); ++} ++ ++static inline void ++rte_rwlock_write_lock_tm(rte_rwlock_t *rwl) ++{ ++ rte_rwlock_write_lock(rwl); ++} ++ ++static inline void ++rte_rwlock_write_unlock_tm(rte_rwlock_t *rwl) ++{ ++ rte_rwlock_write_unlock(rwl); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_RWLOCK_sw_64_H_ */ ++ +diff --git a/lib/eal/sw_64/include/rte_spinlock.h b/lib/eal/sw_64/include/rte_spinlock.h +new file mode 100644 +index 0000000..2be4c42 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_spinlock.h +@@ -0,0 +1,57 @@ ++#ifndef _RTE_SPINLOCK_sw_64_H_ ++#define _RTE_SPINLOCK_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_spinlock.h" ++#include "rte_common.h" ++ ++static inline int ++rte_tm_supported(void) ++{ ++ return 0; ++} ++ ++static inline void ++rte_spinlock_lock_tm(rte_spinlock_t *sl) ++{ ++ rte_spinlock_lock(sl); /* fall-back */ ++} ++ ++static inline int ++rte_spinlock_trylock_tm(rte_spinlock_t *sl) ++{ ++ return rte_spinlock_trylock(sl); ++} ++ ++static inline void ++rte_spinlock_unlock_tm(rte_spinlock_t *sl) ++{ ++ rte_spinlock_unlock(sl); ++} ++ ++static inline void ++rte_spinlock_recursive_lock_tm(rte_spinlock_recursive_t *slr) ++{ ++ rte_spinlock_recursive_lock(slr); /* fall-back */ ++} ++ ++static inline void ++rte_spinlock_recursive_unlock_tm(rte_spinlock_recursive_t *slr) ++{ ++ rte_spinlock_recursive_unlock(slr); ++} ++ ++static inline int ++rte_spinlock_recursive_trylock_tm(rte_spinlock_recursive_t *slr) ++{ ++ return rte_spinlock_recursive_trylock(slr); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_SPINLOCK_sw_64_H_ */ +diff --git a/lib/eal/sw_64/include/rte_ticketlock.h b/lib/eal/sw_64/include/rte_ticketlock.h +new file mode 100644 +index 0000000..bf081c1 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_ticketlock.h +@@ -0,0 +1,18 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright(c) 2019 Arm Limited ++ */ ++ ++#ifndef _RTE_TICKETLOCK_sw_64_H_ ++#define _RTE_TICKETLOCK_sw_64_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "generic/rte_ticketlock.h" ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_TICKETLOCK_sw_64_H_ */ +diff --git a/lib/eal/sw_64/include/rte_vect.h b/lib/eal/sw_64/include/rte_vect.h +new file mode 100644 +index 0000000..14fa550 +--- /dev/null ++++ b/lib/eal/sw_64/include/rte_vect.h +@@ -0,0 +1,37 @@ ++#ifndef _RTE_VECT_sw_64_H_ ++#define _RTE_VECT_sw_64_H_ ++ ++#include ++#include "generic/rte_vect.h" ++#include "rte_debug.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_256 ++ ++typedef struct _xmm_t ++{ ++ uint64_t u64_L; ++ uint64_t u64_H; ++}xmm_t; ++ ++#define XMM_SIZE (sizeof(xmm_t)) ++#define XMM_MASK (XMM_SIZE - 1) ++ ++typedef union rte_xmm { ++ xmm_t x; ++ uint8_t u8[XMM_SIZE / sizeof(uint8_t)]; ++ uint16_t u16[XMM_SIZE / sizeof(uint16_t)]; ++ uint32_t u32[XMM_SIZE / sizeof(uint32_t)]; ++ uint64_t u64[XMM_SIZE / sizeof(uint64_t)]; ++ double pd[XMM_SIZE / sizeof(double)]; ++} rte_xmm_t; ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif ++ +diff --git a/lib/eal/sw_64/meson.build b/lib/eal/sw_64/meson.build +new file mode 100644 +index 0000000..43c4654 +--- /dev/null ++++ b/lib/eal/sw_64/meson.build +@@ -0,0 +1,11 @@ ++# SPDX-License-Identifier: BSD-3-Clause ++# Copyright(c) 2018 Luca Boccassi ++ ++subdir('include') ++ ++sources += files( ++ 'rte_cpuflags.c', ++ 'rte_cycles.c', ++ 'rte_hypervisor.c', ++ 'rte_power_intrinsics.c', ++) +diff --git a/lib/eal/sw_64/rte_cpuflags.c b/lib/eal/sw_64/rte_cpuflags.c +new file mode 100644 +index 0000000..9c3f137 +--- /dev/null ++++ b/lib/eal/sw_64/rte_cpuflags.c +@@ -0,0 +1,19 @@ ++#include "rte_cpuflags.h" ++#include ++#include ++ ++/** ++ * Checks if a particular flag is available on current machine. ++ */ ++ ++int ++rte_cpu_get_flag_enabled(__attribute__((unused)) enum rte_cpu_flag_t feature) ++{ ++ return -ENOENT; ++} ++ ++void ++rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics) ++{ ++ memset(intrinsics, 0, sizeof(*intrinsics)); ++} +diff --git a/lib/eal/sw_64/rte_cycles.c b/lib/eal/sw_64/rte_cycles.c +new file mode 100644 +index 0000000..851fd02 +--- /dev/null ++++ b/lib/eal/sw_64/rte_cycles.c +@@ -0,0 +1,7 @@ ++#include "eal_private.h" ++ ++uint64_t ++get_tsc_freq_arch(void) ++{ ++ return 0; ++} +diff --git a/lib/eal/sw_64/rte_hypervisor.c b/lib/eal/sw_64/rte_hypervisor.c +new file mode 100644 +index 0000000..08a1c97 +--- /dev/null ++++ b/lib/eal/sw_64/rte_hypervisor.c +@@ -0,0 +1,11 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright 2017 Mellanox Technologies, Ltd ++ */ ++ ++#include "rte_hypervisor.h" ++ ++enum rte_hypervisor ++rte_hypervisor_get(void) ++{ ++ return RTE_HYPERVISOR_UNKNOWN; ++} +diff --git a/lib/eal/sw_64/rte_power_intrinsics.c b/lib/eal/sw_64/rte_power_intrinsics.c +new file mode 100644 +index 0000000..2eb6839 +--- /dev/null ++++ b/lib/eal/sw_64/rte_power_intrinsics.c +@@ -0,0 +1,53 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright(c) 2021 Intel Corporation ++ */ ++ ++ ++#include ++ ++#include "rte_power_intrinsics.h" ++ ++/** ++ * This function is not supported on SW. ++ */ ++int ++rte_power_monitor(const struct rte_power_monitor_cond *pmc, ++ const uint64_t tsc_timestamp) ++{ ++ RTE_SET_USED(pmc); ++ RTE_SET_USED(tsc_timestamp); ++ ++ return -ENOTSUP; ++} ++ ++/** ++ * This function is not supported on SW. ++ */ ++int ++rte_power_pause(const uint64_t tsc_timestamp) ++{ ++ RTE_SET_USED(tsc_timestamp); ++ ++ return -ENOTSUP; ++} ++ ++/** ++ * This function is not supported on SW. ++ */ ++int ++rte_power_monitor_wakeup(const unsigned int lcore_id) ++{ ++ RTE_SET_USED(lcore_id); ++ ++ return -ENOTSUP; ++} ++int ++rte_power_monitor_multi(const struct rte_power_monitor_cond pmc[], ++ const uint32_t num, const uint64_t tsc_timestamp) ++{ ++ RTE_SET_USED(pmc); ++ RTE_SET_USED(num); ++ RTE_SET_USED(tsc_timestamp); ++ ++ return -ENOTSUP; ++} +diff --git a/lib/lpm/rte_lpm_sw.h b/lib/lpm/rte_lpm_sw.h +new file mode 100644 +index 0000000..5046569 +--- /dev/null ++++ b/lib/lpm/rte_lpm_sw.h +@@ -0,0 +1,121 @@ ++/* SPDX-License-Identifier: BSD-3-Clause ++ * Copyright(c) 2010-2014 Intel Corporation ++ */ ++ ++#ifndef _RTE_LPM_SW_H_ ++#define _RTE_LPM_SW_H_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++static inline void ++rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4], ++ uint32_t defv) ++{ ++ uint32_t i24[4]; ++ rte_xmm_t i8; ++ uint32_t tbl[4]; ++ uint64_t idx, pt, pt2; ++ const uint32_t *ptbl; ++ ++ /* ++ * RTE_LPM_VALID_EXT_ENTRY_BITMASK for 2 LPM entries ++ * as one 64-bit value (0x0300000003000000). ++ */ ++ const uint64_t mask_xv = ++ ((uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK | ++ (uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK << 32); ++ ++ /* ++ * RTE_LPM_LOOKUP_SUCCESS for 2 LPM entries ++ * as one 64-bit value (0x0100000001000000). ++ */ ++ const uint64_t mask_v = ++ ((uint64_t)RTE_LPM_LOOKUP_SUCCESS | ++ (uint64_t)RTE_LPM_LOOKUP_SUCCESS << 32); ++ ++ /* get 4 indexes for tbl24[]. */ ++ i24[0] = (uint32_t)ip.u64_L >> CHAR_BIT; ++ i24[1] = (uint32_t)(ip.u64_L >> 32) >> CHAR_BIT; ++ i24[2] = (uint32_t)ip.u64_H >> CHAR_BIT; ++ i24[3] = (uint32_t)(ip.u64_H >> 32) >> CHAR_BIT; ++ ++ /* extract values from tbl24[] */ ++ idx = ((uint64_t)i24[0] & 0xffffffff) | ((uint64_t)i24[1] << 32); ++ ++ ptbl = (const uint32_t *)&lpm->tbl24[(uint32_t)idx]; ++ tbl[0] = *ptbl; ++ ptbl = (const uint32_t *)&lpm->tbl24[idx >> 32]; ++ tbl[1] = *ptbl; ++ ++ idx = ((uint64_t)i24[2] | (uint64_t)i24[3] << 32); ++ ++ ptbl = (const uint32_t *)&lpm->tbl24[(uint32_t)idx]; ++ tbl[2] = *ptbl; ++ ptbl = (const uint32_t *)&lpm->tbl24[idx >> 32]; ++ tbl[3] = *ptbl; ++ ++ /* get 4 indexes for tbl8[]. */ ++ i8.x.u64_L = (ip.u64_L & (0x000000FF000000FF)); ++ i8.x.u64_H = (ip.u64_H & (0x000000FF000000FF)); ++ ++ ++ pt = (uint64_t)tbl[0] | ++ (uint64_t)tbl[1] << 32; ++ pt2 = (uint64_t)tbl[2] | ++ (uint64_t)tbl[3] << 32; ++ ++ /* search successfully finished for all 4 IP addresses. */ ++ if (likely((pt & mask_xv) == mask_v) && ++ likely((pt2 & mask_xv) == mask_v)) { ++ *(uint64_t *)hop = pt & RTE_LPM_MASKX4_RES; ++ *(uint64_t *)(hop + 2) = pt2 & RTE_LPM_MASKX4_RES; ++ return; ++ } ++ ++ if (unlikely((pt & RTE_LPM_VALID_EXT_ENTRY_BITMASK) == ++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) { ++ i8.u32[0] = i8.u32[0] + ++ (uint8_t)tbl[0] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES; ++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[0]]; ++ tbl[0] = *ptbl; ++ } ++ if (unlikely((pt >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) == ++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) { ++ i8.u32[1] = i8.u32[1] + ++ (uint8_t)tbl[1] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES; ++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[1]]; ++ tbl[1] = *ptbl; ++ } ++ if (unlikely((pt2 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) == ++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) { ++ i8.u32[2] = i8.u32[2] + ++ (uint8_t)tbl[2] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES; ++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[2]]; ++ tbl[2] = *ptbl; ++ } ++ if (unlikely((pt2 >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) == ++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) { ++ i8.u32[3] = i8.u32[3] + ++ (uint8_t)tbl[3] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES; ++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[3]]; ++ tbl[3] = *ptbl; ++ } ++ ++ hop[0] = (tbl[0] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[0] & 0x00FFFFFF : defv; ++ hop[1] = (tbl[1] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[1] & 0x00FFFFFF : defv; ++ hop[2] = (tbl[2] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[2] & 0x00FFFFFF : defv; ++ hop[3] = (tbl[3] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[3] & 0x00FFFFFF : defv; ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _RTE_LPM_SW_H_ */ +-- +2.41.0 + diff --git a/dpdk.spec b/dpdk.spec index 7d61cdfe78d437ba37f5231841f0809cd17ef6fb..961660defa4a544df8296f4e04e14091004b0398 100644 --- a/dpdk.spec +++ b/dpdk.spec @@ -1,6 +1,6 @@ Name: dpdk Version: 21.11 -Release: 58 +Release: 59 Packager: packaging@6wind.com URL: http://dpdk.org %global source_version 21.11 @@ -422,11 +422,14 @@ Patch6392: 0392-ethdev-add-maximum-Rx-buffer-size.patch Patch6393: 0393-net-hns3-report-maximum-buffer-size.patch Patch6394: 0394-net-hns3-fix-mailbox-sync.patch +Patch1000: 1000-add-sw_64-support-not-upstream-modified.patch +Patch1001: 1001-add-sw_64-support-not-upstream-new.patch + Summary: Data Plane Development Kit core Group: System Environment/Libraries License: BSD and LGPLv2 and GPLv2 -ExclusiveArch: i686 x86_64 aarch64 loongarch64 +ExclusiveArch: i686 x86_64 aarch64 loongarch64 sw_64 BuildRequires: meson ninja-build gcc diffutils python3-pyelftools BuildRequires: kernel-devel numactl-devel @@ -471,7 +474,11 @@ This package contains the pdump tool for capture the dpdk network packets. %build export CFLAGS="%{optflags}" +%ifarch sw_64 +meson build -Dplatform=generic -Dexamples=l3fwd-power,ethtool,kni,dma,ptpclient +%else meson build -Dplatform=generic -Dexamples=l3fwd-power,ethtool,l3fwd,kni,dma,ptpclient +%endif ninja -C build -v #build gazelle-pdump @@ -490,7 +497,9 @@ cd - %install DESTDIR=$RPM_BUILD_ROOT/ ninja install -C build +%ifnarch sw_64 chrpath -d ./build/examples/dpdk-l3fwd +%endif chrpath -d ./build/examples/dpdk-l3fwd-power chrpath -d ./build/examples/dpdk-ethtool chrpath -d ./build/examples/dpdk-kni @@ -498,7 +507,9 @@ chrpath -d ./build/examples/dpdk-dma chrpath -d ./build/examples/dpdk-ptpclient chrpath -d ./build/app/dpdk-pdump.p/gazelle-pdump +%ifnarch sw_64 cp ./build/examples/dpdk-l3fwd $RPM_BUILD_ROOT/usr/local/bin +%endif cp ./build/examples/dpdk-l3fwd-power $RPM_BUILD_ROOT/usr/local/bin cp ./build/examples/dpdk-ethtool $RPM_BUILD_ROOT/usr/local/bin cp ./build/examples/dpdk-kni $RPM_BUILD_ROOT/usr/local/bin @@ -506,17 +517,17 @@ cp ./build/examples/dpdk-dma $RPM_BUILD_ROOT/usr/local/bin cp ./build/examples/dpdk-ptpclient $RPM_BUILD_ROOT/usr/local/bin cp ./build/app/dpdk-pdump.p/gazelle-pdump $RPM_BUILD_ROOT/usr/local/bin -mkdir -p $RPM_BUILD_ROOT/usr/lib64 -mv $RPM_BUILD_ROOT/usr/local/lib64/* $RPM_BUILD_ROOT/usr/lib64/ +mkdir -p $RPM_BUILD_ROOT%{_libdir} +mv $RPM_BUILD_ROOT/usr/local/%{_lib}/* $RPM_BUILD_ROOT%{_libdir}/ mkdir -p $RPM_BUILD_ROOT/usr/local/bin ln -fs /usr/local/bin/dpdk-devbind.py $RPM_BUILD_ROOT/usr/local/bin/dpdk-devbind -mkdir $RPM_BUILD_ROOT/usr/lib64/dpdk/pmds-22.0/lib -mkdir $RPM_BUILD_ROOT/usr/lib64/dpdk/pmds-22.0/include -cd $RPM_BUILD_ROOT/usr/lib64/dpdk/pmds-22.0/include +mkdir $RPM_BUILD_ROOT%{_libdir}/dpdk/pmds-22.0/lib +mkdir $RPM_BUILD_ROOT%{_libdir}/dpdk/pmds-22.0/include +cd $RPM_BUILD_ROOT%{_libdir}/dpdk/pmds-22.0/include ln -fs ../../../../local/include/* . cd - -cd $RPM_BUILD_ROOT/usr/lib64/dpdk/pmds-22.0/lib +cd $RPM_BUILD_ROOT%{_libdir}/dpdk/pmds-22.0/lib ln -fs ../../../*.so . cd - @@ -530,16 +541,16 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko /usr/local/bin/*.py /usr/local/bin/dpdk-devbind /lib/modules/%{kern_devel_ver}/extra/dpdk/*.ko -/usr/lib64/*.so* -/usr/lib64/dpdk/* -%exclude /usr/lib64/dpdk/pmds-22.0/include/*.h +%{_libdir}/*.so* +%{_libdir}/dpdk/* +%exclude %{_libdir}/dpdk/pmds-22.0/include/*.h %files devel /usr/local/include -/usr/lib64/*.a -/usr/lib64/dpdk/pmds-22.0/include/*.h -/usr/lib64/pkgconfig/libdpdk-libs.pc -/usr/lib64/pkgconfig/libdpdk.pc +%{_libdir}/*.a +%{_libdir}/dpdk/pmds-22.0/include/*.h +%{_libdir}/pkgconfig/libdpdk-libs.pc +%{_libdir}/pkgconfig/libdpdk.pc %files doc @@ -549,7 +560,9 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko /usr/local/bin/dpdk-proc-info /usr/local/bin/dpdk-test /usr/local/bin/dpdk-testpmd +%ifnarch sw_64 /usr/local/bin/dpdk-l3fwd +%endif /usr/local/bin/dpdk-l3fwd-power /usr/local/bin/dpdk-ethtool /usr/local/bin/dpdk-kni @@ -566,7 +579,7 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko /usr/sbin/depmod %changelog -* Mon Nov 20 2023 huangdengdui - 21.11-58 +* Mon Nov 20 2023 huangdengdui - 21.11-59 Sync some patchs from upstreaming and modifies are as follow: - net/hns3: fix mailbox sync - net/hns3: report maximum buffer size @@ -597,7 +610,7 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko - net/hns3: fix build warning - telemetry: fix repeat display when callback don't init dict -* Fri Oct 27 2023 huangdengdui - 21.11-57 +* Fri Oct 27 2023 huangdengdui - 21.11-58 Sync some patchs from upstreaming and modifies are as follow: - maintainers: update for hns3 driver - app/testpmd: add command to flush multicast MAC addresses @@ -616,6 +629,9 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko - net/hns3: fix non-zero weight for disabled TC - config/arm: add HiSilicon HIP10 +* Wed Aug 30 2023 herengui - 21.11-57 +- Add support for sw_64 + * Mon Aug 21 2023 huangdengdui - 21.11-56 replace patch-287 to solve the duplicate setting for MAC address.