From 9d553ba53d06d2f78efeac5a4b2b71f368a0696d Mon Sep 17 00:00:00 2001 From: Dengdui Huang Date: Tue, 23 Jul 2024 14:26:06 +0800 Subject: [PATCH] sync some patch from upstreaming Support more VLAN fields matching for hns3 and sync a bugfix, modifications are as follow: - net/hns3: add Rx DMA address align check - net/hns3: support more VLAN fields matching Signed-off-by: Dengdui Huang --- ...s3-support-more-VLAN-fields-matching.patch | 212 ++++++++++++++++++ ...-hns3-add-Rx-DMA-address-align-check.patch | 143 ++++++++++++ dpdk.spec | 10 +- 3 files changed, 364 insertions(+), 1 deletion(-) create mode 100644 0044-net-hns3-support-more-VLAN-fields-matching.patch create mode 100644 0045-net-hns3-add-Rx-DMA-address-align-check.patch diff --git a/0044-net-hns3-support-more-VLAN-fields-matching.patch b/0044-net-hns3-support-more-VLAN-fields-matching.patch new file mode 100644 index 0000000..4e5dd34 --- /dev/null +++ b/0044-net-hns3-support-more-VLAN-fields-matching.patch @@ -0,0 +1,212 @@ +From 127b8563fabbdb41a4b70704703b2cca693bedd9 Mon Sep 17 00:00:00 2001 +From: Jie Hai +Date: Thu, 4 Jul 2024 10:15:38 +0800 +Subject: [PATCH] net/hns3: support more VLAN fields matching + +[ upstream commit 051d4bc943ff37bd9310bb76d8b0b9dad77fa14b ] + +The commit 09315fc83861 ("ethdev: add VLAN attributes to ethernet +and VLAN items") introduces ``has_vlan`` and ``has_more_vlan`` +fields in items ETH and VLAN. This patch adds support for these +fields. The usage is documented in hns3.rst. + +Signed-off-by: Jie Hai +--- + doc/guides/nics/hns3.rst | 68 ++++++++++++++++++++++++++++++++++++ + drivers/net/hns3/hns3_fdir.h | 4 +++ + drivers/net/hns3/hns3_flow.c | 47 ++++++++++++++++++++++--- + 3 files changed, 115 insertions(+), 4 deletions(-) + +diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst +index 3e84d1f..97b4686 100644 +--- a/doc/guides/nics/hns3.rst ++++ b/doc/guides/nics/hns3.rst +@@ -234,6 +234,74 @@ src_port=32, dst_port=32`` to queue 1: + dst is 2.2.2.5 / udp src is 32 dst is 32 / end \ + actions mark id 1 / queue index 1 / end + ++The flow rules:: ++ ++ rule-0: flow create 0 ingress pattern eth / end \ ++ queue index 1 / end ++ rule-1: flow create 0 ingress pattern eth / vlan vid is 10 / end \ ++ queue index 1 / end ++ rule-2: flow create 0 ingress pattern eth / vlan / vlan vid is 10 / end \ ++ queue index 1 / end ++ rule-3: flow create 0 ingress pattern eth / vlan vid is 10 / vlan vid is 11 / end \ ++ queue index 1 / end ++ ++will match the following packet types with specific VLAN ID at the specified VLAN layer ++and any VLAN ID at the rest VLAN layer. ++ ++ +--------+------------------+-------------------------------------------+ ++ | rules | ``strict`` | ``nostrict`` | ++ +========+==================+===========================================+ ++ | rule-0 | untagged | untagged || single-tagged || multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ | rule-1 | single-tagged | single-tagged || multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ | rule-2 | double-tagged | multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ | rule-3 | double-tagged | multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ ++The attributes ``has_vlan`` and ``has_more_vlan`` are supported. ++The usage is as follows:: ++ ++ rule-4: flow create 0 ingress pattern eth has_vlan is 1 / end \ ++ queue index 1 / end ++ rule-5: flow create 0 ingress pattern eth has_vlan is 0 / end \ ++ queue index 1 / end ++ rule-6: flow create 0 ingress pattern eth / vlan has_more_vlan is 1 / \ ++ end queue index 1 / end ++ rule-7: flow create 0 ingress pattern eth / vlan has_more_vlan is 0 / \ ++ end queue index 1 / end ++ ++They will match the following packet types with any VLAN ID. ++ ++ +--------+------------------+-------------------------------------------+ ++ | rules | ``strict`` | ``nostrict`` | ++ +========+==================+===========================================+ ++ | rule-4 | single-tagged | untagged || single-tagged || multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ | rule-5 | untagged | untagged || single-tagged || multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ | rule-6 | double-tagged | untagged || single-tagged || multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ | rule-7 | single-tagged | untagged || single-tagged || multi-tagged | ++ +--------+------------------+-------------------------------------------+ ++ ++These two fields may be used followed by VLAN item, ++and may partially overlap or conflict with the VLAN item. ++For examples, the rule-8 will be rejected by the driver ++and rule-9, rule-10 are repeated with rule-4. ++Similar usage for ``has_more_vlan``. ++ ++:: ++ ++ rule-8: flow create 0 ingress pattern eth has_vlan is 0 / vlan / end \ ++ queue index 1 / end ++ rule-9: flow create 0 ingress pattern eth has_vlan is 1 / vlan / end \ ++ queue index 1 / end ++ rule-10: flow create 0 ingress pattern eth / vlan / end \ ++ queue index 1 / end ++ ++ + Generic flow API + ~~~~~~~~~~~~~~~~ + +diff --git a/drivers/net/hns3/hns3_fdir.h b/drivers/net/hns3/hns3_fdir.h +index 308cfbe..6ccd90a 100644 +--- a/drivers/net/hns3/hns3_fdir.h ++++ b/drivers/net/hns3/hns3_fdir.h +@@ -160,6 +160,10 @@ struct hns3_fdir_rule { + uint16_t nb_queues; + uint16_t location; + struct rte_flow_action_count act_cnt; ++ bool has_vlan_m; ++ bool has_vlan_v; ++ bool has_more_vlan_m; ++ bool has_more_vlan_v; + }; + + /* FDIR filter list structure */ +diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c +index 7fbe653..37eb2b4 100644 +--- a/drivers/net/hns3/hns3_flow.c ++++ b/drivers/net/hns3/hns3_flow.c +@@ -616,8 +616,8 @@ hns3_parse_eth(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, + if (item->spec == NULL && item->mask == NULL) + return 0; + +- if (item->mask) { +- eth_mask = item->mask; ++ eth_mask = item->mask; ++ if (eth_mask) { + if (eth_mask->hdr.ether_type) { + hns3_set_bit(rule->input_set, INNER_ETH_TYPE, 1); + rule->key_conf.mask.ether_type = +@@ -633,9 +633,16 @@ hns3_parse_eth(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, + memcpy(rule->key_conf.mask.dst_mac, + eth_mask->hdr.dst_addr.addr_bytes, RTE_ETHER_ADDR_LEN); + } ++ if (eth_mask->has_vlan) ++ rule->has_vlan_m = true; + } + + eth_spec = item->spec; ++ if (eth_mask && eth_mask->has_vlan && eth_spec->has_vlan) { ++ rule->key_conf.vlan_num++; ++ rule->has_vlan_v = true; ++ } ++ + rule->key_conf.spec.ether_type = rte_be_to_cpu_16(eth_spec->hdr.ether_type); + memcpy(rule->key_conf.spec.src_mac, eth_spec->hdr.src_addr.addr_bytes, + RTE_ETHER_ADDR_LEN); +@@ -651,6 +658,26 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, + const struct rte_flow_item_vlan *vlan_spec; + const struct rte_flow_item_vlan *vlan_mask; + ++ if (rule->has_vlan_m && !rule->has_vlan_v) ++ return rte_flow_error_set(error, EINVAL, ++ RTE_FLOW_ERROR_TYPE_ITEM, item, ++ "VLAN item is conflict with 'has_vlan is 0' in ETH item"); ++ ++ if (rule->has_more_vlan_m && !rule->has_more_vlan_v) ++ return rte_flow_error_set(error, EINVAL, ++ RTE_FLOW_ERROR_TYPE_ITEM, item, ++ "VLAN item is conflict with 'has_more_vlan is 0' in the previous VLAN item"); ++ ++ if (rule->has_vlan_m && rule->has_vlan_v) { ++ rule->has_vlan_m = false; ++ rule->key_conf.vlan_num--; ++ } ++ ++ if (rule->has_more_vlan_m && rule->has_more_vlan_v) { ++ rule->has_more_vlan_m = false; ++ rule->key_conf.vlan_num--; ++ } ++ + rule->key_conf.vlan_num++; + if (rule->key_conf.vlan_num > VLAN_TAG_NUM_MAX) + return rte_flow_error_set(error, EINVAL, +@@ -661,8 +688,8 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, + if (item->spec == NULL && item->mask == NULL) + return 0; + +- if (item->mask) { +- vlan_mask = item->mask; ++ vlan_mask = item->mask; ++ if (vlan_mask) { + if (vlan_mask->hdr.vlan_tci) { + if (rule->key_conf.vlan_num == 1) { + hns3_set_bit(rule->input_set, INNER_VLAN_TAG1, +@@ -676,6 +703,8 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, + rte_be_to_cpu_16(vlan_mask->hdr.vlan_tci); + } + } ++ if (vlan_mask->has_more_vlan) ++ rule->has_more_vlan_m = true; + } + + vlan_spec = item->spec; +@@ -685,6 +714,16 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, + else + rule->key_conf.spec.vlan_tag2 = + rte_be_to_cpu_16(vlan_spec->hdr.vlan_tci); ++ ++ if (vlan_mask && vlan_mask->has_more_vlan && vlan_spec->has_more_vlan) { ++ rule->key_conf.vlan_num++; ++ if (rule->key_conf.vlan_num > VLAN_TAG_NUM_MAX) ++ return rte_flow_error_set(error, EINVAL, ++ RTE_FLOW_ERROR_TYPE_ITEM, item, ++ "Vlan_num is more than 2"); ++ rule->has_more_vlan_v = true; ++ } ++ + return 0; + } + +-- +2.33.0 + diff --git a/0045-net-hns3-add-Rx-DMA-address-align-check.patch b/0045-net-hns3-add-Rx-DMA-address-align-check.patch new file mode 100644 index 0000000..dcfc7ad --- /dev/null +++ b/0045-net-hns3-add-Rx-DMA-address-align-check.patch @@ -0,0 +1,143 @@ +From 1f8c7c7852ba41f57f23989d87d235ea508b7bc1 Mon Sep 17 00:00:00 2001 +From: Chengwen Feng +Date: Mon, 15 Jul 2024 10:04:39 +0800 +Subject: [PATCH] net/hns3: add Rx DMA address align check + +[ upstream commit 3317515e9377c13e458e31a64f8987a9d1f2eaf6 ] + +The network engine has Rx DMA address align requirement, if this +requirement is violated, the Rx function will be abnormal. The detail +requirement is: +1) For HIP08 platform, require 64-bytes alignment. +2) For later platform, require 128-bytes alignment. + +The setup Rx DMA address exists both on the control and data plane, to +ensure performance, the alignment check is added only on the control +plane. + +Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations") +Cc: stable@dpdk.org + +Signed-off-by: Chengwen Feng +Signed-off-by: Jie Hai +--- + drivers/net/hns3/hns3_ethdev.c | 2 ++ + drivers/net/hns3/hns3_ethdev.h | 8 ++++++++ + drivers/net/hns3/hns3_ethdev_vf.c | 2 ++ + drivers/net/hns3/hns3_rxtx.c | 21 +++++++++++++++++++++ + 4 files changed, 33 insertions(+) + +diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c +index 9730b9a..2340fb2 100644 +--- a/drivers/net/hns3/hns3_ethdev.c ++++ b/drivers/net/hns3/hns3_ethdev.c +@@ -2738,6 +2738,7 @@ hns3_get_capability(struct hns3_hw *hw) + hw->rss_info.ipv6_sctp_offload_supported = false; + hw->udp_cksum_mode = HNS3_SPECIAL_PORT_SW_CKSUM_MODE; + pf->support_multi_tc_pause = false; ++ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_64; + return 0; + } + +@@ -2758,6 +2759,7 @@ hns3_get_capability(struct hns3_hw *hw) + hw->rss_info.ipv6_sctp_offload_supported = true; + hw->udp_cksum_mode = HNS3_SPECIAL_PORT_HW_CKSUM_MODE; + pf->support_multi_tc_pause = true; ++ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_128; + + return 0; + } +diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h +index e70c5ff..c190d51 100644 +--- a/drivers/net/hns3/hns3_ethdev.h ++++ b/drivers/net/hns3/hns3_ethdev.h +@@ -487,6 +487,9 @@ struct hns3_queue_intr { + #define HNS3_PKTS_DROP_STATS_MODE1 0 + #define HNS3_PKTS_DROP_STATS_MODE2 1 + ++#define HNS3_RX_DMA_ADDR_ALIGN_128 128 ++#define HNS3_RX_DMA_ADDR_ALIGN_64 64 ++ + struct hns3_hw { + struct rte_eth_dev_data *data; + void *io_base; +@@ -554,6 +557,11 @@ struct hns3_hw { + * direction. + */ + uint8_t min_tx_pkt_len; ++ /* ++ * The required alignment of the DMA address of the RX buffer. ++ * See HNS3_RX_DMA_ADDR_ALIGN_XXX for available values. ++ */ ++ uint16_t rx_dma_addr_align; + + struct hns3_queue_intr intr; + /* +diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c +index 4eeb46a..465280d 100644 +--- a/drivers/net/hns3/hns3_ethdev_vf.c ++++ b/drivers/net/hns3/hns3_ethdev_vf.c +@@ -707,6 +707,7 @@ hns3vf_get_capability(struct hns3_hw *hw) + hw->min_tx_pkt_len = HNS3_HIP08_MIN_TX_PKT_LEN; + hw->rss_info.ipv6_sctp_offload_supported = false; + hw->promisc_mode = HNS3_UNLIMIT_PROMISC_MODE; ++ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_64; + return 0; + } + +@@ -724,6 +725,7 @@ hns3vf_get_capability(struct hns3_hw *hw) + hw->drop_stats_mode = HNS3_PKTS_DROP_STATS_MODE2; + hw->rss_info.ipv6_sctp_offload_supported = true; + hw->promisc_mode = HNS3_LIMIT_PROMISC_MODE; ++ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_128; + + return 0; + } +diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c +index d43cc96..0203bde 100644 +--- a/drivers/net/hns3/hns3_rxtx.c ++++ b/drivers/net/hns3/hns3_rxtx.c +@@ -273,12 +273,27 @@ hns3_free_all_queues(struct rte_eth_dev *dev) + hns3_free_tx_queues(dev); + } + ++static int ++hns3_check_rx_dma_addr(struct hns3_hw *hw, uint64_t dma_addr) ++{ ++ uint64_t rem; ++ ++ rem = dma_addr & (hw->rx_dma_addr_align - 1); ++ if (rem > 0) { ++ hns3_err(hw, "The IO address of the beginning of the mbuf data " ++ "must be %u-byte aligned", hw->rx_dma_addr_align); ++ return -EINVAL; ++ } ++ return 0; ++} ++ + static int + hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq) + { + struct rte_mbuf *mbuf; + uint64_t dma_addr; + uint16_t i; ++ int ret; + + for (i = 0; i < rxq->nb_rx_desc; i++) { + mbuf = rte_mbuf_raw_alloc(rxq->mb_pool); +@@ -299,6 +314,12 @@ hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq) + dma_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf)); + rxq->rx_ring[i].addr = dma_addr; + rxq->rx_ring[i].rx.bd_base_info = 0; ++ ++ ret = hns3_check_rx_dma_addr(hw, dma_addr); ++ if (ret != 0) { ++ hns3_rx_queue_release_mbufs(rxq); ++ return ret; ++ } + } + + return 0; +-- +2.33.0 + diff --git a/dpdk.spec b/dpdk.spec index 74704f6..91a366a 100644 --- a/dpdk.spec +++ b/dpdk.spec @@ -10,7 +10,7 @@ Name: dpdk Version: 23.11 -Release: 18 +Release: 19 URL: http://dpdk.org Source: https://fast.dpdk.org/rel/dpdk-%{version}.tar.xz @@ -68,6 +68,9 @@ Patch6042: 0042-dma-hisilicon-remove-support-for-HIP09-platform.patch Patch9037: 0043-remove-symbol-for-examples-and-app.patch +Patch6044: 0044-net-hns3-support-more-VLAN-fields-matching.patch +Patch6045: 0045-net-hns3-add-Rx-DMA-address-align-check.patch + BuildRequires: meson BuildRequires: python3-pyelftools BuildRequires: diffutils @@ -263,6 +266,11 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko %endif %changelog +* Tue Jul 23 2024 huangdengdui - 23.11-19 + Support more VLAN fields matching for hns3 and sync a bugfix + - net/hns3: add Rx DMA address align check + - net/hns3: support more VLAN fields matching + * Mon May 13 2024 yinbin - 23.11-18 - change dpdk-* in dpdk-tools from dynamic build to static build - add -s flag to remove symbols of dpdk-* in dpdk-tools -- Gitee