diff --git a/0001-gdb-Add-LoongArch-bfd-support.patch b/0001-gdb-Add-LoongArch-bfd-support.patch
index 5287fb294ef847778591076e1397bae8ff63a5db..346c6ccb9a92892edc5622eda84bd169581bc576 100644
--- a/0001-gdb-Add-LoongArch-bfd-support.patch
+++ b/0001-gdb-Add-LoongArch-bfd-support.patch
@@ -32,10 +32,10 @@ Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
  create mode 100644 gdb-11.1/bfd/elfxx-loongarch.h
  create mode 100644 gdb-11.1/include/elf/loongarch.h
 
-diff --git a/gdb-11.1/bfd/Makefile.am b/gdb-11.1/bfd/Makefile.am
+diff --git a/bfd/Makefile.am b/bfd/Makefile.am
 index ed2f701..097177b 100644
---- a/gdb-11.1/bfd/Makefile.am
-+++ b/gdb-11.1/bfd/Makefile.am
+--- a/bfd/Makefile.am
++++ b/bfd/Makefile.am
 @@ -118,6 +118,7 @@ ALL_MACHINES = \
  	cpu-ip2k.lo \
  	cpu-iq2000.lo \
@@ -102,10 +102,10 @@ index ed2f701..097177b 100644
  elf32-riscv.c : elfnn-riscv.c
  	echo "#line 1 \"elfnn-riscv.c\"" > $@
  	$(SED) -e s/NN/32/g < $< >> $@
-diff --git a/gdb-11.1/bfd/Makefile.in b/gdb-11.1/bfd/Makefile.in
+diff --git a/bfd/Makefile.in b/bfd/Makefile.in
 index 12807d9..a76b653 100644
---- a/gdb-11.1/bfd/Makefile.in
-+++ b/gdb-11.1/bfd/Makefile.in
+--- a/bfd/Makefile.in
++++ b/bfd/Makefile.in
 @@ -543,6 +543,7 @@ ALL_MACHINES = \
  	cpu-ip2k.lo \
  	cpu-iq2000.lo \
@@ -204,10 +204,10 @@ index 12807d9..a76b653 100644
  elf32-riscv.c : elfnn-riscv.c
  	echo "#line 1 \"elfnn-riscv.c\"" > $@
  	$(SED) -e s/NN/32/g < $< >> $@
-diff --git a/gdb-11.1/bfd/archures.c b/gdb-11.1/bfd/archures.c
+diff --git a/bfd/archures.c b/bfd/archures.c
 index 390691b..b1e8869 100644
---- a/gdb-11.1/bfd/archures.c
-+++ b/gdb-11.1/bfd/archures.c
+--- a/bfd/archures.c
++++ b/bfd/archures.c
 @@ -555,6 +555,9 @@ DESCRIPTION
  .#define bfd_mach_ck807		6
  .#define bfd_mach_ck810		7
@@ -234,10 +234,10 @@ index 390691b..b1e8869 100644
      &bfd_m32c_arch,
      &bfd_m32r_arch,
      &bfd_m68hc11_arch,
-diff --git a/gdb-11.1/bfd/bfd-in2.h b/gdb-11.1/bfd/bfd-in2.h
+diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
 index 57b3c45..ca9e814 100644
---- a/gdb-11.1/bfd/bfd-in2.h
-+++ b/gdb-11.1/bfd/bfd-in2.h
+--- a/bfd/bfd-in2.h
++++ b/bfd/bfd-in2.h
 @@ -1932,6 +1932,9 @@ enum bfd_architecture
  #define bfd_mach_ck807         6
  #define bfd_mach_ck810         7
@@ -300,10 +300,10 @@ index 57b3c45..ca9e814 100644
    BFD_RELOC_UNUSED };
  
  typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
-diff --git a/gdb-11.1/bfd/config.bfd b/gdb-11.1/bfd/config.bfd
+diff --git a/bfd/config.bfd b/bfd/config.bfd
 index 30087e3..a5ed3da 100644
---- a/gdb-11.1/bfd/config.bfd
-+++ b/gdb-11.1/bfd/config.bfd
+--- a/bfd/config.bfd
++++ b/bfd/config.bfd
 @@ -182,6 +182,7 @@ hppa*)		 targ_archs=bfd_hppa_arch ;;
  i[3-7]86)	 targ_archs=bfd_i386_arch ;;
  ia16)		 targ_archs=bfd_i386_arch ;;
@@ -333,10 +333,10 @@ index 30087e3..a5ed3da 100644
  # END OF targmatch.h
    bpf-*-*)
      echo "*** Configuration $targ is not fully supported." >&2
-diff --git a/gdb-11.1/bfd/configure b/gdb-11.1/bfd/configure
+diff --git a/bfd/configure b/bfd/configure
 index daa5124..e6c7fb7 100755
---- a/gdb-11.1/bfd/configure
-+++ b/gdb-11.1/bfd/configure
+--- a/bfd/configure
++++ b/bfd/configure
 @@ -13338,6 +13338,8 @@ do
      l1om_elf64_fbsd_vec)	 tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
      lm32_elf32_vec)		 tb="$tb elf32-lm32.lo elf32.lo $elf" ;;
@@ -346,10 +346,10 @@ index daa5124..e6c7fb7 100755
      m32c_elf32_vec)		 tb="$tb elf32-m32c.lo elf32.lo $elf" ;;
      m32r_elf32_vec)		 tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
      m32r_elf32_le_vec)		 tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
-diff --git a/gdb-11.1/bfd/configure.ac b/gdb-11.1/bfd/configure.ac
+diff --git a/bfd/configure.ac b/bfd/configure.ac
 index 07a75ed..f1da356 100644
---- a/gdb-11.1/bfd/configure.ac
-+++ b/gdb-11.1/bfd/configure.ac
+--- a/bfd/configure.ac
++++ b/bfd/configure.ac
 @@ -528,6 +528,8 @@ do
      l1om_elf64_fbsd_vec)	 tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
      lm32_elf32_vec)		 tb="$tb elf32-lm32.lo elf32.lo $elf" ;;
@@ -359,11 +359,11 @@ index 07a75ed..f1da356 100644
      m32c_elf32_vec)		 tb="$tb elf32-m32c.lo elf32.lo $elf" ;;
      m32r_elf32_vec)		 tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
      m32r_elf32_le_vec)		 tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
-diff --git a/gdb-11.1/bfd/cpu-loongarch.c b/gdb-11.1/bfd/cpu-loongarch.c
+diff --git a/bfd/cpu-loongarch.c b/bfd/cpu-loongarch.c
 new file mode 100644
 index 0000000..e866c3e
 --- /dev/null
-+++ b/gdb-11.1/bfd/cpu-loongarch.c
++++ b/bfd/cpu-loongarch.c
 @@ -0,0 +1,61 @@
 +/* BFD support for LoongArch.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -426,10 +426,10 @@ index 0000000..e866c3e
 +  &bfd_loongarch32_arch,	/* Next in list.  */
 +  0,
 +};
-diff --git a/gdb-11.1/bfd/elf-bfd.h b/gdb-11.1/bfd/elf-bfd.h
+diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
 index 8f985ab..651db97 100644
---- a/gdb-11.1/bfd/elf-bfd.h
-+++ b/gdb-11.1/bfd/elf-bfd.h
+--- a/bfd/elf-bfd.h
++++ b/bfd/elf-bfd.h
 @@ -508,6 +508,7 @@ enum elf_target_id
    I386_ELF_DATA,
    IA64_ELF_DATA,
@@ -453,10 +453,10 @@ index 8f985ab..651db97 100644
  
  /* Internal structure which holds information to be included in the
     PRPSINFO section of Linux core files.
-diff --git a/gdb-11.1/bfd/elf.c b/gdb-11.1/bfd/elf.c
+diff --git a/bfd/elf.c b/bfd/elf.c
 index 8f6531f..d71fe79 100644
---- a/gdb-11.1/bfd/elf.c
-+++ b/gdb-11.1/bfd/elf.c
+--- a/bfd/elf.c
++++ b/bfd/elf.c
 @@ -9958,6 +9958,30 @@ elfcore_grok_gdb_tdesc (bfd *abfd, Elf_Internal_Note *note)
    return elfcore_make_note_pseudosection (abfd, ".gdb-tdesc", note);
  }
@@ -594,11 +594,11 @@ index 8f6531f..d71fe79 100644
    return NULL;
  }
  
-diff --git a/gdb-11.1/bfd/elfnn-loongarch.c b/gdb-11.1/bfd/elfnn-loongarch.c
+diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c
 new file mode 100644
 index 0000000..8aaf157
 --- /dev/null
-+++ b/gdb-11.1/bfd/elfnn-loongarch.c
++++ b/bfd/elfnn-loongarch.c
 @@ -0,0 +1,3425 @@
 +/* LoongArch-specific support for NN-bit ELF.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -4025,11 +4025,11 @@ index 0000000..8aaf157
 +#define elf_backend_grok_psinfo loongarch_elf_grok_psinfo
 +
 +#include "elfNN-target.h"
-diff --git a/gdb-11.1/bfd/elfxx-loongarch.c b/gdb-11.1/bfd/elfxx-loongarch.c
+diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c
 new file mode 100644
 index 0000000..6f7c822
 --- /dev/null
-+++ b/gdb-11.1/bfd/elfxx-loongarch.c
++++ b/bfd/elfxx-loongarch.c
 @@ -0,0 +1,891 @@
 +/* LoongArch-specific support for ELF.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -4922,11 +4922,11 @@ index 0000000..6f7c822
 +  return ((loongarch_reloc_howto_type *)
 +	  howto)->adjust_reloc_bits(howto, fix_val);
 +}
-diff --git a/gdb-11.1/bfd/elfxx-loongarch.h b/gdb-11.1/bfd/elfxx-loongarch.h
+diff --git a/bfd/elfxx-loongarch.h b/bfd/elfxx-loongarch.h
 new file mode 100644
 index 0000000..8ea63d0
 --- /dev/null
-+++ b/gdb-11.1/bfd/elfxx-loongarch.h
++++ b/bfd/elfxx-loongarch.h
 @@ -0,0 +1,41 @@
 +/* LoongArch-specific backend routines.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -4969,10 +4969,10 @@ index 0000000..8ea63d0
 +	|| ELF_ST_VISIBILITY ((H)->other) != STV_DEFAULT) \
 +	&& (H)->def_regular \
 +	&& (H)->type == STT_GNU_IFUNC))
-diff --git a/gdb-11.1/bfd/libbfd.h b/gdb-11.1/bfd/libbfd.h
+diff --git a/bfd/libbfd.h b/bfd/libbfd.h
 index c37ddc0..48e2978 100644
---- a/gdb-11.1/bfd/libbfd.h
-+++ b/gdb-11.1/bfd/libbfd.h
+--- a/bfd/libbfd.h
++++ b/bfd/libbfd.h
 @@ -3413,6 +3413,49 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
    "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4",
    "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4",
@@ -5023,10 +5023,10 @@ index c37ddc0..48e2978 100644
   "@@overflow: BFD_RELOC_UNUSED@@",
  };
  #endif
-diff --git a/gdb-11.1/bfd/po/BLD-POTFILES.in b/gdb-11.1/bfd/po/BLD-POTFILES.in
+diff --git a/bfd/po/BLD-POTFILES.in b/bfd/po/BLD-POTFILES.in
 index f81e2b4..0ecbbcf 100644
---- a/gdb-11.1/bfd/po/BLD-POTFILES.in
-+++ b/gdb-11.1/bfd/po/BLD-POTFILES.in
+--- a/bfd/po/BLD-POTFILES.in
++++ b/bfd/po/BLD-POTFILES.in
 @@ -1,10 +1,12 @@
  bfdver.h
  elf32-aarch64.c
@@ -5040,10 +5040,10 @@ index f81e2b4..0ecbbcf 100644
  elf64-riscv.c
  elf64-target.h
  peigen.c
-diff --git a/gdb-11.1/bfd/po/SRC-POTFILES.in b/gdb-11.1/bfd/po/SRC-POTFILES.in
+diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in
 index c83b86c..cd41295 100644
---- a/gdb-11.1/bfd/po/SRC-POTFILES.in
-+++ b/gdb-11.1/bfd/po/SRC-POTFILES.in
+--- a/bfd/po/SRC-POTFILES.in
++++ b/bfd/po/SRC-POTFILES.in
 @@ -72,6 +72,7 @@ cpu-iq2000.c
  cpu-k1om.c
  cpu-l1om.c
@@ -5061,10 +5061,10 @@ index c83b86c..cd41295 100644
  elfxx-mips.c
  elfxx-mips.h
  elfxx-riscv.c
-diff --git a/gdb-11.1/bfd/reloc.c b/gdb-11.1/bfd/reloc.c
+diff --git a/bfd/reloc.c b/bfd/reloc.c
 index 6d920e1..30826fe 100644
---- a/gdb-11.1/bfd/reloc.c
-+++ b/gdb-11.1/bfd/reloc.c
+--- a/bfd/reloc.c
++++ b/bfd/reloc.c
 @@ -8171,6 +8171,95 @@ ENUM
  ENUMDOC
    S12Z relocations.
@@ -5161,10 +5161,10 @@ index 6d920e1..30826fe 100644
  ENDSENUM
    BFD_RELOC_UNUSED
  CODE_FRAGMENT
-diff --git a/gdb-11.1/bfd/targets.c b/gdb-11.1/bfd/targets.c
+diff --git a/bfd/targets.c b/bfd/targets.c
 index 89b49e7..8f5abb1 100644
---- a/gdb-11.1/bfd/targets.c
-+++ b/gdb-11.1/bfd/targets.c
+--- a/bfd/targets.c
++++ b/bfd/targets.c
 @@ -768,6 +768,8 @@ extern const bfd_target l1om_elf64_vec;
  extern const bfd_target l1om_elf64_fbsd_vec;
  extern const bfd_target lm32_elf32_vec;
@@ -5187,10 +5187,10 @@ index 89b49e7..8f5abb1 100644
  #endif /* not SELECT_VECS */
  
  /* Always support S-records, for convenience.  */
-diff --git a/gdb-11.1/include/elf/common.h b/gdb-11.1/include/elf/common.h
+diff --git a/include/elf/common.h b/include/elf/common.h
 index 7eefef9..972a2d0 100644
---- a/gdb-11.1/include/elf/common.h
-+++ b/gdb-11.1/include/elf/common.h
+--- a/include/elf/common.h
++++ b/include/elf/common.h
 @@ -677,8 +677,18 @@
  					/*   note name must be "LINUX".  */
  #define NT_ARC_V2	0x600		/* ARC HS accumulator/extra registers.  */
@@ -5211,11 +5211,11 @@ index 7eefef9..972a2d0 100644
  #define NT_SIGINFO	0x53494749	/* Fields of siginfo_t.  */
  #define NT_FILE		0x46494c45	/* Description of mapped files.  */
  
-diff --git a/gdb-11.1/include/elf/loongarch.h b/gdb-11.1/include/elf/loongarch.h
+diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h
 new file mode 100644
 index 0000000..b7aa4ff
 --- /dev/null
-+++ b/gdb-11.1/include/elf/loongarch.h
++++ b/include/elf/loongarch.h
 @@ -0,0 +1,128 @@
 +/* Copyright (C) 2021-2022 Free Software Foundation, Inc.
 +   Contributed by Loongson Ltd.
diff --git a/0002-gdb-Add-LoongArch-opcodes-support.patch b/0002-gdb-Add-LoongArch-opcodes-support.patch
index e8b9fb2bcd5b7661b006eda07792f572795a0c84..e9c0d79a498d0ff7c2df8d85fb3fc3a61695c692 100644
--- a/0002-gdb-Add-LoongArch-opcodes-support.patch
+++ b/0002-gdb-Add-LoongArch-opcodes-support.patch
@@ -23,10 +23,10 @@ Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
  create mode 100644 gdb-11.1/opcodes/loongarch-dis.c
  create mode 100644 gdb-11.1/opcodes/loongarch-opc.c
 
-diff --git a/gdb-11.1/include/dis-asm.h b/gdb-11.1/include/dis-asm.h
+diff --git a/include/dis-asm.h b/include/dis-asm.h
 index 0b91ab4..c0bc1d5 100644
---- a/gdb-11.1/include/dis-asm.h
-+++ b/gdb-11.1/include/dis-asm.h
+--- a/include/dis-asm.h
++++ b/include/dis-asm.h
 @@ -307,6 +307,7 @@ extern void print_arm_disassembler_options (FILE *);
  extern void print_arc_disassembler_options (FILE *);
  extern void print_s390_disassembler_options (FILE *);
@@ -35,11 +35,11 @@ index 0b91ab4..c0bc1d5 100644
  extern bool aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
  extern bool arm_symbol_is_valid (asymbol *, struct disassemble_info *);
  extern bool csky_symbol_is_valid (asymbol *, struct disassemble_info *);
-diff --git a/gdb-11.1/include/opcode/loongarch.h b/gdb-11.1/include/opcode/loongarch.h
+diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h
 new file mode 100644
 index 0000000..c392234
 --- /dev/null
-+++ b/gdb-11.1/include/opcode/loongarch.h
++++ b/include/opcode/loongarch.h
 @@ -0,0 +1,239 @@
 +/* LoongArch assembler/disassembler support.
 +
@@ -280,10 +280,10 @@ index 0000000..c392234
 +#endif
 +
 +#endif /* _LOONGARCH_H_ */
-diff --git a/gdb-11.1/opcodes/Makefile.am b/gdb-11.1/opcodes/Makefile.am
+diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
 index 0e04b4c..c45fc29 100644
---- a/gdb-11.1/opcodes/Makefile.am
-+++ b/gdb-11.1/opcodes/Makefile.am
+--- a/opcodes/Makefile.am
++++ b/opcodes/Makefile.am
 @@ -164,6 +164,9 @@ TARGET_LIBOPCODES_CFILES = \
  	lm32-ibld.c \
  	lm32-opc.c \
@@ -294,10 +294,10 @@ index 0e04b4c..c45fc29 100644
  	m10200-dis.c \
  	m10200-opc.c \
  	m10300-dis.c \
-diff --git a/gdb-11.1/opcodes/Makefile.in b/gdb-11.1/opcodes/Makefile.in
+diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
 index 42c15f0..8ba01c9 100644
---- a/gdb-11.1/opcodes/Makefile.in
-+++ b/gdb-11.1/opcodes/Makefile.in
+--- a/opcodes/Makefile.in
++++ b/opcodes/Makefile.in
 @@ -555,6 +555,9 @@ TARGET_LIBOPCODES_CFILES = \
  	lm32-ibld.c \
  	lm32-opc.c \
@@ -318,10 +318,10 @@ index 42c15f0..8ba01c9 100644
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-dis.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-opc.Plo@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10300-dis.Plo@am__quote@
-diff --git a/gdb-11.1/opcodes/configure b/gdb-11.1/opcodes/configure
+diff --git a/opcodes/configure b/opcodes/configure
 index 3513e40..8b0d15b 100755
---- a/gdb-11.1/opcodes/configure
-+++ b/gdb-11.1/opcodes/configure
+--- a/opcodes/configure
++++ b/opcodes/configure
 @@ -11,7 +11,7 @@
  ## -------------------- ##
  ## M4sh Initialization. ##
@@ -339,10 +339,10 @@ index 3513e40..8b0d15b 100755
  
  	"")			;;
  	*)		as_fn_error $? "*** unknown target architecture $arch" "$LINENO" 5 ;;
-diff --git a/gdb-11.1/opcodes/configure.ac b/gdb-11.1/opcodes/configure.ac
+diff --git a/opcodes/configure.ac b/opcodes/configure.ac
 index e564f06..4853b9e 100644
---- a/gdb-11.1/opcodes/configure.ac
-+++ b/gdb-11.1/opcodes/configure.ac
+--- a/opcodes/configure.ac
++++ b/opcodes/configure.ac
 @@ -355,6 +355,7 @@ if test x${all_targets} = xfalse ; then
  	bfd_z80_arch)		ta="$ta z80-dis.lo" ;;
  	bfd_z8k_arch)		ta="$ta z8k-dis.lo" ;;
@@ -351,10 +351,10 @@ index e564f06..4853b9e 100644
  
  	"")			;;
  	*)		AC_MSG_ERROR(*** unknown target architecture $arch) ;;
-diff --git a/gdb-11.1/opcodes/disassemble.c b/gdb-11.1/opcodes/disassemble.c
+diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
 index 8590e94..61e666c 100644
---- a/gdb-11.1/opcodes/disassemble.c
-+++ b/gdb-11.1/opcodes/disassemble.c
+--- a/opcodes/disassemble.c
++++ b/opcodes/disassemble.c
 @@ -49,6 +49,7 @@
  #define ARCH_ip2k
  #define ARCH_iq2000
@@ -385,10 +385,10 @@ index 8590e94..61e666c 100644
  
    return;
  }
-diff --git a/gdb-11.1/opcodes/disassemble.h b/gdb-11.1/opcodes/disassemble.h
+diff --git a/opcodes/disassemble.h b/opcodes/disassemble.h
 index 8ee54dc..4e3ea23 100644
---- a/gdb-11.1/opcodes/disassemble.h
-+++ b/gdb-11.1/opcodes/disassemble.h
+--- a/opcodes/disassemble.h
++++ b/opcodes/disassemble.h
 @@ -100,6 +100,7 @@ extern int print_insn_xtensa		(bfd_vma, disassemble_info *);
  extern int print_insn_z80		(bfd_vma, disassemble_info *);
  extern int print_insn_z8001		(bfd_vma, disassemble_info *);
@@ -397,11 +397,11 @@ index 8ee54dc..4e3ea23 100644
  
  extern disassembler_ftype csky_get_disassembler (bfd *);
  extern disassembler_ftype rl78_get_disassembler (bfd *);
-diff --git a/gdb-11.1/opcodes/loongarch-coder.c b/gdb-11.1/opcodes/loongarch-coder.c
+diff --git a/opcodes/loongarch-coder.c b/opcodes/loongarch-coder.c
 new file mode 100644
 index 0000000..f5e10b9
 --- /dev/null
-+++ b/gdb-11.1/opcodes/loongarch-coder.c
++++ b/opcodes/loongarch-coder.c
 @@ -0,0 +1,481 @@
 +/* LoongArch opcode support.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -884,11 +884,11 @@ index 0000000..f5e10b9
 +      *dest++ = *src++;
 +    }
 +}
-diff --git a/gdb-11.1/opcodes/loongarch-dis.c b/gdb-11.1/opcodes/loongarch-dis.c
+diff --git a/opcodes/loongarch-dis.c b/opcodes/loongarch-dis.c
 new file mode 100644
 index 0000000..9dcf989
 --- /dev/null
-+++ b/gdb-11.1/opcodes/loongarch-dis.c
++++ b/opcodes/loongarch-dis.c
 @@ -0,0 +1,342 @@
 +/* LoongArch opcode support.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -1232,11 +1232,11 @@ index 0000000..9dcf989
 +  my_disinfo.target = pc;
 +  disassemble_one (insn, &my_disinfo);
 +}
-diff --git a/gdb-11.1/opcodes/loongarch-opc.c b/gdb-11.1/opcodes/loongarch-opc.c
+diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
 new file mode 100644
 index 0000000..62a2edb
 --- /dev/null
-+++ b/gdb-11.1/opcodes/loongarch-opc.c
++++ b/opcodes/loongarch-opc.c
 @@ -0,0 +1,798 @@
 +/* LoongArch opcode support.
 +   Copyright (C) 2021-2022 Free Software Foundation, Inc.
@@ -2036,10 +2036,10 @@ index 0000000..62a2edb
 +  { &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes,	0, 0, { 0 }, 0, 0 },
 +  { 0 },
 +};
-diff --git a/gdb-11.1/opcodes/po/POTFILES.in b/gdb-11.1/opcodes/po/POTFILES.in
+diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in
 index 0659b99..b1037a4 100644
---- a/gdb-11.1/opcodes/po/POTFILES.in
-+++ b/gdb-11.1/opcodes/po/POTFILES.in
+--- a/opcodes/po/POTFILES.in
++++ b/opcodes/po/POTFILES.in
 @@ -111,6 +111,9 @@ lm32-ibld.c
  lm32-opc.c
  lm32-opc.h
diff --git a/0003-gdb-Add-LoongArch-gdb-support.patch b/0003-gdb-Add-LoongArch-gdb-support.patch
index 105eaad2d02ad7ad16703f99bf242aefcbd29d4a..f3b53e8bafd4b93b9d93a57749a01431a455459f 100644
--- a/0003-gdb-Add-LoongArch-gdb-support.patch
+++ b/0003-gdb-Add-LoongArch-gdb-support.patch
@@ -73,10 +73,10 @@ Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
  create mode 100644 gdb-11.1/gdb/nat/loongarch-linux-watch.c
  create mode 100644 gdb-11.1/gdb/nat/loongarch-linux-watch.h
 
-diff --git a/gdb-11.1/gdb/Makefile.in b/gdb-11.1/gdb/Makefile.in
+diff --git a/gdb/Makefile.in b/gdb/Makefile.in
 index b8729ed..c9cbc5d 100644
---- a/gdb-11.1/gdb/Makefile.in
-+++ b/gdb-11.1/gdb/Makefile.in
+--- a/gdb/Makefile.in
++++ b/gdb/Makefile.in
 @@ -726,6 +726,8 @@ ALL_TARGET_OBS = \
  	arch/i386.o \
  	arch/ppc-linux-common.o \
@@ -132,11 +132,11 @@ index b8729ed..c9cbc5d 100644
  	m32r-linux-nat.c \
  	m32r-linux-tdep.c \
  	m32r-tdep.c \
-diff --git a/gdb-11.1/gdb/arch/loongarch-linux-nat.c b/gdb-11.1/gdb/arch/loongarch-linux-nat.c
+diff --git a/gdb/arch/loongarch-linux-nat.c b/gdb/arch/loongarch-linux-nat.c
 new file mode 100644
 index 0000000..70bf742
 --- /dev/null
-+++ b/gdb-11.1/gdb/arch/loongarch-linux-nat.c
++++ b/gdb/arch/loongarch-linux-nat.c
 @@ -0,0 +1,94 @@
 +/* Copyright (C) 2021 Free Software Foundation, Inc.
 +
@@ -232,11 +232,11 @@ index 0000000..70bf742
 +  return loongarch_create_target_description (rlen, fpu32, fpu64, lbt, lsx,
 +					      lasx);
 +}
-diff --git a/gdb-11.1/gdb/arch/loongarch-linux-nat.h b/gdb-11.1/gdb/arch/loongarch-linux-nat.h
+diff --git a/gdb/arch/loongarch-linux-nat.h b/gdb/arch/loongarch-linux-nat.h
 new file mode 100644
 index 0000000..a9cd453
 --- /dev/null
-+++ b/gdb-11.1/gdb/arch/loongarch-linux-nat.h
++++ b/gdb/arch/loongarch-linux-nat.h
 @@ -0,0 +1,35 @@
 +/*
 +   Copyright (C) 2021 Free Software Foundation, Inc.
@@ -273,11 +273,11 @@ index 0000000..a9cd453
 +extern struct target_desc *loongarch_linux_read_description_runtime (int tid);
 +
 +#endif
-diff --git a/gdb-11.1/gdb/arch/loongarch.c b/gdb-11.1/gdb/arch/loongarch.c
+diff --git a/gdb/arch/loongarch.c b/gdb/arch/loongarch.c
 new file mode 100644
 index 0000000..007c638
 --- /dev/null
-+++ b/gdb-11.1/gdb/arch/loongarch.c
++++ b/gdb/arch/loongarch.c
 @@ -0,0 +1,84 @@
 +/* Copyright (C) 2021 Free Software Foundation, Inc.
 +
@@ -363,11 +363,11 @@ index 0000000..007c638
 +    gdb_assert_not_reached ("rlen unknown");
 +  return NULL;
 +}
-diff --git a/gdb-11.1/gdb/arch/loongarch.h b/gdb-11.1/gdb/arch/loongarch.h
+diff --git a/gdb/arch/loongarch.h b/gdb/arch/loongarch.h
 new file mode 100644
 index 0000000..9d9f65b
 --- /dev/null
-+++ b/gdb-11.1/gdb/arch/loongarch.h
++++ b/gdb/arch/loongarch.h
 @@ -0,0 +1,37 @@
 +/*
 +   Copyright (C) 2021 Free Software Foundation, Inc.
@@ -406,10 +406,10 @@ index 0000000..9d9f65b
 +				     int lsx, int lasx);
 +
 +#endif
-diff --git a/gdb-11.1/gdb/configure.host b/gdb-11.1/gdb/configure.host
+diff --git a/gdb/configure.host b/gdb/configure.host
 index e94a19b..21a4310 100644
---- a/gdb-11.1/gdb/configure.host
-+++ b/gdb-11.1/gdb/configure.host
+--- a/gdb/configure.host
++++ b/gdb/configure.host
 @@ -64,6 +64,7 @@ arc*)			gdb_host_cpu=arc ;;
  arm*)			gdb_host_cpu=arm ;;
  hppa*)			gdb_host_cpu=pa ;;
@@ -427,10 +427,10 @@ index e94a19b..21a4310 100644
  m68*-*-linux*)		gdb_host=linux ;;
  m68*-*-netbsdelf* | m68*-*-knetbsd*-gnu)
  			gdb_host=nbsdelf ;;
-diff --git a/gdb-11.1/gdb/configure.nat b/gdb-11.1/gdb/configure.nat
+diff --git a/gdb/configure.nat b/gdb/configure.nat
 index e34cccf..ce5cbc7 100644
---- a/gdb-11.1/gdb/configure.nat
-+++ b/gdb-11.1/gdb/configure.nat
+--- a/gdb/configure.nat
++++ b/gdb/configure.nat
 @@ -258,6 +258,10 @@ case ${gdb_host} in
  		# Host: Intel IA-64 running GNU/Linux
  		NATDEPFILES="${NATDEPFILES} ia64-linux-nat.o"
@@ -442,10 +442,10 @@ index e34cccf..ce5cbc7 100644
  	    m32r)
  		# Host: M32R based machine running GNU/Linux
  		NATDEPFILES="${NATDEPFILES} m32r-linux-nat.o"
-diff --git a/gdb-11.1/gdb/configure.tgt b/gdb-11.1/gdb/configure.tgt
+diff --git a/gdb/configure.tgt b/gdb/configure.tgt
 index 97a5a57..0b24ee2 100644
---- a/gdb-11.1/gdb/configure.tgt
-+++ b/gdb-11.1/gdb/configure.tgt
+--- a/gdb/configure.tgt
++++ b/gdb/configure.tgt
 @@ -97,6 +97,9 @@ xtensa*)
  	cpu_obs="xtensa-tdep.o xtensa-config.o solib-svr4.o"
  	;;
@@ -468,10 +468,10 @@ index 97a5a57..0b24ee2 100644
  m32c-*-*)
  	# Target: Renesas M32C family
  	gdb_target_obs="m32c-tdep.o"
-diff --git a/gdb-11.1/gdb/doc/gdb.texinfo b/gdb-11.1/gdb/doc/gdb.texinfo
+diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
 index 8608c86..d563d59 100644
---- a/gdb-11.1/gdb/doc/gdb.texinfo
-+++ b/gdb-11.1/gdb/doc/gdb.texinfo
+--- a/gdb/doc/gdb.texinfo
++++ b/gdb/doc/gdb.texinfo
 @@ -46047,6 +46047,7 @@ registers using the capitalization used in the description.
  * ARC Features::
  * ARM Features::
@@ -496,10 +496,10 @@ index 8608c86..d563d59 100644
  @node MicroBlaze Features
  @subsection MicroBlaze Features
  @cindex target descriptions, MicroBlaze features
-diff --git a/gdb-11.1/gdb/features/Makefile b/gdb-11.1/gdb/features/Makefile
+diff --git a/gdb/features/Makefile b/gdb/features/Makefile
 index ded8c3b..504e689 100644
---- a/gdb-11.1/gdb/features/Makefile
-+++ b/gdb-11.1/gdb/features/Makefile
+--- a/gdb/features/Makefile
++++ b/gdb/features/Makefile
 @@ -74,6 +74,7 @@ arm-expedite = r11,sp,pc
  i386-expedite = ebp,esp,eip
  amd64-expedite = rbp,rsp,rip
@@ -531,11 +531,11 @@ index ded8c3b..504e689 100644
  	riscv/rv32e-xregs.xml \
  	riscv/32bit-cpu.xml \
  	riscv/32bit-fpu.xml \
-diff --git a/gdb-11.1/gdb/features/loongarch/base32.c b/gdb-11.1/gdb/features/loongarch/base32.c
+diff --git a/gdb/features/loongarch/base32.c b/gdb/features/loongarch/base32.c
 new file mode 100644
 index 0000000..b6f2d06
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/base32.c
++++ b/gdb/features/loongarch/base32.c
 @@ -0,0 +1,47 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: base32.xml */
@@ -584,11 +584,11 @@ index 0000000..b6f2d06
 +  tdesc_create_reg (feature, "badvaddr", regnum++, 1, "general", 32, "code_ptr");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/base32.xml b/gdb-11.1/gdb/features/loongarch/base32.xml
+diff --git a/gdb/features/loongarch/base32.xml b/gdb/features/loongarch/base32.xml
 new file mode 100644
 index 0000000..0afe81b
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/base32.xml
++++ b/gdb/features/loongarch/base32.xml
 @@ -0,0 +1,45 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -635,11 +635,11 @@ index 0000000..0afe81b
 +  <reg name="pc" bitsize="32" type="code_ptr" group="general"/>
 +  <reg name="badvaddr" bitsize="32" type="code_ptr" group="general"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/base64.c b/gdb-11.1/gdb/features/loongarch/base64.c
+diff --git a/gdb/features/loongarch/base64.c b/gdb/features/loongarch/base64.c
 new file mode 100644
 index 0000000..3ee2d9a
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/base64.c
++++ b/gdb/features/loongarch/base64.c
 @@ -0,0 +1,47 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: base64.xml */
@@ -688,11 +688,11 @@ index 0000000..3ee2d9a
 +  tdesc_create_reg (feature, "badvaddr", regnum++, 1, "general", 64, "code_ptr");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/base64.xml b/gdb-11.1/gdb/features/loongarch/base64.xml
+diff --git a/gdb/features/loongarch/base64.xml b/gdb/features/loongarch/base64.xml
 new file mode 100644
 index 0000000..b53479f
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/base64.xml
++++ b/gdb/features/loongarch/base64.xml
 @@ -0,0 +1,45 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -739,11 +739,11 @@ index 0000000..b53479f
 +  <reg name="pc" bitsize="64" type="code_ptr" group="general"/>
 +  <reg name="badvaddr" bitsize="64" type="code_ptr" group="general"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/fpu32.c b/gdb-11.1/gdb/features/loongarch/fpu32.c
+diff --git a/gdb/features/loongarch/fpu32.c b/gdb/features/loongarch/fpu32.c
 new file mode 100644
 index 0000000..bf8964a
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/fpu32.c
++++ b/gdb/features/loongarch/fpu32.c
 @@ -0,0 +1,54 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: fpu32.xml */
@@ -799,11 +799,11 @@ index 0000000..bf8964a
 +  tdesc_create_reg (feature, "fcsr", regnum++, 1, "float", 32, "uint32");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/fpu32.xml b/gdb-11.1/gdb/features/loongarch/fpu32.xml
+diff --git a/gdb/features/loongarch/fpu32.xml b/gdb/features/loongarch/fpu32.xml
 new file mode 100644
 index 0000000..8421730
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/fpu32.xml
++++ b/gdb/features/loongarch/fpu32.xml
 @@ -0,0 +1,53 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -858,11 +858,11 @@ index 0000000..8421730
 +  <reg name="fcc7" bitsize="8" type="uint8" group="float"/>
 +  <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/fpu64.c b/gdb-11.1/gdb/features/loongarch/fpu64.c
+diff --git a/gdb/features/loongarch/fpu64.c b/gdb/features/loongarch/fpu64.c
 new file mode 100644
 index 0000000..f9e24c3
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/fpu64.c
++++ b/gdb/features/loongarch/fpu64.c
 @@ -0,0 +1,62 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: fpu64.xml */
@@ -926,11 +926,11 @@ index 0000000..f9e24c3
 +  tdesc_create_reg (feature, "fcsr", regnum++, 1, "float", 32, "uint32");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/fpu64.xml b/gdb-11.1/gdb/features/loongarch/fpu64.xml
+diff --git a/gdb/features/loongarch/fpu64.xml b/gdb/features/loongarch/fpu64.xml
 new file mode 100644
 index 0000000..420be8b
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/fpu64.xml
++++ b/gdb/features/loongarch/fpu64.xml
 @@ -0,0 +1,58 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -990,11 +990,11 @@ index 0000000..420be8b
 +  <reg name="fcc7" bitsize="8" type="uint8" group="float"/>
 +  <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/lasx.c b/gdb-11.1/gdb/features/loongarch/lasx.c
+diff --git a/gdb/features/loongarch/lasx.c b/gdb/features/loongarch/lasx.c
 new file mode 100644
 index 0000000..96e3ea9
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lasx.c
++++ b/gdb/features/loongarch/lasx.c
 @@ -0,0 +1,80 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: lasx.xml */
@@ -1076,11 +1076,11 @@ index 0000000..96e3ea9
 +  tdesc_create_reg (feature, "xr31", regnum++, 1, "lasx", 256, "lasxv");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/lasx.xml b/gdb-11.1/gdb/features/loongarch/lasx.xml
+diff --git a/gdb/features/loongarch/lasx.xml b/gdb/features/loongarch/lasx.xml
 new file mode 100644
 index 0000000..6f73df0
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lasx.xml
++++ b/gdb/features/loongarch/lasx.xml
 @@ -0,0 +1,59 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -1141,11 +1141,11 @@ index 0000000..6f73df0
 +  <reg name="xr30" bitsize="256" type="lasxv" group="lasx"/>
 +  <reg name="xr31" bitsize="256" type="lasxv" group="lasx"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/lbt32.c b/gdb-11.1/gdb/features/loongarch/lbt32.c
+diff --git a/gdb/features/loongarch/lbt32.c b/gdb/features/loongarch/lbt32.c
 new file mode 100644
 index 0000000..d245c75
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lbt32.c
++++ b/gdb/features/loongarch/lbt32.c
 @@ -0,0 +1,19 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: lbt32.xml */
@@ -1166,11 +1166,11 @@ index 0000000..d245c75
 +  tdesc_create_reg (feature, "x86_top", regnum++, 1, "lbt", 8, "uint8");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/lbt32.xml b/gdb-11.1/gdb/features/loongarch/lbt32.xml
+diff --git a/gdb/features/loongarch/lbt32.xml b/gdb/features/loongarch/lbt32.xml
 new file mode 100644
 index 0000000..1c0133e
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lbt32.xml
++++ b/gdb/features/loongarch/lbt32.xml
 @@ -0,0 +1,17 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -1189,11 +1189,11 @@ index 0000000..1c0133e
 +  <reg name="EFLAG" bitsize="32" type="uint32" group="lbt"/>
 +  <reg name="x86_top" bitsize="8" type="uint8" group="lbt"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/lbt64.c b/gdb-11.1/gdb/features/loongarch/lbt64.c
+diff --git a/gdb/features/loongarch/lbt64.c b/gdb/features/loongarch/lbt64.c
 new file mode 100644
 index 0000000..ecef330
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lbt64.c
++++ b/gdb/features/loongarch/lbt64.c
 @@ -0,0 +1,19 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: lbt64.xml */
@@ -1214,11 +1214,11 @@ index 0000000..ecef330
 +  tdesc_create_reg (feature, "x86_top", regnum++, 1, "lbt", 8, "uint8");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/lbt64.xml b/gdb-11.1/gdb/features/loongarch/lbt64.xml
+diff --git a/gdb/features/loongarch/lbt64.xml b/gdb/features/loongarch/lbt64.xml
 new file mode 100644
 index 0000000..1df26f5
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lbt64.xml
++++ b/gdb/features/loongarch/lbt64.xml
 @@ -0,0 +1,17 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -1237,11 +1237,11 @@ index 0000000..1df26f5
 +  <reg name="EFLAG" bitsize="32" type="uint32" group="lbt"/>
 +  <reg name="x86_top" bitsize="8" type="uint8" group="lbt"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/features/loongarch/lsx.c b/gdb-11.1/gdb/features/loongarch/lsx.c
+diff --git a/gdb/features/loongarch/lsx.c b/gdb/features/loongarch/lsx.c
 new file mode 100644
 index 0000000..dd253f3
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lsx.c
++++ b/gdb/features/loongarch/lsx.c
 @@ -0,0 +1,80 @@
 +/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
 +  Original: lsx.xml */
@@ -1323,11 +1323,11 @@ index 0000000..dd253f3
 +  tdesc_create_reg (feature, "vr31", regnum++, 1, "lsx", 128, "lsxv");
 +  return regnum;
 +}
-diff --git a/gdb-11.1/gdb/features/loongarch/lsx.xml b/gdb-11.1/gdb/features/loongarch/lsx.xml
+diff --git a/gdb/features/loongarch/lsx.xml b/gdb/features/loongarch/lsx.xml
 new file mode 100644
 index 0000000..a0a6ba4
 --- /dev/null
-+++ b/gdb-11.1/gdb/features/loongarch/lsx.xml
++++ b/gdb/features/loongarch/lsx.xml
 @@ -0,0 +1,59 @@
 +<?xml version="1.0"?>
 +<!-- Copyright (C) 2021 Free Software Foundation, Inc.
@@ -1388,11 +1388,11 @@ index 0000000..a0a6ba4
 +  <reg name="vr30" bitsize="128" type="lsxv" group="lsx"/>
 +  <reg name="vr31" bitsize="128" type="lsxv" group="lsx"/>
 +</feature>
-diff --git a/gdb-11.1/gdb/loongarch-linux-nat.c b/gdb-11.1/gdb/loongarch-linux-nat.c
+diff --git a/gdb/loongarch-linux-nat.c b/gdb/loongarch-linux-nat.c
 new file mode 100644
 index 0000000..f31eff4
 --- /dev/null
-+++ b/gdb-11.1/gdb/loongarch-linux-nat.c
++++ b/gdb/loongarch-linux-nat.c
 @@ -0,0 +1,876 @@
 +/* Target-dependent code for GNU/Linux LoongArch.
 +
@@ -2270,11 +2270,11 @@ index 0000000..f31eff4
 +  linux_target = &the_loongarch_linux_nat_target;
 +  add_inf_child_target (&the_loongarch_linux_nat_target);
 +}
-diff --git a/gdb-11.1/gdb/loongarch-linux-tdep.c b/gdb-11.1/gdb/loongarch-linux-tdep.c
+diff --git a/gdb/loongarch-linux-tdep.c b/gdb/loongarch-linux-tdep.c
 new file mode 100644
 index 0000000..1145d9e
 --- /dev/null
-+++ b/gdb-11.1/gdb/loongarch-linux-tdep.c
++++ b/gdb/loongarch-linux-tdep.c
 @@ -0,0 +1,699 @@
 +/* Target-dependent code for GNU/Linux LoongArch.
 +
@@ -2975,11 +2975,11 @@ index 0000000..1145d9e
 +  gdbarch_register_osabi (bfd_arch_loongarch, bfd_mach_loongarch64,
 +                          GDB_OSABI_LINUX, loongarch_linux_init_abi);
 +}
-diff --git a/gdb-11.1/gdb/loongarch-linux-tdep.h b/gdb-11.1/gdb/loongarch-linux-tdep.h
+diff --git a/gdb/loongarch-linux-tdep.h b/gdb/loongarch-linux-tdep.h
 new file mode 100644
 index 0000000..e3456a8
 --- /dev/null
-+++ b/gdb-11.1/gdb/loongarch-linux-tdep.h
++++ b/gdb/loongarch-linux-tdep.h
 @@ -0,0 +1,48 @@
 +/* GNU/Linux on LoongArch target support, prototypes.
 +
@@ -3029,11 +3029,11 @@ index 0000000..e3456a8
 +extern const struct regset loongarch_elf_lasxregset;
 +
 +#endif
-diff --git a/gdb-11.1/gdb/loongarch-tdep.c b/gdb-11.1/gdb/loongarch-tdep.c
+diff --git a/gdb/loongarch-tdep.c b/gdb/loongarch-tdep.c
 new file mode 100644
 index 0000000..87331bd
 --- /dev/null
-+++ b/gdb-11.1/gdb/loongarch-tdep.c
++++ b/gdb/loongarch-tdep.c
 @@ -0,0 +1,1925 @@
 +/* Target-dependent code for GNU/Linux LoongArch.
 +
@@ -4960,11 +4960,11 @@ index 0000000..87331bd
 +When non-zero, loongarch specific debugging is enabled."),
 +			     NULL, NULL, &setdebuglist, &showdebuglist);
 +}
-diff --git a/gdb-11.1/gdb/loongarch-tdep.h b/gdb-11.1/gdb/loongarch-tdep.h
+diff --git a/gdb/loongarch-tdep.h b/gdb/loongarch-tdep.h
 new file mode 100644
 index 0000000..c673c9e
 --- /dev/null
-+++ b/gdb-11.1/gdb/loongarch-tdep.h
++++ b/gdb/loongarch-tdep.h
 @@ -0,0 +1,60 @@
 +/* Target-dependent code for GNU/Linux LoongArch.
 +
@@ -5026,11 +5026,11 @@ index 0000000..c673c9e
 +};
 +
 +#endif /* LOONGARCH_TDEP_H  */
-diff --git a/gdb-11.1/gdb/nat/loongarch-linux-watch.c b/gdb-11.1/gdb/nat/loongarch-linux-watch.c
+diff --git a/gdb/nat/loongarch-linux-watch.c b/gdb/nat/loongarch-linux-watch.c
 new file mode 100644
 index 0000000..f7c0dbf
 --- /dev/null
-+++ b/gdb-11.1/gdb/nat/loongarch-linux-watch.c
++++ b/gdb/nat/loongarch-linux-watch.c
 @@ -0,0 +1,330 @@
 +/* Copyright (C) 2021 Free Software Foundation, Inc.
 +   Contributed by Loongson Ltd.
@@ -5362,11 +5362,11 @@ index 0000000..f7c0dbf
 +      w = w->next;
 +    }
 +}
-diff --git a/gdb-11.1/gdb/nat/loongarch-linux-watch.h b/gdb-11.1/gdb/nat/loongarch-linux-watch.h
+diff --git a/gdb/nat/loongarch-linux-watch.h b/gdb/nat/loongarch-linux-watch.h
 new file mode 100644
 index 0000000..ab80b44
 --- /dev/null
-+++ b/gdb-11.1/gdb/nat/loongarch-linux-watch.h
++++ b/gdb/nat/loongarch-linux-watch.h
 @@ -0,0 +1,132 @@
 +/* Copyright (C) 2021 Free Software Foundation, Inc.
 +   Contributed by Loongson Ltd.
@@ -5500,10 +5500,10 @@ index 0000000..ab80b44
 +					  int force);
 +
 +#endif /* #define LOONGARCH_LINUX_WATCH_H  */
-diff --git a/gdb-11.1/gdb/remote.c b/gdb-11.1/gdb/remote.c
+diff --git a/gdb/remote.c b/gdb/remote.c
 index f2271ad..94abdca 100644
---- a/gdb-11.1/gdb/remote.c
-+++ b/gdb-11.1/gdb/remote.c
+--- a/gdb/remote.c
++++ b/gdb/remote.c
 @@ -2070,6 +2070,8 @@ enum {
    PACKET_qXfer_statictrace_read,
    PACKET_qXfer_traceframe_info,
@@ -5557,10 +5557,10 @@ index f2271ad..94abdca 100644
    add_packet_config_cmd (&remote_protocol_packets[PACKET_qGetTLSAddr],
  			 "qGetTLSAddr", "get-thread-local-storage-address",
  			 0);
-diff --git a/gdb-11.1/gdb/target.h b/gdb-11.1/gdb/target.h
+diff --git a/gdb/target.h b/gdb/target.h
 index ddd4f38..f3f6045 100644
---- a/gdb-11.1/gdb/target.h
-+++ b/gdb-11.1/gdb/target.h
+--- a/gdb/target.h
++++ b/gdb/target.h
 @@ -135,6 +135,9 @@ enum inferior_event_type
  
  enum target_object
@@ -5571,10 +5571,10 @@ index ddd4f38..f3f6045 100644
    /* AVR target specific transfer.  See "avr-tdep.c" and "remote.c".  */
    TARGET_OBJECT_AVR,
    /* Transfer up-to LEN bytes of memory starting at OFFSET.  */
-diff --git a/gdb-11.1/gdb/testsuite/gdb.base/dump.exp b/gdb-11.1/gdb/testsuite/gdb.base/dump.exp
+diff --git a/gdb/testsuite/gdb.base/dump.exp b/gdb/testsuite/gdb.base/dump.exp
 index 52c6983..53e6873 100644
---- a/gdb-11.1/gdb/testsuite/gdb.base/dump.exp
-+++ b/gdb-11.1/gdb/testsuite/gdb.base/dump.exp
+--- a/gdb/testsuite/gdb.base/dump.exp
++++ b/gdb/testsuite/gdb.base/dump.exp
 @@ -145,11 +145,13 @@ make_dump_file "dump srec val [set intarr1.srec] intarray" \
  make_dump_file "dump srec val [set intstr1.srec] intstruct" \
  	"dump struct as value, srec"
@@ -5603,10 +5603,10 @@ index 52c6983..53e6873 100644
  
  make_dump_file "dump tekhex mem [set intarr2.tekhex] $array_start $array_end" \
  	"dump array as memory, tekhex"
-diff --git a/gdb-11.1/gdb/testsuite/gdb.base/float.exp b/gdb-11.1/gdb/testsuite/gdb.base/float.exp
+diff --git a/gdb/testsuite/gdb.base/float.exp b/gdb/testsuite/gdb.base/float.exp
 index dc5e2fa..d179a8f 100644
---- a/gdb-11.1/gdb/testsuite/gdb.base/float.exp
-+++ b/gdb-11.1/gdb/testsuite/gdb.base/float.exp
+--- a/gdb/testsuite/gdb.base/float.exp
++++ b/gdb/testsuite/gdb.base/float.exp
 @@ -120,6 +120,8 @@ if { [is_aarch64_target] } then {
  	      pass "info float (without FPU)"
  	}
@@ -5616,10 +5616,10 @@ index dc5e2fa..d179a8f 100644
  } else {
      gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)"
  }
-diff --git a/gdb-11.1/gdb/testsuite/gdb.trace/entry-values.exp b/gdb-11.1/gdb/testsuite/gdb.trace/entry-values.exp
+diff --git a/gdb/testsuite/gdb.trace/entry-values.exp b/gdb/testsuite/gdb.trace/entry-values.exp
 index 3695a1e..f19f5b9 100644
---- a/gdb-11.1/gdb/testsuite/gdb.trace/entry-values.exp
-+++ b/gdb-11.1/gdb/testsuite/gdb.trace/entry-values.exp
+--- a/gdb/testsuite/gdb.trace/entry-values.exp
++++ b/gdb/testsuite/gdb.trace/entry-values.exp
 @@ -62,6 +62,8 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] } {
      # returns.  The only exception is JALRC, in which case execution
      # resumes from `insn1' instead.
@@ -5629,10 +5629,10 @@ index 3695a1e..f19f5b9 100644
  } else {
      set call_insn "call"
  }
-diff --git a/gdb-11.1/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb-11.1/gdb/testsuite/gdb.xml/tdesc-regs.exp
+diff --git a/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb/testsuite/gdb.xml/tdesc-regs.exp
 index 7402ba8..4b94747 100644
---- a/gdb-11.1/gdb/testsuite/gdb.xml/tdesc-regs.exp
-+++ b/gdb-11.1/gdb/testsuite/gdb.xml/tdesc-regs.exp
+--- a/gdb/testsuite/gdb.xml/tdesc-regs.exp
++++ b/gdb/testsuite/gdb.xml/tdesc-regs.exp
 @@ -83,6 +83,11 @@ switch -glob -- [istarget] {
  	set regdir "i386/"
          set core-regs {64bit-core.xml 64bit-sse.xml}
diff --git a/gdb.spec b/gdb.spec
index eec572c8d19a8c708b4e07686f8d7b9eafcf36d2..f122ff4e6b013897482a633cb84818f4235c0258 100644
--- a/gdb.spec
+++ b/gdb.spec
@@ -1,6 +1,6 @@
 Name: gdb
 Version: 11.1
-Release: 2
+Release: 3
 
 License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ and GPLv2+ with exceptions and GPL+ and LGPLv2+ and LGPLv3+ and BSD and Public Domain and GFDL-1.3
 Source: ftp://sourceware.org/pub/gdb/releases/gdb-%{version}.tar.xz
@@ -369,6 +369,9 @@ rm -f $RPM_BUILD_ROOT%{_datadir}/gdb/python/gdb/command/backtrace.py
 %{_infodir}/gdb.info*
 
 %changelog
+* Mon May 09 2022 Wenlong Zhang <zhangwenlong@loongson.cn> - 11.1-3
+- modify the patch for loongarch64
+
 * Tue Mar 31 2022 Qing Zhang <zhangqing@loongson.cn> - 11.1-2
 - add loongarch support