diff --git a/backport-Rework-register-load-in-aarch64_local_resume.patch b/backport-Rework-register-load-in-aarch64_local_resume.patch new file mode 100644 index 0000000000000000000000000000000000000000..0e6829b12ee08d4bb395d346d8d045c4263f490b --- /dev/null +++ b/backport-Rework-register-load-in-aarch64_local_resume.patch @@ -0,0 +1,135 @@ +From aede07c7421df695111e2bcec5dcd7ebd98971dd Mon Sep 17 00:00:00 2001 +From: hubin +Date: Fri, 28 Jul 2023 12:01:34 +0800 +Subject: [PATCH] fix aarch64/Gresume.c + +--- + src/aarch64/Gresume.c | 109 ++++++++++++++++++++++-------------------- + 1 file changed, 58 insertions(+), 51 deletions(-) + +diff --git a/src/aarch64/Gresume.c b/src/aarch64/Gresume.c +index 3d82739..1575ad8 100644 +--- a/src/aarch64/Gresume.c ++++ b/src/aarch64/Gresume.c +@@ -40,59 +40,66 @@ aarch64_local_resume (unw_addr_space_t as, unw_cursor_t *cursor, void *arg) + { + /* Since there are no signals involved here we restore EH and non scratch + registers only. */ +- unsigned long regs[24]; +- regs[0] = uc->uc_mcontext.regs[0]; +- regs[1] = uc->uc_mcontext.regs[1]; +- regs[2] = uc->uc_mcontext.regs[2]; +- regs[3] = uc->uc_mcontext.regs[3]; +- regs[4] = uc->uc_mcontext.regs[19]; +- regs[5] = uc->uc_mcontext.regs[20]; +- regs[6] = uc->uc_mcontext.regs[21]; +- regs[7] = uc->uc_mcontext.regs[22]; +- regs[8] = uc->uc_mcontext.regs[23]; +- regs[9] = uc->uc_mcontext.regs[24]; +- regs[10] = uc->uc_mcontext.regs[25]; +- regs[11] = uc->uc_mcontext.regs[26]; +- regs[12] = uc->uc_mcontext.regs[27]; +- regs[13] = uc->uc_mcontext.regs[28]; +- regs[14] = uc->uc_mcontext.regs[29]; /* FP */ +- regs[15] = uc->uc_mcontext.regs[30]; /* LR */ +- regs[16] = GET_FPCTX(uc)->vregs[8]; +- regs[17] = GET_FPCTX(uc)->vregs[9]; +- regs[18] = GET_FPCTX(uc)->vregs[10]; +- regs[19] = GET_FPCTX(uc)->vregs[11]; +- regs[20] = GET_FPCTX(uc)->vregs[12]; +- regs[21] = GET_FPCTX(uc)->vregs[13]; +- regs[22] = GET_FPCTX(uc)->vregs[14]; +- regs[23] = GET_FPCTX(uc)->vregs[15]; +- unsigned long sp = uc->uc_mcontext.sp; +- +- struct regs_overlay { +- char x[sizeof(regs)]; +- }; +- +- asm volatile ( +- "mov x4, %0\n" +- "mov x5, %1\n" +- "ldp x0, x1, [x4]\n" +- "ldp x2, x3, [x4,16]\n" +- "ldp x19, x20, [x4,32]\n" +- "ldp x21, x22, [x4,48]\n" +- "ldp x23, x24, [x4,64]\n" +- "ldp x25, x26, [x4,80]\n" +- "ldp x27, x28, [x4,96]\n" +- "ldp x29, x30, [x4,112]\n" +- "ldp d8, d9, [x4,128]\n" +- "ldp d10, d11, [x4,144]\n" +- "ldp d12, d13, [x4,160]\n" +- "ldp d14, d15, [x4,176]\n" +- "mov sp, x5\n" +- "ret \n" ++ __asm__ __volatile__ ( ++ "ldr x0, %[x0]\n\t" ++ "ldr x1, %[x1]\n\t" ++ "ldr x2, %[x2]\n\t" ++ "ldr x3, %[x3]\n\t" ++ "ldr x19, %[x19]\n\t" ++ "ldr x20, %[x20]\n\t" ++ "ldr x21, %[x21]\n\t" ++ "ldr x22, %[x22]\n\t" ++ "ldr x23, %[x23]\n\t" ++ "ldr x24, %[x24]\n\t" ++ "ldr x25, %[x25]\n\t" ++ "ldr x26, %[x26]\n\t" ++ "ldr x27, %[x27]\n\t" ++ "ldr x28, %[x28]\n\t" ++ //"ldr x29, %[x29]\n\t" ++ "ldr x30, %[x30]\n\t" ++ "ldr d8, %[d8]\n\t" ++ "ldr d9, %[d9]\n\t" ++ "ldr d10, %[d10]\n\t" ++ "ldr d11, %[d11]\n\t" ++ "ldr d12, %[d12]\n\t" ++ "ldr d13, %[d13]\n\t" ++ "ldr d14, %[d14]\n\t" ++ "ldr d15, %[d15]\n\t" ++ "ldr x5, %[sp]\n\t" ++ "mov sp, x5\n\t" ++ "ret\n" + : +- : "r" (regs), +- "r" (sp), +- "m" (*(struct regs_overlay *)regs) ++ : [x0] "m"(uc->uc_mcontext.regs[0]), ++ [x1] "m"(uc->uc_mcontext.regs[1]), ++ [x2] "m"(uc->uc_mcontext.regs[2]), ++ [x3] "m"(uc->uc_mcontext.regs[3]), ++ [x19] "m"(uc->uc_mcontext.regs[19]), ++ [x20] "m"(uc->uc_mcontext.regs[20]), ++ [x21] "m"(uc->uc_mcontext.regs[21]), ++ [x22] "m"(uc->uc_mcontext.regs[22]), ++ [x23] "m"(uc->uc_mcontext.regs[23]), ++ [x24] "m"(uc->uc_mcontext.regs[24]), ++ [x25] "m"(uc->uc_mcontext.regs[25]), ++ [x26] "m"(uc->uc_mcontext.regs[26]), ++ [x27] "m"(uc->uc_mcontext.regs[27]), ++ [x28] "m"(uc->uc_mcontext.regs[28]), ++ //[x29] "m"(uc->uc_mcontext.regs[29]), /* FP */ ++ [x30] "m"(uc->uc_mcontext.regs[30]), /* LR */ ++ [d8] "m"(GET_FPCTX(uc)->vregs[8]), ++ [d9] "m"(GET_FPCTX(uc)->vregs[9]), ++ [d10] "m"(GET_FPCTX(uc)->vregs[10]), ++ [d11] "m"(GET_FPCTX(uc)->vregs[11]), ++ [d12] "m"(GET_FPCTX(uc)->vregs[12]), ++ [d13] "m"(GET_FPCTX(uc)->vregs[13]), ++ [d14] "m"(GET_FPCTX(uc)->vregs[14]), ++ [d15] "m"(GET_FPCTX(uc)->vregs[15]), ++ [sp] "m"(uc->uc_mcontext.sp) ++ : "x0", "x1", "x2", "x3", "x19", "x20", "x21", "x22", "x23", "x24", ++ "x25", "x26", "x27", "x28", "x30" ++ //"x25", "x26", "x27", "x28", "x29", "x30" + ); ++ ++ + } + else + { +-- +2.27.0 + + diff --git a/libunwind.spec b/libunwind.spec index 2eaac817ddd4aba330679a622f417219508c0506..62a8fca7ce355a0f6748c48741c4e3943b6590b8 100644 --- a/libunwind.spec +++ b/libunwind.spec @@ -1,7 +1,7 @@ Name: libunwind Epoch: 2 Version: 1.3.1 -Release: 6 +Release: 7 Summary: Libunwind provides a C ABI to determine the call-chain of a program License: BSD URL: http://savannah.nongnu.org/projects/libunwind @@ -21,6 +21,7 @@ Patch6010: backport-Ltest-mem-validate-Disable-inlining-for-consume_and_.patch Patch6011: backport-tests-run-coredump-unwind-Skip-test-if-no-coredump-h.patch Patch6012: backport-avoid-calling-printf-because-OE-glibc-2.34-used-mno-.patch Patch6013: backport-fix-run-ptrace-mapper-test-case-failed.patch +Patch6014: backport-Rework-register-load-in-aarch64_local_resume.patch ExclusiveArch: aarch64 %{ix86} x86_64 @@ -98,6 +99,12 @@ make check || true %{_mandir}/*/* %changelog +* Sat Jul 29 2023 chenziyang - 2:1.3.1-7 +- Type:bugfix +- ID:NA +- SUG:NA +- DESC:backport upstream patch to fix failed Gtest-exc testcase + * Tue Jul 11 2023 chenziyang - 2:1.3.1-6 - Type:bugfix - ID:NA