From 3cfe46bd9e4f087f7b0c77173180cc86fdf564ac Mon Sep 17 00:00:00 2001 From: liyunfei Date: Thu, 8 May 2025 17:38:28 +0800 Subject: [PATCH] update to llvm-for-oE-17.0.6-2506.0.1.tar.gz (cherry picked from commit 83b8fde736c810204c4bc16ef9a61f5df2d08735) --- .gitattributes | 2 +- ...ckported-test-case-for-CVE-2024-7883.patch | 328 ------------------ ...Fix-for-building-autotuner-with-mlir.patch | 0 ...e-Use-correct-exports-for-MLIR-tools.patch | 39 --- ...r.gz => llvm-for-oE-17.0.6-2506.0.1.tar.gz | 4 +- llvm.spec | 12 +- 6 files changed, 10 insertions(+), 375 deletions(-) delete mode 100644 0005-Bugfix-ARM-fix-for-backported-test-case-for-CVE-2024-7883.patch rename 0007-Fix-for-building-autotuner-with-mlir.patch => 0005-Fix-for-building-autotuner-with-mlir.patch (100%) delete mode 100644 0006-CMake-Use-correct-exports-for-MLIR-tools.patch rename llvm-for-oE-17.0.6-2503.0.2.tar.gz => llvm-for-oE-17.0.6-2506.0.1.tar.gz (32%) diff --git a/.gitattributes b/.gitattributes index 4fceefc..34709aa 100644 --- a/.gitattributes +++ b/.gitattributes @@ -1 +1 @@ -llvm-for-oE-17.0.6-2503.0.2.tar.gz filter=lfs diff=lfs merge=lfs -text +llvm-for-oE-17.0.6-*.tar.gz filter=lfs diff=lfs merge=lfs -text diff --git a/0005-Bugfix-ARM-fix-for-backported-test-case-for-CVE-2024-7883.patch b/0005-Bugfix-ARM-fix-for-backported-test-case-for-CVE-2024-7883.patch deleted file mode 100644 index 5366538..0000000 --- a/0005-Bugfix-ARM-fix-for-backported-test-case-for-CVE-2024-7883.patch +++ /dev/null @@ -1,328 +0,0 @@ -From 2b6df15b2f19ea6cf8186062e496c63637d4753e Mon Sep 17 00:00:00 2001 -From: liyunfei -Date: Wed, 2 Apr 2025 15:39:52 +0800 -Subject: [PATCH] [Bugfix][ARM] fix for backported test case for CVE-2024-7883 - -Fix fail testcase for commit 5188abc4c0ab92102c023b01be26a9ad57492c4b, -which was backported for CVE fix. ---- - .../test/CodeGen/ARM/cmse-clear-float-hard.ll | 68 +++++++++---------- - 1 file changed, 34 insertions(+), 34 deletions(-) - -diff --git a/llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll b/llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll -index f97fc51a0c45..13de25588167 100644 ---- a/llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll -+++ b/llvm/test/CodeGen/ARM/cmse-clear-float-hard.ll -@@ -187,7 +187,7 @@ define float @f2(ptr nocapture %fptr) #2 { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-NEXT: bic r1, r1, #159 -@@ -207,7 +207,7 @@ define float @f2(ptr nocapture %fptr) #2 { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -245,7 +245,7 @@ define double @d2(ptr nocapture %fptr) #2 { - ; CHECK-8M-LE-NEXT: bic r0, r0, #1 - ; CHECK-8M-LE-NEXT: sub sp, #136 - ; CHECK-8M-LE-NEXT: vmov r11, r12, d0 --; CHECK-8M-LE-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-LE-NEXT: vlstm sp - ; CHECK-8M-LE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-LE-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-LE-NEXT: bic r1, r1, #159 -@@ -264,7 +264,7 @@ define double @d2(ptr nocapture %fptr) #2 { - ; CHECK-8M-LE-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-LE-NEXT: blxns r0 - ; CHECK-8M-LE-NEXT: vmov r11, r12, d0 --; CHECK-8M-LE-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-LE-NEXT: vlldm sp - ; CHECK-8M-LE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-LE-NEXT: add sp, #136 - ; CHECK-8M-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -283,7 +283,7 @@ define double @d2(ptr nocapture %fptr) #2 { - ; CHECK-8M-BE-NEXT: bic r0, r0, #1 - ; CHECK-8M-BE-NEXT: sub sp, #136 - ; CHECK-8M-BE-NEXT: vmov r11, r12, d0 --; CHECK-8M-BE-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-BE-NEXT: vlstm sp - ; CHECK-8M-BE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-BE-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-BE-NEXT: bic r1, r1, #159 -@@ -302,7 +302,7 @@ define double @d2(ptr nocapture %fptr) #2 { - ; CHECK-8M-BE-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-BE-NEXT: blxns r0 - ; CHECK-8M-BE-NEXT: vmov r11, r12, d0 --; CHECK-8M-BE-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-BE-NEXT: vlldm sp - ; CHECK-8M-BE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-BE-NEXT: add sp, #136 - ; CHECK-8M-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -368,7 +368,7 @@ define float @f3(ptr nocapture %fptr) #4 { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-NEXT: bic r1, r1, #159 -@@ -388,7 +388,7 @@ define float @f3(ptr nocapture %fptr) #4 { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -426,7 +426,7 @@ define double @d3(ptr nocapture %fptr) #4 { - ; CHECK-8M-LE-NEXT: bic r0, r0, #1 - ; CHECK-8M-LE-NEXT: sub sp, #136 - ; CHECK-8M-LE-NEXT: vmov r11, r12, d0 --; CHECK-8M-LE-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-LE-NEXT: vlstm sp - ; CHECK-8M-LE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-LE-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-LE-NEXT: bic r1, r1, #159 -@@ -445,7 +445,7 @@ define double @d3(ptr nocapture %fptr) #4 { - ; CHECK-8M-LE-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-LE-NEXT: blxns r0 - ; CHECK-8M-LE-NEXT: vmov r11, r12, d0 --; CHECK-8M-LE-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-LE-NEXT: vlldm sp - ; CHECK-8M-LE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-LE-NEXT: add sp, #136 - ; CHECK-8M-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -464,7 +464,7 @@ define double @d3(ptr nocapture %fptr) #4 { - ; CHECK-8M-BE-NEXT: bic r0, r0, #1 - ; CHECK-8M-BE-NEXT: sub sp, #136 - ; CHECK-8M-BE-NEXT: vmov r11, r12, d0 --; CHECK-8M-BE-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-BE-NEXT: vlstm sp - ; CHECK-8M-BE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-BE-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-BE-NEXT: bic r1, r1, #159 -@@ -483,7 +483,7 @@ define double @d3(ptr nocapture %fptr) #4 { - ; CHECK-8M-BE-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-BE-NEXT: blxns r0 - ; CHECK-8M-BE-NEXT: vmov r11, r12, d0 --; CHECK-8M-BE-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-BE-NEXT: vlldm sp - ; CHECK-8M-BE-NEXT: vmov d0, r11, r12 - ; CHECK-8M-BE-NEXT: add sp, #136 - ; CHECK-8M-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -548,8 +548,8 @@ define float @f4(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov.f32 s0, s0 -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: mov r1, r0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} - ; CHECK-8M-NEXT: mov r2, r0 - ; CHECK-8M-NEXT: mov r3, r0 - ; CHECK-8M-NEXT: mov r4, r0 -@@ -564,7 +564,7 @@ define float @f4(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -600,8 +600,8 @@ define double @d4(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov.f32 s0, s0 -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: mov r1, r0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} - ; CHECK-8M-NEXT: mov r2, r0 - ; CHECK-8M-NEXT: mov r3, r0 - ; CHECK-8M-NEXT: mov r4, r0 -@@ -616,7 +616,7 @@ define double @d4(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r11, r12, d0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov d0, r11, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -651,7 +651,7 @@ define void @fd(ptr %f, float %a, double %b) #8 { - ; CHECK-8M-NEXT: vmov r12, s0 - ; CHECK-8M-NEXT: mov r2, r0 - ; CHECK-8M-NEXT: vmov r10, r11, d1 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: vmov d1, r10, r11 - ; CHECK-8M-NEXT: ldr r1, [sp, #64] -@@ -668,7 +668,7 @@ define void @fd(ptr %f, float %a, double %b) #8 { - ; CHECK-8M-NEXT: mov r9, r0 - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} - ; CHECK-8M-NEXT: pop {r7, pc} -@@ -710,7 +710,7 @@ define void @fdff(ptr %f, float %a, double %b, float %c, float %d) #8 { - ; CHECK-8M-NEXT: vmov r9, s1 - ; CHECK-8M-NEXT: mov r4, r0 - ; CHECK-8M-NEXT: vmov r8, s4 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: vmov d1, r10, r11 - ; CHECK-8M-NEXT: vmov s1, r9 -@@ -725,7 +725,7 @@ define void @fdff(ptr %f, float %a, double %b, float %c, float %d) #8 { - ; CHECK-8M-NEXT: mov r7, r0 - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} - ; CHECK-8M-NEXT: pop {r7, pc} -@@ -767,7 +767,7 @@ define void @fidififid(ptr %fu, float %a, i32 %b, double %c, i32 %d, float %e, i - ; CHECK-8M-NEXT: vmov r8, s1 - ; CHECK-8M-NEXT: vmov r7, s4 - ; CHECK-8M-NEXT: vmov r5, r6, d3 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r11 - ; CHECK-8M-NEXT: vmov d1, r9, r10 - ; CHECK-8M-NEXT: vmov s1, r8 -@@ -780,7 +780,7 @@ define void @fidififid(ptr %fu, float %a, i32 %b, double %c, i32 %d, float %e, i - ; CHECK-8M-NEXT: mov r4, r12 - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r12 - ; CHECK-8M-NEXT: blxns r12 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} - ; CHECK-8M-NEXT: pop {r7, pc} -@@ -899,7 +899,7 @@ define half @h2(ptr nocapture %hptr) nounwind { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-NEXT: bic r1, r1, #159 -@@ -919,7 +919,7 @@ define half @h2(ptr nocapture %hptr) nounwind { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -978,7 +978,7 @@ define half @h3(ptr nocapture %hptr) nounwind { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-NEXT: bic r1, r1, #159 -@@ -998,7 +998,7 @@ define half @h3(ptr nocapture %hptr) nounwind { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -1056,8 +1056,8 @@ define half @h4(ptr nocapture %hptr) nounwind { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov.f32 s0, s0 -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: mov r1, r0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} - ; CHECK-8M-NEXT: mov r2, r0 - ; CHECK-8M-NEXT: mov r3, r0 - ; CHECK-8M-NEXT: mov r4, r0 -@@ -1072,7 +1072,7 @@ define half @h4(ptr nocapture %hptr) nounwind { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -1179,7 +1179,7 @@ define half @h1_arg(ptr nocapture %hptr, half %harg) nounwind { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: ldr r1, [sp, #64] - ; CHECK-8M-NEXT: bic r1, r1, #159 -@@ -1199,7 +1199,7 @@ define half @h1_arg(ptr nocapture %hptr, half %harg) nounwind { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -1252,8 +1252,8 @@ define float @float_return_undef_arg(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov.f32 s0, s0 -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: mov r1, r0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} - ; CHECK-8M-NEXT: mov r2, r0 - ; CHECK-8M-NEXT: mov r3, r0 - ; CHECK-8M-NEXT: mov r4, r0 -@@ -1268,7 +1268,7 @@ define float @float_return_undef_arg(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} -@@ -1301,8 +1301,8 @@ define float @float_return_poison_arg(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: bic r0, r0, #1 - ; CHECK-8M-NEXT: sub sp, #136 - ; CHECK-8M-NEXT: vmov.f32 s0, s0 -+; CHECK-8M-NEXT: vlstm sp - ; CHECK-8M-NEXT: mov r1, r0 --; CHECK-8M-NEXT: vlstm sp, {d0 - d15} - ; CHECK-8M-NEXT: mov r2, r0 - ; CHECK-8M-NEXT: mov r3, r0 - ; CHECK-8M-NEXT: mov r4, r0 -@@ -1317,7 +1317,7 @@ define float @float_return_poison_arg(ptr nocapture %fptr) #6 { - ; CHECK-8M-NEXT: msr apsr_nzcvqg, r0 - ; CHECK-8M-NEXT: blxns r0 - ; CHECK-8M-NEXT: vmov r12, s0 --; CHECK-8M-NEXT: vlldm sp, {d0 - d15} -+; CHECK-8M-NEXT: vlldm sp - ; CHECK-8M-NEXT: vmov s0, r12 - ; CHECK-8M-NEXT: add sp, #136 - ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11} --- -Gitee diff --git a/0007-Fix-for-building-autotuner-with-mlir.patch b/0005-Fix-for-building-autotuner-with-mlir.patch similarity index 100% rename from 0007-Fix-for-building-autotuner-with-mlir.patch rename to 0005-Fix-for-building-autotuner-with-mlir.patch diff --git a/0006-CMake-Use-correct-exports-for-MLIR-tools.patch b/0006-CMake-Use-correct-exports-for-MLIR-tools.patch deleted file mode 100644 index d147ade..0000000 --- a/0006-CMake-Use-correct-exports-for-MLIR-tools.patch +++ /dev/null @@ -1,39 +0,0 @@ -From b443e55162861125a50048ae9bc521e98058b273 Mon Sep 17 00:00:00 2001 -From: Nikita Popov -Date: Mon, 16 Dec 2024 14:44:43 +0100 -Subject: [PATCH] [CMake] Use correct exports file for MLIR tools - -llvm_add_tool() currently does not respect the passed project and -puts all tools into LLVMExports.cmake. This means that we end up -with binaries like mlir-opt in LLVMExports.cmake instead of -MLIRTargets.cmake, where they should be. - -Adjust llvm_add_tool() to take the project into account. ---- - llvm/cmake/modules/AddLLVM.cmake | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/llvm/cmake/modules/AddLLVM.cmake b/llvm/cmake/modules/AddLLVM.cmake -index 006dfb6de3a199..6cf0ee1a54dbdb 100644 ---- a/llvm/cmake/modules/AddLLVM.cmake -+++ b/llvm/cmake/modules/AddLLVM.cmake -@@ -1483,7 +1483,7 @@ macro(llvm_add_tool project name) - - if ( ${name} IN_LIST LLVM_TOOLCHAIN_TOOLS OR NOT LLVM_INSTALL_TOOLCHAIN_ONLY) - if( LLVM_BUILD_TOOLS ) -- get_target_export_arg(${name} LLVM export_to_llvmexports) -+ get_target_export_arg(${name} ${project} export_to_llvmexports) - install(TARGETS ${name} - ${export_to_llvmexports} - RUNTIME DESTINATION ${${project}_TOOLS_INSTALL_DIR} -@@ -1497,7 +1497,8 @@ macro(llvm_add_tool project name) - endif() - endif() - if( LLVM_BUILD_TOOLS ) -- set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${name}) -+ string(TOUPPER "${project}" project_upper) -+ set_property(GLOBAL APPEND PROPERTY ${project_upper}_EXPORTS ${name}) - endif() - set_target_properties(${name} PROPERTIES FOLDER "Tools") - endif() --- \ No newline at end of file diff --git a/llvm-for-oE-17.0.6-2503.0.2.tar.gz b/llvm-for-oE-17.0.6-2506.0.1.tar.gz similarity index 32% rename from llvm-for-oE-17.0.6-2503.0.2.tar.gz rename to llvm-for-oE-17.0.6-2506.0.1.tar.gz index d1e8005..231eaac 100644 --- a/llvm-for-oE-17.0.6-2503.0.2.tar.gz +++ b/llvm-for-oE-17.0.6-2506.0.1.tar.gz @@ -1,3 +1,3 @@ version https://git-lfs.github.com/spec/v1 -oid sha256:69d108c6097cce7c7ba73346e99fbe75a8f59d5fa573e189bed0fd66e18b39a9 -size 195644037 +oid sha256:db733ac396925145ce00854d8175a66ea87a8b18e808fb00d167148271d644e9 +size 195853097 diff --git a/llvm.spec b/llvm.spec index 0a02006..256c1c3 100644 --- a/llvm.spec +++ b/llvm.spec @@ -27,7 +27,7 @@ %undefine __cmake_in_source_build -%global src_tarball llvm-for-oE-17.0.6-2503.0.2 +%global src_tarball llvm-for-oE-17.0.6-2506.0.1 %global src_tarball_dir llvm-project-%{src_tarball} #region LLVM globals @@ -151,7 +151,7 @@ Name: llvm Name: llvm-toolset-%{maj_ver} %endif Version: %{maj_ver}.%{min_ver}.%{patch_ver} -Release: 37 +Release: 38 Summary: The Low Level Virtual Machine License: NCSA @@ -170,10 +170,8 @@ Patch0003: 0003-fedora-standalone.patch %if %{os_version} <= 2003 Patch0004: 0004-remove-cmake_minimum_required.patch %endif -Patch0005: 0005-Bugfix-ARM-fix-for-backported-test-case-for-CVE-2024-7883.patch -Patch0006: 0006-CMake-Use-correct-exports-for-MLIR-tools.patch %if %{with bisheng_autotuner} -Patch0007: 0007-Fix-for-building-autotuner-with-mlir.patch +Patch0005: 0005-Fix-for-building-autotuner-with-mlir.patch %endif BuildRequires: gcc @@ -2854,6 +2852,10 @@ fi #endregion files %changelog +* Thu May 08 2025 liyunfei - 17.0.6-38 +- update to llvm-for-oe-17.0.6-2506.0.1 +- release-note https://gitee.com/openeuler/llvm-project/compare/llvm-for-oE-17.0.6-2503.0.2...llvm-for-oE-17.0.6-2506.0.1 + * Tue Apr 22 2025 liyunfei - 17.0.6-37 - llvm-mlir add obsoletes mlir - openmp add obsoletes libomp -- Gitee