diff --git a/mstflint.spec b/mstflint.spec
index 70186088afe8d3bdd5de2ced3ac159d7248433b9..bc4b67a85ff1ff9cee1caf77dc723a69ded069dd 100644
--- a/mstflint.spec
+++ b/mstflint.spec
@@ -1,12 +1,15 @@
 Name:           mstflint
 Summary:        Firmware Burning and Diagnostics Tools
 Version:        4.10.0
-Release:        7
+Release:        8
 License:        GPLv2+ or BSD
 Url:            https://github.com/Mellanox/mstflint
 Source:         https://github.com/Mellanox/%{name}/releases/download/v4.10.0-2/%{name}-%{version}.tar.gz
 Patch0000:      0001-Fix-compile-errors.patch
 Patch0001:      fix-return-local-addr.patch
+%ifarch riscv64
+Patch0003:      riscv64.patch
+%endif
 
 BuildRequires:  libstdc++-devel zlib-devel rdma-core-devel gcc-c++ gcc
 BuildRequires:  libcurl-devel boost-devel libxml2-devel openssl-devel
@@ -44,6 +47,9 @@ export CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS"
 %{_mandir}/man1/*
 
 %changelog
+* Fri Dec 24 2021 lvxiaoqian <xiaoqian@nj.iscas.ac.cn> - 4.10.0-8
+- add riscv patch
+
 * Tue Aug 4 2021 shdluan@163.com <shdluan@163.com> - 4.10.0-7
 - fix return local addr
 
diff --git a/riscv64.patch b/riscv64.patch
new file mode 100644
index 0000000000000000000000000000000000000000..cda871c8df0a43b932dd34a80c0afbf46cc82565
--- /dev/null
+++ b/riscv64.patch
@@ -0,0 +1,71 @@
+From: Tzafrir Cohen <nvidia@cohens.org.il>
++Subject: Support the riscv64 architecture
++Upstream: https://github.com/Mellanox/mstflint/pull/393
++
++Adds "__riscv" as a 64bit architecture.
++
++Good enough for Debian. The real fix is probably a proper feature test
++in autoconf.
+
+--- a/common/compatibility.h	2018-07-10 20:43:14.000000000 +0800
++++ b/common/compatibility.h	2021-12-24 13:43:57.235056800 +0800
+@@ -63,6 +63,8 @@
+ #       define ARCH_arm64
+ #   elif defined(__arm__)
+ #       define ARCH_arm6l
++#   elif defined(__riscv)
++#       define ARCH_riscv
+ #   else
+ #       error Unknown CPU architecture using the linux OS
+ #   endif
+@@ -109,7 +111,7 @@
+ #       define U48H_FMT     "0x%012llx"
+ #       define U64D_FMT_GEN "llu"
+ #   endif
+-#elif defined(ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(ARCH_arm64)
++#elif defined(ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(ARCH_arm64) || defined(ARCH_riscv)
+ #    define U64D_FMT     "%lu"
+ #    define U64H_FMT     "0x%016lx"
+ #    define U48H_FMT     "0x%012lx"
+
+--- a/tools_layouts/adb_to_c_utils.h	2018-07-10 20:43:14.000000000 +0800
++++ b/tools_layouts/adb_to_c_utils.h	2021-12-24 13:45:59.546689900 +0800
+@@ -137,6 +137,8 @@
+ #       define ARCH_arm64
+ #   elif defined(__arm__)
+ #       define ARCH_arm6l
++#   elif defined(__riscv)
++#       define ARCH_riscv
+ #   else
+ #       error Unknown CPU architecture using the linux OS
+ #   endif
+@@ -180,7 +182,7 @@
+ #       define U64H_FMT    "0x%016llx"
+ #       define U48H_FMT    "0x%012llx"
+ #   endif
+-#elif defined (ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(ARCH_arm64)
++#elif defined (ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(ARCH_arm64) || defined(ARCH_riscv)
+ #    define U64D_FMT    "%lu"
+ #    define U64H_FMT    "0x%016lx"
+ #	 define U48H_FMT	"0x%012lx" 
+ 
+--- a/mtcr_ul/packets_common.h	2018-07-10 20:43:14.000000000 +0800
++++ a/mtcr_ul/packets_common.h	2021-12-24 13:48:16.590508900 +0800
+@@ -152,6 +152,8 @@
+ #       define ARCH_arm64
+ #   elif defined(__arm__)
+ #       define ARCH_arm6l
++#   elif defined(__riscv)
++#       define ARCH_riscv
+ #   else
+ #       error Unknown CPU architecture using the linux OS
+ #   endif
+@@ -165,7 +167,7 @@
+ /* define macros for print fields */
+ //#if defined (ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(__MINGW64__)
+ /*
+- #if !defined(UEFI_BUILD) && (defined (ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(__MINGW64__))
++ #if !defined(UEFI_BUILD) && (defined (ARCH_ia64) || defined(ARCH_x86_64) || defined(ARCH_ppc64) || defined(__MINGW64__)) || defined(ARCH_riscv))
+  #   define U64H_FMT "0x%016lx"
+  #   define U64D_FMT "%lu"
+  #   define U32H_FMT "0x%08x"