From 458ef8819339f6a02de2087617aa23f9803ce449 Mon Sep 17 00:00:00 2001 From: zhaixiang Date: Wed, 31 Jan 2024 09:01:53 +0800 Subject: [PATCH] Rebase LoongArch64 patch --- LoongArch64-support.patch | 11451 +++++++++++++++++------------------- openjdk-1.8.0.spec | 15 +- 2 files changed, 5427 insertions(+), 6039 deletions(-) diff --git a/LoongArch64-support.patch b/LoongArch64-support.patch index 9051b20..e88f15f 100644 --- a/LoongArch64-support.patch +++ b/LoongArch64-support.patch @@ -1,8 +1,7 @@ -diff --git a/common/autoconf/build-aux/autoconf-config.guess b/common/autoconf/build-aux/autoconf-config.guess -index 15ee438926..3d7555b52d 100644 ---- a/common/autoconf/build-aux/autoconf-config.guess -+++ b/common/autoconf/build-aux/autoconf-config.guess -@@ -977,6 +977,9 @@ EOF +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/build-aux/autoconf-config.guess b/common/autoconf/build-aux/autoconf-config.guess +--- a/common/autoconf/build-aux/autoconf-config.guess 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/build-aux/autoconf-config.guess 2023-12-20 09:23:19.571483804 +0800 +@@ -977,6 +977,9 @@ eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'` test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } ;; @@ -12,11 +11,10 @@ index 15ee438926..3d7555b52d 100644 or32:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; -diff --git a/common/autoconf/build-aux/autoconf-config.sub b/common/autoconf/build-aux/autoconf-config.sub -index 1aab2b303e..bd910bddbe 100644 ---- a/common/autoconf/build-aux/autoconf-config.sub -+++ b/common/autoconf/build-aux/autoconf-config.sub -@@ -275,6 +275,7 @@ case $basic_machine in +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/build-aux/autoconf-config.sub b/common/autoconf/build-aux/autoconf-config.sub +--- a/common/autoconf/build-aux/autoconf-config.sub 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/build-aux/autoconf-config.sub 2023-12-20 09:23:19.574817100 +0800 +@@ -275,6 +275,7 @@ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | i370 | i860 | i960 | ia64 \ | ip2k | iq2000 \ @@ -24,11 +22,10 @@ index 1aab2b303e..bd910bddbe 100644 | m32c | m32r | m32rle | m68000 | m68k | m88k \ | maxq | mb | microblaze | mcore | mep \ | mips | mipsbe | mipseb | mipsel | mipsle \ -diff --git a/common/autoconf/build-aux/config.guess b/common/autoconf/build-aux/config.guess -index 355c91e4eb..d03d029ce3 100644 ---- a/common/autoconf/build-aux/config.guess -+++ b/common/autoconf/build-aux/config.guess -@@ -86,4 +86,15 @@ if [ "x$OUT" = x ]; then +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/build-aux/config.guess b/common/autoconf/build-aux/config.guess +--- a/common/autoconf/build-aux/config.guess 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/build-aux/config.guess 2023-12-20 09:23:19.574817100 +0800 +@@ -86,4 +86,15 @@ fi fi @@ -44,10 +41,9 @@ index 355c91e4eb..d03d029ce3 100644 +fi + echo $OUT -diff --git a/common/autoconf/configure.ac b/common/autoconf/configure.ac -index 151e5a109f..5072409dd4 100644 ---- a/common/autoconf/configure.ac -+++ b/common/autoconf/configure.ac +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/configure.ac b/common/autoconf/configure.ac +--- a/common/autoconf/configure.ac 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/configure.ac 2023-12-20 09:23:19.574817100 +0800 @@ -23,6 +23,12 @@ # questions. # @@ -61,7 +57,7 @@ index 151e5a109f..5072409dd4 100644 ############################################################################### # # Includes and boilerplate -@@ -186,6 +192,7 @@ FLAGS_SETUP_INIT_FLAGS +@@ -186,6 +192,7 @@ # Now we can test some aspects on the target using configure macros. PLATFORM_SETUP_OPENJDK_TARGET_BITS PLATFORM_SETUP_OPENJDK_TARGET_ENDIANNESS @@ -69,11 +65,10 @@ index 151e5a109f..5072409dd4 100644 # Configure flags for the tools FLAGS_SETUP_COMPILER_FLAGS_FOR_LIBS -diff --git a/common/autoconf/generated-configure.sh b/common/autoconf/generated-configure.sh -index b0b3033393..1de12e3b51 100644 ---- a/common/autoconf/generated-configure.sh -+++ b/common/autoconf/generated-configure.sh -@@ -716,6 +716,9 @@ SET_EXECUTABLE_ORIGIN +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/generated-configure.sh b/common/autoconf/generated-configure.sh +--- a/common/autoconf/generated-configure.sh 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/generated-configure.sh 2024-01-30 13:54:24.742709461 +0800 +@@ -716,6 +716,9 @@ SHARED_LIBRARY_FLAGS CXX_FLAG_REORDER C_FLAG_REORDER @@ -83,7 +78,7 @@ index b0b3033393..1de12e3b51 100644 SYSROOT_LDFLAGS SYSROOT_CFLAGS RC_FLAGS -@@ -4078,6 +4081,12 @@ fi +@@ -4069,6 +4072,12 @@ # questions. # @@ -96,7 +91,7 @@ index b0b3033393..1de12e3b51 100644 # Support macro for PLATFORM_EXTRACT_TARGET_AND_BUILD. # Converts autoconf style CPU name to OpenJDK style, into # VAR_CPU, VAR_CPU_ARCH, VAR_CPU_BITS and VAR_CPU_ENDIAN. -@@ -13726,6 +13735,18 @@ test -n "$target_alias" && +@@ -13918,6 +13927,18 @@ VAR_CPU_BITS=64 VAR_CPU_ENDIAN=big ;; @@ -115,7 +110,7 @@ index b0b3033393..1de12e3b51 100644 *) as_fn_error $? "unsupported cpu $build_cpu" "$LINENO" 5 ;; -@@ -13864,6 +13885,18 @@ $as_echo "$OPENJDK_BUILD_OS-$OPENJDK_BUILD_CPU" >&6; } +@@ -14056,6 +14077,18 @@ VAR_CPU_BITS=64 VAR_CPU_ENDIAN=big ;; @@ -134,7 +129,7 @@ index b0b3033393..1de12e3b51 100644 *) as_fn_error $? "unsupported cpu $host_cpu" "$LINENO" 5 ;; -@@ -13986,6 +14019,8 @@ $as_echo "$COMPILE_TYPE" >&6; } +@@ -14178,6 +14211,8 @@ OPENJDK_TARGET_CPU_LEGACY_LIB="i386" elif test "x$OPENJDK_TARGET_CPU" = xx86_64; then OPENJDK_TARGET_CPU_LEGACY_LIB="amd64" @@ -143,7 +138,7 @@ index b0b3033393..1de12e3b51 100644 fi -@@ -14019,6 +14054,9 @@ $as_echo "$COMPILE_TYPE" >&6; } +@@ -14211,6 +14246,9 @@ elif test "x$OPENJDK_TARGET_OS" != xmacosx && test "x$OPENJDK_TARGET_CPU" = xx86_64; then # On all platforms except macosx, we replace x86_64 with amd64. OPENJDK_TARGET_CPU_OSARCH="amd64" @@ -153,7 +148,7 @@ index b0b3033393..1de12e3b51 100644 fi -@@ -14028,6 +14066,8 @@ $as_echo "$COMPILE_TYPE" >&6; } +@@ -14220,6 +14258,8 @@ elif test "x$OPENJDK_TARGET_OS" != xmacosx && test "x$OPENJDK_TARGET_CPU" = xx86_64; then # On all platforms except macosx, we replace x86_64 with amd64. OPENJDK_TARGET_CPU_JLI="amd64" @@ -162,7 +157,7 @@ index b0b3033393..1de12e3b51 100644 fi # Now setup the -D flags for building libjli. OPENJDK_TARGET_CPU_JLI_CFLAGS="-DLIBARCHNAME='\"$OPENJDK_TARGET_CPU_JLI\"'" -@@ -14040,6 +14080,9 @@ $as_echo "$COMPILE_TYPE" >&6; } +@@ -14232,6 +14272,9 @@ elif test "x$OPENJDK_TARGET_OS" = xmacosx && test "x$TOOLCHAIN_TYPE" = xclang ; then OPENJDK_TARGET_CPU_JLI_CFLAGS="$OPENJDK_TARGET_CPU_JLI_CFLAGS -stdlib=libc++ -mmacosx-version-min=\$(MACOSX_VERSION_MIN)" fi @@ -172,7 +167,7 @@ index b0b3033393..1de12e3b51 100644 # Setup OPENJDK_TARGET_OS_API_DIR, used in source paths. -@@ -42220,6 +42263,47 @@ $as_echo "$ac_cv_c_bigendian" >&6; } +@@ -42412,6 +42455,47 @@ fi @@ -220,10 +215,9 @@ index b0b3033393..1de12e3b51 100644 # Configure flags for the tools ############################################################################### -diff --git a/common/autoconf/platform.m4 b/common/autoconf/platform.m4 -index 51df988f61..51cc28c312 100644 ---- a/common/autoconf/platform.m4 -+++ b/common/autoconf/platform.m4 +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/platform.m4 b/common/autoconf/platform.m4 +--- a/common/autoconf/platform.m4 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/platform.m4 2023-12-20 09:23:19.581483690 +0800 @@ -23,6 +23,12 @@ # questions. # @@ -237,7 +231,7 @@ index 51df988f61..51cc28c312 100644 # Support macro for PLATFORM_EXTRACT_TARGET_AND_BUILD. # Converts autoconf style CPU name to OpenJDK style, into # VAR_CPU, VAR_CPU_ARCH, VAR_CPU_BITS and VAR_CPU_ENDIAN. -@@ -96,6 +102,18 @@ AC_DEFUN([PLATFORM_EXTRACT_VARS_FROM_CPU], +@@ -96,6 +102,18 @@ VAR_CPU_BITS=64 VAR_CPU_ENDIAN=big ;; @@ -256,7 +250,7 @@ index 51df988f61..51cc28c312 100644 *) AC_MSG_ERROR([unsupported cpu $1]) ;; -@@ -283,6 +301,8 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS], +@@ -283,6 +301,8 @@ OPENJDK_TARGET_CPU_LEGACY_LIB="i386" elif test "x$OPENJDK_TARGET_CPU" = xx86_64; then OPENJDK_TARGET_CPU_LEGACY_LIB="amd64" @@ -265,7 +259,7 @@ index 51df988f61..51cc28c312 100644 fi AC_SUBST(OPENJDK_TARGET_CPU_LEGACY_LIB) -@@ -316,6 +336,9 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS], +@@ -316,6 +336,9 @@ elif test "x$OPENJDK_TARGET_OS" != xmacosx && test "x$OPENJDK_TARGET_CPU" = xx86_64; then # On all platforms except macosx, we replace x86_64 with amd64. OPENJDK_TARGET_CPU_OSARCH="amd64" @@ -275,7 +269,7 @@ index 51df988f61..51cc28c312 100644 fi AC_SUBST(OPENJDK_TARGET_CPU_OSARCH) -@@ -325,6 +348,8 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS], +@@ -325,6 +348,8 @@ elif test "x$OPENJDK_TARGET_OS" != xmacosx && test "x$OPENJDK_TARGET_CPU" = xx86_64; then # On all platforms except macosx, we replace x86_64 with amd64. OPENJDK_TARGET_CPU_JLI="amd64" @@ -284,7 +278,7 @@ index 51df988f61..51cc28c312 100644 fi # Now setup the -D flags for building libjli. OPENJDK_TARGET_CPU_JLI_CFLAGS="-DLIBARCHNAME='\"$OPENJDK_TARGET_CPU_JLI\"'" -@@ -337,6 +362,9 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS], +@@ -337,6 +362,9 @@ elif test "x$OPENJDK_TARGET_OS" = xmacosx && test "x$TOOLCHAIN_TYPE" = xclang ; then OPENJDK_TARGET_CPU_JLI_CFLAGS="$OPENJDK_TARGET_CPU_JLI_CFLAGS -stdlib=libc++ -mmacosx-version-min=\$(MACOSX_VERSION_MIN)" fi @@ -294,7 +288,7 @@ index 51df988f61..51cc28c312 100644 AC_SUBST(OPENJDK_TARGET_CPU_JLI_CFLAGS) # Setup OPENJDK_TARGET_OS_API_DIR, used in source paths. -@@ -550,3 +578,46 @@ AC_DEFUN_ONCE([PLATFORM_SETUP_OPENJDK_TARGET_ENDIANNESS], +@@ -550,3 +578,46 @@ AC_MSG_ERROR([The tested endian in the target ($ENDIAN) differs from the endian expected to be found in the target ($OPENJDK_TARGET_CPU_ENDIAN)]) fi ]) @@ -341,10 +335,9 @@ index 51df988f61..51cc28c312 100644 +AC_SUBST(BUILDER_NAME) +AC_SUBST(HOST_NAME) +]) -diff --git a/common/autoconf/spec.gmk.in b/common/autoconf/spec.gmk.in -index 461ec59711..ffbd74dec9 100644 ---- a/common/autoconf/spec.gmk.in -+++ b/common/autoconf/spec.gmk.in +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/common/autoconf/spec.gmk.in b/common/autoconf/spec.gmk.in +--- a/common/autoconf/spec.gmk.in 2024-01-11 09:53:23.000000000 +0800 ++++ b/common/autoconf/spec.gmk.in 2024-01-30 13:54:24.742709461 +0800 @@ -23,6 +23,12 @@ # questions. # @@ -358,7 +351,7 @@ index 461ec59711..ffbd74dec9 100644 # Configured @DATE_WHEN_CONFIGURED@ to build # for target system @OPENJDK_TARGET_OS@-@OPENJDK_TARGET_CPU@ # (called @OPENJDK_TARGET_AUTOCONF_NAME@ by autoconf) -@@ -219,6 +225,23 @@ else +@@ -219,6 +225,23 @@ endif JRE_RELEASE_VERSION:=$(FULL_VERSION) @@ -368,7 +361,7 @@ index 461ec59711..ffbd74dec9 100644 +HOST_NAME:=@HOST_NAME@ + +# Loongson OpenJDK Version info -+VER=8.1.14 ++VER=8.1.18 +ifeq ($(HOST_NAME), ) + HOST_NAME=unknown +endif @@ -382,10 +375,9 @@ index 461ec59711..ffbd74dec9 100644 # How to compile the code: release, fastdebug or slowdebug DEBUG_LEVEL:=@DEBUG_LEVEL@ -diff --git a/hotspot/agent/make/saenv.sh b/hotspot/agent/make/saenv.sh -index ab9a0a431c..a2de3fc329 100644 ---- a/hotspot/agent/make/saenv.sh -+++ b/hotspot/agent/make/saenv.sh +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/make/saenv.sh b/hotspot/agent/make/saenv.sh +--- a/hotspot/agent/make/saenv.sh 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/make/saenv.sh 2023-12-20 09:23:19.681482545 +0800 @@ -23,6 +23,12 @@ # # @@ -399,7 +391,7 @@ index ab9a0a431c..a2de3fc329 100644 # This file sets common environment variables for all SA scripts OS=`uname` -@@ -42,6 +48,14 @@ if [ "$OS" = "Linux" ]; then +@@ -42,6 +48,14 @@ SA_LIBPATH=$STARTDIR/../src/os/linux/amd64:$STARTDIR/linux/amd64 OPTIONS="-Dsa.library.path=$SA_LIBPATH" CPU=amd64 @@ -414,10 +406,48 @@ index ab9a0a431c..a2de3fc329 100644 else SA_LIBPATH=$STARTDIR/../src/os/linux/i386:$STARTDIR/linux/i386 OPTIONS="-Dsa.library.path=$SA_LIBPATH" -diff --git a/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c b/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c -index d6a0c7d9a9..b3b1380b29 100644 ---- a/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c -+++ b/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/os/linux/libproc.h b/hotspot/agent/src/os/linux/libproc.h +--- a/hotspot/agent/src/os/linux/libproc.h 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/os/linux/libproc.h 2023-12-20 09:23:19.684815841 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef _LIBPROC_H_ + #define _LIBPROC_H_ + +@@ -36,7 +42,7 @@ + + #include + +-#if defined(aarch64) ++#if defined(aarch64) || defined(loongarch64) + #include "asm/ptrace.h" + #endif + +@@ -76,7 +82,12 @@ + #include + #define user_regs_struct pt_regs + #endif +-#if defined(aarch64) ++ ++#if defined(mips) || defined(mipsel) || defined(mips64) || defined(mips64el) ++#include ++#define user_regs_struct pt_regs ++#endif ++#if defined(aarch64) || defined(loongarch64) + #define user_regs_struct user_pt_regs + #endif + +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c b/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c +--- a/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/os/linux/LinuxDebuggerLocal.c 2023-12-20 09:23:19.684815841 +0800 @@ -22,6 +22,13 @@ * */ @@ -451,7 +481,7 @@ index d6a0c7d9a9..b3b1380b29 100644 static jfieldID p_ps_prochandle_ID = 0; static jfieldID threadList_ID = 0; static jfieldID loadObjectList_ID = 0; -@@ -337,7 +352,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo +@@ -337,7 +352,7 @@ return (err == PS_OK)? array : 0; } @@ -460,20 +490,20 @@ index d6a0c7d9a9..b3b1380b29 100644 JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0 (JNIEnv *env, jobject this_obj, jint lwp_id) { -@@ -364,6 +379,12 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo - #endif +@@ -365,6 +380,12 @@ #if defined(sparc) || defined(sparcv9) #define NPRGREG sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_NPRGREG -+#endif + #endif +#ifdef loongarch64 +#define NPRGREG sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext_NPRGREG +#endif +#if defined(mips64) || defined(mips64el) +#define NPRGREG sun_jvm_hotspot_debugger_mips64_MIPS64ThreadContext_NPRGREG - #endif ++#endif array = (*env)->NewLongArray(env, NPRGREG); -@@ -470,6 +491,55 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo + CHECK_EXCEPTION_(0); +@@ -470,6 +491,55 @@ } #endif /* aarch64 */ @@ -529,10 +559,9 @@ index d6a0c7d9a9..b3b1380b29 100644 (*env)->ReleaseLongArrayElements(env, array, regs, JNI_COMMIT); return array; -diff --git a/hotspot/agent/src/os/linux/Makefile b/hotspot/agent/src/os/linux/Makefile -index c0b5c869c1..2cc50b6fab 100644 ---- a/hotspot/agent/src/os/linux/Makefile -+++ b/hotspot/agent/src/os/linux/Makefile +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/os/linux/Makefile b/hotspot/agent/src/os/linux/Makefile +--- a/hotspot/agent/src/os/linux/Makefile 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/os/linux/Makefile 2023-12-20 09:23:19.684815841 +0800 @@ -22,7 +22,13 @@ # # @@ -548,7 +577,7 @@ index c0b5c869c1..2cc50b6fab 100644 GCC = gcc JAVAH = ${JAVA_HOME}/bin/javah -@@ -53,6 +59,8 @@ $(ARCH)/LinuxDebuggerLocal.o: LinuxDebuggerLocal.c +@@ -53,6 +59,8 @@ $(JAVAH) -jni -classpath ../../../build/classes -d $(ARCH) \ sun.jvm.hotspot.debugger.x86.X86ThreadContext \ sun.jvm.hotspot.debugger.sparc.SPARCThreadContext \ @@ -557,50 +586,9 @@ index c0b5c869c1..2cc50b6fab 100644 sun.jvm.hotspot.debugger.amd64.AMD64ThreadContext \ sun.jvm.hotspot.debugger.aarch64.AARCH64ThreadContext $(GCC) $(CFLAGS) $< -o $@ -diff --git a/hotspot/agent/src/os/linux/libproc.h b/hotspot/agent/src/os/linux/libproc.h -index 6b6e41cab4..5eb8211aa9 100644 ---- a/hotspot/agent/src/os/linux/libproc.h -+++ b/hotspot/agent/src/os/linux/libproc.h -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #ifndef _LIBPROC_H_ - #define _LIBPROC_H_ - -@@ -36,7 +42,7 @@ - - #include - --#if defined(aarch64) -+#if defined(aarch64) || defined(loongarch64) - #include "asm/ptrace.h" - #endif - -@@ -76,7 +82,12 @@ combination of ptrace and /proc calls. - #include - #define user_regs_struct pt_regs - #endif --#if defined(aarch64) -+ -+#if defined(mips) || defined(mipsel) || defined(mips64) || defined(mips64el) -+#include -+#define user_regs_struct pt_regs -+#endif -+#if defined(aarch64) || defined(loongarch64) - #define user_regs_struct user_pt_regs - #endif - -diff --git a/hotspot/agent/src/os/linux/ps_proc.c b/hotspot/agent/src/os/linux/ps_proc.c -index c4d6a9ecc5..7000e92723 100644 ---- a/hotspot/agent/src/os/linux/ps_proc.c -+++ b/hotspot/agent/src/os/linux/ps_proc.c +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/os/linux/ps_proc.c b/hotspot/agent/src/os/linux/ps_proc.c +--- a/hotspot/agent/src/os/linux/ps_proc.c 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/os/linux/ps_proc.c 2023-12-20 09:23:19.684815841 +0800 @@ -22,6 +22,12 @@ * */ @@ -614,7 +602,7 @@ index c4d6a9ecc5..7000e92723 100644 #include #include #include -@@ -141,7 +147,7 @@ static bool process_get_lwp_regs(struct ps_prochandle* ph, pid_t pid, struct use +@@ -141,7 +147,7 @@ #define PTRACE_GETREGS_REQ PT_GETREGS #endif @@ -623,48 +611,10 @@ index c4d6a9ecc5..7000e92723 100644 if (ptrace_getregs(PTRACE_GETREGS_REQ, pid, user, NULL) < 0) { print_debug("ptrace(PTRACE_GETREGS, ...) failed for lwp %d\n", pid); return false; -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java -index c963350591..20e6f35b9c 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2020. These -+ * modifications are Copyright (c) 2018, 2020, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ * -+ */ - package sun.jvm.hotspot; - - import java.rmi.RemoteException; -@@ -37,6 +43,8 @@ import sun.jvm.hotspot.debugger.MachineDescriptionIA64; - import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; - import sun.jvm.hotspot.debugger.MachineDescriptionSPARC32Bit; - import sun.jvm.hotspot.debugger.MachineDescriptionSPARC64Bit; -+import sun.jvm.hotspot.debugger.MachineDescriptionMIPS64; -+import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; - import sun.jvm.hotspot.debugger.NoSuchSymbolException; - import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; - import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; -@@ -594,6 +602,10 @@ public class HotSpotAgent { - } else { - machDesc = new MachineDescriptionSPARC32Bit(); - } -+ } else if (cpu.equals("mips64")) { -+ machDesc = new MachineDescriptionMIPS64(); -+ } else if (cpu.equals("loongarch64")) { -+ machDesc = new MachineDescriptionLOONGARCH64(); - } else { - try { - machDesc = (MachineDescription) -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java -index 993bf7bb47..1e075aa57e 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java -@@ -94,6 +94,12 @@ public class Disassembler { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/Disassembler.java 2023-12-20 09:23:19.691482431 +0800 +@@ -94,6 +94,12 @@ } else if (arch.equals("amd64") || arch.equals("x86_64")) { path.append(sep + "lib" + sep + "amd64" + sep); libname += "-amd64.so"; @@ -677,105 +627,10 @@ index 993bf7bb47..1e075aa57e 100644 } else { path.append(sep + "lib" + sep + arch + sep); libname += "-" + arch + ".so"; -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java -new file mode 100644 -index 0000000000..0531427dab ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; -+ -+public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; -+ } -+ -+ -+ public boolean isBigEndian() { -+ return false; -+ } -+ -+ public boolean isLP64() { -+ return true; -+ } -+} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java -new file mode 100644 -index 0000000000..1b49efd201 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; -+ -+public class MachineDescriptionMIPS64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; -+ } -+ -+ -+ public boolean isBigEndian() { -+ return "big".equals(System.getProperty("sun.cpu.endian")); -+ } -+ -+ public boolean isLP64() { -+ return true; -+ } -+} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java -index f178d6a6e7..019e794bbb 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java -@@ -32,11 +32,15 @@ import sun.jvm.hotspot.debugger.cdbg.*; +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2023-12-20 09:23:19.704815613 +0800 +@@ -32,11 +32,15 @@ import sun.jvm.hotspot.debugger.x86.*; import sun.jvm.hotspot.debugger.amd64.*; import sun.jvm.hotspot.debugger.sparc.*; @@ -791,7 +646,7 @@ index f178d6a6e7..019e794bbb 100644 import sun.jvm.hotspot.utilities.*; class LinuxCDebugger implements CDebugger { -@@ -106,6 +110,20 @@ class LinuxCDebugger implements CDebugger { +@@ -106,6 +110,20 @@ Address pc = context.getRegisterAsAddress(AARCH64ThreadContext.PC); if (pc == null) return null; return new LinuxAARCH64CFrame(dbg, fp, pc); @@ -812,11 +667,10 @@ index f178d6a6e7..019e794bbb 100644 } else { // Runtime exception thrown by LinuxThreadContextFactory if unknown cpu ThreadContext context = (ThreadContext) thread.getContext(); -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java -index 44c2265d7a..3b6747ac0a 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java -@@ -30,6 +30,8 @@ import sun.jvm.hotspot.debugger.linux.amd64.*; +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2023-12-20 09:23:19.704815613 +0800 +@@ -30,6 +30,8 @@ import sun.jvm.hotspot.debugger.linux.ia64.*; import sun.jvm.hotspot.debugger.linux.x86.*; import sun.jvm.hotspot.debugger.linux.sparc.*; @@ -825,7 +679,7 @@ index 44c2265d7a..3b6747ac0a 100644 class LinuxThreadContextFactory { static ThreadContext createThreadContext(LinuxDebugger dbg) { -@@ -42,6 +44,10 @@ class LinuxThreadContextFactory { +@@ -42,6 +44,10 @@ return new LinuxIA64ThreadContext(dbg); } else if (cpu.equals("sparc")) { return new LinuxSPARCThreadContext(dbg); @@ -836,11 +690,9 @@ index 44c2265d7a..3b6747ac0a 100644 } else { try { Class tcc = Class.forName("sun.jvm.hotspot.debugger.linux." + -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java -new file mode 100644 -index 0000000000..3b20dbbd87 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 2023-12-20 09:23:19.704815613 +0800 @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -922,11 +774,9 @@ index 0000000000..3b20dbbd87 + private Address fp; + private LinuxDebugger dbg; +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java -new file mode 100644 -index 0000000000..9f22133eaf ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 2023-12-20 09:23:19.704815613 +0800 @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -975,11 +825,9 @@ index 0000000000..9f22133eaf + return debugger.newAddress(getRegister(index)); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java -new file mode 100644 -index 0000000000..2e3eb564da ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java 2023-12-20 09:23:19.704815613 +0800 @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -1061,11 +909,9 @@ index 0000000000..2e3eb564da + private Address ebp; + private LinuxDebugger dbg; +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java -new file mode 100644 -index 0000000000..98e0f3f0bc ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java 2023-12-20 09:23:19.704815613 +0800 @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -1114,11 +960,9 @@ index 0000000000..98e0f3f0bc + return debugger.newAddress(getRegister(index)); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java -new file mode 100644 -index 0000000000..90b0cf97e3 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 2023-12-20 09:23:19.704815613 +0800 @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -1243,11 +1087,99 @@ index 0000000000..90b0cf97e3 + tie the implementation to, for example, the debugging system */ + public abstract Address getRegisterAsAddress(int index); +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java -new file mode 100644 -index 0000000000..c57ee9dfc9 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 2023-12-20 09:23:19.698149022 +0800 +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger; ++ ++public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; ++ } ++ ++ ++ public boolean isBigEndian() { ++ return false; ++ } ++ ++ public boolean isLP64() { ++ return true; ++ } ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java 2023-12-20 09:23:19.698149022 +0800 +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger; ++ ++public class MachineDescriptionMIPS64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; ++ } ++ ++ ++ public boolean isBigEndian() { ++ return "big".equals(System.getProperty("sun.cpu.endian")); ++ } ++ ++ public boolean isLP64() { ++ return true; ++ } ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java 2023-12-20 09:23:19.704815613 +0800 @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -1372,11 +1304,10 @@ index 0000000000..c57ee9dfc9 + tie the implementation to, for example, the debugging system */ + public abstract Address getRegisterAsAddress(int index); +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java -index 7113a3a497..24273888c2 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java -@@ -63,6 +63,8 @@ public interface ELFHeader { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2023-12-20 09:23:19.704815613 +0800 +@@ -63,6 +63,8 @@ public static final int ARCH_i860 = 7; /** MIPS architecture type. */ public static final int ARCH_MIPS = 8; @@ -1385,143 +1316,9 @@ index 7113a3a497..24273888c2 100644 /** Returns a file type which is defined by the file type constants. */ public short getFileType(); -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java -index ca1a2575ff..2afa6c55f8 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java -@@ -34,10 +34,14 @@ import sun.jvm.hotspot.debugger.proc.amd64.*; - import sun.jvm.hotspot.debugger.proc.aarch64.*; - import sun.jvm.hotspot.debugger.proc.sparc.*; - import sun.jvm.hotspot.debugger.proc.x86.*; -+import sun.jvm.hotspot.debugger.proc.mips64.*; -+import sun.jvm.hotspot.debugger.proc.loongarch64.*; - import sun.jvm.hotspot.debugger.amd64.*; - import sun.jvm.hotspot.debugger.aarch64.*; - import sun.jvm.hotspot.debugger.sparc.*; - import sun.jvm.hotspot.debugger.x86.*; -+import sun.jvm.hotspot.debugger.mips64.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; - import sun.jvm.hotspot.utilities.*; - - /**

An implementation of the JVMDebugger interface which sits on -@@ -92,6 +96,14 @@ public class ProcDebuggerLocal extends DebuggerBase implements ProcDebugger { - threadFactory = new ProcAARCH64ThreadFactory(this); - pcRegIndex = AARCH64ThreadContext.PC; - fpRegIndex = AARCH64ThreadContext.FP; -+ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { -+ threadFactory = new ProcMIPS64ThreadFactory(this); -+ pcRegIndex = MIPS64ThreadContext.PC; -+ fpRegIndex = MIPS64ThreadContext.FP; -+ } else if (cpu.equals("loongarch64")) { -+ threadFactory = new ProcLOONGARCH64ThreadFactory(this); -+ pcRegIndex = LOONGARCH64ThreadContext.PC; -+ fpRegIndex = LOONGARCH64ThreadContext.FP; - } else { - try { - Class tfc = Class.forName("sun.jvm.hotspot.debugger.proc." + -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java -new file mode 100644 -index 0000000000..42a31e3486 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java -@@ -0,0 +1,92 @@ -+/* -+ * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger.proc.loongarch64; -+ -+import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; -+import sun.jvm.hotspot.debugger.proc.*; -+import sun.jvm.hotspot.utilities.*; -+ -+public class ProcLOONGARCH64Thread implements ThreadProxy { -+ private ProcDebugger debugger; -+ private int id; -+ -+ public ProcLOONGARCH64Thread(ProcDebugger debugger, Address addr) { -+ this.debugger = debugger; -+ -+ // FIXME: the size here should be configurable. However, making it -+ // so would produce a dependency on the "types" package from the -+ // debugger package, which is not desired. -+ this.id = (int) addr.getCIntegerAt(0, 4, true); -+ } -+ -+ public ProcLOONGARCH64Thread(ProcDebugger debugger, long id) { -+ this.debugger = debugger; -+ this.id = (int) id; -+ } -+ -+ public ThreadContext getContext() throws IllegalThreadStateException { -+ ProcLOONGARCH64ThreadContext context = new ProcLOONGARCH64ThreadContext(debugger); -+ long[] regs = debugger.getThreadIntegerRegisterSet(id); -+ /* -+ _NGREG in reg.h is defined to be 19. Because we have included -+ debug registers LOONGARCH64ThreadContext.NPRGREG is 25. -+ */ -+ -+ if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length <= LOONGARCH64ThreadContext.NPRGREG, "size of register set is greater than " + LOONGARCH64ThreadContext.NPRGREG); -+ } -+ for (int i = 0; i < regs.length; i++) { -+ context.setRegister(i, regs[i]); -+ } -+ return context; -+ } -+ -+ public boolean canSetContext() throws DebuggerException { -+ return false; -+ } -+ -+ public void setContext(ThreadContext context) -+ throws IllegalThreadStateException, DebuggerException { -+ throw new DebuggerException("Unimplemented"); -+ } -+ -+ public String toString() { -+ return "t@" + id; -+ } -+ -+ public boolean equals(Object obj) { -+ if ((obj == null) || !(obj instanceof ProcLOONGARCH64Thread)) { -+ return false; -+ } -+ -+ return (((ProcLOONGARCH64Thread) obj).id == id); -+ } -+ -+ public int hashCode() { -+ return id; -+ } -+} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java -new file mode 100644 -index 0000000000..9054f16506 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. @@ -1570,11 +1367,9 @@ index 0000000000..9054f16506 + return debugger.newAddress(getRegister(index)); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java -new file mode 100644 -index 0000000000..bc64335124 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -1621,15 +1416,13 @@ index 0000000000..bc64335124 + return new ProcLOONGARCH64Thread(debugger, id); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java -new file mode 100644 -index 0000000000..5c1e0be893 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -1652,18 +1445,18 @@ index 0000000000..5c1e0be893 + * + */ + -+package sun.jvm.hotspot.debugger.proc.mips64; ++package sun.jvm.hotspot.debugger.proc.loongarch64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; +import sun.jvm.hotspot.debugger.proc.*; +import sun.jvm.hotspot.utilities.*; + -+public class ProcMIPS64Thread implements ThreadProxy { ++public class ProcLOONGARCH64Thread implements ThreadProxy { + private ProcDebugger debugger; + private int id; + -+ public ProcMIPS64Thread(ProcDebugger debugger, Address addr) { ++ public ProcLOONGARCH64Thread(ProcDebugger debugger, Address addr) { + this.debugger = debugger; + + // FIXME: the size here should be configurable. However, making it @@ -1672,21 +1465,21 @@ index 0000000000..5c1e0be893 + this.id = (int) addr.getCIntegerAt(0, 4, true); + } + -+ public ProcMIPS64Thread(ProcDebugger debugger, long id) { ++ public ProcLOONGARCH64Thread(ProcDebugger debugger, long id) { + this.debugger = debugger; + this.id = (int) id; + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ ProcMIPS64ThreadContext context = new ProcMIPS64ThreadContext(debugger); ++ ProcLOONGARCH64ThreadContext context = new ProcLOONGARCH64ThreadContext(debugger); + long[] regs = debugger.getThreadIntegerRegisterSet(id); + /* + _NGREG in reg.h is defined to be 19. Because we have included -+ debug registers MIPS64ThreadContext.NPRGREG is 25. ++ debug registers LOONGARCH64ThreadContext.NPRGREG is 25. + */ + + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length <= MIPS64ThreadContext.NPRGREG, "size of register set is greater than " + MIPS64ThreadContext.NPRGREG); ++ Assert.that(regs.length <= LOONGARCH64ThreadContext.NPRGREG, "size of register set is greater than " + LOONGARCH64ThreadContext.NPRGREG); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); @@ -1708,22 +1501,20 @@ index 0000000000..5c1e0be893 + } + + public boolean equals(Object obj) { -+ if ((obj == null) || !(obj instanceof ProcMIPS64Thread)) { ++ if ((obj == null) || !(obj instanceof ProcLOONGARCH64Thread)) { + return false; + } + -+ return (((ProcMIPS64Thread) obj).id == id); ++ return (((ProcLOONGARCH64Thread) obj).id == id); + } + + public int hashCode() { + return id; + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java -new file mode 100644 -index 0000000000..d44223d768 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. @@ -1772,11 +1563,9 @@ index 0000000000..d44223d768 + return debugger.newAddress(getRegister(index)); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java -new file mode 100644 -index 0000000000..bad478fc5c ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -1823,45 +1612,13 @@ index 0000000000..bad478fc5c + return new ProcMIPS64Thread(debugger, id); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java -index ffa61b548e..9cf3ee2da3 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java -@@ -33,6 +33,8 @@ import sun.jvm.hotspot.debugger.cdbg.*; - import sun.jvm.hotspot.debugger.remote.sparc.*; - import sun.jvm.hotspot.debugger.remote.x86.*; - import sun.jvm.hotspot.debugger.remote.amd64.*; -+import sun.jvm.hotspot.debugger.remote.mips64.*; -+import sun.jvm.hotspot.debugger.remote.loongarch64.*; - - /** An implementation of Debugger which wraps a - RemoteDebugger, providing remote debugging via RMI. -@@ -70,6 +72,16 @@ public class RemoteDebuggerClient extends DebuggerBase implements JVMDebugger { - cachePageSize = 4096; - cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); - unalignedAccessesOkay = true; -+ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { -+ threadFactory = new RemoteMIPS64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); -+ unalignedAccessesOkay = true; -+ } else if (cpu.equals("loongarch64")) { -+ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); -+ unalignedAccessesOkay = true; - } else { - try { - Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java -new file mode 100644 -index 0000000000..01e3f8954b ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java -@@ -0,0 +1,54 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java 2023-12-20 09:23:19.708148906 +0800 +@@ -0,0 +1,92 @@ +/* -+ * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -1884,40 +1641,109 @@ index 0000000000..01e3f8954b + * + */ + -+package sun.jvm.hotspot.debugger.remote.loongarch64; ++package sun.jvm.hotspot.debugger.proc.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; -+import sun.jvm.hotspot.debugger.remote.*; ++import sun.jvm.hotspot.debugger.mips64.*; ++import sun.jvm.hotspot.debugger.proc.*; +import sun.jvm.hotspot.utilities.*; + -+public class RemoteLOONGARCH64Thread extends RemoteThread { -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { -+ super(debugger, addr); ++public class ProcMIPS64Thread implements ThreadProxy { ++ private ProcDebugger debugger; ++ private int id; ++ ++ public ProcMIPS64Thread(ProcDebugger debugger, Address addr) { ++ this.debugger = debugger; ++ ++ // FIXME: the size here should be configurable. However, making it ++ // so would produce a dependency on the "types" package from the ++ // debugger package, which is not desired. ++ this.id = (int) addr.getCIntegerAt(0, 4, true); + } + -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { -+ super(debugger, id); ++ public ProcMIPS64Thread(ProcDebugger debugger, long id) { ++ this.debugger = debugger; ++ this.id = (int) id; + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); -+ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : -+ debugger.getThreadIntegerRegisterSet(id); ++ ProcMIPS64ThreadContext context = new ProcMIPS64ThreadContext(debugger); ++ long[] regs = debugger.getThreadIntegerRegisterSet(id); ++ /* ++ _NGREG in reg.h is defined to be 19. Because we have included ++ debug registers MIPS64ThreadContext.NPRGREG is 25. ++ */ ++ + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); ++ Assert.that(regs.length <= MIPS64ThreadContext.NPRGREG, "size of register set is greater than " + MIPS64ThreadContext.NPRGREG); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); + } + return context; + } ++ ++ public boolean canSetContext() throws DebuggerException { ++ return false; ++ } ++ ++ public void setContext(ThreadContext context) ++ throws IllegalThreadStateException, DebuggerException { ++ throw new DebuggerException("Unimplemented"); ++ } ++ ++ public String toString() { ++ return "t@" + id; ++ } ++ ++ public boolean equals(Object obj) { ++ if ((obj == null) || !(obj instanceof ProcMIPS64Thread)) { ++ return false; ++ } ++ ++ return (((ProcMIPS64Thread) obj).id == id); ++ } ++ ++ public int hashCode() { ++ return id; ++ } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java -new file mode 100644 -index 0000000000..ad25bccc8d ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/proc/ProcDebuggerLocal.java 2023-12-20 09:23:19.708148906 +0800 +@@ -34,10 +34,14 @@ + import sun.jvm.hotspot.debugger.proc.aarch64.*; + import sun.jvm.hotspot.debugger.proc.sparc.*; + import sun.jvm.hotspot.debugger.proc.x86.*; ++import sun.jvm.hotspot.debugger.proc.mips64.*; ++import sun.jvm.hotspot.debugger.proc.loongarch64.*; + import sun.jvm.hotspot.debugger.amd64.*; + import sun.jvm.hotspot.debugger.aarch64.*; + import sun.jvm.hotspot.debugger.sparc.*; + import sun.jvm.hotspot.debugger.x86.*; ++import sun.jvm.hotspot.debugger.mips64.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; + import sun.jvm.hotspot.utilities.*; + + /**

An implementation of the JVMDebugger interface which sits on +@@ -92,6 +96,14 @@ + threadFactory = new ProcAARCH64ThreadFactory(this); + pcRegIndex = AARCH64ThreadContext.PC; + fpRegIndex = AARCH64ThreadContext.FP; ++ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { ++ threadFactory = new ProcMIPS64ThreadFactory(this); ++ pcRegIndex = MIPS64ThreadContext.PC; ++ fpRegIndex = MIPS64ThreadContext.FP; ++ } else if (cpu.equals("loongarch64")) { ++ threadFactory = new ProcLOONGARCH64ThreadFactory(this); ++ pcRegIndex = LOONGARCH64ThreadContext.PC; ++ fpRegIndex = LOONGARCH64ThreadContext.FP; + } else { + try { + Class tfc = Class.forName("sun.jvm.hotspot.debugger.proc." + +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -1970,11 +1796,9 @@ index 0000000000..ad25bccc8d + return debugger.newAddress(getRegister(index)); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java -new file mode 100644 -index 0000000000..d8bf50ea5b ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -2021,15 +1845,13 @@ index 0000000000..d8bf50ea5b + return new RemoteLOONGARCH64Thread(debugger, id); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java -new file mode 100644 -index 0000000000..a9285a3b94 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -2052,28 +1874,28 @@ index 0000000000..a9285a3b94 + * + */ + -+package sun.jvm.hotspot.debugger.remote.mips64; ++package sun.jvm.hotspot.debugger.remote.loongarch64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; +import sun.jvm.hotspot.debugger.remote.*; +import sun.jvm.hotspot.utilities.*; + -+public class RemoteMIPS64Thread extends RemoteThread { -+ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, Address addr) { ++public class RemoteLOONGARCH64Thread extends RemoteThread { ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { + super(debugger, addr); + } + -+ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, long id) { ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { + super(debugger, id); + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteMIPS64ThreadContext context = new RemoteMIPS64ThreadContext(debugger); ++ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); + long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : + debugger.getThreadIntegerRegisterSet(id); + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == MIPS64ThreadContext.NPRGREG, "size of register set must match"); ++ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); @@ -2081,11 +1903,9 @@ index 0000000000..a9285a3b94 + return context; + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java -new file mode 100644 -index 0000000000..4d711f9ba7 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -2138,11 +1958,9 @@ index 0000000000..4d711f9ba7 + return debugger.newAddress(getRegister(index)); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java -new file mode 100644 -index 0000000000..020a2f1ff9 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java 2023-12-20 09:23:19.708148906 +0800 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -2189,35 +2007,132 @@ index 0000000000..020a2f1ff9 + return new RemoteMIPS64Thread(debugger, id); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java -index 842a3b357d..81efdd02f8 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java -@@ -34,6 +34,8 @@ import sun.jvm.hotspot.runtime.win32_amd64.Win32AMD64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.win32_x86.Win32X86JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_x86.LinuxX86JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_mips64.LinuxMIPS64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_sparc.LinuxSPARCJavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; -@@ -90,6 +92,10 @@ public class Threads { - access = new LinuxSPARCJavaThreadPDAccess(); - } else if (cpu.equals("aarch64")) { - access = new LinuxAARCH64JavaThreadPDAccess(); -+ } else if (cpu.equals("mips64")) { -+ access = new LinuxMIPS64JavaThreadPDAccess(); -+ } else if (cpu.equals("loongarch64")) { -+ access = new LinuxLOONGARCH64JavaThreadPDAccess(); +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java 2023-12-20 09:23:19.708148906 +0800 +@@ -0,0 +1,54 @@ ++/* ++ * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger.remote.mips64; ++ ++import sun.jvm.hotspot.debugger.*; ++import sun.jvm.hotspot.debugger.mips64.*; ++import sun.jvm.hotspot.debugger.remote.*; ++import sun.jvm.hotspot.utilities.*; ++ ++public class RemoteMIPS64Thread extends RemoteThread { ++ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, Address addr) { ++ super(debugger, addr); ++ } ++ ++ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, long id) { ++ super(debugger, id); ++ } ++ ++ public ThreadContext getContext() throws IllegalThreadStateException { ++ RemoteMIPS64ThreadContext context = new RemoteMIPS64ThreadContext(debugger); ++ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : ++ debugger.getThreadIntegerRegisterSet(id); ++ if (Assert.ASSERTS_ENABLED) { ++ Assert.that(regs.length == MIPS64ThreadContext.NPRGREG, "size of register set must match"); ++ } ++ for (int i = 0; i < regs.length; i++) { ++ context.setRegister(i, regs[i]); ++ } ++ return context; ++ } ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2023-12-20 09:23:19.708148906 +0800 +@@ -33,6 +33,8 @@ + import sun.jvm.hotspot.debugger.remote.sparc.*; + import sun.jvm.hotspot.debugger.remote.x86.*; + import sun.jvm.hotspot.debugger.remote.amd64.*; ++import sun.jvm.hotspot.debugger.remote.mips64.*; ++import sun.jvm.hotspot.debugger.remote.loongarch64.*; + + /** An implementation of Debugger which wraps a + RemoteDebugger, providing remote debugging via RMI. +@@ -70,6 +72,16 @@ + cachePageSize = 4096; + cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); + unalignedAccessesOkay = true; ++ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { ++ threadFactory = new RemoteMIPS64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); ++ unalignedAccessesOkay = true; ++ } else if (cpu.equals("loongarch64")) { ++ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); ++ unalignedAccessesOkay = true; + } else { + try { + Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2023-12-20 09:23:19.691482431 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2020. These ++ * modifications are Copyright (c) 2018, 2020, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ * ++ */ + package sun.jvm.hotspot; + + import java.rmi.RemoteException; +@@ -37,6 +43,8 @@ + import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; + import sun.jvm.hotspot.debugger.MachineDescriptionSPARC32Bit; + import sun.jvm.hotspot.debugger.MachineDescriptionSPARC64Bit; ++import sun.jvm.hotspot.debugger.MachineDescriptionMIPS64; ++import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; + import sun.jvm.hotspot.debugger.NoSuchSymbolException; + import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; + import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; +@@ -594,6 +602,10 @@ } else { - try { - access = (JavaThreadPDAccess) -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java -new file mode 100644 -index 0000000000..77c45c2e99 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java + machDesc = new MachineDescriptionSPARC32Bit(); + } ++ } else if (cpu.equals("mips64")) { ++ machDesc = new MachineDescriptionMIPS64(); ++ } else if (cpu.equals("loongarch64")) { ++ machDesc = new MachineDescriptionLOONGARCH64(); + } else { + try { + machDesc = (MachineDescription) +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -2352,11 +2267,9 @@ index 0000000000..77c45c2e99 + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java -new file mode 100644 -index 0000000000..a0fd73fa67 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -2490,11 +2403,9 @@ index 0000000000..a0fd73fa67 + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java -new file mode 100644 -index 0000000000..0208e6e224 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,217 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -2713,11 +2624,9 @@ index 0000000000..0208e6e224 + pcFound = pc; + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java -new file mode 100644 -index 0000000000..fdf0c79c1a ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,534 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -3253,11 +3162,9 @@ index 0000000000..fdf0c79c1a + } + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java -new file mode 100644 -index 0000000000..f7dbbcaacd ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -3316,11 +3223,9 @@ index 0000000000..f7dbbcaacd + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java -new file mode 100644 -index 0000000000..021ef523e3 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -3374,11 +3279,9 @@ index 0000000000..021ef523e3 + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java -new file mode 100644 -index 0000000000..21259a4d32 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,217 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -3597,11 +3500,9 @@ index 0000000000..21259a4d32 + pcFound = pc; + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java -new file mode 100644 -index 0000000000..0cc5cf4e7c ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,547 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -4150,11 +4051,9 @@ index 0000000000..0cc5cf4e7c + } + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java -new file mode 100644 -index 0000000000..81fcb5b568 ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -4213,11 +4112,9 @@ index 0000000000..81fcb5b568 + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java -new file mode 100644 -index 0000000000..648503792d ---- /dev/null -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java 2023-12-20 09:23:19.738148563 +0800 @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -4271,10 +4168,32 @@ index 0000000000..648503792d + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff --git a/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java -index aa69257866..9c97d09bc3 100644 ---- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java -+++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/runtime/Threads.java 2023-12-20 09:23:19.734815268 +0800 +@@ -34,6 +34,8 @@ + import sun.jvm.hotspot.runtime.win32_x86.Win32X86JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_x86.LinuxX86JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_mips64.LinuxMIPS64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_sparc.LinuxSPARCJavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; +@@ -90,6 +92,10 @@ + access = new LinuxSPARCJavaThreadPDAccess(); + } else if (cpu.equals("aarch64")) { + access = new LinuxAARCH64JavaThreadPDAccess(); ++ } else if (cpu.equals("mips64")) { ++ access = new LinuxMIPS64JavaThreadPDAccess(); ++ } else if (cpu.equals("loongarch64")) { ++ access = new LinuxLOONGARCH64JavaThreadPDAccess(); + } else { + try { + access = (JavaThreadPDAccess) +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java b/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java +--- a/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/agent/src/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2023-12-20 09:23:19.748148449 +0800 @@ -22,6 +22,13 @@ * */ @@ -4289,7 +4208,7 @@ index aa69257866..9c97d09bc3 100644 package sun.jvm.hotspot.utilities; /** Provides canonicalized OS and CPU information for the rest of the -@@ -65,6 +72,10 @@ public class PlatformInfo { +@@ -65,6 +72,10 @@ return cpu; } else if (cpu.equals("aarch64")) { return cpu; @@ -4300,10 +4219,9 @@ index aa69257866..9c97d09bc3 100644 } else { try { Class pic = Class.forName("sun.jvm.hotspot.utilities.PlatformInfoClosed"); -diff --git a/hotspot/make/defs.make b/hotspot/make/defs.make -index a3573da56f..6e93182c92 100644 ---- a/hotspot/make/defs.make -+++ b/hotspot/make/defs.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/defs.make b/hotspot/make/defs.make +--- a/hotspot/make/defs.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/defs.make 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4317,7 +4235,7 @@ index a3573da56f..6e93182c92 100644 # The common definitions for hotspot builds. # Optionally include SPEC file generated by configure. -@@ -285,7 +291,7 @@ ifneq ($(OSNAME),windows) +@@ -285,7 +291,7 @@ # Use uname output for SRCARCH, but deal with platform differences. If ARCH # is not explicitly listed below, it is treated as x86. @@ -4326,7 +4244,7 @@ index a3573da56f..6e93182c92 100644 ARCH/ = x86 ARCH/sparc = sparc ARCH/sparc64= sparc -@@ -295,6 +301,10 @@ ifneq ($(OSNAME),windows) +@@ -295,6 +301,10 @@ ARCH/ppc64 = ppc ARCH/ppc64le= ppc ARCH/ppc = ppc @@ -4337,7 +4255,7 @@ index a3573da56f..6e93182c92 100644 ARCH/zero = zero ARCH/aarch64 = aarch64 -@@ -317,6 +327,20 @@ ifneq ($(OSNAME),windows) +@@ -317,6 +327,20 @@ BUILDARCH = ppc64 endif endif @@ -4358,7 +4276,7 @@ index a3573da56f..6e93182c92 100644 # LIBARCH is 1:1 mapping from BUILDARCH, except for ARCH=ppc64le ifeq ($(ARCH),ppc64le) -@@ -332,9 +356,18 @@ ifneq ($(OSNAME),windows) +@@ -332,9 +356,18 @@ LIBARCH/sparcv9 = sparcv9 LIBARCH/ia64 = ia64 LIBARCH/ppc64 = ppc64 @@ -4378,11 +4296,10 @@ index a3573da56f..6e93182c92 100644 endif # Required make macro settings for all platforms -diff --git a/hotspot/make/linux/Makefile b/hotspot/make/linux/Makefile -index e8f2010412..5aff01e87d 100644 ---- a/hotspot/make/linux/Makefile -+++ b/hotspot/make/linux/Makefile -@@ -74,6 +74,10 @@ ifneq (,$(findstring $(ARCH), ppc ppc64)) +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/Makefile b/hotspot/make/linux/Makefile +--- a/hotspot/make/linux/Makefile 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/Makefile 2023-12-20 09:23:19.761481629 +0800 +@@ -74,6 +74,10 @@ FORCE_TIERED=0 endif endif @@ -4393,10 +4310,9 @@ index e8f2010412..5aff01e87d 100644 ifdef LP64 ifeq ("$(filter $(LP64_ARCH),$(BUILDARCH))","") -diff --git a/hotspot/make/linux/makefiles/defs.make b/hotspot/make/linux/makefiles/defs.make -index ec414639d2..9ade73ab34 100644 ---- a/hotspot/make/linux/makefiles/defs.make -+++ b/hotspot/make/linux/makefiles/defs.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/defs.make b/hotspot/make/linux/makefiles/defs.make +--- a/hotspot/make/linux/makefiles/defs.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/defs.make 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4410,7 +4326,7 @@ index ec414639d2..9ade73ab34 100644 # The common definitions for hotspot linux builds. # Include the top level defs.make under make directory instead of this one. # This file is included into make/defs.make. -@@ -39,6 +45,18 @@ ifndef ARCH +@@ -39,6 +45,18 @@ ARCH := ppc64 endif endif @@ -4429,7 +4345,7 @@ index ec414639d2..9ade73ab34 100644 PATH_SEP ?= : -@@ -83,6 +101,36 @@ ifneq (,$(findstring $(ARCH), sparc)) +@@ -83,6 +101,36 @@ HS_ARCH = sparc endif @@ -4466,7 +4382,7 @@ index ec414639d2..9ade73ab34 100644 # i686/i586 and amd64/x86_64 ifneq (,$(findstring $(ARCH), amd64 x86_64 i686 i586)) ifeq ($(ARCH_DATA_MODEL), 64) -@@ -311,16 +359,24 @@ ADD_SA_BINARIES/sparc = $(EXPORT_JRE_LIB_ARCH_DIR)/libsaproc.$(LIBRARY_SUFFIX) \ +@@ -311,16 +359,24 @@ $(EXPORT_LIB_DIR)/sa-jdi.jar ADD_SA_BINARIES/aarch64 = $(EXPORT_JRE_LIB_ARCH_DIR)/libsaproc.$(LIBRARY_SUFFIX) \ $(EXPORT_LIB_DIR)/sa-jdi.jar @@ -4491,10 +4407,9 @@ index ec414639d2..9ade73ab34 100644 endif endif endif -diff --git a/hotspot/make/linux/makefiles/gcc.make b/hotspot/make/linux/makefiles/gcc.make -index 7dde7f0963..94c6d1d015 100644 ---- a/hotspot/make/linux/makefiles/gcc.make -+++ b/hotspot/make/linux/makefiles/gcc.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/gcc.make b/hotspot/make/linux/makefiles/gcc.make +--- a/hotspot/make/linux/makefiles/gcc.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/gcc.make 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4508,7 +4423,7 @@ index 7dde7f0963..94c6d1d015 100644 #------------------------------------------------------------------------ # CC, CXX & AS -@@ -177,6 +183,9 @@ ARCHFLAG/aarch64 = +@@ -177,6 +183,9 @@ ARCHFLAG/ia64 = ARCHFLAG/sparc = -m32 -mcpu=v9 ARCHFLAG/sparcv9 = -m64 -mcpu=v9 @@ -4518,7 +4433,7 @@ index 7dde7f0963..94c6d1d015 100644 ARCHFLAG/zero = $(ZERO_ARCHFLAG) ARCHFLAG/ppc64 = -m64 -@@ -202,7 +211,7 @@ else +@@ -202,7 +211,7 @@ endif # Compiler warnings are treated as errors @@ -4527,11 +4442,9 @@ index 7dde7f0963..94c6d1d015 100644 ifeq ($(USE_CLANG), true) # However we need to clean the code up before we can unrestrictedly enable this option with Clang -diff --git a/hotspot/make/linux/makefiles/loongarch64.make b/hotspot/make/linux/makefiles/loongarch64.make -new file mode 100644 -index 0000000000..9e3cdb6f23 ---- /dev/null -+++ b/hotspot/make/linux/makefiles/loongarch64.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/loongarch64.make b/hotspot/make/linux/makefiles/loongarch64.make +--- a/hotspot/make/linux/makefiles/loongarch64.make 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/loongarch64.make 2023-12-20 09:23:19.761481629 +0800 @@ -0,0 +1,43 @@ +# +# Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4576,11 +4489,9 @@ index 0000000000..9e3cdb6f23 +CFLAGS += -fno-omit-frame-pointer + +OPT_CFLAGS/compactingPermGenGen.o = -O1 -diff --git a/hotspot/make/linux/makefiles/mips64.make b/hotspot/make/linux/makefiles/mips64.make -new file mode 100644 -index 0000000000..d9af3b13ab ---- /dev/null -+++ b/hotspot/make/linux/makefiles/mips64.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/mips64.make b/hotspot/make/linux/makefiles/mips64.make +--- a/hotspot/make/linux/makefiles/mips64.make 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/mips64.make 2023-12-20 09:23:19.761481629 +0800 @@ -0,0 +1,43 @@ +# +# Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4625,10 +4536,9 @@ index 0000000000..d9af3b13ab +CFLAGS += -fno-omit-frame-pointer + +OPT_CFLAGS/compactingPermGenGen.o = -O1 -diff --git a/hotspot/make/linux/makefiles/sa.make b/hotspot/make/linux/makefiles/sa.make -index cdcb16a1a3..34c71bd666 100644 ---- a/hotspot/make/linux/makefiles/sa.make -+++ b/hotspot/make/linux/makefiles/sa.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/sa.make b/hotspot/make/linux/makefiles/sa.make +--- a/hotspot/make/linux/makefiles/sa.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/sa.make 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4642,7 +4552,7 @@ index cdcb16a1a3..34c71bd666 100644 # This makefile (sa.make) is included from the sa.make in the # build directories. -@@ -109,6 +115,8 @@ $(GENERATED)/sa-jdi.jar:: $(AGENT_FILES) +@@ -109,6 +115,8 @@ $(QUIETLY) $(REMOTE) $(RUN.JAVAH) -classpath $(SA_CLASSDIR) -d $(GENERATED) -jni sun.jvm.hotspot.debugger.x86.X86ThreadContext $(QUIETLY) $(REMOTE) $(RUN.JAVAH) -classpath $(SA_CLASSDIR) -d $(GENERATED) -jni sun.jvm.hotspot.debugger.amd64.AMD64ThreadContext $(QUIETLY) $(REMOTE) $(RUN.JAVAH) -classpath $(SA_CLASSDIR) -d $(GENERATED) -jni sun.jvm.hotspot.debugger.aarch64.AARCH64ThreadContext @@ -4651,10 +4561,9 @@ index cdcb16a1a3..34c71bd666 100644 $(QUIETLY) $(REMOTE) $(RUN.JAVAH) -classpath $(SA_CLASSDIR) -d $(GENERATED) -jni sun.jvm.hotspot.debugger.sparc.SPARCThreadContext $(QUIETLY) $(REMOTE) $(RUN.JAVAH) -classpath $(SA_CLASSDIR) -d $(GENERATED) -jni sun.jvm.hotspot.asm.Disassembler -diff --git a/hotspot/make/linux/makefiles/saproc.make b/hotspot/make/linux/makefiles/saproc.make -index ffc0ec5ce5..c04a6765df 100644 ---- a/hotspot/make/linux/makefiles/saproc.make -+++ b/hotspot/make/linux/makefiles/saproc.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/saproc.make b/hotspot/make/linux/makefiles/saproc.make +--- a/hotspot/make/linux/makefiles/saproc.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/saproc.make 2023-12-20 09:23:19.761481629 +0800 @@ -21,6 +21,13 @@ # questions. # @@ -4669,7 +4578,7 @@ index ffc0ec5ce5..c04a6765df 100644 include $(GAMMADIR)/make/defs.make include $(GAMMADIR)/make/altsrc.make -@@ -81,7 +88,12 @@ endif +@@ -81,7 +88,12 @@ SA_LFLAGS = $(MAPFLAG:FILENAME=$(SAMAPFILE)) $(LDFLAGS_HASH_STYLE) \ $(LDFLAGS_NO_EXEC_STACK) $(EXTRA_LDFLAGS) @@ -4682,10 +4591,9 @@ index ffc0ec5ce5..c04a6765df 100644 $(LIBSAPROC): $(SASRCFILES) $(SAMAPFILE) $(QUIETLY) if [ "$(BOOT_JAVA_HOME)" = "" ]; then \ -diff --git a/hotspot/make/linux/makefiles/sparcWorks.make b/hotspot/make/linux/makefiles/sparcWorks.make -index e39116023c..dbc2ace825 100644 ---- a/hotspot/make/linux/makefiles/sparcWorks.make -+++ b/hotspot/make/linux/makefiles/sparcWorks.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/sparcWorks.make b/hotspot/make/linux/makefiles/sparcWorks.make +--- a/hotspot/make/linux/makefiles/sparcWorks.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/sparcWorks.make 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4699,7 +4607,7 @@ index e39116023c..dbc2ace825 100644 #------------------------------------------------------------------------ # CC, CXX & AS -@@ -38,6 +44,7 @@ endif +@@ -38,6 +44,7 @@ ARCHFLAG = $(ARCHFLAG/$(BUILDARCH)) ARCHFLAG/i486 = -m32 ARCHFLAG/amd64 = -m64 @@ -4707,10 +4615,9 @@ index e39116023c..dbc2ace825 100644 CFLAGS += $(ARCHFLAG) AOUT_FLAGS += $(ARCHFLAG) -diff --git a/hotspot/make/linux/makefiles/vm.make b/hotspot/make/linux/makefiles/vm.make -index 04b7c20287..5e428538a0 100644 ---- a/hotspot/make/linux/makefiles/vm.make -+++ b/hotspot/make/linux/makefiles/vm.make +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/makefiles/vm.make b/hotspot/make/linux/makefiles/vm.make +--- a/hotspot/make/linux/makefiles/vm.make 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/linux/makefiles/vm.make 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4724,7 +4631,7 @@ index 04b7c20287..5e428538a0 100644 # Rules to build JVM and related libraries, included from vm.make in the build # directory. -@@ -99,9 +105,22 @@ CXXFLAGS = \ +@@ -99,9 +105,22 @@ ${HS_LIB_ARCH} \ ${VM_DISTRO} @@ -4747,7 +4654,7 @@ index 04b7c20287..5e428538a0 100644 CXXFLAGS/vm_version.o += ${JRE_VERSION} ${VERSION_CFLAGS} CXXFLAGS/arguments.o += ${VERSION_CFLAGS} -@@ -211,6 +230,15 @@ endif +@@ -211,6 +230,15 @@ ifeq ($(Platform_arch_model), x86_64) Src_Files_EXCLUDE += \*x86_32\* endif @@ -4763,11 +4670,9 @@ index 04b7c20287..5e428538a0 100644 # Alternate vm.make # This has to be included here to allow changes to the source -diff --git a/hotspot/make/linux/platform_loongarch64 b/hotspot/make/linux/platform_loongarch64 -new file mode 100644 -index 0000000000..d704cf389a ---- /dev/null -+++ b/hotspot/make/linux/platform_loongarch64 +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/platform_loongarch64 b/hotspot/make/linux/platform_loongarch64 +--- a/hotspot/make/linux/platform_loongarch64 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/make/linux/platform_loongarch64 2023-12-20 09:23:19.761481629 +0800 @@ -0,0 +1,17 @@ +os_family = linux + @@ -4786,11 +4691,9 @@ index 0000000000..d704cf389a +gnu_dis_arch = loongarch64 + +sysdefs = -DLINUX -D_GNU_SOURCE -DLOONGARCH64 -diff --git a/hotspot/make/linux/platform_mips64 b/hotspot/make/linux/platform_mips64 -new file mode 100644 -index 0000000000..c283671f82 ---- /dev/null -+++ b/hotspot/make/linux/platform_mips64 +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/linux/platform_mips64 b/hotspot/make/linux/platform_mips64 +--- a/hotspot/make/linux/platform_mips64 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/make/linux/platform_mips64 2023-12-20 09:23:19.761481629 +0800 @@ -0,0 +1,17 @@ +os_family = linux + @@ -4809,10 +4712,9 @@ index 0000000000..c283671f82 +gnu_dis_arch = mips64 + +sysdefs = -DLINUX -D_GNU_SOURCE -DMIPS64 -diff --git a/hotspot/make/sa.files b/hotspot/make/sa.files -index d6e728a9a8..43b08e3ad1 100644 ---- a/hotspot/make/sa.files -+++ b/hotspot/make/sa.files +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/make/sa.files b/hotspot/make/sa.files +--- a/hotspot/make/sa.files 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/make/sa.files 2023-12-20 09:23:19.761481629 +0800 @@ -22,6 +22,12 @@ # # @@ -4826,7 +4728,7 @@ index d6e728a9a8..43b08e3ad1 100644 # This filelist macro is included in platform specific sa.make # included all packages/*.java. package list can be generated by # $(GAMMADIR)/agent/make/build-pkglist. -@@ -52,14 +58,20 @@ $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/cdbg/basic/*.java \ +@@ -52,14 +58,20 @@ $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/dummy/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/linux/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/linux/amd64/*.java \ @@ -4847,7 +4749,7 @@ index d6e728a9a8..43b08e3ad1 100644 $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/proc/sparc/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/proc/x86/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/debugger/remote/*.java \ -@@ -94,8 +106,12 @@ $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/bsd_x86/*.java \ +@@ -94,8 +106,12 @@ $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/linux/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/linux_amd64/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/linux_aarch64/*.java \ @@ -4860,11 +4762,10 @@ index d6e728a9a8..43b08e3ad1 100644 $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/posix/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/solaris_amd64/*.java \ $(AGENT_SRC_DIR)/sun/jvm/hotspot/runtime/solaris_sparc/*.java \ -diff --git a/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp b/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp -index 35d34a08ea..3b8cf4a11d 100644 ---- a/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp -+++ b/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp -@@ -1177,7 +1177,9 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp b/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp +--- a/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp 2023-12-20 09:23:19.774814810 +0800 +@@ -1177,7 +1177,9 @@ } } @@ -4875,7 +4776,7 @@ index 35d34a08ea..3b8cf4a11d 100644 void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { LIR_Opr src = op->in_opr(); -@@ -1242,7 +1244,7 @@ void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { +@@ -1242,7 +1244,7 @@ } case Bytecodes::_d2l: { @@ -4884,7 +4785,7 @@ index 35d34a08ea..3b8cf4a11d 100644 __ clear_fpsr(); __ fcvtzd(dest->as_register_lo(), src->as_double_reg()); __ get_fpsr(tmp); -@@ -1253,7 +1255,7 @@ void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { +@@ -1253,7 +1255,7 @@ } case Bytecodes::_f2i: { @@ -4893,7 +4794,7 @@ index 35d34a08ea..3b8cf4a11d 100644 __ clear_fpsr(); __ fcvtzsw(dest->as_register(), src->as_float_reg()); __ get_fpsr(tmp); -@@ -1264,7 +1266,7 @@ void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { +@@ -1264,7 +1266,7 @@ } case Bytecodes::_f2l: { @@ -4902,7 +4803,7 @@ index 35d34a08ea..3b8cf4a11d 100644 __ clear_fpsr(); __ fcvtzs(dest->as_register_lo(), src->as_float_reg()); __ get_fpsr(tmp); -@@ -1275,7 +1277,7 @@ void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { +@@ -1275,7 +1277,7 @@ } case Bytecodes::_d2i: { @@ -4911,7 +4812,7 @@ index 35d34a08ea..3b8cf4a11d 100644 __ clear_fpsr(); __ fcvtzdw(dest->as_register(), src->as_double_reg()); __ get_fpsr(tmp); -@@ -1731,6 +1733,11 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L +@@ -1731,6 +1733,11 @@ __ csel(result->as_register(), opr1->as_register(), opr2->as_register(), acond); } @@ -4923,11 +4824,10 @@ index 35d34a08ea..3b8cf4a11d 100644 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff --git a/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp b/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp -index 120dd1a7df..6a3289022d 100644 ---- a/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp -+++ b/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp -@@ -277,18 +277,29 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp b/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp +--- a/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/cpu/aarch64/vm/c1_LIRGenerator_aarch64.cpp 2023-12-20 09:23:19.774814810 +0800 +@@ -277,18 +277,29 @@ __ store(reg, addr); } @@ -4961,11 +4861,9 @@ index 120dd1a7df..6a3289022d 100644 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { -diff --git a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp -new file mode 100644 -index 0000000000..2996ef7aa7 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,855 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -5822,12 +5720,10 @@ index 0000000000..2996ef7aa7 + } + } +} -diff --git a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp -new file mode 100644 -index 0000000000..922968a554 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp -@@ -0,0 +1,2804 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,2810 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -7849,19 +7745,25 @@ index 0000000000..922968a554 + void bceqz(ConditionalFlagRegister cj, Label& L) { bceqz(cj, target(L)); } + void bcnez(ConditionalFlagRegister cj, Label& L) { bcnez(cj, target(L)); } + -+ //1. Now Membar_mask_bits is 0,Need to fix it after LA6000 -+ //2. Also to fix *prev & 0x7FFF)== hin in MacroAssembler::membar(Membar_mask_bits hint) + typedef enum { -+ StoreStore = 0, -+ LoadStore = 0, -+ StoreLoad = 0, -+ LoadLoad = 0, -+ AnyAny = 0 ++ // hint[4] ++ Completion = 0, ++ Ordering = (1 << 4), ++ ++ // The bitwise-not of the below constants is corresponding to the hint. This is convenient for OR operation. ++ // hint[3:2] and hint[1:0] ++ LoadLoad = ((1 << 3) | (1 << 1)), ++ LoadStore = ((1 << 3) | (1 << 0)), ++ StoreLoad = ((1 << 2) | (1 << 1)), ++ StoreStore = ((1 << 2) | (1 << 0)), ++ AnyAny = ((3 << 2) | (3 << 0)), + } Membar_mask_bits; + + // Serializes memory and blows flags + void membar(Membar_mask_bits hint) { -+ dbar(hint); ++ assert((hint & (3 << 0)) != 0, "membar mask unsupported!"); ++ assert((hint & (3 << 2)) != 0, "membar mask unsupported!"); ++ dbar(Ordering | (~hint & 0xf)); + } + + // LSX and LASX @@ -8632,11 +8534,9 @@ index 0000000000..922968a554 +}; + +#endif // CPU_LOONGARCH_VM_ASSEMBLER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp -new file mode 100644 -index 0000000000..601f4afe6f ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp +--- a/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/assembler_loongarch.inline.hpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -8671,11 +8571,9 @@ index 0000000000..601f4afe6f +#include "code/codeCache.hpp" + +#endif // CPU_LOONGARCH_VM_ASSEMBLER_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp -new file mode 100644 -index 0000000000..32775e9bc3 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -8787,11 +8685,9 @@ index 0000000000..32775e9bc3 + ((VMJavaVal64*)(addr))->l) + +#endif // CPU_LOONGARCH_VM_BYTECODEINTERPRETER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp -new file mode 100644 -index 0000000000..07df527e94 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp +--- a/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/bytecodeInterpreter_loongarch.inline.hpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,286 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -9079,11 +8975,9 @@ index 0000000000..07df527e94 +} + +#endif // CPU_LOONGARCH_VM_BYTECODEINTERPRETER_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp -new file mode 100644 -index 0000000000..8641090584 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,38 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -9123,11 +9017,9 @@ index 0000000000..8641090584 + // No LoongArch specific bytecodes + return code; +} -diff --git a/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp -new file mode 100644 -index 0000000000..fbdf531996 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/bytecodes_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,31 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -9160,11 +9052,9 @@ index 0000000000..fbdf531996 +// No Loongson specific bytecodes + +#endif // CPU_LOONGARCH_VM_BYTECODES_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp -new file mode 100644 -index 0000000000..8f766a617e ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/bytes_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,75 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -9241,11 +9131,9 @@ index 0000000000..8f766a617e +#endif + +#endif // CPU_LOONGARCH_VM_BYTES_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp -new file mode 100644 -index 0000000000..5166acfa2b ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_CodeStubs_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,387 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -9634,11 +9522,9 @@ index 0000000000..5166acfa2b +///////////////////////////////////////////////////////////////////////////// + +#undef __ -diff --git a/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp -new file mode 100644 -index 0000000000..1140e44431 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_Defs_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. @@ -9719,49 +9605,9 @@ index 0000000000..1140e44431 +}; + +#endif // CPU_LOONGARCH_C1_DEFS_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp -new file mode 100644 -index 0000000000..bd8578c72a ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp -@@ -0,0 +1,32 @@ -+/* -+ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -+ -+// No FPU stack on LoongArch -+class FpuStackSim; -+ -+#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp -new file mode 100644 -index 0000000000..1a89c437a8 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved. @@ -9794,15 +9640,13 @@ index 0000000000..1a89c437a8 + +// No FPU stack on LoongArch64 +#include "precompiled.hpp" -diff --git a/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp -new file mode 100644 -index 0000000000..4f0cf05361 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp -@@ -0,0 +1,143 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_FpuStackSim_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,32 @@ +/* -+ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -9825,129 +9669,16 @@ index 0000000000..4f0cf05361 + * + */ + -+#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+ -+// On LoongArch64 the frame looks as follows: -+// -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+ -+ public: -+ static const int pd_c_runtime_reserved_arg_size; -+ -+ enum { -+ first_available_sp_in_frame = 0, -+ frame_pad_in_bytes = 16, -+ nof_reg_args = 8 -+ }; -+ -+ public: -+ static LIR_Opr receiver_opr; -+ -+ static LIR_Opr r0_opr; -+ static LIR_Opr ra_opr; -+ static LIR_Opr tp_opr; -+ static LIR_Opr sp_opr; -+ static LIR_Opr a0_opr; -+ static LIR_Opr a1_opr; -+ static LIR_Opr a2_opr; -+ static LIR_Opr a3_opr; -+ static LIR_Opr a4_opr; -+ static LIR_Opr a5_opr; -+ static LIR_Opr a6_opr; -+ static LIR_Opr a7_opr; -+ static LIR_Opr t0_opr; -+ static LIR_Opr t1_opr; -+ static LIR_Opr t2_opr; -+ static LIR_Opr t3_opr; -+ static LIR_Opr t4_opr; -+ static LIR_Opr t5_opr; -+ static LIR_Opr t6_opr; -+ static LIR_Opr t7_opr; -+ static LIR_Opr t8_opr; -+ static LIR_Opr rx_opr; -+ static LIR_Opr fp_opr; -+ static LIR_Opr s0_opr; -+ static LIR_Opr s1_opr; -+ static LIR_Opr s2_opr; -+ static LIR_Opr s3_opr; -+ static LIR_Opr s4_opr; -+ static LIR_Opr s5_opr; -+ static LIR_Opr s6_opr; -+ static LIR_Opr s7_opr; -+ static LIR_Opr s8_opr; -+ -+ static LIR_Opr ra_oop_opr; -+ static LIR_Opr a0_oop_opr; -+ static LIR_Opr a1_oop_opr; -+ static LIR_Opr a2_oop_opr; -+ static LIR_Opr a3_oop_opr; -+ static LIR_Opr a4_oop_opr; -+ static LIR_Opr a5_oop_opr; -+ static LIR_Opr a6_oop_opr; -+ static LIR_Opr a7_oop_opr; -+ static LIR_Opr t0_oop_opr; -+ static LIR_Opr t1_oop_opr; -+ static LIR_Opr t2_oop_opr; -+ static LIR_Opr t3_oop_opr; -+ static LIR_Opr t4_oop_opr; -+ static LIR_Opr t5_oop_opr; -+ static LIR_Opr t6_oop_opr; -+ static LIR_Opr t7_oop_opr; -+ static LIR_Opr t8_oop_opr; -+ static LIR_Opr fp_oop_opr; -+ static LIR_Opr s0_oop_opr; -+ static LIR_Opr s1_oop_opr; -+ static LIR_Opr s2_oop_opr; -+ static LIR_Opr s3_oop_opr; -+ static LIR_Opr s4_oop_opr; -+ static LIR_Opr s5_oop_opr; -+ static LIR_Opr s6_oop_opr; -+ static LIR_Opr s7_oop_opr; -+ static LIR_Opr s8_oop_opr; -+ -+ static LIR_Opr scr1_opr; -+ static LIR_Opr scr2_opr; -+ static LIR_Opr scr1_long_opr; -+ static LIR_Opr scr2_long_opr; -+ -+ static LIR_Opr a0_metadata_opr; -+ static LIR_Opr a1_metadata_opr; -+ static LIR_Opr a2_metadata_opr; -+ static LIR_Opr a3_metadata_opr; -+ static LIR_Opr a4_metadata_opr; -+ static LIR_Opr a5_metadata_opr; -+ -+ static LIR_Opr long0_opr; -+ static LIR_Opr long1_opr; -+ static LIR_Opr fpu0_float_opr; -+ static LIR_Opr fpu0_double_opr; -+ -+ static LIR_Opr as_long_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ static LIR_Opr as_pointer_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ -+ // VMReg name for spilled physical FPU stack slot n -+ static VMReg fpu_regname (int n); -+ -+ static bool is_caller_save_register(LIR_Opr opr) { return true; } -+ static bool is_caller_save_register(Register r) { return true; } ++#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP + -+ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } -+ static int last_cpu_reg() { return pd_last_cpu_reg; } -+ static int last_byte_reg() { return pd_last_byte_reg; } ++// No FPU stack on LoongArch ++class FpuStackSim; + -+#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp -new file mode 100644 -index 0000000000..25c90bcf98 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp ++#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,362 @@ +/* + * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. @@ -10311,12 +10042,157 @@ index 0000000000..25c90bcf98 +bool FrameMap::validate_frame() { + return true; +} -diff --git a/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp -new file mode 100644 -index 0000000000..38b0daa025 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp -@@ -0,0 +1,83 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_FrameMap_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,143 @@ ++/* ++ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP ++ ++// On LoongArch64 the frame looks as follows: ++// ++// +-----------------------------+---------+----------------------------------------+----------------+----------- ++// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . ++// +-----------------------------+---------+----------------------------------------+----------------+----------- ++ ++ public: ++ static const int pd_c_runtime_reserved_arg_size; ++ ++ enum { ++ first_available_sp_in_frame = 0, ++ frame_pad_in_bytes = 16, ++ nof_reg_args = 8 ++ }; ++ ++ public: ++ static LIR_Opr receiver_opr; ++ ++ static LIR_Opr r0_opr; ++ static LIR_Opr ra_opr; ++ static LIR_Opr tp_opr; ++ static LIR_Opr sp_opr; ++ static LIR_Opr a0_opr; ++ static LIR_Opr a1_opr; ++ static LIR_Opr a2_opr; ++ static LIR_Opr a3_opr; ++ static LIR_Opr a4_opr; ++ static LIR_Opr a5_opr; ++ static LIR_Opr a6_opr; ++ static LIR_Opr a7_opr; ++ static LIR_Opr t0_opr; ++ static LIR_Opr t1_opr; ++ static LIR_Opr t2_opr; ++ static LIR_Opr t3_opr; ++ static LIR_Opr t4_opr; ++ static LIR_Opr t5_opr; ++ static LIR_Opr t6_opr; ++ static LIR_Opr t7_opr; ++ static LIR_Opr t8_opr; ++ static LIR_Opr rx_opr; ++ static LIR_Opr fp_opr; ++ static LIR_Opr s0_opr; ++ static LIR_Opr s1_opr; ++ static LIR_Opr s2_opr; ++ static LIR_Opr s3_opr; ++ static LIR_Opr s4_opr; ++ static LIR_Opr s5_opr; ++ static LIR_Opr s6_opr; ++ static LIR_Opr s7_opr; ++ static LIR_Opr s8_opr; ++ ++ static LIR_Opr ra_oop_opr; ++ static LIR_Opr a0_oop_opr; ++ static LIR_Opr a1_oop_opr; ++ static LIR_Opr a2_oop_opr; ++ static LIR_Opr a3_oop_opr; ++ static LIR_Opr a4_oop_opr; ++ static LIR_Opr a5_oop_opr; ++ static LIR_Opr a6_oop_opr; ++ static LIR_Opr a7_oop_opr; ++ static LIR_Opr t0_oop_opr; ++ static LIR_Opr t1_oop_opr; ++ static LIR_Opr t2_oop_opr; ++ static LIR_Opr t3_oop_opr; ++ static LIR_Opr t4_oop_opr; ++ static LIR_Opr t5_oop_opr; ++ static LIR_Opr t6_oop_opr; ++ static LIR_Opr t7_oop_opr; ++ static LIR_Opr t8_oop_opr; ++ static LIR_Opr fp_oop_opr; ++ static LIR_Opr s0_oop_opr; ++ static LIR_Opr s1_oop_opr; ++ static LIR_Opr s2_oop_opr; ++ static LIR_Opr s3_oop_opr; ++ static LIR_Opr s4_oop_opr; ++ static LIR_Opr s5_oop_opr; ++ static LIR_Opr s6_oop_opr; ++ static LIR_Opr s7_oop_opr; ++ static LIR_Opr s8_oop_opr; ++ ++ static LIR_Opr scr1_opr; ++ static LIR_Opr scr2_opr; ++ static LIR_Opr scr1_long_opr; ++ static LIR_Opr scr2_long_opr; ++ ++ static LIR_Opr a0_metadata_opr; ++ static LIR_Opr a1_metadata_opr; ++ static LIR_Opr a2_metadata_opr; ++ static LIR_Opr a3_metadata_opr; ++ static LIR_Opr a4_metadata_opr; ++ static LIR_Opr a5_metadata_opr; ++ ++ static LIR_Opr long0_opr; ++ static LIR_Opr long1_opr; ++ static LIR_Opr fpu0_float_opr; ++ static LIR_Opr fpu0_double_opr; ++ ++ static LIR_Opr as_long_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ static LIR_Opr as_pointer_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ ++ // VMReg name for spilled physical FPU stack slot n ++ static VMReg fpu_regname (int n); ++ ++ static bool is_caller_save_register(LIR_Opr opr) { return true; } ++ static bool is_caller_save_register(Register r) { return true; } ++ ++ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } ++ static int last_cpu_reg() { return pd_last_cpu_reg; } ++ static int last_byte_reg() { return pd_last_byte_reg; } ++ ++#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,69 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -10342,69 +10218,164 @@ index 0000000000..38b0daa025 + * + */ + -+#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP + -+// ArrayCopyStub needs access to bailout -+friend class ArrayCopyStub; ++#include "utilities/globalDefinitions.hpp" ++#include "utilities/macros.hpp" + -+ private: -+ int array_element_size(BasicType type) const; ++// Sets the default values for platform dependent flags used by the client compiler. ++// (see c1_globals.hpp) + -+ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, -+ int dest_index, bool pop_fpu_stack); ++#ifndef COMPILER2 ++define_pd_global(bool, BackgroundCompilation, true ); ++define_pd_global(bool, InlineIntrinsics, true ); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, false); ++define_pd_global(bool, UseOnStackReplacement, true ); ++define_pd_global(bool, TieredCompilation, false); ++define_pd_global(intx, CompileThreshold, 1500 ); + -+ // helper functions which checks for overflow and sets bailout if it -+ // occurs. Always returns a valid embeddable pointer but in the -+ // bailout case the pointer won't be to unique storage. -+ address float_constant(float f); -+ address double_constant(double d); ++define_pd_global(intx, OnStackReplacePercentage, 933 ); ++define_pd_global(intx, NewSizeThreadIncrease, 4*K ); ++define_pd_global(intx, InitialCodeCacheSize, 160*K); ++define_pd_global(intx, ReservedCodeCacheSize, 32*M ); ++define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); ++define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(bool, ProfileInterpreter, false); ++define_pd_global(intx, CodeCacheExpansionSize, 32*K ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 1); ++define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); ++define_pd_global(bool, NeverActAsServerClassMachine, true ); ++define_pd_global(uint64_t,MaxRAM, 1ULL*G); ++define_pd_global(bool, CICompileOSR, true ); ++#endif // !COMPILER2 ++define_pd_global(bool, UseTypeProfile, false); ++define_pd_global(bool, RoundFPResults, true ); + -+ address int_constant(jlong n); ++define_pd_global(bool, LIRFillDelaySlots, false); ++define_pd_global(bool, OptimizeSinglePrecision, true ); ++define_pd_global(bool, CSEArrayLength, false); ++define_pd_global(bool, TwoOperandLIRForm, false ); + -+ bool is_literal_address(LIR_Address* addr); ++define_pd_global(intx, SafepointPollOffset, 0 ); + -+ // Ensure we have a valid Address (base+offset) to a stack-slot. -+ Address stack_slot_address(int index, uint shift, int adjust = 0); ++#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,33 @@ ++/* ++ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ + -+ // Record the type of the receiver in ReceiverTypeData -+ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, -+ Register recv, Label* update_done); -+ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); ++#include "precompiled.hpp" ++#include "c1/c1_Instruction.hpp" ++#include "c1/c1_LinearScan.hpp" ++#include "utilities/bitMap.inline.hpp" + -+ void casw(Register addr, Register newval, Register cmpval, bool sign); -+ void casl(Register addr, Register newval, Register cmpval); ++void LinearScan::allocate_fpu_stack() { ++ // No FPU stack on LoongArch64 ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,70 @@ ++/* ++ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ + -+ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); ++#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP + -+ static const int max_tableswitches = 20; -+ struct tableswitch switches[max_tableswitches]; -+ int tableswitch_count; ++inline bool LinearScan::is_processed_reg_num(int reg_num) { ++ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; ++} + -+ void init() { tableswitch_count = 0; } ++inline int LinearScan::num_physical_regs(BasicType type) { ++ return 1; ++} + -+ void deoptimize_trap(CodeEmitInfo *info); ++inline bool LinearScan::requires_adjacent_regs(BasicType type) { ++ return false; ++} + -+public: -+ void store_parameter(Register r, int offset_from_sp_in_words); -+ void store_parameter(jint c, int offset_from_sp_in_words); -+ void store_parameter(jobject c, int offset_from_sp_in_words); ++inline bool LinearScan::is_caller_save(int assigned_reg) { ++ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); ++ if (assigned_reg < pd_first_callee_saved_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) ++ return true; ++ return false; ++} + -+ enum { -+ // call stub: CompiledStaticCall::to_interp_stub_size() + -+ // NativeInstruction::nop_instruction_size + -+ // NativeCallTrampolineStub::instruction_size -+ call_stub_size = 13 * NativeInstruction::nop_instruction_size, -+ exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), -+ deopt_handler_size = 7 * NativeInstruction::nop_instruction_size -+ }; ++inline void LinearScan::pd_add_temps(LIR_Op* op) {} + -+#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp -new file mode 100644 -index 0000000000..ee48326bec ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp ++// Implementation of LinearScanWalker ++inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { ++ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { ++ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); ++ _first_reg = pd_first_callee_saved_reg; ++ _last_reg = pd_last_callee_saved_reg; ++ return true; ++ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || ++ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { ++ _first_reg = pd_first_cpu_reg; ++ _last_reg = pd_last_allocatable_cpu_reg; ++ return true; ++ } ++ return false; ++} ++ ++#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,3377 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. @@ -13783,11 +13754,96 @@ index 0000000000..ee48326bec +} + +#undef __ -diff --git a/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp -new file mode 100644 -index 0000000000..7cb15f689f ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_LIRAssembler_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,83 @@ ++/* ++ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP ++ ++// ArrayCopyStub needs access to bailout ++friend class ArrayCopyStub; ++ ++ private: ++ int array_element_size(BasicType type) const; ++ ++ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, ++ int dest_index, bool pop_fpu_stack); ++ ++ // helper functions which checks for overflow and sets bailout if it ++ // occurs. Always returns a valid embeddable pointer but in the ++ // bailout case the pointer won't be to unique storage. ++ address float_constant(float f); ++ address double_constant(double d); ++ ++ address int_constant(jlong n); ++ ++ bool is_literal_address(LIR_Address* addr); ++ ++ // Ensure we have a valid Address (base+offset) to a stack-slot. ++ Address stack_slot_address(int index, uint shift, int adjust = 0); ++ ++ // Record the type of the receiver in ReceiverTypeData ++ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, ++ Register recv, Label* update_done); ++ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); ++ ++ void casw(Register addr, Register newval, Register cmpval, bool sign); ++ void casl(Register addr, Register newval, Register cmpval); ++ ++ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); ++ ++ static const int max_tableswitches = 20; ++ struct tableswitch switches[max_tableswitches]; ++ int tableswitch_count; ++ ++ void init() { tableswitch_count = 0; } ++ ++ void deoptimize_trap(CodeEmitInfo *info); ++ ++public: ++ void store_parameter(Register r, int offset_from_sp_in_words); ++ void store_parameter(jint c, int offset_from_sp_in_words); ++ void store_parameter(jobject c, int offset_from_sp_in_words); ++ ++ enum { ++ // call stub: CompiledStaticCall::to_interp_stub_size() + ++ // NativeInstruction::nop_instruction_size + ++ // NativeCallTrampolineStub::instruction_size ++ call_stub_size = 13 * NativeInstruction::nop_instruction_size, ++ exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), ++ deopt_handler_size = 7 * NativeInstruction::nop_instruction_size ++ }; ++ ++#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_LIRGenerator_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,1442 @@ +/* + * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. @@ -15231,248 +15287,13 @@ index 0000000000..7cb15f689f + } + } +} -diff --git a/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp -new file mode 100644 -index 0000000000..f15dacafeb ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch.hpp -@@ -0,0 +1,70 @@ -+/* -+ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -+ -+inline bool LinearScan::is_processed_reg_num(int reg_num) { -+ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; -+} -+ -+inline int LinearScan::num_physical_regs(BasicType type) { -+ return 1; -+} -+ -+inline bool LinearScan::requires_adjacent_regs(BasicType type) { -+ return false; -+} -+ -+inline bool LinearScan::is_caller_save(int assigned_reg) { -+ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); -+ if (assigned_reg < pd_first_callee_saved_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) -+ return true; -+ return false; -+} -+ -+inline void LinearScan::pd_add_temps(LIR_Op* op) {} -+ -+// Implementation of LinearScanWalker -+inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { -+ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { -+ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); -+ _first_reg = pd_first_callee_saved_reg; -+ _last_reg = pd_last_callee_saved_reg; -+ return true; -+ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || -+ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { -+ _first_reg = pd_first_cpu_reg; -+ _last_reg = pd_last_allocatable_cpu_reg; -+ return true; -+ } -+ return false; -+} -+ -+#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp -new file mode 100644 -index 0000000000..219b2e3671 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_LinearScan_loongarch_64.cpp -@@ -0,0 +1,33 @@ -+/* -+ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "c1/c1_Instruction.hpp" -+#include "c1/c1_LinearScan.hpp" -+#include "utilities/bitMap.inline.hpp" -+ -+void LinearScan::allocate_fpu_stack() { -+ // No FPU stack on LoongArch64 -+} -diff --git a/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp -new file mode 100644 -index 0000000000..38ff4c5836 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp -@@ -0,0 +1,112 @@ -+/* -+ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+ -+using MacroAssembler::build_frame; -+using MacroAssembler::null_check; -+ -+// C1_MacroAssembler contains high-level macros for C1 -+ -+ private: -+ int _rsp_offset; // track rsp changes -+ // initialization -+ void pd_init() { _rsp_offset = 0; } -+ -+ public: -+ void try_allocate( -+ Register obj, // result: pointer to object after successful allocation -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ Label& slow_case // continuation point if fast allocation fails -+ ); -+ -+ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); -+ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); -+ -+ // locking -+ // hdr : must be A0, contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must point to the displaced header location, contents preserved -+ // scratch : scratch register, contents destroyed -+ // returns code offset at which to add null check debug information -+ int lock_object (Register swap, Register obj, Register disp_hdr, Register scratch, Label& slow_case); -+ -+ // unlocking -+ // hdr : contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed -+ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); -+ -+ void initialize_object( -+ Register obj, // result: pointer to object after successful allocation -+ Register klass, // object klass -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB -+ ); -+ -+ // allocation of fixed-size objects -+ // (can also be used to allocate fixed-size arrays, by setting -+ // hdr_size correctly and storing the array length afterwards) -+ // obj : will contain pointer to allocated object -+ // t1, t2 : scratch registers - contents destroyed -+ // header_size: size of object header in words -+ // object_size: total size of object in words -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_object(Register obj, Register t1, Register t2, int header_size, -+ int object_size, Register klass, Label& slow_case); -+ -+ enum { -+ max_array_allocation_length = 0x00FFFFFF -+ }; -+ -+ // allocation of arrays -+ // obj : will contain pointer to allocated object -+ // len : array length in number of elements -+ // t : scratch register - contents destroyed -+ // header_size: size of object header in words -+ // f : element scale factor -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, -+ int f, Register klass, Label& slow_case); -+ -+ int rsp_offset() const { return _rsp_offset; } -+ void set_rsp_offset(int n) { _rsp_offset = n; } -+ -+ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, -+ bool inv_a4, bool inv_a5) PRODUCT_RETURN; -+ -+ // This platform only uses signal-based null checks. The Label is not needed. -+ void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); } -+ -+ void load_parameter(int offset_in_words, Register reg); -+ -+#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp -new file mode 100644 -index 0000000000..51befaed6c ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,346 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -15713,7 +15534,7 @@ index 0000000000..51befaed6c + } + } + -+ dbar(0); ++ membar(StoreStore); + + if (CURRENT_ENV->dtrace_alloc_probes()) { + assert(obj == A0, "must be"); @@ -15748,7 +15569,7 @@ index 0000000000..51befaed6c + // clear rest of allocated space + initialize_body(obj, arr_size, header_size * BytesPerWord, t1, t2); + -+ dbar(0); ++ membar(StoreStore); + + if (CURRENT_ENV->dtrace_alloc_probes()) { + assert(obj == A0, "must be"); @@ -15816,11 +15637,125 @@ index 0000000000..51befaed6c +#endif +} +#endif // ifndef PRODUCT -diff --git a/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp -new file mode 100644 -index 0000000000..a750dca323 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_MacroAssembler_loongarch.hpp 2023-12-20 09:23:19.784814696 +0800 +@@ -0,0 +1,112 @@ ++/* ++ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++ ++using MacroAssembler::build_frame; ++using MacroAssembler::null_check; ++ ++// C1_MacroAssembler contains high-level macros for C1 ++ ++ private: ++ int _rsp_offset; // track rsp changes ++ // initialization ++ void pd_init() { _rsp_offset = 0; } ++ ++ public: ++ void try_allocate( ++ Register obj, // result: pointer to object after successful allocation ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ Label& slow_case // continuation point if fast allocation fails ++ ); ++ ++ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); ++ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); ++ ++ // locking ++ // hdr : must be A0, contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must point to the displaced header location, contents preserved ++ // scratch : scratch register, contents destroyed ++ // returns code offset at which to add null check debug information ++ int lock_object (Register swap, Register obj, Register disp_hdr, Register scratch, Label& slow_case); ++ ++ // unlocking ++ // hdr : contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed ++ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); ++ ++ void initialize_object( ++ Register obj, // result: pointer to object after successful allocation ++ Register klass, // object klass ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB ++ ); ++ ++ // allocation of fixed-size objects ++ // (can also be used to allocate fixed-size arrays, by setting ++ // hdr_size correctly and storing the array length afterwards) ++ // obj : will contain pointer to allocated object ++ // t1, t2 : scratch registers - contents destroyed ++ // header_size: size of object header in words ++ // object_size: total size of object in words ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_object(Register obj, Register t1, Register t2, int header_size, ++ int object_size, Register klass, Label& slow_case); ++ ++ enum { ++ max_array_allocation_length = 0x00FFFFFF ++ }; ++ ++ // allocation of arrays ++ // obj : will contain pointer to allocated object ++ // len : array length in number of elements ++ // t : scratch register - contents destroyed ++ // header_size: size of object header in words ++ // f : element scale factor ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, ++ int f, Register klass, Label& slow_case); ++ ++ int rsp_offset() const { return _rsp_offset; } ++ void set_rsp_offset(int n) { _rsp_offset = n; } ++ ++ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, ++ bool inv_a4, bool inv_a5) PRODUCT_RETURN; ++ ++ // This platform only uses signal-based null checks. The Label is not needed. ++ void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); } ++ ++ void load_parameter(int offset_in_words, Register reg); ++ ++#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c1_Runtime1_loongarch_64.cpp 2023-12-20 09:23:19.784814696 +0800 @@ -0,0 +1,1252 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -17074,86 +17009,9 @@ index 0000000000..a750dca323 + Unimplemented(); + return 0; +} -diff --git a/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp -new file mode 100644 -index 0000000000..df052a058c ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c1_globals_loongarch.hpp -@@ -0,0 +1,69 @@ -+/* -+ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -+ -+#include "utilities/globalDefinitions.hpp" -+#include "utilities/macros.hpp" -+ -+// Sets the default values for platform dependent flags used by the client compiler. -+// (see c1_globals.hpp) -+ -+#ifndef COMPILER2 -+define_pd_global(bool, BackgroundCompilation, true ); -+define_pd_global(bool, InlineIntrinsics, true ); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, false); -+define_pd_global(bool, UseOnStackReplacement, true ); -+define_pd_global(bool, TieredCompilation, false); -+define_pd_global(intx, CompileThreshold, 1500 ); -+ -+define_pd_global(intx, OnStackReplacePercentage, 933 ); -+define_pd_global(intx, NewSizeThreadIncrease, 4*K ); -+define_pd_global(intx, InitialCodeCacheSize, 160*K); -+define_pd_global(intx, ReservedCodeCacheSize, 32*M ); -+define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); -+define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(bool, ProfileInterpreter, false); -+define_pd_global(intx, CodeCacheExpansionSize, 32*K ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 1); -+define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); -+define_pd_global(bool, NeverActAsServerClassMachine, true ); -+define_pd_global(uint64_t,MaxRAM, 1ULL*G); -+define_pd_global(bool, CICompileOSR, true ); -+#endif // !COMPILER2 -+define_pd_global(bool, UseTypeProfile, false); -+define_pd_global(bool, RoundFPResults, true ); -+ -+define_pd_global(bool, LIRFillDelaySlots, false); -+define_pd_global(bool, OptimizeSinglePrecision, true ); -+define_pd_global(bool, CSEArrayLength, false); -+define_pd_global(bool, TwoOperandLIRForm, false ); -+ -+define_pd_global(intx, SafepointPollOffset, 0 ); -+ -+#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp -new file mode 100644 -index 0000000000..044b0d2536 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c2_globals_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -17242,11 +17100,9 @@ index 0000000000..044b0d2536 +define_pd_global(bool, NeverActAsServerClassMachine, false); + +#endif // CPU_LOONGARCH_VM_C2_GLOBALS_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp -new file mode 100644 -index 0000000000..c7bf590b60 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/c2_init_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. @@ -17282,11 +17138,9 @@ index 0000000000..c7bf590b60 +void Compile::pd_compiler2_init() { + guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); +} -diff --git a/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp -new file mode 100644 -index 0000000000..652f6c1092 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/codeBuffer_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -17323,11 +17177,9 @@ index 0000000000..652f6c1092 + void flush_bundle(bool start_new_bundle) {} + +#endif // CPU_LOONGARCH_VM_CODEBUFFER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp -new file mode 100644 -index 0000000000..70a47fc772 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/compiledIC_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,167 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -17496,92 +17348,106 @@ index 0000000000..70a47fc772 +} + +#endif // !PRODUCT -diff --git a/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp -new file mode 100644 -index 0000000000..1b40eab95b ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp -@@ -0,0 +1,72 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/copy_loongarch.hpp 2024-01-30 13:54:24.776042456 +0800 +@@ -0,0 +1,90 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_COPY_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_COPY_LOONGARCH_HPP -+ -+// Inline functions for memory copy and fill. -+ -+// Contains inline asm implementations -+#ifdef TARGET_OS_ARCH_linux_loongarch -+# include "copy_linux_loongarch.inline.hpp" -+#endif -+#ifdef TARGET_OS_ARCH_solaris_loongarch -+# include "copy_solaris_loongarch.inline.hpp" -+#endif -+#ifdef TARGET_OS_ARCH_windows_loongarch -+# include "copy_windows_loongarch.inline.hpp" -+#endif -+#ifdef TARGET_OS_ARCH_bsd_loongarch -+# include "copy_bsd_loongarch.inline.hpp" -+#endif -+// Inline functions for memory copy and fill. -+ -+// Contains inline asm implementations -+ -+static void pd_fill_to_words(HeapWord* tohw, size_t count, juint value) { -+ julong* to = (julong*) tohw; -+ julong v = ((julong) value << 32) | value; -+ while (count-- > 0) { -+ *to++ = v; -+ } -+} -+ -+static void pd_fill_to_aligned_words(HeapWord* tohw, size_t count, juint value) { -+ pd_fill_to_words(tohw, count, value); -+} -+ -+static void pd_fill_to_bytes(void* to, size_t count, jubyte value) { -+ (void)memset(to, value, count); -+} -+ -+static void pd_zero_to_words(HeapWord* tohw, size_t count) { -+ pd_fill_to_words(tohw, count, 0); -+} -+ -+static void pd_zero_to_bytes(void* to, size_t count) { -+ (void)memset(to, 0, count); -+} -+ -+#endif //CPU_LOONGARCH_VM_COPY_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp -new file mode 100644 -index 0000000000..45d86f5bfe ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp -@@ -0,0 +1,53 @@ -+/* -+ * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_COPY_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_COPY_LOONGARCH_HPP ++ ++// Inline functions for memory copy and fill. ++ ++// Contains inline asm implementations ++#ifdef TARGET_OS_ARCH_linux_loongarch ++# include "copy_linux_loongarch.inline.hpp" ++#endif ++#ifdef TARGET_OS_ARCH_solaris_loongarch ++# include "copy_solaris_loongarch.inline.hpp" ++#endif ++#ifdef TARGET_OS_ARCH_windows_loongarch ++# include "copy_windows_loongarch.inline.hpp" ++#endif ++#ifdef TARGET_OS_ARCH_bsd_loongarch ++# include "copy_bsd_loongarch.inline.hpp" ++#endif ++// Inline functions for memory copy and fill. ++ ++// Contains inline asm implementations ++ ++// Template for atomic, element-wise copy. ++template ++static void copy_conjoint_atomic(const T* from, T* to, size_t count) { ++ if (from > to) { ++ while (count-- > 0) { ++ // Copy forwards ++ *to++ = *from++; ++ } ++ } else { ++ from += count - 1; ++ to += count - 1; ++ while (count-- > 0) { ++ // Copy backwards ++ *to-- = *from--; ++ } ++ } ++} ++ ++static void pd_fill_to_words(HeapWord* tohw, size_t count, juint value) { ++ julong* to = (julong*) tohw; ++ julong v = ((julong) value << 32) | value; ++ while (count-- > 0) { ++ *to++ = v; ++ } ++} ++ ++static void pd_fill_to_aligned_words(HeapWord* tohw, size_t count, juint value) { ++ pd_fill_to_words(tohw, count, value); ++} ++ ++static void pd_fill_to_bytes(void* to, size_t count, jubyte value) { ++ (void)memset(to, value, count); ++} ++ ++static void pd_zero_to_words(HeapWord* tohw, size_t count) { ++ pd_fill_to_words(tohw, count, 0); ++} ++ ++static void pd_zero_to_bytes(void* to, size_t count) { ++ (void)memset(to, 0, count); ++} ++ ++#endif //CPU_LOONGARCH_VM_COPY_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/cppInterpreterGenerator_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,53 @@ ++/* ++ * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -17633,11 +17499,9 @@ index 0000000000..45d86f5bfe + bool native); // C++ interpreter only + +#endif // CPU_LOONGARCH_VM_CPPINTERPRETERGENERATOR_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp -new file mode 100644 -index 0000000000..d6c0df3b77 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/cppInterpreter_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2007, 2013, Oracle and/or its affiliates. All rights reserved. @@ -17854,11 +17718,9 @@ index 0000000000..d6c0df3b77 +} + +#endif // CC_INTERP -diff --git a/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp -new file mode 100644 -index 0000000000..50de03653b ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/debug_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,51 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -17911,11 +17773,9 @@ index 0000000000..50de03653b +void pd_obfuscate_location(char *buf,int buflen) {} + +#endif // PRODUCT -diff --git a/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp -new file mode 100644 -index 0000000000..62478be3dc ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -17947,11 +17807,9 @@ index 0000000000..62478be3dc +#include "depChecker_loongarch.hpp" + +// Nothing to do on LoongArch -diff --git a/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp -new file mode 100644 -index 0000000000..598be0ee6f ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/depChecker_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -17984,11 +17842,9 @@ index 0000000000..598be0ee6f +// Nothing to do on LoongArch + +#endif // CPU_LOONGARCH_VM_DEPCHECKER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp -new file mode 100644 -index 0000000000..ccd89e8d6d ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/disassembler_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -18027,11 +17883,9 @@ index 0000000000..ccd89e8d6d + } + +#endif // CPU_LOONGARCH_VM_DISASSEMBLER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp -new file mode 100644 -index 0000000000..0f50a5715d ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/frame_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,711 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -18744,11 +18598,9 @@ index 0000000000..0f50a5715d + init((intptr_t*)sp, (intptr_t*)fp, (address)pc); +} +#endif -diff --git a/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp -new file mode 100644 -index 0000000000..964026e621 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/frame_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,229 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -18979,11 +18831,9 @@ index 0000000000..964026e621 +#endif // CC_INTERP + +#endif // CPU_LOONGARCH_VM_FRAME_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp -new file mode 100644 -index 0000000000..3d22339ad7 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp +--- a/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/frame_loongarch.inline.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,312 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -19297,11 +19147,9 @@ index 0000000000..3d22339ad7 +} + +#endif // CPU_LOONGARCH_VM_FRAME_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp -new file mode 100644 -index 0000000000..f9f93b9e65 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/globalDefinitions_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,41 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -19344,11 +19192,9 @@ index 0000000000..f9f93b9e65 +#define SUPPORTS_NATIVE_CX8 + +#endif // CPU_LOONGARCH_VM_GLOBALDEFINITIONS_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp -new file mode 100644 -index 0000000000..182be608a3 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/globals_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -19453,11 +19299,100 @@ index 0000000000..182be608a3 + "Eliminate barriers for single active cpu") + +#endif // CPU_LOONGARCH_VM_GLOBALS_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp -new file mode 100644 -index 0000000000..8c78225346 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,42 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "runtime/icache.hpp" ++ ++void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) ++{ ++#define __ _masm-> ++ StubCodeMark mark(this, "ICache", "flush_icache_stub"); ++ address start = __ pc(); ++ ++ __ ibar(0); ++ __ ori(V0, RA2, 0); ++ __ jr(RA); ++ ++ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++#undef __ ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_ICACHE_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_ICACHE_LOONGARCH_HPP ++ ++// Interface for updating the instruction cache. Whenever the VM modifies ++// code, part of the processor instruction cache potentially has to be flushed. ++ ++class ICache : public AbstractICache { ++ public: ++ enum { ++ stub_size = 3 * BytesPerInstWord, // Size of the icache flush stub in bytes ++ line_size = 32, // flush instruction affects a dword ++ log2_line_size = 5 // log2(line_size) ++ }; ++}; ++ ++#endif // CPU_LOONGARCH_VM_ICACHE_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/icBuffer_loongarch.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,101 @@ +/* + * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. @@ -19560,106 +19495,9 @@ index 0000000000..8c78225346 + void* o= (void*)move->data(); + return o; +} -diff --git a/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp -new file mode 100644 -index 0000000000..d577e41f59 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/icache_loongarch.cpp -@@ -0,0 +1,42 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "runtime/icache.hpp" -+ -+void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) -+{ -+#define __ _masm-> -+ StubCodeMark mark(this, "ICache", "flush_icache_stub"); -+ address start = __ pc(); -+ -+ __ ibar(0); -+ __ ori(V0, RA2, 0); -+ __ jr(RA); -+ -+ *flush_icache_stub = (ICache::flush_icache_stub_t)start; -+#undef __ -+} -diff --git a/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp -new file mode 100644 -index 0000000000..15e45cb350 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/icache_loongarch.hpp -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_ICACHE_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_ICACHE_LOONGARCH_HPP -+ -+// Interface for updating the instruction cache. Whenever the VM modifies -+// code, part of the processor instruction cache potentially has to be flushed. -+ -+class ICache : public AbstractICache { -+ public: -+ enum { -+ stub_size = 3 * BytesPerInstWord, // Size of the icache flush stub in bytes -+ line_size = 32, // flush instruction affects a dword -+ log2_line_size = 5 // log2(line_size) -+ }; -+}; -+ -+#endif // CPU_LOONGARCH_VM_ICACHE_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp -new file mode 100644 -index 0000000000..8c84f21511 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,1960 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -21621,11 +21459,9 @@ index 0000000000..8c84f21511 + unimplemented(); + } +} -diff --git a/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp -new file mode 100644 -index 0000000000..9113da54ff ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp +--- a/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interp_masm_loongarch_64.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -21896,11 +21732,9 @@ index 0000000000..9113da54ff +}; + +#endif // CPU_LOONGARCH_VM_INTERP_MASM_LOONGARCH_64_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp -new file mode 100644 -index 0000000000..7f253b2d51 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interpreterGenerator_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,51 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -21953,87 +21787,13 @@ index 0000000000..7f253b2d51 + void generate_counter_overflow(Label* do_continue); + +#endif // CPU_LOONGARCH_VM_INTERPRETERGENERATOR_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp -new file mode 100644 -index 0000000000..052eb997e4 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp -@@ -0,0 +1,66 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_INTERPRETERRT_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_INTERPRETERRT_LOONGARCH_HPP -+ -+#include "memory/allocation.hpp" -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ unsigned int _num_fp_args; -+ unsigned int _num_int_args; -+ int _stack_offset; -+ -+ void move(int from_offset, int to_offset); -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); -+ -+ public: -+ // Creation -+ SignatureHandlerGenerator(methodHandle method, CodeBuffer* buffer) : NativeSignatureIterator(method) { -+ _masm = new MacroAssembler(buffer); -+ _num_int_args = (method->is_static() ? 1 : 0); -+ _num_fp_args = 0; -+ _stack_offset = 0; -+ } -+ -+ // Code generation -+ void generate(uint64_t fingerprint); -+ -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; -+ -+#endif // CPU_LOONGARCH_VM_INTERPRETERRT_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp -new file mode 100644 -index 0000000000..0c9df4aa71 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp -@@ -0,0 +1,274 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,277 @@ +/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -22057,16 +21817,351 @@ index 0000000000..0c9df4aa71 + */ + +#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "interpreter/bytecodeHistogram.hpp" +#include "interpreter/interpreter.hpp" ++#include "interpreter/interpreterGenerator.hpp" +#include "interpreter/interpreterRuntime.hpp" -+#include "memory/allocation.inline.hpp" -+#include "memory/universe.inline.hpp" ++#include "interpreter/templateTable.hpp" ++#include "oops/arrayOop.hpp" ++#include "oops/methodData.hpp" +#include "oops/method.hpp" +#include "oops/oop.inline.hpp" -+#include "runtime/handles.inline.hpp" -+#include "runtime/icache.hpp" -+#include "runtime/interfaceSupport.hpp" -+#include "runtime/signature.hpp" ++#include "prims/jvmtiExport.hpp" ++#include "prims/jvmtiThreadState.hpp" ++#include "prims/methodHandles.hpp" ++#include "runtime/arguments.hpp" ++#include "runtime/deoptimization.hpp" ++#include "runtime/frame.inline.hpp" ++#include "runtime/sharedRuntime.hpp" ++#include "runtime/stubRoutines.hpp" ++#include "runtime/synchronizer.hpp" ++#include "runtime/timer.hpp" ++#include "runtime/vframeArray.hpp" ++#include "utilities/debug.hpp" ++ ++#define __ _masm-> ++ ++#define A0 RA0 ++#define A1 RA1 ++#define A2 RA2 ++#define A3 RA3 ++#define A4 RA4 ++#define A5 RA5 ++#define A6 RA6 ++#define A7 RA7 ++#define T0 RT0 ++#define T1 RT1 ++#define T2 RT2 ++#define T3 RT3 ++#define T4 RT4 ++#define T5 RT5 ++#define T6 RT6 ++#define T7 RT7 ++#define T8 RT8 ++ ++address AbstractInterpreterGenerator::generate_slow_signature_handler() { ++ address entry = __ pc(); ++ // Rmethod: method ++ // LVP: pointer to locals ++ // A3: first stack arg ++ __ move(A3, SP); ++ __ addi_d(SP, SP, -18 * wordSize); ++ __ st_d(RA, SP, 0); ++ __ call_VM(noreg, ++ CAST_FROM_FN_PTR(address, ++ InterpreterRuntime::slow_signature_handler), ++ Rmethod, LVP, A3); ++ ++ // V0: result handler ++ ++ // Stack layout: ++ // ... ++ // 18 stack arg0 <--- old sp ++ // 17 floatReg arg7 ++ // ... ++ // 10 floatReg arg0 ++ // 9 float/double identifiers ++ // 8 IntReg arg7 ++ // ... ++ // 2 IntReg arg1 ++ // 1 aligned slot ++ // SP: 0 return address ++ ++ // Do FP first so we can use A3 as temp ++ __ ld_d(A3, Address(SP, 9 * wordSize)); // float/double identifiers ++ ++ for (int i= 0; i < Argument::n_float_register_parameters; i++) { ++ FloatRegister floatreg = as_FloatRegister(i + FA0->encoding()); ++ Label isdouble, done; ++ ++ __ andi(AT, A3, 1 << i); ++ __ bnez(AT, isdouble); ++ __ fld_s(floatreg, SP, (10 + i) * wordSize); ++ __ b(done); ++ __ bind(isdouble); ++ __ fld_d(floatreg, SP, (10 + i) * wordSize); ++ __ bind(done); ++ } ++ ++ // A0 is for env. ++ // If the mothed is not static, A1 will be corrected in generate_native_entry. ++ for (int i= 1; i < Argument::n_register_parameters; i++) { ++ Register reg = as_Register(i + A0->encoding()); ++ ++ __ ld_d(reg, SP, (1 + i) * wordSize); ++ } ++ ++ // A0/V0 contains the result from the call of ++ // InterpreterRuntime::slow_signature_handler so we don't touch it ++ // here. It will be loaded with the JNIEnv* later. ++ __ ld_d(RA, SP, 0); ++ __ addi_d(SP, SP, 18 * wordSize); ++ __ jr(RA); ++ return entry; ++} ++ ++ ++// ++// Various method entries ++// ++ ++address InterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) { ++ ++ // Rmethod: methodOop ++ // V0: scratrch ++ // Rsender: send 's sp ++ ++ if (!InlineIntrinsics) return NULL; // Generate a vanilla entry ++ ++ address entry_point = __ pc(); ++ //guarantee(0, "LA not implemented yet"); ++ // These don't need a safepoint check because they aren't virtually ++ // callable. We won't enter these intrinsics from compiled code. ++ // If in the future we added an intrinsic which was virtually callable ++ // we'd have to worry about how to safepoint so that this code is used. ++ ++ // mathematical functions inlined by compiler ++ // (interpreter must provide identical implementation ++ // in order to avoid monotonicity bugs when switching ++ // from interpreter to compiler in the middle of some ++ // computation) ++ // ++ // stack: [ lo(arg) ] <-- sp ++ // [ hi(arg) ] ++ { ++ // Note: For JDK 1.3 StrictMath exists and Math.sin/cos/sqrt are ++ // java methods. Interpreter::method_kind(...) will select ++ // this entry point for the corresponding methods in JDK 1.3. ++ __ fld_d(FA0, SP, 0 * wordSize); ++ __ fld_d(FA1, SP, 1 * wordSize); ++ __ push2(RA, FP); ++ __ addi_d(FP, SP, 2 * wordSize); ++ ++ // [ fp ] <-- sp ++ // [ ra ] ++ // [ lo ] <-- fp ++ // [ hi ] ++ //FIXME, need consider this ++ switch (kind) { ++ case Interpreter::java_lang_math_sin : ++ __ trigfunc('s'); ++ break; ++ case Interpreter::java_lang_math_cos : ++ __ trigfunc('c'); ++ break; ++ case Interpreter::java_lang_math_tan : ++ __ trigfunc('t'); ++ break; ++ case Interpreter::java_lang_math_sqrt: ++ __ fsqrt_d(F0, FA0); ++ break; ++ case Interpreter::java_lang_math_abs: ++ __ fabs_d(F0, FA0); ++ break; ++ case Interpreter::java_lang_math_log: ++ // Store to stack to convert 80bit precision back to 64bits ++ break; ++ case Interpreter::java_lang_math_log10: ++ // Store to stack to convert 80bit precision back to 64bits ++ break; ++ case Interpreter::java_lang_math_pow: ++ break; ++ case Interpreter::java_lang_math_exp: ++ break; ++ ++ default : ++ ShouldNotReachHere(); ++ } ++ ++ // must maintain return value in F0:F1 ++ __ ld_d(RA, FP, (-1) * wordSize); ++ //FIXME ++ __ ld_d(FP, FP, (-2) * wordSize); ++ __ move(SP, Rsender); ++ __ jr(RA); ++ } ++ return entry_point; ++} ++ ++ ++// Abstract method entry ++// Attempt to execute abstract method. Throw exception ++address InterpreterGenerator::generate_abstract_entry(void) { ++ ++ // Rmethod: methodOop ++ // V0: receiver (unused) ++ // Rsender : sender 's sp ++ address entry_point = __ pc(); ++ ++ // abstract method entry ++ // throw exception ++ // adjust stack to what a normal return would do ++ __ empty_expression_stack(); ++ __ restore_bcp(); ++ __ restore_locals(); ++ __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError)); ++ // the call_VM checks for exception, so we should never return here. ++ __ should_not_reach_here(); ++ ++ return entry_point; ++} ++ ++ ++// Empty method, generate a very fast return. ++ ++address InterpreterGenerator::generate_empty_entry(void) { ++ ++ // Rmethod: methodOop ++ // V0: receiver (unused) ++ // Rsender: sender 's sp, must set sp to this value on return, on LoongArch, now use T0, as it right? ++ if (!UseFastEmptyMethods) return NULL; ++ ++ address entry_point = __ pc(); ++ //TODO: LA ++ //guarantee(0, "LA not implemented yet"); ++ Label slow_path; ++ __ li(RT0, SafepointSynchronize::address_of_state()); ++ __ ld_w(AT, RT0, 0); ++ __ li(RT0, (SafepointSynchronize::_not_synchronized)); ++ __ bne(AT, RT0,slow_path); ++ __ move(SP, Rsender); ++ __ jr(RA); ++ __ bind(slow_path); ++ (void) generate_normal_entry(false); ++ return entry_point; ++ ++} ++ ++void Deoptimization::unwind_callee_save_values(frame* f, vframeArray* vframe_array) { ++ ++ // This code is sort of the equivalent of C2IAdapter::setup_stack_frame back in ++ // the days we had adapter frames. When we deoptimize a situation where a ++ // compiled caller calls a compiled caller will have registers it expects ++ // to survive the call to the callee. If we deoptimize the callee the only ++ // way we can restore these registers is to have the oldest interpreter ++ // frame that we create restore these values. That is what this routine ++ // will accomplish. ++ ++ // At the moment we have modified c2 to not have any callee save registers ++ // so this problem does not exist and this routine is just a place holder. ++ ++ assert(f->is_interpreted_frame(), "must be interpreted"); ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,50 @@ ++/* ++ * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_INTERPRETER_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_INTERPRETER_LOONGARCH_HPP ++ ++ public: ++ ++ // Sentinel placed in the code for interpreter returns so ++ // that i2c adapters and osr code can recognize an interpreter ++ // return address and convert the return to a specialized ++ // block of code to handle compiedl return values and cleaning ++ // the fpu stack. ++ static const int return_sentinel; ++ ++ static Address::ScaleFactor stackElementScale() { ++ return Address::times_8; ++ } ++ ++ // Offset from sp (which points to the last stack element) ++ static int expr_offset_in_bytes(int i) { return stackElementSize * i; } ++ // Size of interpreter code. Increase if too small. Interpreter will ++ // fail with a guarantee ("not enough space for interpreter generation"); ++ // if too small. ++ // Run with +PrintInterpreterSize to get the VM to print out the size. ++ // Max size with JVMTI and TaggedStackInterpreter ++ const static int InterpreterCodeSize = 168 * 1024; ++#endif // CPU_LOONGARCH_VM_INTERPRETER_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch_64.cpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,274 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "interpreter/interpreter.hpp" ++#include "interpreter/interpreterRuntime.hpp" ++#include "memory/allocation.inline.hpp" ++#include "memory/universe.inline.hpp" ++#include "oops/method.hpp" ++#include "oops/oop.inline.hpp" ++#include "runtime/handles.inline.hpp" ++#include "runtime/icache.hpp" ++#include "runtime/interfaceSupport.hpp" ++#include "runtime/signature.hpp" + +#define __ _masm-> + @@ -22305,71 +22400,13 @@ index 0000000000..0c9df4aa71 + // return result handler + return Interpreter::result_handler(m->result_type()); +IRT_END -diff --git a/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp -new file mode 100644 -index 0000000000..c83afbdaf0 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch.hpp -@@ -0,0 +1,50 @@ -+/* -+ * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_INTERPRETER_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_INTERPRETER_LOONGARCH_HPP -+ -+ public: -+ -+ // Sentinel placed in the code for interpreter returns so -+ // that i2c adapters and osr code can recognize an interpreter -+ // return address and convert the return to a specialized -+ // block of code to handle compiedl return values and cleaning -+ // the fpu stack. -+ static const int return_sentinel; -+ -+ static Address::ScaleFactor stackElementScale() { -+ return Address::times_8; -+ } -+ -+ // Offset from sp (which points to the last stack element) -+ static int expr_offset_in_bytes(int i) { return stackElementSize * i; } -+ // Size of interpreter code. Increase if too small. Interpreter will -+ // fail with a guarantee ("not enough space for interpreter generation"); -+ // if too small. -+ // Run with +PrintInterpreterSize to get the VM to print out the size. -+ // Max size with JVMTI and TaggedStackInterpreter -+ const static int InterpreterCodeSize = 168 * 1024; -+#endif // CPU_LOONGARCH_VM_INTERPRETER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp -new file mode 100644 -index 0000000000..5a4f102cfd ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/interpreter_loongarch_64.cpp -@@ -0,0 +1,277 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/interpreterRT_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,66 @@ +/* -+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -22392,263 +22429,50 @@ index 0000000000..5a4f102cfd + * + */ + -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "interpreter/bytecodeHistogram.hpp" -+#include "interpreter/interpreter.hpp" -+#include "interpreter/interpreterGenerator.hpp" -+#include "interpreter/interpreterRuntime.hpp" -+#include "interpreter/templateTable.hpp" -+#include "oops/arrayOop.hpp" -+#include "oops/methodData.hpp" -+#include "oops/method.hpp" -+#include "oops/oop.inline.hpp" -+#include "prims/jvmtiExport.hpp" -+#include "prims/jvmtiThreadState.hpp" -+#include "prims/methodHandles.hpp" -+#include "runtime/arguments.hpp" -+#include "runtime/deoptimization.hpp" -+#include "runtime/frame.inline.hpp" -+#include "runtime/sharedRuntime.hpp" -+#include "runtime/stubRoutines.hpp" -+#include "runtime/synchronizer.hpp" -+#include "runtime/timer.hpp" -+#include "runtime/vframeArray.hpp" -+#include "utilities/debug.hpp" -+ -+#define __ _masm-> -+ -+#define A0 RA0 -+#define A1 RA1 -+#define A2 RA2 -+#define A3 RA3 -+#define A4 RA4 -+#define A5 RA5 -+#define A6 RA6 -+#define A7 RA7 -+#define T0 RT0 -+#define T1 RT1 -+#define T2 RT2 -+#define T3 RT3 -+#define T4 RT4 -+#define T5 RT5 -+#define T6 RT6 -+#define T7 RT7 -+#define T8 RT8 -+ -+address AbstractInterpreterGenerator::generate_slow_signature_handler() { -+ address entry = __ pc(); -+ // Rmethod: method -+ // LVP: pointer to locals -+ // A3: first stack arg -+ __ move(A3, SP); -+ __ addi_d(SP, SP, -18 * wordSize); -+ __ st_d(RA, SP, 0); -+ __ call_VM(noreg, -+ CAST_FROM_FN_PTR(address, -+ InterpreterRuntime::slow_signature_handler), -+ Rmethod, LVP, A3); -+ -+ // V0: result handler -+ -+ // Stack layout: -+ // ... -+ // 18 stack arg0 <--- old sp -+ // 17 floatReg arg7 -+ // ... -+ // 10 floatReg arg0 -+ // 9 float/double identifiers -+ // 8 IntReg arg7 -+ // ... -+ // 2 IntReg arg1 -+ // 1 aligned slot -+ // SP: 0 return address -+ -+ // Do FP first so we can use A3 as temp -+ __ ld_d(A3, Address(SP, 9 * wordSize)); // float/double identifiers -+ -+ for (int i= 0; i < Argument::n_float_register_parameters; i++) { -+ FloatRegister floatreg = as_FloatRegister(i + FA0->encoding()); -+ Label isdouble, done; -+ -+ __ andi(AT, A3, 1 << i); -+ __ bnez(AT, isdouble); -+ __ fld_s(floatreg, SP, (10 + i) * wordSize); -+ __ b(done); -+ __ bind(isdouble); -+ __ fld_d(floatreg, SP, (10 + i) * wordSize); -+ __ bind(done); -+ } -+ -+ // A0 is for env. -+ // If the mothed is not static, A1 will be corrected in generate_native_entry. -+ for (int i= 1; i < Argument::n_register_parameters; i++) { -+ Register reg = as_Register(i + A0->encoding()); -+ -+ __ ld_d(reg, SP, (1 + i) * wordSize); -+ } -+ -+ // A0/V0 contains the result from the call of -+ // InterpreterRuntime::slow_signature_handler so we don't touch it -+ // here. It will be loaded with the JNIEnv* later. -+ __ ld_d(RA, SP, 0); -+ __ addi_d(SP, SP, 18 * wordSize); -+ __ jr(RA); -+ return entry; -+} -+ -+ -+// -+// Various method entries -+// -+ -+address InterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) { -+ -+ // Rmethod: methodOop -+ // V0: scratrch -+ // Rsender: send 's sp -+ -+ if (!InlineIntrinsics) return NULL; // Generate a vanilla entry ++#ifndef CPU_LOONGARCH_VM_INTERPRETERRT_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_INTERPRETERRT_LOONGARCH_HPP + -+ address entry_point = __ pc(); -+ //guarantee(0, "LA not implemented yet"); -+ // These don't need a safepoint check because they aren't virtually -+ // callable. We won't enter these intrinsics from compiled code. -+ // If in the future we added an intrinsic which was virtually callable -+ // we'd have to worry about how to safepoint so that this code is used. ++#include "memory/allocation.hpp" + -+ // mathematical functions inlined by compiler -+ // (interpreter must provide identical implementation -+ // in order to avoid monotonicity bugs when switching -+ // from interpreter to compiler in the middle of some -+ // computation) -+ // -+ // stack: [ lo(arg) ] <-- sp -+ // [ hi(arg) ] -+ { -+ // Note: For JDK 1.3 StrictMath exists and Math.sin/cos/sqrt are -+ // java methods. Interpreter::method_kind(...) will select -+ // this entry point for the corresponding methods in JDK 1.3. -+ __ fld_d(FA0, SP, 0 * wordSize); -+ __ fld_d(FA1, SP, 1 * wordSize); -+ __ push2(RA, FP); -+ __ addi_d(FP, SP, 2 * wordSize); ++// native method calls + -+ // [ fp ] <-- sp -+ // [ ra ] -+ // [ lo ] <-- fp -+ // [ hi ] -+ //FIXME, need consider this -+ switch (kind) { -+ case Interpreter::java_lang_math_sin : -+ __ trigfunc('s'); -+ break; -+ case Interpreter::java_lang_math_cos : -+ __ trigfunc('c'); -+ break; -+ case Interpreter::java_lang_math_tan : -+ __ trigfunc('t'); -+ break; -+ case Interpreter::java_lang_math_sqrt: -+ __ fsqrt_d(F0, FA0); -+ break; -+ case Interpreter::java_lang_math_abs: -+ __ fabs_d(F0, FA0); -+ break; -+ case Interpreter::java_lang_math_log: -+ // Store to stack to convert 80bit precision back to 64bits -+ break; -+ case Interpreter::java_lang_math_log10: -+ // Store to stack to convert 80bit precision back to 64bits -+ break; -+ case Interpreter::java_lang_math_pow: -+ break; -+ case Interpreter::java_lang_math_exp: -+ break; ++class SignatureHandlerGenerator: public NativeSignatureIterator { ++ private: ++ MacroAssembler* _masm; ++ unsigned int _num_fp_args; ++ unsigned int _num_int_args; ++ int _stack_offset; + -+ default : -+ ShouldNotReachHere(); -+ } ++ void move(int from_offset, int to_offset); ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + -+ // must maintain return value in F0:F1 -+ __ ld_d(RA, FP, (-1) * wordSize); -+ //FIXME -+ __ ld_d(FP, FP, (-2) * wordSize); -+ __ move(SP, Rsender); -+ __ jr(RA); ++ public: ++ // Creation ++ SignatureHandlerGenerator(methodHandle method, CodeBuffer* buffer) : NativeSignatureIterator(method) { ++ _masm = new MacroAssembler(buffer); ++ _num_int_args = (method->is_static() ? 1 : 0); ++ _num_fp_args = 0; ++ _stack_offset = 0; + } -+ return entry_point; -+} -+ -+ -+// Abstract method entry -+// Attempt to execute abstract method. Throw exception -+address InterpreterGenerator::generate_abstract_entry(void) { -+ -+ // Rmethod: methodOop -+ // V0: receiver (unused) -+ // Rsender : sender 's sp -+ address entry_point = __ pc(); + -+ // abstract method entry -+ // throw exception -+ // adjust stack to what a normal return would do -+ __ empty_expression_stack(); -+ __ restore_bcp(); -+ __ restore_locals(); -+ __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError)); -+ // the call_VM checks for exception, so we should never return here. -+ __ should_not_reach_here(); -+ -+ return entry_point; -+} -+ -+ -+// Empty method, generate a very fast return. -+ -+address InterpreterGenerator::generate_empty_entry(void) { -+ -+ // Rmethod: methodOop -+ // V0: receiver (unused) -+ // Rsender: sender 's sp, must set sp to this value on return, on LoongArch, now use T0, as it right? -+ if (!UseFastEmptyMethods) return NULL; -+ -+ address entry_point = __ pc(); -+ //TODO: LA -+ //guarantee(0, "LA not implemented yet"); -+ Label slow_path; -+ __ li(RT0, SafepointSynchronize::address_of_state()); -+ __ ld_w(AT, RT0, 0); -+ __ li(RT0, (SafepointSynchronize::_not_synchronized)); -+ __ bne(AT, RT0,slow_path); -+ __ move(SP, Rsender); -+ __ jr(RA); -+ __ bind(slow_path); -+ (void) generate_normal_entry(false); -+ return entry_point; -+ -+} -+ -+void Deoptimization::unwind_callee_save_values(frame* f, vframeArray* vframe_array) { -+ -+ // This code is sort of the equivalent of C2IAdapter::setup_stack_frame back in -+ // the days we had adapter frames. When we deoptimize a situation where a -+ // compiled caller calls a compiled caller will have registers it expects -+ // to survive the call to the callee. If we deoptimize the callee the only -+ // way we can restore these registers is to have the oldest interpreter -+ // frame that we create restore these values. That is what this routine -+ // will accomplish. ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // At the moment we have modified c2 to not have any callee save registers -+ // so this problem does not exist and this routine is just a place holder. ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); ++}; + -+ assert(f->is_interpreted_frame(), "must be interpreted"); -+} -diff --git a/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp -new file mode 100644 -index 0000000000..de97de5804 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp ++#endif // CPU_LOONGARCH_VM_INTERPRETERRT_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/javaFrameAnchor_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -22737,11 +22561,9 @@ index 0000000000..de97de5804 + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_LOONGARCH_VM_JAVAFRAMEANCHOR_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp -new file mode 100644 -index 0000000000..5b52e54e08 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/jniFastGetField_loongarch_64.cpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. @@ -22912,11 +22734,64 @@ index 0000000000..5b52e54e08 +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff --git a/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp -new file mode 100644 -index 0000000000..554ff216ac ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/jni_loongarch.h b/hotspot/src/cpu/loongarch/vm/jni_loongarch.h +--- a/hotspot/src/cpu/loongarch/vm/jni_loongarch.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/jni_loongarch.h 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,51 @@ ++/* ++ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. Oracle designates this ++ * particular file as subject to the "Classpath" exception as provided ++ * by Oracle in the LICENSE file that accompanied this code. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ */ ++ ++#ifndef _JAVASOFT_JNI_MD_H_ ++#define _JAVASOFT_JNI_MD_H_ ++ ++// Note: please do not change these without also changing jni_md.h in the JDK ++// repository ++#ifndef __has_attribute ++ #define __has_attribute(x) 0 ++#endif ++#if (defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4) && (__GNUC_MINOR__ > 2))) || __has_attribute(visibility) ++ #define JNIEXPORT __attribute__((visibility("default"))) ++ #define JNIIMPORT __attribute__((visibility("default"))) ++#else ++ #define JNIEXPORT ++ #define JNIIMPORT ++#endif ++ ++#define JNICALL ++ ++typedef int jint; ++ ++ typedef long jlong; ++ ++typedef signed char jbyte; ++ ++#endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/jniTypes_loongarch.hpp 2023-12-20 09:23:19.788147991 +0800 @@ -0,0 +1,144 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -23062,99 +22937,10 @@ index 0000000000..554ff216ac +}; + +#endif // CPU_LOONGARCH_VM_JNITYPES_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/jni_loongarch.h b/hotspot/src/cpu/loongarch/vm/jni_loongarch.h -new file mode 100644 -index 0000000000..eb25cbc354 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/jni_loongarch.h -@@ -0,0 +1,51 @@ -+/* -+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. Oracle designates this -+ * particular file as subject to the "Classpath" exception as provided -+ * by Oracle in the LICENSE file that accompanied this code. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+#ifndef _JAVASOFT_JNI_MD_H_ -+#define _JAVASOFT_JNI_MD_H_ -+ -+// Note: please do not change these without also changing jni_md.h in the JDK -+// repository -+#ifndef __has_attribute -+ #define __has_attribute(x) 0 -+#endif -+#if (defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4) && (__GNUC_MINOR__ > 2))) || __has_attribute(visibility) -+ #define JNIEXPORT __attribute__((visibility("default"))) -+ #define JNIIMPORT __attribute__((visibility("default"))) -+#else -+ #define JNIEXPORT -+ #define JNIIMPORT -+#endif -+ -+#define JNICALL -+ -+typedef int jint; -+ -+ typedef long jlong; -+ -+typedef signed char jbyte; -+ -+#endif -diff --git a/hotspot/src/cpu/loongarch/vm/loongarch.ad b/hotspot/src/cpu/loongarch/vm/loongarch.ad -new file mode 100644 -index 0000000000..48c44779e7 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/loongarch.ad -@@ -0,0 +1,24 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -diff --git a/hotspot/src/cpu/loongarch/vm/loongarch_64.ad b/hotspot/src/cpu/loongarch/vm/loongarch_64.ad -new file mode 100644 -index 0000000000..c3514373a6 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/loongarch_64.ad -@@ -0,0 +1,12851 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/loongarch_64.ad b/hotspot/src/cpu/loongarch/vm/loongarch_64.ad +--- a/hotspot/src/cpu/loongarch/vm/loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/loongarch_64.ad 2024-01-30 13:54:24.792708955 +0800 +@@ -0,0 +1,12861 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -31370,9 +31156,8 @@ index 0000000000..c3514373a6 + + // Now the shorter length is in cnt1 and cnt2 can be used as a tmp register + __ bind(Loop); // Loop begin -+ __ ld_hu(AT, str1, 0); + __ beq(cnt1, R0, done); -+ ++ __ ld_hu(AT, str1, 0); + // compare current character + __ ld_hu(cnt2, str2, 0); + __ addi_d(str1, str1, 2); @@ -33788,14 +33573,25 @@ index 0000000000..c3514373a6 +%} + +// Store CMS card-mark Immediate 0 ++instruct storeImmCM_order(memory mem, immI_0 zero) %{ ++ match(Set mem (StoreCM mem zero)); ++ predicate(UseConcMarkSweepGC && !UseCondCardMark); ++ ins_cost(100); ++ format %{ "StoreCM MEMBAR storestore\n\t" ++ "st_b $mem, zero\t! card-mark imm0" %} ++ ins_encode %{ ++ __ membar(__ StoreStore); ++ __ loadstore_enc(R0, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp, MacroAssembler::STORE_BYTE); ++ %} ++ ins_pipe( ialu_storeI ); ++%} ++ +instruct storeImmCM(memory mem, immI_0 zero) %{ + match(Set mem (StoreCM mem zero)); + + ins_cost(150); -+ format %{ "StoreCM MEMBAR loadstore\n\t" -+ "st_b $mem, zero\t! CMS card-mark imm0" %} ++ format %{ "st_b $mem, zero\t! card-mark imm0" %} + ins_encode %{ -+ __ membar(__ StoreStore); + __ loadstore_enc(R0, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp, MacroAssembler::STORE_BYTE); + %} + ins_pipe( ialu_storeI ); @@ -36006,11 +35802,37 @@ index 0000000000..c3514373a6 +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff --git a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp -new file mode 100644 -index 0000000000..3823c4e204 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/loongarch.ad b/hotspot/src/cpu/loongarch/vm/loongarch.ad +--- a/hotspot/src/cpu/loongarch/vm/loongarch.ad 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/loongarch.ad 2023-12-20 09:23:19.788147991 +0800 +@@ -0,0 +1,24 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,3895 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -37986,7 +37808,7 @@ index 0000000000..3823c4e204 + + bind(fail); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, resflag); + move(resflag, R0); @@ -38009,7 +37831,7 @@ index 0000000000..3823c4e204 + + bind(neq); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, tmp); + if (fail) @@ -38034,7 +37856,7 @@ index 0000000000..3823c4e204 + + bind(fail); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, resflag); + move(resflag, R0); @@ -38059,7 +37881,7 @@ index 0000000000..3823c4e204 + + bind(neq); + if (barrier) -+ membar(LoadLoad); ++ dbar(0x700); + if (retold && oldval != R0) + move(oldval, tmp); + if (fail) @@ -38436,7 +38258,7 @@ index 0000000000..3823c4e204 + move(AT, R0); + bnez(scrReg, DONE_SET); + -+ membar(Assembler::Membar_mask_bits(LoadLoad|LoadStore)); ++ membar(Assembler::Membar_mask_bits(LoadStore|StoreStore)); // release-store + st_d(R0, Address(tmpReg, ObjectMonitor::owner_offset_in_bytes() - 2)); + li(resReg, 1); + b(DONE); @@ -39907,11 +39729,9 @@ index 0000000000..3823c4e204 + + bind(L_exit); +} -diff --git a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp -new file mode 100644 -index 0000000000..8b123c2906 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,771 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -40684,11 +40504,9 @@ index 0000000000..8b123c2906 +}; + +#endif // CPU_LOONGARCH_VM_MACROASSEMBLER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp -new file mode 100644 -index 0000000000..0b265a4def ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp +--- a/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/macroAssembler_loongarch.inline.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,34 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -40724,11 +40542,9 @@ index 0000000000..0b265a4def +#include "code/codeCache.hpp" + +#endif // CPU_LOONGARCH_VM_MACROASSEMBLER_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp -new file mode 100644 -index 0000000000..b36216c533 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/metaspaceShared_loongarch_64.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2004, 2012, Oracle and/or its affiliates. All rights reserved. @@ -40850,11 +40666,9 @@ index 0000000000..b36216c533 + + *mc_top = (char*)__ pc(); +} -diff --git a/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp -new file mode 100644 -index 0000000000..cb31ca5ad5 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,566 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -41422,11 +41236,9 @@ index 0000000000..cb31ca5ad5 +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff --git a/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp -new file mode 100644 -index 0000000000..f84337424b ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/methodHandles_loongarch.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -41490,11 +41302,9 @@ index 0000000000..f84337424b + // Should be in sharedRuntime, not here. + return R3; + } -diff --git a/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp -new file mode 100644 -index 0000000000..639ac6cd3e ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,485 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -41981,11 +41791,9 @@ index 0000000000..639ac6cd3e + return Assembler::high(insn_word(), 10) == Assembler::ld_w_op && + Assembler::low(insn_word(), 5) == AT->encoding(); +} -diff --git a/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp -new file mode 100644 -index 0000000000..493239923b ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/nativeInst_loongarch.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,513 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. @@ -42500,62 +42308,9 @@ index 0000000000..493239923b + return (NativeCallTrampolineStub*)addr; +} +#endif // CPU_LOONGARCH_VM_NATIVEINST_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp -new file mode 100644 -index 0000000000..5ff7555d2f ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp -@@ -0,0 +1,45 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_REGISTERMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_REGISTERMAP_LOONGARCH_HPP -+ -+// machine-dependent implemention for register maps -+ friend class frame; -+ -+ private: -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return NULL. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return NULL;} -+ -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} -+ -+#endif // CPU_LOONGARCH_VM_REGISTERMAP_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp -new file mode 100644 -index 0000000000..c6424c321f ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/register_definitions_loongarch.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. @@ -42660,11 +42415,9 @@ index 0000000000..c6424c321f +REGISTER_DEFINITION(FloatRegister, f29); +REGISTER_DEFINITION(FloatRegister, f30); +REGISTER_DEFINITION(FloatRegister, f31); -diff --git a/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp -new file mode 100644 -index 0000000000..3104cd1cc5 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/register_loongarch.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -42725,11 +42478,9 @@ index 0000000000..3104cd1cc5 + }; + return is_valid() ? names[encoding()] : "fccnoreg"; +} -diff --git a/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp -new file mode 100644 -index 0000000000..37b39f9129 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/register_loongarch.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,436 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -43167,11 +42918,58 @@ index 0000000000..37b39f9129 +}; + +#endif //CPU_LOONGARCH_VM_REGISTER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp -new file mode 100644 -index 0000000000..bf4498dc62 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/registerMap_loongarch.hpp 2023-12-20 09:23:19.791481286 +0800 +@@ -0,0 +1,45 @@ ++/* ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_REGISTERMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_REGISTERMAP_LOONGARCH_HPP ++ ++// machine-dependent implemention for register maps ++ friend class frame; ++ ++ private: ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return NULL. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return NULL;} ++ ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} ++ ++#endif // CPU_LOONGARCH_VM_REGISTERMAP_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,130 @@ +/* + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. @@ -43303,11 +43101,9 @@ index 0000000000..bf4498dc62 + +void metadata_Relocation::pd_fix_value(address x) { +} -diff --git a/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp -new file mode 100644 -index 0000000000..211242f3fb ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/relocInfo_loongarch.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,40 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -43349,11 +43145,9 @@ index 0000000000..211242f3fb + }; + +#endif // CPU_LOONGARCH_VM_RELOCINFO_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp -new file mode 100644 -index 0000000000..e6ee65f367 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/runtime_loongarch_64.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -43554,11 +43348,9 @@ index 0000000000..e6ee65f367 + masm->flush(); + _exception_blob = ExceptionBlob::create(&buffer, oop_maps, framesize); +} -diff --git a/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp -new file mode 100644 -index 0000000000..9efcd2ce52 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/sharedRuntime_loongarch_64.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,3453 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -43880,9 +43672,9 @@ index 0000000000..9efcd2ce52 +} + +// Is vector's size (in bytes) bigger than a size saved by default? -+// 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. ++// 8 bytes registers are saved by default using fld/fst instructions. +bool SharedRuntime::is_wide_vector(int size) { -+ return size > 16; ++ return size > 8; +} + +// The java_calling_convention describes stack locations as ideal slots on @@ -47013,11 +46805,9 @@ index 0000000000..9efcd2ce52 +} + +extern "C" int SpinPause() {return 0;} -diff --git a/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp -new file mode 100644 -index 0000000000..b54857d4e7 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/stubGenerator_loongarch_64.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,3445 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -47824,7 +47614,7 @@ index 0000000000..b54857d4e7 + const Register end = count; + + if (UseConcMarkSweepGC) { -+ __ membar(__ StoreLoad); ++ __ membar(__ StoreStore); + } + + int64_t disp = (int64_t) ct->byte_map_base; @@ -50464,11 +50254,9 @@ index 0000000000..b54857d4e7 +void StubGenerator_generate(CodeBuffer* code, bool all) { + StubGenerator g(code, all); +} -diff --git a/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp -new file mode 100644 -index 0000000000..f0f3d55a4e ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.cpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,264 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -50734,11 +50522,9 @@ index 0000000000..f0f3d55a4e + 0x02D578EDUL, 0x7DAEED62UL, // word swap + 0xD502ED78UL, 0xAE7D62EDUL, // byte swap of word swap +}; -diff --git a/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp -new file mode 100644 -index 0000000000..d020a527e4 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp +--- a/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/stubRoutines_loongarch_64.hpp 2023-12-20 09:23:19.791481286 +0800 @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -50800,11 +50586,9 @@ index 0000000000..d020a527e4 +}; + +#endif // CPU_LOONGARCH_VM_STUBROUTINES_LOONGARCH_64_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp -new file mode 100644 -index 0000000000..213e69b0b2 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/templateInterpreterGenerator_loongarch.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,35 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -50831,68 +50615,19 @@ index 0000000000..213e69b0b2 + * + */ + -+#ifndef CPU_LOONGARCH_VM_TEMPLATEINTERPRETERGENERATOR_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_TEMPLATEINTERPRETERGENERATOR_LOONGARCH_HPP -+ -+ protected: -+ -+ void generate_fixed_frame(bool native_call); -+ -+ // address generate_asm_interpreter_entry(bool synchronized); -+ -+#endif // CPU_LOONGARCH_VM_TEMPLATEINTERPRETERGENERATOR_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp -new file mode 100644 -index 0000000000..39e3ad7bb5 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_TEMPLATEINTERPRETER_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_TEMPLATEINTERPRETER_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_VM_TEMPLATEINTERPRETERGENERATOR_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_TEMPLATEINTERPRETERGENERATOR_LOONGARCH_HPP + ++ protected: + -+ protected: ++ void generate_fixed_frame(bool native_call); + -+ // Size of interpreter code. Increase if too small. Interpreter will -+ // fail with a guarantee ("not enough space for interpreter generation"); -+ // if too small. -+ // Run with +PrintInterpreter to get the VM to print out the size. -+ // Max size with JVMTI -+ // The sethi() instruction generates lots more instructions when shell -+ // stack limit is unlimited, so that's why this is much bigger. -+ const static int InterpreterCodeSize = 500 * K; ++ // address generate_asm_interpreter_entry(bool synchronized); + -+#endif // CPU_LOONGARCH_VM_TEMPLATEINTERPRETER_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp -new file mode 100644 -index 0000000000..b25086a399 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp ++#endif // CPU_LOONGARCH_VM_TEMPLATEINTERPRETERGENERATOR_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch_64.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,2335 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -53229,12 +52964,55 @@ index 0000000000..b25086a399 +} +#endif // !PRODUCT +#endif // ! CC_INTERP -diff --git a/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp -new file mode 100644 -index 0000000000..5f6b706258 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp -@@ -0,0 +1,4056 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/templateInterpreter_loongarch.hpp 2023-12-20 09:23:19.794814582 +0800 +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_TEMPLATEINTERPRETER_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_TEMPLATEINTERPRETER_LOONGARCH_HPP ++ ++ ++ protected: ++ ++ // Size of interpreter code. Increase if too small. Interpreter will ++ // fail with a guarantee ("not enough space for interpreter generation"); ++ // if too small. ++ // Run with +PrintInterpreter to get the VM to print out the size. ++ // Max size with JVMTI ++ // The sethi() instruction generates lots more instructions when shell ++ // stack limit is unlimited, so that's why this is much bigger. ++ const static int InterpreterCodeSize = 500 * K; ++ ++#endif // CPU_LOONGARCH_VM_TEMPLATEINTERPRETER_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.cpp 2023-12-20 09:23:19.794814582 +0800 +@@ -0,0 +1,4024 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -53603,7 +53381,7 @@ index 0000000000..5f6b706258 + __ add_d(AT, T1, T2); + __ ld_b(T1, AT, tags_offset); + if(os::is_MP()) { -+ __ membar(Assembler::Membar_mask_bits(__ LoadLoad|__ LoadStore)); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + } + //now T1 is the tag + @@ -55402,38 +55180,6 @@ index 0000000000..5f6b706258 + __ jr(T4); +} + -+// ---------------------------------------------------------------------------- -+// Volatile variables demand their effects be made known to all CPU's -+// in order. Store buffers on most chips allow reads & writes to -+// reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode -+// without some kind of memory barrier (i.e., it's not sufficient that -+// the interpreter does not reorder volatile references, the hardware -+// also must not reorder them). -+// -+// According to the new Java Memory Model (JMM): -+// (1) All volatiles are serialized wrt to each other. ALSO reads & -+// writes act as aquire & release, so: -+// (2) A read cannot let unrelated NON-volatile memory refs that -+// happen after the read float up to before the read. It's OK for -+// non-volatile memory refs that happen before the volatile read to -+// float down below it. -+// (3) Similar a volatile write cannot let unrelated NON-volatile -+// memory refs that happen BEFORE the write float down to after the -+// write. It's OK for non-volatile memory refs that happen after the -+// volatile write to float up before it. -+// -+// We only put in barriers around volatile refs (they are expensive), -+// not _between_ memory refs (that would require us to track the -+// flavor of the previous memory refs). Requirements (2) and (3) -+// require some barriers before volatile stores and after volatile -+// loads. These nearly cover requirement (1) but miss the -+// volatile-store-volatile-load case. This final case is placed after -+// volatile-stores although it could just as well go before -+// volatile-loads. -+void TemplateTable::volatile_barrier() { -+ if(os::is_MP()) __ membar(__ StoreLoad); -+} -+ +// we dont shift left 2 bits in get_cache_and_index_at_bcp +// for we always need shift the index we use it. the ConstantPoolCacheEntry +// is 16-byte long, index is the index in @@ -55643,7 +55389,7 @@ index 0000000000..5f6b706258 + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -55786,7 +55532,7 @@ index 0000000000..5f6b706258 + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -55900,7 +55646,7 @@ index 0000000000..5f6b706258 + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreStore | __ LoadStore)); + __ bind(notVolatile); + } + @@ -56071,7 +55817,7 @@ index 0000000000..5f6b706258 + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreLoad | __ StoreStore)); + __ bind(notVolatile); + } +} @@ -56176,7 +55922,7 @@ index 0000000000..5f6b706258 + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreStore | __ LoadStore)); + __ bind(notVolatile); + } + @@ -56222,7 +55968,7 @@ index 0000000000..5f6b706258 + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreLoad | __ StoreStore)); + __ bind(notVolatile); + } +} @@ -56273,7 +56019,7 @@ index 0000000000..5f6b706258 + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -56317,7 +56063,7 @@ index 0000000000..5f6b706258 + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -56347,7 +56093,7 @@ index 0000000000..5f6b706258 + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -56372,7 +56118,7 @@ index 0000000000..5f6b706258 + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -56793,7 +56539,7 @@ index 0000000000..5f6b706258 + __ add_d(T1, T1, A2); + __ ld_b(AT, T1, tags_offset); + if(os::is_MP()) { -+ __ membar(Assembler::Membar_mask_bits(__ LoadLoad|__ LoadStore)); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + } + __ addi_d(AT, AT, -(int)JVM_CONSTANT_Class); + __ bne(AT, R0, slow_case); @@ -56977,7 +56723,7 @@ index 0000000000..5f6b706258 + __ add_d(AT, T1, T2); + __ ld_b(AT, AT, Array::base_offset_in_bytes()); + if(os::is_MP()) { -+ __ membar(Assembler::Membar_mask_bits(__ LoadLoad|__ LoadStore)); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + } + __ addi_d(AT, AT, - (int)JVM_CONSTANT_Class); + __ beq(AT, R0, quicked); @@ -57047,7 +56793,7 @@ index 0000000000..5f6b706258 + __ add_d(AT, T1, T2); + __ ld_b(AT, AT, Array::base_offset_in_bytes()); + if(os::is_MP()) { -+ __ membar(Assembler::Membar_mask_bits(__ LoadLoad|__ LoadStore)); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + } + __ addi_d(AT, AT, -(int)JVM_CONSTANT_Class); + __ beq(AT, R0, quicked); @@ -57291,11 +57037,9 @@ index 0000000000..5f6b706258 + __ membar(__ AnyAny);//no membar here for aarch64 +} +#endif // !CC_INTERP -diff --git a/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp -new file mode 100644 -index 0000000000..c48d76e0a2 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp +--- a/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/templateTable_loongarch_64.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -57341,11 +57085,173 @@ index 0000000000..c48d76e0a2 + static void index_check_without_pop(Register array, Register index); + +#endif // CPU_LOONGARCH_VM_TEMPLATETABLE_LOONGARCH_64_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp -new file mode 100644 -index 0000000000..7c3ce68010 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp 2023-12-20 09:23:19.794814582 +0800 +@@ -0,0 +1,51 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ regName[i++] = reg->name(); ++ regName[i++] = reg->name(); ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ regName[i++] = freg->name(); ++ regName[i++] = freg->name(); ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp 2023-12-20 09:23:19.794814582 +0800 +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_VMREG_LOONGARCH_HPP ++#define CPU_LOONGARCH_VM_VMREG_LOONGARCH_HPP ++ ++bool is_Register(); ++Register as_Register(); ++ ++bool is_FloatRegister(); ++FloatRegister as_FloatRegister(); ++ ++#endif // CPU_LOONGARCH_VM_VMREG_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp +--- a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp 2023-12-20 09:23:19.794814582 +0800 +@@ -0,0 +1,66 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VM_VMREG_LOONGARCH_INLINE_HPP ++#define CPU_LOONGARCH_VM_VMREG_LOONGARCH_INLINE_HPP ++ ++inline VMReg RegisterImpl::as_VMReg() { ++ if( this==noreg ) return VMRegImpl::Bad(); ++ return VMRegImpl::as_VMReg(encoding() << 1 ); ++} ++ ++inline VMReg FloatRegisterImpl::as_VMReg() { ++ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); ++} ++ ++inline bool VMRegImpl::is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline bool VMRegImpl::is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline Register VMRegImpl::as_Register() { ++ ++ assert( is_Register(), "must be"); ++ return ::as_Register(value() >> 1); ++} ++ ++inline FloatRegister VMRegImpl::as_FloatRegister() { ++ assert( is_FloatRegister(), "must be" ); ++ assert( is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); ++} ++ ++inline bool VMRegImpl::is_concrete() { ++ assert(is_reg(), "must be"); ++ if(is_Register()) return true; ++ if(is_FloatRegister()) return true; ++ assert(false, "what register?"); ++ return false; ++} ++ ++#endif // CPU_LOONGARCH_VM_VMREG_LOONGARCH_INLINE_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vmStructs_loongarch.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. @@ -57415,11 +57321,9 @@ index 0000000000..7c3ce68010 + /* be present there) */ + +#endif // CPU_LOONGARCH_VM_VMSTRUCTS_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp -new file mode 100644 -index 0000000000..c71f64e132 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. @@ -57505,11 +57409,9 @@ index 0000000000..c71f64e132 + strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); + return tmp; +} -diff --git a/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp -new file mode 100644 -index 0000000000..682dd9c78f ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vm_version_ext_loongarch.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. @@ -57565,11 +57467,9 @@ index 0000000000..682dd9c78f +}; + +#endif // CPU_LOONGARCH_VM_VM_VERSION_EXT_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp -new file mode 100644 -index 0000000000..81ea3b230c ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp +--- a/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,443 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -58014,11 +57914,9 @@ index 0000000000..81ea3b230c + + get_processor_features(); +} -diff --git a/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp -new file mode 100644 -index 0000000000..3b5f907a79 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp +--- a/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vm_version_loongarch.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,299 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -58319,181 +58217,9 @@ index 0000000000..3b5f907a79 +}; + +#endif // CPU_LOONGARCH_VM_VM_VERSION_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp -new file mode 100644 -index 0000000000..52bccfc183 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.cpp -@@ -0,0 +1,51 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" -+ -+ -+ -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ regName[i++] = reg->name(); -+ regName[i++] = reg->name(); -+ reg = reg->successor(); -+ } -+ -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ regName[i++] = freg->name(); -+ regName[i++] = freg->name(); -+ freg = freg->successor(); -+ } -+ -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -diff --git a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp -new file mode 100644 -index 0000000000..80a1fc57de ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.hpp -@@ -0,0 +1,35 @@ -+/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_VMREG_LOONGARCH_HPP -+#define CPU_LOONGARCH_VM_VMREG_LOONGARCH_HPP -+ -+bool is_Register(); -+Register as_Register(); -+ -+bool is_FloatRegister(); -+FloatRegister as_FloatRegister(); -+ -+#endif // CPU_LOONGARCH_VM_VMREG_LOONGARCH_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp -new file mode 100644 -index 0000000000..f822d4c355 ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vmreg_loongarch.inline.hpp -@@ -0,0 +1,66 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VM_VMREG_LOONGARCH_INLINE_HPP -+#define CPU_LOONGARCH_VM_VMREG_LOONGARCH_INLINE_HPP -+ -+inline VMReg RegisterImpl::as_VMReg() { -+ if( this==noreg ) return VMRegImpl::Bad(); -+ return VMRegImpl::as_VMReg(encoding() << 1 ); -+} -+ -+inline VMReg FloatRegisterImpl::as_VMReg() { -+ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); -+} -+ -+inline bool VMRegImpl::is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; -+} -+ -+inline bool VMRegImpl::is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; -+} -+ -+inline Register VMRegImpl::as_Register() { -+ -+ assert( is_Register(), "must be"); -+ return ::as_Register(value() >> 1); -+} -+ -+inline FloatRegister VMRegImpl::as_FloatRegister() { -+ assert( is_FloatRegister(), "must be" ); -+ assert( is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); -+} -+ -+inline bool VMRegImpl::is_concrete() { -+ assert(is_reg(), "must be"); -+ if(is_Register()) return true; -+ if(is_FloatRegister()) return true; -+ assert(false, "what register?"); -+ return false; -+} -+ -+#endif // CPU_LOONGARCH_VM_VMREG_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp -new file mode 100644 -index 0000000000..df0d176b8b ---- /dev/null -+++ b/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp b/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp +--- a/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/loongarch/vm/vtableStubs_loongarch_64.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,300 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. @@ -58795,11 +58521,9 @@ index 0000000000..df0d176b8b +int VtableStub::pd_code_alignment() { + return wordSize; +} -diff --git a/hotspot/src/cpu/mips/vm/assembler_mips.cpp b/hotspot/src/cpu/mips/vm/assembler_mips.cpp -new file mode 100644 -index 0000000000..6c720972ad ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/assembler_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/assembler_mips.cpp b/hotspot/src/cpu/mips/vm/assembler_mips.cpp +--- a/hotspot/src/cpu/mips/vm/assembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/assembler_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,774 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -59575,11 +59299,9 @@ index 0000000000..6c720972ad + delay_state = no_delay; +#endif +} -diff --git a/hotspot/src/cpu/mips/vm/assembler_mips.hpp b/hotspot/src/cpu/mips/vm/assembler_mips.hpp -new file mode 100644 -index 0000000000..e91b9db222 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/assembler_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/assembler_mips.hpp b/hotspot/src/cpu/mips/vm/assembler_mips.hpp +--- a/hotspot/src/cpu/mips/vm/assembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/assembler_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,1789 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -61370,11 +61092,9 @@ index 0000000000..e91b9db222 + + +#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp b/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp -new file mode 100644 -index 0000000000..39aeb5509a ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp b/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp +--- a/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -61409,11 +61129,9 @@ index 0000000000..39aeb5509a +#include "code/codeCache.hpp" + +#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP -diff --git a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp -new file mode 100644 -index 0000000000..a4a1b28c2d ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp +--- a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2007, 2013, Oracle and/or its affiliates. All rights reserved. @@ -61468,11 +61186,9 @@ index 0000000000..a4a1b28c2d +#ifdef CC_INTERP + +#endif // CC_INTERP (all) -diff --git a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp -new file mode 100644 -index 0000000000..aac8b7a2b7 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp +--- a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -61584,11 +61300,9 @@ index 0000000000..aac8b7a2b7 + ((VMJavaVal64*)(addr))->l) + +#endif // CPU_MIPS_VM_BYTECODEINTERPRETER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp -new file mode 100644 -index 0000000000..8ce77ab92f ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp +--- a/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/bytecodeInterpreter_mips.inline.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,286 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -61876,11 +61590,9 @@ index 0000000000..8ce77ab92f +} + +#endif // CPU_MIPS_VM_BYTECODEINTERPRETER_MIPS_INLINE_HPP -diff --git a/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp b/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp -new file mode 100644 -index 0000000000..61efd1f561 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp b/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp +--- a/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/bytecodes_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,38 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -61920,11 +61632,9 @@ index 0000000000..61efd1f561 + // No mips specific bytecodes + return code; +} -diff --git a/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp b/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp -new file mode 100644 -index 0000000000..25a9562acd ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp b/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp +--- a/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/bytecodes_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,31 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -61957,11 +61667,9 @@ index 0000000000..25a9562acd +// No Loongson specific bytecodes + +#endif // CPU_MIPS_VM_BYTECODES_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/bytes_mips.hpp b/hotspot/src/cpu/mips/vm/bytes_mips.hpp -new file mode 100644 -index 0000000000..515ffad4b0 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/bytes_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/bytes_mips.hpp b/hotspot/src/cpu/mips/vm/bytes_mips.hpp +--- a/hotspot/src/cpu/mips/vm/bytes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/bytes_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,193 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62156,11 +61864,9 @@ index 0000000000..515ffad4b0 + + +#endif // CPU_MIPS_VM_BYTES_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp b/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp -new file mode 100644 -index 0000000000..f254e07abd ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp b/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp +--- a/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/c2_globals_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -62262,11 +61968,9 @@ index 0000000000..f254e07abd +define_pd_global(bool, NeverActAsServerClassMachine, false); + +#endif // CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/c2_init_mips.cpp b/hotspot/src/cpu/mips/vm/c2_init_mips.cpp -new file mode 100644 -index 0000000000..e6d5815f42 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/c2_init_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/c2_init_mips.cpp b/hotspot/src/cpu/mips/vm/c2_init_mips.cpp +--- a/hotspot/src/cpu/mips/vm/c2_init_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/c2_init_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62302,11 +62006,9 @@ index 0000000000..e6d5815f42 +void Compile::pd_compiler2_init() { + guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); +} -diff --git a/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp b/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp -new file mode 100644 -index 0000000000..1836b7a921 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp b/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp +--- a/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/codeBuffer_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62343,11 +62045,9 @@ index 0000000000..1836b7a921 + void flush_bundle(bool start_new_bundle) {} + +#endif // CPU_MIPS_VM_CODEBUFFER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp b/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp -new file mode 100644 -index 0000000000..8ffaaaf841 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp b/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp +--- a/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/compiledIC_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,173 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -62522,15 +62222,13 @@ index 0000000000..8ffaaaf841 +} + +#endif // !PRODUCT -diff --git a/hotspot/src/cpu/mips/vm/copy_mips.hpp b/hotspot/src/cpu/mips/vm/copy_mips.hpp -new file mode 100644 -index 0000000000..49fde17923 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/copy_mips.hpp -@@ -0,0 +1,72 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/copy_mips.hpp b/hotspot/src/cpu/mips/vm/copy_mips.hpp +--- a/hotspot/src/cpu/mips/vm/copy_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/copy_mips.hpp 2024-01-30 13:54:24.792708955 +0800 +@@ -0,0 +1,90 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -62575,6 +62273,24 @@ index 0000000000..49fde17923 + +// Contains inline asm implementations + ++// Template for atomic, element-wise copy. ++template ++static void copy_conjoint_atomic(const T* from, T* to, size_t count) { ++ if (from > to) { ++ while (count-- > 0) { ++ // Copy forwards ++ *to++ = *from++; ++ } ++ } else { ++ from += count - 1; ++ to += count - 1; ++ while (count-- > 0) { ++ // Copy backwards ++ *to-- = *from--; ++ } ++ } ++} ++ +static void pd_fill_to_words(HeapWord* tohw, size_t count, juint value) { + julong* to = (julong*) tohw; + julong v = ((julong) value << 32) | value; @@ -62600,11 +62316,9 @@ index 0000000000..49fde17923 +} + +#endif //CPU_MIPS_VM_COPY_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp b/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp -new file mode 100644 -index 0000000000..37bd03b00b ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp b/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp +--- a/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/cppInterpreterGenerator_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,53 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. @@ -62659,11 +62373,9 @@ index 0000000000..37bd03b00b + bool native); // C++ interpreter only + +#endif // CPU_MIPS_VM_CPPINTERPRETERGENERATOR_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp -new file mode 100644 -index 0000000000..1f8d75d593 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp +--- a/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2007, 2013, Oracle and/or its affiliates. All rights reserved. @@ -62880,11 +62592,9 @@ index 0000000000..1f8d75d593 +} + +#endif // CC_INTERP -diff --git a/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp -new file mode 100644 -index 0000000000..49c4733049 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp +--- a/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/cppInterpreter_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,40 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62926,11 +62636,9 @@ index 0000000000..49c4733049 + const static int InterpreterCodeSize = 210 * K; + +#endif // CPU_MIPS_VM_CPPINTERPRETER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/debug_mips.cpp b/hotspot/src/cpu/mips/vm/debug_mips.cpp -new file mode 100644 -index 0000000000..50de03653b ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/debug_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/debug_mips.cpp b/hotspot/src/cpu/mips/vm/debug_mips.cpp +--- a/hotspot/src/cpu/mips/vm/debug_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/debug_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,51 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -62983,11 +62691,9 @@ index 0000000000..50de03653b +void pd_obfuscate_location(char *buf,int buflen) {} + +#endif // PRODUCT -diff --git a/hotspot/src/cpu/mips/vm/depChecker_mips.cpp b/hotspot/src/cpu/mips/vm/depChecker_mips.cpp -new file mode 100644 -index 0000000000..756ccb68f9 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/depChecker_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/depChecker_mips.cpp b/hotspot/src/cpu/mips/vm/depChecker_mips.cpp +--- a/hotspot/src/cpu/mips/vm/depChecker_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/depChecker_mips.cpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -63019,11 +62725,9 @@ index 0000000000..756ccb68f9 +#include "depChecker_mips.hpp" + +// Nothing to do on mips -diff --git a/hotspot/src/cpu/mips/vm/depChecker_mips.hpp b/hotspot/src/cpu/mips/vm/depChecker_mips.hpp -new file mode 100644 -index 0000000000..11e52b4e8f ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/depChecker_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/depChecker_mips.hpp b/hotspot/src/cpu/mips/vm/depChecker_mips.hpp +--- a/hotspot/src/cpu/mips/vm/depChecker_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/depChecker_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -63056,11 +62760,9 @@ index 0000000000..11e52b4e8f +// Nothing to do on MIPS + +#endif // CPU_MIPS_VM_DEPCHECKER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/disassembler_mips.hpp b/hotspot/src/cpu/mips/vm/disassembler_mips.hpp -new file mode 100644 -index 0000000000..c5f3a8888d ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/disassembler_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/disassembler_mips.hpp b/hotspot/src/cpu/mips/vm/disassembler_mips.hpp +--- a/hotspot/src/cpu/mips/vm/disassembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/disassembler_mips.hpp 2023-12-20 09:23:19.794814582 +0800 @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -63099,11 +62801,9 @@ index 0000000000..c5f3a8888d + } + +#endif // CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/frame_mips.cpp b/hotspot/src/cpu/mips/vm/frame_mips.cpp -new file mode 100644 -index 0000000000..1c928976fc ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/frame_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/frame_mips.cpp b/hotspot/src/cpu/mips/vm/frame_mips.cpp +--- a/hotspot/src/cpu/mips/vm/frame_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/frame_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,711 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -63816,11 +63516,9 @@ index 0000000000..1c928976fc + init((intptr_t*)sp, (intptr_t*)fp, (address)pc); +} +#endif -diff --git a/hotspot/src/cpu/mips/vm/frame_mips.hpp b/hotspot/src/cpu/mips/vm/frame_mips.hpp -new file mode 100644 -index 0000000000..9e684a8dc3 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/frame_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/frame_mips.hpp b/hotspot/src/cpu/mips/vm/frame_mips.hpp +--- a/hotspot/src/cpu/mips/vm/frame_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/frame_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,229 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -64051,11 +63749,9 @@ index 0000000000..9e684a8dc3 +#endif // CC_INTERP + +#endif // CPU_MIPS_VM_FRAME_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp b/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp -new file mode 100644 -index 0000000000..60e56ac7ab ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp b/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp +--- a/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/frame_mips.inline.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,312 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -64369,11 +64065,9 @@ index 0000000000..60e56ac7ab +} + +#endif // CPU_MIPS_VM_FRAME_MIPS_INLINE_HPP -diff --git a/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp b/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp -new file mode 100644 -index 0000000000..bd00a8d473 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp b/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp +--- a/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/globalDefinitions_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,41 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -64416,11 +64110,9 @@ index 0000000000..bd00a8d473 +#define SUPPORTS_NATIVE_CX8 + +#endif // CPU_MIPS_VM_GLOBALDEFINITIONS_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/globals_mips.hpp b/hotspot/src/cpu/mips/vm/globals_mips.hpp -new file mode 100644 -index 0000000000..988bc35137 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/globals_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/globals_mips.hpp b/hotspot/src/cpu/mips/vm/globals_mips.hpp +--- a/hotspot/src/cpu/mips/vm/globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/globals_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -64546,11 +64238,99 @@ index 0000000000..988bc35137 + "Eliminate barriers for single active cpu") + +#endif // CPU_MIPS_VM_GLOBALS_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp b/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp -new file mode 100644 -index 0000000000..96ea345360 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/icache_mips.cpp b/hotspot/src/cpu/mips/vm/icache_mips.cpp +--- a/hotspot/src/cpu/mips/vm/icache_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/icache_mips.cpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "runtime/icache.hpp" ++ ++void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) ++{ ++#define __ _masm-> ++ StubCodeMark mark(this, "ICache", "flush_icache_stub"); ++ address start = __ pc(); ++ ++ __ jr_hb(RA); ++ __ delayed()->ori(V0, RA2, 0); ++ ++ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++#undef __ ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/icache_mips.hpp b/hotspot/src/cpu/mips/vm/icache_mips.hpp +--- a/hotspot/src/cpu/mips/vm/icache_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/icache_mips.hpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_ICACHE_MIPS_HPP ++#define CPU_MIPS_VM_ICACHE_MIPS_HPP ++ ++// Interface for updating the instruction cache. Whenever the VM modifies ++// code, part of the processor instruction cache potentially has to be flushed. ++ ++class ICache : public AbstractICache { ++ public: ++ enum { ++ stub_size = 2 * BytesPerInstWord, // Size of the icache flush stub in bytes ++ line_size = 32, // flush instruction affects a dword ++ log2_line_size = 5 // log2(line_size) ++ }; ++}; ++ ++#endif // CPU_MIPS_VM_ICACHE_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp b/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp +--- a/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/icBuffer_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,97 @@ +/* + * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. @@ -64649,105 +64429,9 @@ index 0000000000..96ea345360 + void* o= (void*)move->data(); + return o; +} -diff --git a/hotspot/src/cpu/mips/vm/icache_mips.cpp b/hotspot/src/cpu/mips/vm/icache_mips.cpp -new file mode 100644 -index 0000000000..848964b63f ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/icache_mips.cpp -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "runtime/icache.hpp" -+ -+void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) -+{ -+#define __ _masm-> -+ StubCodeMark mark(this, "ICache", "flush_icache_stub"); -+ address start = __ pc(); -+ -+ __ jr_hb(RA); -+ __ delayed()->ori(V0, RA2, 0); -+ -+ *flush_icache_stub = (ICache::flush_icache_stub_t)start; -+#undef __ -+} -diff --git a/hotspot/src/cpu/mips/vm/icache_mips.hpp b/hotspot/src/cpu/mips/vm/icache_mips.hpp -new file mode 100644 -index 0000000000..78ee11cc73 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/icache_mips.hpp -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_ICACHE_MIPS_HPP -+#define CPU_MIPS_VM_ICACHE_MIPS_HPP -+ -+// Interface for updating the instruction cache. Whenever the VM modifies -+// code, part of the processor instruction cache potentially has to be flushed. -+ -+class ICache : public AbstractICache { -+ public: -+ enum { -+ stub_size = 2 * BytesPerInstWord, // Size of the icache flush stub in bytes -+ line_size = 32, // flush instruction affects a dword -+ log2_line_size = 5 // log2(line_size) -+ }; -+}; -+ -+#endif // CPU_MIPS_VM_ICACHE_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp -new file mode 100644 -index 0000000000..ed2d931e94 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,2084 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -66833,11 +66517,9 @@ index 0000000000..ed2d931e94 + unimplemented(); + } +} -diff --git a/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp -new file mode 100644 -index 0000000000..a2ebdec3ad ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp +--- a/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interp_masm_mips_64.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -67068,109 +66750,395 @@ index 0000000000..a2ebdec3ad + Register reg2, int start_row, + Label& done, bool is_virtual_call); + -+ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); -+ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); -+ void update_mdp_by_constant(Register mdp_in, int constant); -+ void update_mdp_for_ret(Register return_bci); ++ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); ++ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); ++ void update_mdp_by_constant(Register mdp_in, int constant); ++ void update_mdp_for_ret(Register return_bci); ++ ++ void profile_taken_branch(Register mdp, Register bumped_count); ++ void profile_not_taken_branch(Register mdp); ++ void profile_call(Register mdp); ++ void profile_final_call(Register mdp); ++ void profile_virtual_call(Register receiver, Register mdp, ++ Register scratch2, ++ bool receiver_can_be_null = false); ++ void profile_ret(Register return_bci, Register mdp); ++ void profile_null_seen(Register mdp); ++ void profile_typecheck(Register mdp, Register klass, Register scratch); ++ void profile_typecheck_failed(Register mdp); ++ void profile_switch_default(Register mdp); ++ void profile_switch_case(Register index_in_scratch, Register mdp, ++ Register scratch2); ++ ++ // Debugging ++ // only if +VerifyOops && state == atos ++ void verify_oop(Register reg, TosState state = atos); ++ // only if +VerifyFPU && (state == ftos || state == dtos) ++ void verify_FPU(int stack_depth, TosState state = ftos); ++ ++ void profile_obj_type(Register obj, const Address& mdo_addr); ++ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); ++ void profile_return_type(Register mdp, Register ret, Register tmp); ++ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++#endif // !CC_INTERP ++ ++ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ ++ // support for jvmti/dtrace ++ void notify_method_entry(); ++ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++}; ++ ++#endif // CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp b/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp +--- a/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,49 @@ ++/* ++ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_INTERPRETERGENERATOR_MIPS_HPP ++#define CPU_MIPS_VM_INTERPRETERGENERATOR_MIPS_HPP ++ ++ ++// Generation of Interpreter ++// ++ friend class AbstractInterpreterGenerator; ++ ++ private: ++ ++ address generate_normal_entry(bool synchronized); ++ address generate_native_entry(bool synchronized); ++ address generate_abstract_entry(void); ++ address generate_math_entry(AbstractInterpreter::MethodKind kind); ++ address generate_empty_entry(void); ++ address generate_accessor_entry(void); ++ address generate_Reference_get_entry(); ++ void lock_method(void); ++ void generate_stack_overflow_check(void); ++ ++ void generate_counter_incr(Label* overflow, Label* profile_method, Label* profile_method_continue); ++ void generate_counter_overflow(Label* do_continue); ++ ++#endif // CPU_MIPS_VM_INTERPRETERGENERATOR_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp b/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,286 @@ ++/* ++ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "interpreter/bytecodeHistogram.hpp" ++#include "interpreter/interpreter.hpp" ++#include "interpreter/interpreterGenerator.hpp" ++#include "interpreter/interpreterRuntime.hpp" ++#include "interpreter/templateTable.hpp" ++#include "oops/arrayOop.hpp" ++#include "oops/methodData.hpp" ++#include "oops/method.hpp" ++#include "oops/oop.inline.hpp" ++#include "prims/jvmtiExport.hpp" ++#include "prims/jvmtiThreadState.hpp" ++#include "prims/methodHandles.hpp" ++#include "runtime/arguments.hpp" ++#include "runtime/deoptimization.hpp" ++#include "runtime/frame.inline.hpp" ++#include "runtime/sharedRuntime.hpp" ++#include "runtime/stubRoutines.hpp" ++#include "runtime/synchronizer.hpp" ++#include "runtime/timer.hpp" ++#include "runtime/vframeArray.hpp" ++#include "utilities/debug.hpp" ++ ++#define __ _masm-> ++ ++#define A0 RA0 ++#define A1 RA1 ++#define A2 RA2 ++#define A3 RA3 ++#define A4 RA4 ++#define A5 RA5 ++#define A6 RA6 ++#define A7 RA7 ++#define T0 RT0 ++#define T1 RT1 ++#define T2 RT2 ++#define T3 RT3 ++#define T8 RT8 ++#define T9 RT9 ++ ++ ++address AbstractInterpreterGenerator::generate_slow_signature_handler() { ++ address entry = __ pc(); ++ ++ // Rmethod: method ++ // LVP: pointer to locals ++ // A3: first stack arg ++ __ move(A3, SP); ++ __ daddiu(SP, SP, -10 * wordSize); ++ __ sd(RA, SP, 0); ++ __ call_VM(noreg, ++ CAST_FROM_FN_PTR(address, ++ InterpreterRuntime::slow_signature_handler), ++ Rmethod, LVP, A3); ++ ++ // V0: result handler ++ ++ // Stack layout: ++ // ... ++ // 10 stack arg0 <--- old sp ++ // 9 float/double identifiers ++ // 8 register arg7 ++ // ... ++ // 2 register arg1 ++ // 1 aligned slot ++ // SP: 0 return address ++ ++ // Do FP first so we can use T3 as temp ++ __ ld(T3, Address(SP, 9 * wordSize)); // float/double identifiers ++ ++ // A0 is for env. ++ // If the mothed is not static, A1 will be corrected in generate_native_entry. ++ for ( int i = 1; i < Argument::n_register_parameters; i++ ) { ++ Register reg = as_Register(i + A0->encoding()); ++ FloatRegister floatreg = as_FloatRegister(i + F12->encoding()); ++ Label isfloatordouble, isdouble, next; ++ ++ __ andi(AT, T3, 1 << (i*2)); // Float or Double? ++ __ bne(AT, R0, isfloatordouble); ++ __ delayed()->nop(); ++ ++ // Do Int register here ++ __ ld(reg, SP, (1 + i) * wordSize); ++ __ b (next); ++ __ delayed()->nop(); ++ ++ __ bind(isfloatordouble); ++ __ andi(AT, T3, 1 << ((i*2)+1)); // Double? ++ __ bne(AT, R0, isdouble); ++ __ delayed()->nop(); ++ ++ // Do Float Here ++ __ lwc1(floatreg, SP, (1 + i) * wordSize); ++ __ b(next); ++ __ delayed()->nop(); ++ ++ // Do Double here ++ __ bind(isdouble); ++ __ ldc1(floatreg, SP, (1 + i) * wordSize); ++ ++ __ bind(next); ++ } ++ ++ __ ld(RA, SP, 0); ++ __ daddiu(SP, SP, 10 * wordSize); ++ __ jr(RA); ++ __ delayed()->nop(); ++ return entry; ++} ++ ++ ++// ++// Various method entries ++// ++ ++address InterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) { ++ ++ // Rmethod: methodOop ++ // V0: scratrch ++ // Rsender: send 's sp ++ ++ if (!InlineIntrinsics) return NULL; // Generate a vanilla entry ++ ++ address entry_point = __ pc(); ++ ++ // These don't need a safepoint check because they aren't virtually ++ // callable. We won't enter these intrinsics from compiled code. ++ // If in the future we added an intrinsic which was virtually callable ++ // we'd have to worry about how to safepoint so that this code is used. ++ ++ // mathematical functions inlined by compiler ++ // (interpreter must provide identical implementation ++ // in order to avoid monotonicity bugs when switching ++ // from interpreter to compiler in the middle of some ++ // computation) ++ // ++ // stack: [ lo(arg) ] <-- sp ++ // [ hi(arg) ] ++ { ++ // Note: For JDK 1.3 StrictMath exists and Math.sin/cos/sqrt are ++ // java methods. Interpreter::method_kind(...) will select ++ // this entry point for the corresponding methods in JDK 1.3. ++ __ ldc1(F12, SP, 0 * wordSize); ++ __ ldc1(F13, SP, 1 * wordSize); ++ __ push2(RA, FP); ++ __ daddiu(FP, SP, 2 * wordSize); ++ ++ // [ fp ] <-- sp ++ // [ ra ] ++ // [ lo ] <-- fp ++ // [ hi ] ++ //FIXME, need consider this ++ switch (kind) { ++ case Interpreter::java_lang_math_sin : ++ __ trigfunc('s'); ++ break; ++ case Interpreter::java_lang_math_cos : ++ __ trigfunc('c'); ++ break; ++ case Interpreter::java_lang_math_tan : ++ __ trigfunc('t'); ++ break; ++ case Interpreter::java_lang_math_sqrt: ++ __ sqrt_d(F0, F12); ++ break; ++ case Interpreter::java_lang_math_abs: ++ __ abs_d(F0, F12); ++ break; ++ case Interpreter::java_lang_math_log: ++ // Store to stack to convert 80bit precision back to 64bits ++ break; ++ case Interpreter::java_lang_math_log10: ++ // Store to stack to convert 80bit precision back to 64bits ++ break; ++ case Interpreter::java_lang_math_pow: ++ break; ++ case Interpreter::java_lang_math_exp: ++ break; ++ ++ default : ++ ShouldNotReachHere(); ++ } ++ ++ // must maintain return value in F0:F1 ++ __ ld(RA, FP, (-1) * wordSize); ++ //FIXME ++ __ ld(FP, FP, (-2) * wordSize); ++ __ move(SP, Rsender); ++ __ jr(RA); ++ __ delayed()->nop(); ++ } ++ return entry_point; ++} ++ ++ ++// Abstract method entry ++// Attempt to execute abstract method. Throw exception ++address InterpreterGenerator::generate_abstract_entry(void) { ++ ++ // Rmethod: methodOop ++ // V0: receiver (unused) ++ // Rsender : sender 's sp ++ address entry_point = __ pc(); + -+ void profile_taken_branch(Register mdp, Register bumped_count); -+ void profile_not_taken_branch(Register mdp); -+ void profile_call(Register mdp); -+ void profile_final_call(Register mdp); -+ void profile_virtual_call(Register receiver, Register mdp, -+ Register scratch2, -+ bool receiver_can_be_null = false); -+ void profile_ret(Register return_bci, Register mdp); -+ void profile_null_seen(Register mdp); -+ void profile_typecheck(Register mdp, Register klass, Register scratch); -+ void profile_typecheck_failed(Register mdp); -+ void profile_switch_default(Register mdp); -+ void profile_switch_case(Register index_in_scratch, Register mdp, -+ Register scratch2); ++ // abstract method entry ++ // throw exception ++ // adjust stack to what a normal return would do ++ __ empty_expression_stack(); ++ __ restore_bcp(); ++ __ restore_locals(); ++ __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError)); ++ // the call_VM checks for exception, so we should never return here. ++ __ should_not_reach_here(); + -+ // Debugging -+ // only if +VerifyOops && state == atos -+ void verify_oop(Register reg, TosState state = atos); -+ // only if +VerifyFPU && (state == ftos || state == dtos) -+ void verify_FPU(int stack_depth, TosState state = ftos); ++ return entry_point; ++} + -+ void profile_obj_type(Register obj, const Address& mdo_addr); -+ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); -+ void profile_return_type(Register mdp, Register ret, Register tmp); -+ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); -+#endif // !CC_INTERP + -+ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++// Empty method, generate a very fast return. + -+ // support for jvmti/dtrace -+ void notify_method_entry(); -+ void notify_method_exit(TosState state, NotifyMethodExitMode mode); -+}; ++address InterpreterGenerator::generate_empty_entry(void) { + -+#endif // CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -diff --git a/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp b/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp -new file mode 100644 -index 0000000000..26fced492a ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interpreterGenerator_mips.hpp -@@ -0,0 +1,49 @@ -+/* -+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ // Rmethod: methodOop ++ // V0: receiver (unused) ++ // Rsender: sender 's sp , must set sp to this value on return , on mips ,now use T0,as it right? ++ if (!UseFastEmptyMethods) return NULL; + -+#ifndef CPU_MIPS_VM_INTERPRETERGENERATOR_MIPS_HPP -+#define CPU_MIPS_VM_INTERPRETERGENERATOR_MIPS_HPP ++ address entry_point = __ pc(); + ++ Label slow_path; ++ __ li(RT0, SafepointSynchronize::address_of_state()); ++ __ lw(AT, RT0, 0); ++ __ move(RT0, (SafepointSynchronize::_not_synchronized)); ++ __ bne(AT, RT0,slow_path); ++ __ delayed()->nop(); ++ __ move(SP, Rsender); ++ __ jr(RA); ++ __ delayed()->nop(); ++ __ bind(slow_path); ++ (void) generate_normal_entry(false); + -+// Generation of Interpreter -+// -+ friend class AbstractInterpreterGenerator; ++ return entry_point; + -+ private: ++} + -+ address generate_normal_entry(bool synchronized); -+ address generate_native_entry(bool synchronized); -+ address generate_abstract_entry(void); -+ address generate_math_entry(AbstractInterpreter::MethodKind kind); -+ address generate_empty_entry(void); -+ address generate_accessor_entry(void); -+ address generate_Reference_get_entry(); -+ void lock_method(void); -+ void generate_stack_overflow_check(void); ++void Deoptimization::unwind_callee_save_values(frame* f, vframeArray* vframe_array) { + -+ void generate_counter_incr(Label* overflow, Label* profile_method, Label* profile_method_continue); -+ void generate_counter_overflow(Label* do_continue); ++ // This code is sort of the equivalent of C2IAdapter::setup_stack_frame back in ++ // the days we had adapter frames. When we deoptimize a situation where a ++ // compiled caller calls a compiled caller will have registers it expects ++ // to survive the call to the callee. If we deoptimize the callee the only ++ // way we can restore these registers is to have the oldest interpreter ++ // frame that we create restore these values. That is what this routine ++ // will accomplish. + -+#endif // CPU_MIPS_VM_INTERPRETERGENERATOR_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp b/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp -new file mode 100644 -index 0000000000..8dec2007c6 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp -@@ -0,0 +1,61 @@ ++ // At the moment we have modified c2 to not have any callee save registers ++ // so this problem does not exist and this routine is just a place holder. ++ ++ assert(f->is_interpreted_frame(), "must be interpreted"); ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interpreter_mips.hpp b/hotspot/src/cpu/mips/vm/interpreter_mips.hpp +--- a/hotspot/src/cpu/mips/vm/interpreter_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interpreter_mips.hpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,50 @@ +/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -67194,47 +67162,34 @@ index 0000000000..8dec2007c6 + * + */ + -+#ifndef CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -+#define CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -+ -+#include "memory/allocation.hpp" -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ -+ void move(int from_offset, int to_offset); -+ -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); ++#ifndef CPU_MIPS_VM_INTERPRETER_MIPS_HPP ++#define CPU_MIPS_VM_INTERPRETER_MIPS_HPP + + public: -+ // Creation -+ SignatureHandlerGenerator(methodHandle method, CodeBuffer* buffer) : NativeSignatureIterator(method) { -+ _masm = new MacroAssembler(buffer); -+ } + -+ // Code generation -+ void generate(uint64_t fingerprint); ++ // Sentinel placed in the code for interpreter returns so ++ // that i2c adapters and osr code can recognize an interpreter ++ // return address and convert the return to a specialized ++ // block of code to handle compiedl return values and cleaning ++ // the fpu stack. ++ static const int return_sentinel; + -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; ++ static Address::ScaleFactor stackElementScale() { ++ return Address::times_8; ++ } + -+#endif // CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp b/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp -new file mode 100644 -index 0000000000..14b7e39af7 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp ++ // Offset from sp (which points to the last stack element) ++ static int expr_offset_in_bytes(int i) { return stackElementSize * i; } ++ // Size of interpreter code. Increase if too small. Interpreter will ++ // fail with a guarantee ("not enough space for interpreter generation"); ++ // if too small. ++ // Run with +PrintInterpreterSize to get the VM to print out the size. ++ // Max size with JVMTI and TaggedStackInterpreter ++ const static int InterpreterCodeSize = 168 * 1024; ++#endif // CPU_MIPS_VM_INTERPRETER_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp b/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interpreterRT_mips_64.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,259 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -67495,70 +67450,12 @@ index 0000000000..14b7e39af7 + // return result handler + return Interpreter::result_handler(m->result_type()); +IRT_END -diff --git a/hotspot/src/cpu/mips/vm/interpreter_mips.hpp b/hotspot/src/cpu/mips/vm/interpreter_mips.hpp -new file mode 100644 -index 0000000000..9a21d704fa ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interpreter_mips.hpp -@@ -0,0 +1,50 @@ -+/* -+ * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_INTERPRETER_MIPS_HPP -+#define CPU_MIPS_VM_INTERPRETER_MIPS_HPP -+ -+ public: -+ -+ // Sentinel placed in the code for interpreter returns so -+ // that i2c adapters and osr code can recognize an interpreter -+ // return address and convert the return to a specialized -+ // block of code to handle compiedl return values and cleaning -+ // the fpu stack. -+ static const int return_sentinel; -+ -+ static Address::ScaleFactor stackElementScale() { -+ return Address::times_8; -+ } -+ -+ // Offset from sp (which points to the last stack element) -+ static int expr_offset_in_bytes(int i) { return stackElementSize * i; } -+ // Size of interpreter code. Increase if too small. Interpreter will -+ // fail with a guarantee ("not enough space for interpreter generation"); -+ // if too small. -+ // Run with +PrintInterpreterSize to get the VM to print out the size. -+ // Max size with JVMTI and TaggedStackInterpreter -+ const static int InterpreterCodeSize = 168 * 1024; -+#endif // CPU_MIPS_VM_INTERPRETER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp b/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp -new file mode 100644 -index 0000000000..014c812713 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/interpreter_mips_64.cpp -@@ -0,0 +1,286 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp b/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp +--- a/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/interpreterRT_mips.hpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,61 @@ +/* -+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -67582,272 +67479,45 @@ index 0000000000..014c812713 + * + */ + -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "interpreter/bytecodeHistogram.hpp" -+#include "interpreter/interpreter.hpp" -+#include "interpreter/interpreterGenerator.hpp" -+#include "interpreter/interpreterRuntime.hpp" -+#include "interpreter/templateTable.hpp" -+#include "oops/arrayOop.hpp" -+#include "oops/methodData.hpp" -+#include "oops/method.hpp" -+#include "oops/oop.inline.hpp" -+#include "prims/jvmtiExport.hpp" -+#include "prims/jvmtiThreadState.hpp" -+#include "prims/methodHandles.hpp" -+#include "runtime/arguments.hpp" -+#include "runtime/deoptimization.hpp" -+#include "runtime/frame.inline.hpp" -+#include "runtime/sharedRuntime.hpp" -+#include "runtime/stubRoutines.hpp" -+#include "runtime/synchronizer.hpp" -+#include "runtime/timer.hpp" -+#include "runtime/vframeArray.hpp" -+#include "utilities/debug.hpp" -+ -+#define __ _masm-> -+ -+#define A0 RA0 -+#define A1 RA1 -+#define A2 RA2 -+#define A3 RA3 -+#define A4 RA4 -+#define A5 RA5 -+#define A6 RA6 -+#define A7 RA7 -+#define T0 RT0 -+#define T1 RT1 -+#define T2 RT2 -+#define T3 RT3 -+#define T8 RT8 -+#define T9 RT9 -+ -+ -+address AbstractInterpreterGenerator::generate_slow_signature_handler() { -+ address entry = __ pc(); -+ -+ // Rmethod: method -+ // LVP: pointer to locals -+ // A3: first stack arg -+ __ move(A3, SP); -+ __ daddiu(SP, SP, -10 * wordSize); -+ __ sd(RA, SP, 0); -+ __ call_VM(noreg, -+ CAST_FROM_FN_PTR(address, -+ InterpreterRuntime::slow_signature_handler), -+ Rmethod, LVP, A3); -+ -+ // V0: result handler -+ -+ // Stack layout: -+ // ... -+ // 10 stack arg0 <--- old sp -+ // 9 float/double identifiers -+ // 8 register arg7 -+ // ... -+ // 2 register arg1 -+ // 1 aligned slot -+ // SP: 0 return address -+ -+ // Do FP first so we can use T3 as temp -+ __ ld(T3, Address(SP, 9 * wordSize)); // float/double identifiers -+ -+ // A0 is for env. -+ // If the mothed is not static, A1 will be corrected in generate_native_entry. -+ for ( int i = 1; i < Argument::n_register_parameters; i++ ) { -+ Register reg = as_Register(i + A0->encoding()); -+ FloatRegister floatreg = as_FloatRegister(i + F12->encoding()); -+ Label isfloatordouble, isdouble, next; -+ -+ __ andi(AT, T3, 1 << (i*2)); // Float or Double? -+ __ bne(AT, R0, isfloatordouble); -+ __ delayed()->nop(); -+ -+ // Do Int register here -+ __ ld(reg, SP, (1 + i) * wordSize); -+ __ b (next); -+ __ delayed()->nop(); -+ -+ __ bind(isfloatordouble); -+ __ andi(AT, T3, 1 << ((i*2)+1)); // Double? -+ __ bne(AT, R0, isdouble); -+ __ delayed()->nop(); -+ -+ // Do Float Here -+ __ lwc1(floatreg, SP, (1 + i) * wordSize); -+ __ b(next); -+ __ delayed()->nop(); -+ -+ // Do Double here -+ __ bind(isdouble); -+ __ ldc1(floatreg, SP, (1 + i) * wordSize); -+ -+ __ bind(next); -+ } -+ -+ __ ld(RA, SP, 0); -+ __ daddiu(SP, SP, 10 * wordSize); -+ __ jr(RA); -+ __ delayed()->nop(); -+ return entry; -+} -+ -+ -+// -+// Various method entries -+// -+ -+address InterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) { -+ -+ // Rmethod: methodOop -+ // V0: scratrch -+ // Rsender: send 's sp -+ -+ if (!InlineIntrinsics) return NULL; // Generate a vanilla entry ++#ifndef CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP ++#define CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP + -+ address entry_point = __ pc(); ++#include "memory/allocation.hpp" + -+ // These don't need a safepoint check because they aren't virtually -+ // callable. We won't enter these intrinsics from compiled code. -+ // If in the future we added an intrinsic which was virtually callable -+ // we'd have to worry about how to safepoint so that this code is used. ++// native method calls + -+ // mathematical functions inlined by compiler -+ // (interpreter must provide identical implementation -+ // in order to avoid monotonicity bugs when switching -+ // from interpreter to compiler in the middle of some -+ // computation) -+ // -+ // stack: [ lo(arg) ] <-- sp -+ // [ hi(arg) ] -+ { -+ // Note: For JDK 1.3 StrictMath exists and Math.sin/cos/sqrt are -+ // java methods. Interpreter::method_kind(...) will select -+ // this entry point for the corresponding methods in JDK 1.3. -+ __ ldc1(F12, SP, 0 * wordSize); -+ __ ldc1(F13, SP, 1 * wordSize); -+ __ push2(RA, FP); -+ __ daddiu(FP, SP, 2 * wordSize); ++class SignatureHandlerGenerator: public NativeSignatureIterator { ++ private: ++ MacroAssembler* _masm; + -+ // [ fp ] <-- sp -+ // [ ra ] -+ // [ lo ] <-- fp -+ // [ hi ] -+ //FIXME, need consider this -+ switch (kind) { -+ case Interpreter::java_lang_math_sin : -+ __ trigfunc('s'); -+ break; -+ case Interpreter::java_lang_math_cos : -+ __ trigfunc('c'); -+ break; -+ case Interpreter::java_lang_math_tan : -+ __ trigfunc('t'); -+ break; -+ case Interpreter::java_lang_math_sqrt: -+ __ sqrt_d(F0, F12); -+ break; -+ case Interpreter::java_lang_math_abs: -+ __ abs_d(F0, F12); -+ break; -+ case Interpreter::java_lang_math_log: -+ // Store to stack to convert 80bit precision back to 64bits -+ break; -+ case Interpreter::java_lang_math_log10: -+ // Store to stack to convert 80bit precision back to 64bits -+ break; -+ case Interpreter::java_lang_math_pow: -+ break; -+ case Interpreter::java_lang_math_exp: -+ break; ++ void move(int from_offset, int to_offset); + -+ default : -+ ShouldNotReachHere(); -+ } ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + -+ // must maintain return value in F0:F1 -+ __ ld(RA, FP, (-1) * wordSize); -+ //FIXME -+ __ ld(FP, FP, (-2) * wordSize); -+ __ move(SP, Rsender); -+ __ jr(RA); -+ __ delayed()->nop(); ++ public: ++ // Creation ++ SignatureHandlerGenerator(methodHandle method, CodeBuffer* buffer) : NativeSignatureIterator(method) { ++ _masm = new MacroAssembler(buffer); + } -+ return entry_point; -+} -+ -+ -+// Abstract method entry -+// Attempt to execute abstract method. Throw exception -+address InterpreterGenerator::generate_abstract_entry(void) { -+ -+ // Rmethod: methodOop -+ // V0: receiver (unused) -+ // Rsender : sender 's sp -+ address entry_point = __ pc(); -+ -+ // abstract method entry -+ // throw exception -+ // adjust stack to what a normal return would do -+ __ empty_expression_stack(); -+ __ restore_bcp(); -+ __ restore_locals(); -+ __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError)); -+ // the call_VM checks for exception, so we should never return here. -+ __ should_not_reach_here(); -+ -+ return entry_point; -+} -+ -+ -+// Empty method, generate a very fast return. -+ -+address InterpreterGenerator::generate_empty_entry(void) { -+ -+ // Rmethod: methodOop -+ // V0: receiver (unused) -+ // Rsender: sender 's sp , must set sp to this value on return , on mips ,now use T0,as it right? -+ if (!UseFastEmptyMethods) return NULL; -+ -+ address entry_point = __ pc(); -+ -+ Label slow_path; -+ __ li(RT0, SafepointSynchronize::address_of_state()); -+ __ lw(AT, RT0, 0); -+ __ move(RT0, (SafepointSynchronize::_not_synchronized)); -+ __ bne(AT, RT0,slow_path); -+ __ delayed()->nop(); -+ __ move(SP, Rsender); -+ __ jr(RA); -+ __ delayed()->nop(); -+ __ bind(slow_path); -+ (void) generate_normal_entry(false); -+ -+ return entry_point; -+ -+} -+ -+void Deoptimization::unwind_callee_save_values(frame* f, vframeArray* vframe_array) { + -+ // This code is sort of the equivalent of C2IAdapter::setup_stack_frame back in -+ // the days we had adapter frames. When we deoptimize a situation where a -+ // compiled caller calls a compiled caller will have registers it expects -+ // to survive the call to the callee. If we deoptimize the callee the only -+ // way we can restore these registers is to have the oldest interpreter -+ // frame that we create restore these values. That is what this routine -+ // will accomplish. ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // At the moment we have modified c2 to not have any callee save registers -+ // so this problem does not exist and this routine is just a place holder. ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); ++}; + -+ assert(f->is_interpreted_frame(), "must be interpreted"); -+} -diff --git a/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp b/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp -new file mode 100644 -index 0000000000..dccdf6a019 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp ++#endif // CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp b/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp +--- a/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/javaFrameAnchor_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -67936,11 +67606,9 @@ index 0000000000..dccdf6a019 + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_MIPS_VM_JAVAFRAMEANCHOR_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp b/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp -new file mode 100644 -index 0000000000..0f7dd9424a ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp b/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/jniFastGetField_mips_64.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. @@ -68114,11 +67782,64 @@ index 0000000000..0f7dd9424a +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff --git a/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp b/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp -new file mode 100644 -index 0000000000..dfcd47b478 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/jni_mips.h b/hotspot/src/cpu/mips/vm/jni_mips.h +--- a/hotspot/src/cpu/mips/vm/jni_mips.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/jni_mips.h 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,51 @@ ++/* ++ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. Oracle designates this ++ * particular file as subject to the "Classpath" exception as provided ++ * by Oracle in the LICENSE file that accompanied this code. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ */ ++ ++#ifndef _JAVASOFT_JNI_MD_H_ ++#define _JAVASOFT_JNI_MD_H_ ++ ++// Note: please do not change these without also changing jni_md.h in the JDK ++// repository ++#ifndef __has_attribute ++ #define __has_attribute(x) 0 ++#endif ++#if (defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4) && (__GNUC_MINOR__ > 2))) || __has_attribute(visibility) ++ #define JNIEXPORT __attribute__((visibility("default"))) ++ #define JNIIMPORT __attribute__((visibility("default"))) ++#else ++ #define JNIEXPORT ++ #define JNIIMPORT ++#endif ++ ++#define JNICALL ++ ++typedef int jint; ++ ++typedef long jlong; ++ ++typedef signed char jbyte; ++ ++#endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp b/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp +--- a/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/jniTypes_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,144 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -68264,68 +67985,9 @@ index 0000000000..dfcd47b478 +}; + +#endif // CPU_MIPS_VM_JNITYPES_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/jni_mips.h b/hotspot/src/cpu/mips/vm/jni_mips.h -new file mode 100644 -index 0000000000..6714f51d5d ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/jni_mips.h -@@ -0,0 +1,51 @@ -+/* -+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. Oracle designates this -+ * particular file as subject to the "Classpath" exception as provided -+ * by Oracle in the LICENSE file that accompanied this code. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+#ifndef _JAVASOFT_JNI_MD_H_ -+#define _JAVASOFT_JNI_MD_H_ -+ -+// Note: please do not change these without also changing jni_md.h in the JDK -+// repository -+#ifndef __has_attribute -+ #define __has_attribute(x) 0 -+#endif -+#if (defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4) && (__GNUC_MINOR__ > 2))) || __has_attribute(visibility) -+ #define JNIEXPORT __attribute__((visibility("default"))) -+ #define JNIIMPORT __attribute__((visibility("default"))) -+#else -+ #define JNIEXPORT -+ #define JNIIMPORT -+#endif -+ -+#define JNICALL -+ -+typedef int jint; -+ -+typedef long jlong; -+ -+typedef signed char jbyte; -+ -+#endif -diff --git a/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp b/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp -new file mode 100644 -index 0000000000..2b8840ae10 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp b/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp +--- a/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/macroAssembler_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,4332 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -72659,11 +72321,9 @@ index 0000000000..2b8840ae10 + Unimplemented(); + } +} -diff --git a/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp b/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp -new file mode 100644 -index 0000000000..ab9727793f ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp b/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp +--- a/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/macroAssembler_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,701 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -73366,11 +73026,9 @@ index 0000000000..ab9727793f + + +#endif // CPU_MIPS_VM_MACROASSEMBLER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp b/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp -new file mode 100644 -index 0000000000..92c05fb726 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp b/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp +--- a/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/macroAssembler_mips.inline.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,34 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -73406,11 +73064,9 @@ index 0000000000..92c05fb726 +#include "code/codeCache.hpp" + +#endif // CPU_MIPS_VM_MACROASSEMBLER_MIPS_INLINE_HPP -diff --git a/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp b/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp -new file mode 100644 -index 0000000000..0c467df2f3 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp b/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/metaspaceShared_mips_64.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2004, 2012, Oracle and/or its affiliates. All rights reserved. @@ -73535,11 +73191,9 @@ index 0000000000..0c467df2f3 + + *mc_top = (char*)__ pc(); +} -diff --git a/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp b/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp -new file mode 100644 -index 0000000000..428c271362 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp b/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp +--- a/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/methodHandles_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,576 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -74117,11 +73771,9 @@ index 0000000000..428c271362 +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff --git a/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp b/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp -new file mode 100644 -index 0000000000..03b65fc8ef ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp b/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp +--- a/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/methodHandles_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -74185,43 +73837,10 @@ index 0000000000..03b65fc8ef + // Should be in sharedRuntime, not here. + return I29; + } -diff --git a/hotspot/src/cpu/mips/vm/mips.ad b/hotspot/src/cpu/mips/vm/mips.ad -new file mode 100644 -index 0000000000..3563bbe0e5 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/mips.ad -@@ -0,0 +1,25 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -diff --git a/hotspot/src/cpu/mips/vm/mips_64.ad b/hotspot/src/cpu/mips/vm/mips_64.ad -new file mode 100644 -index 0000000000..2d714c8be1 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/mips_64.ad -@@ -0,0 +1,14035 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/mips_64.ad b/hotspot/src/cpu/mips/vm/mips_64.ad +--- a/hotspot/src/cpu/mips/vm/mips_64.ad 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/mips_64.ad 2024-01-30 13:54:24.792708955 +0800 +@@ -0,0 +1,14036 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -84051,7 +83670,8 @@ index 0000000000..2d714c8be1 + // Now the shorter length is in cnt1 and cnt2 can be used as a tmp register + __ bind(Loop); // Loop begin + __ beq(cnt1, R0, done); -+ __ delayed()->lhu(AT, str1, 0);; ++ __ delayed()->nop(); ++ __ lhu(AT, str1, 0); + + // compare current character + __ lhu(cnt2, str2, 0); @@ -88257,11 +87877,38 @@ index 0000000000..2d714c8be1 +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff --git a/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp b/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp -new file mode 100644 -index 0000000000..e1f7cd944d ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/mips.ad b/hotspot/src/cpu/mips/vm/mips.ad +--- a/hotspot/src/cpu/mips/vm/mips.ad 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/mips.ad 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,25 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp b/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp +--- a/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/nativeInst_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,1829 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -90092,11 +89739,9 @@ index 0000000000..e1f7cd944d + // we check the safepoint instruction like the this. + return is_op(Assembler::lw_op) && is_rt(AT); +} -diff --git a/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp b/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp -new file mode 100644 -index 0000000000..13a4cb4ef1 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp b/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp +--- a/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/nativeInst_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,735 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. @@ -90833,14 +90478,12 @@ index 0000000000..13a4cb4ef1 +} + +#endif // CPU_MIPS_VM_NATIVEINST_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/registerMap_mips.hpp b/hotspot/src/cpu/mips/vm/registerMap_mips.hpp -new file mode 100644 -index 0000000000..7f800eb107 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/registerMap_mips.hpp -@@ -0,0 +1,47 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp b/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp +--- a/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,103 @@ +/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -90864,36 +90507,90 @@ index 0000000000..7f800eb107 + * + */ + -+#ifndef CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -+#define CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -+ -+// machine-dependent implemention for register maps -+ friend class frame; -+ -+ private: -+#ifndef CORE -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return NULL. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return NULL;} ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "asm/register.hpp" ++#include "register_mips.hpp" ++#ifdef TARGET_ARCH_MODEL_mips_32 ++# include "interp_masm_mips_32.hpp" ++#endif ++#ifdef TARGET_ARCH_MODEL_mips_64 ++# include "interp_masm_mips_64.hpp" +#endif + -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} ++REGISTER_DEFINITION(Register, noreg); ++REGISTER_DEFINITION(Register, i0); ++REGISTER_DEFINITION(Register, i1); ++REGISTER_DEFINITION(Register, i2); ++REGISTER_DEFINITION(Register, i3); ++REGISTER_DEFINITION(Register, i4); ++REGISTER_DEFINITION(Register, i5); ++REGISTER_DEFINITION(Register, i6); ++REGISTER_DEFINITION(Register, i7); ++REGISTER_DEFINITION(Register, i8); ++REGISTER_DEFINITION(Register, i9); ++REGISTER_DEFINITION(Register, i10); ++REGISTER_DEFINITION(Register, i11); ++REGISTER_DEFINITION(Register, i12); ++REGISTER_DEFINITION(Register, i13); ++REGISTER_DEFINITION(Register, i14); ++REGISTER_DEFINITION(Register, i15); ++REGISTER_DEFINITION(Register, i16); ++REGISTER_DEFINITION(Register, i17); ++REGISTER_DEFINITION(Register, i18); ++REGISTER_DEFINITION(Register, i19); ++REGISTER_DEFINITION(Register, i20); ++REGISTER_DEFINITION(Register, i21); ++REGISTER_DEFINITION(Register, i22); ++REGISTER_DEFINITION(Register, i23); ++REGISTER_DEFINITION(Register, i24); ++REGISTER_DEFINITION(Register, i25); ++REGISTER_DEFINITION(Register, i26); ++REGISTER_DEFINITION(Register, i27); ++REGISTER_DEFINITION(Register, i28); ++REGISTER_DEFINITION(Register, i29); ++REGISTER_DEFINITION(Register, i30); ++REGISTER_DEFINITION(Register, i31); + -+#endif // CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp b/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp -new file mode 100644 -index 0000000000..4af2531834 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/register_definitions_mips.cpp -@@ -0,0 +1,103 @@ ++REGISTER_DEFINITION(FloatRegister, fnoreg); ++REGISTER_DEFINITION(FloatRegister, f0); ++REGISTER_DEFINITION(FloatRegister, f1); ++REGISTER_DEFINITION(FloatRegister, f2); ++REGISTER_DEFINITION(FloatRegister, f3); ++REGISTER_DEFINITION(FloatRegister, f4); ++REGISTER_DEFINITION(FloatRegister, f5); ++REGISTER_DEFINITION(FloatRegister, f6); ++REGISTER_DEFINITION(FloatRegister, f7); ++REGISTER_DEFINITION(FloatRegister, f8); ++REGISTER_DEFINITION(FloatRegister, f9); ++REGISTER_DEFINITION(FloatRegister, f10); ++REGISTER_DEFINITION(FloatRegister, f11); ++REGISTER_DEFINITION(FloatRegister, f12); ++REGISTER_DEFINITION(FloatRegister, f13); ++REGISTER_DEFINITION(FloatRegister, f14); ++REGISTER_DEFINITION(FloatRegister, f15); ++REGISTER_DEFINITION(FloatRegister, f16); ++REGISTER_DEFINITION(FloatRegister, f17); ++REGISTER_DEFINITION(FloatRegister, f18); ++REGISTER_DEFINITION(FloatRegister, f19); ++REGISTER_DEFINITION(FloatRegister, f20); ++REGISTER_DEFINITION(FloatRegister, f21); ++REGISTER_DEFINITION(FloatRegister, f22); ++REGISTER_DEFINITION(FloatRegister, f23); ++REGISTER_DEFINITION(FloatRegister, f24); ++REGISTER_DEFINITION(FloatRegister, f25); ++REGISTER_DEFINITION(FloatRegister, f26); ++REGISTER_DEFINITION(FloatRegister, f27); ++REGISTER_DEFINITION(FloatRegister, f28); ++REGISTER_DEFINITION(FloatRegister, f29); ++REGISTER_DEFINITION(FloatRegister, f30); ++REGISTER_DEFINITION(FloatRegister, f31); +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/registerMap_mips.hpp b/hotspot/src/cpu/mips/vm/registerMap_mips.hpp +--- a/hotspot/src/cpu/mips/vm/registerMap_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/registerMap_mips.hpp 2023-12-20 09:23:19.798147877 +0800 +@@ -0,0 +1,47 @@ +/* -+ * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -90917,89 +90614,31 @@ index 0000000000..4af2531834 + * + */ + -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "asm/register.hpp" -+#include "register_mips.hpp" -+#ifdef TARGET_ARCH_MODEL_mips_32 -+# include "interp_masm_mips_32.hpp" -+#endif -+#ifdef TARGET_ARCH_MODEL_mips_64 -+# include "interp_masm_mips_64.hpp" ++#ifndef CPU_MIPS_VM_REGISTERMAP_MIPS_HPP ++#define CPU_MIPS_VM_REGISTERMAP_MIPS_HPP ++ ++// machine-dependent implemention for register maps ++ friend class frame; ++ ++ private: ++#ifndef CORE ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return NULL. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return NULL;} +#endif + -+REGISTER_DEFINITION(Register, noreg); -+REGISTER_DEFINITION(Register, i0); -+REGISTER_DEFINITION(Register, i1); -+REGISTER_DEFINITION(Register, i2); -+REGISTER_DEFINITION(Register, i3); -+REGISTER_DEFINITION(Register, i4); -+REGISTER_DEFINITION(Register, i5); -+REGISTER_DEFINITION(Register, i6); -+REGISTER_DEFINITION(Register, i7); -+REGISTER_DEFINITION(Register, i8); -+REGISTER_DEFINITION(Register, i9); -+REGISTER_DEFINITION(Register, i10); -+REGISTER_DEFINITION(Register, i11); -+REGISTER_DEFINITION(Register, i12); -+REGISTER_DEFINITION(Register, i13); -+REGISTER_DEFINITION(Register, i14); -+REGISTER_DEFINITION(Register, i15); -+REGISTER_DEFINITION(Register, i16); -+REGISTER_DEFINITION(Register, i17); -+REGISTER_DEFINITION(Register, i18); -+REGISTER_DEFINITION(Register, i19); -+REGISTER_DEFINITION(Register, i20); -+REGISTER_DEFINITION(Register, i21); -+REGISTER_DEFINITION(Register, i22); -+REGISTER_DEFINITION(Register, i23); -+REGISTER_DEFINITION(Register, i24); -+REGISTER_DEFINITION(Register, i25); -+REGISTER_DEFINITION(Register, i26); -+REGISTER_DEFINITION(Register, i27); -+REGISTER_DEFINITION(Register, i28); -+REGISTER_DEFINITION(Register, i29); -+REGISTER_DEFINITION(Register, i30); -+REGISTER_DEFINITION(Register, i31); ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} + -+REGISTER_DEFINITION(FloatRegister, fnoreg); -+REGISTER_DEFINITION(FloatRegister, f0); -+REGISTER_DEFINITION(FloatRegister, f1); -+REGISTER_DEFINITION(FloatRegister, f2); -+REGISTER_DEFINITION(FloatRegister, f3); -+REGISTER_DEFINITION(FloatRegister, f4); -+REGISTER_DEFINITION(FloatRegister, f5); -+REGISTER_DEFINITION(FloatRegister, f6); -+REGISTER_DEFINITION(FloatRegister, f7); -+REGISTER_DEFINITION(FloatRegister, f8); -+REGISTER_DEFINITION(FloatRegister, f9); -+REGISTER_DEFINITION(FloatRegister, f10); -+REGISTER_DEFINITION(FloatRegister, f11); -+REGISTER_DEFINITION(FloatRegister, f12); -+REGISTER_DEFINITION(FloatRegister, f13); -+REGISTER_DEFINITION(FloatRegister, f14); -+REGISTER_DEFINITION(FloatRegister, f15); -+REGISTER_DEFINITION(FloatRegister, f16); -+REGISTER_DEFINITION(FloatRegister, f17); -+REGISTER_DEFINITION(FloatRegister, f18); -+REGISTER_DEFINITION(FloatRegister, f19); -+REGISTER_DEFINITION(FloatRegister, f20); -+REGISTER_DEFINITION(FloatRegister, f21); -+REGISTER_DEFINITION(FloatRegister, f22); -+REGISTER_DEFINITION(FloatRegister, f23); -+REGISTER_DEFINITION(FloatRegister, f24); -+REGISTER_DEFINITION(FloatRegister, f25); -+REGISTER_DEFINITION(FloatRegister, f26); -+REGISTER_DEFINITION(FloatRegister, f27); -+REGISTER_DEFINITION(FloatRegister, f28); -+REGISTER_DEFINITION(FloatRegister, f29); -+REGISTER_DEFINITION(FloatRegister, f30); -+REGISTER_DEFINITION(FloatRegister, f31); -diff --git a/hotspot/src/cpu/mips/vm/register_mips.cpp b/hotspot/src/cpu/mips/vm/register_mips.cpp -new file mode 100644 -index 0000000000..4a9b22bfef ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/register_mips.cpp ++#endif // CPU_MIPS_VM_REGISTERMAP_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/register_mips.cpp b/hotspot/src/cpu/mips/vm/register_mips.cpp +--- a/hotspot/src/cpu/mips/vm/register_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/register_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -91053,11 +90692,9 @@ index 0000000000..4a9b22bfef + return is_valid() ? names[encoding()] : "fnoreg"; +} + -diff --git a/hotspot/src/cpu/mips/vm/register_mips.hpp b/hotspot/src/cpu/mips/vm/register_mips.hpp -new file mode 100644 -index 0000000000..88bf2d68cc ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/register_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/register_mips.hpp b/hotspot/src/cpu/mips/vm/register_mips.hpp +--- a/hotspot/src/cpu/mips/vm/register_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/register_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,346 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -91405,11 +91042,9 @@ index 0000000000..88bf2d68cc +}; + +#endif //CPU_MIPS_VM_REGISTER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp b/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp -new file mode 100644 -index 0000000000..cae43b2d96 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp b/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp +--- a/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/relocInfo_mips.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,156 @@ +/* + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. @@ -91567,11 +91202,9 @@ index 0000000000..cae43b2d96 + +void metadata_Relocation::pd_fix_value(address x) { +} -diff --git a/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp b/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp -new file mode 100644 -index 0000000000..04ad5dac96 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp b/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp +--- a/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/relocInfo_mips.hpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,40 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -91613,11 +91246,9 @@ index 0000000000..04ad5dac96 + }; + +#endif // CPU_MIPS_VM_RELOCINFO_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp b/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp -new file mode 100644 -index 0000000000..bb9269b423 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp b/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/runtime_mips_64.cpp 2023-12-20 09:23:19.798147877 +0800 @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -91825,11 +91456,9 @@ index 0000000000..bb9269b423 + + _exception_blob = ExceptionBlob::create(&buffer, oop_maps, framesize); +} -diff --git a/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp b/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp -new file mode 100644 -index 0000000000..daf04c4422 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp b/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/sharedRuntime_mips_64.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,3816 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -95647,11 +95276,9 @@ index 0000000000..daf04c4422 + + reverse_words(m, (unsigned long *)m_ints, longwords); +} -diff --git a/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp b/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp -new file mode 100644 -index 0000000000..aeb797faf9 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp b/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/stubGenerator_mips_64.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,2147 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -97800,11 +97427,9 @@ index 0000000000..aeb797faf9 +void StubGenerator_generate(CodeBuffer* code, bool all) { + StubGenerator g(code, all); +} -diff --git a/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp -new file mode 100644 -index 0000000000..733a48b889 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -97841,11 +97466,9 @@ index 0000000000..733a48b889 + +//find the last fp value +address StubRoutines::gs2::_call_stub_compiled_return = NULL; -diff --git a/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp -new file mode 100644 -index 0000000000..920c08844e ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp +--- a/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/stubRoutines_mips_64.hpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -97906,11 +97529,9 @@ index 0000000000..920c08844e +}; + +#endif // CPU_MIPS_VM_STUBROUTINES_MIPS_64_HPP -diff --git a/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp b/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp -new file mode 100644 -index 0000000000..a83c3728f8 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp b/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp +--- a/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/templateInterpreterGenerator_mips.hpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,35 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -97947,58 +97568,9 @@ index 0000000000..a83c3728f8 + // address generate_asm_interpreter_entry(bool synchronized); + +#endif // CPU_MIPS_VM_TEMPLATEINTERPRETERGENERATOR_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp b/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp -new file mode 100644 -index 0000000000..204f1b2f21 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_TEMPLATEINTERPRETER_MIPS_HPP -+#define CPU_MIPS_VM_TEMPLATEINTERPRETER_MIPS_HPP -+ -+ -+ protected: -+ -+ // Size of interpreter code. Increase if too small. Interpreter will -+ // fail with a guarantee ("not enough space for interpreter generation"); -+ // if too small. -+ // Run with +PrintInterpreter to get the VM to print out the size. -+ // Max size with JVMTI -+ // The sethi() instruction generates lots more instructions when shell -+ // stack limit is unlimited, so that's why this is much bigger. -+ const static int InterpreterCodeSize = 500 * K; -+ -+#endif // CPU_MIPS_VM_TEMPLATEINTERPRETER_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp b/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp -new file mode 100644 -index 0000000000..0cc5d33070 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp b/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/templateInterpreter_mips_64.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,2306 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -100306,15 +99878,13 @@ index 0000000000..0cc5d33070 +} +#endif // !PRODUCT +#endif // ! CC_INTERP -diff --git a/hotspot/src/cpu/mips/vm/templateTable_mips.hpp b/hotspot/src/cpu/mips/vm/templateTable_mips.hpp -new file mode 100644 -index 0000000000..d879e6dc92 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/templateTable_mips.hpp -@@ -0,0 +1,34 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp b/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp +--- a/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/templateInterpreter_mips.hpp 2023-12-20 09:23:19.801481172 +0800 +@@ -0,0 +1,41 @@ +/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -100337,20 +99907,25 @@ index 0000000000..d879e6dc92 + * + */ + -+ static void prepare_invoke(Register method, Register index, int byte_no, -+ Bytecodes::Code code); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ static void volatile_barrier(); ++#ifndef CPU_MIPS_VM_TEMPLATEINTERPRETER_MIPS_HPP ++#define CPU_MIPS_VM_TEMPLATEINTERPRETER_MIPS_HPP + -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); -diff --git a/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp b/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp -new file mode 100644 -index 0000000000..7415511b99 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp ++ ++ protected: ++ ++ // Size of interpreter code. Increase if too small. Interpreter will ++ // fail with a guarantee ("not enough space for interpreter generation"); ++ // if too small. ++ // Run with +PrintInterpreter to get the VM to print out the size. ++ // Max size with JVMTI ++ // The sethi() instruction generates lots more instructions when shell ++ // stack limit is unlimited, so that's why this is much bigger. ++ const static int InterpreterCodeSize = 500 * K; ++ ++#endif // CPU_MIPS_VM_TEMPLATEINTERPRETER_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp b/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/templateTable_mips_64.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,4623 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -104975,11 +104550,9 @@ index 0000000000..7415511b99 + __ sync(); +} +#endif // !CC_INTERP -diff --git a/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp b/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp -new file mode 100644 -index 0000000000..b63274a206 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp b/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp +--- a/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/templateTable_mips_64.hpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -105006,30 +104579,232 @@ index 0000000000..b63274a206 + * + */ + -+#ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -+#define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++#ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++#define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++ ++ static void prepare_invoke(int byte_no, ++ Register method, ++ Register index = noreg, ++ Register recv = noreg, ++ Register flags = noreg ++ ); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ //static void volatile_barrier(Assembler::Membar_mask_bits order_constraint); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); ++ ++#endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/templateTable_mips.hpp b/hotspot/src/cpu/mips/vm/templateTable_mips.hpp +--- a/hotspot/src/cpu/mips/vm/templateTable_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/templateTable_mips.hpp 2023-12-20 09:23:19.801481172 +0800 +@@ -0,0 +1,34 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++ static void prepare_invoke(Register method, Register index, int byte_no, ++ Bytecodes::Code code); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vmreg_mips.cpp b/hotspot/src/cpu/mips/vm/vmreg_mips.cpp +--- a/hotspot/src/cpu/mips/vm/vmreg_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vmreg_mips.cpp 2023-12-20 09:23:19.801481172 +0800 +@@ -0,0 +1,51 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ regName[i++] = reg->name(); ++ regName[i++] = reg->name(); ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ regName[i++] = freg->name(); ++ regName[i++] = freg->name(); ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vmreg_mips.hpp b/hotspot/src/cpu/mips/vm/vmreg_mips.hpp +--- a/hotspot/src/cpu/mips/vm/vmreg_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vmreg_mips.hpp 2023-12-20 09:23:19.801481172 +0800 +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_VMREG_MIPS_HPP ++#define CPU_MIPS_VM_VMREG_MIPS_HPP + -+ static void prepare_invoke(int byte_no, -+ Register method, -+ Register index = noreg, -+ Register recv = noreg, -+ Register flags = noreg -+ ); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ //static void volatile_barrier(Assembler::Membar_mask_bits order_constraint); -+ static void volatile_barrier(); ++bool is_Register(); ++Register as_Register(); + -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); ++bool is_FloatRegister(); ++FloatRegister as_FloatRegister(); + -+#endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -diff --git a/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp b/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp -new file mode 100644 -index 0000000000..6939914356 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp ++#endif // CPU_MIPS_VM_VMREG_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp b/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp +--- a/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp 2023-12-20 09:23:19.801481172 +0800 +@@ -0,0 +1,68 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP ++#define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP ++ ++inline VMReg RegisterImpl::as_VMReg() { ++ if( this==noreg ) return VMRegImpl::Bad(); ++ return VMRegImpl::as_VMReg(encoding() << 1 ); ++} ++ ++inline VMReg FloatRegisterImpl::as_VMReg() { ++ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); ++} ++ ++inline bool VMRegImpl::is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline bool VMRegImpl::is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline Register VMRegImpl::as_Register() { ++ ++ assert( is_Register(), "must be"); ++ // Yuk ++ return ::as_Register(value() >> 1); ++} ++ ++inline FloatRegister VMRegImpl::as_FloatRegister() { ++ assert( is_FloatRegister(), "must be" ); ++ // Yuk ++ assert( is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); ++} ++ ++inline bool VMRegImpl::is_concrete() { ++ assert(is_reg(), "must be"); ++ if(is_Register()) return true; ++ if(is_FloatRegister()) return true; ++ assert(false, "what register?"); ++ return false; ++} ++ ++#endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp b/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp +--- a/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vmStructs_mips.hpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. @@ -105099,11 +104874,9 @@ index 0000000000..6939914356 + /* be present there) */ + +#endif // CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp -new file mode 100644 -index 0000000000..a98f70d9ff ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp +--- a/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. @@ -105194,11 +104967,9 @@ index 0000000000..a98f70d9ff + strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); + return tmp; +} -diff --git a/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp -new file mode 100644 -index 0000000000..a240fcc2e9 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp +--- a/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vm_version_ext_mips.hpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. @@ -105254,11 +105025,9 @@ index 0000000000..a240fcc2e9 +}; + +#endif // CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/vm_version_mips.cpp b/hotspot/src/cpu/mips/vm/vm_version_mips.cpp -new file mode 100644 -index 0000000000..aef8f0746a ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vm_version_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vm_version_mips.cpp b/hotspot/src/cpu/mips/vm/vm_version_mips.cpp +--- a/hotspot/src/cpu/mips/vm/vm_version_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vm_version_mips.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,510 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -105770,11 +105539,9 @@ index 0000000000..aef8f0746a + + get_processor_features(); +} -diff --git a/hotspot/src/cpu/mips/vm/vm_version_mips.hpp b/hotspot/src/cpu/mips/vm/vm_version_mips.hpp -new file mode 100644 -index 0000000000..0de01e5f64 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vm_version_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vm_version_mips.hpp b/hotspot/src/cpu/mips/vm/vm_version_mips.hpp +--- a/hotspot/src/cpu/mips/vm/vm_version_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vm_version_mips.hpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,221 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -105997,183 +105764,9 @@ index 0000000000..0de01e5f64 +}; + +#endif // CPU_MIPS_VM_VM_VERSION_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/vmreg_mips.cpp b/hotspot/src/cpu/mips/vm/vmreg_mips.cpp -new file mode 100644 -index 0000000000..86bd74d430 ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vmreg_mips.cpp -@@ -0,0 +1,51 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" -+ -+ -+ -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ regName[i++] = reg->name(); -+ regName[i++] = reg->name(); -+ reg = reg->successor(); -+ } -+ -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ regName[i++] = freg->name(); -+ regName[i++] = freg->name(); -+ freg = freg->successor(); -+ } -+ -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -diff --git a/hotspot/src/cpu/mips/vm/vmreg_mips.hpp b/hotspot/src/cpu/mips/vm/vmreg_mips.hpp -new file mode 100644 -index 0000000000..6a970ea91a ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vmreg_mips.hpp -@@ -0,0 +1,35 @@ -+/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_VMREG_MIPS_HPP -+#define CPU_MIPS_VM_VMREG_MIPS_HPP -+ -+bool is_Register(); -+Register as_Register(); -+ -+bool is_FloatRegister(); -+FloatRegister as_FloatRegister(); -+ -+#endif // CPU_MIPS_VM_VMREG_MIPS_HPP -diff --git a/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp b/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp -new file mode 100644 -index 0000000000..77e18ce57d ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vmreg_mips.inline.hpp -@@ -0,0 +1,68 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -+#define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -+ -+inline VMReg RegisterImpl::as_VMReg() { -+ if( this==noreg ) return VMRegImpl::Bad(); -+ return VMRegImpl::as_VMReg(encoding() << 1 ); -+} -+ -+inline VMReg FloatRegisterImpl::as_VMReg() { -+ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); -+} -+ -+inline bool VMRegImpl::is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; -+} -+ -+inline bool VMRegImpl::is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; -+} -+ -+inline Register VMRegImpl::as_Register() { -+ -+ assert( is_Register(), "must be"); -+ // Yuk -+ return ::as_Register(value() >> 1); -+} -+ -+inline FloatRegister VMRegImpl::as_FloatRegister() { -+ assert( is_FloatRegister(), "must be" ); -+ // Yuk -+ assert( is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); -+} -+ -+inline bool VMRegImpl::is_concrete() { -+ assert(is_reg(), "must be"); -+ if(is_Register()) return true; -+ if(is_FloatRegister()) return true; -+ assert(false, "what register?"); -+ return false; -+} -+ -+#endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -diff --git a/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp b/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp -new file mode 100644 -index 0000000000..7779c58e0a ---- /dev/null -+++ b/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp b/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp +--- a/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/cpu/mips/vm/vtableStubs_mips_64.cpp 2023-12-20 09:23:19.801481172 +0800 @@ -0,0 +1,301 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. @@ -106476,11 +106069,10 @@ index 0000000000..7779c58e0a +int VtableStub::pd_code_alignment() { + return wordSize; +} -diff --git a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp -index c1c053e66c..5c90df1079 100644 ---- a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp -+++ b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp -@@ -1513,6 +1513,10 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp +--- a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp 2023-12-20 09:23:19.824814237 +0800 +@@ -1513,6 +1513,10 @@ } } @@ -106491,7 +106083,7 @@ index c1c053e66c..5c90df1079 100644 void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { LIR_Opr src = op->in_opr(); LIR_Opr dest = op->result_opr(); -@@ -2102,6 +2106,12 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L +@@ -2102,6 +2106,12 @@ } @@ -106504,11 +106096,10 @@ index c1c053e66c..5c90df1079 100644 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff --git a/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp b/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp -index 92b73e1c71..45da327efb 100644 ---- a/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp -+++ b/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp -@@ -242,20 +242,27 @@ void LIRGenerator::increment_counter(LIR_Address* addr, int step) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp b/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp +--- a/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp 2023-12-20 09:23:19.824814237 +0800 +@@ -242,20 +242,27 @@ __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); } @@ -106543,10 +106134,9 @@ index 92b73e1c71..45da327efb 100644 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { if (tmp->is_valid() && c > 0 && c < max_jint) { -diff --git a/hotspot/src/os/linux/vm/os_linux.cpp b/hotspot/src/os/linux/vm/os_linux.cpp -index ba1bce4239..42a73ea5aa 100644 ---- a/hotspot/src/os/linux/vm/os_linux.cpp -+++ b/hotspot/src/os/linux/vm/os_linux.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os/linux/vm/os_linux.cpp b/hotspot/src/os/linux/vm/os_linux.cpp +--- a/hotspot/src/os/linux/vm/os_linux.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/os/linux/vm/os_linux.cpp 2023-12-20 09:23:19.851480600 +0800 @@ -22,6 +22,12 @@ * */ @@ -106560,7 +106150,7 @@ index ba1bce4239..42a73ea5aa 100644 // no precompiled headers #include "classfile/classLoader.hpp" #include "classfile/systemDictionary.hpp" -@@ -1969,7 +1975,11 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) +@@ -1969,7 +1975,11 @@ {EM_ALPHA, EM_ALPHA, ELFCLASS64, ELFDATA2LSB, (char*)"Alpha"}, {EM_MIPS_RS3_LE, EM_MIPS_RS3_LE, ELFCLASS32, ELFDATA2LSB, (char*)"MIPSel"}, {EM_MIPS, EM_MIPS, ELFCLASS32, ELFDATA2MSB, (char*)"MIPS"}, @@ -106572,7 +106162,7 @@ index ba1bce4239..42a73ea5aa 100644 {EM_68K, EM_68K, ELFCLASS32, ELFDATA2MSB, (char*)"M68k"}, {EM_AARCH64, EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"}, }; -@@ -1984,6 +1994,8 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) +@@ -1984,6 +1994,8 @@ static Elf32_Half running_arch_code=EM_SPARCV9; #elif (defined __sparc) && (!defined _LP64) static Elf32_Half running_arch_code=EM_SPARC; @@ -106581,7 +106171,7 @@ index ba1bce4239..42a73ea5aa 100644 #elif (defined __powerpc64__) static Elf32_Half running_arch_code=EM_PPC64; #elif (defined __powerpc__) -@@ -2004,9 +2016,11 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) +@@ -2004,9 +2016,11 @@ static Elf32_Half running_arch_code=EM_68K; #elif (defined AARCH64) static Elf32_Half running_arch_code=EM_AARCH64; @@ -106594,7 +106184,7 @@ index ba1bce4239..42a73ea5aa 100644 #endif // Identify compatability class for VM's architecture and library's architecture -@@ -3513,7 +3527,7 @@ size_t os::Linux::find_large_page_size() { +@@ -3513,7 +3527,7 @@ #ifndef ZERO large_page_size = IA32_ONLY(4 * M) AMD64_ONLY(2 * M) IA64_ONLY(256 * M) SPARC_ONLY(4 * M) @@ -106603,7 +106193,7 @@ index ba1bce4239..42a73ea5aa 100644 #endif // ZERO FILE *fp = fopen("/proc/meminfo", "r"); -@@ -5120,7 +5134,12 @@ jint os::init_2(void) +@@ -5120,7 +5134,12 @@ Linux::fast_thread_clock_init(); // Allocate a single page and mark it as readable for safepoint polling @@ -106616,7 +106206,7 @@ index ba1bce4239..42a73ea5aa 100644 guarantee( polling_page != MAP_FAILED, "os::init_2: failed to allocate polling page" ); os::set_polling_page( polling_page ); -@@ -5155,13 +5174,20 @@ jint os::init_2(void) +@@ -5155,13 +5174,20 @@ // size. Add a page for compiler2 recursion in main thread. // Add in 2*BytesPerWord times page size to account for VM stack during // class initialization depending on 32 or 64 bit VM. @@ -106638,10 +106228,9 @@ index ba1bce4239..42a73ea5aa 100644 tty->print_cr("\nThe stack size specified is too small, " "Specify at least %dk", os::Linux::min_stack_allowed/ K); -diff --git a/hotspot/src/os/linux/vm/os_perf_linux.cpp b/hotspot/src/os/linux/vm/os_perf_linux.cpp -index 0d1f75810a..cbc6c0757c 100644 ---- a/hotspot/src/os/linux/vm/os_perf_linux.cpp -+++ b/hotspot/src/os/linux/vm/os_perf_linux.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os/linux/vm/os_perf_linux.cpp b/hotspot/src/os/linux/vm/os_perf_linux.cpp +--- a/hotspot/src/os/linux/vm/os_perf_linux.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/os/linux/vm/os_perf_linux.cpp 2023-12-20 09:23:19.851480600 +0800 @@ -50,6 +50,12 @@ #ifdef TARGET_ARCH_ppc # include "vm_version_ext_ppc.hpp" @@ -106655,11 +106244,9 @@ index 0d1f75810a..cbc6c0757c 100644 #include #include -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp -new file mode 100644 -index 0000000000..5ee0965f42 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/assembler_linux_loongarch.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,92 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -106753,15 +106340,13 @@ index 0000000000..5ee0965f42 + } +#endif // MINIMIZE_RAM_USAGE +} -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp -new file mode 100644 -index 0000000000..7944618037 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/atomic_linux_loongarch.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,206 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2020, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -106910,7 +106495,7 @@ index 0000000000..7944618037 + " sc.w %[__cmp], %[__dest] \n\t" + " beqz %[__cmp], 1b \n\t" + "2: \n\t" -+ " dbar 0 \n\t" ++ " dbar 0x700 \n\t" + + : [__prev] "=&r" (__prev), [__cmp] "=&r" (__cmp) + : [__dest] "ZC" (*(volatile jint*)dest), [__old] "r" (compare_value), [__new] "r" (exchange_value) @@ -106931,7 +106516,7 @@ index 0000000000..7944618037 + " sc.d %[__cmp], %[__dest] \n\t" + " beqz %[__cmp], 1b \n\t" + "2: \n\t" -+ " dbar 0 \n\t" ++ " dbar 0x700 \n\t" + + : [__prev] "=&r" (__prev), [__cmp] "=&r" (__cmp) + : [__dest] "ZC" (*(volatile jlong*)dest), [__old] "r" (compare_value), [__new] "r" (exchange_value) @@ -106950,7 +106535,7 @@ index 0000000000..7944618037 + " sc.d %[__cmp], %[__dest] \n\t" + " beqz %[__cmp], 1b \n\t" + "2: \n\t" -+ " dbar 0 \n\t" ++ " dbar 0x700 \n\t" + + : [__prev] "=&r" (__prev), [__cmp] "=&r" (__cmp) + : [__dest] "ZC" (*(volatile intptr_t*)dest), [__old] "r" (compare_value), [__new] "r" (exchange_value) @@ -106965,11 +106550,9 @@ index 0000000000..7944618037 +} + +#endif // OS_CPU_LINUX_LOONGARCH_VM_ATOMIC_LINUX_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp -new file mode 100644 -index 0000000000..4e205c468e ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/bytes_linux_loongarch.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -107008,11 +106591,9 @@ index 0000000000..4e205c468e +inline u8 Bytes::swap_u8(u8 x) { return bswap_64(x); } + +#endif // OS_CPU_LINUX_LOONGARCH_VM_BYTES_LINUX_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp -new file mode 100644 -index 0000000000..7d6e11a935 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/copy_linux_loongarch.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -107139,11 +106720,9 @@ index 0000000000..7d6e11a935 +} + +#endif // OS_CPU_LINUX_LOONGARCH_VM_COPY_LINUX_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp -new file mode 100644 -index 0000000000..8ec3fa8239 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/globals_linux_loongarch.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -107188,11 +106767,9 @@ index 0000000000..8ec3fa8239 +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_LOONGARCH_VM_GLOBALS_LINUX_LOONGARCH_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp -new file mode 100644 -index 0000000000..0e1331ac90 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/orderAccess_linux_loongarch.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -107227,19 +106804,19 @@ index 0000000000..0e1331ac90 +#include "runtime/os.hpp" +#include "vm_version_loongarch.hpp" + -+#define inlasm_sync() if (os::is_ActiveCoresMP()) \ ++#define inlasm_sync(v) if (os::is_ActiveCoresMP()) \ + __asm__ __volatile__ ("nop" : : : "memory"); \ + else \ -+ __asm__ __volatile__ ("dbar 0" : : : "memory"); ++ __asm__ __volatile__ ("dbar %0" : :"K"(v) : "memory"); + -+inline void OrderAccess::loadload() { inlasm_sync(); } -+inline void OrderAccess::storestore() { inlasm_sync(); } -+inline void OrderAccess::loadstore() { inlasm_sync(); } -+inline void OrderAccess::storeload() { inlasm_sync(); } ++inline void OrderAccess::loadload() { inlasm_sync(0x15); } ++inline void OrderAccess::storestore() { inlasm_sync(0x1a); } ++inline void OrderAccess::loadstore() { inlasm_sync(0x16); } ++inline void OrderAccess::storeload() { inlasm_sync(0x19); } + -+inline void OrderAccess::acquire() { inlasm_sync(); } -+inline void OrderAccess::release() { inlasm_sync(); } -+inline void OrderAccess::fence() { inlasm_sync(); } ++inline void OrderAccess::acquire() { inlasm_sync(0x14); } ++inline void OrderAccess::release() { inlasm_sync(0x12); } ++inline void OrderAccess::fence() { inlasm_sync(0x10); } + +//implementation of load_acquire +inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { jbyte data = *p; acquire(); return data; } @@ -107309,11 +106886,9 @@ index 0000000000..0e1331ac90 +#undef inlasm_sync + +#endif // OS_CPU_LINUX_LOONGARCH_VM_ORDERACCESS_LINUX_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp -new file mode 100644 -index 0000000000..f2c3df84a1 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,750 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. @@ -108065,11 +107640,9 @@ index 0000000000..f2c3df84a1 +bool os::is_ActiveCoresMP() { + return UseActiveCoresMP && _initial_active_processor_count == 1; +} -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp -new file mode 100644 -index 0000000000..a7321ae025 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/os_linux_loongarch.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,39 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -108110,11 +107683,9 @@ index 0000000000..a7321ae025 + static bool is_ActiveCoresMP(); + +#endif // OS_CPU_LINUX_LOONGARCH_VM_OS_LINUX_LOONGARCH_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp -new file mode 100644 -index 0000000000..a1cedcd8cf ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/prefetch_linux_loongarch.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -108172,168 +107743,9 @@ index 0000000000..a1cedcd8cf +} + +#endif // OS_CPU_LINUX_LOONGARCH_VM_PREFETCH_LINUX_LOONGARCH_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp -new file mode 100644 -index 0000000000..be28a562a1 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp -@@ -0,0 +1,84 @@ -+/* -+ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "runtime/thread.inline.hpp" -+#include "runtime/threadLocalStorage.hpp" -+ -+// Map stack pointer (%esp) to thread pointer for faster TLS access -+// -+// Here we use a flat table for better performance. Getting current thread -+// is down to one memory access (read _sp_map[%esp>>12]) in generated code -+// and two in runtime code (-fPIC code needs an extra load for _sp_map). -+// -+// This code assumes stack page is not shared by different threads. It works -+// in 32-bit VM when page size is 4K (or a multiple of 4K, if that matters). -+// -+// Notice that _sp_map is allocated in the bss segment, which is ZFOD -+// (zero-fill-on-demand). While it reserves 4M address space upfront, -+// actual memory pages are committed on demand. -+// -+// If an application creates and destroys a lot of threads, usually the -+// stack space freed by a thread will soon get reused by new thread -+// (this is especially true in NPTL or LinuxThreads in fixed-stack mode). -+// No memory page in _sp_map is wasted. -+// -+// However, it's still possible that we might end up populating & -+// committing a large fraction of the 4M table over time, but the actual -+// amount of live data in the table could be quite small. The max wastage -+// is less than 4M bytes. If it becomes an issue, we could use madvise() -+// with MADV_DONTNEED to reclaim unused (i.e. all-zero) pages in _sp_map. -+// MADV_DONTNEED on Linux keeps the virtual memory mapping, but zaps the -+// physical memory page (i.e. similar to MADV_FREE on Solaris). -+ -+#ifdef MINIMIZE_RAM_USAGE -+Thread* ThreadLocalStorage::_sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; -+#endif // MINIMIZE_RAM_USAGE -+ -+void ThreadLocalStorage::generate_code_for_get_thread() { -+ // nothing we can do here for user-level thread -+} -+ -+void ThreadLocalStorage::pd_init() { -+#ifdef MINIMIZE_RAM_USAGE -+ assert(align_size_down(os::vm_page_size(), PAGE_SIZE) == os::vm_page_size(), -+ "page size must be multiple of PAGE_SIZE"); -+#endif // MINIMIZE_RAM_USAGE -+} -+ -+void ThreadLocalStorage::pd_set_thread(Thread* thread) { -+ os::thread_local_storage_at_put(ThreadLocalStorage::thread_index(), thread); -+#ifdef MINIMIZE_RAM_USAGE -+ address stack_top = os::current_stack_base(); -+ size_t stack_size = os::current_stack_size(); -+ -+ for (address p = stack_top - stack_size; p < stack_top; p += PAGE_SIZE) { -+ int index = ((uintptr_t)p >> PAGE_SHIFT) & ((1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1); -+ assert(thread == NULL || _sp_map[index] == NULL || thread == _sp_map[index], -+ "thread exited without detaching from VM??"); -+ _sp_map[index] = thread; -+ } -+#endif // MINIMIZE_RAM_USAGE -+} -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp -new file mode 100644 -index 0000000000..4fab788a75 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp -@@ -0,0 +1,61 @@ -+/* -+ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef OS_CPU_LINUX_LOONGARCH_VM_THREADLS_LINUX_LOONGARCH_HPP -+#define OS_CPU_LINUX_LOONGARCH_VM_THREADLS_LINUX_LOONGARCH_HPP -+ -+#ifdef MINIMIZE_RAM_USAGE -+ // Processor dependent parts of ThreadLocalStorage -+ //only the low 2G space for user program in Linux -+ -+ #define SP_BITLENGTH 34 -+ #define PAGE_SHIFT 14 -+ #define PAGE_SIZE (1UL << PAGE_SHIFT) -+ -+ static Thread* _sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; -+ static int _sp_map_low; -+ static int _sp_map_high; -+#endif // MINIMIZE_RAM_USAGE -+ -+public: -+#ifdef MINIMIZE_RAM_USAGE -+ static Thread** sp_map_addr() { return _sp_map; } -+#endif // MINIMIZE_RAM_USAGE -+ -+ static Thread* thread() { -+#ifdef MINIMIZE_RAM_USAGE -+ /* Thread::thread() can also be optimized in the same way as __get_thread() */ -+ //return (Thread*) os::thread_local_storage_at(thread_index()); -+ uintptr_t sp; -+ uintptr_t mask = (1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1; -+ -+ __asm__ __volatile__ ("addi.d %0, $r29, 0 " : "=r" (sp)); -+ -+ return _sp_map[(sp >> PAGE_SHIFT) & mask]; -+#else -+ return (Thread*) os::thread_local_storage_at(thread_index()); -+#endif // MINIMIZE_RAM_USAGE -+ } -+#endif // OS_CPU_LINUX_LOONGARCH_VM_THREADLS_LINUX_LOONGARCH_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp -new file mode 100644 -index 0000000000..44f666d61f ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -108434,11 +107846,9 @@ index 0000000000..44f666d61f + +void JavaThread::cache_global_variables() { } + -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp -new file mode 100644 -index 0000000000..d6dd2521f4 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/thread_linux_loongarch.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -108515,11 +107925,162 @@ index 0000000000..d6dd2521f4 + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_LOONGARCH_VM_THREAD_LINUX_LOONGARCH_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp -new file mode 100644 -index 0000000000..0097cadcb7 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.cpp 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,84 @@ ++/* ++ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "runtime/thread.inline.hpp" ++#include "runtime/threadLocalStorage.hpp" ++ ++// Map stack pointer (%esp) to thread pointer for faster TLS access ++// ++// Here we use a flat table for better performance. Getting current thread ++// is down to one memory access (read _sp_map[%esp>>12]) in generated code ++// and two in runtime code (-fPIC code needs an extra load for _sp_map). ++// ++// This code assumes stack page is not shared by different threads. It works ++// in 32-bit VM when page size is 4K (or a multiple of 4K, if that matters). ++// ++// Notice that _sp_map is allocated in the bss segment, which is ZFOD ++// (zero-fill-on-demand). While it reserves 4M address space upfront, ++// actual memory pages are committed on demand. ++// ++// If an application creates and destroys a lot of threads, usually the ++// stack space freed by a thread will soon get reused by new thread ++// (this is especially true in NPTL or LinuxThreads in fixed-stack mode). ++// No memory page in _sp_map is wasted. ++// ++// However, it's still possible that we might end up populating & ++// committing a large fraction of the 4M table over time, but the actual ++// amount of live data in the table could be quite small. The max wastage ++// is less than 4M bytes. If it becomes an issue, we could use madvise() ++// with MADV_DONTNEED to reclaim unused (i.e. all-zero) pages in _sp_map. ++// MADV_DONTNEED on Linux keeps the virtual memory mapping, but zaps the ++// physical memory page (i.e. similar to MADV_FREE on Solaris). ++ ++#ifdef MINIMIZE_RAM_USAGE ++Thread* ThreadLocalStorage::_sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; ++#endif // MINIMIZE_RAM_USAGE ++ ++void ThreadLocalStorage::generate_code_for_get_thread() { ++ // nothing we can do here for user-level thread ++} ++ ++void ThreadLocalStorage::pd_init() { ++#ifdef MINIMIZE_RAM_USAGE ++ assert(align_size_down(os::vm_page_size(), PAGE_SIZE) == os::vm_page_size(), ++ "page size must be multiple of PAGE_SIZE"); ++#endif // MINIMIZE_RAM_USAGE ++} ++ ++void ThreadLocalStorage::pd_set_thread(Thread* thread) { ++ os::thread_local_storage_at_put(ThreadLocalStorage::thread_index(), thread); ++#ifdef MINIMIZE_RAM_USAGE ++ address stack_top = os::current_stack_base(); ++ size_t stack_size = os::current_stack_size(); ++ ++ for (address p = stack_top - stack_size; p < stack_top; p += PAGE_SIZE) { ++ int index = ((uintptr_t)p >> PAGE_SHIFT) & ((1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1); ++ assert(thread == NULL || _sp_map[index] == NULL || thread == _sp_map[index], ++ "thread exited without detaching from VM??"); ++ _sp_map[index] = thread; ++ } ++#endif // MINIMIZE_RAM_USAGE ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/threadLS_linux_loongarch.hpp 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,61 @@ ++/* ++ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef OS_CPU_LINUX_LOONGARCH_VM_THREADLS_LINUX_LOONGARCH_HPP ++#define OS_CPU_LINUX_LOONGARCH_VM_THREADLS_LINUX_LOONGARCH_HPP ++ ++#ifdef MINIMIZE_RAM_USAGE ++ // Processor dependent parts of ThreadLocalStorage ++ //only the low 2G space for user program in Linux ++ ++ #define SP_BITLENGTH 34 ++ #define PAGE_SHIFT 14 ++ #define PAGE_SIZE (1UL << PAGE_SHIFT) ++ ++ static Thread* _sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; ++ static int _sp_map_low; ++ static int _sp_map_high; ++#endif // MINIMIZE_RAM_USAGE ++ ++public: ++#ifdef MINIMIZE_RAM_USAGE ++ static Thread** sp_map_addr() { return _sp_map; } ++#endif // MINIMIZE_RAM_USAGE ++ ++ static Thread* thread() { ++#ifdef MINIMIZE_RAM_USAGE ++ /* Thread::thread() can also be optimized in the same way as __get_thread() */ ++ //return (Thread*) os::thread_local_storage_at(thread_index()); ++ uintptr_t sp; ++ uintptr_t mask = (1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1; ++ ++ __asm__ __volatile__ ("addi.d %0, $r29, 0 " : "=r" (sp)); ++ ++ return _sp_map[(sp >> PAGE_SHIFT) & mask]; ++#else ++ return (Thread*) os::thread_local_storage_at(thread_index()); ++#endif // MINIMIZE_RAM_USAGE ++ } ++#endif // OS_CPU_LINUX_LOONGARCH_VM_THREADLS_LINUX_LOONGARCH_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp b/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/vmStructs_linux_loongarch.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -108576,11 +108137,9 @@ index 0000000000..0097cadcb7 +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_LOONGARCH_VM_VMSTRUCTS_LINUX_LOONGARCH_HPP -diff --git a/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp -new file mode 100644 -index 0000000000..80a1538de9 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp b/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp +--- a/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_loongarch/vm/vm_version_linux_loongarch.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. @@ -108611,11 +108170,9 @@ index 0000000000..80a1538de9 +#include "runtime/os.hpp" +#include "vm_version_loongarch.hpp" + -diff --git a/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp -new file mode 100644 -index 0000000000..4ba53d9341 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp +--- a/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/assembler_linux_mips.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,111 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -108728,11 +108285,9 @@ index 0000000000..4ba53d9341 + } +#endif // MINIMIZE_RAM_USAGE +} -diff --git a/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp -new file mode 100644 -index 0000000000..1c7ad605e9 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/atomic_linux_mips.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,258 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -108992,11 +108547,9 @@ index 0000000000..1c7ad605e9 +} + +#endif // OS_CPU_LINUX_MIPS_VM_ATOMIC_LINUX_MIPS_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp -new file mode 100644 -index 0000000000..5b5cd10aa5 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/bytes_linux_mips.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -109035,11 +108588,9 @@ index 0000000000..5b5cd10aa5 +inline u8 Bytes::swap_u8(u8 x) { return bswap_64(x); } + +#endif // OS_CPU_LINUX_MIPS_VM_BYTES_LINUX_MIPS_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp -new file mode 100644 -index 0000000000..73ac34501b ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/copy_linux_mips.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -109166,11 +108717,9 @@ index 0000000000..73ac34501b +} + +#endif // OS_CPU_LINUX_MIPS_VM_COPY_LINUX_MIPS_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp -new file mode 100644 -index 0000000000..f1599ac5f1 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/globals_linux_mips.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -109223,11 +108772,63 @@ index 0000000000..f1599ac5f1 +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_MIPS_VM_GLOBALS_LINUX_MIPS_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad -new file mode 100644 -index 0000000000..5e38996ffa ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad b/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad +--- a/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,50 @@ ++// ++// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ ++// AMD64 Linux Architecture Description File ++ ++//----------OS-DEPENDENT ENCODING BLOCK---------------------------------------- ++// This block specifies the encoding classes used by the compiler to ++// output byte streams. Encoding classes generate functions which are ++// called by Machine Instruction Nodes in order to generate the bit ++// encoding of the instruction. Operands specify their base encoding ++// interface with the interface keyword. There are currently ++// supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, & ++// COND_INTER. REG_INTER causes an operand to generate a function ++// which returns its register number when queried. CONST_INTER causes ++// an operand to generate a function which returns the value of the ++// constant when queried. MEMORY_INTER causes an operand to generate ++// four functions which return the Base Register, the Index Register, ++// the Scale Value, and the Offset Value of the operand when queried. ++// COND_INTER causes an operand to generate six functions which return ++// the encoding code (ie - encoding bits for the instruction) ++// associated with each basic boolean condition for a conditional ++// instruction. Instructions specify two basic values for encoding. ++// They use the ins_encode keyword to specify their encoding class ++// (which must be one of the class names specified in the encoding ++// block), and they use the opcode keyword to specify, in order, their ++// primary, secondary, and tertiary opcode. Only the opcode sections ++// which a particular instruction needs for encoding need to be ++// specified. +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad +--- a/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.ad 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,153 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -109382,11 +108983,9 @@ index 0000000000..5e38996ffa +} + +%} -diff --git a/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s -new file mode 100644 -index 0000000000..f87fbf265d ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s +--- a/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/linux_mips.s 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,25 @@ +# +# Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved. @@ -109413,67 +109012,9 @@ index 0000000000..f87fbf265d +# + + -diff --git a/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad b/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad -new file mode 100644 -index 0000000000..ca4d094738 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/linux_mips_64.ad -@@ -0,0 +1,50 @@ -+// -+// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -+// AMD64 Linux Architecture Description File -+ -+//----------OS-DEPENDENT ENCODING BLOCK---------------------------------------- -+// This block specifies the encoding classes used by the compiler to -+// output byte streams. Encoding classes generate functions which are -+// called by Machine Instruction Nodes in order to generate the bit -+// encoding of the instruction. Operands specify their base encoding -+// interface with the interface keyword. There are currently -+// supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, & -+// COND_INTER. REG_INTER causes an operand to generate a function -+// which returns its register number when queried. CONST_INTER causes -+// an operand to generate a function which returns the value of the -+// constant when queried. MEMORY_INTER causes an operand to generate -+// four functions which return the Base Register, the Index Register, -+// the Scale Value, and the Offset Value of the operand when queried. -+// COND_INTER causes an operand to generate six functions which return -+// the encoding code (ie - encoding bits for the instruction) -+// associated with each basic boolean condition for a conditional -+// instruction. Instructions specify two basic values for encoding. -+// They use the ins_encode keyword to specify their encoding class -+// (which must be one of the class names specified in the encoding -+// block), and they use the opcode keyword to specify, in order, their -+// primary, secondary, and tertiary opcode. Only the opcode sections -+// which a particular instruction needs for encoding need to be -+// specified. -diff --git a/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp -new file mode 100644 -index 0000000000..c9bc169aa5 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/orderAccess_linux_mips.inline.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -109590,11 +109131,9 @@ index 0000000000..c9bc169aa5 +#undef inlasm_sync + +#endif // OS_CPU_LINUX_MIPS_VM_ORDERACCESS_LINUX_MIPS_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp -new file mode 100644 -index 0000000000..43487dab98 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp +--- a/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,1015 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. @@ -110604,220 +110143,19 @@ index 0000000000..43487dab98 + +#ifndef PRODUCT +void os::verify_stack_alignment() { -+ assert(((intptr_t)os::current_stack_pointer() & (StackAlignmentInBytes-1)) == 0, "incorrect stack alignment"); -+} -+#endif -+ -+bool os::is_ActiveCoresMP() { -+ return UseActiveCoresMP && _initial_active_processor_count == 1; -+} -diff --git a/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp -new file mode 100644 -index 0000000000..c07d08156f ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp -@@ -0,0 +1,39 @@ -+/* -+ * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP -+#define OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP -+ -+ static void setup_fpu(); -+ static bool is_allocatable(size_t bytes); -+ static intptr_t *get_previous_fp(); -+ -+ // Used to register dynamic code cache area with the OS -+ // Note: Currently only used in 64 bit Windows implementations -+ static bool register_code_area(char *low, char *high) { return true; } -+ -+ static bool is_ActiveCoresMP(); -+ -+#endif // OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp -new file mode 100644 -index 0000000000..93490345f0 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP -+#define OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP -+ -+ -+inline void Prefetch::read (void *loc, intx interval) { -+ // 'pref' is implemented as NOP in Loongson 3A -+ __asm__ __volatile__ ( -+ " .set push\n" -+ " .set mips32\n" -+ " .set noreorder\n" -+ " pref 0, 0(%[__loc]) \n" -+ " .set pop\n" -+ : [__loc] "=&r"(loc) -+ : -+ : "memory" -+ ); -+} -+ -+inline void Prefetch::write(void *loc, intx interval) { -+ __asm__ __volatile__ ( -+ " .set push\n" -+ " .set mips32\n" -+ " .set noreorder\n" -+ " pref 1, 0(%[__loc]) \n" -+ " .set pop\n" -+ : [__loc] "=&r"(loc) -+ : -+ : "memory" -+ ); -+ -+} -+ -+#endif // OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp -new file mode 100644 -index 0000000000..be28a562a1 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp -@@ -0,0 +1,84 @@ -+/* -+ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "runtime/thread.inline.hpp" -+#include "runtime/threadLocalStorage.hpp" -+ -+// Map stack pointer (%esp) to thread pointer for faster TLS access -+// -+// Here we use a flat table for better performance. Getting current thread -+// is down to one memory access (read _sp_map[%esp>>12]) in generated code -+// and two in runtime code (-fPIC code needs an extra load for _sp_map). -+// -+// This code assumes stack page is not shared by different threads. It works -+// in 32-bit VM when page size is 4K (or a multiple of 4K, if that matters). -+// -+// Notice that _sp_map is allocated in the bss segment, which is ZFOD -+// (zero-fill-on-demand). While it reserves 4M address space upfront, -+// actual memory pages are committed on demand. -+// -+// If an application creates and destroys a lot of threads, usually the -+// stack space freed by a thread will soon get reused by new thread -+// (this is especially true in NPTL or LinuxThreads in fixed-stack mode). -+// No memory page in _sp_map is wasted. -+// -+// However, it's still possible that we might end up populating & -+// committing a large fraction of the 4M table over time, but the actual -+// amount of live data in the table could be quite small. The max wastage -+// is less than 4M bytes. If it becomes an issue, we could use madvise() -+// with MADV_DONTNEED to reclaim unused (i.e. all-zero) pages in _sp_map. -+// MADV_DONTNEED on Linux keeps the virtual memory mapping, but zaps the -+// physical memory page (i.e. similar to MADV_FREE on Solaris). -+ -+#ifdef MINIMIZE_RAM_USAGE -+Thread* ThreadLocalStorage::_sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; -+#endif // MINIMIZE_RAM_USAGE -+ -+void ThreadLocalStorage::generate_code_for_get_thread() { -+ // nothing we can do here for user-level thread -+} -+ -+void ThreadLocalStorage::pd_init() { -+#ifdef MINIMIZE_RAM_USAGE -+ assert(align_size_down(os::vm_page_size(), PAGE_SIZE) == os::vm_page_size(), -+ "page size must be multiple of PAGE_SIZE"); -+#endif // MINIMIZE_RAM_USAGE -+} -+ -+void ThreadLocalStorage::pd_set_thread(Thread* thread) { -+ os::thread_local_storage_at_put(ThreadLocalStorage::thread_index(), thread); -+#ifdef MINIMIZE_RAM_USAGE -+ address stack_top = os::current_stack_base(); -+ size_t stack_size = os::current_stack_size(); ++ assert(((intptr_t)os::current_stack_pointer() & (StackAlignmentInBytes-1)) == 0, "incorrect stack alignment"); ++} ++#endif + -+ for (address p = stack_top - stack_size; p < stack_top; p += PAGE_SIZE) { -+ int index = ((uintptr_t)p >> PAGE_SHIFT) & ((1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1); -+ assert(thread == NULL || _sp_map[index] == NULL || thread == _sp_map[index], -+ "thread exited without detaching from VM??"); -+ _sp_map[index] = thread; -+ } -+#endif // MINIMIZE_RAM_USAGE ++bool os::is_ActiveCoresMP() { ++ return UseActiveCoresMP && _initial_active_processor_count == 1; +} -diff --git a/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp -new file mode 100644 -index 0000000000..e595195e21 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp -@@ -0,0 +1,61 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/os_linux_mips.hpp 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,39 @@ +/* -+ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -110841,47 +110179,85 @@ index 0000000000..e595195e21 + * + */ + -+#ifndef OS_CPU_LINUX_MIPS_VM_THREADLS_LINUX_MIPS_HPP -+#define OS_CPU_LINUX_MIPS_VM_THREADLS_LINUX_MIPS_HPP ++#ifndef OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP ++#define OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP + -+#ifdef MINIMIZE_RAM_USAGE -+ // Processor dependent parts of ThreadLocalStorage -+ //only the low 2G space for user program in Linux ++ static void setup_fpu(); ++ static bool is_allocatable(size_t bytes); ++ static intptr_t *get_previous_fp(); + -+ #define SP_BITLENGTH 34 -+ #define PAGE_SHIFT 14 -+ #define PAGE_SIZE (1UL << PAGE_SHIFT) ++ // Used to register dynamic code cache area with the OS ++ // Note: Currently only used in 64 bit Windows implementations ++ static bool register_code_area(char *low, char *high) { return true; } + -+ static Thread* _sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; -+ static int _sp_map_low; -+ static int _sp_map_high; -+#endif // MINIMIZE_RAM_USAGE ++ static bool is_ActiveCoresMP(); + -+public: -+#ifdef MINIMIZE_RAM_USAGE -+ static Thread** sp_map_addr() { return _sp_map; } -+#endif // MINIMIZE_RAM_USAGE ++#endif // OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp b/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/prefetch_linux_mips.inline.hpp 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ + -+ static Thread* thread() { -+#ifdef MINIMIZE_RAM_USAGE -+ /* Thread::thread() can also be optimized in the same way as __get_thread() */ -+ //return (Thread*) os::thread_local_storage_at(thread_index()); -+ uintptr_t sp; -+ uintptr_t mask = (1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1; ++#ifndef OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP ++#define OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP + -+ __asm__ __volatile__ ("daddiu %0, $29, 0 " : "=r" (sp)); + -+ return _sp_map[(sp >> PAGE_SHIFT) & mask]; -+#else -+ return (Thread*) os::thread_local_storage_at(thread_index()); -+#endif // MINIMIZE_RAM_USAGE -+ } -+#endif // OS_CPU_LINUX_MIPS_VM_THREADLS_LINUX_MIPS_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp -new file mode 100644 -index 0000000000..44f666d61f ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp ++inline void Prefetch::read (void *loc, intx interval) { ++ // 'pref' is implemented as NOP in Loongson 3A ++ __asm__ __volatile__ ( ++ " .set push\n" ++ " .set mips32\n" ++ " .set noreorder\n" ++ " pref 0, 0(%[__loc]) \n" ++ " .set pop\n" ++ : [__loc] "=&r"(loc) ++ : ++ : "memory" ++ ); ++} ++ ++inline void Prefetch::write(void *loc, intx interval) { ++ __asm__ __volatile__ ( ++ " .set push\n" ++ " .set mips32\n" ++ " .set noreorder\n" ++ " pref 1, 0(%[__loc]) \n" ++ " .set pop\n" ++ : [__loc] "=&r"(loc) ++ : ++ : "memory" ++ ); ++ ++} ++ ++#endif // OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp +--- a/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -110982,11 +110358,9 @@ index 0000000000..44f666d61f + +void JavaThread::cache_global_variables() { } + -diff --git a/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp -new file mode 100644 -index 0000000000..cb11c36ae5 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/thread_linux_mips.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -111063,11 +110437,162 @@ index 0000000000..cb11c36ae5 + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_MIPS_VM_THREAD_LINUX_MIPS_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp -new file mode 100644 -index 0000000000..b7454bf045 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp +--- a/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.cpp 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,84 @@ ++/* ++ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "runtime/thread.inline.hpp" ++#include "runtime/threadLocalStorage.hpp" ++ ++// Map stack pointer (%esp) to thread pointer for faster TLS access ++// ++// Here we use a flat table for better performance. Getting current thread ++// is down to one memory access (read _sp_map[%esp>>12]) in generated code ++// and two in runtime code (-fPIC code needs an extra load for _sp_map). ++// ++// This code assumes stack page is not shared by different threads. It works ++// in 32-bit VM when page size is 4K (or a multiple of 4K, if that matters). ++// ++// Notice that _sp_map is allocated in the bss segment, which is ZFOD ++// (zero-fill-on-demand). While it reserves 4M address space upfront, ++// actual memory pages are committed on demand. ++// ++// If an application creates and destroys a lot of threads, usually the ++// stack space freed by a thread will soon get reused by new thread ++// (this is especially true in NPTL or LinuxThreads in fixed-stack mode). ++// No memory page in _sp_map is wasted. ++// ++// However, it's still possible that we might end up populating & ++// committing a large fraction of the 4M table over time, but the actual ++// amount of live data in the table could be quite small. The max wastage ++// is less than 4M bytes. If it becomes an issue, we could use madvise() ++// with MADV_DONTNEED to reclaim unused (i.e. all-zero) pages in _sp_map. ++// MADV_DONTNEED on Linux keeps the virtual memory mapping, but zaps the ++// physical memory page (i.e. similar to MADV_FREE on Solaris). ++ ++#ifdef MINIMIZE_RAM_USAGE ++Thread* ThreadLocalStorage::_sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; ++#endif // MINIMIZE_RAM_USAGE ++ ++void ThreadLocalStorage::generate_code_for_get_thread() { ++ // nothing we can do here for user-level thread ++} ++ ++void ThreadLocalStorage::pd_init() { ++#ifdef MINIMIZE_RAM_USAGE ++ assert(align_size_down(os::vm_page_size(), PAGE_SIZE) == os::vm_page_size(), ++ "page size must be multiple of PAGE_SIZE"); ++#endif // MINIMIZE_RAM_USAGE ++} ++ ++void ThreadLocalStorage::pd_set_thread(Thread* thread) { ++ os::thread_local_storage_at_put(ThreadLocalStorage::thread_index(), thread); ++#ifdef MINIMIZE_RAM_USAGE ++ address stack_top = os::current_stack_base(); ++ size_t stack_size = os::current_stack_size(); ++ ++ for (address p = stack_top - stack_size; p < stack_top; p += PAGE_SIZE) { ++ int index = ((uintptr_t)p >> PAGE_SHIFT) & ((1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1); ++ assert(thread == NULL || _sp_map[index] == NULL || thread == _sp_map[index], ++ "thread exited without detaching from VM??"); ++ _sp_map[index] = thread; ++ } ++#endif // MINIMIZE_RAM_USAGE ++} +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/threadLS_linux_mips.hpp 2023-12-20 09:23:19.868147074 +0800 +@@ -0,0 +1,61 @@ ++/* ++ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef OS_CPU_LINUX_MIPS_VM_THREADLS_LINUX_MIPS_HPP ++#define OS_CPU_LINUX_MIPS_VM_THREADLS_LINUX_MIPS_HPP ++ ++#ifdef MINIMIZE_RAM_USAGE ++ // Processor dependent parts of ThreadLocalStorage ++ //only the low 2G space for user program in Linux ++ ++ #define SP_BITLENGTH 34 ++ #define PAGE_SHIFT 14 ++ #define PAGE_SIZE (1UL << PAGE_SHIFT) ++ ++ static Thread* _sp_map[1UL << (SP_BITLENGTH - PAGE_SHIFT)]; ++ static int _sp_map_low; ++ static int _sp_map_high; ++#endif // MINIMIZE_RAM_USAGE ++ ++public: ++#ifdef MINIMIZE_RAM_USAGE ++ static Thread** sp_map_addr() { return _sp_map; } ++#endif // MINIMIZE_RAM_USAGE ++ ++ static Thread* thread() { ++#ifdef MINIMIZE_RAM_USAGE ++ /* Thread::thread() can also be optimized in the same way as __get_thread() */ ++ //return (Thread*) os::thread_local_storage_at(thread_index()); ++ uintptr_t sp; ++ uintptr_t mask = (1UL << (SP_BITLENGTH - PAGE_SHIFT)) - 1; ++ ++ __asm__ __volatile__ ("daddiu %0, $29, 0 " : "=r" (sp)); ++ ++ return _sp_map[(sp >> PAGE_SHIFT) & mask]; ++#else ++ return (Thread*) os::thread_local_storage_at(thread_index()); ++#endif // MINIMIZE_RAM_USAGE ++ } ++#endif // OS_CPU_LINUX_MIPS_VM_THREADLS_LINUX_MIPS_HPP +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp b/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp +--- a/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/vmStructs_linux_mips.hpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -111124,11 +110649,9 @@ index 0000000000..b7454bf045 +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_MIPS_VM_VMSTRUCTS_LINUX_MIPS_HPP -diff --git a/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp -new file mode 100644 -index 0000000000..ce697823b9 ---- /dev/null -+++ b/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp b/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp +--- a/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 ++++ b/hotspot/src/os_cpu/linux_mips/vm/vm_version_linux_mips.cpp 2023-12-20 09:23:19.868147074 +0800 @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. @@ -111158,11 +110681,30 @@ index 0000000000..ce697823b9 +#include "precompiled.hpp" +#include "runtime/os.hpp" +#include "vm_version_mips.hpp" -diff --git a/hotspot/src/share/tools/hsdis/Makefile b/hotspot/src/share/tools/hsdis/Makefile -index 0d1b608944..a9754ce2ac 100644 ---- a/hotspot/src/share/tools/hsdis/Makefile -+++ b/hotspot/src/share/tools/hsdis/Makefile -@@ -105,12 +105,25 @@ CFLAGS/sparc += -m32 +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/tools/hsdis/hsdis.c b/hotspot/src/share/tools/hsdis/hsdis.c +--- a/hotspot/src/share/tools/hsdis/hsdis.c 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/tools/hsdis/hsdis.c 2023-12-20 09:23:19.908146618 +0800 +@@ -493,6 +493,16 @@ + #if defined(LIBARCH_ppc64) || defined(LIBARCH_ppc64le) + res = "powerpc:common64"; + #endif ++#ifdef LIBARCH_mips64 ++#ifdef LOONGSON ++ res = "mips:loongson_3a"; ++#else ++ res = "mips:isa64"; ++#endif ++#endif ++#ifdef LIBARCH_loongarch64 ++ res = "loongarch"; ++#endif + #ifdef LIBARCH_aarch64 + res = "aarch64"; + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/tools/hsdis/Makefile b/hotspot/src/share/tools/hsdis/Makefile +--- a/hotspot/src/share/tools/hsdis/Makefile 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/tools/hsdis/Makefile 2023-12-20 09:23:19.904813322 +0800 +@@ -105,12 +105,25 @@ endif CFLAGS += $(CFLAGS/$(ARCH)) CFLAGS += -fPIC @@ -111188,31 +110730,9 @@ index 0d1b608944..a9754ce2ac 100644 LDFLAGS += -ldl OUTFLAGS += -o $@ else -diff --git a/hotspot/src/share/tools/hsdis/hsdis.c b/hotspot/src/share/tools/hsdis/hsdis.c -index 4fb4964870..f6ef5bea15 100644 ---- a/hotspot/src/share/tools/hsdis/hsdis.c -+++ b/hotspot/src/share/tools/hsdis/hsdis.c -@@ -493,6 +493,16 @@ static const char* native_arch_name() { - #if defined(LIBARCH_ppc64) || defined(LIBARCH_ppc64le) - res = "powerpc:common64"; - #endif -+#ifdef LIBARCH_mips64 -+#ifdef LOONGSON -+ res = "mips:loongson_3a"; -+#else -+ res = "mips:isa64"; -+#endif -+#endif -+#ifdef LIBARCH_loongarch64 -+ res = "loongarch"; -+#endif - #ifdef LIBARCH_aarch64 - res = "aarch64"; - #endif -diff --git a/hotspot/src/share/vm/adlc/main.cpp b/hotspot/src/share/vm/adlc/main.cpp -index 52044f12d4..50c585872e 100644 ---- a/hotspot/src/share/vm/adlc/main.cpp -+++ b/hotspot/src/share/vm/adlc/main.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/adlc/main.cpp b/hotspot/src/share/vm/adlc/main.cpp +--- a/hotspot/src/share/vm/adlc/main.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/adlc/main.cpp 2023-12-20 09:23:19.908146618 +0800 @@ -22,6 +22,12 @@ * */ @@ -111226,7 +110746,7 @@ index 52044f12d4..50c585872e 100644 // MAIN.CPP - Entry point for the Architecture Description Language Compiler #include "adlc.hpp" -@@ -234,6 +240,14 @@ int main(int argc, char *argv[]) +@@ -234,6 +240,14 @@ AD.addInclude(AD._CPP_file, "nativeInst_x86.hpp"); AD.addInclude(AD._CPP_file, "vmreg_x86.inline.hpp"); #endif @@ -111241,10 +110761,9 @@ index 52044f12d4..50c585872e 100644 #ifdef TARGET_ARCH_aarch64 AD.addInclude(AD._CPP_file, "assembler_aarch64.inline.hpp"); AD.addInclude(AD._CPP_file, "nativeInst_aarch64.hpp"); -diff --git a/hotspot/src/share/vm/asm/assembler.hpp b/hotspot/src/share/vm/asm/assembler.hpp -index f7f1ae1d36..572aa997ca 100644 ---- a/hotspot/src/share/vm/asm/assembler.hpp -+++ b/hotspot/src/share/vm/asm/assembler.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/assembler.hpp b/hotspot/src/share/vm/asm/assembler.hpp +--- a/hotspot/src/share/vm/asm/assembler.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/assembler.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111273,7 +110792,7 @@ index f7f1ae1d36..572aa997ca 100644 #ifdef TARGET_ARCH_aarch64 # include "register_aarch64.hpp" # include "vm_version_aarch64.hpp" -@@ -468,6 +482,12 @@ class AbstractAssembler : public ResourceObj { +@@ -468,6 +482,12 @@ #ifdef TARGET_ARCH_ppc # include "assembler_ppc.hpp" #endif @@ -111286,10 +110805,9 @@ index f7f1ae1d36..572aa997ca 100644 #endif // SHARE_VM_ASM_ASSEMBLER_HPP -diff --git a/hotspot/src/share/vm/asm/assembler.inline.hpp b/hotspot/src/share/vm/asm/assembler.inline.hpp -index 1a48cb3171..8ac90e1474 100644 ---- a/hotspot/src/share/vm/asm/assembler.inline.hpp -+++ b/hotspot/src/share/vm/asm/assembler.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/assembler.inline.hpp b/hotspot/src/share/vm/asm/assembler.inline.hpp +--- a/hotspot/src/share/vm/asm/assembler.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/assembler.inline.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111316,10 +110834,9 @@ index 1a48cb3171..8ac90e1474 100644 #ifdef TARGET_ARCH_aarch64 # include "assembler_aarch64.inline.hpp" #endif -diff --git a/hotspot/src/share/vm/asm/codeBuffer.cpp b/hotspot/src/share/vm/asm/codeBuffer.cpp -index d94ac40655..f6b578111f 100644 ---- a/hotspot/src/share/vm/asm/codeBuffer.cpp -+++ b/hotspot/src/share/vm/asm/codeBuffer.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/codeBuffer.cpp b/hotspot/src/share/vm/asm/codeBuffer.cpp +--- a/hotspot/src/share/vm/asm/codeBuffer.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/codeBuffer.cpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111333,7 +110850,7 @@ index d94ac40655..f6b578111f 100644 #include "precompiled.hpp" #include "asm/codeBuffer.hpp" #include "compiler/disassembler.hpp" -@@ -323,6 +329,7 @@ void CodeSection::relocate(address at, RelocationHolder const& spec, int format) +@@ -323,6 +329,7 @@ assert(rtype == relocInfo::none || rtype == relocInfo::runtime_call_type || rtype == relocInfo::internal_word_type|| @@ -111341,10 +110858,9 @@ index d94ac40655..f6b578111f 100644 rtype == relocInfo::section_word_type || rtype == relocInfo::external_word_type, "code needs relocation information"); -diff --git a/hotspot/src/share/vm/asm/codeBuffer.hpp b/hotspot/src/share/vm/asm/codeBuffer.hpp -index 02b619ad77..c04560a0bc 100644 ---- a/hotspot/src/share/vm/asm/codeBuffer.hpp -+++ b/hotspot/src/share/vm/asm/codeBuffer.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/codeBuffer.hpp b/hotspot/src/share/vm/asm/codeBuffer.hpp +--- a/hotspot/src/share/vm/asm/codeBuffer.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/codeBuffer.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111358,7 +110874,7 @@ index 02b619ad77..c04560a0bc 100644 #ifndef SHARE_VM_ASM_CODEBUFFER_HPP #define SHARE_VM_ASM_CODEBUFFER_HPP -@@ -635,6 +641,12 @@ class CodeBuffer: public StackObj { +@@ -635,6 +641,12 @@ #ifdef TARGET_ARCH_ppc # include "codeBuffer_ppc.hpp" #endif @@ -111371,10 +110887,9 @@ index 02b619ad77..c04560a0bc 100644 }; -diff --git a/hotspot/src/share/vm/asm/macroAssembler.hpp b/hotspot/src/share/vm/asm/macroAssembler.hpp -index 1482eb630b..0be415b6c5 100644 ---- a/hotspot/src/share/vm/asm/macroAssembler.hpp -+++ b/hotspot/src/share/vm/asm/macroAssembler.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/macroAssembler.hpp b/hotspot/src/share/vm/asm/macroAssembler.hpp +--- a/hotspot/src/share/vm/asm/macroAssembler.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/macroAssembler.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111400,10 +110915,9 @@ index 1482eb630b..0be415b6c5 100644 +# include "macroAssembler_loongarch.hpp" +#endif #endif // SHARE_VM_ASM_MACROASSEMBLER_HPP -diff --git a/hotspot/src/share/vm/asm/macroAssembler.inline.hpp b/hotspot/src/share/vm/asm/macroAssembler.inline.hpp -index db3daa52e9..6f4e523c59 100644 ---- a/hotspot/src/share/vm/asm/macroAssembler.inline.hpp -+++ b/hotspot/src/share/vm/asm/macroAssembler.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/macroAssembler.inline.hpp b/hotspot/src/share/vm/asm/macroAssembler.inline.hpp +--- a/hotspot/src/share/vm/asm/macroAssembler.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/macroAssembler.inline.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111430,10 +110944,9 @@ index db3daa52e9..6f4e523c59 100644 #ifdef TARGET_ARCH_aarch64 # include "macroAssembler_aarch64.inline.hpp" #endif -diff --git a/hotspot/src/share/vm/asm/register.hpp b/hotspot/src/share/vm/asm/register.hpp -index c500890181..6a20929e59 100644 ---- a/hotspot/src/share/vm/asm/register.hpp -+++ b/hotspot/src/share/vm/asm/register.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/asm/register.hpp b/hotspot/src/share/vm/asm/register.hpp +--- a/hotspot/src/share/vm/asm/register.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/asm/register.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111447,7 +110960,7 @@ index c500890181..6a20929e59 100644 #ifndef SHARE_VM_ASM_REGISTER_HPP #define SHARE_VM_ASM_REGISTER_HPP -@@ -108,6 +114,12 @@ const type name = ((type)name##_##type##EnumValue) +@@ -108,6 +114,12 @@ #ifdef TARGET_ARCH_ppc # include "register_ppc.hpp" #endif @@ -111460,10 +110973,9 @@ index c500890181..6a20929e59 100644 #ifdef TARGET_ARCH_aarch64 # include "register_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/c1/c1_Defs.hpp b/hotspot/src/share/vm/c1/c1_Defs.hpp -index b0cd763739..b42b9de1b5 100644 ---- a/hotspot/src/share/vm/c1/c1_Defs.hpp -+++ b/hotspot/src/share/vm/c1/c1_Defs.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_Defs.hpp b/hotspot/src/share/vm/c1/c1_Defs.hpp +--- a/hotspot/src/share/vm/c1/c1_Defs.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_Defs.hpp 2023-12-20 09:23:19.911479913 +0800 @@ -22,6 +22,12 @@ * */ @@ -111477,30 +110989,280 @@ index b0cd763739..b42b9de1b5 100644 #ifndef SHARE_VM_C1_C1_DEFS_HPP #define SHARE_VM_C1_C1_DEFS_HPP -@@ -29,6 +35,9 @@ - #ifdef TARGET_ARCH_x86 - # include "register_x86.hpp" - #endif -+#ifdef TARGET_ARCH_loongarch -+# include "register_loongarch.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "register_aarch64.hpp" - #endif -@@ -56,6 +65,9 @@ enum { - #ifdef TARGET_ARCH_x86 - # include "c1_Defs_x86.hpp" - #endif -+#ifdef TARGET_ARCH_loongarch -+# include "c1_Defs_loongarch.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "c1_Defs_aarch64.hpp" - #endif -diff --git a/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp b/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp -index f07e97a4d3..6bc367a897 100644 ---- a/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp -+++ b/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp +@@ -29,6 +35,9 @@ + #ifdef TARGET_ARCH_x86 + # include "register_x86.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "register_loongarch.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "register_aarch64.hpp" + #endif +@@ -56,6 +65,9 @@ + #ifdef TARGET_ARCH_x86 + # include "c1_Defs_x86.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "c1_Defs_loongarch.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "c1_Defs_aarch64.hpp" + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp b/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp +--- a/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_FpuStackSim.hpp 2023-12-20 09:23:19.911479913 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_C1_C1_FPUSTACKSIM_HPP + #define SHARE_VM_C1_C1_FPUSTACKSIM_HPP + +@@ -35,6 +41,9 @@ + #ifdef TARGET_ARCH_x86 + # include "c1_FpuStackSim_x86.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "c1_FpuStackSim_loongarch.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "c1_FpuStackSim_aarch64.hpp" + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_FrameMap.cpp b/hotspot/src/share/vm/c1/c1_FrameMap.cpp +--- a/hotspot/src/share/vm/c1/c1_FrameMap.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_FrameMap.cpp 2023-12-20 09:23:19.911479913 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "c1/c1_FrameMap.hpp" + #include "c1/c1_LIR.hpp" +@@ -29,6 +35,9 @@ + #ifdef TARGET_ARCH_x86 + # include "vmreg_x86.inline.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "vmreg_loongarch.inline.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "vmreg_aarch64.inline.hpp" + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_FrameMap.hpp b/hotspot/src/share/vm/c1/c1_FrameMap.hpp +--- a/hotspot/src/share/vm/c1/c1_FrameMap.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_FrameMap.hpp 2023-12-20 09:23:19.911479913 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_C1_C1_FRAMEMAP_HPP + #define SHARE_VM_C1_C1_FRAMEMAP_HPP + +@@ -85,6 +91,9 @@ + #ifdef TARGET_ARCH_x86 + # include "c1_FrameMap_x86.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "c1_FrameMap_loongarch.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "c1_FrameMap_aarch64.hpp" + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_globals.hpp b/hotspot/src/share/vm/c1/c1_globals.hpp +--- a/hotspot/src/share/vm/c1/c1_globals.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_globals.hpp 2023-12-20 09:23:19.921479797 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_C1_C1_GLOBALS_HPP + #define SHARE_VM_C1_C1_GLOBALS_HPP + +@@ -29,6 +35,9 @@ + #ifdef TARGET_ARCH_x86 + # include "c1_globals_x86.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "c1_globals_loongarch.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "c1_globals_aarch64.hpp" + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LinearScan.cpp b/hotspot/src/share/vm/c1/c1_LinearScan.cpp +--- a/hotspot/src/share/vm/c1/c1_LinearScan.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LinearScan.cpp 2023-12-20 09:23:19.918146502 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "c1/c1_CFGPrinter.hpp" + #include "c1/c1_CodeStubs.hpp" +@@ -35,6 +41,9 @@ + #ifdef TARGET_ARCH_x86 + # include "vmreg_x86.inline.hpp" + #endif ++#ifdef TARGET_ARCH_loongarch ++# include "vmreg_loongarch.inline.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "vmreg_aarch64.inline.hpp" + #endif +@@ -1266,6 +1275,23 @@ + } + break; + } ++ case lir_cmp_cmove: { ++ assert(op->as_Op4() != NULL, "lir_cmp_cmove must be LIR_Op4"); ++ LIR_Op4* cmove = (LIR_Op4*)op; ++ ++ LIR_Opr move_from = cmove->in_opr3(); ++ LIR_Opr move_to = cmove->result_opr(); ++ ++ if (move_to->is_register() && move_from->is_register()) { ++ Interval* from = interval_at(reg_num(move_from)); ++ Interval* to = interval_at(reg_num(move_to)); ++ if (from != NULL && to != NULL) { ++ to->set_register_hint(from); ++ TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num())); ++ } ++ } ++ break; ++ } + } + } + +@@ -2104,7 +2130,7 @@ + #ifdef _LP64 + return LIR_OprFact::double_cpu(assigned_reg, assigned_reg); + #else +-#if defined(SPARC) || defined(PPC) ++#if defined(SPARC) || defined(PPC) || defined(LOONGARCH) + return LIR_OprFact::double_cpu(assigned_regHi, assigned_reg); + #else + return LIR_OprFact::double_cpu(assigned_reg, assigned_regHi); +@@ -3285,7 +3311,9 @@ + check_live = (move->patch_code() == lir_patch_none); + } + LIR_OpBranch* branch = op->as_OpBranch(); +- if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) { ++ LIR_OpCmpBranch* cmp_branch = op->as_OpCmpBranch(); ++ if ((branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) || ++ (cmp_branch != NULL && cmp_branch->stub() != NULL && cmp_branch->stub()->is_exception_throw_stub())) { + // Don't bother checking the stub in this case since the + // exception stub will never return to normal control flow. + check_live = false; +@@ -6148,6 +6176,16 @@ + if (branch->ublock() == target_from) { + branch->change_ublock(target_to); + } ++ } else if (op->code() == lir_cmp_branch || op->code() == lir_cmp_float_branch) { ++ assert(op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); ++ LIR_OpCmpBranch* branch = (LIR_OpCmpBranch*)op; ++ ++ if (branch->block() == target_from) { ++ branch->change_block(target_to); ++ } ++ if (branch->ublock() == target_from) { ++ branch->change_ublock(target_to); ++ } + } + } + } +@@ -6252,6 +6290,20 @@ + instructions->truncate(instructions->length() - 1); + } + } ++ } else if (prev_op->code() == lir_cmp_branch || prev_op->code() == lir_cmp_float_branch) { ++ assert(prev_op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); ++ LIR_OpCmpBranch* prev_branch = (LIR_OpCmpBranch*)prev_op; ++ ++ if (prev_branch->stub() == NULL) { ++ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) { ++ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); ++ ++ // eliminate a conditional branch to the immediate successor ++ prev_branch->change_block(last_branch->block()); ++ prev_branch->negate_cond(); ++ instructions->trunc_to(instructions->length() - 1); ++ } ++ } + } + } + } +@@ -6328,6 +6380,13 @@ + assert(op_branch->block() == NULL || code->index_of(op_branch->block()) != -1, "branch target not valid"); + assert(op_branch->ublock() == NULL || code->index_of(op_branch->ublock()) != -1, "branch target not valid"); + } ++ ++ LIR_OpCmpBranch* op_cmp_branch = instructions->at(j)->as_OpCmpBranch(); ++ ++ if (op_cmp_branch != NULL) { ++ assert(op_cmp_branch->block() == NULL || code->find(op_cmp_branch->block()) != -1, "branch target not valid"); ++ assert(op_cmp_branch->ublock() == NULL || code->find(op_cmp_branch->ublock()) != -1, "branch target not valid"); ++ } + } + + for (j = 0; j < block->number_of_sux() - 1; j++) { +@@ -6571,6 +6630,24 @@ + break; + } + ++ case lir_cmp_branch: ++ case lir_cmp_float_branch: { ++ LIR_OpCmpBranch* branch = op->as_OpCmpBranch(); ++ if (branch->block() == NULL) { ++ inc_counter(counter_stub_branch); ++ } else { ++ inc_counter(counter_cond_branch); ++ } ++ inc_counter(counter_cmp); ++ break; ++ } ++ ++ case lir_cmp_cmove: { ++ inc_counter(counter_misc_inst); ++ inc_counter(counter_cmp); ++ break; ++ } ++ + case lir_neg: + case lir_add: + case lir_sub: +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LinearScan.hpp b/hotspot/src/share/vm/c1/c1_LinearScan.hpp +--- a/hotspot/src/share/vm/c1/c1_LinearScan.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LinearScan.hpp 2023-12-20 09:23:19.918146502 +0800 @@ -22,6 +22,12 @@ * */ @@ -111511,23 +111273,22 @@ index f07e97a4d3..6bc367a897 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_C1_C1_FPUSTACKSIM_HPP - #define SHARE_VM_C1_C1_FPUSTACKSIM_HPP + #ifndef SHARE_VM_C1_C1_LINEARSCAN_HPP + #define SHARE_VM_C1_C1_LINEARSCAN_HPP -@@ -35,6 +41,9 @@ class FpuStackSim; +@@ -976,6 +982,9 @@ #ifdef TARGET_ARCH_x86 - # include "c1_FpuStackSim_x86.hpp" + # include "c1_LinearScan_x86.hpp" #endif +#ifdef TARGET_ARCH_loongarch -+# include "c1_FpuStackSim_loongarch.hpp" ++# include "c1_LinearScan_loongarch.hpp" +#endif #ifdef TARGET_ARCH_aarch64 - # include "c1_FpuStackSim_aarch64.hpp" + # include "c1_LinearScan_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/c1/c1_FrameMap.cpp b/hotspot/src/share/vm/c1/c1_FrameMap.cpp -index 1dac94d58c..b1e37ec41c 100644 ---- a/hotspot/src/share/vm/c1/c1_FrameMap.cpp -+++ b/hotspot/src/share/vm/c1/c1_FrameMap.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp b/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp +--- a/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp 2023-12-20 09:23:19.914813209 +0800 @@ -22,6 +22,12 @@ * */ @@ -111539,22 +111300,41 @@ index 1dac94d58c..b1e37ec41c 100644 + */ + #include "precompiled.hpp" - #include "c1/c1_FrameMap.hpp" - #include "c1/c1_LIR.hpp" -@@ -29,6 +35,9 @@ - #ifdef TARGET_ARCH_x86 + #include "c1/c1_Compilation.hpp" + #include "c1/c1_Instruction.hpp" +@@ -34,6 +40,10 @@ + # include "nativeInst_x86.hpp" # include "vmreg_x86.inline.hpp" #endif +#ifdef TARGET_ARCH_loongarch ++# include "nativeInst_loongarch.hpp" +# include "vmreg_loongarch.inline.hpp" +#endif #ifdef TARGET_ARCH_aarch64 + # include "nativeInst_aarch64.hpp" # include "vmreg_aarch64.inline.hpp" - #endif -diff --git a/hotspot/src/share/vm/c1/c1_FrameMap.hpp b/hotspot/src/share/vm/c1/c1_FrameMap.hpp -index 41571e3d16..c0e7b28ea4 100644 ---- a/hotspot/src/share/vm/c1/c1_FrameMap.hpp -+++ b/hotspot/src/share/vm/c1/c1_FrameMap.hpp +@@ -811,6 +821,18 @@ + } + + ++void LIR_Assembler::emit_op4(LIR_Op4* op) { ++ switch (op->code()) { ++ case lir_cmp_cmove: ++ cmp_cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->in_opr3(), op->in_opr4(), op->result_opr(), op->type()); ++ break; ++ ++ default: ++ Unimplemented(); ++ break; ++ } ++} ++ + void LIR_Assembler::build_frame() { + _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); + } +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp b/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp +--- a/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp 2023-12-20 09:23:19.914813209 +0800 @@ -22,6 +22,12 @@ * */ @@ -111565,23 +111345,40 @@ index 41571e3d16..c0e7b28ea4 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_C1_C1_FRAMEMAP_HPP - #define SHARE_VM_C1_C1_FRAMEMAP_HPP + #ifndef SHARE_VM_C1_C1_LIRASSEMBLER_HPP + #define SHARE_VM_C1_C1_LIRASSEMBLER_HPP + +@@ -195,7 +201,9 @@ + void emit_op1(LIR_Op1* op); + void emit_op2(LIR_Op2* op); + void emit_op3(LIR_Op3* op); ++ void emit_op4(LIR_Op4* op); + void emit_opBranch(LIR_OpBranch* op); ++ void emit_opCmpBranch(LIR_OpCmpBranch* op); + void emit_opLabel(LIR_OpLabel* op); + void emit_arraycopy(LIR_OpArrayCopy* op); + void emit_updatecrc32(LIR_OpUpdateCRC32* op); +@@ -227,6 +235,7 @@ + void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); + void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions + void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); ++ void cmp_cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type); + void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type); -@@ -85,6 +91,9 @@ class FrameMap : public CompilationResourceObj { + void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); +@@ -265,6 +274,9 @@ #ifdef TARGET_ARCH_x86 - # include "c1_FrameMap_x86.hpp" + # include "c1_LIRAssembler_x86.hpp" #endif +#ifdef TARGET_ARCH_loongarch -+# include "c1_FrameMap_loongarch.hpp" ++# include "c1_LIRAssembler_loongarch.hpp" +#endif #ifdef TARGET_ARCH_aarch64 - # include "c1_FrameMap_aarch64.hpp" + # include "c1_LIRAssembler_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/c1/c1_LIR.cpp b/hotspot/src/share/vm/c1/c1_LIR.cpp -index fa37e7a046..5d33d3f7a0 100644 ---- a/hotspot/src/share/vm/c1/c1_LIR.cpp -+++ b/hotspot/src/share/vm/c1/c1_LIR.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LIR.cpp b/hotspot/src/share/vm/c1/c1_LIR.cpp +--- a/hotspot/src/share/vm/c1/c1_LIR.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LIR.cpp 2023-12-20 09:23:19.914813209 +0800 @@ -22,6 +22,12 @@ * */ @@ -111595,7 +111392,7 @@ index fa37e7a046..5d33d3f7a0 100644 #include "precompiled.hpp" #include "c1/c1_InstructionPrinter.hpp" #include "c1/c1_LIR.hpp" -@@ -79,6 +85,17 @@ FloatRegister LIR_OprDesc::as_double_reg() const { +@@ -79,6 +85,17 @@ #endif @@ -111613,7 +111410,7 @@ index fa37e7a046..5d33d3f7a0 100644 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); -@@ -149,13 +166,19 @@ void LIR_Address::verify0() const { +@@ -149,13 +166,19 @@ #endif #ifdef _LP64 assert(base()->is_cpu_register(), "wrong base operand"); @@ -111634,7 +111431,7 @@ index fa37e7a046..5d33d3f7a0 100644 #else assert(base()->is_single_cpu(), "wrong base operand"); assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); -@@ -258,8 +281,6 @@ bool LIR_OprDesc::is_oop() const { +@@ -258,8 +281,6 @@ } } @@ -111643,7 +111440,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_Op2::verify() const { #ifdef ASSERT switch (code()) { -@@ -301,6 +322,18 @@ void LIR_Op2::verify() const { +@@ -301,6 +322,18 @@ #endif } @@ -111662,7 +111459,7 @@ index fa37e7a046..5d33d3f7a0 100644 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) -@@ -358,6 +391,55 @@ void LIR_OpBranch::negate_cond() { +@@ -358,6 +391,55 @@ } } @@ -111718,7 +111515,7 @@ index fa37e7a046..5d33d3f7a0 100644 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, -@@ -560,10 +642,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) { +@@ -560,10 +642,7 @@ assert(opConvert->_info == NULL, "must be"); if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); if (opConvert->_result->is_valid()) do_output(opConvert->_result); @@ -111730,7 +111527,7 @@ index fa37e7a046..5d33d3f7a0 100644 do_stub(opConvert->_stub); break; -@@ -661,6 +740,25 @@ void LIR_OpVisitState::visit(LIR_Op* op) { +@@ -661,6 +740,25 @@ break; } @@ -111756,7 +111553,7 @@ index fa37e7a046..5d33d3f7a0 100644 // special handling for cmove: right input operand must not be equal // to the result operand, otherwise the backend fails case lir_cmove: -@@ -806,6 +904,29 @@ void LIR_OpVisitState::visit(LIR_Op* op) { +@@ -806,6 +904,29 @@ break; } @@ -111786,7 +111583,7 @@ index fa37e7a046..5d33d3f7a0 100644 // LIR_OpJavaCall case lir_static_call: -@@ -1121,6 +1242,13 @@ void LIR_Op2::emit_code(LIR_Assembler* masm) { +@@ -1121,6 +1242,13 @@ masm->emit_op2(this); } @@ -111800,7 +111597,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { masm->emit_alloc_array(this); masm->append_code_stub(stub()); -@@ -1141,6 +1269,10 @@ void LIR_Op3::emit_code(LIR_Assembler* masm) { +@@ -1141,6 +1269,10 @@ masm->emit_op3(this); } @@ -111811,7 +111608,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_OpLock::emit_code(LIR_Assembler* masm) { masm->emit_lock(this); if (stub()) { -@@ -1381,7 +1513,6 @@ void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int +@@ -1381,7 +1513,6 @@ info)); } @@ -111819,7 +111616,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { append(new LIR_Op2( lir_cmp, -@@ -1391,6 +1522,17 @@ void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* ad +@@ -1391,6 +1522,17 @@ info)); } @@ -111837,7 +111634,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { append(new LIR_OpAllocObj( -@@ -1520,18 +1662,6 @@ void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr +@@ -1520,18 +1662,6 @@ append(c); } @@ -111856,7 +111653,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); -@@ -1780,6 +1910,8 @@ const char * LIR_Op::name() const { +@@ -1780,6 +1910,8 @@ case lir_cmp_l2i: s = "cmp_l2i"; break; case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; case lir_cmp_fd2i: s = "comp_fd2i"; break; @@ -111865,7 +111662,7 @@ index fa37e7a046..5d33d3f7a0 100644 case lir_cmove: s = "cmove"; break; case lir_add: s = "add"; break; case lir_sub: s = "sub"; break; -@@ -1809,6 +1941,8 @@ const char * LIR_Op::name() const { +@@ -1809,6 +1941,8 @@ // LIR_Op3 case lir_idiv: s = "idiv"; break; case lir_irem: s = "irem"; break; @@ -111874,7 +111671,7 @@ index fa37e7a046..5d33d3f7a0 100644 // LIR_OpJavaCall case lir_static_call: s = "static"; break; case lir_optvirtual_call: s = "optvirtual"; break; -@@ -1960,6 +2094,26 @@ void LIR_OpBranch::print_instr(outputStream* out) const { +@@ -1960,6 +2094,26 @@ } } @@ -111901,7 +111698,7 @@ index fa37e7a046..5d33d3f7a0 100644 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { switch(cond) { case lir_cond_equal: out->print("[EQ]"); break; -@@ -1980,12 +2134,9 @@ void LIR_OpConvert::print_instr(outputStream* out) const { +@@ -1980,12 +2134,9 @@ print_bytecode(out, bytecode()); in_opr()->print(out); out->print(" "); result_opr()->print(out); out->print(" "); @@ -111916,7 +111713,7 @@ index fa37e7a046..5d33d3f7a0 100644 } void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { -@@ -2031,9 +2182,6 @@ void LIR_OpRoundFP::print_instr(outputStream* out) const { +@@ -2031,9 +2182,6 @@ // LIR_Op2 void LIR_Op2::print_instr(outputStream* out) const { @@ -111926,485 +111723,43 @@ index fa37e7a046..5d33d3f7a0 100644 in_opr1()->print(out); out->print(" "); in_opr2()->print(out); out->print(" "); if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } -@@ -2082,6 +2230,18 @@ void LIR_Op3::print_instr(outputStream* out) const { +@@ -2082,6 +2230,18 @@ result_opr()->print(out); } +// LIR_Op4 +void LIR_Op4::print_instr(outputStream* out) const { + if (code() == lir_cmp_cmove) { -+ print_condition(out, condition()); out->print(" "); -+ } -+ in_opr1()->print(out); out->print(" "); -+ in_opr2()->print(out); out->print(" "); -+ in_opr3()->print(out); out->print(" "); -+ in_opr4()->print(out); out->print(" "); -+ result_opr()->print(out); -+} -+ - - void LIR_OpLock::print_instr(outputStream* out) const { - hdr_opr()->print(out); out->print(" "); -@@ -2095,10 +2255,14 @@ void LIR_OpLock::print_instr(outputStream* out) const { - - #ifdef ASSERT - void LIR_OpAssert::print_instr(outputStream* out) const { -+ tty->print_cr("function LIR_OpAssert::print_instr unimplemented yet! "); -+ Unimplemented(); -+ /* - print_condition(out, condition()); out->print(" "); - in_opr1()->print(out); out->print(" "); - in_opr2()->print(out); out->print(", \""); - out->print("%s", msg()); out->print("\""); -+ */ - } - #endif - -diff --git a/hotspot/src/share/vm/c1/c1_LIR.hpp b/hotspot/src/share/vm/c1/c1_LIR.hpp -index 24b8620211..aec77afe1f 100644 ---- a/hotspot/src/share/vm/c1/c1_LIR.hpp -+++ b/hotspot/src/share/vm/c1/c1_LIR.hpp -@@ -22,6 +22,11 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2018, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ - #ifndef SHARE_VM_C1_C1_LIR_HPP - #define SHARE_VM_C1_C1_LIR_HPP - -@@ -452,7 +457,7 @@ class LIR_OprDesc: public CompilationResourceObj { - // for compatibility with RInfo - int fpu () const { return lo_reg_half(); } - #endif --#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64) -+#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64) || defined(LOONGARCH) - FloatRegister as_float_reg () const; - FloatRegister as_double_reg () const; - #endif -@@ -542,7 +547,7 @@ class LIR_Address: public LIR_OprPtr { - , _type(type) - , _disp(0) { verify(); } - --#if defined(X86) || defined(ARM) || defined(AARCH64) -+#if defined(X86) || defined(ARM) || defined(AARCH64) || defined(LOONGARCH) - LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): - _base(base) - , _index(index) -@@ -658,7 +663,13 @@ class LIR_OprFact: public AllStatic { - LIR_OprDesc::double_type | - LIR_OprDesc::cpu_register | - LIR_OprDesc::double_size); } --#endif // PPC -+#elif defined(LOONGARCH) -+ static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | -+ (reg << LIR_OprDesc::reg2_shift) | -+ LIR_OprDesc::double_type | -+ LIR_OprDesc::fpu_register | -+ LIR_OprDesc::double_size); } -+#endif // LOONGARCH - - static LIR_Opr virtual_register(int index, BasicType type) { - LIR_Opr res; -@@ -872,9 +883,11 @@ class LIR_OpConvert; - class LIR_OpAllocObj; - class LIR_OpRoundFP; - class LIR_Op2; -+class LIR_OpCmpBranch; - class LIR_OpDelay; - class LIR_Op3; - class LIR_OpAllocArray; -+class LIR_Op4; - class LIR_OpCall; - class LIR_OpJavaCall; - class LIR_OpRTCall; -@@ -943,6 +956,8 @@ enum LIR_Code { - , lir_cmp_l2i - , lir_ucmp_fd2i - , lir_cmp_fd2i -+ , lir_cmp_branch -+ , lir_cmp_float_branch - , lir_cmove - , lir_add - , lir_sub -@@ -976,6 +991,9 @@ enum LIR_Code { - , lir_idiv - , lir_irem - , end_op3 -+ , begin_op4 -+ , lir_cmp_cmove -+ , end_op4 - , begin_opJavaCall - , lir_static_call - , lir_optvirtual_call -@@ -1139,12 +1157,14 @@ class LIR_Op: public CompilationResourceObj { - virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } - virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } - virtual LIR_OpBranch* as_OpBranch() { return NULL; } -+ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return NULL; } - virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } - virtual LIR_OpConvert* as_OpConvert() { return NULL; } - virtual LIR_Op0* as_Op0() { return NULL; } - virtual LIR_Op1* as_Op1() { return NULL; } - virtual LIR_Op2* as_Op2() { return NULL; } - virtual LIR_Op3* as_Op3() { return NULL; } -+ virtual LIR_Op4* as_Op4() { return NULL; } - virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } - virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } - virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } -@@ -1474,37 +1494,18 @@ class LIR_OpConvert: public LIR_Op1 { - private: - Bytecodes::Code _bytecode; - ConversionStub* _stub; --#if defined(PPC) || defined(AARCH64) -- LIR_Opr _tmp1; -- LIR_Opr _tmp2; --#endif -+ LIR_Opr _tmp; - - public: -- LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) -+ LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub, LIR_Opr tmp) - : LIR_Op1(lir_convert, opr, result) - , _stub(stub) --#ifdef PPC -- , _tmp1(LIR_OprDesc::illegalOpr()) -- , _tmp2(LIR_OprDesc::illegalOpr()) --#endif -+ , _tmp(tmp) - , _bytecode(code) {} - --#if defined(PPC) || defined(AARCH64) -- LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub -- ,LIR_Opr tmp1, LIR_Opr tmp2) -- : LIR_Op1(lir_convert, opr, result) -- , _stub(stub) -- , _tmp1(tmp1) -- , _tmp2(tmp2) -- , _bytecode(code) {} --#endif -- - Bytecodes::Code bytecode() const { return _bytecode; } - ConversionStub* stub() const { return _stub; } --#if defined(PPC) || defined(AARCH64) -- LIR_Opr tmp1() const { return _tmp1; } -- LIR_Opr tmp2() const { return _tmp2; } --#endif -+ LIR_Opr tmp() const { return _tmp; } - - virtual void emit_code(LIR_Assembler* masm); - virtual LIR_OpConvert* as_OpConvert() { return this; } -@@ -1659,7 +1660,7 @@ class LIR_Op2: public LIR_Op { - , _tmp3(LIR_OprFact::illegalOpr) - , _tmp4(LIR_OprFact::illegalOpr) - , _tmp5(LIR_OprFact::illegalOpr) { -- assert(code == lir_cmp || code == lir_assert, "code check"); -+ assert(code == lir_cmp || code == lir_cmp_branch || code == lir_cmp_float_branch || code == lir_assert, "code check"); - } - - LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) -@@ -1691,7 +1692,7 @@ class LIR_Op2: public LIR_Op { - , _tmp3(LIR_OprFact::illegalOpr) - , _tmp4(LIR_OprFact::illegalOpr) - , _tmp5(LIR_OprFact::illegalOpr) { -- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); -+ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); - } - - LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, -@@ -1707,7 +1708,7 @@ class LIR_Op2: public LIR_Op { - , _tmp3(tmp3) - , _tmp4(tmp4) - , _tmp5(tmp5) { -- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); -+ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); - } - - LIR_Opr in_opr1() const { return _opr1; } -@@ -1719,10 +1720,12 @@ class LIR_Op2: public LIR_Op { - LIR_Opr tmp4_opr() const { return _tmp4; } - LIR_Opr tmp5_opr() const { return _tmp5; } - LIR_Condition condition() const { -- assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; -+ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); -+ return _condition; - } - void set_condition(LIR_Condition condition) { -- assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; -+ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove, "only valid for cmp and cmove"); -+ _condition = condition; - } - - void set_fpu_stack_size(int size) { _fpu_stack_size = size; } -@@ -1736,6 +1739,43 @@ class LIR_Op2: public LIR_Op { - virtual void print_instr(outputStream* out) const PRODUCT_RETURN; - }; - -+class LIR_OpCmpBranch: public LIR_Op2 { -+ friend class LIR_OpVisitState; -+ -+ private: -+ Label* _label; -+ BlockBegin* _block; // if this is a branch to a block, this is the block -+ BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block -+ CodeStub* _stub; // if this is a branch to a stub, this is the stub -+ -+ public: -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl, CodeEmitInfo* info = NULL) -+ : LIR_Op2(lir_cmp_branch, cond, left, right, info) -+ , _label(lbl) -+ , _block(NULL) -+ , _ublock(NULL) -+ , _stub(NULL) { } -+ -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeStub* stub, CodeEmitInfo* info = NULL); -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, CodeEmitInfo* info = NULL); -+ -+ // for unordered comparisons -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* ublock, CodeEmitInfo* info = NULL); -+ -+ Label* label() const { return _label; } -+ BlockBegin* block() const { return _block; } -+ BlockBegin* ublock() const { return _ublock; } -+ CodeStub* stub() const { return _stub; } -+ -+ void change_block(BlockBegin* b); -+ void change_ublock(BlockBegin* b); -+ void negate_cond(); -+ -+ virtual void emit_code(LIR_Assembler* masm); -+ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return this; } -+ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; -+}; -+ - class LIR_OpAllocArray : public LIR_Op { - friend class LIR_OpVisitState; - -@@ -1776,7 +1816,6 @@ class LIR_OpAllocArray : public LIR_Op { - virtual void print_instr(outputStream* out) const PRODUCT_RETURN; - }; - -- - class LIR_Op3: public LIR_Op { - friend class LIR_OpVisitState; - -@@ -1800,6 +1839,48 @@ class LIR_Op3: public LIR_Op { - }; - - -+class LIR_Op4: public LIR_Op { -+ friend class LIR_OpVisitState; -+ -+ private: -+ LIR_Opr _opr1; -+ LIR_Opr _opr2; -+ LIR_Opr _opr3; -+ LIR_Opr _opr4; -+ BasicType _type; -+ LIR_Condition _condition; -+ -+ void verify() const; -+ -+ public: -+ LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type) -+ : LIR_Op(code, result, NULL) -+ , _opr1(opr1) -+ , _opr2(opr2) -+ , _opr3(opr3) -+ , _opr4(opr4) -+ , _type(type) -+ , _condition(condition) { -+ assert(is_in_range(code, begin_op4, end_op4), "code check"); -+ assert(type != T_ILLEGAL, "cmove should have type"); -+ } -+ LIR_Opr in_opr1() const { return _opr1; } -+ LIR_Opr in_opr2() const { return _opr2; } -+ LIR_Opr in_opr3() const { return _opr3; } -+ LIR_Opr in_opr4() const { return _opr4; } -+ BasicType type() const { return _type; } -+ LIR_Condition condition() const { -+ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); return _condition; -+ } -+ void set_condition(LIR_Condition condition) { -+ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); _condition = condition; -+ } -+ -+ virtual void emit_code(LIR_Assembler* masm); -+ virtual LIR_Op4* as_Op4() { return this; } -+ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; -+}; -+ - //-------------------------------- - class LabelObj: public CompilationResourceObj { - private: -@@ -2141,17 +2222,9 @@ class LIR_List: public CompilationResourceObj { - - void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } - --#ifdef PPC -- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } --#endif --#if defined(AARCH64) -- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, -- ConversionStub* stub = NULL, LIR_Opr tmp1 = LIR_OprDesc::illegalOpr()) { -- append(new LIR_OpConvert(code, left, dst, stub, tmp1, LIR_OprDesc::illegalOpr())); -+ void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL, LIR_Opr tmp = LIR_OprFact::illegalOpr) { -+ append(new LIR_OpConvert(code, left, dst, stub, tmp)); - } --#else -- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } --#endif - - void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } - void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } -@@ -2256,6 +2329,48 @@ class LIR_List: public CompilationResourceObj { - append(new LIR_OpBranch(cond, type, block, unordered)); - } - -+#if defined(X86) || defined(AARCH64) -+ -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { -+ cmp(condition, left, right, info); -+ branch(condition, type, tgt); -+ } -+ -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, type, block, unordered); -+ } -+ -+ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+ } -+ -+#endif -+ -+#ifdef LOONGARCH -+ -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { -+ append(new LIR_OpCmpBranch(condition, left, right, tgt, info)); -+ } -+ -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered) { -+ append(new LIR_OpCmpBranch(condition, left, right, block, unordered)); -+ } -+ -+ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ append(new LIR_Op4(lir_cmp_cmove, condition, left, right, src1, src2, dst, type)); -+ } -+ -+#endif -+ -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, int right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { -+ cmp_branch(condition, left, LIR_OprFact::intConst(right), type, tgt, info); -+ } -+ - void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); - void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); - void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); -diff --git a/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp b/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp -index e5cd19f17a..a18c53008b 100644 ---- a/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp -+++ b/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #include "precompiled.hpp" - #include "c1/c1_Compilation.hpp" - #include "c1/c1_Instruction.hpp" -@@ -34,6 +40,10 @@ - # include "nativeInst_x86.hpp" - # include "vmreg_x86.inline.hpp" - #endif -+#ifdef TARGET_ARCH_loongarch -+# include "nativeInst_loongarch.hpp" -+# include "vmreg_loongarch.inline.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "nativeInst_aarch64.hpp" - # include "vmreg_aarch64.inline.hpp" -@@ -811,6 +821,18 @@ void LIR_Assembler::emit_op2(LIR_Op2* op) { - } - - -+void LIR_Assembler::emit_op4(LIR_Op4* op) { -+ switch (op->code()) { -+ case lir_cmp_cmove: -+ cmp_cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->in_opr3(), op->in_opr4(), op->result_opr(), op->type()); -+ break; -+ -+ default: -+ Unimplemented(); -+ break; -+ } -+} -+ - void LIR_Assembler::build_frame() { - _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); - } -diff --git a/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp b/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp -index 1a68d458d2..ac0f4e7a46 100644 ---- a/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp -+++ b/hotspot/src/share/vm/c1/c1_LIRAssembler.hpp -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ ++ print_condition(out, condition()); out->print(" "); ++ } ++ in_opr1()->print(out); out->print(" "); ++ in_opr2()->print(out); out->print(" "); ++ in_opr3()->print(out); out->print(" "); ++ in_opr4()->print(out); out->print(" "); ++ result_opr()->print(out); ++} + - #ifndef SHARE_VM_C1_C1_LIRASSEMBLER_HPP - #define SHARE_VM_C1_C1_LIRASSEMBLER_HPP -@@ -195,7 +201,9 @@ class LIR_Assembler: public CompilationResourceObj { - void emit_op1(LIR_Op1* op); - void emit_op2(LIR_Op2* op); - void emit_op3(LIR_Op3* op); -+ void emit_op4(LIR_Op4* op); - void emit_opBranch(LIR_OpBranch* op); -+ void emit_opCmpBranch(LIR_OpCmpBranch* op); - void emit_opLabel(LIR_OpLabel* op); - void emit_arraycopy(LIR_OpArrayCopy* op); - void emit_updatecrc32(LIR_OpUpdateCRC32* op); -@@ -227,6 +235,7 @@ class LIR_Assembler: public CompilationResourceObj { - void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); - void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions - void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); -+ void cmp_cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type); - void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type); + void LIR_OpLock::print_instr(outputStream* out) const { + hdr_opr()->print(out); out->print(" "); +@@ -2095,10 +2255,14 @@ - void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); -@@ -265,6 +274,9 @@ class LIR_Assembler: public CompilationResourceObj { - #ifdef TARGET_ARCH_x86 - # include "c1_LIRAssembler_x86.hpp" - #endif -+#ifdef TARGET_ARCH_loongarch -+# include "c1_LIRAssembler_loongarch.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "c1_LIRAssembler_aarch64.hpp" + #ifdef ASSERT + void LIR_OpAssert::print_instr(outputStream* out) const { ++ tty->print_cr("function LIR_OpAssert::print_instr unimplemented yet! "); ++ Unimplemented(); ++ /* + print_condition(out, condition()); out->print(" "); + in_opr1()->print(out); out->print(" "); + in_opr2()->print(out); out->print(", \""); + out->print("%s", msg()); out->print("\""); ++ */ + } #endif -diff --git a/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp b/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp -index 837553ddb6..c66f3102b9 100644 ---- a/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp -+++ b/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp + +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp b/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp +--- a/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp 2024-01-30 13:54:24.796042252 +0800 @@ -22,6 +22,12 @@ * */ @@ -112418,25 +111773,26 @@ index 837553ddb6..c66f3102b9 100644 #include "precompiled.hpp" #include "c1/c1_Defs.hpp" #include "c1/c1_Compilation.hpp" -@@ -482,13 +488,11 @@ void LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index, +@@ -483,13 +489,11 @@ CodeEmitInfo* null_check_info, CodeEmitInfo* range_check_info) { CodeStub* stub = new RangeCheckStub(range_check_info, index); if (index->is_constant()) { - cmp_mem_int(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), - index->as_jint(), null_check_info); - __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch -+ cmp_mem_int_branch(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), -+ index->as_jint(), stub, null_check_info); // forward branch - } else { +- } else { - cmp_reg_mem(lir_cond_aboveEqual, index, array, - arrayOopDesc::length_offset_in_bytes(), T_INT, null_check_info); - __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch ++ cmp_mem_int_branch(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), ++ index->as_jint(), stub, null_check_info); // forward branch ++ } else { + cmp_reg_mem_branch(lir_cond_aboveEqual, index, array, arrayOopDesc::length_offset_in_bytes(), + T_INT, stub, null_check_info); // forward branch } } -@@ -496,12 +500,10 @@ void LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index, +@@ -497,12 +501,10 @@ void LIRGenerator::nio_range_check(LIR_Opr buffer, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) { CodeStub* stub = new RangeCheckStub(info, index, true); if (index->is_constant()) { @@ -112452,7 +111808,7 @@ index 837553ddb6..c66f3102b9 100644 } __ move(index, result); } -@@ -934,7 +936,7 @@ LIR_Opr LIRGenerator::force_to_spill(LIR_Opr value, BasicType t) { +@@ -935,7 +937,7 @@ return tmp; } @@ -112461,7 +111817,7 @@ index 837553ddb6..c66f3102b9 100644 if (if_instr->should_profile()) { ciMethod* method = if_instr->profiled_method(); assert(method != NULL, "method should be set if branch is profiled"); -@@ -955,10 +957,17 @@ void LIRGenerator::profile_branch(If* if_instr, If::Condition cond) { +@@ -956,10 +958,17 @@ __ metadata2reg(md->constant_encoding(), md_reg); LIR_Opr data_offset_reg = new_pointer_register(); @@ -112483,7 +111839,7 @@ index 837553ddb6..c66f3102b9 100644 // MDO cells are intptr_t, so the data_reg width is arch-dependent. LIR_Opr data_reg = new_pointer_register(); -@@ -1305,8 +1314,8 @@ void LIRGenerator::do_isPrimitive(Intrinsic* x) { +@@ -1306,8 +1315,8 @@ } __ move(new LIR_Address(rcvr.result(), java_lang_Class::klass_offset_in_bytes(), T_ADDRESS), temp, info); @@ -112494,7 +111850,7 @@ index 837553ddb6..c66f3102b9 100644 } // Example: Thread.currentThread() -@@ -1499,7 +1508,6 @@ void LIRGenerator::G1SATBCardTableModRef_pre_barrier(LIR_Opr addr_opr, LIR_Opr p +@@ -1500,7 +1509,6 @@ // Read the marking-in-progress flag. LIR_Opr flag_val = new_register(T_INT); __ load(mark_active_flag_addr, flag_val); @@ -112502,7 +111858,7 @@ index 837553ddb6..c66f3102b9 100644 LIR_PatchCode pre_val_patch_code = lir_patch_none; -@@ -1528,7 +1536,7 @@ void LIRGenerator::G1SATBCardTableModRef_pre_barrier(LIR_Opr addr_opr, LIR_Opr p +@@ -1529,7 +1537,7 @@ slow = new G1PreBarrierStub(pre_val); } @@ -112511,7 +111867,7 @@ index 837553ddb6..c66f3102b9 100644 __ branch_destination(slow->continuation()); } -@@ -1586,10 +1594,8 @@ void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_Opr +@@ -1587,10 +1595,8 @@ } assert(new_val->is_register(), "must be a register at this point"); @@ -112523,7 +111879,7 @@ index 837553ddb6..c66f3102b9 100644 __ branch_destination(slow->continuation()); } -@@ -1859,12 +1865,10 @@ void LIRGenerator::do_NIOCheckIndex(Intrinsic* x) { +@@ -1860,12 +1866,10 @@ CodeEmitInfo* info = state_for(x); CodeStub* stub = new RangeCheckStub(info, index.result(), true); if (index.result()->is_constant()) { @@ -112539,7 +111895,7 @@ index 837553ddb6..c66f3102b9 100644 } __ move(index.result(), result); } else { -@@ -1945,8 +1949,8 @@ void LIRGenerator::do_LoadIndexed(LoadIndexed* x) { +@@ -1946,8 +1950,8 @@ } else if (use_length) { // TODO: use a (modified) version of array_range_check that does not require a // constant length to be loaded to a register @@ -112550,7 +111906,7 @@ index 837553ddb6..c66f3102b9 100644 } else { array_range_check(array.result(), index.result(), null_check_info, range_check_info); // The range check performs the null check, so clear it out for the load -@@ -2128,7 +2132,7 @@ void LIRGenerator::do_UnsafeGetRaw(UnsafeGetRaw* x) { +@@ -2129,7 +2133,7 @@ assert(index_op->type() == T_INT, "only int constants supported"); addr = new LIR_Address(base_op, index_op->as_jint(), dst_type); } else { @@ -112559,7 +111915,7 @@ index 837553ddb6..c66f3102b9 100644 addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type); #elif defined(GENERATE_ADDRESS_IS_PREFERRED) addr = generate_address(base_op, index_op, log2_scale, 0, dst_type); -@@ -2343,19 +2347,18 @@ void LIRGenerator::do_UnsafeGetObject(UnsafeGetObject* x) { +@@ -2344,19 +2348,18 @@ if (off.type()->is_int()) { referent_off = LIR_OprFact::intConst(java_lang_ref_Reference::referent_offset); @@ -112582,7 +111938,7 @@ index 837553ddb6..c66f3102b9 100644 } LIR_Opr src_klass = new_register(T_METADATA); if (gen_type_check) { -@@ -2365,8 +2368,7 @@ void LIRGenerator::do_UnsafeGetObject(UnsafeGetObject* x) { +@@ -2366,8 +2369,7 @@ LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(InstanceKlass::reference_type_offset()), T_BYTE); LIR_Opr reference_type = new_register(T_INT); __ move(reference_type_addr, reference_type); @@ -112592,7 +111948,7 @@ index 837553ddb6..c66f3102b9 100644 } { // We have determined that src->_klass->_reference_type != REF_NONE -@@ -2446,19 +2448,14 @@ void LIRGenerator::do_SwitchRanges(SwitchRangeArray* x, LIR_Opr value, BlockBegi +@@ -2447,19 +2449,14 @@ int high_key = one_range->high_key(); BlockBegin* dest = one_range->sux(); if (low_key == high_key) { @@ -112617,7 +111973,7 @@ index 837553ddb6..c66f3102b9 100644 __ branch_destination(L->label()); } } -@@ -2545,8 +2542,7 @@ void LIRGenerator::do_TableSwitch(TableSwitch* x) { +@@ -2546,8 +2543,7 @@ do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux()); } else { for (int i = 0; i < len; i++) { @@ -112627,7 +111983,7 @@ index 837553ddb6..c66f3102b9 100644 } __ jump(x->default_sux()); } -@@ -2571,8 +2567,7 @@ void LIRGenerator::do_LookupSwitch(LookupSwitch* x) { +@@ -2572,8 +2568,7 @@ } else { int len = x->length(); for (int i = 0; i < len; i++) { @@ -112637,7 +111993,7 @@ index 837553ddb6..c66f3102b9 100644 } __ jump(x->default_sux()); } -@@ -2624,7 +2619,6 @@ void LIRGenerator::do_Goto(Goto* x) { +@@ -2625,7 +2620,6 @@ } LIR_Opr md_reg = new_register(T_METADATA); __ metadata2reg(md->constant_encoding(), md_reg); @@ -112645,7 +112001,7 @@ index 837553ddb6..c66f3102b9 100644 increment_counter(new LIR_Address(md_reg, offset, NOT_LP64(T_INT) LP64_ONLY(T_LONG)), DataLayout::counter_increment); } -@@ -3078,8 +3072,8 @@ void LIRGenerator::do_IfOp(IfOp* x) { +@@ -3079,8 +3073,8 @@ f_val.dont_load_item(); LIR_Opr reg = rlock_result(x); @@ -112656,7 +112012,7 @@ index 837553ddb6..c66f3102b9 100644 } #ifdef JFR_HAVE_INTRINSICS -@@ -3119,8 +3113,7 @@ void LIRGenerator::do_getEventWriter(Intrinsic* x) { +@@ -3120,8 +3114,7 @@ T_OBJECT); LIR_Opr result = rlock_result(x); __ move_wide(jobj_addr, result); @@ -112666,7 +112022,7 @@ index 837553ddb6..c66f3102b9 100644 __ move_wide(new LIR_Address(result, T_OBJECT), result); __ branch_destination(L_end->label()); -@@ -3484,10 +3477,9 @@ void LIRGenerator::increment_event_counter_impl(CodeEmitInfo* info, +@@ -3485,10 +3478,9 @@ LIR_Opr meth = new_register(T_METADATA); __ metadata2reg(method->constant_encoding(), meth); __ logical_and(result, mask, result); @@ -112678,7 +112034,7 @@ index 837553ddb6..c66f3102b9 100644 __ branch_destination(overflow->continuation()); } } -@@ -3599,8 +3591,7 @@ void LIRGenerator::do_RangeCheckPredicate(RangeCheckPredicate *x) { +@@ -3600,8 +3592,7 @@ CodeEmitInfo *info = state_for(x, x->state()); CodeStub* stub = new PredicateFailedStub(info); @@ -112688,7 +112044,7 @@ index 837553ddb6..c66f3102b9 100644 } } -@@ -3748,8 +3739,7 @@ LIR_Opr LIRGenerator::maybe_mask_boolean(StoreIndexed* x, LIR_Opr array, LIR_Opr +@@ -3749,8 +3740,7 @@ __ move(new LIR_Address(klass, in_bytes(Klass::layout_helper_offset()), T_INT), layout); int diffbit = Klass::layout_helper_boolean_diffbit(); __ logical_and(layout, LIR_OprFact::intConst(diffbit), layout); @@ -112698,10 +112054,9 @@ index 837553ddb6..c66f3102b9 100644 value = value_fixed; } return value; -diff --git a/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp b/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp -index 27be79fee1..57c253db69 100644 ---- a/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp -+++ b/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp b/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp +--- a/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LIRGenerator.hpp 2023-12-20 09:23:19.918146502 +0800 @@ -22,6 +22,12 @@ * */ @@ -112715,7 +112070,7 @@ index 27be79fee1..57c253db69 100644 #ifndef SHARE_VM_C1_C1_LIRGENERATOR_HPP #define SHARE_VM_C1_C1_LIRGENERATOR_HPP -@@ -246,6 +252,9 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure { +@@ -246,6 +252,9 @@ void do_getClass(Intrinsic* x); void do_currentThread(Intrinsic* x); void do_MathIntrinsic(Intrinsic* x); @@ -112725,7 +112080,7 @@ index 27be79fee1..57c253db69 100644 void do_ArrayCopy(Intrinsic* x); void do_CompareAndSwap(Intrinsic* x, ValueType* type); void do_NIOCheckIndex(Intrinsic* x); -@@ -335,8 +344,10 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure { +@@ -335,8 +344,10 @@ void new_instance (LIR_Opr dst, ciInstanceKlass* klass, bool is_unresolved, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info); // machine dependent @@ -112738,7 +112093,7 @@ index 27be79fee1..57c253db69 100644 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info); void arraycopy_helper(Intrinsic* x, int* flags, ciArrayKlass** expected_type); -@@ -364,7 +375,7 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure { +@@ -364,7 +375,7 @@ LIR_Opr safepoint_poll_register(); @@ -112747,185 +112102,357 @@ index 27be79fee1..57c253db69 100644 void increment_event_counter_impl(CodeEmitInfo* info, ciMethod *method, int frequency, int bci, bool backedge, bool notify); -diff --git a/hotspot/src/share/vm/c1/c1_LinearScan.cpp b/hotspot/src/share/vm/c1/c1_LinearScan.cpp -index 1f6281bf25..4549ff0928 100644 ---- a/hotspot/src/share/vm/c1/c1_LinearScan.cpp -+++ b/hotspot/src/share/vm/c1/c1_LinearScan.cpp -@@ -22,6 +22,12 @@ +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_LIR.hpp b/hotspot/src/share/vm/c1/c1_LIR.hpp +--- a/hotspot/src/share/vm/c1/c1_LIR.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_LIR.hpp 2023-12-20 09:23:19.914813209 +0800 +@@ -22,6 +22,11 @@ * */ +/* + * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made ++ * modifications are Copyright (c) 2018, 2022, Loongson Technology, and are made + * available on the same license terms set forth above. + */ -+ - #include "precompiled.hpp" - #include "c1/c1_CFGPrinter.hpp" - #include "c1/c1_CodeStubs.hpp" -@@ -35,6 +41,9 @@ - #ifdef TARGET_ARCH_x86 - # include "vmreg_x86.inline.hpp" + #ifndef SHARE_VM_C1_C1_LIR_HPP + #define SHARE_VM_C1_C1_LIR_HPP + +@@ -452,7 +457,7 @@ + // for compatibility with RInfo + int fpu () const { return lo_reg_half(); } #endif -+#ifdef TARGET_ARCH_loongarch -+# include "vmreg_loongarch.inline.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "vmreg_aarch64.inline.hpp" +-#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64) ++#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64) || defined(LOONGARCH) + FloatRegister as_float_reg () const; + FloatRegister as_double_reg () const; #endif -@@ -1256,6 +1265,23 @@ void LinearScan::add_register_hints(LIR_Op* op) { - LIR_Opr move_from = cmove->in_opr1(); - LIR_Opr move_to = cmove->result_opr(); +@@ -542,7 +547,7 @@ + , _type(type) + , _disp(0) { verify(); } -+ if (move_to->is_register() && move_from->is_register()) { -+ Interval* from = interval_at(reg_num(move_from)); -+ Interval* to = interval_at(reg_num(move_to)); -+ if (from != NULL && to != NULL) { -+ to->set_register_hint(from); -+ TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num())); -+ } -+ } -+ break; -+ } -+ case lir_cmp_cmove: { -+ assert(op->as_Op4() != NULL, "lir_cmp_cmove must be LIR_Op4"); -+ LIR_Op4* cmove = (LIR_Op4*)op; +-#if defined(X86) || defined(ARM) || defined(AARCH64) ++#if defined(X86) || defined(ARM) || defined(AARCH64) || defined(LOONGARCH) + LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): + _base(base) + , _index(index) +@@ -658,7 +663,13 @@ + LIR_OprDesc::double_type | + LIR_OprDesc::cpu_register | + LIR_OprDesc::double_size); } +-#endif // PPC ++#elif defined(LOONGARCH) ++ static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | ++ (reg << LIR_OprDesc::reg2_shift) | ++ LIR_OprDesc::double_type | ++ LIR_OprDesc::fpu_register | ++ LIR_OprDesc::double_size); } ++#endif // LOONGARCH + + static LIR_Opr virtual_register(int index, BasicType type) { + LIR_Opr res; +@@ -872,9 +883,11 @@ + class LIR_OpAllocObj; + class LIR_OpRoundFP; + class LIR_Op2; ++class LIR_OpCmpBranch; + class LIR_OpDelay; + class LIR_Op3; + class LIR_OpAllocArray; ++class LIR_Op4; + class LIR_OpCall; + class LIR_OpJavaCall; + class LIR_OpRTCall; +@@ -943,6 +956,8 @@ + , lir_cmp_l2i + , lir_ucmp_fd2i + , lir_cmp_fd2i ++ , lir_cmp_branch ++ , lir_cmp_float_branch + , lir_cmove + , lir_add + , lir_sub +@@ -976,6 +991,9 @@ + , lir_idiv + , lir_irem + , end_op3 ++ , begin_op4 ++ , lir_cmp_cmove ++ , end_op4 + , begin_opJavaCall + , lir_static_call + , lir_optvirtual_call +@@ -1139,12 +1157,14 @@ + virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } + virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } + virtual LIR_OpBranch* as_OpBranch() { return NULL; } ++ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return NULL; } + virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } + virtual LIR_OpConvert* as_OpConvert() { return NULL; } + virtual LIR_Op0* as_Op0() { return NULL; } + virtual LIR_Op1* as_Op1() { return NULL; } + virtual LIR_Op2* as_Op2() { return NULL; } + virtual LIR_Op3* as_Op3() { return NULL; } ++ virtual LIR_Op4* as_Op4() { return NULL; } + virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } + virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } + virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } +@@ -1474,37 +1494,18 @@ + private: + Bytecodes::Code _bytecode; + ConversionStub* _stub; +-#if defined(PPC) || defined(AARCH64) +- LIR_Opr _tmp1; +- LIR_Opr _tmp2; +-#endif ++ LIR_Opr _tmp; + + public: +- LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) ++ LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub, LIR_Opr tmp) + : LIR_Op1(lir_convert, opr, result) + , _stub(stub) +-#ifdef PPC +- , _tmp1(LIR_OprDesc::illegalOpr()) +- , _tmp2(LIR_OprDesc::illegalOpr()) +-#endif ++ , _tmp(tmp) + , _bytecode(code) {} + +-#if defined(PPC) || defined(AARCH64) +- LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub +- ,LIR_Opr tmp1, LIR_Opr tmp2) +- : LIR_Op1(lir_convert, opr, result) +- , _stub(stub) +- , _tmp1(tmp1) +- , _tmp2(tmp2) +- , _bytecode(code) {} +-#endif +- + Bytecodes::Code bytecode() const { return _bytecode; } + ConversionStub* stub() const { return _stub; } +-#if defined(PPC) || defined(AARCH64) +- LIR_Opr tmp1() const { return _tmp1; } +- LIR_Opr tmp2() const { return _tmp2; } +-#endif ++ LIR_Opr tmp() const { return _tmp; } + + virtual void emit_code(LIR_Assembler* masm); + virtual LIR_OpConvert* as_OpConvert() { return this; } +@@ -1659,7 +1660,7 @@ + , _tmp3(LIR_OprFact::illegalOpr) + , _tmp4(LIR_OprFact::illegalOpr) + , _tmp5(LIR_OprFact::illegalOpr) { +- assert(code == lir_cmp || code == lir_assert, "code check"); ++ assert(code == lir_cmp || code == lir_cmp_branch || code == lir_cmp_float_branch || code == lir_assert, "code check"); + } + + LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) +@@ -1691,7 +1692,7 @@ + , _tmp3(LIR_OprFact::illegalOpr) + , _tmp4(LIR_OprFact::illegalOpr) + , _tmp5(LIR_OprFact::illegalOpr) { +- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); ++ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); + } + + LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, +@@ -1707,7 +1708,7 @@ + , _tmp3(tmp3) + , _tmp4(tmp4) + , _tmp5(tmp5) { +- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); ++ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); + } + + LIR_Opr in_opr1() const { return _opr1; } +@@ -1719,10 +1720,12 @@ + LIR_Opr tmp4_opr() const { return _tmp4; } + LIR_Opr tmp5_opr() const { return _tmp5; } + LIR_Condition condition() const { +- assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; ++ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); ++ return _condition; + } + void set_condition(LIR_Condition condition) { +- assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; ++ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove, "only valid for cmp and cmove"); ++ _condition = condition; + } + + void set_fpu_stack_size(int size) { _fpu_stack_size = size; } +@@ -1736,6 +1739,43 @@ + virtual void print_instr(outputStream* out) const PRODUCT_RETURN; + }; + ++class LIR_OpCmpBranch: public LIR_Op2 { ++ friend class LIR_OpVisitState; + -+ LIR_Opr move_from = cmove->in_opr3(); -+ LIR_Opr move_to = cmove->result_opr(); ++ private: ++ Label* _label; ++ BlockBegin* _block; // if this is a branch to a block, this is the block ++ BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block ++ CodeStub* _stub; // if this is a branch to a stub, this is the stub + - if (move_to->is_register() && move_from->is_register()) { - Interval* from = interval_at(reg_num(move_from)); - Interval* to = interval_at(reg_num(move_to)); -@@ -2104,7 +2130,7 @@ LIR_Opr LinearScan::calc_operand_for_interval(const Interval* interval) { - #ifdef _LP64 - return LIR_OprFact::double_cpu(assigned_reg, assigned_reg); - #else --#if defined(SPARC) || defined(PPC) -+#if defined(SPARC) || defined(PPC) || defined(LOONGARCH) - return LIR_OprFact::double_cpu(assigned_regHi, assigned_reg); - #else - return LIR_OprFact::double_cpu(assigned_reg, assigned_regHi); -@@ -3285,7 +3311,9 @@ void LinearScan::verify_no_oops_in_fixed_intervals() { - check_live = (move->patch_code() == lir_patch_none); - } - LIR_OpBranch* branch = op->as_OpBranch(); -- if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) { -+ LIR_OpCmpBranch* cmp_branch = op->as_OpCmpBranch(); -+ if ((branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) || -+ (cmp_branch != NULL && cmp_branch->stub() != NULL && cmp_branch->stub()->is_exception_throw_stub())) { - // Don't bother checking the stub in this case since the - // exception stub will never return to normal control flow. - check_live = false; -@@ -6142,6 +6170,16 @@ void ControlFlowOptimizer::substitute_branch_target(BlockBegin* block, BlockBegi - assert(op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch"); - LIR_OpBranch* branch = (LIR_OpBranch*)op; - -+ if (branch->block() == target_from) { -+ branch->change_block(target_to); -+ } -+ if (branch->ublock() == target_from) { -+ branch->change_ublock(target_to); -+ } -+ } else if (op->code() == lir_cmp_branch || op->code() == lir_cmp_float_branch) { -+ assert(op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); -+ LIR_OpCmpBranch* branch = (LIR_OpCmpBranch*)op; ++ public: ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl, CodeEmitInfo* info = NULL) ++ : LIR_Op2(lir_cmp_branch, cond, left, right, info) ++ , _label(lbl) ++ , _block(NULL) ++ , _ublock(NULL) ++ , _stub(NULL) { } + - if (branch->block() == target_from) { - branch->change_block(target_to); - } -@@ -6252,6 +6290,20 @@ void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { - instructions->truncate(instructions->length() - 1); - } - } -+ } else if (prev_op->code() == lir_cmp_branch || prev_op->code() == lir_cmp_float_branch) { -+ assert(prev_op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); -+ LIR_OpCmpBranch* prev_branch = (LIR_OpCmpBranch*)prev_op; ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeStub* stub, CodeEmitInfo* info = NULL); ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, CodeEmitInfo* info = NULL); + -+ if (prev_branch->stub() == NULL) { -+ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) { -+ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); ++ // for unordered comparisons ++ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* ublock, CodeEmitInfo* info = NULL); + -+ // eliminate a conditional branch to the immediate successor -+ prev_branch->change_block(last_branch->block()); -+ prev_branch->negate_cond(); -+ instructions->trunc_to(instructions->length() - 1); -+ } -+ } - } - } - } -@@ -6328,6 +6380,13 @@ void ControlFlowOptimizer::verify(BlockList* code) { - assert(op_branch->block() == NULL || code->index_of(op_branch->block()) != -1, "branch target not valid"); - assert(op_branch->ublock() == NULL || code->index_of(op_branch->ublock()) != -1, "branch target not valid"); - } ++ Label* label() const { return _label; } ++ BlockBegin* block() const { return _block; } ++ BlockBegin* ublock() const { return _ublock; } ++ CodeStub* stub() const { return _stub; } + -+ LIR_OpCmpBranch* op_cmp_branch = instructions->at(j)->as_OpCmpBranch(); ++ void change_block(BlockBegin* b); ++ void change_ublock(BlockBegin* b); ++ void negate_cond(); + -+ if (op_cmp_branch != NULL) { -+ assert(op_cmp_branch->block() == NULL || code->find(op_cmp_branch->block()) != -1, "branch target not valid"); -+ assert(op_cmp_branch->ublock() == NULL || code->find(op_cmp_branch->ublock()) != -1, "branch target not valid"); -+ } - } ++ virtual void emit_code(LIR_Assembler* masm); ++ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return this; } ++ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; ++}; ++ + class LIR_OpAllocArray : public LIR_Op { + friend class LIR_OpVisitState; - for (j = 0; j < block->number_of_sux() - 1; j++) { -@@ -6571,6 +6630,24 @@ void LinearScanStatistic::collect(LinearScan* allocator) { - break; - } +@@ -1776,7 +1816,6 @@ + virtual void print_instr(outputStream* out) const PRODUCT_RETURN; + }; -+ case lir_cmp_branch: -+ case lir_cmp_float_branch: { -+ LIR_OpCmpBranch* branch = op->as_OpCmpBranch(); -+ if (branch->block() == NULL) { -+ inc_counter(counter_stub_branch); -+ } else { -+ inc_counter(counter_cond_branch); -+ } -+ inc_counter(counter_cmp); -+ break; -+ } +- + class LIR_Op3: public LIR_Op { + friend class LIR_OpVisitState; + +@@ -1800,6 +1839,48 @@ + }; + + ++class LIR_Op4: public LIR_Op { ++ friend class LIR_OpVisitState; + -+ case lir_cmp_cmove: { -+ inc_counter(counter_misc_inst); -+ inc_counter(counter_cmp); -+ break; -+ } ++ private: ++ LIR_Opr _opr1; ++ LIR_Opr _opr2; ++ LIR_Opr _opr3; ++ LIR_Opr _opr4; ++ BasicType _type; ++ LIR_Condition _condition; + - case lir_neg: - case lir_add: - case lir_sub: -diff --git a/hotspot/src/share/vm/c1/c1_LinearScan.hpp b/hotspot/src/share/vm/c1/c1_LinearScan.hpp -index 96e6b3babf..576a07d73d 100644 ---- a/hotspot/src/share/vm/c1/c1_LinearScan.hpp -+++ b/hotspot/src/share/vm/c1/c1_LinearScan.hpp -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ ++ void verify() const; + - #ifndef SHARE_VM_C1_C1_LINEARSCAN_HPP - #define SHARE_VM_C1_C1_LINEARSCAN_HPP ++ public: ++ LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type) ++ : LIR_Op(code, result, NULL) ++ , _opr1(opr1) ++ , _opr2(opr2) ++ , _opr3(opr3) ++ , _opr4(opr4) ++ , _type(type) ++ , _condition(condition) { ++ assert(is_in_range(code, begin_op4, end_op4), "code check"); ++ assert(type != T_ILLEGAL, "cmove should have type"); ++ } ++ LIR_Opr in_opr1() const { return _opr1; } ++ LIR_Opr in_opr2() const { return _opr2; } ++ LIR_Opr in_opr3() const { return _opr3; } ++ LIR_Opr in_opr4() const { return _opr4; } ++ BasicType type() const { return _type; } ++ LIR_Condition condition() const { ++ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); return _condition; ++ } ++ void set_condition(LIR_Condition condition) { ++ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); _condition = condition; ++ } ++ ++ virtual void emit_code(LIR_Assembler* masm); ++ virtual LIR_Op4* as_Op4() { return this; } ++ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; ++}; ++ + //-------------------------------- + class LabelObj: public CompilationResourceObj { + private: +@@ -2141,17 +2222,9 @@ -@@ -976,6 +982,9 @@ class LinearScanTimers : public StackObj { - #ifdef TARGET_ARCH_x86 - # include "c1_LinearScan_x86.hpp" - #endif -+#ifdef TARGET_ARCH_loongarch -+# include "c1_LinearScan_loongarch.hpp" + void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } + +-#ifdef PPC +- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } +-#endif +-#if defined(AARCH64) +- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, +- ConversionStub* stub = NULL, LIR_Opr tmp1 = LIR_OprDesc::illegalOpr()) { +- append(new LIR_OpConvert(code, left, dst, stub, tmp1, LIR_OprDesc::illegalOpr())); ++ void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL, LIR_Opr tmp = LIR_OprFact::illegalOpr) { ++ append(new LIR_OpConvert(code, left, dst, stub, tmp)); + } +-#else +- void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } +-#endif + + void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } + void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } +@@ -2256,6 +2329,48 @@ + append(new LIR_OpBranch(cond, type, block, unordered)); + } + ++#if defined(X86) || defined(AARCH64) ++ ++ template ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { ++ cmp(condition, left, right, info); ++ branch(condition, type, tgt); ++ } ++ ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered) { ++ cmp(condition, left, right); ++ branch(condition, type, block, unordered); ++ } ++ ++ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { ++ cmp(condition, left, right); ++ cmove(condition, src1, src2, dst, type); ++ } ++ +#endif - #ifdef TARGET_ARCH_aarch64 - # include "c1_LinearScan_aarch64.hpp" - #endif -diff --git a/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp b/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp -index 7e22bbaa27..12aca7bf50 100644 ---- a/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp -+++ b/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp ++ ++#ifdef LOONGARCH ++ ++ template ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { ++ append(new LIR_OpCmpBranch(condition, left, right, tgt, info)); ++ } ++ ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block, BlockBegin* unordered) { ++ append(new LIR_OpCmpBranch(condition, left, right, block, unordered)); ++ } ++ ++ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { ++ append(new LIR_Op4(lir_cmp_cmove, condition, left, right, src1, src2, dst, type)); ++ } ++ ++#endif ++ ++ template ++ void cmp_branch(LIR_Condition condition, LIR_Opr left, int right, BasicType type, T tgt, CodeEmitInfo* info = NULL) { ++ cmp_branch(condition, left, LIR_OprFact::intConst(right), type, tgt, info); ++ } ++ + void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); + void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); + void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp b/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp +--- a/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_MacroAssembler.hpp 2023-12-20 09:23:19.918146502 +0800 @@ -22,6 +22,12 @@ * */ @@ -112939,7 +112466,7 @@ index 7e22bbaa27..12aca7bf50 100644 #ifndef SHARE_VM_C1_C1_MACROASSEMBLER_HPP #define SHARE_VM_C1_C1_MACROASSEMBLER_HPP -@@ -50,6 +56,9 @@ class C1_MacroAssembler: public MacroAssembler { +@@ -50,6 +56,9 @@ #ifdef TARGET_ARCH_x86 # include "c1_MacroAssembler_x86.hpp" #endif @@ -112949,10 +112476,9 @@ index 7e22bbaa27..12aca7bf50 100644 #ifdef TARGET_ARCH_aarch64 # include "c1_MacroAssembler_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/c1/c1_Runtime1.cpp b/hotspot/src/share/vm/c1/c1_Runtime1.cpp -index aebc377527..f1253506f6 100644 ---- a/hotspot/src/share/vm/c1/c1_Runtime1.cpp -+++ b/hotspot/src/share/vm/c1/c1_Runtime1.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/c1/c1_Runtime1.cpp b/hotspot/src/share/vm/c1/c1_Runtime1.cpp +--- a/hotspot/src/share/vm/c1/c1_Runtime1.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/c1/c1_Runtime1.cpp 2023-12-20 09:23:19.918146502 +0800 @@ -22,6 +22,12 @@ * */ @@ -112966,7 +112492,7 @@ index aebc377527..f1253506f6 100644 #include "precompiled.hpp" #include "asm/codeBuffer.hpp" #include "c1/c1_CodeStubs.hpp" -@@ -710,6 +716,7 @@ JRT_ENTRY(void, Runtime1::deoptimize(JavaThread* thread)) +@@ -710,6 +716,7 @@ // Return to the now deoptimized frame. JRT_END @@ -112974,7 +112500,7 @@ index aebc377527..f1253506f6 100644 static Klass* resolve_field_return_klass(methodHandle caller, int bci, TRAPS) { Bytecode_field field_access(caller, bci); -@@ -1186,6 +1193,47 @@ JRT_ENTRY(void, Runtime1::patch_code(JavaThread* thread, Runtime1::StubID stub_i +@@ -1186,6 +1193,47 @@ } JRT_END @@ -113022,37 +112548,9 @@ index aebc377527..f1253506f6 100644 // // Entry point for compiled code. We want to patch a nmethod. // We don't do a normal VM transition here because we want to -diff --git a/hotspot/src/share/vm/c1/c1_globals.hpp b/hotspot/src/share/vm/c1/c1_globals.hpp -index 8f7f9f61c9..0e2d926bdf 100644 ---- a/hotspot/src/share/vm/c1/c1_globals.hpp -+++ b/hotspot/src/share/vm/c1/c1_globals.hpp -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2015, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #ifndef SHARE_VM_C1_C1_GLOBALS_HPP - #define SHARE_VM_C1_C1_GLOBALS_HPP - -@@ -29,6 +35,9 @@ - #ifdef TARGET_ARCH_x86 - # include "c1_globals_x86.hpp" - #endif -+#ifdef TARGET_ARCH_loongarch -+# include "c1_globals_loongarch.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "c1_globals_aarch64.hpp" - #endif -diff --git a/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp b/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp -index f067419ffc..5aa19dc84f 100644 ---- a/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp -+++ b/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp b/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp +--- a/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/classfile/bytecodeAssembler.cpp 2023-12-20 09:23:19.924813093 +0800 @@ -22,6 +22,12 @@ * */ @@ -113079,10 +112577,9 @@ index f067419ffc..5aa19dc84f 100644 #ifdef TARGET_ARCH_sparc # include "bytes_sparc.hpp" #endif -diff --git a/hotspot/src/share/vm/classfile/classFileStream.hpp b/hotspot/src/share/vm/classfile/classFileStream.hpp -index 9632c8c8c2..fad25c44fc 100644 ---- a/hotspot/src/share/vm/classfile/classFileStream.hpp -+++ b/hotspot/src/share/vm/classfile/classFileStream.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/classfile/classFileStream.hpp b/hotspot/src/share/vm/classfile/classFileStream.hpp +--- a/hotspot/src/share/vm/classfile/classFileStream.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/classfile/classFileStream.hpp 2023-12-20 09:23:19.928146388 +0800 @@ -22,6 +22,12 @@ * */ @@ -113109,10 +112606,9 @@ index 9632c8c8c2..fad25c44fc 100644 #ifdef TARGET_ARCH_aarch64 # include "bytes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/classfile/stackMapTable.hpp b/hotspot/src/share/vm/classfile/stackMapTable.hpp -index a36a7ba3cf..d7c1f08644 100644 ---- a/hotspot/src/share/vm/classfile/stackMapTable.hpp -+++ b/hotspot/src/share/vm/classfile/stackMapTable.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/classfile/stackMapTable.hpp b/hotspot/src/share/vm/classfile/stackMapTable.hpp +--- a/hotspot/src/share/vm/classfile/stackMapTable.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/classfile/stackMapTable.hpp 2023-12-20 09:23:19.931479683 +0800 @@ -22,6 +22,12 @@ * */ @@ -113139,10 +112635,9 @@ index a36a7ba3cf..d7c1f08644 100644 #ifdef TARGET_ARCH_aarch64 # include "bytes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/classfile/verifier.cpp b/hotspot/src/share/vm/classfile/verifier.cpp -index c653e2b5a9..1a6b7e8b1a 100644 ---- a/hotspot/src/share/vm/classfile/verifier.cpp -+++ b/hotspot/src/share/vm/classfile/verifier.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/classfile/verifier.cpp b/hotspot/src/share/vm/classfile/verifier.cpp +--- a/hotspot/src/share/vm/classfile/verifier.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/classfile/verifier.cpp 2024-01-30 13:54:24.836041846 +0800 @@ -22,6 +22,12 @@ * */ @@ -113169,10 +112664,9 @@ index c653e2b5a9..1a6b7e8b1a 100644 #ifdef TARGET_ARCH_aarch64 # include "bytes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/code/codeBlob.cpp b/hotspot/src/share/vm/code/codeBlob.cpp -index aff2aaf0ca..9ba76007cd 100644 ---- a/hotspot/src/share/vm/code/codeBlob.cpp -+++ b/hotspot/src/share/vm/code/codeBlob.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/code/codeBlob.cpp b/hotspot/src/share/vm/code/codeBlob.cpp +--- a/hotspot/src/share/vm/code/codeBlob.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/code/codeBlob.cpp 2023-12-20 09:23:19.931479683 +0800 @@ -22,6 +22,12 @@ * */ @@ -113199,10 +112693,9 @@ index aff2aaf0ca..9ba76007cd 100644 #ifdef COMPILER1 #include "c1/c1_Runtime1.hpp" #endif -diff --git a/hotspot/src/share/vm/code/compiledIC.hpp b/hotspot/src/share/vm/code/compiledIC.hpp -index f910f11886..e282a3f3af 100644 ---- a/hotspot/src/share/vm/code/compiledIC.hpp -+++ b/hotspot/src/share/vm/code/compiledIC.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/code/compiledIC.hpp b/hotspot/src/share/vm/code/compiledIC.hpp +--- a/hotspot/src/share/vm/code/compiledIC.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/code/compiledIC.hpp 2023-12-20 09:23:19.934812978 +0800 @@ -22,6 +22,12 @@ * */ @@ -113229,10 +112722,9 @@ index f910f11886..e282a3f3af 100644 //----------------------------------------------------------------------------- // The CompiledIC represents a compiled inline cache. -diff --git a/hotspot/src/share/vm/code/relocInfo.hpp b/hotspot/src/share/vm/code/relocInfo.hpp -index ad55a2fd93..813504821d 100644 ---- a/hotspot/src/share/vm/code/relocInfo.hpp -+++ b/hotspot/src/share/vm/code/relocInfo.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/code/relocInfo.hpp b/hotspot/src/share/vm/code/relocInfo.hpp +--- a/hotspot/src/share/vm/code/relocInfo.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/code/relocInfo.hpp 2023-12-20 09:23:19.934812978 +0800 @@ -22,6 +22,12 @@ * */ @@ -113246,7 +112738,7 @@ index ad55a2fd93..813504821d 100644 #ifndef SHARE_VM_CODE_RELOCINFO_HPP #define SHARE_VM_CODE_RELOCINFO_HPP -@@ -261,7 +267,11 @@ class relocInfo VALUE_OBJ_CLASS_SPEC { +@@ -261,7 +267,11 @@ poll_return_type = 11, // polling instruction for safepoints at return metadata_type = 12, // metadata that used to be oops trampoline_stub_type = 13, // stub-entry for trampoline @@ -113258,7 +112750,7 @@ index ad55a2fd93..813504821d 100644 data_prefix_tag = 15, // tag for a prefix (carries data arguments) type_mask = 15 // A mask which selects only the above values }; -@@ -288,6 +298,7 @@ class relocInfo VALUE_OBJ_CLASS_SPEC { +@@ -288,6 +298,7 @@ ; #endif @@ -113266,7 +112758,7 @@ index ad55a2fd93..813504821d 100644 #define APPLY_TO_RELOCATIONS(visitor) \ visitor(oop) \ visitor(metadata) \ -@@ -300,9 +311,26 @@ class relocInfo VALUE_OBJ_CLASS_SPEC { +@@ -300,9 +311,26 @@ visitor(internal_word) \ visitor(poll) \ visitor(poll_return) \ @@ -113294,20 +112786,20 @@ index ad55a2fd93..813504821d 100644 public: enum { -@@ -432,6 +460,12 @@ class relocInfo VALUE_OBJ_CLASS_SPEC { - #endif +@@ -433,6 +461,12 @@ #ifdef TARGET_ARCH_ppc # include "relocInfo_ppc.hpp" -+#endif + #endif +#ifdef TARGET_ARCH_mips +# include "relocInfo_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch +# include "relocInfo_loongarch.hpp" - #endif ++#endif -@@ -1024,6 +1058,15 @@ class metadata_Relocation : public DataRelocation { + protected: +@@ -1024,6 +1058,15 @@ // Note: metadata_value transparently converts Universe::non_metadata_word to NULL. }; @@ -113323,10 +112815,9 @@ index ad55a2fd93..813504821d 100644 class virtual_call_Relocation : public CallRelocation { relocInfo::relocType type() { return relocInfo::virtual_call_type; } -diff --git a/hotspot/src/share/vm/code/vmreg.hpp b/hotspot/src/share/vm/code/vmreg.hpp -index 07b595b60a..5bc7131a8a 100644 ---- a/hotspot/src/share/vm/code/vmreg.hpp -+++ b/hotspot/src/share/vm/code/vmreg.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/code/vmreg.hpp b/hotspot/src/share/vm/code/vmreg.hpp +--- a/hotspot/src/share/vm/code/vmreg.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/code/vmreg.hpp 2023-12-20 09:23:19.938146274 +0800 @@ -22,6 +22,12 @@ * */ @@ -113353,7 +112844,7 @@ index 07b595b60a..5bc7131a8a 100644 #endif //------------------------------VMReg------------------------------------------ -@@ -158,6 +170,12 @@ public: +@@ -158,6 +170,12 @@ #ifdef TARGET_ARCH_x86 # include "vmreg_x86.hpp" #endif @@ -113366,10 +112857,9 @@ index 07b595b60a..5bc7131a8a 100644 #ifdef TARGET_ARCH_aarch64 # include "vmreg_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/compiler/disassembler.cpp b/hotspot/src/share/vm/compiler/disassembler.cpp -index dfdd5f77e7..2dd0ff69ac 100644 ---- a/hotspot/src/share/vm/compiler/disassembler.cpp -+++ b/hotspot/src/share/vm/compiler/disassembler.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/compiler/disassembler.cpp b/hotspot/src/share/vm/compiler/disassembler.cpp +--- a/hotspot/src/share/vm/compiler/disassembler.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/compiler/disassembler.cpp 2023-12-20 09:23:19.938146274 +0800 @@ -22,6 +22,12 @@ * */ @@ -113396,10 +112886,9 @@ index dfdd5f77e7..2dd0ff69ac 100644 #ifdef SHARK #include "shark/sharkEntry.hpp" #endif -diff --git a/hotspot/src/share/vm/compiler/disassembler.hpp b/hotspot/src/share/vm/compiler/disassembler.hpp -index 168851cc26..8b632748f2 100644 ---- a/hotspot/src/share/vm/compiler/disassembler.hpp -+++ b/hotspot/src/share/vm/compiler/disassembler.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/compiler/disassembler.hpp b/hotspot/src/share/vm/compiler/disassembler.hpp +--- a/hotspot/src/share/vm/compiler/disassembler.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/compiler/disassembler.hpp 2023-12-20 09:23:19.938146274 +0800 @@ -22,6 +22,12 @@ * */ @@ -113413,24 +112902,23 @@ index 168851cc26..8b632748f2 100644 #ifndef SHARE_VM_COMPILER_DISASSEMBLER_HPP #define SHARE_VM_COMPILER_DISASSEMBLER_HPP -@@ -95,6 +101,12 @@ class Disassembler { - #endif +@@ -96,6 +102,12 @@ #ifdef TARGET_ARCH_ppc # include "disassembler_ppc.hpp" -+#endif + #endif +#ifdef TARGET_ARCH_mips +# include "disassembler_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch +# include "disassembler_loongarch.hpp" - #endif ++#endif -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp -index 733b5c91ad..678a1ee836 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp -@@ -86,6 +86,9 @@ class CardTableExtension : public CardTableModRefBS { + public: +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp 2023-12-20 09:23:19.958146045 +0800 +@@ -86,6 +86,9 @@ void inline_write_ref_field_gc(void* field, oop new_val) { jbyte* byte = byte_for(field); *byte = youngergen_card; @@ -113440,11 +112928,10 @@ index 733b5c91ad..678a1ee836 100644 } // Adaptive size policy support -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp -index 1dde10746d..8b800b31c5 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp -@@ -105,6 +105,9 @@ ParMarkBitMap::mark_obj(HeapWord* addr, size_t size) +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp 2023-12-20 09:23:19.958146045 +0800 +@@ -105,6 +105,9 @@ assert(end_bit_ok, "concurrency problem"); DEBUG_ONLY(Atomic::inc_ptr(&mark_bitmap_count)); DEBUG_ONLY(Atomic::add_ptr(size, &mark_bitmap_size)); @@ -113454,11 +112941,10 @@ index 1dde10746d..8b800b31c5 100644 return true; } return false; -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp -index 6cf76353d9..4d34bc209b 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp -@@ -33,6 +33,9 @@ void ParCompactionManager::push_objarray(oop obj, size_t index) +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp 2023-12-20 09:23:19.958146045 +0800 +@@ -33,6 +33,9 @@ ObjArrayTask task(obj, index); assert(task.is_valid(), "bad ObjArrayTask"); _objarray_stack.push(task); @@ -113468,7 +112954,7 @@ index 6cf76353d9..4d34bc209b 100644 } void ParCompactionManager::push_region(size_t index) -@@ -44,6 +47,9 @@ void ParCompactionManager::push_region(size_t index) +@@ -44,6 +47,9 @@ assert(region_ptr->_pushed++ == 0, "should only be pushed once"); #endif region_stack()->push(index); @@ -113478,11 +112964,10 @@ index 6cf76353d9..4d34bc209b 100644 } #endif // SHARE_VM_GC_IMPLEMENTATION_PARALLELSCAVENGE_PSCOMPACTIONMANAGER_INLINE_HPP -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp -index 0fa980ef83..2f66493e0a 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp -@@ -499,6 +499,9 @@ void ParallelCompactData::add_obj(HeapWord* addr, size_t len) +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp 2023-12-20 09:23:19.961479341 +0800 +@@ -499,6 +499,9 @@ if (beg_region == end_region) { // All in one region. _region_data[beg_region].add_live_obj(len); @@ -113492,7 +112977,7 @@ index 0fa980ef83..2f66493e0a 100644 return; } -@@ -517,6 +520,9 @@ void ParallelCompactData::add_obj(HeapWord* addr, size_t len) +@@ -517,6 +520,9 @@ const size_t end_ofs = region_offset(addr + len - 1); _region_data[end_region].set_partial_obj_size(end_ofs + 1); _region_data[end_region].set_partial_obj_addr(addr); @@ -113502,7 +112987,7 @@ index 0fa980ef83..2f66493e0a 100644 } void -@@ -3229,6 +3235,9 @@ void PSParallelCompact::fill_blocks(size_t region_idx) +@@ -3229,6 +3235,9 @@ if (new_block != cur_block) { cur_block = new_block; sd.block(cur_block)->set_offset(bitmap->bits_to_words(live_bits)); @@ -113512,11 +112997,10 @@ index 0fa980ef83..2f66493e0a 100644 } const size_t end_bit = bitmap->find_obj_end(beg_bit, range_end); -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp -index 881f380cea..461b83930f 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp -@@ -1329,6 +1329,9 @@ inline bool PSParallelCompact::mark_obj(oop obj) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp 2023-12-20 09:23:19.961479341 +0800 +@@ -1329,6 +1329,9 @@ const int obj_size = obj->size(); if (mark_bitmap()->mark_obj(obj, obj_size)) { _summary_data.add_obj(obj, obj_size); @@ -113526,7 +113010,7 @@ index 881f380cea..461b83930f 100644 return true; } else { return false; -@@ -1363,6 +1366,9 @@ inline void PSParallelCompact::mark_and_push(ParCompactionManager* cm, T* p) { +@@ -1363,6 +1366,9 @@ oop obj = oopDesc::decode_heap_oop_not_null(heap_oop); if (mark_bitmap()->is_unmarked(obj) && mark_obj(obj)) { cm->push(obj); @@ -113536,11 +113020,10 @@ index 881f380cea..461b83930f 100644 } } } -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp -index a33132009c..291019660a 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp -@@ -41,8 +41,9 @@ template +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp 2023-12-20 09:23:19.961479341 +0800 +@@ -41,8 +41,9 @@ inline void PSPromotionManager::claim_or_forward_internal_depth(T* p) { if (p != NULL) { // XXX: error if p != NULL here oop o = oopDesc::load_decode_heap_oop_not_null(p); @@ -113552,7 +113035,7 @@ index a33132009c..291019660a 100644 // Card mark if (PSScavenge::is_obj_in_young(o)) { PSScavenge::card_table()->inline_write_ref_field_gc(p, o); -@@ -102,11 +103,19 @@ oop PSPromotionManager::copy_to_survivor_space(oop o) { +@@ -102,11 +103,19 @@ oop new_obj = NULL; @@ -113572,7 +113055,7 @@ index a33132009c..291019660a 100644 // The same test as "o->is_forwarded()" if (!test_mark->is_marked()) { bool new_obj_is_tenured = false; -@@ -141,6 +150,10 @@ oop PSPromotionManager::copy_to_survivor_space(oop o) { +@@ -141,6 +150,10 @@ } } } @@ -113583,7 +113066,7 @@ index a33132009c..291019660a 100644 } } -@@ -200,6 +213,9 @@ oop PSPromotionManager::copy_to_survivor_space(oop o) { +@@ -200,6 +213,9 @@ // Copy obj Copy::aligned_disjoint_words((HeapWord*)o, (HeapWord*)new_obj, new_obj_size); @@ -113593,7 +113076,7 @@ index a33132009c..291019660a 100644 // Now we have to CAS in the header. if (o->cas_forward_to(new_obj, test_mark)) { -@@ -247,6 +263,10 @@ oop PSPromotionManager::copy_to_survivor_space(oop o) { +@@ -247,6 +263,10 @@ // don't update this before the unallocation! new_obj = o->forwardee(); } @@ -113604,11 +113087,10 @@ index a33132009c..291019660a 100644 } else { assert(o->is_forwarded(), "Sanity"); new_obj = o->forwardee(); -diff --git a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp -index 1a722a7ca7..4980be3946 100644 ---- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp -+++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp -@@ -71,14 +71,22 @@ inline void PSScavenge::copy_and_push_safe_barrier(PSPromotionManager* pm, +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp +--- a/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/gc_implementation/parallelScavenge/psScavenge.inline.hpp 2023-12-20 09:23:19.961479341 +0800 +@@ -71,14 +71,22 @@ assert(should_scavenge(p, true), "revisiting object?"); oop o = oopDesc::load_decode_heap_oop_not_null(p); @@ -113635,7 +113117,7 @@ index 1a722a7ca7..4980be3946 100644 gclog_or_tty->print_cr("{%s %s " PTR_FORMAT " -> " PTR_FORMAT " (%d)}", "forwarding", new_obj->klass()->internal_name(), p2i((void *)o), p2i((void *)new_obj), new_obj->size()); -@@ -138,8 +146,9 @@ class PSScavengeFromKlassClosure: public OopClosure { +@@ -138,8 +146,9 @@ oop o = *p; oop new_obj; @@ -113647,10 +113129,9 @@ index 1a722a7ca7..4980be3946 100644 } else { new_obj = _pm->copy_to_survivor_space(o); } -diff --git a/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp b/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp -index e14c50bf01..8b3860070c 100644 ---- a/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp -+++ b/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp b/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp +--- a/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/abstractInterpreter.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113675,10 +113156,9 @@ index e14c50bf01..8b3860070c 100644 #endif // This file contains the platform-independent parts -diff --git a/hotspot/src/share/vm/interpreter/bytecode.hpp b/hotspot/src/share/vm/interpreter/bytecode.hpp -index 7e55fd009a..a06dcd58bc 100644 ---- a/hotspot/src/share/vm/interpreter/bytecode.hpp -+++ b/hotspot/src/share/vm/interpreter/bytecode.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/bytecode.hpp b/hotspot/src/share/vm/interpreter/bytecode.hpp +--- a/hotspot/src/share/vm/interpreter/bytecode.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/bytecode.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113705,10 +113185,9 @@ index 7e55fd009a..a06dcd58bc 100644 #ifdef TARGET_ARCH_aarch64 # include "bytes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp -index 28843715c7..c17fe8d7e0 100644 ---- a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp -+++ b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp +--- a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113732,7 +113211,7 @@ index 28843715c7..c17fe8d7e0 100644 #ifdef TARGET_ARCH_aarch64 # include "bytes_aarch64.hpp" #endif -@@ -592,6 +601,12 @@ void print(); +@@ -592,6 +601,12 @@ #ifdef TARGET_ARCH_x86 # include "bytecodeInterpreter_x86.hpp" #endif @@ -113745,10 +113224,9 @@ index 28843715c7..c17fe8d7e0 100644 #ifdef TARGET_ARCH_aarch64 # include "bytecodeInterpreter_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp -index f5db0b4d9d..8adbf95acb 100644 ---- a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp -+++ b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp +--- a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.inline.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113775,40 +113253,9 @@ index f5db0b4d9d..8adbf95acb 100644 #ifdef TARGET_ARCH_aarch64 # include "bytecodeInterpreter_aarch64.inline.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/bytecodeStream.hpp b/hotspot/src/share/vm/interpreter/bytecodeStream.hpp -index b814b88d5d..e1f2421600 100644 ---- a/hotspot/src/share/vm/interpreter/bytecodeStream.hpp -+++ b/hotspot/src/share/vm/interpreter/bytecodeStream.hpp -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2020. These -+ * modifications are Copyright (c) 2015, 2020, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #ifndef SHARE_VM_INTERPRETER_BYTECODESTREAM_HPP - #define SHARE_VM_INTERPRETER_BYTECODESTREAM_HPP - -@@ -32,6 +38,12 @@ - #ifdef TARGET_ARCH_x86 - # include "bytes_x86.hpp" - #endif -+#ifdef TARGET_ARCH_mips -+# include "bytes_mips.hpp" -+#endif -+#ifdef TARGET_ARCH_loongarch -+# include "bytes_loongarch.hpp" -+#endif - #ifdef TARGET_ARCH_aarch64 - # include "bytes_aarch64.hpp" - #endif -diff --git a/hotspot/src/share/vm/interpreter/bytecodes.cpp b/hotspot/src/share/vm/interpreter/bytecodes.cpp -index fdb880a3b3..4f5111074f 100644 ---- a/hotspot/src/share/vm/interpreter/bytecodes.cpp -+++ b/hotspot/src/share/vm/interpreter/bytecodes.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/bytecodes.cpp b/hotspot/src/share/vm/interpreter/bytecodes.cpp +--- a/hotspot/src/share/vm/interpreter/bytecodes.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/bytecodes.cpp 2024-01-30 13:54:24.866041540 +0800 @@ -22,6 +22,12 @@ * */ @@ -113835,10 +113282,9 @@ index fdb880a3b3..4f5111074f 100644 #ifdef TARGET_ARCH_aarch64 # include "bytes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/bytecodes.hpp b/hotspot/src/share/vm/interpreter/bytecodes.hpp -index c3463cd76d..bdf4c487f0 100644 ---- a/hotspot/src/share/vm/interpreter/bytecodes.hpp -+++ b/hotspot/src/share/vm/interpreter/bytecodes.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/bytecodes.hpp b/hotspot/src/share/vm/interpreter/bytecodes.hpp +--- a/hotspot/src/share/vm/interpreter/bytecodes.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/bytecodes.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113852,7 +113298,7 @@ index c3463cd76d..bdf4c487f0 100644 #ifndef SHARE_VM_INTERPRETER_BYTECODES_HPP #define SHARE_VM_INTERPRETER_BYTECODES_HPP -@@ -292,6 +298,12 @@ class Bytecodes: AllStatic { +@@ -292,6 +298,12 @@ #ifdef TARGET_ARCH_x86 # include "bytecodes_x86.hpp" #endif @@ -113865,10 +113311,9 @@ index c3463cd76d..bdf4c487f0 100644 #ifdef TARGET_ARCH_aarch64 # include "bytecodes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/cppInterpreter.hpp b/hotspot/src/share/vm/interpreter/cppInterpreter.hpp -index 6a6447503c..f9c540fb4a 100644 ---- a/hotspot/src/share/vm/interpreter/cppInterpreter.hpp -+++ b/hotspot/src/share/vm/interpreter/cppInterpreter.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/bytecodeStream.hpp b/hotspot/src/share/vm/interpreter/bytecodeStream.hpp +--- a/hotspot/src/share/vm/interpreter/bytecodeStream.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/bytecodeStream.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113879,26 +113324,25 @@ index 6a6447503c..f9c540fb4a 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_INTERPRETER_CPPINTERPRETER_HPP - #define SHARE_VM_INTERPRETER_CPPINTERPRETER_HPP + #ifndef SHARE_VM_INTERPRETER_BYTECODESTREAM_HPP + #define SHARE_VM_INTERPRETER_BYTECODESTREAM_HPP -@@ -84,6 +90,12 @@ class CppInterpreter: public AbstractInterpreter { +@@ -32,6 +38,12 @@ #ifdef TARGET_ARCH_x86 - # include "cppInterpreter_x86.hpp" + # include "bytes_x86.hpp" #endif +#ifdef TARGET_ARCH_mips -+# include "cppInterpreter_mips.hpp" ++# include "bytes_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch -+# include "cppInterpreter_loongarch.hpp" ++# include "bytes_loongarch.hpp" +#endif #ifdef TARGET_ARCH_aarch64 - # include "cppInterpreter_aarch64.hpp" + # include "bytes_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp b/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp -index 6a08a3f43f..1fd19994d7 100644 ---- a/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp -+++ b/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp b/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp +--- a/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/cppInterpreterGenerator.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113912,7 +113356,7 @@ index 6a08a3f43f..1fd19994d7 100644 #ifndef SHARE_VM_INTERPRETER_CPPINTERPRETERGENERATOR_HPP #define SHARE_VM_INTERPRETER_CPPINTERPRETERGENERATOR_HPP -@@ -50,6 +56,12 @@ class CppInterpreterGenerator: public AbstractInterpreterGenerator { +@@ -50,6 +56,12 @@ #ifdef TARGET_ARCH_x86 # include "cppInterpreterGenerator_x86.hpp" #endif @@ -113925,10 +113369,9 @@ index 6a08a3f43f..1fd19994d7 100644 #ifdef TARGET_ARCH_aarch64 # include "cppInterpreterGenerator_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/interpreter.hpp b/hotspot/src/share/vm/interpreter/interpreter.hpp -index ebfb68d36b..610949f3f7 100644 ---- a/hotspot/src/share/vm/interpreter/interpreter.hpp -+++ b/hotspot/src/share/vm/interpreter/interpreter.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/cppInterpreter.hpp b/hotspot/src/share/vm/interpreter/cppInterpreter.hpp +--- a/hotspot/src/share/vm/interpreter/cppInterpreter.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/cppInterpreter.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113939,26 +113382,25 @@ index ebfb68d36b..610949f3f7 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_INTERPRETER_INTERPRETER_HPP - #define SHARE_VM_INTERPRETER_INTERPRETER_HPP + #ifndef SHARE_VM_INTERPRETER_CPPINTERPRETER_HPP + #define SHARE_VM_INTERPRETER_CPPINTERPRETER_HPP -@@ -148,6 +154,12 @@ class Interpreter: public CC_INTERP_ONLY(CppInterpreter) NOT_CC_INTERP(TemplateI +@@ -84,6 +90,12 @@ #ifdef TARGET_ARCH_x86 - # include "interpreter_x86.hpp" + # include "cppInterpreter_x86.hpp" #endif +#ifdef TARGET_ARCH_mips -+# include "interpreter_mips.hpp" ++# include "cppInterpreter_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch -+# include "interpreter_loongarch.hpp" ++# include "cppInterpreter_loongarch.hpp" +#endif #ifdef TARGET_ARCH_aarch64 - # include "interpreter_aarch64.hpp" + # include "cppInterpreter_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp b/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp -index 1dc7cb2983..92bbe6b440 100644 ---- a/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp -+++ b/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp b/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp +--- a/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/interpreterGenerator.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -113972,7 +113414,7 @@ index 1dc7cb2983..92bbe6b440 100644 #ifndef SHARE_VM_INTERPRETER_INTERPRETERGENERATOR_HPP #define SHARE_VM_INTERPRETER_INTERPRETERGENERATOR_HPP -@@ -44,6 +50,12 @@ InterpreterGenerator(StubQueue* _code); +@@ -44,6 +50,12 @@ #ifdef TARGET_ARCH_x86 # include "interpreterGenerator_x86.hpp" #endif @@ -113985,10 +113427,38 @@ index 1dc7cb2983..92bbe6b440 100644 #ifdef TARGET_ARCH_aarch64 # include "interpreterGenerator_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp b/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp -index 5d2845383c..f48622f67e 100644 ---- a/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp -+++ b/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/interpreter.hpp b/hotspot/src/share/vm/interpreter/interpreter.hpp +--- a/hotspot/src/share/vm/interpreter/interpreter.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/interpreter.hpp 2023-12-20 09:23:19.968145932 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2020. These ++ * modifications are Copyright (c) 2015, 2020, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_VM_INTERPRETER_INTERPRETER_HPP + #define SHARE_VM_INTERPRETER_INTERPRETER_HPP + +@@ -148,6 +154,12 @@ + #ifdef TARGET_ARCH_x86 + # include "interpreter_x86.hpp" + #endif ++#ifdef TARGET_ARCH_mips ++# include "interpreter_mips.hpp" ++#endif ++#ifdef TARGET_ARCH_loongarch ++# include "interpreter_loongarch.hpp" ++#endif + #ifdef TARGET_ARCH_aarch64 + # include "interpreter_aarch64.hpp" + #endif +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp b/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp +--- a/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/interpreterRuntime.cpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -114015,7 +113485,7 @@ index 5d2845383c..f48622f67e 100644 #ifdef TARGET_ARCH_aarch64 # include "vm_version_aarch64.hpp" #endif -@@ -1290,7 +1302,7 @@ IRT_ENTRY(void, InterpreterRuntime::prepare_native_call(JavaThread* thread, Meth +@@ -1290,7 +1302,7 @@ // preparing the same method will be sure to see non-null entry & mirror. IRT_END @@ -114024,10 +113494,9 @@ index 5d2845383c..f48622f67e 100644 IRT_LEAF(void, InterpreterRuntime::popframe_move_outgoing_args(JavaThread* thread, void* src_address, void* dest_address)) if (src_address == dest_address) { return; -diff --git a/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp b/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp -index 472bf4d94c..9a98d5559c 100644 ---- a/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp -+++ b/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp b/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp +--- a/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/interpreterRuntime.hpp 2023-12-20 09:23:19.968145932 +0800 @@ -22,6 +22,12 @@ * */ @@ -114041,7 +113510,7 @@ index 472bf4d94c..9a98d5559c 100644 #ifndef SHARE_VM_INTERPRETER_INTERPRETERRUNTIME_HPP #define SHARE_VM_INTERPRETER_INTERPRETERRUNTIME_HPP -@@ -156,7 +162,7 @@ class InterpreterRuntime: AllStatic { +@@ -156,7 +162,7 @@ Method* method, intptr_t* from, intptr_t* to); @@ -114050,7 +113519,7 @@ index 472bf4d94c..9a98d5559c 100644 // Popframe support (only needed on x86, AMD64 and ARM) static void popframe_move_outgoing_args(JavaThread* thread, void* src_address, void* dest_address); #endif -@@ -165,6 +171,12 @@ class InterpreterRuntime: AllStatic { +@@ -165,6 +171,12 @@ #ifdef TARGET_ARCH_x86 # include "interpreterRT_x86.hpp" #endif @@ -114063,10 +113532,9 @@ index 472bf4d94c..9a98d5559c 100644 #ifdef TARGET_ARCH_aarch64 # include "interpreterRT_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/templateInterpreter.hpp b/hotspot/src/share/vm/interpreter/templateInterpreter.hpp -index 5f76dca8a6..757860f43c 100644 ---- a/hotspot/src/share/vm/interpreter/templateInterpreter.hpp -+++ b/hotspot/src/share/vm/interpreter/templateInterpreter.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp b/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp +--- a/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp 2023-12-20 09:23:19.971479225 +0800 @@ -22,6 +22,12 @@ * */ @@ -114077,26 +113545,25 @@ index 5f76dca8a6..757860f43c 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_INTERPRETER_TEMPLATEINTERPRETER_HPP - #define SHARE_VM_INTERPRETER_TEMPLATEINTERPRETER_HPP + #ifndef SHARE_VM_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP + #define SHARE_VM_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP -@@ -190,6 +196,12 @@ class TemplateInterpreter: public AbstractInterpreter { +@@ -89,6 +95,12 @@ #ifdef TARGET_ARCH_x86 - # include "templateInterpreter_x86.hpp" + # include "templateInterpreterGenerator_x86.hpp" #endif +#ifdef TARGET_ARCH_mips -+# include "templateInterpreter_mips.hpp" ++# include "templateInterpreterGenerator_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch -+# include "templateInterpreter_loongarch.hpp" ++# include "templateInterpreterGenerator_loongarch.hpp" +#endif #ifdef TARGET_ARCH_aarch64 - # include "templateInterpreter_aarch64.hpp" + # include "templateInterpreterGenerator_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp b/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp -index bd94bd02bc..28ca437eb2 100644 ---- a/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp -+++ b/hotspot/src/share/vm/interpreter/templateInterpreterGenerator.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/templateInterpreter.hpp b/hotspot/src/share/vm/interpreter/templateInterpreter.hpp +--- a/hotspot/src/share/vm/interpreter/templateInterpreter.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/templateInterpreter.hpp 2023-12-20 09:23:19.971479225 +0800 @@ -22,6 +22,12 @@ * */ @@ -114107,26 +113574,25 @@ index bd94bd02bc..28ca437eb2 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP - #define SHARE_VM_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP + #ifndef SHARE_VM_INTERPRETER_TEMPLATEINTERPRETER_HPP + #define SHARE_VM_INTERPRETER_TEMPLATEINTERPRETER_HPP -@@ -89,6 +95,12 @@ class TemplateInterpreterGenerator: public AbstractInterpreterGenerator { +@@ -190,6 +196,12 @@ #ifdef TARGET_ARCH_x86 - # include "templateInterpreterGenerator_x86.hpp" + # include "templateInterpreter_x86.hpp" #endif +#ifdef TARGET_ARCH_mips -+# include "templateInterpreterGenerator_mips.hpp" ++# include "templateInterpreter_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch -+# include "templateInterpreterGenerator_loongarch.hpp" ++# include "templateInterpreter_loongarch.hpp" +#endif #ifdef TARGET_ARCH_aarch64 - # include "templateInterpreterGenerator_aarch64.hpp" + # include "templateInterpreter_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/interpreter/templateTable.hpp b/hotspot/src/share/vm/interpreter/templateTable.hpp -index 60d243c16a..1b73822abd 100644 ---- a/hotspot/src/share/vm/interpreter/templateTable.hpp -+++ b/hotspot/src/share/vm/interpreter/templateTable.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/interpreter/templateTable.hpp b/hotspot/src/share/vm/interpreter/templateTable.hpp +--- a/hotspot/src/share/vm/interpreter/templateTable.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/interpreter/templateTable.hpp 2023-12-20 09:23:19.971479225 +0800 @@ -22,6 +22,12 @@ * */ @@ -114151,7 +113617,7 @@ index 60d243c16a..1b73822abd 100644 #endif #ifndef CC_INTERP -@@ -367,6 +377,10 @@ class TemplateTable: AllStatic { +@@ -367,6 +377,10 @@ # include "templateTable_zero.hpp" #elif defined TARGET_ARCH_MODEL_ppc_64 # include "templateTable_ppc_64.hpp" @@ -114162,11 +113628,10 @@ index 60d243c16a..1b73822abd 100644 #endif }; -diff --git a/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp b/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp -index 6d9ab39fdd..f4e9a4ca69 100644 ---- a/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp -+++ b/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp -@@ -116,7 +116,7 @@ inline T JfrBigEndian::read_unaligned(const address location) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp b/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp +--- a/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/jfr/utilities/jfrBigEndian.hpp 2023-12-20 09:23:19.984812406 +0800 +@@ -116,7 +116,7 @@ inline bool JfrBigEndian::platform_supports_unaligned_reads(void) { #if defined(IA32) || defined(AMD64) || defined(PPC) || defined(S390) return true; @@ -114175,10 +113640,9 @@ index 6d9ab39fdd..f4e9a4ca69 100644 return false; #else #warning "Unconfigured platform" -diff --git a/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp b/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp -index 42a8b719cd..f08f6ee13a 100644 ---- a/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp -+++ b/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp b/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp +--- a/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/jfr/writers/jfrEncoders.hpp 2023-12-20 09:23:19.984812406 +0800 @@ -22,6 +22,12 @@ * */ @@ -114205,10 +113669,9 @@ index 42a8b719cd..f08f6ee13a 100644 // // The Encoding policy prescribes a template -diff --git a/hotspot/src/share/vm/memory/barrierSet.hpp b/hotspot/src/share/vm/memory/barrierSet.hpp -index 13ff9b2738..081b70744d 100644 ---- a/hotspot/src/share/vm/memory/barrierSet.hpp -+++ b/hotspot/src/share/vm/memory/barrierSet.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/memory/barrierSet.hpp b/hotspot/src/share/vm/memory/barrierSet.hpp +--- a/hotspot/src/share/vm/memory/barrierSet.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/memory/barrierSet.hpp 2023-12-20 09:23:19.988145701 +0800 @@ -27,6 +27,7 @@ #include "memory/memRegion.hpp" @@ -114217,7 +113680,7 @@ index 13ff9b2738..081b70744d 100644 // This class provides the interface between a barrier implementation and // the rest of the system. -@@ -95,8 +96,16 @@ private: +@@ -95,8 +96,16 @@ // Keep this private so as to catch violations at build time. virtual void write_ref_field_pre_work( void* field, oop new_val) { guarantee(false, "Not needed"); }; protected: @@ -114236,7 +113699,7 @@ index 13ff9b2738..081b70744d 100644 public: // ...then the post-write version. -@@ -132,9 +141,17 @@ public: +@@ -132,9 +141,17 @@ // Below length is the # array elements being written virtual void write_ref_array_pre(oop* dst, int length, @@ -114256,11 +113719,10 @@ index 13ff9b2738..081b70744d 100644 // Below count is the # array elements being written, starting // at the address "start", which may not necessarily be HeapWord-aligned inline void write_ref_array(HeapWord* start, size_t count); -diff --git a/hotspot/src/share/vm/memory/cardTableModRefBS.hpp b/hotspot/src/share/vm/memory/cardTableModRefBS.hpp -index 01e4688836..80bd151873 100644 ---- a/hotspot/src/share/vm/memory/cardTableModRefBS.hpp -+++ b/hotspot/src/share/vm/memory/cardTableModRefBS.hpp -@@ -316,6 +316,9 @@ public: +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/memory/cardTableModRefBS.hpp b/hotspot/src/share/vm/memory/cardTableModRefBS.hpp +--- a/hotspot/src/share/vm/memory/cardTableModRefBS.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/memory/cardTableModRefBS.hpp 2023-12-20 09:23:19.988145701 +0800 +@@ -316,6 +316,9 @@ inline void inline_write_ref_array(MemRegion mr) { dirty_MemRegion(mr); @@ -114270,7 +113732,7 @@ index 01e4688836..80bd151873 100644 } protected: void write_ref_array_work(MemRegion mr) { -@@ -329,7 +332,11 @@ public: +@@ -329,7 +332,11 @@ // *** Card-table-barrier-specific things. @@ -114283,7 +113745,7 @@ index 01e4688836..80bd151873 100644 template inline void inline_write_ref_field(T* field, oop newVal, bool release) { jbyte* byte = byte_for((void*)field); -@@ -339,6 +346,9 @@ public: +@@ -339,6 +346,9 @@ } else { *byte = dirty_card; } @@ -114293,11 +113755,10 @@ index 01e4688836..80bd151873 100644 } // These are used by G1, when it uses the card table as a temporary data -diff --git a/hotspot/src/share/vm/memory/cardTableRS.cpp b/hotspot/src/share/vm/memory/cardTableRS.cpp -index fb33a708ae..da22acba47 100644 ---- a/hotspot/src/share/vm/memory/cardTableRS.cpp -+++ b/hotspot/src/share/vm/memory/cardTableRS.cpp -@@ -252,6 +252,9 @@ void ClearNoncleanCardWrapper::do_MemRegion(MemRegion mr) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/memory/cardTableRS.cpp b/hotspot/src/share/vm/memory/cardTableRS.cpp +--- a/hotspot/src/share/vm/memory/cardTableRS.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/memory/cardTableRS.cpp 2023-12-20 09:23:19.988145701 +0800 +@@ -252,6 +252,9 @@ // cur_youngergen_and_prev_nonclean_card ==> no change. void CardTableRS::write_ref_field_gc_par(void* field, oop new_val) { jbyte* entry = ct_bs()->byte_for(field); @@ -114307,7 +113768,7 @@ index fb33a708ae..da22acba47 100644 do { jbyte entry_val = *entry; // We put this first because it's probably the most common case. -@@ -266,7 +269,12 @@ void CardTableRS::write_ref_field_gc_par(void* field, oop new_val) { +@@ -266,7 +269,12 @@ jbyte new_val = cur_youngergen_and_prev_nonclean_card; jbyte res = Atomic::cmpxchg(new_val, entry, entry_val); // Did the CAS succeed? @@ -114321,11 +113782,10 @@ index fb33a708ae..da22acba47 100644 // Otherwise, retry, to see the new value. continue; } else { -diff --git a/hotspot/src/share/vm/memory/cardTableRS.hpp b/hotspot/src/share/vm/memory/cardTableRS.hpp -index 25884feac8..5d4e77f269 100644 ---- a/hotspot/src/share/vm/memory/cardTableRS.hpp -+++ b/hotspot/src/share/vm/memory/cardTableRS.hpp -@@ -121,7 +121,14 @@ public: +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/memory/cardTableRS.hpp b/hotspot/src/share/vm/memory/cardTableRS.hpp +--- a/hotspot/src/share/vm/memory/cardTableRS.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/memory/cardTableRS.hpp 2023-12-20 09:23:19.988145701 +0800 +@@ -121,7 +121,14 @@ void inline_write_ref_field_gc(void* field, oop new_val) { jbyte* byte = _ct_bs->byte_for(field); @@ -114341,10 +113801,9 @@ index 25884feac8..5d4e77f269 100644 } void write_ref_field_gc_work(void* field, oop new_val) { inline_write_ref_field_gc(field, new_val); -diff --git a/hotspot/src/share/vm/memory/metaspace.cpp b/hotspot/src/share/vm/memory/metaspace.cpp -index fb0564ac27..9cec7d4375 100644 ---- a/hotspot/src/share/vm/memory/metaspace.cpp -+++ b/hotspot/src/share/vm/memory/metaspace.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/memory/metaspace.cpp b/hotspot/src/share/vm/memory/metaspace.cpp +--- a/hotspot/src/share/vm/memory/metaspace.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/memory/metaspace.cpp 2023-12-20 09:23:19.991478997 +0800 @@ -21,6 +21,13 @@ * questions. * @@ -114359,7 +113818,7 @@ index fb0564ac27..9cec7d4375 100644 #include "precompiled.hpp" #include "gc_interface/collectedHeap.hpp" #include "memory/allocation.hpp" -@@ -3065,12 +3072,12 @@ void Metaspace::allocate_metaspace_compressed_klass_ptrs(char* requested_addr, a +@@ -3065,12 +3072,12 @@ // Don't use large pages for the class space. bool large_pages = false; @@ -114374,7 +113833,7 @@ index fb0564ac27..9cec7d4375 100644 ReservedSpace metaspace_rs; // Our compressed klass pointers may fit nicely into the lower 32 -@@ -3107,7 +3114,7 @@ void Metaspace::allocate_metaspace_compressed_klass_ptrs(char* requested_addr, a +@@ -3107,7 +3114,7 @@ } } @@ -114383,10 +113842,9 @@ index fb0564ac27..9cec7d4375 100644 if (!metaspace_rs.is_reserved()) { #if INCLUDE_CDS -diff --git a/hotspot/src/share/vm/oops/constantPool.hpp b/hotspot/src/share/vm/oops/constantPool.hpp -index ec111df04e..6c0607105c 100644 ---- a/hotspot/src/share/vm/oops/constantPool.hpp -+++ b/hotspot/src/share/vm/oops/constantPool.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/oops/constantPool.hpp b/hotspot/src/share/vm/oops/constantPool.hpp +--- a/hotspot/src/share/vm/oops/constantPool.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/oops/constantPool.hpp 2023-12-20 09:23:19.998145587 +0800 @@ -22,6 +22,12 @@ * */ @@ -114414,10 +113872,9 @@ index ec111df04e..6c0607105c 100644 // A constantPool is an array containing class constants as described in the // class file. -diff --git a/hotspot/src/share/vm/oops/klass.hpp b/hotspot/src/share/vm/oops/klass.hpp -index acef334849..23fc0b9988 100644 ---- a/hotspot/src/share/vm/oops/klass.hpp -+++ b/hotspot/src/share/vm/oops/klass.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/oops/klass.hpp b/hotspot/src/share/vm/oops/klass.hpp +--- a/hotspot/src/share/vm/oops/klass.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/oops/klass.hpp 2023-12-20 09:23:20.001478882 +0800 @@ -32,6 +32,9 @@ #include "oops/klassPS.hpp" #include "oops/metadata.hpp" @@ -114428,7 +113885,7 @@ index acef334849..23fc0b9988 100644 #include "utilities/accessFlags.hpp" #include "utilities/macros.hpp" #if INCLUDE_ALL_GCS -@@ -289,8 +292,18 @@ protected: +@@ -289,8 +292,18 @@ // The Klasses are not placed in the Heap, so the Card Table or // the Mod Union Table can't be used to mark when klasses have modified oops. // The CT and MUT bits saves this information for the individual Klasses. @@ -114449,11 +113906,10 @@ index acef334849..23fc0b9988 100644 bool has_modified_oops() { return _modified_oops == 1; } void accumulate_modified_oops() { if (has_modified_oops()) _accumulated_modified_oops = 1; } -diff --git a/hotspot/src/share/vm/oops/oop.hpp b/hotspot/src/share/vm/oops/oop.hpp -index 0678c6b3fb..1cb20e351f 100644 ---- a/hotspot/src/share/vm/oops/oop.hpp -+++ b/hotspot/src/share/vm/oops/oop.hpp -@@ -72,7 +72,13 @@ class oopDesc { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/oops/oop.hpp b/hotspot/src/share/vm/oops/oop.hpp +--- a/hotspot/src/share/vm/oops/oop.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/oops/oop.hpp 2023-12-20 09:23:20.001478882 +0800 +@@ -72,7 +72,13 @@ markOop mark() const { return _mark; } markOop* mark_addr() const { return (markOop*) &_mark; } @@ -114468,10 +113924,9 @@ index 0678c6b3fb..1cb20e351f 100644 void release_set_mark(markOop m); markOop cas_set_mark(markOop new_mark, markOop old_mark); -diff --git a/hotspot/src/share/vm/oops/oop.inline.hpp b/hotspot/src/share/vm/oops/oop.inline.hpp -index beec739d38..8660c1e331 100644 ---- a/hotspot/src/share/vm/oops/oop.inline.hpp -+++ b/hotspot/src/share/vm/oops/oop.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/oops/oop.inline.hpp b/hotspot/src/share/vm/oops/oop.inline.hpp +--- a/hotspot/src/share/vm/oops/oop.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/oops/oop.inline.hpp 2023-12-20 09:23:20.001478882 +0800 @@ -22,6 +22,12 @@ * */ @@ -114498,10 +113953,9 @@ index beec739d38..8660c1e331 100644 // Implementation of all inlined member functions defined in oop.hpp // We need a separate file to avoid circular references -diff --git a/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp b/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp -index 8a4603944e..b28bb99189 100644 ---- a/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp -+++ b/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp b/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp +--- a/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/oops/oop.pcgc.inline.hpp 2023-12-20 09:23:20.001478882 +0800 @@ -22,6 +22,12 @@ * */ @@ -114515,7 +113969,7 @@ index 8a4603944e..b28bb99189 100644 #ifndef SHARE_VM_OOPS_OOP_PCGC_INLINE_HPP #define SHARE_VM_OOPS_OOP_PCGC_INLINE_HPP -@@ -75,7 +81,7 @@ inline oop oopDesc::forward_to_atomic(oop p) { +@@ -75,7 +81,7 @@ // forwarding pointer. oldMark = curMark; } @@ -114524,10 +113978,9 @@ index 8a4603944e..b28bb99189 100644 } #endif // SHARE_VM_OOPS_OOP_PCGC_INLINE_HPP -diff --git a/hotspot/src/share/vm/opto/buildOopMap.cpp b/hotspot/src/share/vm/opto/buildOopMap.cpp -index 91642f1d7d..5df185df04 100644 ---- a/hotspot/src/share/vm/opto/buildOopMap.cpp -+++ b/hotspot/src/share/vm/opto/buildOopMap.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/buildOopMap.cpp b/hotspot/src/share/vm/opto/buildOopMap.cpp +--- a/hotspot/src/share/vm/opto/buildOopMap.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/buildOopMap.cpp 2023-12-20 09:23:20.004812178 +0800 @@ -22,6 +22,12 @@ * */ @@ -114554,11 +114007,10 @@ index 91642f1d7d..5df185df04 100644 // The functions in this file builds OopMaps after all scheduling is done. // -diff --git a/hotspot/src/share/vm/opto/bytecodeInfo.cpp b/hotspot/src/share/vm/opto/bytecodeInfo.cpp -index 7fd615d35f..ad472e8722 100644 ---- a/hotspot/src/share/vm/opto/bytecodeInfo.cpp -+++ b/hotspot/src/share/vm/opto/bytecodeInfo.cpp -@@ -361,9 +361,20 @@ bool InlineTree::try_to_inline(ciMethod* callee_method, ciMethod* caller_method, +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/bytecodeInfo.cpp b/hotspot/src/share/vm/opto/bytecodeInfo.cpp +--- a/hotspot/src/share/vm/opto/bytecodeInfo.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/bytecodeInfo.cpp 2023-12-20 09:23:20.004812178 +0800 +@@ -361,9 +361,20 @@ } else if (forced_inline()) { // Inlining was forced by CompilerOracle, ciReplay or annotation } else if (profile.count() == 0) { @@ -114579,10 +114031,36 @@ index 7fd615d35f..ad472e8722 100644 } } -diff --git a/hotspot/src/share/vm/opto/c2_globals.hpp b/hotspot/src/share/vm/opto/c2_globals.hpp -index 82d2efef92..d373b20456 100644 ---- a/hotspot/src/share/vm/opto/c2_globals.hpp -+++ b/hotspot/src/share/vm/opto/c2_globals.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/c2compiler.cpp b/hotspot/src/share/vm/opto/c2compiler.cpp +--- a/hotspot/src/share/vm/opto/c2compiler.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/c2compiler.cpp 2023-12-20 09:23:20.004812178 +0800 +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2020. These ++ * modifications are Copyright (c) 2015, 2020, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "opto/c2compiler.hpp" + #include "opto/runtime.hpp" +@@ -39,6 +45,10 @@ + # include "adfiles/ad_zero.hpp" + #elif defined TARGET_ARCH_MODEL_ppc_64 + # include "adfiles/ad_ppc_64.hpp" ++#elif defined TARGET_ARCH_MODEL_mips_64 ++# include "adfiles/ad_mips_64.hpp" ++#elif defined TARGET_ARCH_MODEL_loongarch_64 ++# include "adfiles/ad_loongarch_64.hpp" + #endif + + // register information defined by ADLC +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/c2_globals.hpp b/hotspot/src/share/vm/opto/c2_globals.hpp +--- a/hotspot/src/share/vm/opto/c2_globals.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/c2_globals.hpp 2023-12-20 09:23:20.004812178 +0800 @@ -22,6 +22,12 @@ * */ @@ -114609,38 +114087,9 @@ index 82d2efef92..d373b20456 100644 #ifdef TARGET_ARCH_arm # include "c2_globals_arm.hpp" #endif -diff --git a/hotspot/src/share/vm/opto/c2compiler.cpp b/hotspot/src/share/vm/opto/c2compiler.cpp -index 137f49600d..f689d64a38 100644 ---- a/hotspot/src/share/vm/opto/c2compiler.cpp -+++ b/hotspot/src/share/vm/opto/c2compiler.cpp -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2020. These -+ * modifications are Copyright (c) 2015, 2020, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #include "precompiled.hpp" - #include "opto/c2compiler.hpp" - #include "opto/runtime.hpp" -@@ -39,6 +45,10 @@ - # include "adfiles/ad_zero.hpp" - #elif defined TARGET_ARCH_MODEL_ppc_64 - # include "adfiles/ad_ppc_64.hpp" -+#elif defined TARGET_ARCH_MODEL_mips_64 -+# include "adfiles/ad_mips_64.hpp" -+#elif defined TARGET_ARCH_MODEL_loongarch_64 -+# include "adfiles/ad_loongarch_64.hpp" - #endif - - // register information defined by ADLC -diff --git a/hotspot/src/share/vm/opto/chaitin.hpp b/hotspot/src/share/vm/opto/chaitin.hpp -index de6d443cd3..0b27dc9335 100644 ---- a/hotspot/src/share/vm/opto/chaitin.hpp -+++ b/hotspot/src/share/vm/opto/chaitin.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/chaitin.hpp b/hotspot/src/share/vm/opto/chaitin.hpp +--- a/hotspot/src/share/vm/opto/chaitin.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/chaitin.hpp 2023-12-20 09:23:20.008145473 +0800 @@ -22,6 +22,12 @@ * */ @@ -114654,7 +114103,7 @@ index de6d443cd3..0b27dc9335 100644 #ifndef SHARE_VM_OPTO_CHAITIN_HPP #define SHARE_VM_OPTO_CHAITIN_HPP -@@ -136,8 +142,12 @@ public: +@@ -136,8 +142,12 @@ // Number of registers this live range uses when it colors private: @@ -114667,7 +114116,7 @@ index de6d443cd3..0b27dc9335 100644 public: int num_regs() const { return _num_regs; } void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; } -@@ -145,7 +155,11 @@ public: +@@ -145,7 +155,11 @@ private: // Number of physical registers this live range uses when it colors // Architecture and register-set dependent @@ -114679,10 +114128,9 @@ index de6d443cd3..0b27dc9335 100644 public: void set_reg_pressure(int i) { _reg_pressure = i; } int reg_pressure() const { return _reg_pressure; } -diff --git a/hotspot/src/share/vm/opto/compile.cpp b/hotspot/src/share/vm/opto/compile.cpp -index ae22ba84d9..9004dc0d72 100644 ---- a/hotspot/src/share/vm/opto/compile.cpp -+++ b/hotspot/src/share/vm/opto/compile.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/compile.cpp b/hotspot/src/share/vm/opto/compile.cpp +--- a/hotspot/src/share/vm/opto/compile.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/compile.cpp 2023-12-20 09:23:20.008145473 +0800 @@ -22,6 +22,12 @@ * */ @@ -114707,11 +114155,10 @@ index ae22ba84d9..9004dc0d72 100644 #endif // -------------------- Compile::mach_constant_base_node ----------------------- -diff --git a/hotspot/src/share/vm/opto/compile.hpp b/hotspot/src/share/vm/opto/compile.hpp -index b4f4cfefed..d263ee2fc4 100644 ---- a/hotspot/src/share/vm/opto/compile.hpp -+++ b/hotspot/src/share/vm/opto/compile.hpp -@@ -1025,7 +1025,7 @@ class Compile : public Phase { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/compile.hpp b/hotspot/src/share/vm/opto/compile.hpp +--- a/hotspot/src/share/vm/opto/compile.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/compile.hpp 2023-12-20 09:23:20.008145473 +0800 +@@ -1025,7 +1025,7 @@ bool in_scratch_emit_size() const { return _in_scratch_emit_size; } enum ScratchBufferBlob { @@ -114720,10 +114167,9 @@ index b4f4cfefed..d263ee2fc4 100644 MAX_locs_size = 128, // number of relocInfo elements MAX_const_size = 128, MAX_stubs_size = 128 -diff --git a/hotspot/src/share/vm/opto/gcm.cpp b/hotspot/src/share/vm/opto/gcm.cpp -index f51484efb0..12457b7c34 100644 ---- a/hotspot/src/share/vm/opto/gcm.cpp -+++ b/hotspot/src/share/vm/opto/gcm.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/gcm.cpp b/hotspot/src/share/vm/opto/gcm.cpp +--- a/hotspot/src/share/vm/opto/gcm.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/gcm.cpp 2023-12-20 09:23:20.011478768 +0800 @@ -22,6 +22,12 @@ * */ @@ -114748,10 +114194,9 @@ index f51484efb0..12457b7c34 100644 #endif -diff --git a/hotspot/src/share/vm/opto/lcm.cpp b/hotspot/src/share/vm/opto/lcm.cpp -index c6178a715b..2d492568d9 100644 ---- a/hotspot/src/share/vm/opto/lcm.cpp -+++ b/hotspot/src/share/vm/opto/lcm.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/lcm.cpp b/hotspot/src/share/vm/opto/lcm.cpp +--- a/hotspot/src/share/vm/opto/lcm.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/lcm.cpp 2023-12-20 09:23:20.011478768 +0800 @@ -22,6 +22,12 @@ * */ @@ -114776,10 +114221,9 @@ index c6178a715b..2d492568d9 100644 #endif // Optimization - Graph Style -diff --git a/hotspot/src/share/vm/opto/locknode.hpp b/hotspot/src/share/vm/opto/locknode.hpp -index b320f6bfb2..4bfb0ff072 100644 ---- a/hotspot/src/share/vm/opto/locknode.hpp -+++ b/hotspot/src/share/vm/opto/locknode.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/locknode.hpp b/hotspot/src/share/vm/opto/locknode.hpp +--- a/hotspot/src/share/vm/opto/locknode.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/locknode.hpp 2023-12-20 09:23:20.014812063 +0800 @@ -22,6 +22,12 @@ * */ @@ -114804,10 +114248,9 @@ index b320f6bfb2..4bfb0ff072 100644 #endif //------------------------------BoxLockNode------------------------------------ -diff --git a/hotspot/src/share/vm/opto/matcher.cpp b/hotspot/src/share/vm/opto/matcher.cpp -index 75f1fbee58..994de0736a 100644 ---- a/hotspot/src/share/vm/opto/matcher.cpp -+++ b/hotspot/src/share/vm/opto/matcher.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/matcher.cpp b/hotspot/src/share/vm/opto/matcher.cpp +--- a/hotspot/src/share/vm/opto/matcher.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/matcher.cpp 2023-12-20 09:23:20.018145359 +0800 @@ -22,6 +22,12 @@ * */ @@ -114832,10 +114275,9 @@ index 75f1fbee58..994de0736a 100644 #endif OptoReg::Name OptoReg::c_frame_pointer; -diff --git a/hotspot/src/share/vm/opto/output.cpp b/hotspot/src/share/vm/opto/output.cpp -index 5c9566e1ea..6579d81d35 100644 ---- a/hotspot/src/share/vm/opto/output.cpp -+++ b/hotspot/src/share/vm/opto/output.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/output.cpp b/hotspot/src/share/vm/opto/output.cpp +--- a/hotspot/src/share/vm/opto/output.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/output.cpp 2023-12-20 09:23:20.018145359 +0800 @@ -22,6 +22,12 @@ * */ @@ -114849,7 +114291,7 @@ index 5c9566e1ea..6579d81d35 100644 #include "precompiled.hpp" #include "asm/assembler.inline.hpp" #include "code/compiledIC.hpp" -@@ -844,6 +850,27 @@ void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) { +@@ -844,6 +850,27 @@ // Add the safepoint in the DebugInfoRecorder if( !mach->is_MachCall() ) { mcall = NULL; @@ -114877,7 +114319,7 @@ index 5c9566e1ea..6579d81d35 100644 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map); } else { mcall = mach->as_MachCall(); -@@ -1502,6 +1529,22 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) { +@@ -1502,6 +1529,22 @@ DEBUG_ONLY( uint instr_offset = cb->insts_size(); ) n->emit(*cb, _regalloc); current_offset = cb->insts_size(); @@ -114900,10 +114342,9 @@ index 5c9566e1ea..6579d81d35 100644 // Above we only verified that there is enough space in the instruction section. // However, the instruction may emit stubs that cause code buffer expansion. -diff --git a/hotspot/src/share/vm/opto/output.hpp b/hotspot/src/share/vm/opto/output.hpp -index ba72841363..37f954de9b 100644 ---- a/hotspot/src/share/vm/opto/output.hpp -+++ b/hotspot/src/share/vm/opto/output.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/output.hpp b/hotspot/src/share/vm/opto/output.hpp +--- a/hotspot/src/share/vm/opto/output.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/output.hpp 2023-12-20 09:23:20.018145359 +0800 @@ -22,6 +22,12 @@ * */ @@ -114928,10 +114369,9 @@ index ba72841363..37f954de9b 100644 #endif class Arena; -diff --git a/hotspot/src/share/vm/opto/regmask.cpp b/hotspot/src/share/vm/opto/regmask.cpp -index 352ccfb9d9..9a656d03ee 100644 ---- a/hotspot/src/share/vm/opto/regmask.cpp -+++ b/hotspot/src/share/vm/opto/regmask.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/regmask.cpp b/hotspot/src/share/vm/opto/regmask.cpp +--- a/hotspot/src/share/vm/opto/regmask.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/regmask.cpp 2023-12-20 09:23:20.021478654 +0800 @@ -22,6 +22,12 @@ * */ @@ -114956,10 +114396,9 @@ index 352ccfb9d9..9a656d03ee 100644 #endif #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */ -diff --git a/hotspot/src/share/vm/opto/regmask.hpp b/hotspot/src/share/vm/opto/regmask.hpp -index 5ceebb3fb8..6d08b68731 100644 ---- a/hotspot/src/share/vm/opto/regmask.hpp -+++ b/hotspot/src/share/vm/opto/regmask.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/regmask.hpp b/hotspot/src/share/vm/opto/regmask.hpp +--- a/hotspot/src/share/vm/opto/regmask.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/regmask.hpp 2023-12-20 09:23:20.021478654 +0800 @@ -22,6 +22,12 @@ * */ @@ -114984,10 +114423,9 @@ index 5ceebb3fb8..6d08b68731 100644 #endif // Some fun naming (textual) substitutions: -diff --git a/hotspot/src/share/vm/opto/runtime.cpp b/hotspot/src/share/vm/opto/runtime.cpp -index a43b37f2c5..f2bcafa2c5 100644 ---- a/hotspot/src/share/vm/opto/runtime.cpp -+++ b/hotspot/src/share/vm/opto/runtime.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/runtime.cpp b/hotspot/src/share/vm/opto/runtime.cpp +--- a/hotspot/src/share/vm/opto/runtime.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/runtime.cpp 2023-12-20 09:23:20.021478654 +0800 @@ -22,6 +22,12 @@ * */ @@ -115012,10 +114450,9 @@ index a43b37f2c5..f2bcafa2c5 100644 #endif -diff --git a/hotspot/src/share/vm/opto/type.cpp b/hotspot/src/share/vm/opto/type.cpp -index 58572f137d..299d48b12a 100644 ---- a/hotspot/src/share/vm/opto/type.cpp -+++ b/hotspot/src/share/vm/opto/type.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/opto/type.cpp b/hotspot/src/share/vm/opto/type.cpp +--- a/hotspot/src/share/vm/opto/type.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/opto/type.cpp 2023-12-20 09:23:20.024811948 +0800 @@ -22,6 +22,12 @@ * */ @@ -115029,7 +114466,7 @@ index 58572f137d..299d48b12a 100644 #include "precompiled.hpp" #include "ci/ciMethodData.hpp" #include "ci/ciTypeFlow.hpp" -@@ -68,6 +74,16 @@ const Type::TypeInfo Type::_type_info[Type::lastype] = { +@@ -68,6 +74,16 @@ { Bad, T_ILLEGAL, "vectord:", false, Op_RegD, relocInfo::none }, // VectorD { Bad, T_ILLEGAL, "vectorx:", false, 0, relocInfo::none }, // VectorX { Bad, T_ILLEGAL, "vectory:", false, 0, relocInfo::none }, // VectorY @@ -115046,10 +114483,9 @@ index 58572f137d..299d48b12a 100644 #elif defined(PPC64) { Bad, T_ILLEGAL, "vectors:", false, 0, relocInfo::none }, // VectorS { Bad, T_ILLEGAL, "vectord:", false, Op_RegL, relocInfo::none }, // VectorD -diff --git a/hotspot/src/share/vm/prims/jniCheck.cpp b/hotspot/src/share/vm/prims/jniCheck.cpp -index 593ca8a1e3..82813b71fe 100644 ---- a/hotspot/src/share/vm/prims/jniCheck.cpp -+++ b/hotspot/src/share/vm/prims/jniCheck.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/prims/jniCheck.cpp b/hotspot/src/share/vm/prims/jniCheck.cpp +--- a/hotspot/src/share/vm/prims/jniCheck.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/prims/jniCheck.cpp 2023-12-20 09:23:20.028145243 +0800 @@ -22,6 +22,12 @@ * */ @@ -115076,10 +114512,9 @@ index 593ca8a1e3..82813b71fe 100644 // Complain every extra number of unplanned local refs #define CHECK_JNI_LOCAL_REF_CAP_WARN_THRESHOLD 32 -diff --git a/hotspot/src/share/vm/prims/jni_md.h b/hotspot/src/share/vm/prims/jni_md.h -index 6209a66449..271715d4a2 100644 ---- a/hotspot/src/share/vm/prims/jni_md.h -+++ b/hotspot/src/share/vm/prims/jni_md.h +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/prims/jni_md.h b/hotspot/src/share/vm/prims/jni_md.h +--- a/hotspot/src/share/vm/prims/jni_md.h 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/prims/jni_md.h 2023-12-20 09:23:20.028145243 +0800 @@ -22,6 +22,12 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -115106,10 +114541,9 @@ index 6209a66449..271715d4a2 100644 /* -diff --git a/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp b/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp -index ab31d0d91e..0d8570b764 100644 ---- a/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp -+++ b/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp b/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp +--- a/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/prims/jvmtiClassFileReconstituter.cpp 2023-12-20 09:23:20.031478538 +0800 @@ -22,6 +22,12 @@ * */ @@ -115136,10 +114570,9 @@ index ab31d0d91e..0d8570b764 100644 // FIXME: add Deprecated attribute // FIXME: fix Synthetic attribute // FIXME: per Serguei, add error return handling for ConstantPool::copy_cpool_bytes() -diff --git a/hotspot/src/share/vm/prims/methodHandles.hpp b/hotspot/src/share/vm/prims/methodHandles.hpp -index db6e06180d..841082859a 100644 ---- a/hotspot/src/share/vm/prims/methodHandles.hpp -+++ b/hotspot/src/share/vm/prims/methodHandles.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/prims/methodHandles.hpp b/hotspot/src/share/vm/prims/methodHandles.hpp +--- a/hotspot/src/share/vm/prims/methodHandles.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/prims/methodHandles.hpp 2023-12-20 09:23:20.034811834 +0800 @@ -22,6 +22,12 @@ * */ @@ -115153,7 +114586,7 @@ index db6e06180d..841082859a 100644 #ifndef SHARE_VM_PRIMS_METHODHANDLES_HPP #define SHARE_VM_PRIMS_METHODHANDLES_HPP -@@ -198,6 +204,13 @@ public: +@@ -198,6 +204,13 @@ #ifdef TARGET_ARCH_ppc # include "methodHandles_ppc.hpp" #endif @@ -115167,10 +114600,9 @@ index db6e06180d..841082859a 100644 // Tracing static void trace_method_handle(MacroAssembler* _masm, const char* adaptername) PRODUCT_RETURN; -diff --git a/hotspot/src/share/vm/runtime/atomic.inline.hpp b/hotspot/src/share/vm/runtime/atomic.inline.hpp -index 222f29cbf4..7c7c6edb27 100644 ---- a/hotspot/src/share/vm/runtime/atomic.inline.hpp -+++ b/hotspot/src/share/vm/runtime/atomic.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/atomic.inline.hpp b/hotspot/src/share/vm/runtime/atomic.inline.hpp +--- a/hotspot/src/share/vm/runtime/atomic.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/atomic.inline.hpp 2023-12-20 09:23:20.038145129 +0800 @@ -22,6 +22,12 @@ * */ @@ -115197,10 +114629,9 @@ index 222f29cbf4..7c7c6edb27 100644 #ifdef TARGET_OS_ARCH_linux_sparc # include "atomic_linux_sparc.inline.hpp" #endif -diff --git a/hotspot/src/share/vm/runtime/deoptimization.cpp b/hotspot/src/share/vm/runtime/deoptimization.cpp -index f91afdc416..36a924fd4f 100644 ---- a/hotspot/src/share/vm/runtime/deoptimization.cpp -+++ b/hotspot/src/share/vm/runtime/deoptimization.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/deoptimization.cpp b/hotspot/src/share/vm/runtime/deoptimization.cpp +--- a/hotspot/src/share/vm/runtime/deoptimization.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/deoptimization.cpp 2023-12-20 09:23:20.038145129 +0800 @@ -22,6 +22,12 @@ * */ @@ -115240,10 +114671,9 @@ index f91afdc416..36a924fd4f 100644 #endif // COMPILER2 PRAGMA_FORMAT_MUTE_WARNINGS_FOR_GCC -diff --git a/hotspot/src/share/vm/runtime/dtraceJSDT.hpp b/hotspot/src/share/vm/runtime/dtraceJSDT.hpp -index db568def34..490c5f5a4e 100644 ---- a/hotspot/src/share/vm/runtime/dtraceJSDT.hpp -+++ b/hotspot/src/share/vm/runtime/dtraceJSDT.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/dtraceJSDT.hpp b/hotspot/src/share/vm/runtime/dtraceJSDT.hpp +--- a/hotspot/src/share/vm/runtime/dtraceJSDT.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/dtraceJSDT.hpp 2023-12-20 09:23:20.038145129 +0800 @@ -22,6 +22,12 @@ * */ @@ -115270,10 +114700,9 @@ index db568def34..490c5f5a4e 100644 class RegisteredProbes; typedef jlong OpaqueProbes; -diff --git a/hotspot/src/share/vm/runtime/frame.cpp b/hotspot/src/share/vm/runtime/frame.cpp -index 338b7ad3a7..5a161133ba 100644 ---- a/hotspot/src/share/vm/runtime/frame.cpp -+++ b/hotspot/src/share/vm/runtime/frame.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/frame.cpp b/hotspot/src/share/vm/runtime/frame.cpp +--- a/hotspot/src/share/vm/runtime/frame.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/frame.cpp 2023-12-20 09:23:20.041478424 +0800 @@ -22,6 +22,12 @@ * */ @@ -115301,10 +114730,9 @@ index 338b7ad3a7..5a161133ba 100644 PRAGMA_FORMAT_MUTE_WARNINGS_FOR_GCC -diff --git a/hotspot/src/share/vm/runtime/frame.hpp b/hotspot/src/share/vm/runtime/frame.hpp -index 2d80ecc208..4a9e6edb54 100644 ---- a/hotspot/src/share/vm/runtime/frame.hpp -+++ b/hotspot/src/share/vm/runtime/frame.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/frame.hpp b/hotspot/src/share/vm/runtime/frame.hpp +--- a/hotspot/src/share/vm/runtime/frame.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/frame.hpp 2023-12-20 09:23:20.041478424 +0800 @@ -22,6 +22,12 @@ * */ @@ -115329,7 +114757,7 @@ index 2d80ecc208..4a9e6edb54 100644 #endif #endif // COMPILER2 #ifdef TARGET_ARCH_zero -@@ -489,6 +499,12 @@ class frame VALUE_OBJ_CLASS_SPEC { +@@ -489,6 +499,12 @@ #ifdef TARGET_ARCH_x86 # include "frame_x86.hpp" #endif @@ -115342,10 +114770,9 @@ index 2d80ecc208..4a9e6edb54 100644 #ifdef TARGET_ARCH_aarch64 # include "frame_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/runtime/frame.inline.hpp b/hotspot/src/share/vm/runtime/frame.inline.hpp -index 710b82306a..704cc8df8f 100644 ---- a/hotspot/src/share/vm/runtime/frame.inline.hpp -+++ b/hotspot/src/share/vm/runtime/frame.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/frame.inline.hpp b/hotspot/src/share/vm/runtime/frame.inline.hpp +--- a/hotspot/src/share/vm/runtime/frame.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/frame.inline.hpp 2023-12-20 09:23:20.041478424 +0800 @@ -22,6 +22,12 @@ * */ @@ -115372,7 +114799,7 @@ index 710b82306a..704cc8df8f 100644 #ifdef TARGET_ARCH_zero # include "entryFrame_zero.hpp" # include "fakeStubFrame_zero.hpp" -@@ -115,6 +127,12 @@ inline oop* frame::interpreter_frame_temp_oop_addr() const { +@@ -115,6 +127,12 @@ #ifdef TARGET_ARCH_ppc # include "frame_ppc.inline.hpp" #endif @@ -115385,10 +114812,9 @@ index 710b82306a..704cc8df8f 100644 #endif // SHARE_VM_RUNTIME_FRAME_INLINE_HPP -diff --git a/hotspot/src/share/vm/runtime/globals.hpp b/hotspot/src/share/vm/runtime/globals.hpp -index 23ce8af569..f36137aabf 100644 ---- a/hotspot/src/share/vm/runtime/globals.hpp -+++ b/hotspot/src/share/vm/runtime/globals.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/globals.hpp b/hotspot/src/share/vm/runtime/globals.hpp +--- a/hotspot/src/share/vm/runtime/globals.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/globals.hpp 2023-12-20 09:23:20.041478424 +0800 @@ -55,6 +55,12 @@ #ifdef TARGET_ARCH_ppc # include "globals_ppc.hpp" @@ -115441,7 +114867,7 @@ index 23ce8af569..f36137aabf 100644 #ifdef TARGET_ARCH_arm # include "c2_globals_arm.hpp" #endif -@@ -3209,7 +3233,7 @@ class CommandLineFlags { +@@ -3209,7 +3233,7 @@ product(uintx, InitialHeapSize, 0, \ "Initial heap size (in bytes); zero means use ergonomics") \ \ @@ -115450,10 +114876,9 @@ index 23ce8af569..f36137aabf 100644 "Maximum heap size (in bytes)") \ \ product(uintx, OldSize, ScaleForWordSize(4*M), \ -diff --git a/hotspot/src/share/vm/runtime/icache.hpp b/hotspot/src/share/vm/runtime/icache.hpp -index ba81a06ff5..9c0cfdb7d7 100644 ---- a/hotspot/src/share/vm/runtime/icache.hpp -+++ b/hotspot/src/share/vm/runtime/icache.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/icache.hpp b/hotspot/src/share/vm/runtime/icache.hpp +--- a/hotspot/src/share/vm/runtime/icache.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/icache.hpp 2023-12-20 09:23:20.041478424 +0800 @@ -22,6 +22,12 @@ * */ @@ -115467,7 +114892,7 @@ index ba81a06ff5..9c0cfdb7d7 100644 #ifndef SHARE_VM_RUNTIME_ICACHE_HPP #define SHARE_VM_RUNTIME_ICACHE_HPP -@@ -86,7 +92,12 @@ class AbstractICache : AllStatic { +@@ -86,7 +92,12 @@ #ifdef TARGET_ARCH_ppc # include "icache_ppc.hpp" #endif @@ -115481,10 +114906,9 @@ index ba81a06ff5..9c0cfdb7d7 100644 class ICacheStubGenerator : public StubCodeGenerator { -diff --git a/hotspot/src/share/vm/runtime/java.cpp b/hotspot/src/share/vm/runtime/java.cpp -index 0a263b017c..9ba0decaae 100644 ---- a/hotspot/src/share/vm/runtime/java.cpp -+++ b/hotspot/src/share/vm/runtime/java.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/javaCalls.hpp b/hotspot/src/share/vm/runtime/javaCalls.hpp +--- a/hotspot/src/share/vm/runtime/javaCalls.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/javaCalls.hpp 2023-12-20 09:23:20.041478424 +0800 @@ -22,6 +22,12 @@ * */ @@ -115495,26 +114919,25 @@ index 0a263b017c..9ba0decaae 100644 + * available on the same license terms set forth above. + */ + - #include "precompiled.hpp" - #include "classfile/classLoader.hpp" - #include "classfile/symbolTable.hpp" -@@ -84,6 +90,12 @@ + #ifndef SHARE_VM_RUNTIME_JAVACALLS_HPP + #define SHARE_VM_RUNTIME_JAVACALLS_HPP + +@@ -49,6 +55,12 @@ #ifdef TARGET_ARCH_ppc - # include "vm_version_ppc.hpp" + # include "jniTypes_ppc.hpp" #endif +#ifdef TARGET_ARCH_mips -+# include "vm_version_mips.hpp" ++# include "jniTypes_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch -+# include "vm_version_loongarch.hpp" ++# include "jniTypes_loongarch.hpp" +#endif - #if INCLUDE_ALL_GCS - #include "gc_implementation/concurrentMarkSweep/concurrentMarkSweepThread.hpp" - #include "gc_implementation/parallelScavenge/psScavenge.hpp" -diff --git a/hotspot/src/share/vm/runtime/javaCalls.hpp b/hotspot/src/share/vm/runtime/javaCalls.hpp -index 6126bbe75e..1747e2b2ee 100644 ---- a/hotspot/src/share/vm/runtime/javaCalls.hpp -+++ b/hotspot/src/share/vm/runtime/javaCalls.hpp + + // A JavaCallWrapper is constructed before each JavaCall and destructed after the call. + // Its purpose is to allocate/deallocate a new handle block and to save/restore the last +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/java.cpp b/hotspot/src/share/vm/runtime/java.cpp +--- a/hotspot/src/share/vm/runtime/java.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/java.cpp 2023-12-20 09:23:20.041478424 +0800 @@ -22,6 +22,12 @@ * */ @@ -115525,26 +114948,25 @@ index 6126bbe75e..1747e2b2ee 100644 + * available on the same license terms set forth above. + */ + - #ifndef SHARE_VM_RUNTIME_JAVACALLS_HPP - #define SHARE_VM_RUNTIME_JAVACALLS_HPP - -@@ -49,6 +55,12 @@ + #include "precompiled.hpp" + #include "classfile/classLoader.hpp" + #include "classfile/symbolTable.hpp" +@@ -84,6 +90,12 @@ #ifdef TARGET_ARCH_ppc - # include "jniTypes_ppc.hpp" + # include "vm_version_ppc.hpp" #endif +#ifdef TARGET_ARCH_mips -+# include "jniTypes_mips.hpp" ++# include "vm_version_mips.hpp" +#endif +#ifdef TARGET_ARCH_loongarch -+# include "jniTypes_loongarch.hpp" ++# include "vm_version_loongarch.hpp" +#endif - - // A JavaCallWrapper is constructed before each JavaCall and destructed after the call. - // Its purpose is to allocate/deallocate a new handle block and to save/restore the last -diff --git a/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp b/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp -index 129a01e293..c2b1b2e6c3 100644 ---- a/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp -+++ b/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp + #if INCLUDE_ALL_GCS + #include "gc_implementation/concurrentMarkSweep/concurrentMarkSweepThread.hpp" + #include "gc_implementation/parallelScavenge/psScavenge.hpp" +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp b/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp +--- a/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/javaFrameAnchor.hpp 2023-12-20 09:23:20.044811719 +0800 @@ -22,6 +22,12 @@ * */ @@ -115558,7 +114980,7 @@ index 129a01e293..c2b1b2e6c3 100644 #ifndef SHARE_VM_RUNTIME_JAVAFRAMEANCHOR_HPP #define SHARE_VM_RUNTIME_JAVAFRAMEANCHOR_HPP -@@ -80,6 +86,12 @@ friend class JavaCallWrapper; +@@ -80,6 +86,12 @@ #ifdef TARGET_ARCH_x86 # include "javaFrameAnchor_x86.hpp" #endif @@ -115571,11 +114993,10 @@ index 129a01e293..c2b1b2e6c3 100644 #ifdef TARGET_ARCH_aarch64 # include "javaFrameAnchor_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/runtime/os.cpp b/hotspot/src/share/vm/runtime/os.cpp -index 96eed03670..28c78409e7 100644 ---- a/hotspot/src/share/vm/runtime/os.cpp -+++ b/hotspot/src/share/vm/runtime/os.cpp -@@ -1122,7 +1122,8 @@ bool os::is_first_C_frame(frame* fr) { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/os.cpp b/hotspot/src/share/vm/runtime/os.cpp +--- a/hotspot/src/share/vm/runtime/os.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/os.cpp 2023-12-20 09:23:20.044811719 +0800 +@@ -1122,7 +1122,8 @@ uintptr_t old_fp = (uintptr_t)fr->link(); if ((old_fp & fp_align_mask) != 0) return true; @@ -115585,10 +115006,9 @@ index 96eed03670..28c78409e7 100644 // stack grows downwards; if old_fp is below current fp or if the stack // frame is too large, either the stack is corrupted or fp is not saved -diff --git a/hotspot/src/share/vm/runtime/os.hpp b/hotspot/src/share/vm/runtime/os.hpp -index 836c231b03..0ca6e64598 100644 ---- a/hotspot/src/share/vm/runtime/os.hpp -+++ b/hotspot/src/share/vm/runtime/os.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/os.hpp b/hotspot/src/share/vm/runtime/os.hpp +--- a/hotspot/src/share/vm/runtime/os.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/os.hpp 2023-12-20 09:23:20.044811719 +0800 @@ -22,6 +22,12 @@ * */ @@ -115602,7 +115022,7 @@ index 836c231b03..0ca6e64598 100644 #ifndef SHARE_VM_RUNTIME_OS_HPP #define SHARE_VM_RUNTIME_OS_HPP -@@ -857,6 +863,12 @@ class os: AllStatic { +@@ -857,6 +863,12 @@ #ifdef TARGET_OS_ARCH_linux_x86 # include "os_linux_x86.hpp" #endif @@ -115615,10 +115035,9 @@ index 836c231b03..0ca6e64598 100644 #ifdef TARGET_OS_ARCH_linux_aarch64 # include "os_linux_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/runtime/prefetch.inline.hpp b/hotspot/src/share/vm/runtime/prefetch.inline.hpp -index f4e30de34d..fec16f842c 100644 ---- a/hotspot/src/share/vm/runtime/prefetch.inline.hpp -+++ b/hotspot/src/share/vm/runtime/prefetch.inline.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/prefetch.inline.hpp b/hotspot/src/share/vm/runtime/prefetch.inline.hpp +--- a/hotspot/src/share/vm/runtime/prefetch.inline.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/prefetch.inline.hpp 2023-12-20 09:23:20.048145015 +0800 @@ -46,6 +46,12 @@ #ifdef TARGET_OS_ARCH_linux_ppc # include "prefetch_linux_ppc.inline.hpp" @@ -115632,10 +115051,9 @@ index f4e30de34d..fec16f842c 100644 // Solaris #ifdef TARGET_OS_ARCH_solaris_x86 -diff --git a/hotspot/src/share/vm/runtime/registerMap.hpp b/hotspot/src/share/vm/runtime/registerMap.hpp -index 67ef212d65..1e26dfcba4 100644 ---- a/hotspot/src/share/vm/runtime/registerMap.hpp -+++ b/hotspot/src/share/vm/runtime/registerMap.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/registerMap.hpp b/hotspot/src/share/vm/runtime/registerMap.hpp +--- a/hotspot/src/share/vm/runtime/registerMap.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/registerMap.hpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115662,7 +115080,7 @@ index 67ef212d65..1e26dfcba4 100644 class JavaThread; -@@ -156,6 +168,12 @@ class RegisterMap : public StackObj { +@@ -156,6 +168,12 @@ #ifdef TARGET_ARCH_ppc # include "registerMap_ppc.hpp" #endif @@ -115675,10 +115093,9 @@ index 67ef212d65..1e26dfcba4 100644 }; -diff --git a/hotspot/src/share/vm/runtime/relocator.hpp b/hotspot/src/share/vm/runtime/relocator.hpp -index bb19c75fe6..53f3c9f6bd 100644 ---- a/hotspot/src/share/vm/runtime/relocator.hpp -+++ b/hotspot/src/share/vm/runtime/relocator.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/relocator.hpp b/hotspot/src/share/vm/runtime/relocator.hpp +--- a/hotspot/src/share/vm/runtime/relocator.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/relocator.hpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115705,10 +115122,9 @@ index bb19c75fe6..53f3c9f6bd 100644 // This code has been converted from the 1.1E java virtual machine // Thanks to the JavaTopics group for using the code -diff --git a/hotspot/src/share/vm/runtime/safepoint.cpp b/hotspot/src/share/vm/runtime/safepoint.cpp -index 440617c802..be0e4dd13c 100644 ---- a/hotspot/src/share/vm/runtime/safepoint.cpp -+++ b/hotspot/src/share/vm/runtime/safepoint.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/safepoint.cpp b/hotspot/src/share/vm/runtime/safepoint.cpp +--- a/hotspot/src/share/vm/runtime/safepoint.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/safepoint.cpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115737,10 +115153,9 @@ index 440617c802..be0e4dd13c 100644 #if INCLUDE_ALL_GCS #include "gc_implementation/concurrentMarkSweep/concurrentMarkSweepThread.hpp" #include "gc_implementation/shared/suspendibleThreadSet.hpp" -diff --git a/hotspot/src/share/vm/runtime/sharedRuntime.cpp b/hotspot/src/share/vm/runtime/sharedRuntime.cpp -index 5f540247f9..abcd6066b9 100644 ---- a/hotspot/src/share/vm/runtime/sharedRuntime.cpp -+++ b/hotspot/src/share/vm/runtime/sharedRuntime.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/sharedRuntime.cpp b/hotspot/src/share/vm/runtime/sharedRuntime.cpp +--- a/hotspot/src/share/vm/runtime/sharedRuntime.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/sharedRuntime.cpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115770,7 +115185,7 @@ index 5f540247f9..abcd6066b9 100644 #ifdef COMPILER1 #include "c1/c1_Runtime1.hpp" #endif -@@ -220,7 +235,6 @@ void SharedRuntime::print_ic_miss_histogram() { +@@ -220,7 +235,6 @@ } } #endif // PRODUCT @@ -115778,10 +115193,9 @@ index 5f540247f9..abcd6066b9 100644 #if INCLUDE_ALL_GCS // G1 write-barrier pre: executed before a pointer store. -diff --git a/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp b/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp -index 37880d8a5c..3987880b16 100644 ---- a/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp -+++ b/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp b/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp +--- a/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/sharedRuntimeTrig.cpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115795,7 +115209,7 @@ index 37880d8a5c..3987880b16 100644 #include "precompiled.hpp" #include "prims/jni.h" #include "runtime/interfaceSupport.hpp" -@@ -534,6 +540,15 @@ static SAFEBUF int __ieee754_rem_pio2(double x, double *y) { +@@ -534,6 +540,15 @@ * then 3 2 * sin(x) = x + (S1*x + (x *(r-y/2)+y)) */ @@ -115811,10 +115225,9 @@ index 37880d8a5c..3987880b16 100644 static const double S1 = -1.66666666666666324348e-01, /* 0xBFC55555, 0x55555549 */ -diff --git a/hotspot/src/share/vm/runtime/stackValueCollection.cpp b/hotspot/src/share/vm/runtime/stackValueCollection.cpp -index 8774768311..fe81c1bfd8 100644 ---- a/hotspot/src/share/vm/runtime/stackValueCollection.cpp -+++ b/hotspot/src/share/vm/runtime/stackValueCollection.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/stackValueCollection.cpp b/hotspot/src/share/vm/runtime/stackValueCollection.cpp +--- a/hotspot/src/share/vm/runtime/stackValueCollection.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/stackValueCollection.cpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115841,10 +115254,9 @@ index 8774768311..fe81c1bfd8 100644 PRAGMA_FORMAT_MUTE_WARNINGS_FOR_GCC -diff --git a/hotspot/src/share/vm/runtime/statSampler.cpp b/hotspot/src/share/vm/runtime/statSampler.cpp -index 41f469622f..3b43089062 100644 ---- a/hotspot/src/share/vm/runtime/statSampler.cpp -+++ b/hotspot/src/share/vm/runtime/statSampler.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/statSampler.cpp b/hotspot/src/share/vm/runtime/statSampler.cpp +--- a/hotspot/src/share/vm/runtime/statSampler.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/statSampler.cpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115871,10 +115283,9 @@ index 41f469622f..3b43089062 100644 // -------------------------------------------------------- // StatSamplerTask -diff --git a/hotspot/src/share/vm/runtime/stubRoutines.hpp b/hotspot/src/share/vm/runtime/stubRoutines.hpp -index e18b9127df..9bf933762a 100644 ---- a/hotspot/src/share/vm/runtime/stubRoutines.hpp -+++ b/hotspot/src/share/vm/runtime/stubRoutines.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/stubRoutines.hpp b/hotspot/src/share/vm/runtime/stubRoutines.hpp +--- a/hotspot/src/share/vm/runtime/stubRoutines.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/stubRoutines.hpp 2023-12-20 09:23:20.048145015 +0800 @@ -22,6 +22,12 @@ * */ @@ -115901,7 +115312,7 @@ index e18b9127df..9bf933762a 100644 // StubRoutines provides entry points to assembly routines used by // compiled code and the run-time system. Platform-specific entry -@@ -116,6 +128,10 @@ class StubRoutines: AllStatic { +@@ -116,6 +128,10 @@ # include "stubRoutines_zero.hpp" #elif defined TARGET_ARCH_MODEL_ppc_64 # include "stubRoutines_ppc_64.hpp" @@ -115912,10 +115323,9 @@ index e18b9127df..9bf933762a 100644 #endif static jint _verify_oop_count; -diff --git a/hotspot/src/share/vm/runtime/thread.cpp b/hotspot/src/share/vm/runtime/thread.cpp -index e6586c40cb..3db678ff48 100644 ---- a/hotspot/src/share/vm/runtime/thread.cpp -+++ b/hotspot/src/share/vm/runtime/thread.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/thread.cpp b/hotspot/src/share/vm/runtime/thread.cpp +--- a/hotspot/src/share/vm/runtime/thread.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/thread.cpp 2023-12-20 09:23:20.051478310 +0800 @@ -22,6 +22,12 @@ * */ @@ -115929,10 +115339,9 @@ index e6586c40cb..3db678ff48 100644 #include "precompiled.hpp" #include "classfile/classLoader.hpp" #include "classfile/javaClasses.hpp" -diff --git a/hotspot/src/share/vm/runtime/thread.hpp b/hotspot/src/share/vm/runtime/thread.hpp -index 7d80daba54..98d195f7c0 100644 ---- a/hotspot/src/share/vm/runtime/thread.hpp -+++ b/hotspot/src/share/vm/runtime/thread.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/thread.hpp b/hotspot/src/share/vm/runtime/thread.hpp +--- a/hotspot/src/share/vm/runtime/thread.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/thread.hpp 2023-12-20 09:23:20.051478310 +0800 @@ -22,6 +22,12 @@ * */ @@ -115946,7 +115355,7 @@ index 7d80daba54..98d195f7c0 100644 #ifndef SHARE_VM_RUNTIME_THREAD_HPP #define SHARE_VM_RUNTIME_THREAD_HPP -@@ -1711,6 +1717,12 @@ public: +@@ -1711,6 +1717,12 @@ #ifdef TARGET_OS_ARCH_linux_x86 # include "thread_linux_x86.hpp" #endif @@ -115959,10 +115368,9 @@ index 7d80daba54..98d195f7c0 100644 #ifdef TARGET_OS_ARCH_linux_aarch64 # include "thread_linux_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/runtime/threadLocalStorage.hpp b/hotspot/src/share/vm/runtime/threadLocalStorage.hpp -index 58c1afc810..0938b2edda 100644 ---- a/hotspot/src/share/vm/runtime/threadLocalStorage.hpp -+++ b/hotspot/src/share/vm/runtime/threadLocalStorage.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/threadLocalStorage.hpp b/hotspot/src/share/vm/runtime/threadLocalStorage.hpp +--- a/hotspot/src/share/vm/runtime/threadLocalStorage.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/threadLocalStorage.hpp 2023-12-20 09:23:20.051478310 +0800 @@ -22,6 +22,12 @@ * */ @@ -115976,7 +115384,7 @@ index 58c1afc810..0938b2edda 100644 #ifndef SHARE_VM_RUNTIME_THREADLOCALSTORAGE_HPP #define SHARE_VM_RUNTIME_THREADLOCALSTORAGE_HPP -@@ -51,6 +57,12 @@ class ThreadLocalStorage : AllStatic { +@@ -51,6 +57,12 @@ #ifdef TARGET_OS_ARCH_linux_x86 # include "threadLS_linux_x86.hpp" #endif @@ -115989,10 +115397,9 @@ index 58c1afc810..0938b2edda 100644 #ifdef TARGET_OS_ARCH_linux_aarch64 # include "threadLS_linux_aarch64.hpp" #endif -diff --git a/hotspot/src/share/vm/runtime/virtualspace.cpp b/hotspot/src/share/vm/runtime/virtualspace.cpp -index 66392b75f1..5ced38d838 100644 ---- a/hotspot/src/share/vm/runtime/virtualspace.cpp -+++ b/hotspot/src/share/vm/runtime/virtualspace.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/virtualspace.cpp b/hotspot/src/share/vm/runtime/virtualspace.cpp +--- a/hotspot/src/share/vm/runtime/virtualspace.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/virtualspace.cpp 2023-12-20 09:23:20.051478310 +0800 @@ -1,5 +1,6 @@ /* * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -116000,7 +115407,7 @@ index 66392b75f1..5ced38d838 100644 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it -@@ -147,6 +148,15 @@ void ReservedSpace::initialize(size_t size, size_t alignment, bool large, +@@ -147,6 +148,15 @@ bool special = large && !os::can_commit_large_page_memory(); char* base = NULL; @@ -116016,7 +115423,7 @@ index 66392b75f1..5ced38d838 100644 if (requested_address != 0) { requested_address -= noaccess_prefix; // adjust requested address assert(requested_address != NULL, "huge noaccess prefix?"); -@@ -193,6 +203,12 @@ void ReservedSpace::initialize(size_t size, size_t alignment, bool large, +@@ -193,6 +203,12 @@ if (failed_to_reserve_as_requested(base, requested_address, size, false)) { // OS ignored requested address. Try different address. base = NULL; @@ -116029,10 +115436,9 @@ index 66392b75f1..5ced38d838 100644 } } else { base = os::reserve_memory(size, NULL, alignment); -diff --git a/hotspot/src/share/vm/runtime/vmStructs.cpp b/hotspot/src/share/vm/runtime/vmStructs.cpp -index 32e3921b2b..c6cc4c4329 100644 ---- a/hotspot/src/share/vm/runtime/vmStructs.cpp -+++ b/hotspot/src/share/vm/runtime/vmStructs.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/vmStructs.cpp b/hotspot/src/share/vm/runtime/vmStructs.cpp +--- a/hotspot/src/share/vm/runtime/vmStructs.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/vmStructs.cpp 2023-12-20 09:23:20.054811605 +0800 @@ -22,6 +22,12 @@ * */ @@ -116083,10 +115489,9 @@ index 32e3921b2b..c6cc4c4329 100644 #endif #endif // COMPILER2 -diff --git a/hotspot/src/share/vm/runtime/vm_version.cpp b/hotspot/src/share/vm/runtime/vm_version.cpp -index 66c383bf69..9e6432416e 100644 ---- a/hotspot/src/share/vm/runtime/vm_version.cpp -+++ b/hotspot/src/share/vm/runtime/vm_version.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/runtime/vm_version.cpp b/hotspot/src/share/vm/runtime/vm_version.cpp +--- a/hotspot/src/share/vm/runtime/vm_version.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/runtime/vm_version.cpp 2023-12-20 09:23:20.054811605 +0800 @@ -22,6 +22,12 @@ * */ @@ -116113,7 +115518,7 @@ index 66c383bf69..9e6432416e 100644 const char* Abstract_VM_Version::_s_vm_release = Abstract_VM_Version::vm_release(); const char* Abstract_VM_Version::_s_internal_vm_info_string = Abstract_VM_Version::internal_vm_info_string(); -@@ -193,6 +205,14 @@ const char* Abstract_VM_Version::jre_release_version() { +@@ -193,6 +205,14 @@ #else #define CPU "ppc64" #endif @@ -116128,52 +115533,23 @@ index 66c383bf69..9e6432416e 100644 #else #define CPU IA32_ONLY("x86") \ IA64_ONLY("ia64") \ -diff --git a/hotspot/src/share/vm/utilities/copy.hpp b/hotspot/src/share/vm/utilities/copy.hpp -index c1d82c7083..1279319a17 100644 ---- a/hotspot/src/share/vm/utilities/copy.hpp -+++ b/hotspot/src/share/vm/utilities/copy.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/utilities/copy.hpp b/hotspot/src/share/vm/utilities/copy.hpp +--- a/hotspot/src/share/vm/utilities/copy.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/utilities/copy.hpp 2024-01-30 13:54:24.896041236 +0800 @@ -22,6 +22,12 @@ * */ +/* -+ * This file has been modified by Loongson Technology in 2020. These -+ * modifications are Copyright (c) 2015, 2020, Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2023. These ++ * modifications are Copyright (c) 2015, 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + #ifndef SHARE_VM_UTILITIES_COPY_HPP #define SHARE_VM_UTILITIES_COPY_HPP -@@ -331,6 +337,27 @@ class Copy : AllStatic { - #endif - } - -+ -+ // SAPJVM AS 2011-09-20. Template for atomic copy. -+ template static void copy_conjoint_atomic(T* from, T* to, size_t count) -+ { -+ if (from > to) { -+ while (count-- > 0) { -+ // Copy forwards -+ *to++ = *from++; -+ } -+ } else { -+ from += count - 1; -+ to += count - 1; -+ while (count-- > 0) { -+ // Copy backwards -+ *to-- = *from--; -+ } -+ } -+ } -+ -+ -+ - // Platform dependent implementations of the above methods. - #ifdef TARGET_ARCH_x86 - # include "copy_x86.hpp" -@@ -350,6 +377,13 @@ class Copy : AllStatic { +@@ -350,6 +356,13 @@ #ifdef TARGET_ARCH_ppc # include "copy_ppc.hpp" #endif @@ -116187,11 +115563,10 @@ index c1d82c7083..1279319a17 100644 }; -diff --git a/hotspot/src/share/vm/utilities/debug.cpp b/hotspot/src/share/vm/utilities/debug.cpp -index 58a32a2b83..1026585f84 100644 ---- a/hotspot/src/share/vm/utilities/debug.cpp -+++ b/hotspot/src/share/vm/utilities/debug.cpp -@@ -690,6 +690,7 @@ void help() { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/utilities/debug.cpp b/hotspot/src/share/vm/utilities/debug.cpp +--- a/hotspot/src/share/vm/utilities/debug.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/utilities/debug.cpp 2023-12-20 09:23:20.061478196 +0800 +@@ -690,6 +690,7 @@ tty->print_cr(" pns($sp, $ebp, $pc) on Linux/x86 or"); tty->print_cr(" pns($sp, $fp, $pc) on Linux/AArch64 or"); tty->print_cr(" pns($sp, 0, $pc) on Linux/ppc64 or"); @@ -116199,10 +115574,9 @@ index 58a32a2b83..1026585f84 100644 tty->print_cr(" pns($sp + 0x7ff, 0, $pc) on Solaris/SPARC"); tty->print_cr(" - in gdb do 'set overload-resolution off' before calling pns()"); tty->print_cr(" - in dbx do 'frame 1' before calling pns()"); -diff --git a/hotspot/src/share/vm/utilities/globalDefinitions.hpp b/hotspot/src/share/vm/utilities/globalDefinitions.hpp -index 81866b8409..61fc0c48a2 100644 ---- a/hotspot/src/share/vm/utilities/globalDefinitions.hpp -+++ b/hotspot/src/share/vm/utilities/globalDefinitions.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/utilities/globalDefinitions.hpp b/hotspot/src/share/vm/utilities/globalDefinitions.hpp +--- a/hotspot/src/share/vm/utilities/globalDefinitions.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/utilities/globalDefinitions.hpp 2023-12-20 09:23:20.064811491 +0800 @@ -22,6 +22,12 @@ * */ @@ -116216,7 +115590,7 @@ index 81866b8409..61fc0c48a2 100644 #ifndef SHARE_VM_UTILITIES_GLOBALDEFINITIONS_HPP #define SHARE_VM_UTILITIES_GLOBALDEFINITIONS_HPP -@@ -455,6 +461,12 @@ enum RTMState { +@@ -455,6 +461,12 @@ #ifdef TARGET_ARCH_ppc # include "globalDefinitions_ppc.hpp" #endif @@ -116229,10 +115603,9 @@ index 81866b8409..61fc0c48a2 100644 /* * If a platform does not support native stack walking -diff --git a/hotspot/src/share/vm/utilities/macros.hpp b/hotspot/src/share/vm/utilities/macros.hpp -index 599e1074de..41ef06e27f 100644 ---- a/hotspot/src/share/vm/utilities/macros.hpp -+++ b/hotspot/src/share/vm/utilities/macros.hpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/utilities/macros.hpp b/hotspot/src/share/vm/utilities/macros.hpp +--- a/hotspot/src/share/vm/utilities/macros.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/utilities/macros.hpp 2023-12-20 09:23:20.064811491 +0800 @@ -22,6 +22,12 @@ * */ @@ -116277,11 +115650,10 @@ index 599e1074de..41ef06e27f 100644 #if defined(PPC32) || defined(PPC64) #ifndef PPC #define PPC -diff --git a/hotspot/src/share/vm/utilities/taskqueue.hpp b/hotspot/src/share/vm/utilities/taskqueue.hpp -index bc06caccb4..46be35a325 100644 ---- a/hotspot/src/share/vm/utilities/taskqueue.hpp -+++ b/hotspot/src/share/vm/utilities/taskqueue.hpp -@@ -121,11 +121,22 @@ protected: +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/utilities/taskqueue.hpp b/hotspot/src/share/vm/utilities/taskqueue.hpp +--- a/hotspot/src/share/vm/utilities/taskqueue.hpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/utilities/taskqueue.hpp 2023-12-20 09:23:20.068144786 +0800 +@@ -121,11 +121,22 @@ Age(const Age& age) { _data = age._data; } Age(idx_t top, idx_t tag) { _fields._top = top; _fields._tag = tag; } @@ -116304,7 +115676,7 @@ index bc06caccb4..46be35a325 100644 // Increment top; if it wraps, increment tag also. void increment() { -@@ -195,23 +206,50 @@ protected: +@@ -195,23 +206,50 @@ public: TaskQueueSuper() : _bottom(0), _age() {} @@ -116356,7 +115728,7 @@ index bc06caccb4..46be35a325 100644 _age.set(0); } -@@ -263,7 +301,9 @@ protected: +@@ -263,7 +301,9 @@ typedef typename TaskQueueSuper::Age Age; typedef typename TaskQueueSuper::idx_t idx_t; @@ -116366,7 +115738,7 @@ index bc06caccb4..46be35a325 100644 using TaskQueueSuper::_age; using TaskQueueSuper::increment_index; using TaskQueueSuper::decrement_index; -@@ -327,7 +367,11 @@ template +@@ -327,7 +367,11 @@ void GenericTaskQueue::oops_do(OopClosure* f) { // tty->print_cr("START OopTaskQueue::oops_do"); uint iters = size(); @@ -116378,7 +115750,7 @@ index bc06caccb4..46be35a325 100644 for (uint i = 0; i < iters; ++i) { index = decrement_index(index); // tty->print_cr(" doing entry %d," INTPTR_T " -> " INTPTR_T, -@@ -345,14 +389,22 @@ template +@@ -345,14 +389,22 @@ bool GenericTaskQueue::push_slow(E t, uint dirty_n_elems) { if (dirty_n_elems == N - 1) { // Actually means 0, so do the push. @@ -116401,7 +115773,7 @@ index bc06caccb4..46be35a325 100644 TASKQUEUE_STATS_ONLY(stats.record_push()); return true; } -@@ -407,7 +459,11 @@ bool GenericTaskQueue::pop_global(volatile E& t) { +@@ -407,7 +459,11 @@ #if !(defined SPARC || defined IA32 || defined AMD64) OrderAccess::fence(); #endif @@ -116413,7 +115785,7 @@ index bc06caccb4..46be35a325 100644 uint n_elems = size(localBot, oldAge.top()); if (n_elems == 0) { return false; -@@ -662,7 +718,11 @@ public: +@@ -662,7 +718,11 @@ template inline bool GenericTaskQueue::push(E t) { @@ -116425,7 +115797,7 @@ index bc06caccb4..46be35a325 100644 assert(localBot < N, "_bottom out of range."); idx_t top = _age.top(); uint dirty_n_elems = dirty_size(localBot, top); -@@ -674,7 +734,11 @@ GenericTaskQueue::push(E t) { +@@ -674,7 +734,11 @@ // assignment. However, casting to E& means that we trigger an // unused-value warning. So, we cast the E& to void. (void) const_cast(_elems[localBot] = t); @@ -116437,7 +115809,7 @@ index bc06caccb4..46be35a325 100644 TASKQUEUE_STATS_ONLY(stats.record_push()); return true; } else { -@@ -684,7 +748,11 @@ GenericTaskQueue::push(E t) { +@@ -684,7 +748,11 @@ template inline bool GenericTaskQueue::pop_local(volatile E& t) { @@ -116449,7 +115821,7 @@ index bc06caccb4..46be35a325 100644 // This value cannot be N-1. That can only occur as a result of // the assignment to bottom in this method. If it does, this method // resets the size to 0 before the next call (which is sequential, -@@ -693,7 +761,11 @@ GenericTaskQueue::pop_local(volatile E& t) { +@@ -693,7 +761,11 @@ assert(dirty_n_elems != N - 1, "Shouldn't be possible..."); if (dirty_n_elems == 0) return false; localBot = decrement_index(localBot); @@ -116461,10 +115833,9 @@ index bc06caccb4..46be35a325 100644 // This is necessary to prevent any read below from being reordered // before the store just above. OrderAccess::fence(); -diff --git a/hotspot/src/share/vm/utilities/vmError.cpp b/hotspot/src/share/vm/utilities/vmError.cpp -index fa7a32508e..7098a98a9f 100644 ---- a/hotspot/src/share/vm/utilities/vmError.cpp -+++ b/hotspot/src/share/vm/utilities/vmError.cpp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/src/share/vm/utilities/vmError.cpp b/hotspot/src/share/vm/utilities/vmError.cpp +--- a/hotspot/src/share/vm/utilities/vmError.cpp 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/src/share/vm/utilities/vmError.cpp 2023-12-20 09:23:20.068144786 +0800 @@ -22,6 +22,13 @@ * */ @@ -116479,7 +115850,7 @@ index fa7a32508e..7098a98a9f 100644 #include #include "precompiled.hpp" #include "compiler/compileBroker.hpp" -@@ -488,7 +495,12 @@ void VMError::report(outputStream* st) { +@@ -488,7 +495,12 @@ JDK_Version::runtime_name() : ""; const char* runtime_version = JDK_Version::runtime_version() != NULL ? JDK_Version::runtime_version() : ""; @@ -116493,10 +115864,9 @@ index fa7a32508e..7098a98a9f 100644 st->print_cr("# Java VM: %s (%s %s %s %s)", Abstract_VM_Version::vm_name(), Abstract_VM_Version::vm_release(), -diff --git a/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh b/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh -index fcf1d04b6a..5b8e7dcce5 100644 ---- a/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh -+++ b/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh b/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh +--- a/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/compiler/criticalnatives/argumentcorruption/Test8167409.sh 2023-12-20 09:23:20.104811033 +0800 @@ -24,6 +24,12 @@ # questions. # @@ -116510,7 +115880,7 @@ index fcf1d04b6a..5b8e7dcce5 100644 ## @test Test8167409.sh ## @bug 8167409 ## @summary Invalid value passed to critical JNI function -@@ -68,6 +74,18 @@ if [ $VM_CPU = "aarch64" ]; then +@@ -68,6 +74,18 @@ exit 0; fi @@ -116529,11 +115899,10 @@ index fcf1d04b6a..5b8e7dcce5 100644 THIS_DIR=. cp ${TESTSRC}${FS}*.java ${THIS_DIR} -diff --git a/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java -index fa9a6f208b..885957cf1c 100644 ---- a/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java -+++ b/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java -@@ -34,11 +34,12 @@ import com.oracle.java.testlibrary.cli.predicate.OrPredicate; +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java +--- a/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2023-12-20 09:23:20.114810919 +0800 +@@ -34,11 +34,12 @@ public class GenericTestCaseForOtherCPU extends SHAOptionsBase.TestCase { public GenericTestCaseForOtherCPU(String optionName) { @@ -116548,11 +115917,10 @@ index fa9a6f208b..885957cf1c 100644 } @Override -diff --git a/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java b/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java -index dc8c398408..2427b2bf7b 100644 ---- a/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java -+++ b/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java -@@ -62,18 +62,24 @@ public class IntrinsicPredicates { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java b/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java +--- a/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2023-12-20 09:23:20.128144100 +0800 +@@ -62,18 +62,24 @@ = new OrPredicate( new CPUSpecificPredicate("sparc.*", new String[] { "sha1" }, null), @@ -116579,11 +115947,10 @@ index dc8c398408..2427b2bf7b 100644 public static final BooleanSupplier SHA512_INSTRUCTION_AVAILABLE = new OrPredicate( -diff --git a/hotspot/test/runtime/6929067/Test6929067.sh b/hotspot/test/runtime/6929067/Test6929067.sh -index 2bbb3401ce..1a5482e645 100644 ---- a/hotspot/test/runtime/6929067/Test6929067.sh -+++ b/hotspot/test/runtime/6929067/Test6929067.sh -@@ -97,6 +97,10 @@ case "$ARCH" in +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/runtime/6929067/Test6929067.sh b/hotspot/test/runtime/6929067/Test6929067.sh +--- a/hotspot/test/runtime/6929067/Test6929067.sh 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/runtime/6929067/Test6929067.sh 2023-12-20 09:23:20.144810575 +0800 +@@ -97,6 +97,10 @@ i686) ARCH=i386 ;; @@ -116594,11 +115961,10 @@ index 2bbb3401ce..1a5482e645 100644 # Assuming other ARCH values need no translation esac -diff --git a/hotspot/test/runtime/Unsafe/RangeCheck.java b/hotspot/test/runtime/Unsafe/RangeCheck.java -index 9ded944cb2..4d4ea2e048 100644 ---- a/hotspot/test/runtime/Unsafe/RangeCheck.java -+++ b/hotspot/test/runtime/Unsafe/RangeCheck.java -@@ -43,6 +43,7 @@ public class RangeCheck { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/runtime/Unsafe/RangeCheck.java b/hotspot/test/runtime/Unsafe/RangeCheck.java +--- a/hotspot/test/runtime/Unsafe/RangeCheck.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/runtime/Unsafe/RangeCheck.java 2023-12-20 09:23:20.154810460 +0800 +@@ -43,6 +43,7 @@ true, "-Xmx32m", "-XX:-TransmitErrorReport", @@ -116606,11 +115972,10 @@ index 9ded944cb2..4d4ea2e048 100644 DummyClassWithMainRangeCheck.class.getName()); OutputAnalyzer output = new OutputAnalyzer(pb.start()); -diff --git a/hotspot/test/test_env.sh b/hotspot/test/test_env.sh -index 5ba4f28c45..d9d8bb6b6b 100644 ---- a/hotspot/test/test_env.sh -+++ b/hotspot/test/test_env.sh -@@ -211,6 +211,29 @@ if [ $? = 0 ] +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/test_env.sh b/hotspot/test/test_env.sh +--- a/hotspot/test/test_env.sh 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/test_env.sh 2023-12-20 09:23:20.161477051 +0800 +@@ -211,6 +211,29 @@ then VM_CPU="aarch64" fi @@ -116640,11 +116005,10 @@ index 5ba4f28c45..d9d8bb6b6b 100644 export VM_TYPE VM_BITS VM_OS VM_CPU echo "VM_TYPE=${VM_TYPE}" echo "VM_BITS=${VM_BITS}" -diff --git a/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java b/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java -index 6a14079347..56a6375b5f 100644 ---- a/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java -+++ b/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java -@@ -126,6 +126,10 @@ public class Platform { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java b/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java +--- a/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/testlibrary/com/oracle/java/testlibrary/Platform.java 2023-12-20 09:23:20.164810346 +0800 +@@ -126,6 +126,10 @@ return isArch("aarch64"); } @@ -116655,7 +116019,7 @@ index 6a14079347..56a6375b5f 100644 private static boolean isArch(String archnameRE) { return Pattern.compile(archnameRE, Pattern.CASE_INSENSITIVE) .matcher(osArch) -@@ -136,6 +140,10 @@ public class Platform { +@@ -136,6 +140,10 @@ return osArch; } @@ -116666,11 +116030,10 @@ index 6a14079347..56a6375b5f 100644 /** * Return a boolean for whether we expect to be able to attach * the SA to our own processes on this system. -diff --git a/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java b/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java -index 7d56a4a3bc..41825e18b3 100644 ---- a/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java -+++ b/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java -@@ -43,7 +43,7 @@ import java.util.Set; +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java b/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java +--- a/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/hotspot/test/testlibrary_tests/TestMutuallyExclusivePlatformPredicates.java 2023-12-20 09:23:20.168143641 +0800 +@@ -43,7 +43,7 @@ */ public class TestMutuallyExclusivePlatformPredicates { private static enum MethodGroup { @@ -116679,10 +116042,33 @@ index 7d56a4a3bc..41825e18b3 100644 BITNESS("is32bit", "is64bit"), OS("isAix", "isLinux", "isSolaris", "isWindows", "isOSX"), VM_TYPE("isClient", "isServer", "isGraal", "isMinimal"), -diff --git a/jdk/make/Images.gmk b/jdk/make/Images.gmk -index 991c0af7b4..9171685655 100644 ---- a/jdk/make/Images.gmk -+++ b/jdk/make/Images.gmk +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/make/gensrc/GensrcMisc.gmk b/jdk/make/gensrc/GensrcMisc.gmk +--- a/jdk/make/gensrc/GensrcMisc.gmk 2024-01-11 09:53:23.000000000 +0800 ++++ b/jdk/make/gensrc/GensrcMisc.gmk 2023-12-20 09:23:20.694804279 +0800 +@@ -23,6 +23,12 @@ + # questions. + # + ++# ++# This file has been modified by Loongson Technology in 2018. These ++# modifications are Copyright (c) 2018, Loongson Technology, and are made ++# available on the same license terms set forth above. ++# ++ + include ProfileNames.gmk + + ################################################################################ +@@ -39,6 +45,7 @@ + $(SED) -e 's/@@launcher_name@@/$(LAUNCHER_NAME)/g' \ + -e 's/@@java_version@@/$(RELEASE)/g' \ + -e 's/@@java_runtime_version@@/$(FULL_VERSION)/g' \ ++ -e 's/@@loongson_runtime_name@@/$(LOONGSON_RUNTIME_NAME)/g' \ + -e 's/@@java_runtime_name@@/$(RUNTIME_NAME)/g' \ + -e 's/@@java_profile_name@@/$(call profile_version_name, $@)/g' \ + $< > $@.tmp +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/make/Images.gmk b/jdk/make/Images.gmk +--- a/jdk/make/Images.gmk 2024-01-11 09:53:23.000000000 +0800 ++++ b/jdk/make/Images.gmk 2023-12-20 09:23:20.618138492 +0800 @@ -23,6 +23,12 @@ # questions. # @@ -116696,7 +116082,7 @@ index 991c0af7b4..9171685655 100644 include $(SPEC) include MakeBase.gmk include JavaCompilation.gmk -@@ -650,6 +656,11 @@ $(JDK_IMAGE_DIR)/src.zip: $(IMAGES_OUTPUTDIR)/src.zip +@@ -650,6 +656,11 @@ $(ECHO) $(LOG_INFO) Copying $(patsubst $(OUTPUT_ROOT)/%,%,$@) $(install-file) @@ -116708,11 +116094,10 @@ index 991c0af7b4..9171685655 100644 ################################################################################ # Post processing (strip etc) -@@ -728,6 +739,14 @@ ifneq ($(POST_STRIP_CMD), ) - +@@ -729,6 +740,14 @@ endif -+################################################################################ + ################################################################################ +# Loongson added list, architecture dependent files +ifeq ($(OPENJDK_TARGET_CPU), mips64) + ifeq ($(OPENJDK_TARGET_CPU_ENDIAN), little) @@ -116720,10 +116105,11 @@ index 991c0af7b4..9171685655 100644 + endif +endif + - ################################################################################ ++################################################################################ # Include the custom makefile right here, after all variables have been defined -@@ -753,6 +772,7 @@ jdk-image: $(JDK_BIN_TARGETS) $(JDKJRE_BIN_TARGETS) \ + # so that they may be overridden, but before the main targets are declared, so +@@ -753,6 +772,7 @@ $(JDKJRE_DOC_TARGETS) $(JDK_DOC_TARGETS) \ $(JDK_INFO_FILE) $(JDKJRE_STRIP_LIST) $(JDK_BIN_STRIP_LIST) \ $(JDK_IMAGE_DIR)/src.zip \ @@ -116731,35 +116117,9 @@ index 991c0af7b4..9171685655 100644 $(JDK_BIN_ISADIR_LINK_TARGETS) $(JDKJRE_BIN_ISADIR_LINK_TARGETS) jre-overlay-image: $(JRE_OVERLAY_BIN_TARGETS) $(JRE_OVERLAY_LIB_TARGETS) \ -diff --git a/jdk/make/gensrc/GensrcMisc.gmk b/jdk/make/gensrc/GensrcMisc.gmk -index 0e3dee5ca3..66f19f4d25 100644 ---- a/jdk/make/gensrc/GensrcMisc.gmk -+++ b/jdk/make/gensrc/GensrcMisc.gmk -@@ -23,6 +23,12 @@ - # questions. - # - -+# -+# This file has been modified by Loongson Technology in 2018. These -+# modifications are Copyright (c) 2018, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# -+ - include ProfileNames.gmk - - ################################################################################ -@@ -39,6 +45,7 @@ $(PROFILE_VERSION_JAVA_TARGETS): \ - $(SED) -e 's/@@launcher_name@@/$(LAUNCHER_NAME)/g' \ - -e 's/@@java_version@@/$(RELEASE)/g' \ - -e 's/@@java_runtime_version@@/$(FULL_VERSION)/g' \ -+ -e 's/@@loongson_runtime_name@@/$(LOONGSON_RUNTIME_NAME)/g' \ - -e 's/@@java_runtime_name@@/$(RUNTIME_NAME)/g' \ - -e 's/@@java_profile_name@@/$(call profile_version_name, $@)/g' \ - $< > $@.tmp -diff --git a/jdk/make/lib/SoundLibraries.gmk b/jdk/make/lib/SoundLibraries.gmk -index b59a9462ec..8ce97dc854 100644 ---- a/jdk/make/lib/SoundLibraries.gmk -+++ b/jdk/make/lib/SoundLibraries.gmk +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/make/lib/SoundLibraries.gmk b/jdk/make/lib/SoundLibraries.gmk +--- a/jdk/make/lib/SoundLibraries.gmk 2024-01-11 09:53:23.000000000 +0800 ++++ b/jdk/make/lib/SoundLibraries.gmk 2023-12-20 09:23:20.694804279 +0800 @@ -23,6 +23,12 @@ # questions. # @@ -116773,7 +116133,7 @@ index b59a9462ec..8ce97dc854 100644 LIBJSOUND_SRC_DIRS := \ $(JDK_TOPDIR)/src/share/native/com/sun/media/sound \ $(JDK_TOPDIR)/src/$(OPENJDK_TARGET_OS_API_DIR)/native/com/sun/media/sound -@@ -136,6 +142,14 @@ else +@@ -136,6 +142,14 @@ LIBJSOUND_CFLAGS += -DX_ARCH=X_PPC endif @@ -116788,10 +116148,9 @@ index b59a9462ec..8ce97dc854 100644 ifeq ($(OPENJDK_TARGET_CPU), ppc64) LIBJSOUND_CFLAGS += -DX_ARCH=X_PPC64 endif -diff --git a/jdk/src/share/classes/sun/misc/Version.java.template b/jdk/src/share/classes/sun/misc/Version.java.template -index 32e2586e79..e38541a9f7 100644 ---- a/jdk/src/share/classes/sun/misc/Version.java.template -+++ b/jdk/src/share/classes/sun/misc/Version.java.template +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/src/share/classes/sun/misc/Version.java.template b/jdk/src/share/classes/sun/misc/Version.java.template +--- a/jdk/src/share/classes/sun/misc/Version.java.template 2024-01-11 09:53:23.000000000 +0800 ++++ b/jdk/src/share/classes/sun/misc/Version.java.template 2023-12-20 09:23:21.388129678 +0800 @@ -23,6 +23,13 @@ * questions. */ @@ -116806,7 +116165,7 @@ index 32e2586e79..e38541a9f7 100644 package sun.misc; import java.io.PrintStream; -@@ -44,6 +51,9 @@ public class Version { +@@ -44,6 +51,9 @@ private static final String java_runtime_version = "@@java_runtime_version@@"; @@ -116816,7 +116175,7 @@ index 32e2586e79..e38541a9f7 100644 static { init(); } -@@ -103,7 +113,11 @@ public class Version { +@@ -103,7 +113,11 @@ /* Second line: runtime version (ie, libraries). */ @@ -116829,11 +116188,9 @@ index 32e2586e79..e38541a9f7 100644 if (java_profile_name.length() > 0) { // profile name -diff --git a/jdk/src/solaris/bin/loongarch64/jvm.cfg b/jdk/src/solaris/bin/loongarch64/jvm.cfg -new file mode 100644 -index 0000000000..42a06755da ---- /dev/null -+++ b/jdk/src/solaris/bin/loongarch64/jvm.cfg +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/src/solaris/bin/loongarch64/jvm.cfg b/jdk/src/solaris/bin/loongarch64/jvm.cfg +--- a/jdk/src/solaris/bin/loongarch64/jvm.cfg 1970-01-01 08:00:00.000000000 +0800 ++++ b/jdk/src/solaris/bin/loongarch64/jvm.cfg 2023-12-20 09:23:21.804791575 +0800 @@ -0,0 +1,36 @@ +# Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. +# Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -116871,11 +116228,9 @@ index 0000000000..42a06755da +# +-server KNOWN +-client IGNORE -diff --git a/jdk/src/solaris/bin/mips64/jvm.cfg b/jdk/src/solaris/bin/mips64/jvm.cfg -new file mode 100644 -index 0000000000..42a06755da ---- /dev/null -+++ b/jdk/src/solaris/bin/mips64/jvm.cfg +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/src/solaris/bin/mips64/jvm.cfg b/jdk/src/solaris/bin/mips64/jvm.cfg +--- a/jdk/src/solaris/bin/mips64/jvm.cfg 1970-01-01 08:00:00.000000000 +0800 ++++ b/jdk/src/solaris/bin/mips64/jvm.cfg 2023-12-20 09:23:21.804791575 +0800 @@ -0,0 +1,36 @@ +# Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. +# Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -116913,11 +116268,10 @@ index 0000000000..42a06755da +# +-server KNOWN +-client IGNORE -diff --git a/jdk/test/jdk/jfr/event/os/TestCPUInformation.java b/jdk/test/jdk/jfr/event/os/TestCPUInformation.java -index d6a026b2cc..b65486023f 100644 ---- a/jdk/test/jdk/jfr/event/os/TestCPUInformation.java -+++ b/jdk/test/jdk/jfr/event/os/TestCPUInformation.java -@@ -54,8 +54,8 @@ public class TestCPUInformation { +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/test/jdk/jfr/event/os/TestCPUInformation.java b/jdk/test/jdk/jfr/event/os/TestCPUInformation.java +--- a/jdk/test/jdk/jfr/event/os/TestCPUInformation.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/jdk/test/jdk/jfr/event/os/TestCPUInformation.java 2024-01-30 13:54:25.486035237 +0800 +@@ -54,8 +54,8 @@ Events.assertField(event, "hwThreads").atLeast(1); Events.assertField(event, "cores").atLeast(1); Events.assertField(event, "sockets").atLeast(1); @@ -116928,18 +116282,49 @@ index d6a026b2cc..b65486023f 100644 } } } -diff --git a/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher b/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher -new file mode 100755 -index 0000000000..66291c7522 -Binary files /dev/null and b/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher differ -diff --git a/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher b/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher -new file mode 100644 -index 0000000000..5c8385ca12 -Binary files /dev/null and b/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher differ -diff --git a/jdk/test/sun/security/pkcs11/PKCS11Test.java b/jdk/test/sun/security/pkcs11/PKCS11Test.java -index 5fc9c605de..9db6a17d66 100644 ---- a/jdk/test/sun/security/pkcs11/PKCS11Test.java -+++ b/jdk/test/sun/security/pkcs11/PKCS11Test.java +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher b/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher +--- a/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher 1970-01-01 08:00:00.000000000 +0800 ++++ b/jdk/test/sun/management/jmxremote/bootstrap/linux-loongarch64/launcher 2023-12-20 09:23:22.678114913 +0800 +@@ -0,0 +1,8 @@ ++ELF @XJ@8 @@@ @ 88 8   PP@ > ~  ~ x@0>0~ 0~ HH H DDPtd  QtdRtd > ~  ~ /lib64/ld.so.1GNUGNUka43b 2v   ++  k|  |nagHYBu(  x  T    libdl.so.2_ITM_deregisterTMCloneTable_ITM_registerTMCloneTabledlsymdlopenlibc.so.6sprintfabortstrlenmallocstderrfwritefprintf__libc_start_mainGLIBC_2.27__libc_csu_fini__libc_csu_init OP X ` h p  x       ( 0 8  @  ++A(aAE!(L( L( L( L( L( La( LA( L Т 0 8e(f cEcA  0 8 P 1 8j 0 !0 8!L  !0 8!L@X( @L@ L@@  IEI@( @L L@cw'b*a )DwW )a (w&c@ LS@c@a)v)vb)b(WĢ)̢( D PĢ({Wa(v(c Lca`)v@)vł)@̲)̲( 5`(&̂(&W P̂(A&WMW̢)̂(A&Ģ(W̢()  ")B) 2) b>)̂(!&Ŵ)̂(1D(&PW P"΢͂̂(Lr)r(1dA(&TW P̢(&(΢(͂(a&LB)B(@̢(&!(͢(B(L")"(@̢(&(͢( L)(@̢(&(͢(L)̢(&(͢(((L)(E@̢(&(͢(("(B(L P@P@P@P@̢(&(͢(L@̢(&(͢(L̂(&a(͂(L a`(v@(c L@cw)y)r9s9a)x)z`){@)| )9I ;@@&eDL"8_a(w(x(y(z`({@(| (c L@ L@JNI_CreateJavaVMUsage: %s jvm-path classpath class ++-Djava.class.path=%s%scan't get address of JNI_CreateJavaVM ++Can't create Java VM ++([Ljava/lang/String;)Vmain from C!java/lang/String;,zR|    O ~ (~  o    ++    h o oo` 0 0 0 0 0 0 0 0~ GCC: (Loongnix 8.3.0-6.lnd.vec.24+b1) 8.3.08 H h     `    ++    0       ~ (~ 0~  H     H  x !  7 F(~ m  y ~ L (~ 0~  ~  H   + GZm t  \   x   6  1 = T  BUH a crtstuff.cderegister_tm_clones__do_global_dtors_auxcompleted.6858__do_global_dtors_aux_fini_array_entryframe_dummy__frame_dummy_init_array_entrylauncher.c__FRAME_END____init_array_end_DYNAMIC__init_array_start__GNU_EH_FRAME_HDR_GLOBAL_OFFSET_TABLE___libc_csu_finifprintf@@GLIBC_2.27_ITM_deregisterTMCloneTablefwrite@@GLIBC_2.27malloc@@GLIBC_2.27_edata__libc_start_main@@GLIBC_2.27abort@@GLIBC_2.27strlen@@GLIBC_2.27JNU_FindCreateJavaVM__dso_handle_IO_stdin_useddlopen@@GLIBC_2.27__libc_csu_initsprintf@@GLIBC_2.27dlsym@@GLIBC_2.27__bss_startmainstderr@@GLIBC_2.27__TMC_END___ITM_registerTMCloneTable.symtab.strtab.shstrtab.interp.note.ABI-tag.note.gnu.build-id.gnu.hash.dynsym.dynstr.gnu.version.gnu.version_r.rela.dyn.rela.plt.text.rodata.eh_frame_hdr.eh_frame.init_array.fini_array.dynamic.got.plt.got.sdata.bss.comment8 8#H H 1h h$H TDo 0N  V ^o` ` ko @z B 0 0 X    8 ~  >(~ (>0~ 0> @HH H@H @ @0@,@* F{[I +\ 文件末尾没有换行符 +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher b/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher +--- a/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher 1970-01-01 08:00:00.000000000 +0800 ++++ b/jdk/test/sun/management/jmxremote/bootstrap/linux-mips64el/launcher 2023-12-20 09:23:22.678114913 +0800 +@@ -0,0 +1,22 @@ ++ELF` @"@8 @! @@@   p888TTXXX0H@@$$444 @(((((<((p?((GNUTEo"MPL# X`   ++< 5p ++@ppp ++pppp ++oo ++ooL ++ ++   , X 0   I & y  <N"p`] "_DYNAMIC_LINKING__RLD_MAP__libc_csu_init__libc_csu_fini__libc_start_main__gmon_start___ITM_deregisterTMCloneTable_ITM_registerTMCloneTable__cxa_finalize_Jv_RegisterClassesdlopendlsymstderrfprintfstrlenmallocsprintfJNU_FindCreateJavaVMfwritelibdl.so.2libc.so.6_IO_stdin_usedGLIBC_2.0GLIBC_2.20ii (ii 2ii (ii 2X`g<-`gȀ@Ȁ g%%Ȁ<'-% g$$(0%H@%P <-ycd8d@b܈dBd/DB,@y  <-yxcd8d@e܈d/((-(E{(y  g<-(g8 @@H DP 9g$ gg<-g8hDd@P 9gg  Pg80(%<-Pg$%@ @%P0Edߨ%@ %80(@gPg%<-g%¯B(@耂C܈B%0@PHEd% `%@ $BdB% @%@ Bd% @Ѐ%@ BdB%8@PpFdP߈Edߘ%@ h<B4P¯hgX$T¯$`£BdB% @X%@@耂B%8@&$$PߐDd؀%@ $Pg@gHg%0%(% `%@ ¯A耂B%8@$$P߸Dd؀%@ $x@B0B@߈cdc%(`%@ D@@B܈B@PgdPfd%@  7@@B8B@Ped%@ ((-@@B0B@Ped%@ 0@B`B@(0$% `%@ 88@@BhB@8 % `%@  @BxB@% `%@  @@B܀B@% `%@ HBBH% `%@ %%ߠߘ߰gg0<-Ђg`hp/P( 8%%H% ++@%%0%(% ` 1fQf80( @g%x d%x d%x d%x d%x d%x d%x  d%x  dg<-ggJNI_CreateJavaVMUsage: %s jvm-path classpath class ++-Djava.class.path=%s%scan't get address of JNI_CreateJavaVM ++Can't create Java VM ++([Ljava/lang/String;)Vmain from C!java/lang/String/lib64/ld.so.1GNU X X0 `X p`GCC: (Debian 6.3.0-18+deb9u1) 6.3.0 201705160 @ ?@XAgnu8P  L ++ ++ ++ ++  `  `  04X`hpQ U`hm o   X ` XU0h `+`<IRXeq X" H!p` p1 0 FpS"b qpx 7  `  `  ,2  /usr/lib/gcc/mips64el-linux-gnuabi64/6/../../../mips64el-linux-gnuabi64/Scrt1.ohltcrtstuff.c__JCR_LIST__deregister_tm_clones__do_global_dtors_auxcompleted.6216__do_global_dtors_aux_fini_array_entryframe_dummy__frame_dummy_init_array_entrylauncher.c__FRAME_END____JCR_END___MIPS_STUBS___init_array_end__dso_handle_DYNAMIC__init_array_start__TMC_END___GLOBAL_OFFSET_TABLE__gp__libc_csu_fini__cxa_finalize@@GLIBC_2.2_DYNAMIC_LINKING_ITM_deregisterTMCloneTablestderr@@GLIBC_2.0_edatadlopen@@GLIBC_2.2fwrite@@GLIBC_2.0malloc@@GLIBC_2.0JNU_FindCreateJavaVM__data_start__gmon_start___IO_stdin_used_fdatastrlen@@GLIBC_2.0__libc_start_main@@GLIBC_2.0fprintf@@GLIBC_2.0__RLD_MAP__libc_csu_initdlsym@@GLIBC_2.0__bss_startmain__start_ftext_Jv_RegisterClassessprintf@@GLIBC_2.0_fbss_ITM_registerTMCloneTable.symtab.strtab.shstrtab.MIPS.abiflags.MIPS.options.note.gnu.build-id.dynamic.hash.dynsym.dynstr.gnu.version.gnu.version_r.rel.dyn.init.text.MIPS.stubs.fini.rodata.interp.eh_frame.note.ABI-tag.init_array.fini_array.jcr.data.rld_map.got.sdata.bss.comment.pdr.gnu.attributes*p88* pPPh8$K@T  Z @b  <joL ++L ++0wo ++ ++`  ++ ++@ @` ` ``(    0044 XX``hhpp 0- o8H6 XL!0 +\ 文件末尾没有换行符 +diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/jdk/test/sun/security/pkcs11/PKCS11Test.java b/jdk/test/sun/security/pkcs11/PKCS11Test.java +--- a/jdk/test/sun/security/pkcs11/PKCS11Test.java 2024-01-11 09:53:23.000000000 +0800 ++++ b/jdk/test/sun/security/pkcs11/PKCS11Test.java 2023-12-20 09:23:22.824779901 +0800 @@ -21,6 +21,11 @@ * questions. */ @@ -116952,7 +116337,7 @@ index 5fc9c605de..9db6a17d66 100644 // common infrastructure for SunPKCS11 tests -@@ -589,6 +594,9 @@ public abstract class PKCS11Test { +@@ -589,6 +594,9 @@ "/usr/lib64/"}); osMap.put("Linux-ppc64-64", new String[]{"/usr/lib64/"}); osMap.put("Linux-ppc64le-64", new String[]{"/usr/lib64/"}); diff --git a/openjdk-1.8.0.spec b/openjdk-1.8.0.spec index d10ff1c..548a53d 100644 --- a/openjdk-1.8.0.spec +++ b/openjdk-1.8.0.spec @@ -930,7 +930,7 @@ Provides: java-%{javaver}-%{origin}-accessibility%{?1} = %{epoch}:%{version}-%{r Name: java-%{javaver}-%{origin} Version: %{javaver}.%{updatever}.%{buildver} -Release: 0 +Release: 1 # java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons # and this change was brought into RHEL-4. java-1.5.0-ibm packages # also included the epoch in their virtual provides. This created a @@ -1924,11 +1924,6 @@ pushd %{top_level_dir_name} %patch406 -p1 %patch407 -p1 %patch408 -p1 -%endif - -%ifarch loongarch64 -%patch4000 -p1 -%endif %patch409 -p1 %patch410 -p1 %patch411 -p1 @@ -1939,6 +1934,11 @@ pushd %{top_level_dir_name} %patch416 -p1 %patch417 -p1 %patch418 -p1 +%endif + +%ifarch loongarch64 +%patch4000 -p1 +%endif %ifarch riscv64 %patch2000 -p1 @@ -2587,6 +2587,9 @@ cjc.mainProgram(args) %endif %changelog +* Tue Jan 30 2024 Leslie Zhai - 1:1.8.0.402-b06.1 +- Rebase LoongArch64 patch + * Wed Jan 17 2024 Autistic_boyya - 1:1.8.0.402-b06.0 - modified 0019-8040213-C2-does-not-put-all-modified-nodes-on-IGVN-w.patch - modified Improve_AlgorithmConstraints_checkAlgorithm_performance.patch -- Gitee