diff --git a/8224675-Late-GC-barrier-insertion-for-ZGC.patch b/8224675-Late-GC-barrier-insertion-for-ZGC.patch index ed66cbbe156f311c6332f3b7ce24763aeac7469d..95dc4c9534025966ef3685ce9256373b8bcb7e46 100644 --- a/8224675-Late-GC-barrier-insertion-for-ZGC.patch +++ b/8224675-Late-GC-barrier-insertion-for-ZGC.patch @@ -2764,9 +2764,9 @@ index 2f4b9faf0..10dd02f9f 100644 static int _file_count; networkStream *_stream; xmlStream *_xml; -@@ -97,10 +93,6 @@ class IdealGraphPrinter : public CHeapObj { - bool _traverse_outs; +@@ -98,10 +94,6 @@ class IdealGraphPrinter : public CHeapObj { Compile *C; + double _max_freq; - static void pre_node(Node* node, void *env); - static void post_node(Node* node, void *env); diff --git a/8231441-2-AArch64-Initial-SVE-backend-support.patch b/8231441-2-AArch64-Initial-SVE-backend-support.patch index 4dfb8d605b67e77d636814485318181542b16b14..c7756c99dc9238e14bbf4c64e73aa3d1fb2d78f6 100755 --- a/8231441-2-AArch64-Initial-SVE-backend-support.patch +++ b/8231441-2-AArch64-Initial-SVE-backend-support.patch @@ -24,17 +24,17 @@ index b64919a62..64985e498 100644 reg_def R11 ( SOC, SOC, Op_RegI, 11, r11->as_VMReg() ); @@ -140,7 +144,7 @@ reg_def R31 ( NS, NS, Op_RegI, 31, r31_sp->as_VMReg() ); // sp reg_def R31_H ( NS, NS, Op_RegI, 31, r31_sp->as_VMReg()->next()); - + // ---------------------------- -// Float/Double Registers +// Float/Double/Vector Registers // ---------------------------- - + // Double Registers @@ -161,165 +165,317 @@ reg_def R31_H ( NS, NS, Op_RegI, 31, r31_sp->as_VMReg()->next()); // the platform ABI treats v8-v15 as callee save). float registers // v16-v31 are SOC as per the platform spec - + - reg_def V0 ( SOC, SOC, Op_RegF, 0, v0->as_VMReg() ); - reg_def V0_H ( SOC, SOC, Op_RegF, 0, v0->as_VMReg()->next() ); - reg_def V0_J ( SOC, SOC, Op_RegF, 0, v0->as_VMReg()->next(2) ); @@ -505,7 +505,7 @@ index b64919a62..64985e498 100644 +reg_def P6 (SOC, SOC, Op_RegVMask, 6, p6->as_VMReg()); +reg_def P7 (SOC, SOC, Op_RegVMask, 7, p7->as_VMReg()); + - + // ---------------------------- // Special Registers @@ -381,50 +536,64 @@ alloc_class chunk0( @@ -515,9 +515,9 @@ index b64919a62..64985e498 100644 + R8, R8_H, // rscratch1 + R9, R9_H, // rscratch2 ); - + alloc_class chunk1( - + // no save - V16, V16_H, V16_J, V16_K, - V17, V17_H, V17_J, V17_K, @@ -551,7 +551,7 @@ index b64919a62..64985e498 100644 + V29, V29_H, V29_J, V29_K, V29_L, V29_M, V29_N, V29_O, + V30, V30_H, V30_J, V30_K, V30_L, V30_M, V30_N, V30_O, + V31, V31_H, V31_J, V31_K, V31_L, V31_M, V31_N, V31_O, - + // arg registers - V0, V0_H, V0_J, V0_K, - V1, V1_H, V1_J, V1_K, @@ -569,7 +569,7 @@ index b64919a62..64985e498 100644 + V5, V5_H, V5_J, V5_K, V5_L, V5_M, V5_N, V5_O, + V6, V6_H, V6_J, V6_K, V6_L, V6_M, V6_N, V6_O, + V7, V7_H, V7_J, V7_K, V7_L, V7_M, V7_N, V7_O, - + // non-volatiles - V8, V8_H, V8_J, V8_K, - V9, V9_H, V9_J, V9_K, @@ -600,16 +600,16 @@ index b64919a62..64985e498 100644 + P7, + // Only use P0~P7 here for performance ); - + -alloc_class chunk2(RFLAGS); +alloc_class chunk3(RFLAGS); - + //----------Architecture Description Register Classes-------------------------- // Several register classes are automatically defined based upon information in @@ -865,6 +1034,42 @@ reg_class double_reg( V31, V31_H ); - + +// Class for all SVE vector registers. +reg_class vectora_reg ( + V0, V0_H, V0_J, V0_K, V0_L, V0_M, V0_N, V0_O, @@ -652,7 +652,7 @@ index b64919a62..64985e498 100644 @@ -1097,6 +1302,31 @@ reg_class v31_reg( V31, V31_H ); - + +// Class for all SVE predicate registers. +reg_class pr_reg ( + P0, @@ -680,30 +680,30 @@ index b64919a62..64985e498 100644 + // Singleton class for condition codes reg_class int_flags(RFLAGS); - + @@ -1862,7 +2092,7 @@ int MachEpilogNode::safepoint_offset() const { - + // Figure out which register class each belongs in: rc_int, rc_float or // rc_stack. -enum RC { rc_bad, rc_int, rc_float, rc_stack }; +enum RC { rc_bad, rc_int, rc_float, rc_predicate, rc_stack }; - + static enum RC rc_class(OptoReg::Name reg) { - + @@ -1870,20 +2100,25 @@ static enum RC rc_class(OptoReg::Name reg) { return rc_bad; } - + - // we have 30 int registers * 2 halves - // (rscratch1 and rscratch2 are omitted) - int slots_of_int_registers = RegisterImpl::max_slots_per_register * (RegisterImpl::number_of_registers - 2); + // we have 32 int registers * 2 halves + int slots_of_int_registers = RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers; - + if (reg < slots_of_int_registers) { return rc_int; } - + - // we have 32 float register * 4 halves - if (reg < slots_of_int_registers + FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers) { + // we have 32 float register * 8 halves @@ -711,7 +711,7 @@ index b64919a62..64985e498 100644 + if (reg < slots_of_int_registers + slots_of_float_registers) { return rc_float; } - + - // Between float regs & stack is the flags regs. + int slots_of_predicate_registers = PRegisterImpl::max_slots_per_register * PRegisterImpl::number_of_registers; + if (reg < slots_of_int_registers + slots_of_float_registers + slots_of_predicate_registers) { @@ -720,7 +720,7 @@ index b64919a62..64985e498 100644 + + // Between predicate regs & stack is the flags. assert(OptoReg::is_stack(reg), "blow up if spilling flags"); - + return rc_stack; @@ -1941,12 +2176,12 @@ uint MachSpillCopyNode::implementation(CodeBuffer *cbuf, PhaseRegAlloc *ra_, boo as_FloatRegister(Matcher::_regEncode[src_lo])); @@ -765,18 +765,18 @@ index b64919a62..64985e498 100644 + st->print("\t# spill size = %d", is64 ? 64 : 32); } } - + @@ -2204,7 +2454,7 @@ const bool Matcher::match_rule_supported_vector(int opcode, int vlen) { } - + const bool Matcher::has_predicated_vectors(void) { - return false; + return UseSVE > 0; } - + const int Matcher::float_pressure(int default_pressure_threshold) { @@ -2240,7 +2490,8 @@ const bool Matcher::convL2FSupported(void) { - + // Vector width in bytes. const int Matcher::vector_width_in_bytes(BasicType bt) { - int size = MIN2(16,(int)MaxVectorSize); @@ -795,7 +795,7 @@ index b64919a62..64985e498 100644 + // Currently vector length less than SVE vector register size is not supported. + return max_size; + } else { -+ // For the moment limit the vector size to 8 bytes with NEON. ++ // For the moment limit the vector size to 8 bytes with NEON. int size = 8 / type2aelembytes(bt); if (size < 2) size = 2; return size; @@ -810,7 +810,7 @@ index b64919a62..64985e498 100644 +const int Matcher::scalable_vector_reg_size(const BasicType bt) { + return Matcher::max_vector_size(bt); } - + // Vector ideal reg. const uint Matcher::vector_ideal_reg(int len) { + if (UseSVE > 0 && 16 <= len && len <= 256) { @@ -821,7 +821,7 @@ index b64919a62..64985e498 100644 case 16: return Op_VecX; @@ -2270,6 +2539,9 @@ const uint Matcher::vector_ideal_reg(int len) { } - + const uint Matcher::vector_shift_count_ideal_reg(int size) { + if (UseSVE > 0 && 16 <= size && size <= 256) { + return Op_VecA; @@ -832,7 +832,7 @@ index b64919a62..64985e498 100644 @@ -4851,6 +5123,18 @@ operand vRegD() interface(REG_INTER); %} - + +// Generic vector class. This will be used for +// all vector operands, including NEON and SVE, +// but currently only used for SVE VecA. @@ -851,7 +851,7 @@ index b64919a62..64985e498 100644 @@ -5159,6 +5443,15 @@ operand vRegD_V31() interface(REG_INTER); %} - + +operand pRegGov() +%{ + constraint(ALLOC_IN_RC(gov_pr)); @@ -862,7 +862,7 @@ index b64919a62..64985e498 100644 +%} + // Flags register, used as output of signed compare instructions - + // note that on AArch64 we also use this register as the output for diff --git a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp index 228b82660..6f4e75ff4 100644 @@ -871,7 +871,7 @@ index 228b82660..6f4e75ff4 100644 @@ -273,6 +273,14 @@ public: f(r->encoding_nocheck(), lsb + 4, lsb); } - + + void prf(PRegister r, int lsb) { + f(r->encoding_nocheck(), lsb + 3, lsb); + } @@ -912,7 +912,7 @@ index 36cbe3fee..3db8e8337 100644 @@ -33,6 +33,9 @@ const int ConcreteRegisterImpl::max_fpr = ConcreteRegisterImpl::max_gpr + FloatRegisterImpl::number_of_registers * FloatRegisterImpl::max_slots_per_register; - + +const int ConcreteRegisterImpl::max_pr + = ConcreteRegisterImpl::max_fpr + PRegisterImpl::number_of_registers; + @@ -945,12 +945,12 @@ index 20f549188..e7a9cee92 100644 + slots_per_neon_register = 4, + extra_save_slots_per_neon_register = slots_per_neon_register - save_slots_per_register }; - + // construction @@ -198,6 +199,79 @@ CONSTANT_REGISTER_DECLARATION(FloatRegister, v29 , (29)); CONSTANT_REGISTER_DECLARATION(FloatRegister, v30 , (30)); CONSTANT_REGISTER_DECLARATION(FloatRegister, v31 , (31)); - + +// SVE vector registers, shared with the SIMD&FP v0-v31. Vn maps to Zn[127:0]. +CONSTANT_REGISTER_DECLARATION(FloatRegister, z0 , ( 0)); +CONSTANT_REGISTER_DECLARATION(FloatRegister, z1 , ( 1)); @@ -1028,19 +1028,19 @@ index 20f549188..e7a9cee92 100644 // Define a class that exports it. class ConcreteRegisterImpl : public AbstractRegisterImpl { @@ -210,12 +284,14 @@ class ConcreteRegisterImpl : public AbstractRegisterImpl { - + number_of_registers = (RegisterImpl::max_slots_per_register * RegisterImpl::number_of_registers + FloatRegisterImpl::max_slots_per_register * FloatRegisterImpl::number_of_registers + + PRegisterImpl::max_slots_per_register * PRegisterImpl::number_of_registers + 1) // flags }; - + // added to make it compile static const int max_gpr; static const int max_fpr; + static const int max_pr; }; - + class RegSetIterator; diff --git a/src/hotspot/cpu/aarch64/register_definitions_aarch64.cpp b/src/hotspot/cpu/aarch64/register_definitions_aarch64.cpp index c18109087..15131ed32 100644 @@ -1055,7 +1055,7 @@ index c18109087..15131ed32 100644 * @@ -154,3 +154,45 @@ REGISTER_DEFINITION(Register, rthread); REGISTER_DEFINITION(Register, rheapbase); - + REGISTER_DEFINITION(Register, r31_sp); + +REGISTER_DEFINITION(FloatRegister, z0); @@ -1105,7 +1105,7 @@ index dbad48582..3bf7284a7 100644 +++ b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp @@ -111,11 +111,28 @@ class RegisterSaver { }; - + OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { + bool use_sve = false; + int sve_vector_size_in_bytes = 0; @@ -1135,7 +1135,7 @@ index dbad48582..3bf7284a7 100644 } #else @@ -158,8 +175,13 @@ OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_ - + for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) { FloatRegister r = as_FloatRegister(i); - int sp_offset = save_vectors ? (FloatRegisterImpl::max_slots_per_register * i) : @@ -1166,7 +1166,7 @@ index c5d4383b4..dde7a7a91 100644 @@ -36,4 +36,8 @@ inline VMReg FloatRegisterImpl::as_VMReg() { ConcreteRegisterImpl::max_gpr); } - + +inline VMReg PRegisterImpl::as_VMReg() { + return VMRegImpl::as_VMReg(encoding() + ConcreteRegisterImpl::max_fpr); +} @@ -1179,7 +1179,7 @@ index 4a32af54e..0ef4d7f3e 100644 @@ -1121,6 +1121,14 @@ const int Matcher::vector_width_in_bytes(BasicType bt) { return MaxVectorSize; } - + +const bool Matcher::supports_scalable_vector() { + return false; +} @@ -1198,7 +1198,7 @@ index 36cbada53..7ee16a975 100644 @@ -2310,6 +2310,14 @@ const int Matcher::min_vector_size(const BasicType bt) { return max_vector_size(bt); // Same as max. } - + +const bool Matcher::supports_scalable_vector() { + return false; +} @@ -1217,7 +1217,7 @@ index 96c231b0a..ea09aaafc 100644 @@ -1573,6 +1573,14 @@ const int Matcher::min_vector_size(const BasicType bt) { return max_vector_size(bt); // Same as max. } - + +const bool Matcher::supports_scalable_vector() { + return false; +} @@ -1243,7 +1243,7 @@ index abdd7483d..76dd6addd 100644 @@ -1485,6 +1485,14 @@ const int Matcher::min_vector_size(const BasicType bt) { return MIN2(size,max_size); } - + +const bool Matcher::supports_scalable_vector() { + return false; +} @@ -1290,7 +1290,7 @@ index ba61aa4c0..9e41b2dc6 100644 @@ -939,6 +940,10 @@ const char *ArchDesc::getIdealType(const char *idealOp) { } } - + + if (strncmp(idealOp, "RegVMask", 8) == 0) { + return "Type::BOTTOM"; + } @@ -1360,7 +1360,7 @@ index 914dc43f6..710af9de8 100644 + } assert(n_type->isa_vect() == NULL || lrg._is_vector || ireg == Op_RegD || ireg == Op_RegL, "vector must be in vector registers"); - + @@ -912,6 +932,13 @@ void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) { lrg.set_reg_pressure(1); #endif @@ -1378,7 +1378,7 @@ index 914dc43f6..710af9de8 100644 @@ -1358,6 +1385,46 @@ static bool is_legal_reg(LRG &lrg, OptoReg::Name reg, int chunk) { return false; } - + +static OptoReg::Name find_first_set(LRG &lrg, RegMask mask, int chunk) { + int num_regs = lrg.num_regs(); + OptoReg::Name assigned = mask.find_first_set(lrg, num_regs); @@ -1421,7 +1421,7 @@ index 914dc43f6..710af9de8 100644 + // Choose a color using the biasing heuristic OptoReg::Name PhaseChaitin::bias_color( LRG &lrg, int chunk ) { - + @@ -1391,7 +1458,7 @@ OptoReg::Name PhaseChaitin::bias_color( LRG &lrg, int chunk ) { RegMask tempmask = lrg.mask(); tempmask.AND(lrgs(copy_lrg).mask()); @@ -1438,12 +1438,12 @@ index 914dc43f6..710af9de8 100644 - return OptoReg::add(lrg.mask().find_first_set(lrg.num_regs()),chunk); + return OptoReg::add(find_first_set(lrg, lrg.mask(), chunk), chunk); } - + // CNC - Fun hack. Alternate 1st and 2nd selection. Enables post-allocate @@ -1455,7 +1522,6 @@ uint PhaseChaitin::Select( ) { LRG *lrg = &lrgs(lidx); _simplified = lrg->_next; - + - #ifndef PRODUCT if (trace_spilling()) { @@ -1455,7 +1455,7 @@ index 914dc43f6..710af9de8 100644 - goto retry_next_chunk; } - + @@ -1564,12 +1629,21 @@ uint PhaseChaitin::Select( ) { int n_regs = lrg->num_regs(); assert(!lrg->_is_vector || !lrg->_fat_proj, "sanity"); @@ -1505,7 +1505,7 @@ index e5be5b966..5408a24ef 100644 @@ -139,14 +141,37 @@ public: void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) } void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) } - + - // Number of registers this live range uses when it colors private: + // Number of registers this live range uses when it colors @@ -1520,7 +1520,7 @@ index e5be5b966..5408a24ef 100644 public: int num_regs() const { return _num_regs; } void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; } - + + uint scalable_reg_slots() { return _scalable_reg_slots; } + void set_scalable_reg_slots(uint slots) { + assert(_is_scalable, "scalable register"); @@ -1581,7 +1581,7 @@ index 4cc7580a8..4fb732161 100644 @@ -417,6 +420,8 @@ static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { return rms; } - + +#define NOF_STACK_MASKS (3*6+6) + //---------------------------init_first_stack_mask----------------------------- @@ -1589,7 +1589,7 @@ index 4cc7580a8..4fb732161 100644 // Disallow any debug info in outgoing argument areas by setting the @@ -424,7 +429,12 @@ static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { void Matcher::init_first_stack_mask() { - + // Allocate storage for spill masks as masks for the appropriate load type. - RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask) * (3*6+5)); + RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask) * NOF_STACK_MASKS); @@ -1598,13 +1598,13 @@ index 4cc7580a8..4fb732161 100644 + for (int i = 0; i < NOF_STACK_MASKS; i++) { + new (rms + i) RegMask(); + } - + idealreg2spillmask [Op_RegN] = &rms[0]; idealreg2spillmask [Op_RegI] = &rms[1]; @@ -447,11 +457,12 @@ void Matcher::init_first_stack_mask() { idealreg2mhdebugmask[Op_RegD] = &rms[16]; idealreg2mhdebugmask[Op_RegP] = &rms[17]; - + - idealreg2spillmask [Op_VecS] = &rms[18]; - idealreg2spillmask [Op_VecD] = &rms[19]; - idealreg2spillmask [Op_VecX] = &rms[20]; @@ -1616,15 +1616,15 @@ index 4cc7580a8..4fb732161 100644 + idealreg2spillmask [Op_VecX] = &rms[21]; + idealreg2spillmask [Op_VecY] = &rms[22]; + idealreg2spillmask [Op_VecZ] = &rms[23]; - + OptoReg::Name i; - + @@ -478,6 +489,7 @@ void Matcher::init_first_stack_mask() { // Keep spill masks aligned. aligned_stack_mask.clear_to_pairs(); assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); + RegMask scalable_stack_mask = aligned_stack_mask; - + *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; #ifdef _LP64 @@ -548,28 +560,48 @@ void Matcher::init_first_stack_mask() { @@ -1690,12 +1690,12 @@ index 4cc7580a8..4fb732161 100644 #endif - } + } - + // Make up debug masks. Any spill slot plus callee-save registers. // Caller-save registers are assumed to be trashable by the various @@ -872,6 +904,10 @@ void Matcher::init_spill_mask( Node *ret ) { idealreg2regmask[Op_RegP] = &spillP->out_RegMask(); - + // Vector regmasks. + if (Matcher::supports_scalable_vector()) { + MachNode *spillVectA = match_tree(new LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTA)); @@ -1707,11 +1707,11 @@ index 4cc7580a8..4fb732161 100644 @@ -1575,7 +1611,6 @@ Node* Matcher::Label_Root(const Node* n, State* svec, Node* control, Node*& mem) } } - + - // Call DFA to match this node, and return svec->DFA( n->Opcode(), n ); - + diff --git a/src/hotspot/share/opto/matcher.hpp b/src/hotspot/share/opto/matcher.hpp index 244e3d1f8..ed890f88e 100644 --- a/src/hotspot/share/opto/matcher.hpp @@ -1719,7 +1719,7 @@ index 244e3d1f8..ed890f88e 100644 @@ -333,6 +333,10 @@ public: Matcher::min_vector_size(bt) <= size); } - + + static const bool supports_scalable_vector(); + // Actual max scalable vector register length. + static const int scalable_vector_reg_size(const BasicType bt); @@ -1793,17 +1793,17 @@ index d572ac9fe..3514b37bc 100644 @@ -266,9 +266,9 @@ int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &v Node *val = skip_copies(n->in(k)); if (val == x) return blk_adjust; // No progress? - + - int n_regs = RegMask::num_registers(val->ideal_reg()); uint val_idx = _lrg_map.live_range_id(val); OptoReg::Name val_reg = lrgs(val_idx).reg(); + int n_regs = RegMask::num_registers(val->ideal_reg(), lrgs(val_idx)); - + // See if it happens to already be in the correct register! // (either Phi's direct register, or the common case of the name @@ -305,8 +305,26 @@ int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &v } - + Node *vv = value[reg]; + // For scalable register, number of registers may be inconsistent between + // "val_reg" and "reg". For example, when "val" resides in register @@ -1835,7 +1835,7 @@ index d572ac9fe..3514b37bc 100644 uint pidx = _lrg_map.live_range_id(phi); - OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg(); + OptoReg::Name preg = lrgs(pidx).reg(); - + // Remove copies remaining on edges. Check for junk phi. Node *u = NULL; @@ -619,7 +637,7 @@ void PhaseChaitin::post_allocate_copy_removal() { @@ -1858,7 +1858,7 @@ index d572ac9fe..3514b37bc 100644 if (!value[ureg_lo] && @@ -707,7 +725,7 @@ void PhaseChaitin::post_allocate_copy_removal() { } - + uint n_ideal_reg = n->ideal_reg(); - int n_regs = RegMask::num_registers(n_ideal_reg); + int n_regs = RegMask::num_registers(n_ideal_reg, lrgs(lidx)); @@ -1877,7 +1877,7 @@ index 2e04c42eb..dd9b5476b 100644 * * This code is free software; you can redistribute it and/or modify it @@ -24,6 +24,7 @@ - + #include "precompiled.hpp" #include "opto/ad.hpp" +#include "opto/chaitin.hpp" @@ -1885,14 +1885,14 @@ index 2e04c42eb..dd9b5476b 100644 #include "opto/matcher.hpp" #include "opto/node.hpp" @@ -116,30 +117,47 @@ const RegMask RegMask::Empty( - + //============================================================================= bool RegMask::is_vector(uint ireg) { - return (ireg == Op_VecS || ireg == Op_VecD || + return (ireg == Op_VecA || ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ ); } - + int RegMask::num_registers(uint ireg) { switch(ireg) { case Op_VecZ: @@ -1919,7 +1919,7 @@ index 2e04c42eb..dd9b5476b 100644 // Op_VecS and the rest ideal registers. return 1; } - + +int RegMask::num_registers(uint ireg, LRG &lrg) { + int n_regs = num_registers(ireg); + @@ -1939,7 +1939,7 @@ index 2e04c42eb..dd9b5476b 100644 @@ -238,14 +256,30 @@ int RegMask::is_bound_pair() const { return true; } - + +// Check that whether given reg number with size is valid +// for current regmask, where reg is the highest number. +bool RegMask::is_valid_reg(OptoReg::Name reg, const int size) const { @@ -2002,7 +2002,7 @@ index c64d08795..b733b87ad 100644 @@ -28,6 +28,8 @@ #include "code/vmreg.hpp" #include "opto/optoreg.hpp" - + +class LRG; + // Some fun naming (textual) substitutions: @@ -2020,13 +2020,13 @@ index c64d08795..b733b87ad 100644 - SlotsPerVecZ = 16 }; + SlotsPerVecZ = 16, + }; - + // A constructor only used by the ADLC output. All mask fields are filled // in directly. Calls to this look something like RM(1,2,3,4); @@ -204,10 +208,14 @@ public: return false; } - + + // Check that whether given reg number with size is valid + // for current regmask, where reg is the highest number. + bool is_valid_reg(OptoReg::Name reg, const int size) const; @@ -2036,15 +2036,15 @@ index c64d08795..b733b87ad 100644 // Assert that the mask contains only bit sets. - OptoReg::Name find_first_set(const int size) const; + OptoReg::Name find_first_set(LRG &lrg, const int size) const; - + // Clear out partial bits; leave only aligned adjacent bit sets of size. void clear_to_sets(const int size); @@ -226,6 +234,7 @@ public: - + static bool is_vector(uint ireg); static int num_registers(uint ireg); + static int num_registers(uint ireg, LRG &lrg); - + // Fast overlap test. Non-zero if any registers in common. int overlap( const RegMask &rm ) const { diff --git a/src/hotspot/share/opto/type.cpp b/src/hotspot/share/opto/type.cpp @@ -2062,7 +2062,7 @@ index 223b7a1c6..1b46cb452 100644 @@ -655,6 +656,10 @@ void Type::Initialize_shared(Compile* current) { // get_zero_type() should not happen for T_CONFLICT _zero_type[T_CONFLICT]= NULL; - + + if (Matcher::supports_scalable_vector()) { + TypeVect::VECTA = TypeVect::make(T_BYTE, Matcher::scalable_vector_reg_size(T_BYTE)); + } @@ -2080,7 +2080,7 @@ index 223b7a1c6..1b46cb452 100644 mreg2type[Op_VecD] = TypeVect::VECTD; mreg2type[Op_VecX] = TypeVect::VECTX; @@ -990,6 +997,7 @@ const Type::TYPES Type::dual_type[Type::lastype] = { - + Bad, // Tuple - handled in v-call Bad, // Array - handled in v-call + Bad, // VectorA - handled in v-call @@ -2090,13 +2090,13 @@ index 223b7a1c6..1b46cb452 100644 @@ -1890,7 +1898,6 @@ const TypeTuple *TypeTuple::LONG_PAIR; const TypeTuple *TypeTuple::INT_CC_PAIR; const TypeTuple *TypeTuple::LONG_CC_PAIR; - + - //------------------------------make------------------------------------------- // Make a TypeTuple from the range of a method signature const TypeTuple *TypeTuple::make_range(ciSignature* sig) { @@ -2262,6 +2269,7 @@ bool TypeAry::ary_must_be_exact() const { - + //==============================TypeVect======================================= // Convenience common pre-built types. +const TypeVect *TypeVect::VECTA = NULL; // vector length agnostic @@ -2117,7 +2117,7 @@ index 223b7a1c6..1b46cb452 100644 return (TypeVect*)(new TypeVectS(elem, length))->hashcons(); case Op_RegL: @@ -2307,7 +2316,7 @@ const Type *TypeVect::xmeet( const Type *t ) const { - + default: // All else is a mistake typerr(t); - @@ -2138,13 +2138,6 @@ diff --git a/src/hotspot/share/opto/type.hpp b/src/hotspot/share/opto/type.hpp index a7eec281e..6787b947d 100644 --- a/src/hotspot/share/opto/type.hpp +++ b/src/hotspot/share/opto/type.hpp -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it @@ -53,6 +53,7 @@ class TypeNarrowKlass; class TypeAry; class TypeTuple; @@ -2154,7 +2147,7 @@ index a7eec281e..6787b947d 100644 class TypeVectD; class TypeVectX; @@ -87,6 +88,7 @@ public: - + Tuple, // Method signature or object layout Array, // Array types + VectorA, // (Scalable) Vector types for vector length agnostic @@ -2164,7 +2157,7 @@ index a7eec281e..6787b947d 100644 @@ -758,6 +760,7 @@ public: virtual const Type *xmeet( const Type *t) const; virtual const Type *xdual() const; // Compute dual right now. - + + static const TypeVect *VECTA; static const TypeVect *VECTS; static const TypeVect *VECTD; @@ -2172,7 +2165,7 @@ index a7eec281e..6787b947d 100644 @@ -769,6 +772,11 @@ public: #endif }; - + +class TypeVectA : public TypeVect { + friend class TypeVect; + TypeVectA(const Type* elem, uint length) : TypeVect(VectorA, elem, length) {} @@ -2183,19 +2176,19 @@ index a7eec281e..6787b947d 100644 TypeVectS(const Type* elem, uint length) : TypeVect(VectorS, elem, length) {} @@ -1619,12 +1627,12 @@ inline const TypeAry *Type::is_ary() const { } - + inline const TypeVect *Type::is_vect() const { - assert( _base >= VectorS && _base <= VectorZ, "Not a Vector" ); + assert( _base >= VectorA && _base <= VectorZ, "Not a Vector" ); return (TypeVect*)this; } - + inline const TypeVect *Type::isa_vect() const { - return (_base >= VectorS && _base <= VectorZ) ? (TypeVect*)this : NULL; + return (_base >= VectorA && _base <= VectorZ) ? (TypeVect*)this : NULL; } - + inline const TypePtr *Type::is_ptr() const { --- +-- 2.19.1 diff --git a/8268427-Improve-AlgorithmConstraints-checkAlgorithm-.patch b/8268427-Improve-AlgorithmConstraints-checkAlgorithm-.patch deleted file mode 100755 index 776c4e75397edbd72d5c3dd0c3148f5a6f7d1a73..0000000000000000000000000000000000000000 --- a/8268427-Improve-AlgorithmConstraints-checkAlgorithm-.patch +++ /dev/null @@ -1,242 +0,0 @@ -From e3d9485d01941cfbbe01dc8dcea7b913c2e8469d Mon Sep 17 00:00:00 2001 -From: chenshanyao -Date: Tue, 14 Sep 2021 11:43:18 +0800 -Subject: [PATCH 8/8] 8268427: Improve AlgorithmConstraints:checkAlgorithm - performance - -Summary: : performance -LLT: jdk_security -Patch Type: backport -Bug url: https://bugs.openjdk.java.net/browse/JDK-8268427 ---- - .../util/AbstractAlgorithmConstraints.java | 39 +++++------ - .../util/DisabledAlgorithmConstraints.java | 28 ++++---- - .../util/LegacyAlgorithmConstraints.java | 2 +- - .../security/AlgorithmConstraintsPermits.java | 66 +++++++++++++++++++ - 4 files changed, 95 insertions(+), 40 deletions(-) - create mode 100644 test/micro/org/openjdk/bench/java/security/AlgorithmConstraintsPermits.java - -diff --git a/src/java.base/share/classes/sun/security/util/AbstractAlgorithmConstraints.java b/src/java.base/share/classes/sun/security/util/AbstractAlgorithmConstraints.java -index 8d8c5d6fe..3f5678950 100644 ---- a/src/java.base/share/classes/sun/security/util/AbstractAlgorithmConstraints.java -+++ b/src/java.base/share/classes/sun/security/util/AbstractAlgorithmConstraints.java -@@ -32,6 +32,7 @@ import java.security.Security; - import java.util.ArrayList; - import java.util.Arrays; - import java.util.Collections; -+import java.util.TreeSet; - import java.util.List; - import java.util.Set; - -@@ -48,7 +49,7 @@ public abstract class AbstractAlgorithmConstraints - } - - // Get algorithm constraints from the specified security property. -- static List getAlgorithms(String propertyName) { -+ static Set getAlgorithms(String propertyName) { - String property = AccessController.doPrivileged( - new PrivilegedAction() { - @Override -@@ -72,38 +73,30 @@ public abstract class AbstractAlgorithmConstraints - - // map the disabled algorithms - if (algorithmsInProperty == null) { -- return Collections.emptyList(); -+ return Collections.emptySet(); - } -- return new ArrayList<>(Arrays.asList(algorithmsInProperty)); -+ Set algorithmsInPropertySet = new TreeSet<>(String.CASE_INSENSITIVE_ORDER); -+ algorithmsInPropertySet.addAll(Arrays.asList(algorithmsInProperty)); -+ return algorithmsInPropertySet; - } - -- static boolean checkAlgorithm(List algorithms, String algorithm, -+ static boolean checkAlgorithm(Set algorithms, String algorithm, - AlgorithmDecomposer decomposer) { - if (algorithm == null || algorithm.isEmpty()) { - throw new IllegalArgumentException("No algorithm name specified"); - } - -- Set elements = null; -- for (String item : algorithms) { -- if (item == null || item.isEmpty()) { -- continue; -- } -- -- // check the full name -- if (item.equalsIgnoreCase(algorithm)) { -- return false; -- } -+ if (algorithms.contains(algorithm)) { -+ return false; -+ } - -- // decompose the algorithm into sub-elements -- if (elements == null) { -- elements = decomposer.decompose(algorithm); -- } -+ // decompose the algorithm into sub-elements -+ Set elements = decomposer.decompose(algorithm); - -- // check the items of the algorithm -- for (String element : elements) { -- if (item.equalsIgnoreCase(element)) { -- return false; -- } -+ // check the element of the elements -+ for (String element : elements) { -+ if (algorithms.contains(element)) { -+ return false; - } - } - -diff --git a/src/java.base/share/classes/sun/security/util/DisabledAlgorithmConstraints.java b/src/java.base/share/classes/sun/security/util/DisabledAlgorithmConstraints.java -index 3ee431e62..efc6d339f 100644 ---- a/src/java.base/share/classes/sun/security/util/DisabledAlgorithmConstraints.java -+++ b/src/java.base/share/classes/sun/security/util/DisabledAlgorithmConstraints.java -@@ -85,6 +85,9 @@ public class DisabledAlgorithmConstraints extends AbstractAlgorithmConstraints { - private static final String PROPERTY_DISABLED_EC_CURVES = - "jdk.disabled.namedCurves"; - -+ private static final Pattern INCLUDE_PATTERN = Pattern.compile("include " + -+ PROPERTY_DISABLED_EC_CURVES, Pattern.CASE_INSENSITIVE); -+ - private static class CertPathHolder { - static final DisabledAlgorithmConstraints CONSTRAINTS = - new DisabledAlgorithmConstraints(PROPERTY_CERTPATH_DISABLED_ALGS); -@@ -95,7 +98,7 @@ public class DisabledAlgorithmConstraints extends AbstractAlgorithmConstraints { - new DisabledAlgorithmConstraints(PROPERTY_JAR_DISABLED_ALGS); - } - -- private final List disabledAlgorithms; -+ private final Set disabledAlgorithms; - private final Constraints algorithmConstraints; - - public static DisabledAlgorithmConstraints certPathConstraints() { -@@ -130,21 +133,14 @@ public class DisabledAlgorithmConstraints extends AbstractAlgorithmConstraints { - disabledAlgorithms = getAlgorithms(propertyName); - - // Check for alias -- int ecindex = -1, i = 0; - for (String s : disabledAlgorithms) { -- if (s.regionMatches(true, 0,"include ", 0, 8)) { -- if (s.regionMatches(true, 8, PROPERTY_DISABLED_EC_CURVES, 0, -- PROPERTY_DISABLED_EC_CURVES.length())) { -- ecindex = i; -- break; -- } -+ Matcher matcher = INCLUDE_PATTERN.matcher(s); -+ if (matcher.matches()) { -+ disabledAlgorithms.remove(matcher.group()); -+ disabledAlgorithms.addAll( -+ getAlgorithms(PROPERTY_DISABLED_EC_CURVES)); -+ break; - } -- i++; -- } -- if (ecindex > -1) { -- disabledAlgorithms.remove(ecindex); -- disabledAlgorithms.addAll(ecindex, -- getAlgorithms(PROPERTY_DISABLED_EC_CURVES)); - } - algorithmConstraints = new Constraints(propertyName, disabledAlgorithms); - } -@@ -323,8 +319,8 @@ public class DisabledAlgorithmConstraints extends AbstractAlgorithmConstraints { - "denyAfter\\s+(\\d{4})-(\\d{2})-(\\d{2})"); - } - -- public Constraints(String propertyName, List constraintArray) { -- for (String constraintEntry : constraintArray) { -+ public Constraints(String propertyName, Set constraintSet) { -+ for (String constraintEntry : constraintSet) { - if (constraintEntry == null || constraintEntry.isEmpty()) { - continue; - } -diff --git a/src/java.base/share/classes/sun/security/util/LegacyAlgorithmConstraints.java b/src/java.base/share/classes/sun/security/util/LegacyAlgorithmConstraints.java -index e4e5cedc1..550173080 100644 ---- a/src/java.base/share/classes/sun/security/util/LegacyAlgorithmConstraints.java -+++ b/src/java.base/share/classes/sun/security/util/LegacyAlgorithmConstraints.java -@@ -40,7 +40,7 @@ public class LegacyAlgorithmConstraints extends AbstractAlgorithmConstraints { - public static final String PROPERTY_TLS_LEGACY_ALGS = - "jdk.tls.legacyAlgorithms"; - -- private final List legacyAlgorithms; -+ private final Set legacyAlgorithms; - - public LegacyAlgorithmConstraints(String propertyName, - AlgorithmDecomposer decomposer) { -diff --git a/test/micro/org/openjdk/bench/java/security/AlgorithmConstraintsPermits.java b/test/micro/org/openjdk/bench/java/security/AlgorithmConstraintsPermits.java -new file mode 100644 -index 000000000..3cb9567b9 ---- /dev/null -+++ b/test/micro/org/openjdk/bench/java/security/AlgorithmConstraintsPermits.java -@@ -0,0 +1,66 @@ -+/* -+ * Copyright (c) 2021, Huawei Technologies Co., Ltd. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+package org.openjdk.bench.java.security; -+ -+import org.openjdk.jmh.annotations.Benchmark; -+import org.openjdk.jmh.annotations.BenchmarkMode; -+import org.openjdk.jmh.annotations.Fork; -+import org.openjdk.jmh.annotations.Mode; -+import org.openjdk.jmh.annotations.OutputTimeUnit; -+import org.openjdk.jmh.annotations.Param; -+import org.openjdk.jmh.annotations.Scope; -+import org.openjdk.jmh.annotations.Setup; -+import org.openjdk.jmh.annotations.State; -+import sun.security.util.DisabledAlgorithmConstraints; -+ -+import java.security.AlgorithmConstraints; -+import java.security.CryptoPrimitive; -+import java.util.concurrent.TimeUnit; -+import java.util.EnumSet; -+import java.util.Set; -+ -+import static sun.security.util.DisabledAlgorithmConstraints.PROPERTY_TLS_DISABLED_ALGS; -+ -+@BenchmarkMode(Mode.AverageTime) -+@OutputTimeUnit(TimeUnit.NANOSECONDS) -+@Fork(jvmArgsAppend = {"--add-exports", "java.base/sun.security.util=ALL-UNNAMED"}) -+@State(Scope.Thread) -+public class AlgorithmConstraintsPermits { -+ -+ AlgorithmConstraints tlsDisabledAlgConstraints; -+ Set primitives = EnumSet.of(CryptoPrimitive.KEY_AGREEMENT); -+ -+ @Param({"SSLv3", "DES", "NULL", "TLS1.3"}) -+ String algorithm; -+ -+ @Setup -+ public void setup() { -+ tlsDisabledAlgConstraints = new DisabledAlgorithmConstraints(PROPERTY_TLS_DISABLED_ALGS); -+ } -+ -+ @Benchmark -+ public boolean permits() { -+ return tlsDisabledAlgConstraints.permits(primitives, algorithm, null); -+ } -+} -+ --- -2.22.0 - diff --git a/8290705_fix_StringConcat_validate_mem_flow_asserts_with_unexpected_userStoreI.patch b/8290705_fix_StringConcat_validate_mem_flow_asserts_with_unexpected_userStoreI.patch deleted file mode 100644 index cfecb4278ce47e3f6525e1f81c41eb9539e68e00..0000000000000000000000000000000000000000 --- a/8290705_fix_StringConcat_validate_mem_flow_asserts_with_unexpected_userStoreI.patch +++ /dev/null @@ -1,145 +0,0 @@ -diff --git a/src/hotspot/share/opto/stringopts.cpp b/src/hotspot/share/opto/stringopts.cpp -index e8e493bce..91a3c998e 100644 ---- a/src/hotspot/share/opto/stringopts.cpp -+++ b/src/hotspot/share/opto/stringopts.cpp -@@ -1028,6 +1028,21 @@ bool StringConcat::validate_control_flow() { - fail = true; - break; - } else if (ptr->is_Proj() && ptr->in(0)->is_Initialize()) { -+ // Check for side effect between Initialize and the constructor -+ for (SimpleDUIterator iter(ptr); iter.has_next(); iter.next()) { -+ Node* use = iter.get(); -+ if (!use->is_CFG() && !use->is_CheckCastPP() && !use->is_Load()) { -+#ifndef PRODUCT -+ if (PrintOptimizeStringConcat) { -+ tty->print_cr("unexpected control use of Initialize"); -+ ptr->in(0)->dump(); // Initialize node -+ use->dump(1); -+ } -+#endif -+ fail = true; -+ break; -+ } -+ } - ptr = ptr->in(0)->in(0); - } else if (ptr->is_Region()) { - Node* copy = ptr->as_Region()->is_copy(); -diff --git a/test/hotspot/jtreg/compiler/stringopts/SideEffectBeforeConstructor.jasm b/test/hotspot/jtreg/compiler/stringopts/SideEffectBeforeConstructor.jasm -new file mode 100644 -index 000000000..cbc6d754b ---- /dev/null -+++ b/test/hotspot/jtreg/compiler/stringopts/SideEffectBeforeConstructor.jasm -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+super public class compiler/stringopts/SideEffectBeforeConstructor -+ version 51:0 -+{ -+ public static Field result:I; -+ -+ static Method "":"()V" -+ stack 2 locals 0 -+ { -+ iconst_0; -+ putstatic Field result:"I"; -+ return; -+ } -+ public Method "":"()V" -+ stack 1 locals 1 -+ { -+ aload_0; -+ invokespecial Method java/lang/Object."":"()V"; -+ return; -+ } -+ -+ public static Method test:"(Ljava/lang/String;)V" -+ stack 4 locals 1 -+ { -+ new class java/lang/StringBuffer; -+ dup; -+ getstatic Field result:"I"; -+ iconst_1; -+ iadd; -+ putstatic Field result:"I"; -+ aload_0; -+ invokespecial Method java/lang/StringBuffer."":"(Ljava/lang/String;)V"; -+ invokevirtual Method java/lang/StringBuffer.toString:"()Ljava/lang/String;"; -+ return; -+ } -+} -diff --git a/test/hotspot/jtreg/compiler/stringopts/TestSideEffectBeforeConstructor.java b/test/hotspot/jtreg/compiler/stringopts/TestSideEffectBeforeConstructor.java -new file mode 100644 -index 000000000..86c5eca1d ---- /dev/null -+++ b/test/hotspot/jtreg/compiler/stringopts/TestSideEffectBeforeConstructor.java -@@ -0,0 +1,49 @@ -+/* -+ * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+/* -+ * @test -+ * @bug 8290705 -+ * @summary Test correctness of the string concatenation optimization with -+ * a store between StringBuffer allocation and constructor invocation. -+ * @compile SideEffectBeforeConstructor.jasm -+ * @run main/othervm -Xbatch compiler.stringopts.TestSideEffectBeforeConstructor -+ */ -+ -+package compiler.stringopts; -+ -+public class TestSideEffectBeforeConstructor { -+ -+ public static void main(String[] args) { -+ for (int i = 0; i < 100_000; ++i) { -+ try { -+ SideEffectBeforeConstructor.test(null); -+ } catch (NullPointerException npe) { -+ // Expected -+ } -+ } -+ if (SideEffectBeforeConstructor.result != 100_000) { -+ throw new RuntimeException("Unexpected result: " + SideEffectBeforeConstructor.result); -+ } -+ } -+} diff --git a/G1-iterate-region-by-bitmap-rather-than-obj-size-in.patch b/G1-iterate-region-by-bitmap-rather-than-obj-size-in.patch index 127168dbd09be67ac6877af3d5601d88dc208ac4..6d22453e729e946dc2769b0b3803ac773b443b91 100755 --- a/G1-iterate-region-by-bitmap-rather-than-obj-size-in.patch +++ b/G1-iterate-region-by-bitmap-rather-than-obj-size-in.patch @@ -10,7 +10,7 @@ index 2cc9c87d0..a86046616 100644 @@ -171,25 +171,47 @@ void G1FullGCPrepareTask::G1CalculatePointersClosure::prepare_for_compaction(Hea } } - + -void G1FullGCPrepareTask::G1CalculatePointersClosure::prepare_no_moving_region(const HeapRegion* hr) { - const HeapRegion* current = hr; +void G1FullGCPrepareTask::G1CalculatePointersClosure::prepare_no_moving_region(HeapRegion* hr) { @@ -61,7 +61,7 @@ index 2cc9c87d0..a86046616 100644 } + assert(next_addr == limit, "Should stop the scan at the limit."); } - + void G1FullGCPrepareTask::prepare_serial_compaction() { diff --git a/src/hotspot/share/gc/g1/g1FullGCPrepareTask.hpp b/src/hotspot/share/gc/g1/g1FullGCPrepareTask.hpp index 57b53c9dd..7f4a69e80 100644 @@ -73,7 +73,7 @@ index 57b53c9dd..7f4a69e80 100644 void reset_region_metadata(HeapRegion* hr); - void prepare_no_moving_region(const HeapRegion* hr); + void prepare_no_moving_region(HeapRegion* hr); - + public: G1CalculatePointersClosure(G1CMBitMap* bitmap, diff --git a/src/hotspot/share/gc/g1/g1MarkLiveWords.cpp b/src/hotspot/share/gc/g1/g1MarkLiveWords.cpp @@ -109,7 +109,7 @@ index 32da3800a..aec32f9e4 100644 + * questions. + * */ - + #include "gc/g1/g1MarkLiveWords.hpp" diff --git a/src/hotspot/share/gc/g1/g1MarkLiveWords.hpp b/src/hotspot/share/gc/g1/g1MarkLiveWords.hpp index a11a4ca52..e8632fe5d 100644 @@ -144,7 +144,7 @@ index a11a4ca52..e8632fe5d 100644 + * questions. + * */ - + #ifndef SHARE_VM_GC_G1_G1MARKLIVEWORDS_HPP diff --git a/src/hotspot/share/gc/g1/g1MarkRegionCache.cpp b/src/hotspot/share/gc/g1/g1MarkRegionCache.cpp index 37922e8cf..1fb6d9929 100644 @@ -179,7 +179,7 @@ index 37922e8cf..1fb6d9929 100644 + * questions. + * */ - + #include "gc/g1/g1MarkRegionCache.hpp" diff --git a/src/hotspot/share/gc/g1/g1MarkRegionCache.hpp b/src/hotspot/share/gc/g1/g1MarkRegionCache.hpp index 0615fcab6..00d2931a6 100644 @@ -214,7 +214,7 @@ index 0615fcab6..00d2931a6 100644 + * questions. + * */ - + #ifndef SHARE_VM_GC_G1_G1MARKREGIONCACHE_HPP diff --git a/test/hotspot/jtreg/compiler/c2/Test8217359.java b/test/hotspot/jtreg/compiler/c2/Test8217359.java index ca0d2cc75..533bdce4b 100644 @@ -337,7 +337,7 @@ index 2f892773b..2383c3a94 100644 + * questions. + * */ - + /* diff --git a/test/hotspot/jtreg/runtime/invokedynamic/DynamicConstantHelper.jasm b/test/hotspot/jtreg/runtime/invokedynamic/DynamicConstantHelper.jasm index 01ab0c9f1..4fa919e94 100644 @@ -367,4 +367,4 @@ index 000000000..85b49171c --- /dev/null +++ b/version.txt @@ -0,0 +1 @@ -+11.0.17.0.13 ++11.0.18.0.13 diff --git a/fix_X509TrustManagerImpl_symantec_distrust.patch b/fix_X509TrustManagerImpl_symantec_distrust.patch deleted file mode 100644 index 570e0666d66509e55e529bd7fe86ea0ef06311c3..0000000000000000000000000000000000000000 --- a/fix_X509TrustManagerImpl_symantec_distrust.patch +++ /dev/null @@ -1,72 +0,0 @@ -diff --git a/make/data/cacerts/geotrustglobalca b/make/data/cacerts/geotrustglobalca -new file mode 100644 -index 000000000..7f8bf9a66 ---- /dev/null -+++ b/make/data/cacerts/geotrustglobalca -@@ -0,0 +1,27 @@ -+Owner: CN=GeoTrust Global CA, O=GeoTrust Inc., C=US -+Issuer: CN=GeoTrust Global CA, O=GeoTrust Inc., C=US -+Serial number: 23456 -+Valid from: Tue May 21 04:00:00 GMT 2002 until: Sat May 21 04:00:00 GMT 2022 -+Signature algorithm name: SHA1withRSA -+Subject Public Key Algorithm: 2048-bit RSA key -+Version: 3 -+-----BEGIN CERTIFICATE----- -+MIIDVDCCAjygAwIBAgIDAjRWMA0GCSqGSIb3DQEBBQUAMEIxCzAJBgNVBAYTAlVT -+MRYwFAYDVQQKEw1HZW9UcnVzdCBJbmMuMRswGQYDVQQDExJHZW9UcnVzdCBHbG9i -+YWwgQ0EwHhcNMDIwNTIxMDQwMDAwWhcNMjIwNTIxMDQwMDAwWjBCMQswCQYDVQQG -+EwJVUzEWMBQGA1UEChMNR2VvVHJ1c3QgSW5jLjEbMBkGA1UEAxMSR2VvVHJ1c3Qg -+R2xvYmFsIENBMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA2swYYzD9 -+9BcjGlZ+W988bDjkcbd4kdS8odhM+KhDtgPpTSEHCIjaWC9mOSm9BXiLnTjoBbdq -+fnGk5sRgprDvgOSJKA+eJdbtg/OtppHHmMlCGDUUna2YRpIuT8rxh0PBFpVXLVDv -+iS2Aelet8u5fa9IAjbkU+BQVNdnARqN7csiRv8lVK83Qlz6cJmTM386DGXHKTubU -+1XupGc1V3sjs0l44U+VcT4wt/lAjNvxm5suOpDkZALeVAjmRCw7+OC7RHQWa9k0+ -+bw8HHa8sHo9gOeL6NlMTOdReJivbPagUvTLrGAMoUgRx5aszPeE4uwc2hGKceeoW -+MPRfwCvocWvk+QIDAQABo1MwUTAPBgNVHRMBAf8EBTADAQH/MB0GA1UdDgQWBBTA -+ephojYn7qwVkDBF9qn1luMrMTjAfBgNVHSMEGDAWgBTAephojYn7qwVkDBF9qn1l -+uMrMTjANBgkqhkiG9w0BAQUFAAOCAQEANeMpauUvXVSOKVCUn5kaFOSPeCpilKIn -+Z57QzxpeR+nBsqTP3UEaBU6bS+5Kb1VSsyShNwrrZHYqLizz/Tt1kL/6cdjHPTfS -+tQWVYrmm3ok9Nns4d0iXrKYgjy6myQzCsplFAMfOEVEiIuCl6rYVSAlk6l5PdPcF -+PseKUgzbFbS9bZvlxrFUaKnjaZC2mqUPuLk/IH2uSrW4nOQdtqvmlKXBx4Ot2/Un -+hw4EbNX/3aBd7YdStysVAq45pmp06drE57xNNB6pXE0zX5IJL4hmXXeXxx12E6nV -+5fEWCRE11azbJHFwLJhWC9kXtNHjUStedejV0NxPNO3CBWaAocvmMw== -+-----END CERTIFICATE----- -diff --git a/test/jdk/sun/security/lib/cacerts/VerifyCACerts.java b/test/jdk/sun/security/lib/cacerts/VerifyCACerts.java -index c131bd493..478cc7235 100644 ---- a/test/jdk/sun/security/lib/cacerts/VerifyCACerts.java -+++ b/test/jdk/sun/security/lib/cacerts/VerifyCACerts.java -@@ -53,12 +53,12 @@ public class VerifyCACerts { - + File.separator + "security" + File.separator + "cacerts"; - - // The numbers of certs now. -- private static final int COUNT = 86; -+ private static final int COUNT = 87; - - // SHA-256 of cacerts, can be generated with - // shasum -a 256 cacerts | sed -e 's/../&:/g' | tr '[:lower:]' '[:upper:]' | cut -c1-95 - private static final String CHECKSUM -- = "89:78:5A:96:F4:B2:68:4C:91:C0:32:2C:ED:2D:6B:3B:26:B8:37:C3:07:DD:9E:50:87:53:53:7A:24:98:97:E0"; -+ = "63:C4:11:7D:BF:C5:05:2B:BF:C2:B4:5A:2C:B6:26:C4:57:76:FB:D4:48:3B:E7:4C:62:B0:A1:7B:4F:07:B1:0C"; - - // map of cert alias to SHA-256 fingerprint - @SuppressWarnings("serial") -@@ -116,7 +116,9 @@ public class VerifyCACerts { - "7E:37:CB:8B:4C:47:09:0C:AB:36:55:1B:A6:F4:5D:B8:40:68:0F:BA:16:6A:95:2D:B1:00:71:7F:43:05:3F:C2"); - put("digicerthighassuranceevrootca [jdk]", - "74:31:E5:F4:C3:C1:CE:46:90:77:4F:0B:61:E0:54:40:88:3B:A9:A0:1E:D0:0B:A6:AB:D7:80:6E:D3:B1:18:CF"); -- put("geotrustprimaryca [jdk]", -+ put("geotrustglobalca [jdk]", -+ "FF:85:6A:2D:25:1D:CD:88:D3:66:56:F4:50:12:67:98:CF:AB:AA:DE:40:79:9C:72:2D:E4:D2:B5:DB:36:A7:3A"); -+ put("geotrustprimaryca [jdk]", - "37:D5:10:06:C5:12:EA:AB:62:64:21:F1:EC:8C:92:01:3F:C5:F8:2A:E9:8E:E5:33:EB:46:19:B8:DE:B4:D0:6C"); - put("geotrustprimarycag2 [jdk]", - "5E:DB:7A:C4:3B:82:A0:6A:87:61:E8:D7:BE:49:79:EB:F2:61:1F:7D:D7:9B:F9:1C:1C:6B:56:6A:21:9E:D7:66"); -@@ -250,6 +252,8 @@ public class VerifyCACerts { - add("addtrustexternalca [jdk]"); - // Valid until: Sat May 30 10:44:50 GMT 2020 - add("addtrustqualifiedca [jdk]"); -+ // Valid until: Sat May 21 04:00:00 GMT 2022 -+ add("geotrustglobalca [jdk]"); - } - }; - diff --git a/jdk-updates-jdk11u-jdk-11.0.17-ga.tar.xz b/jdk-updates-jdk11u-jdk-11.0.18-ga.tar.xz similarity index 84% rename from jdk-updates-jdk11u-jdk-11.0.17-ga.tar.xz rename to jdk-updates-jdk11u-jdk-11.0.18-ga.tar.xz index b4825d78e3e1be0a59d15c085e7b85d2ae60d5d6..ae527d93cd132bbf4eea04390dacd2fad1c7427d 100644 Binary files a/jdk-updates-jdk11u-jdk-11.0.17-ga.tar.xz and b/jdk-updates-jdk11u-jdk-11.0.18-ga.tar.xz differ diff --git a/openjdk-11.spec b/openjdk-11.spec index be34e76221e123886c57c4f75594263779bd3de2..67e7687123c0efbb4ed9d9ada0a90350effce695 100644 --- a/openjdk-11.spec +++ b/openjdk-11.spec @@ -114,7 +114,7 @@ # New Version-String scheme-style defines %global majorver 11 -%global securityver 17 +%global securityver 18 # buildjdkver is usually same as %%{majorver}, # but in time of bootstrap of next jdk, it is majorver-1, # and this it is better to change it here, on single place @@ -130,12 +130,12 @@ %global origin_nice OpenJDK %global top_level_dir_name %{origin} %global minorver 0 -%global buildver 8 +%global buildver 10 %global patchver 0 %global project jdk-updates %global repo jdk11u -%global revision jdk-11.0.17-ga +%global revision jdk-11.0.18-ga %global full_revision %{project}-%{repo}-%{revision} # priority must be 7 digits in total # setting to 1, so debug ones can have 0 @@ -846,7 +846,7 @@ Patch61: downgrade-the-symver-of-log2f-posix-spawn.patch Patch62: 8254078-DataOutputStream-is-very-slow-post-disabling.patch Patch65: add-LazyBox-feature.patch Patch66: add-G1-Full-GC-optimization.patch -Patch68: src-openeuler-openjdk-11-resolve-code-inconsistencies.patch +Patch68: src-openeuler-openjdk-11-resolve-code-inconsistencies.patch Patch69: G1-iterate-region-by-bitmap-rather-than-obj-size-in.patch # 11.0.11 @@ -875,8 +875,6 @@ Patch89: downgrade-the-symver-of-memcpy-GLIBC_2.14-on-x86.patch # 11.0.16 Patch90: fix_Internal_and_external_code_inconsistency.patch -Patch91: 8290705_fix_StringConcat_validate_mem_flow_asserts_with_unexpected_userStoreI.patch - BuildRequires: elfutils-extra BuildRequires: autoconf @@ -1168,7 +1166,6 @@ pushd %{top_level_dir_name} %patch88 -p1 %patch89 -p1 %patch90 -p1 -%patch91 -p1 popd # openjdk # %patch1000 @@ -1372,7 +1369,7 @@ done # Make sure gdb can do a backtrace based on line numbers on libjvm.so # javaCalls.cpp:58 should map to: -# http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/file/ff3b27e6bcc2/src/share/vm/runtime/javaCalls.cpp#l58 +# http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/file/ff3b27e6bcc2/src/share/vm/runtime/javaCalls.cpp#l58 # Using line number 1 might cause build problems. See: gdb -q "$JAVA_HOME/bin/java" < - 1:11.0.18.10-0 +- update to 11.0.18+10(GA) +- modified 8231441-2-AArch64-Initial-SVE-backend-support.patch +- delete 8290705_fix_StringConcat_validate_mem_flow_asserts_with_unexpected_userStoreI.patch + * Wed Oct 19 2022 DXwangg - 1:11.0.17.8-0 - update to 11.0.17+8(GA) - modified G1-iterate-region-by-bitmap-rather-than-obj-size-in.patch @@ -1851,7 +1853,7 @@ cjc.mainProgram(arg) - add 8248336-AArch64-C2-offset-overflow-in-BoxLockNode-em.patch * Mon Oct 26 2020 noah - 1:11.0.9.11-1 -- add 8229495-SIGILL-in-C2-generated-OSR-compilation.patch +- add 8229495-SIGILL-in-C2-generated-OSR-compilation.patch * Thu Oct 22 2020 noah - 1:11.0.9.11-0 - Update to 11.0.9+11 (GA)