From 013d08330289c4f835d900c5a26fd55e2952823e Mon Sep 17 00:00:00 2001 From: panxuefeng Date: Tue, 4 Nov 2025 17:07:46 +0800 Subject: [PATCH] upgrade LoongArch64 port to 17.0.17 --- LoongArch64-support.patch | 308 ++++++++++++++++++++++---------------- openjdk-17.spec | 5 +- 2 files changed, 187 insertions(+), 126 deletions(-) diff --git a/LoongArch64-support.patch b/LoongArch64-support.patch index 08e1527..6c3248c 100644 --- a/LoongArch64-support.patch +++ b/LoongArch64-support.patch @@ -1,9 +1,3 @@ -commit 5d0cd63aa31e77480c23b072cc263f5cea22267b -Author: panxuefeng -Date: Thu May 8 17:20:38 2025 +0800 - - LoongArch Support - diff --git a/make/autoconf/jvm-features.m4 b/make/autoconf/jvm-features.m4 index aa99b037b..d0c3a8575 100644 --- a/make/autoconf/jvm-features.m4 @@ -143,6 +137,20 @@ index eb6626626..931434c4e 100644 # The cpu defines below are for zero, we don't support them directly. elif test "x$OPENJDK_$1_CPU" = xsparc; then +diff --git a/make/modules/java.desktop/lib/Awt2dLibraries.gmk b/make/modules/java.desktop/lib/Awt2dLibraries.gmk +index badb6f8ca..acdcaea47 100644 +--- a/make/modules/java.desktop/lib/Awt2dLibraries.gmk ++++ b/make/modules/java.desktop/lib/Awt2dLibraries.gmk +@@ -716,7 +716,8 @@ ifeq ($(ENABLE_HEADLESS_ONLY), false) + endif + + LIBSPLASHSCREEN_CFLAGS += -DSPLASHSCREEN -DPNG_NO_MMX_CODE \ +- -DPNG_ARM_NEON_OPT=0 -DPNG_ARM_NEON_IMPLEMENTATION=0 ++ -DPNG_ARM_NEON_OPT=0 -DPNG_ARM_NEON_IMPLEMENTATION=0 \ ++ -DPNG_LOONGARCH_LSX_OPT=0 + + ifeq ($(call isTargetOs, linux), true) + ifeq ($(call isTargetCpuArch, ppc), true) diff --git a/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp new file mode 100644 index 000000000..fbcd4050b @@ -1139,7 +1147,7 @@ index 000000000..e6e62ccca +} diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp new file mode 100644 -index 000000000..5eae8b999 +index 000000000..d78d71909 --- /dev/null +++ b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp @@ -0,0 +1,2831 @@ @@ -3108,7 +3116,7 @@ index 000000000..5eae8b999 + void dbar(int hint) { + assert(is_uimm(hint, 15), "not a unsigned 15-bit int"); + -+ if (os::is_ActiveCoresMP()) ++ if (UseActiveCoresMP) + andi(R0, R0, 0); + else + emit_int32(insn_I15(dbar_op, hint)); @@ -63475,10 +63483,10 @@ index 000000000..1a9312313 +#endif // CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp new file mode 100644 -index 000000000..1a1ac9231 +index 000000000..8afb6da02 --- /dev/null +++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp -@@ -0,0 +1,432 @@ +@@ -0,0 +1,445 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -63512,6 +63520,7 @@ index 000000000..1a1ac9231 +#include "runtime/java.hpp" +#include "runtime/stubCodeGenerator.hpp" +#include "runtime/vm_version.hpp" ++#include "os_linux.hpp" +#ifdef TARGET_OS_FAMILY_linux +# include "os_linux.inline.hpp" +#endif @@ -63893,6 +63902,18 @@ index 000000000..1a1ac9231 + FLAG_SET_DEFAULT(UsePopCountInstruction, false); + } + ++ if (UseActiveCoresMP) { ++ if (os::Linux::sched_active_processor_count() != 1) { ++ if (!FLAG_IS_DEFAULT(UseActiveCoresMP)) ++ warning("UseActiveCoresMP disabled because active processors are more than one."); ++ FLAG_SET_DEFAULT(UseActiveCoresMP, false); ++ } ++ } else { // !UseActiveCoresMP ++ if (FLAG_IS_DEFAULT(UseActiveCoresMP) && os::Linux::sched_active_processor_count() == 1) { ++ FLAG_SET_DEFAULT(UseActiveCoresMP, true); ++ } ++ } ++ + UNSUPPORTED_OPTION(CriticalJNINatives); +} + @@ -65633,7 +65654,7 @@ index 000000000..2205ef1a4 +} diff --git a/src/hotspot/cpu/mips/assembler_mips.hpp b/src/hotspot/cpu/mips/assembler_mips.hpp new file mode 100644 -index 000000000..8d0d9e0eb +index 000000000..a7a41fe7b --- /dev/null +++ b/src/hotspot/cpu/mips/assembler_mips.hpp @@ -0,0 +1,1777 @@ @@ -66839,7 +66860,7 @@ index 000000000..8d0d9e0eb + void swr (Register rt, Register base, int off) { emit_long(insn_ORRI(swr_op, (int)base->encoding(), (int)rt->encoding(), off)); } + void synci(Register base, int off) { emit_long(insn_ORRI(regimm_op, (int)base->encoding(), synci_op, off)); } + void sync () { -+ if (os::is_ActiveCoresMP()) ++ if (UseActiveCoresMP) + emit_long(0); + else + emit_long(sync_op); @@ -109436,13 +109457,13 @@ index 000000000..ffdcff067 +#endif // CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP diff --git a/src/hotspot/cpu/mips/vm_version_mips.cpp b/src/hotspot/cpu/mips/vm_version_mips.cpp new file mode 100644 -index 000000000..8625bc700 +index 000000000..c37e7c523 --- /dev/null +++ b/src/hotspot/cpu/mips/vm_version_mips.cpp -@@ -0,0 +1,523 @@ +@@ -0,0 +1,542 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2025, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -109887,8 +109908,23 @@ index 000000000..8625bc700 + FLAG_SET_DEFAULT(UseSHA, false); + } + ++ if (UseSHA1Intrinsics) { ++ warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); ++ FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); ++ } ++ ++ if (UseSHA256Intrinsics) { ++ warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); ++ FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); ++ } ++ ++ if (UseSHA512Intrinsics) { ++ warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); ++ FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); ++ } ++ + if (UseSHA3Intrinsics) { -+ warning("SHA3 intrinsics are not available on this CPU."); ++ warning("Intrinsics for SHA3-224, SHA3-256, SHA3-384 and SHA3-512 crypto hash functions not available on this CPU."); + FLAG_SET_DEFAULT(UseSHA3Intrinsics, false); + } + @@ -109897,13 +109933,6 @@ index 000000000..8625bc700 + FLAG_SET_DEFAULT(UseMD5Intrinsics, false); + } + -+ if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) { -+ warning("SHA intrinsics are not available on this CPU"); -+ FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); -+ FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); -+ FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); -+ } -+ + if (UseAES) { + if (!FLAG_IS_DEFAULT(UseAES)) { + warning("AES instructions are not available on this CPU"); @@ -109945,6 +109974,17 @@ index 000000000..8625bc700 + FLAG_SET_DEFAULT(UseFMA, true); + } + ++ if (UseActiveCoresMP) { ++ if (os::Linux::sched_active_processor_count() != 1) { ++ if (!FLAG_IS_DEFAULT(UseActiveCoresMP)) ++ warning("UseActiveCoresMP disabled because active processors are more than one."); ++ FLAG_SET_DEFAULT(UseActiveCoresMP, false); ++ } ++ } else { ++ if (!os::is_MP()) ++ FLAG_SET_DEFAULT(UseActiveCoresMP, true); ++ } ++ + UNSUPPORTED_OPTION(CriticalJNINatives); +} + @@ -110723,7 +110763,7 @@ index 3657b16fc..a2aab2257 100644 size_t ZPlatformAddressMetadataShift(); diff --git a/src/hotspot/os/linux/os_linux.cpp b/src/hotspot/os/linux/os_linux.cpp -index 7c951cee5..5747d4d3f 100644 +index 3d2423481..1f8420117 100644 --- a/src/hotspot/os/linux/os_linux.cpp +++ b/src/hotspot/os/linux/os_linux.cpp @@ -23,6 +23,12 @@ @@ -110731,15 +110771,28 @@ index 7c951cee5..5747d4d3f 100644 */ +/* -+ * This file has been modified by Loongson Technology in 2021. These -+ * modifications are Copyright (c) 2021 Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2023. These ++ * modifications are Copyright (c) 2021, 2023 Loongson Technology, and are made + * available on the same license terms set forth above. + */ + // no precompiled headers #include "jvm.h" #include "classfile/vmSymbols.hpp" -@@ -2457,7 +2463,7 @@ void os::print_memory_info(outputStream* st) { +@@ -2232,6 +2238,12 @@ bool os::Linux::query_process_memory_info(os::Linux::meminfo_t* info) { + return false; + } + ++int os::Linux::sched_active_processor_count() { ++ if (OSContainer::is_containerized()) ++ return OSContainer::active_processor_count(); ++ return os::Linux::active_processor_count(); ++} ++ + #ifdef __GLIBC__ + // For Glibc, print a one-liner with the malloc tunables. + // Most important and popular is MALLOC_ARENA_MAX, but we are +@@ -2459,7 +2471,7 @@ void os::print_memory_info(outputStream* st) { // before "flags" so if we find a second "model name", then the // "flags" field is considered missing. static bool print_model_name_and_flags(outputStream* st, char* buf, size_t buflen) { @@ -110748,7 +110801,7 @@ index 7c951cee5..5747d4d3f 100644 // Other platforms have less repetitive cpuinfo files FILE *fp = fopen("/proc/cpuinfo", "r"); if (fp) { -@@ -2547,7 +2553,7 @@ void os::pd_print_cpu_info(outputStream* st, char* buf, size_t buflen) { +@@ -2549,7 +2561,7 @@ void os::pd_print_cpu_info(outputStream* st, char* buf, size_t buflen) { print_sys_devices_cpu_info(st, buf, buflen); } @@ -110757,6 +110810,32 @@ index 7c951cee5..5747d4d3f 100644 const char* search_string = "model name"; #elif defined(M68K) const char* search_string = "CPU"; +diff --git a/src/hotspot/os/linux/os_linux.hpp b/src/hotspot/os/linux/os_linux.hpp +index e225d521f..4ce51d0bd 100644 +--- a/src/hotspot/os/linux/os_linux.hpp ++++ b/src/hotspot/os/linux/os_linux.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023. These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef OS_LINUX_OS_LINUX_HPP + #define OS_LINUX_OS_LINUX_HPP + +@@ -191,6 +197,8 @@ class Linux { + + // none present + ++ static int sched_active_processor_count(); ++ + private: + static void numa_init(); + static void expand_stack_to(address bottom); diff --git a/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp new file mode 100644 index 000000000..30719a034 @@ -111371,13 +111450,13 @@ index 000000000..ebd73af0c + diff --git a/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp new file mode 100644 -index 000000000..6236e741d +index 000000000..75ce53f45 --- /dev/null +++ b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp -@@ -0,0 +1,52 @@ +@@ -0,0 +1,51 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -111403,14 +111482,13 @@ index 000000000..6236e741d +#ifndef OS_CPU_LINUX_LOONGARCH_ORDERACCESS_LINUX_LOONGARCH_HPP +#define OS_CPU_LINUX_LOONGARCH_ORDERACCESS_LINUX_LOONGARCH_HPP + ++#include "runtime/globals.hpp" +#include "runtime/os.hpp" + +// Included in orderAccess.hpp header file. + +// Implementation of class OrderAccess. -+#define inlasm_sync(v) if (os::is_ActiveCoresMP()) \ -+ __asm__ __volatile__ ("nop" : : : "memory"); \ -+ else \ ++#define inlasm_sync(v) if (!UseActiveCoresMP) \ + __asm__ __volatile__ ("dbar %0" : :"K"(v) : "memory"); +#define inlasm_synci() __asm__ __volatile__ ("ibar 0" : : : "memory"); + @@ -111429,13 +111507,13 @@ index 000000000..6236e741d +#endif // OS_CPU_LINUX_LOONGARCH_ORDERACCESS_LINUX_LOONGARCH_HPP diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp new file mode 100644 -index 000000000..b32ffe910 +index 000000000..6a91fae2e --- /dev/null +++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp -@@ -0,0 +1,529 @@ +@@ -0,0 +1,525 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -111958,16 +112036,12 @@ index 000000000..b32ffe910 + // LA does not require the additional stack bang. + return 0; +} -+ -+bool os::is_ActiveCoresMP() { -+ return UseActiveCoresMP && _initial_active_processor_count == 1; -+} diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp new file mode 100644 -index 000000000..fa02f8ba2 +index 000000000..f2f46ce1b --- /dev/null +++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp -@@ -0,0 +1,38 @@ +@@ -0,0 +1,36 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -112003,8 +112077,6 @@ index 000000000..fa02f8ba2 + // Note: Currently only used in 64 bit Windows implementations + static bool register_code_area(char *low, char *high) { return true; } + -+ static bool is_ActiveCoresMP(); -+ +#endif // OS_CPU_LINUX_LOONGARCH_OS_LINUX_LOONGARCH_HPP diff --git a/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp new file mode 100644 @@ -112969,10 +113041,10 @@ index 000000000..36c8d810c + diff --git a/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp new file mode 100644 -index 000000000..a92bf43bd +index 000000000..d0a528bff --- /dev/null +++ b/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp -@@ -0,0 +1,52 @@ +@@ -0,0 +1,51 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -113001,14 +113073,13 @@ index 000000000..a92bf43bd +#ifndef OS_CPU_LINUX_MIPS_VM_ORDERACCESS_LINUX_MIPS_HPP +#define OS_CPU_LINUX_MIPS_VM_ORDERACCESS_LINUX_MIPS_HPP + ++#include "runtime/globals.hpp" +#include "runtime/os.hpp" + +// Included in orderAccess.hpp header file. + +// Implementation of class OrderAccess. -+#define inlasm_sync() if (os::is_ActiveCoresMP()) \ -+ __asm__ __volatile__ ("nop" : : : "memory"); \ -+ else \ ++#define inlasm_sync() if (!UseActiveCoresMP) \ + __asm__ __volatile__ ("sync" : : : "memory"); +#define inlasm_synci() __asm__ __volatile__ ("synci 0($0)" : : : "memory"); + @@ -113027,10 +113098,10 @@ index 000000000..a92bf43bd +#endif // OS_CPU_LINUX_MIPS_VM_ORDERACCESS_LINUX_MIPS_HPP diff --git a/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp new file mode 100644 -index 000000000..ff1af7beb +index 000000000..7c293fc7d --- /dev/null +++ b/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp -@@ -0,0 +1,817 @@ +@@ -0,0 +1,813 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. @@ -113844,16 +113915,12 @@ index 000000000..ff1af7beb + // MIPS does not require the additional stack bang. + return 0; +} -+ -+bool os::is_ActiveCoresMP() { -+ return UseActiveCoresMP && _initial_active_processor_count == 1; -+} diff --git a/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp new file mode 100644 -index 000000000..c07d08156 +index 000000000..98131ac78 --- /dev/null +++ b/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp -@@ -0,0 +1,39 @@ +@@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -113890,8 +113957,6 @@ index 000000000..c07d08156 + // Note: Currently only used in 64 bit Windows implementations + static bool register_code_area(char *low, char *high) { return true; } + -+ static bool is_ActiveCoresMP(); -+ +#endif // OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP diff --git a/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp new file mode 100644 @@ -114330,7 +114395,7 @@ index b45f432da..02bec17dd 100644 } diff --git a/src/hotspot/share/asm/codeBuffer.cpp b/src/hotspot/share/asm/codeBuffer.cpp -index 2d219121c..dee7ba8dc 100644 +index 48ae3a735..a8129d440 100644 --- a/src/hotspot/share/asm/codeBuffer.cpp +++ b/src/hotspot/share/asm/codeBuffer.cpp @@ -22,6 +22,12 @@ @@ -114346,7 +114411,7 @@ index 2d219121c..dee7ba8dc 100644 #include "precompiled.hpp" #include "asm/codeBuffer.hpp" #include "code/oopRecorder.inline.hpp" -@@ -331,6 +337,7 @@ void CodeSection::relocate(address at, RelocationHolder const& spec, int format) +@@ -320,6 +326,7 @@ void CodeSection::relocate(address at, RelocationHolder const& spec, int format) assert(rtype == relocInfo::none || rtype == relocInfo::runtime_call_type || rtype == relocInfo::internal_word_type|| @@ -114930,10 +114995,10 @@ index f5861d1f3..e1b78dcf3 100644 st.print("runtime_call"); CallRelocation* r = (CallRelocation*)iter.reloc(); diff --git a/src/hotspot/share/code/relocInfo.cpp b/src/hotspot/share/code/relocInfo.cpp -index 47769c53a..ed69d18d7 100644 +index 986f40c9f..23a754a27 100644 --- a/src/hotspot/share/code/relocInfo.cpp +++ b/src/hotspot/share/code/relocInfo.cpp -@@ -402,6 +402,7 @@ void virtual_call_Relocation::unpack_data() { +@@ -410,6 +410,7 @@ void virtual_call_Relocation::unpack_data() { _cached_value = x0==0? NULL: address_from_scaled_offset(x0, point); } @@ -114941,7 +115006,7 @@ index 47769c53a..ed69d18d7 100644 void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { short* p = pack_1_int_to((short *)dest->locs_end(), (jint)(_offset >> 2)); dest->set_locs_end((relocInfo*) p); -@@ -410,6 +411,7 @@ void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { +@@ -418,6 +419,7 @@ void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { void runtime_call_w_cp_Relocation::unpack_data() { _offset = unpack_1_int() << 2; } @@ -114949,7 +115014,7 @@ index 47769c53a..ed69d18d7 100644 void static_stub_Relocation::pack_data_to(CodeSection* dest) { short* p = (short*) dest->locs_end(); -@@ -874,7 +876,7 @@ void RelocIterator::print_current() { +@@ -882,7 +884,7 @@ void RelocIterator::print_current() { break; } case relocInfo::runtime_call_type: @@ -114959,7 +115024,7 @@ index 47769c53a..ed69d18d7 100644 CallRelocation* r = (CallRelocation*) reloc(); tty->print(" | [destination=" INTPTR_FORMAT "]", p2i(r->destination())); diff --git a/src/hotspot/share/code/relocInfo.hpp b/src/hotspot/share/code/relocInfo.hpp -index 55d4ac7c6..b1c347330 100644 +index 2c6b570e0..f2f81e730 100644 --- a/src/hotspot/share/code/relocInfo.hpp +++ b/src/hotspot/share/code/relocInfo.hpp @@ -266,7 +266,11 @@ class relocInfo { @@ -115052,6 +115117,43 @@ index 7ea2d19fc..7306230e8 100644 // ppc (linux, BE): 404 288 // ppc (linux, LE): 356 276 // ppc (AIX): 416 296 +diff --git a/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp b/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp +index a2f08726b..90534643e 100644 +--- a/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp ++++ b/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2025, These ++ * modifications are Copyright (c) 2025, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "classfile/classLoaderDataGraph.hpp" + #include "classfile/systemDictionary.hpp" +@@ -2640,6 +2646,9 @@ void G1CMTask::do_marking_step(double time_target_ms, + // Since we've done everything else, we can now totally drain the + // local queue and global stack. + drain_local_queue(false); ++ // Load of _age._fields._top in drain_local_queue must not pass ++ // the load of _age._fields._top in assert _task_queue->size(). ++ LOONGARCH64_ONLY(DEBUG_ONLY(OrderAccess::loadload();)) + drain_global_stack(false); + + // Attempt at work stealing from other task's queues. +@@ -2659,6 +2668,9 @@ void G1CMTask::do_marking_step(double time_target_ms, + // And since we're towards the end, let's totally drain the + // local queue and global stack. + drain_local_queue(false); ++ // Load of _age._fields._top in drain_local_queue must not pass ++ // the load of _age._fields._top in assert _task_queue->size(). ++ LOONGARCH64_ONLY(DEBUG_ONLY(OrderAccess::loadload();)) + drain_global_stack(false); + } else { + break; diff --git a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp index f09441088..a8c1f97a8 100644 --- a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp @@ -115172,7 +115274,7 @@ index 0e99bf107..d5541cf89 100644 #else LIR_Op(), diff --git a/src/hotspot/share/interpreter/interpreterRuntime.cpp b/src/hotspot/share/interpreter/interpreterRuntime.cpp -index d66ed24d8..b682bb9d6 100644 +index 611ed6686..3b90f4328 100644 --- a/src/hotspot/share/interpreter/interpreterRuntime.cpp +++ b/src/hotspot/share/interpreter/interpreterRuntime.cpp @@ -22,6 +22,12 @@ @@ -115188,7 +115290,7 @@ index d66ed24d8..b682bb9d6 100644 #include "precompiled.hpp" #include "jvm_io.h" #include "classfile/javaClasses.inline.hpp" -@@ -1459,7 +1465,7 @@ JRT_ENTRY(void, InterpreterRuntime::prepare_native_call(JavaThread* current, Met +@@ -1460,7 +1466,7 @@ JRT_ENTRY(void, InterpreterRuntime::prepare_native_call(JavaThread* current, Met // preparing the same method will be sure to see non-null entry & mirror. JRT_END @@ -115393,7 +115495,7 @@ index 614d0b4e1..8d7764eb8 100644 macro(MinI) macro(MinL) diff --git a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp -index c69208089..5cd2af09e 100644 +index 6404050b8..a154cbb53 100644 --- a/src/hotspot/share/opto/compile.cpp +++ b/src/hotspot/share/opto/compile.cpp @@ -22,6 +22,12 @@ @@ -115637,7 +115739,7 @@ index c846408fb..1b9afc8c4 100644 // stack grows downwards; if old_fp is below current fp or if the stack diff --git a/src/hotspot/share/runtime/sharedRuntime.cpp b/src/hotspot/share/runtime/sharedRuntime.cpp -index 9af4b513a..1a3e9fd0a 100644 +index e4ff6fa9d..4ae98edd3 100644 --- a/src/hotspot/share/runtime/sharedRuntime.cpp +++ b/src/hotspot/share/runtime/sharedRuntime.cpp @@ -22,6 +22,12 @@ @@ -115653,7 +115755,7 @@ index 9af4b513a..1a3e9fd0a 100644 #include "precompiled.hpp" #include "classfile/javaClasses.hpp" #include "jvm.h" -@@ -3054,7 +3060,7 @@ void AdapterHandlerLibrary::create_native_wrapper(const methodHandle& method) { +@@ -3055,7 +3061,7 @@ void AdapterHandlerLibrary::create_native_wrapper(const methodHandle& method) { CodeBuffer buffer(buf); struct { double data[20]; } locs_buf; buffer.insts()->initialize_shared_locs((relocInfo*)&locs_buf, sizeof(locs_buf) / sizeof(relocInfo)); @@ -115731,7 +115833,7 @@ index d86fce3c8..71bfd4dfa 100644 // Threads::create_vm() for size checks. Atomic::release_store((volatile jint*)&_thread_state, (jint)s); diff --git a/src/hotspot/share/runtime/vmStructs.cpp b/src/hotspot/share/runtime/vmStructs.cpp -index 33de84a68..7dc3d58f3 100644 +index 28dbd337e..02f002a20 100644 --- a/src/hotspot/share/runtime/vmStructs.cpp +++ b/src/hotspot/share/runtime/vmStructs.cpp @@ -22,6 +22,12 @@ @@ -115747,7 +115849,7 @@ index 33de84a68..7dc3d58f3 100644 #include "precompiled.hpp" #include "cds/filemap.hpp" #include "ci/ciField.hpp" -@@ -1597,6 +1603,7 @@ typedef HashtableEntry KlassHashtableEntry; +@@ -1598,6 +1604,7 @@ typedef HashtableEntry KlassHashtableEntry; declare_c2_type(StoreFenceNode, MemBarNode) \ declare_c2_type(MemBarVolatileNode, MemBarNode) \ declare_c2_type(MemBarCPUOrderNode, MemBarNode) \ @@ -120790,7 +120892,7 @@ index 66dac7130..dd2ccd340 100644 OUTFLAGS += -o $@ else diff --git a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java -index 4c56daebf..928361304 100644 +index ac3a6d9a8..c17598902 100644 --- a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java +++ b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java @@ -21,12 +21,18 @@ @@ -120814,7 +120916,7 @@ index 4c56daebf..928361304 100644 * @run driver jdk.test.lib.helpers.ClassFileInstaller jdk.test.whitebox.WhiteBox * @run main/othervm/timeout=600 -Xbootclasspath/a:. diff --git a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java -index 03016ea3d..62ce6c1a7 100644 +index fdc8f63f9..993cf68d0 100644 --- a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java +++ b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java @@ -21,6 +21,12 @@ @@ -120839,50 +120941,6 @@ index 03016ea3d..62ce6c1a7 100644 * @requires vm.compiler1.enabled | !vm.graal.enabled * @run driver jdk.test.lib.helpers.ClassFileInstaller jdk.test.whitebox.WhiteBox * @run main/othervm -Xbootclasspath/a:. -XX:+UnlockDiagnosticVMOptions -diff --git a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java -index 468cd83d7..40d2b03e3 100644 ---- a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java -+++ b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java -@@ -21,6 +21,12 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2021, These -+ * modifications are Copyright (c) 2021, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - package compiler.intrinsics.sha.cli.testcases; - - import compiler.intrinsics.sha.cli.DigestOptionsBase; -@@ -32,7 +38,7 @@ import jdk.test.lib.cli.predicate.OrPredicate; - - /** - * Generic test case for SHA-related options targeted to any CPU except -- * AArch64, RISCV64, PPC, S390x, and X86. -+ * AArch64, RISCV64, PPC, S390x, LoongArch64, and X86. - */ - public class GenericTestCaseForOtherCPU extends - DigestOptionsBase.TestCase { -@@ -44,14 +50,15 @@ public class GenericTestCaseForOtherCPU extends - } - - public GenericTestCaseForOtherCPU(String optionName, boolean checkUseSHA) { -- // Execute the test case on any CPU except AArch64, RISCV64, PPC, S390x, and X86. -+ // Execute the test case on any CPU except AArch64, RISCV64, PPC, S390x, LoongArch64, and X86. - super(optionName, new NotPredicate( - new OrPredicate(Platform::isAArch64, - new OrPredicate(Platform::isRISCV64, - new OrPredicate(Platform::isS390x, - new OrPredicate(Platform::isPPC, -+ new OrPredicate(Platform::isLoongArch64, - new OrPredicate(Platform::isX64, -- Platform::isX86))))))); -+ Platform::isX86)))))))); - - this.checkUseSHA = checkUseSHA; - } diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java index d7ecc7c04..0d47a2f30 100644 --- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java @@ -121756,7 +121814,7 @@ index 2f2395b77..58482edb3 100644 public static final String CHECKCAST_ARRAYCOPY = "(.*((?i:call_leaf_nofp,runtime)|CALL,\\s?runtime leaf nofp|BCTRL.*.leaf call).*checkcast_arraycopy.*" + END; diff --git a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java -index 85fd3fa93..0655f2b0b 100644 +index 889c07942..224f48e6b 100644 --- a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java +++ b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java @@ -21,6 +21,12 @@ @@ -121955,7 +122013,7 @@ index 26dd3514e..2818343ec 100644 } else if (Platform.isS390x()){ cmp = "CLFI"; diff --git a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java -index 168631895..e2f3a1347 100644 +index 3f924c6ac..4c022637e 100644 --- a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java +++ b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java @@ -21,6 +21,12 @@ @@ -121971,7 +122029,7 @@ index 168631895..e2f3a1347 100644 package nsk.share.jdi; import nsk.share.*; -@@ -520,21 +526,22 @@ class CheckedFeatures { +@@ -508,21 +514,22 @@ class CheckedFeatures { * available only on the Microsoft Windows platform. * " */ @@ -122009,7 +122067,7 @@ index 168631895..e2f3a1347 100644 // listening connectors /* -@@ -546,21 +553,22 @@ class CheckedFeatures { +@@ -534,21 +541,22 @@ class CheckedFeatures { * It is available only on the Microsoft Windows platform. * " */ @@ -122047,7 +122105,7 @@ index 168631895..e2f3a1347 100644 // launching connectors /* -@@ -575,78 +583,82 @@ class CheckedFeatures { +@@ -563,78 +571,82 @@ class CheckedFeatures { * Windows, the shared memory transport is used. On Linux the socket transport is used. * " */ diff --git a/openjdk-17.spec b/openjdk-17.spec index 1e0d7b0..ad74637 100644 --- a/openjdk-17.spec +++ b/openjdk-17.spec @@ -920,7 +920,7 @@ Provides: java-src%{?1} = %{epoch}:%{version}-%{release} Name: java-%{javaver}-%{origin} Version: %{newjavaver}.%{buildver} -Release: 0 +Release: 1 # java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons # and this change was brought into RHEL-4. java-1.5.0-ibm packages @@ -2009,6 +2009,9 @@ cjc.mainProgram(args) -- the returns from copy_jdk_configs.lua should not affect %changelog +* Tue Nov 04 2025 panxuefeng 1:17.0.17.10-1 +- upgrade LoongArch64 port to 17.0.17 + * Fri Oct 17 2025 benshuai5d 1:17.0.17.10-0 - update to 17.0.17 - modify 8264805-Backport-Ahead-of-Time-Compiler.patch -- Gitee