diff --git a/0001-Add-support-for-RISC-V.patch b/0001-Add-support-for-RISC-V.patch
new file mode 100644
index 0000000000000000000000000000000000000000..77a274f6fffe61138a515b57c961e0f10f7c7109
--- /dev/null
+++ b/0001-Add-support-for-RISC-V.patch
@@ -0,0 +1,63 @@
+From b3e28228b0f5af506f38d1a211ed0794dd66fafe Mon Sep 17 00:00:00 2001
+From: Andreas Schwab <schwab@suse.de>
+Date: Thu, 19 Jul 2018 18:38:31 +0200
+Subject: [PATCH] Add support for RISC-V
+
+---
+ platform/switch_riscv_unix.h | 32 ++++++++++++++++++++++++++++++++
+ slp_platformselect.h         |  2 ++
+ 2 files changed, 34 insertions(+)
+ create mode 100644 platform/switch_riscv_unix.h
+
+diff --git a/platform/switch_riscv_unix.h b/platform/switch_riscv_unix.h
+new file mode 100644
+index 0000000..5b5ea98
+--- /dev/null
++++ b/platform/switch_riscv_unix.h
+@@ -0,0 +1,32 @@
++#define STACK_REFPLUS 1
++
++#ifdef SLP_EVAL
++#define STACK_MAGIC 0
++
++#define REGS_TO_SAVE "s0", "s1", "s2", "s3", "s4", "s5", \
++		     "s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \
++		     "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \
++		     "fs10", "fs11"
++
++static int
++slp_switch(void)
++{
++  register int ret;
++  register long *stackref, stsizediff;
++  __asm__ volatile ("" : : : REGS_TO_SAVE);
++  __asm__ volatile ("mv %0, sp" : "=r" (stackref) : );
++  {
++      SLP_SAVE_STATE(stackref, stsizediff);
++      __asm__ volatile (
++	  "add sp, sp, %0\n\t"
++	  : /* no outputs */
++	  : "r" (stsizediff)
++	  );
++      SLP_RESTORE_STATE();
++  }
++  __asm__ volatile ("" : : : REGS_TO_SAVE);
++  __asm__ volatile ("mv %0, zero" : "=r" (ret) : );
++  return ret;
++}
++
++#endif
+diff --git a/slp_platformselect.h b/slp_platformselect.h
+index e6cdc9f..b52c287 100644
+--- a/slp_platformselect.h
++++ b/slp_platformselect.h
+@@ -49,4 +49,6 @@
+ #include "platform/switch_m68k_gcc.h" /* gcc on m68k */
+ #elif defined(__GNUC__) && defined(__csky__)
+ #include "platform/switch_csky_gcc.h" /* gcc on csky */
++#elif defined(__GNUC__) && defined(__riscv)
++#include "platform/switch_riscv_unix.h" /* gcc on RISC-V */
+ #endif
+-- 
+2.39.0.windows.2
+
diff --git a/python-greenlet.spec b/python-greenlet.spec
index 6bb617e69e98ac36151edf1400f9b51fe5e82adf..ffc0785629c36352adbe9bcc6f7f17701f712f4b 100644
--- a/python-greenlet.spec
+++ b/python-greenlet.spec
@@ -1,10 +1,11 @@
 Name:            python-greenlet
 Version:         0.4.14
-Release:         4
+Release:         5
 Summary:         lightweight coroutines for in-process concurrent programming
 License:         MIT
 URL:             https://github.com/python-greenlet/greenlet
 Source0:         https://github.com/python-greenlet/greenlet/archive/0.4.14.tar.gz
+Patch0001:       0001-Add-support-for-RISC-V.patch
 
 BuildRequires:   python2-devel python2-setuptools python3-devel python3-setuptools
 BuildRequires:   gcc-c++
@@ -83,6 +84,9 @@ that use python3-greenlet.
 %{_includedir}/python%{python3_version}*/greenlet/
 
 %changelog
+* Tue Oct 24 2023 zhangliangpengkun<zhangliangpengkun@xfusion.com> - 0.4.14-5
+- Add support for RISC-V
+
 * Thu Sep 17 2020 liuweibo <liuweibo10@huawei.com> - 0.4.14-4
 - Fix Source0