From 0b665c13ae4c4c6d44c7640324de8d96b2fc9445 Mon Sep 17 00:00:00 2001 From: zhangpengrui Date: Fri, 5 Sep 2025 11:33:31 +0800 Subject: [PATCH] QEMU update to version 8.2.0-42 Signed-off-by: zhangpengrui --- ...rrect-DTE-field-for-interrupt-passth.patch | 46 ++++++++++++++ ...orrect-bitmask-to-set-capability-BAR.patch | 54 ++++++++++++++++ docs-about-emulation-Fix-broken-link.patch | 36 +++++++++++ ...ender-fix-qxl_unpack_chunks-chunk-si.patch | 61 +++++++++++++++++++ ...u-Assign-pci-id-0x1419-for-the-AMD-I.patch | 48 +++++++++++++++ ...irtio-fix-Werror-maybe-uninitialized.patch | 44 +++++++++++++ ...ow-error-message-when-postcopy-fails.patch | 43 +++++++++++++ qemu.spec | 22 ++++++- tcg-Reset-data_gen_ptr-correctly.patch | 46 ++++++++++++++ update-include-hw-xen-arch_hvm.h.patch | 37 +++++++++++ 10 files changed, 436 insertions(+), 1 deletion(-) create mode 100644 amd_iommu-Use-correct-DTE-field-for-interrupt-passth.patch create mode 100644 amd_iommu-Use-correct-bitmask-to-set-capability-BAR.patch create mode 100644 docs-about-emulation-Fix-broken-link.patch create mode 100644 hw-display-qxl-render-fix-qxl_unpack_chunks-chunk-si.patch create mode 100644 hw-i386-amd_iommu-Assign-pci-id-0x1419-for-the-AMD-I.patch create mode 100644 hw-virtio-fix-Werror-maybe-uninitialized.patch create mode 100644 migration-show-error-message-when-postcopy-fails.patch create mode 100644 tcg-Reset-data_gen_ptr-correctly.patch create mode 100644 update-include-hw-xen-arch_hvm.h.patch diff --git a/amd_iommu-Use-correct-DTE-field-for-interrupt-passth.patch b/amd_iommu-Use-correct-DTE-field-for-interrupt-passth.patch new file mode 100644 index 0000000..16e6a1d --- /dev/null +++ b/amd_iommu-Use-correct-DTE-field-for-interrupt-passth.patch @@ -0,0 +1,46 @@ +From 7f7a8b4cc084998f658def7697a17f4aa40eabcf Mon Sep 17 00:00:00 2001 +From: jiesong +Date: Tue, 19 Aug 2025 23:18:00 +0800 +Subject: [PATCH] amd_iommu: Use correct DTE field for interrupt passthrough + +Interrupt passthrough is determine by the bits 191,190,187-184. +These bits are part of the 3rd quad word (i.e. index 2) in DTE. Hence +replace dte[3] by dte[2]. + +Fixes: b44159fe ("x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled") +Signed-off-by: default avatarSairaj Kodilkar +Reviewed-by: default avatarVasant Hegde +Message-Id: <20250207045354.27329-2-sarunkod@amd.com> +Reviewed-by: MST's avatarMichael S. Tsirkin +Signed-off-by: MST's avatarMichael S. Tsirkin +(cherry picked from commit 63dc0b86) +--- + hw/i386/amd_iommu.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c +index 12742b1433..4697864123 100644 +--- a/hw/i386/amd_iommu.c ++++ b/hw/i386/amd_iommu.c +@@ -1279,15 +1279,15 @@ static int amdvi_int_remap_msi(AMDVIState *iommu, + ret = -AMDVI_IR_ERR; + break; + case AMDVI_IOAPIC_INT_TYPE_NMI: +- pass = dte[3] & AMDVI_DEV_NMI_PASS_MASK; ++ pass = dte[2] & AMDVI_DEV_NMI_PASS_MASK; + trace_amdvi_ir_delivery_mode("nmi"); + break; + case AMDVI_IOAPIC_INT_TYPE_INIT: +- pass = dte[3] & AMDVI_DEV_INT_PASS_MASK; ++ pass = dte[2] & AMDVI_DEV_INT_PASS_MASK; + trace_amdvi_ir_delivery_mode("init"); + break; + case AMDVI_IOAPIC_INT_TYPE_EINT: +- pass = dte[3] & AMDVI_DEV_EINT_PASS_MASK; ++ pass = dte[2] & AMDVI_DEV_EINT_PASS_MASK; + trace_amdvi_ir_delivery_mode("eint"); + break; + default: +-- +2.33.0 + diff --git a/amd_iommu-Use-correct-bitmask-to-set-capability-BAR.patch b/amd_iommu-Use-correct-bitmask-to-set-capability-BAR.patch new file mode 100644 index 0000000..1244994 --- /dev/null +++ b/amd_iommu-Use-correct-bitmask-to-set-capability-BAR.patch @@ -0,0 +1,54 @@ +From 2566994410ffb38a754aa91619cc8533284e5f60 Mon Sep 17 00:00:00 2001 +From: jiesong +Date: Tue, 19 Aug 2025 23:04:21 +0800 +Subject: [PATCH] amd_iommu: Use correct bitmask to set capability BAR + +AMD IOMMU provides the base address of control registers through +IVRS table and PCI capability. Since this base address is of 64 bit, +use 32 bits mask (instead of 16 bits) to set BAR low and high. + +Fixes: d29a09ca ("hw/i386: Introduce AMD IOMMU") +Signed-off-by: default avatarSairaj Kodilkar +Reviewed-by: default avatarVasant Hegde +Message-Id: <20250207045354.27329-3-sarunkod@amd.com> +Reviewed-by: MST's avatarMichael S. Tsirkin +Signed-off-by: MST's avatarMichael S. Tsirkin +(cherry picked from commit 3684717b) +Signed-off-by: default avatarMichael Tokarev +--- + hw/i386/amd_iommu.c | 4 ++-- + hw/i386/amd_iommu.h | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c +index 12742b1433..77aee33b01 100644 +--- a/hw/i386/amd_iommu.c ++++ b/hw/i386/amd_iommu.c +@@ -1543,9 +1543,9 @@ static void amdvi_pci_realize(PCIDevice *pdev, Error **errp) + /* reset AMDVI specific capabilities, all r/o */ + pci_set_long(pdev->config + s->capab_offset, AMDVI_CAPAB_FEATURES); + pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_BAR_LOW, +- AMDVI_BASE_ADDR & ~(0xffff0000)); ++ AMDVI_BASE_ADDR & MAKE_64BIT_MASK(14, 18)); + pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_BAR_HIGH, +- (AMDVI_BASE_ADDR & ~(0xffff)) >> 16); ++ AMDVI_BASE_ADDR >> 32); + pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_RANGE, + 0xff000000); + pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_MISC, 0); +diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h +index c5065a3e27..555a7a5162 100644 +--- a/hw/i386/amd_iommu.h ++++ b/hw/i386/amd_iommu.h +@@ -185,7 +185,7 @@ + AMDVI_CAPAB_FLAG_HTTUNNEL | AMDVI_CAPAB_EFR_SUP) + + /* AMDVI default address */ +-#define AMDVI_BASE_ADDR 0xfed80000 ++#define AMDVI_BASE_ADDR 0xfed80000ULL + + /* page management constants */ + #define AMDVI_PAGE_SHIFT 12 +-- +2.33.0 + diff --git a/docs-about-emulation-Fix-broken-link.patch b/docs-about-emulation-Fix-broken-link.patch new file mode 100644 index 0000000..8563b74 --- /dev/null +++ b/docs-about-emulation-Fix-broken-link.patch @@ -0,0 +1,36 @@ +From 61af0f4d976a04fe8a334a99d2fd9c81a4ae28cf Mon Sep 17 00:00:00 2001 +From: houhaole_yewu +Date: Wed, 13 Aug 2025 14:39:16 +0800 +Subject: [PATCH] docs/about/emulation: Fix broken link semihosting link to + risc-v changed + +Signed-off-by: Santiago Monserrat Campanello +Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2717 +Reviewed-by: Alistair Francis +Reviewed-by: Thomas Huth +Message-ID: <20250305102632.91376-1-santimonserr@gmail.com> +Signed-off-by: Alistair Francis +(cherry picked from commit 672cb29) +Signed-off-by: Michael Tokarev + +Signed-off-by: houhaole_yewu +--- + docs/about/emulation.rst | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/docs/about/emulation.rst b/docs/about/emulation.rst +index a2eefe3f3f..cfe9379ef2 100644 +--- a/docs/about/emulation.rst ++++ b/docs/about/emulation.rst +@@ -185,7 +185,7 @@ for that architecture. + - https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;a=blob;f=libgloss/nios2/nios2-semi.txt;hb=HEAD + * - RISC-V + - System and User-mode +- - https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc ++ - https://github.com/riscv-non-isa/riscv-semihosting/blob/main/riscv-semihosting.adoc + * - Xtensa + - System + - Tensilica ISS SIMCALL +-- +2.33.0 + diff --git a/hw-display-qxl-render-fix-qxl_unpack_chunks-chunk-si.patch b/hw-display-qxl-render-fix-qxl_unpack_chunks-chunk-si.patch new file mode 100644 index 0000000..02aa2fe --- /dev/null +++ b/hw-display-qxl-render-fix-qxl_unpack_chunks-chunk-si.patch @@ -0,0 +1,61 @@ +From 32c63cddf6865e0fd0ac981e013f378183fbcb2a Mon Sep 17 00:00:00 2001 +From: guping +Date: Fri, 1 Aug 2025 06:36:34 +0000 +Subject: [PATCH] hw/display/qxl-render: fix qxl_unpack_chunks() chunk size + calculation cherry-pick from 8e8cb3b5722babe7e7b597b3805bf09f24ed6979 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +In case of multiple chunks, code in qxl_unpack_chunks() takes size of the +wrong (next in the chain) chunk, instead of using current chunk size. +This leads to wrong number of bytes being copied, and to crashes if next +chunk size is larger than the current one. + +Based on the code by Gao Yong. + +Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1628 +Tested-by: Thaddeus Hogan thaddeus@thogan.com +Tested-by: Vadim Zeitlin vadim@wxwidgets.org +Signed-off-by: Michael Tokarev mjt@tls.msk.ru +Reviewed-by: Thomas Huth thuth@redhat.com +Message-ID: 20250221134856.478806-1-mjt@tls.msk.ru +Signed-off-by: Philippe Mathieu-Daudé philmd@linaro.org + +Signed-off-by: guping +--- + hw/display/qxl-render.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c +index ec99ec887a..7df961fcdb 100644 +--- a/hw/display/qxl-render.c ++++ b/hw/display/qxl-render.c +@@ -222,6 +222,7 @@ static void qxl_unpack_chunks(void *dest, size_t size, PCIQXLDevice *qxl, + uint32_t max_chunks = 32; + size_t offset = 0; + size_t bytes; ++ QXLPHYSICAL next_chunk_phys = 0; + + for (;;) { + bytes = MIN(size - offset, chunk->data_size); +@@ -230,7 +231,15 @@ static void qxl_unpack_chunks(void *dest, size_t size, PCIQXLDevice *qxl, + if (offset == size) { + return; + } +- chunk = qxl_phys2virt(qxl, chunk->next_chunk, group_id, ++ next_chunk_phys = chunk->next_chunk; ++ /* fist time, only get the next chunk's data size */ ++ chunk = qxl_phys2virt(qxl, next_chunk_phys, group_id, ++ sizeof(QXLDataChunk)); ++ if (!chunk) { ++ return; ++ } ++ /* second time, check data size and get data */ ++ chunk = qxl_phys2virt(qxl, next_chunk_phys, group_id, + sizeof(QXLDataChunk) + chunk->data_size); + if (!chunk) { + return; +-- +2.33.0 + diff --git a/hw-i386-amd_iommu-Assign-pci-id-0x1419-for-the-AMD-I.patch b/hw-i386-amd_iommu-Assign-pci-id-0x1419-for-the-AMD-I.patch new file mode 100644 index 0000000..6392540 --- /dev/null +++ b/hw-i386-amd_iommu-Assign-pci-id-0x1419-for-the-AMD-I.patch @@ -0,0 +1,48 @@ +From 6bff3e6be5041c8379238e605fa78ccab4f4267b Mon Sep 17 00:00:00 2001 +From: jiesong +Date: Tue, 19 Aug 2025 21:54:11 +0800 +Subject: [PATCH] hw/i386/amd_iommu: Assign pci-id 0x1419 for the AMD IOMMU + device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Currently, the QEMU-emulated AMD IOMMU device use PCI vendor id 0x1022 +(AMD) with device id zero (undefined). Eventhough this does not cause any +functional issue for AMD IOMMU driver since it normally uses information +in the ACPI IVRS table to probe and initialize the device per +recommendation in the AMD IOMMU specification, the device id zero causes +the Windows Device Manager utility to show the device as an unknown device. + +Since Windows only recognizes AMD IOMMU device with device id 0x1419 as +listed in the machine.inf file, modify the QEMU AMD IOMMU model to use +the id 0x1419 to avoid the issue. This advertise the IOMMU as the AMD +IOMMU device for Family 15h (Models 10h-1fh). + +Signed-off-by: default avatarSuravee Suthikulpanit +Message-Id: <20250325021140.5676-1-suravee.suthikulpanit@amd.com> +Reviewed-by: default avatarDaniel P. Berrangé +Reviewed-by: default avatarYan Vugenfirer +Reviewed-by: MST's avatarMichael S. Tsirkin +Signed-off-by: MST's avatarMichael S. Tsirkin +(cherry picked from commit 71925548) +Signed-off-by: default avatarMichael Tokarev +--- + hw/i386/amd_iommu.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c +index 12742b1433..d64d06ec63 100644 +--- a/hw/i386/amd_iommu.c ++++ b/hw/i386/amd_iommu.c +@@ -1631,6 +1631,7 @@ static void amdvi_pci_class_init(ObjectClass *klass, void *data) + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->vendor_id = PCI_VENDOR_ID_AMD; ++ k->device_id = 0x1419; + k->class_id = 0x0806; + k->realize = amdvi_pci_realize; + +-- +2.33.0 + diff --git a/hw-virtio-fix-Werror-maybe-uninitialized.patch b/hw-virtio-fix-Werror-maybe-uninitialized.patch new file mode 100644 index 0000000..37b6e14 --- /dev/null +++ b/hw-virtio-fix-Werror-maybe-uninitialized.patch @@ -0,0 +1,44 @@ +From ce68e103d1b7624b2950b72a06bb63d1396905cd Mon Sep 17 00:00:00 2001 +From: guping +Date: Thu, 21 Aug 2025 06:31:36 +0000 +Subject: [PATCH] hw/virtio: fix -Werror=maybe-uninitialized +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +cherry-pick from 3073c6b99557042476add4ddbcc8c834ae70fce5 + +hw/virtio: fix -Werror=maybe-uninitialized + +../hw/virtio/vhost-shadow-virtqueue.c:545:13: error: ‘r’ may be used uninitialized [-Werror=maybe-uninitialized] + +Set `r` to 0 at every loop, since we don't check vhost_svq_get_buf() +return value. + +Signed-off-by: Marc-André Lureau +Reviewed-by: Stefano Garzarella + +Signed-off-by: guping +--- + hw/virtio/vhost-shadow-virtqueue.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/virtio/vhost-shadow-virtqueue.c b/hw/virtio/vhost-shadow-virtqueue.c +index fc5f408f77..3b2beaea24 100644 +--- a/hw/virtio/vhost-shadow-virtqueue.c ++++ b/hw/virtio/vhost-shadow-virtqueue.c +@@ -526,10 +526,10 @@ static void vhost_svq_flush(VhostShadowVirtqueue *svq, + size_t vhost_svq_poll(VhostShadowVirtqueue *svq, size_t num) + { + size_t len = 0; +- uint32_t r; + + while (num--) { + int64_t start_us = g_get_monotonic_time(); ++ uint32_t r = 0; + + do { + if (vhost_svq_more_used(svq)) { +-- +2.33.0 + diff --git a/migration-show-error-message-when-postcopy-fails.patch b/migration-show-error-message-when-postcopy-fails.patch new file mode 100644 index 0000000..ae1621f --- /dev/null +++ b/migration-show-error-message-when-postcopy-fails.patch @@ -0,0 +1,43 @@ +From a2b046a39482e26ac200fdc42af3be195fdc5193 Mon Sep 17 00:00:00 2001 +From: dinglimin +Date: Thu, 14 Aug 2025 15:03:47 +0800 +Subject: [PATCH] migration: show error message when postcopy fails + MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 + Content-Transfer-Encoding: 8bit +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The 'info migrate' command only shows the error message when the +migration state is 'failed'. When postcopy is used, however, +the 'postcopy-paused' state is used instead of 'failed', so we +must show the error message there too. + +Signed-off-by: Daniel P. Berrangé +Reviewed-by: Fabiano Rosas +Link: https://lore.kernel.org/qemu-devel/20250721133913.2914669-1-berrange@redhat.com +[line break to satisfy checkpatch] +Signed-off-by: Fabiano Rosas +Signed-off-by: dinglimin +--- + migration/migration-hmp-cmds.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/migration/migration-hmp-cmds.c b/migration/migration-hmp-cmds.c +index d6d5f373a1..9abbb38690 100644 +--- a/migration/migration-hmp-cmds.c ++++ b/migration/migration-hmp-cmds.c +@@ -73,7 +73,9 @@ void hmp_info_migrate(Monitor *mon, const QDict *qdict) + if (info->has_status) { + monitor_printf(mon, "Migration status: %s", + MigrationStatus_str(info->status)); +- if (info->status == MIGRATION_STATUS_FAILED && info->error_desc) { ++ if ((info->status == MIGRATION_STATUS_FAILED || ++ info->status == MIGRATION_STATUS_POSTCOPY_PAUSED) && ++ info->error_desc) { + monitor_printf(mon, " (%s)\n", info->error_desc); + } else { + monitor_printf(mon, "\n"); +-- +2.33.0 + diff --git a/qemu.spec b/qemu.spec index 9b5a4b4..1118f3b 100644 --- a/qemu.spec +++ b/qemu.spec @@ -3,7 +3,7 @@ Name: qemu Version: 8.2.0 -Release: 41 +Release: 42 Epoch: 11 Summary: QEMU is a generic and open source machine emulator and virtualizer License: GPLv2 and BSD and MIT and CC-BY-SA-4.0 @@ -1019,6 +1019,15 @@ Patch1002: hw-riscv-virt-acpi-build.c-Generate-SPCR-table.patch Patch1003: hw-riscv-virt-acpi-build.c-Add-SRAT-and-SLIT-ACPI-ta.patch Patch1004: plugins-loader-fix-deadlock-when-resetting-uninstall.patch Patch1005: smbios-Fix-buffer-overrun-when-using-path-option.patch +Patch1006: migration-show-error-message-when-postcopy-fails.patch +Patch1007: docs-about-emulation-Fix-broken-link.patch +Patch1008: update-include-hw-xen-arch_hvm.h.patch +Patch1009: hw-display-qxl-render-fix-qxl_unpack_chunks-chunk-si.patch +Patch1010: hw-i386-amd_iommu-Assign-pci-id-0x1419-for-the-AMD-I.patch +Patch1011: amd_iommu-Use-correct-bitmask-to-set-capability-BAR.patch +Patch1012: amd_iommu-Use-correct-DTE-field-for-interrupt-passth.patch +Patch1013: tcg-Reset-data_gen_ptr-correctly.patch +Patch1014: hw-virtio-fix-Werror-maybe-uninitialized.patch BuildRequires: flex BuildRequires: gcc @@ -1621,6 +1630,17 @@ getent passwd qemu >/dev/null || \ %endif %changelog +* Wed Aug 27 2025 Pengrui Zhang - 11:8.2.0-42 +- migration: show error message when postcopy fails +- docs/about/emulation: Fix broken link +- update include/hw/xen/arch_hvm.h. +- hw/display/qxl-render: fix qxl_unpack_chunks() chunk size calculation +- hw/i386/amd_iommu: Assign pci-id 0x1419 for the AMD IOMMU device +- amd_iommu: Use correct bitmask to set capability BAR +- amd_iommu: Use correct DTE field for interrupt passthrough +- tcg: Reset data_gen_ptr correctly +- hw/virtio: fix -Werror=maybe-uninitialized + * Tue Aug 26 2025 Pengrui Zhang - 11:8.2.0-41 - target/i386/kvm: Refine VMX controls setting for backward compatibility - Bugfix: Correctly set vms->bootinfo.confidential in virtCCA senarios. diff --git a/tcg-Reset-data_gen_ptr-correctly.patch b/tcg-Reset-data_gen_ptr-correctly.patch new file mode 100644 index 0000000..bbde41c --- /dev/null +++ b/tcg-Reset-data_gen_ptr-correctly.patch @@ -0,0 +1,46 @@ +From e02a44d575158f46b05ba5e1bac463da2e5a1822 Mon Sep 17 00:00:00 2001 +From: guping +Date: Thu, 21 Aug 2025 06:08:28 +0000 +Subject: [PATCH] tcg: Reset data_gen_ptr correctly cherry-pick from + fbe5afdd30cdf428ee3f65d9bb8f9fdbbe4387bf + +This pointer needs to be reset after overflow just like +code_buf and code_ptr. + +Cc: qemu-stable@nongnu.org +Fixes: 57a269469db ("tcg: Infrastructure for managing constant pools") +Acked-by: Alistair Francis +Reviewed-by: Pierrick Bouvier +Reviewed-by: LIU Zhiwei +Signed-off-by: Richard Henderson +(cherry picked from commit a7cfd751fb269de4a93bf1658cb13911c7ac77cc) +Signed-off-by: Michael Tokarev + +Signed-off-by: guping +--- + tcg/tcg.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tcg/tcg.c b/tcg/tcg.c +index 61fcf8597d..d4616b81e0 100644 +--- a/tcg/tcg.c ++++ b/tcg/tcg.c +@@ -1428,7 +1428,6 @@ TranslationBlock *tcg_tb_alloc(TCGContext *s) + goto retry; + } + qatomic_set(&s->code_gen_ptr, next); +- s->data_gen_ptr = NULL; + return tb; + } + +@@ -6126,6 +6125,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start) + */ + s->code_buf = tcg_splitwx_to_rw(tb->tc.ptr); + s->code_ptr = s->code_buf; ++ s->data_gen_ptr = NULL; + + #ifdef TCG_TARGET_NEED_LDST_LABELS + QSIMPLEQ_INIT(&s->ldst_labels); +-- +2.33.0 + diff --git a/update-include-hw-xen-arch_hvm.h.patch b/update-include-hw-xen-arch_hvm.h.patch new file mode 100644 index 0000000..6318eab --- /dev/null +++ b/update-include-hw-xen-arch_hvm.h.patch @@ -0,0 +1,37 @@ +From 33cd1fa9235fcf0f773e4c9db2f323d773d6af08 Mon Sep 17 00:00:00 2001 +From: houhaole_yewu +Date: Wed, 13 Aug 2025 07:51:45 +0000 +Subject: [PATCH] update include/hw/xen/arch_hvm.h. hw/xen/hvm: Fix Aarch64 + typo There is no TARGET_ARM_64 definition. Luckily enough, when + TARGET_AARCH64 is defined, TARGET_ARM also is. +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fixes: 733766c ("hw/arm: introduce xenpvh machine") +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Pierrick Bouvier +Reviewed-by: Richard Henderson +Message-Id: <20250305153929.43687-2-philmd@linaro.org> +(cherry picked from commit 3a11b65) +Signed-off-by: Michael Tokarev + +Signed-off-by: houhaole_yewu +--- + include/hw/xen/arch_hvm.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/hw/xen/arch_hvm.h b/include/hw/xen/arch_hvm.h +index c7c515220d..df39c819c8 100644 +--- a/include/hw/xen/arch_hvm.h ++++ b/include/hw/xen/arch_hvm.h +@@ -1,5 +1,5 @@ + #if defined(TARGET_I386) || defined(TARGET_X86_64) + #include "hw/i386/xen_arch_hvm.h" +-#elif defined(TARGET_ARM) || defined(TARGET_ARM_64) ++#elif defined(TARGET_ARM) || defined(TARGET_AARCH64) + #include "hw/arm/xen_arch_hvm.h" + #endif +-- +2.33.0 + -- Gitee