From 0e6006f2d76e27b0c65f5360cddd829dbf9ccc4c Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Tue, 8 Feb 2022 20:48:17 +0800 Subject: [PATCH 1/6] cpu: parse +/- feature to avoid failure To avoid cpu feature parse failure, +/- feature is added. Signed-off-by: Xu Yandong Signed-off-by: Mingwang Li (cherry picked from commit 60e5a096420264a27e99c90dcbc09ee58d7bf674) --- cpu-parse-feature-to-avoid-failure.patch | 68 ++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 cpu-parse-feature-to-avoid-failure.patch diff --git a/cpu-parse-feature-to-avoid-failure.patch b/cpu-parse-feature-to-avoid-failure.patch new file mode 100644 index 0000000..4ae42d9 --- /dev/null +++ b/cpu-parse-feature-to-avoid-failure.patch @@ -0,0 +1,68 @@ +From ef83cde8dd2c9b404527354489b14d2bd238733d Mon Sep 17 00:00:00 2001 +From: Xu Yandong +Date: Tue, 8 Feb 2022 20:48:17 +0800 +Subject: [PATCH] cpu: parse +/- feature to avoid failure + +To avoid cpu feature parse failure, +/- feature is added. + +Signed-off-by: Xu Yandong +Signed-off-by: Mingwang Li +--- + target/arm/cpu64.c | 37 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c +index 15245a60a8..019edc66c9 100644 +--- a/target/arm/cpu64.c ++++ b/target/arm/cpu64.c +@@ -933,10 +933,47 @@ static gchar *aarch64_gdb_arch_name(CPUState *cs) + return g_strdup("aarch64"); + } + ++/* Parse "+feature,-feature,feature=foo" CPU feature string ++ */ ++static void arm_cpu_parse_featurestr(const char *typename, char *features, ++ Error **errp ) ++{ ++ char *featurestr; ++ char *val; ++ static bool cpu_globals_initialized; ++ ++ if (cpu_globals_initialized) { ++ return; ++ } ++ cpu_globals_initialized = true; ++ ++ featurestr = features ? strtok(features, ",") : NULL; ++ while (featurestr) { ++ val = strchr(featurestr, '='); ++ if (val) { ++ GlobalProperty *prop = g_new0(typeof(*prop), 1); ++ *val = 0; ++ val++; ++ prop->driver = typename; ++ prop->property = g_strdup(featurestr); ++ prop->value = g_strdup(val); ++ qdev_prop_register_global(prop); ++ } else if (featurestr[0] == '+' || featurestr[0] == '-') { ++ warn_report("Ignore %s feature\n", featurestr); ++ } else { ++ error_setg(errp, "Expected key=value format, found %s.", ++ featurestr); ++ return; ++ } ++ featurestr = strtok(NULL, ","); ++ } ++} ++ + static void aarch64_cpu_class_init(ObjectClass *oc, void *data) + { + CPUClass *cc = CPU_CLASS(oc); + ++ cc->parse_features = arm_cpu_parse_featurestr; + cc->gdb_read_register = aarch64_cpu_gdb_read_register; + cc->gdb_write_register = aarch64_cpu_gdb_write_register; + cc->gdb_num_core_regs = 34; +-- +2.27.0 + -- Gitee From 3ddfd467c2b03d63525a2276fac262eee1f1db6a Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Tue, 8 Feb 2022 21:36:22 +0800 Subject: [PATCH 2/6] cpu: add Kunpeng-920 cpu support Add the Kunpeng-920 CPU model Signed-off-by: Xu Yandong Signed-off-by: Mingwang Li (cherry picked from commit a619469084fbefe8d7664f0039e6f764596cbea2) --- cpu-add-Kunpeng-920-cpu-support.patch | 68 +++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 cpu-add-Kunpeng-920-cpu-support.patch diff --git a/cpu-add-Kunpeng-920-cpu-support.patch b/cpu-add-Kunpeng-920-cpu-support.patch new file mode 100644 index 0000000..5e24be9 --- /dev/null +++ b/cpu-add-Kunpeng-920-cpu-support.patch @@ -0,0 +1,68 @@ +From 8ebab06c4824626ab4d7204133cd1e7b9c67f468 Mon Sep 17 00:00:00 2001 +From: Xu Yandong +Date: Tue, 8 Feb 2022 21:36:22 +0800 +Subject: [PATCH] cpu: add Kunpeng-920 cpu support + +Add the Kunpeng-920 CPU model + +Signed-off-by: Xu Yandong +Signed-off-by: Mingwang Li +--- + hw/arm/virt.c | 1 + + target/arm/cpu64.c | 21 +++++++++++++++++++++ + 2 files changed, 22 insertions(+) + +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index 30da05dfe0..a4a35584e9 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -201,6 +201,7 @@ static const char *valid_cpus[] = { + ARM_CPU_TYPE_NAME("cortex-a53"), + ARM_CPU_TYPE_NAME("cortex-a57"), + ARM_CPU_TYPE_NAME("cortex-a72"), ++ ARM_CPU_TYPE_NAME("Kunpeng-920"), + ARM_CPU_TYPE_NAME("a64fx"), + ARM_CPU_TYPE_NAME("host"), + ARM_CPU_TYPE_NAME("max"), +diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c +index 019edc66c9..aaca79f7c3 100644 +--- a/target/arm/cpu64.c ++++ b/target/arm/cpu64.c +@@ -248,6 +248,26 @@ static void aarch64_a72_initfn(Object *obj) + define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); + } + ++static void aarch64_kunpeng_920_initfn(Object *obj) ++{ ++ ARMCPU *cpu = ARM_CPU(obj); ++ ++ /* ++ * Hisilicon Kunpeng-920 CPU is similar to cortex-a72, ++ * so first initialize cpu data as cortex-a72, ++ * and then update the special register. ++ */ ++ aarch64_a72_initfn(obj); ++ ++ cpu->midr = 0x480fd010; ++ cpu->ctr = 0x84448004; ++ cpu->isar.id_aa64pfr0 = 0x11001111; ++ cpu->isar.id_aa64dfr0 = 0x110305408; ++ cpu->isar.id_aa64isar0 = 0x10211120; ++ cpu->isar.id_aa64mmfr0 = 0x101125; ++ cpu->kvm_target = KVM_ARM_TARGET_GENERIC_V8; ++} ++ + void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) + { + /* +@@ -892,6 +912,7 @@ static const ARMCPUInfo aarch64_cpus[] = { + { .name = "cortex-a57", .initfn = aarch64_a57_initfn }, + { .name = "cortex-a53", .initfn = aarch64_a53_initfn }, + { .name = "cortex-a72", .initfn = aarch64_a72_initfn }, ++ { .name = "Kunpeng-920", .initfn = aarch64_kunpeng_920_initfn}, + { .name = "a64fx", .initfn = aarch64_a64fx_initfn }, + { .name = "max", .initfn = aarch64_max_initfn }, + }; +-- +2.27.0 + -- Gitee From d2257e0109a3fa95ef2b2c5d90b719d2bbfed3d8 Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Tue, 8 Feb 2022 22:18:55 +0800 Subject: [PATCH 3/6] cpu: add Cortex-A72 processor kvm target support The ARM Cortex-A72 is ARMv8-A micro-architecture, add kvm target to ARM Cortex-A72 processor definition. Signed-off-by: Xu Yandong Signed-off-by: Mingwang Li (cherry picked from commit 4cbee3a6ae3ebb7b179cd65161e63314864195e0) --- ...tex-A72-processor-kvm-target-support.patch | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 cpu-add-Cortex-A72-processor-kvm-target-support.patch diff --git a/cpu-add-Cortex-A72-processor-kvm-target-support.patch b/cpu-add-Cortex-A72-processor-kvm-target-support.patch new file mode 100644 index 0000000..9a83a8d --- /dev/null +++ b/cpu-add-Cortex-A72-processor-kvm-target-support.patch @@ -0,0 +1,51 @@ +From f0da7fa5230b5f771570b2c12288e4a56a20dd97 Mon Sep 17 00:00:00 2001 +From: Xu Yandong +Date: Tue, 8 Feb 2022 22:18:55 +0800 +Subject: [PATCH] cpu: add Cortex-A72 processor kvm target support + +The ARM Cortex-A72 is ARMv8-A micro-architecture, +add kvm target to ARM Cortex-A72 processor definition. + +Signed-off-by: Xu Yandong +Signed-off-by: Mingwang Li +--- + target/arm/cpu64.c | 1 + + target/arm/kvm-consts.h | 3 +++ + 2 files changed, 4 insertions(+) + +diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c +index aaca79f7c3..556b6f3691 100644 +--- a/target/arm/cpu64.c ++++ b/target/arm/cpu64.c +@@ -202,6 +202,7 @@ static void aarch64_a72_initfn(Object *obj) + ARMCPU *cpu = ARM_CPU(obj); + + cpu->dtb_compatible = "arm,cortex-a72"; ++ cpu->kvm_target = QEMU_KVM_ARM_TARGET_GENERIC_V8; + set_feature(&cpu->env, ARM_FEATURE_V8); + set_feature(&cpu->env, ARM_FEATURE_NEON); + set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); +diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h +index 580f1c1fee..5f1311ade7 100644 +--- a/target/arm/kvm-consts.h ++++ b/target/arm/kvm-consts.h +@@ -130,6 +130,8 @@ MISMATCH_CHECK(QEMU_PSCI_RET_DISABLED, PSCI_RET_DISABLED); + #define QEMU_KVM_ARM_TARGET_CORTEX_A57 2 + #define QEMU_KVM_ARM_TARGET_XGENE_POTENZA 3 + #define QEMU_KVM_ARM_TARGET_CORTEX_A53 4 ++/* Generic ARM v8 target */ ++#define QEMU_KVM_ARM_TARGET_GENERIC_V8 5 + + /* There's no kernel define for this: sentinel value which + * matches no KVM target value for either 64 or 32 bit +@@ -141,6 +143,7 @@ MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_FOUNDATION_V8, KVM_ARM_TARGET_FOUNDATION_V8); + MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A57, KVM_ARM_TARGET_CORTEX_A57); + MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_XGENE_POTENZA, KVM_ARM_TARGET_XGENE_POTENZA); + MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A53, KVM_ARM_TARGET_CORTEX_A53); ++MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_GENERIC_V8, KVM_ARM_TARGET_GENERIC_V8); + + #define CP_REG_ARM64 0x6000000000000000ULL + #define CP_REG_ARM_COPROC_MASK 0x000000000FFF0000 +-- +2.27.0 + -- Gitee From 224303e6da8dd988df7edc24d85999c330e27ff6 Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Tue, 8 Feb 2022 22:56:37 +0800 Subject: [PATCH 4/6] add Phytium's CPU models: FT-2000+ and Tengyun-S2500. Signed-off-by: Jiadong Zeng Signed-off-by: Mingwang Li (cherry picked from commit d27426660c6fcf85241b1677d3ff3e218ab943d9) --- ...CPU-models-FT-2000-and-Tengyun-S2500.patch | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch diff --git a/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch b/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch new file mode 100644 index 0000000..0bc4707 --- /dev/null +++ b/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch @@ -0,0 +1,74 @@ +From ec35c96006851a956a7e401f29af0ffe137c4bb9 Mon Sep 17 00:00:00 2001 +From: Jiadong Zeng +Date: Tue, 8 Feb 2022 22:56:37 +0800 +Subject: [PATCH] add Phytium's CPU models: FT-2000+ and Tengyun-S2500. + +Signed-off-by: Jiadong Zeng +Signed-off-by: Mingwang Li +--- + hw/arm/virt.c | 2 ++ + target/arm/cpu64.c | 28 ++++++++++++++++++++++++++++ + 2 files changed, 30 insertions(+) + +diff --git a/hw/arm/virt.c b/hw/arm/virt.c +index a4a35584e9..3c972fdab0 100644 +--- a/hw/arm/virt.c ++++ b/hw/arm/virt.c +@@ -202,6 +202,8 @@ static const char *valid_cpus[] = { + ARM_CPU_TYPE_NAME("cortex-a57"), + ARM_CPU_TYPE_NAME("cortex-a72"), + ARM_CPU_TYPE_NAME("Kunpeng-920"), ++ ARM_CPU_TYPE_NAME("FT-2000+"), ++ ARM_CPU_TYPE_NAME("Tengyun-S2500"), + ARM_CPU_TYPE_NAME("a64fx"), + ARM_CPU_TYPE_NAME("host"), + ARM_CPU_TYPE_NAME("max"), +diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c +index 556b6f3691..08d886de7b 100644 +--- a/target/arm/cpu64.c ++++ b/target/arm/cpu64.c +@@ -676,6 +676,32 @@ static Property arm_cpu_pauth_property = + static Property arm_cpu_pauth_impdef_property = + DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false); + ++static void aarch64_max_ft2000plus_initfn(Object *obj) ++{ ++ ARMCPU *cpu = ARM_CPU(obj); ++ ++ if (kvm_enabled()) { ++ kvm_arm_set_cpu_features_from_host(cpu); ++ kvm_arm_add_vcpu_properties(obj); ++ } else { ++ aarch64_a72_initfn(obj); ++ cpu->midr = 0x70186622; ++ } ++} ++ ++static void aarch64_max_tengyun_s2500_initfn(Object *obj) ++{ ++ ARMCPU *cpu = ARM_CPU(obj); ++ ++ if (kvm_enabled()) { ++ kvm_arm_set_cpu_features_from_host(cpu); ++ kvm_arm_add_vcpu_properties(obj); ++ } else { ++ aarch64_a72_initfn(obj); ++ cpu->midr = 0x70186632; ++ } ++} ++ + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); + * otherwise, a CPU with as many features enabled as our emulation supports. + * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; +@@ -914,6 +940,8 @@ static const ARMCPUInfo aarch64_cpus[] = { + { .name = "cortex-a53", .initfn = aarch64_a53_initfn }, + { .name = "cortex-a72", .initfn = aarch64_a72_initfn }, + { .name = "Kunpeng-920", .initfn = aarch64_kunpeng_920_initfn}, ++ { .name = "FT-2000+", .initfn = aarch64_max_ft2000plus_initfn }, ++ { .name = "Tengyun-S2500", .initfn = aarch64_max_tengyun_s2500_initfn }, + { .name = "a64fx", .initfn = aarch64_a64fx_initfn }, + { .name = "max", .initfn = aarch64_max_initfn }, + }; +-- +2.27.0 + -- Gitee From 2e0820fa15702b320767101d0e7e6cb08f69e1ff Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Wed, 9 Feb 2022 11:51:01 +0800 Subject: [PATCH 5/6] =?UTF-8?q?spec:=20Update=20patch=20and=20changelog=20?= =?UTF-8?q?with=20!225=20=E5=9B=9E=E5=90=88openEuler=20CPU=20model=20?= =?UTF-8?q?=E8=87=AA=E7=A0=94patch=20Merge=20pull=20request=20!225=20from?= =?UTF-8?q?=20limingwang/qemu-6.2.0=20!225?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit cpu: parse +/- feature to avoid failure cpu: add Kunpeng-920 cpu support cpu: add Cortex-A72 processor kvm target support add Phytium's CPU models: FT-2000+ and Tengyun-S2500. Signed-off-by: Chen Qun (cherry picked from commit d7b5ffe16030ee86e8ac670da5a99b6ad86adacc) --- qemu.spec | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/qemu.spec b/qemu.spec index 4f67145..365390c 100644 --- a/qemu.spec +++ b/qemu.spec @@ -11,6 +11,10 @@ Source2: 99-qemu-guest-agent.rules Source3: bridge.conf Patch0001: net-dump.c-Suppress-spurious-compiler-warning.patch +Patch0002: cpu-parse-feature-to-avoid-failure.patch +Patch0003: cpu-add-Kunpeng-920-cpu-support.patch +Patch0004: cpu-add-Cortex-A72-processor-kvm-target-support.patch +Patch0005: add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch BuildRequires: flex BuildRequires: gcc @@ -453,6 +457,12 @@ getent passwd qemu >/dev/null || \ %endif %changelog +* Wed Feb 09 2022 Chen Qun +- cpu: parse +/- feature to avoid failure +- cpu: add Kunpeng-920 cpu support +- cpu: add Cortex-A72 processor kvm target support +- add Phytium's CPU models: FT-2000+ and Tengyun-S2500. + * Tue Feb 8 2022 Xiangdong Liu - net/dump.c: Suppress spurious compiler warning -- Gitee From abf628d4541e4940e051f09634708edaa795bee1 Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Wed, 9 Feb 2022 11:51:03 +0800 Subject: [PATCH 6/6] spec: Update release version with !225 increase release verison by one Signed-off-by: Chen Qun (cherry picked from commit c4b7370a792f114a3a7e7dee22a85e86885bd5f3) --- qemu.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu.spec b/qemu.spec index 365390c..4f5c52d 100644 --- a/qemu.spec +++ b/qemu.spec @@ -1,6 +1,6 @@ Name: qemu Version: 6.2.0 -Release: 2 +Release: 3 Epoch: 2 Summary: QEMU is a generic and open source machine emulator and virtualizer License: GPLv2 and BSD and MIT and CC-BY-SA-4.0 -- Gitee