diff --git a/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch b/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch index 0bc4707a244ebc8366648250c75755e8446c6e44..59054fcd50247274f44f77be96f55b5b8f79167a 100644 --- a/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch +++ b/add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch @@ -1,20 +1,19 @@ -From ec35c96006851a956a7e401f29af0ffe137c4bb9 Mon Sep 17 00:00:00 2001 +From 390fd2c09b75a5d2b267007cb19777818440963c Mon Sep 17 00:00:00 2001 From: Jiadong Zeng -Date: Tue, 8 Feb 2022 22:56:37 +0800 +Date: Tue, 7 Dec 2021 12:30:37 +0800 Subject: [PATCH] add Phytium's CPU models: FT-2000+ and Tengyun-S2500. Signed-off-by: Jiadong Zeng -Signed-off-by: Mingwang Li --- hw/arm/virt.c | 2 ++ - target/arm/cpu64.c | 28 ++++++++++++++++++++++++++++ - 2 files changed, 30 insertions(+) + target/arm/cpu64.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 75 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c -index a4a35584e9..3c972fdab0 100644 +index 85d6eba35..4c876fcf1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c -@@ -202,6 +202,8 @@ static const char *valid_cpus[] = { +@@ -208,6 +208,8 @@ static const char *valid_cpus[] = { ARM_CPU_TYPE_NAME("cortex-a57"), ARM_CPU_TYPE_NAME("cortex-a72"), ARM_CPU_TYPE_NAME("Kunpeng-920"), @@ -24,12 +23,12 @@ index a4a35584e9..3c972fdab0 100644 ARM_CPU_TYPE_NAME("host"), ARM_CPU_TYPE_NAME("max"), diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c -index 556b6f3691..08d886de7b 100644 +index 188539798..c7c35cfa0 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c -@@ -676,6 +676,32 @@ static Property arm_cpu_pauth_property = - static Property arm_cpu_pauth_impdef_property = - DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false); +@@ -931,11 +931,84 @@ static void aarch64_a64fx_initfn(Object *obj) + /* TODO: Add A64FX specific HPC extension registers */ + } +static void aarch64_max_ft2000plus_initfn(Object *obj) +{ @@ -37,11 +36,34 @@ index 556b6f3691..08d886de7b 100644 + + if (kvm_enabled()) { + kvm_arm_set_cpu_features_from_host(cpu); -+ kvm_arm_add_vcpu_properties(obj); + } else { -+ aarch64_a72_initfn(obj); -+ cpu->midr = 0x70186622; ++ uint64_t t; ++ aarch64_a57_initfn(obj); ++ ++ /* ++ * Reset MIDR so the guest doesn't mistake our 'max' CPU type for a real ++ * one and try to apply errata workarounds or use impdef features we ++ * don't provide. ++ * An IMPLEMENTER field of 0 means "reserved for software use"; ++ * ARCHITECTURE must be 0xf indicating ++ * "v7 or later, check ID registers to see which features are present"; ++ * the VARIANT, PARTNUM and REVISION fields are all implementation ++ * defined and we choose to define PARTNUM just in case guest ++ * code needs to distinguish this QEMU CPU from other software ++ * implementations, though this shouldn't be needed. ++ */ ++ t = FIELD_DP64(0, MIDR_EL1, IMPLEMENTER, 0x70); ++ t = FIELD_DP64(t, MIDR_EL1, ARCHITECTURE, 0xf); ++ t = FIELD_DP64(t, MIDR_EL1, PARTNUM, 0x662); ++ t = FIELD_DP64(t, MIDR_EL1, VARIANT, 0x1); ++ t = FIELD_DP64(t, MIDR_EL1, REVISION, 2); ++ cpu->midr = t; + } ++ ++ aarch64_add_sve_properties(obj); ++ object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq, ++ cpu_max_set_sve_max_vq, NULL, NULL); ++ +} + +static void aarch64_max_tengyun_s2500_initfn(Object *obj) @@ -50,17 +72,37 @@ index 556b6f3691..08d886de7b 100644 + + if (kvm_enabled()) { + kvm_arm_set_cpu_features_from_host(cpu); -+ kvm_arm_add_vcpu_properties(obj); + } else { -+ aarch64_a72_initfn(obj); -+ cpu->midr = 0x70186632; ++ uint64_t t; ++ aarch64_a57_initfn(obj); ++ ++ /* ++ * Reset MIDR so the guest doesn't mistake our 'max' CPU type for a real ++ * one and try to apply errata workarounds or use impdef features we ++ * don't provide. ++ * An IMPLEMENTER field of 0 means "reserved for software use"; ++ * ARCHITECTURE must be 0xf indicating ++ * "v7 or later, check ID registers to see which features are present"; ++ * the VARIANT, PARTNUM and REVISION fields are all implementation ++ * defined and we choose to define PARTNUM just in case guest ++ * code needs to distinguish this QEMU CPU from other software ++ * implementations, though this shouldn't be needed. ++ */ ++ t = FIELD_DP64(0, MIDR_EL1, IMPLEMENTER, 0x70); ++ t = FIELD_DP64(t, MIDR_EL1, ARCHITECTURE, 0xf); ++ t = FIELD_DP64(t, MIDR_EL1, PARTNUM, 0x663); ++ t = FIELD_DP64(t, MIDR_EL1, VARIANT, 0x1); ++ t = FIELD_DP64(t, MIDR_EL1, REVISION, 3); ++ cpu->midr = t; + } ++ ++ aarch64_add_sve_properties(obj); ++ object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq, ++ cpu_max_set_sve_max_vq, NULL, NULL); +} + - /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); - * otherwise, a CPU with as many features enabled as our emulation supports. - * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; -@@ -914,6 +940,8 @@ static const ARMCPUInfo aarch64_cpus[] = { + static const ARMCPUInfo aarch64_cpus[] = { + { .name = "cortex-a57", .initfn = aarch64_a57_initfn }, { .name = "cortex-a53", .initfn = aarch64_a53_initfn }, { .name = "cortex-a72", .initfn = aarch64_a72_initfn }, { .name = "Kunpeng-920", .initfn = aarch64_kunpeng_920_initfn}, @@ -70,5 +112,5 @@ index 556b6f3691..08d886de7b 100644 { .name = "max", .initfn = aarch64_max_initfn }, }; -- -2.27.0 +2.33.0 diff --git a/qemu.spec b/qemu.spec index 1b1d3df340c2bf9a8bbaf1793ee00af9bcbd00d6..1d8a3fce6f1df3cf627aa189f6ec32b6fa5d8ecb 100644 --- a/qemu.spec +++ b/qemu.spec @@ -3,7 +3,7 @@ Name: qemu Version: 6.2.0 -Release: 75 +Release: 76 Epoch: 10 Summary: QEMU is a generic and open source machine emulator and virtualizer License: GPLv2 and BSD and MIT and CC-BY-SA-4.0 @@ -1080,6 +1080,9 @@ getent passwd qemu >/dev/null || \ %endif %changelog +* Tue Jul 12 2023 - 10:6.2.0.-76 +- spec: update add-Phytium-s-CPU-models-FT-2000-and-Tengyun-S2500.patch + * Thu Jun 29 2023 - 10:6.2.0-75 - Add lbt support for kvm. - Fix smp.cores value and Fix divide 0 error