# BoloPi_PCB **Repository Path**: sunxiang_git/BoloPi_PCB ## Basic Information - **Project Name**: BoloPi_PCB - **Description**: F1C100s BoloPi / PineapplePi PCB - **Primary Language**: Unknown - **License**: MIT - **Default Branch**: master - **Homepage**: None - **GVP Project**: No ## Statistics - **Stars**: 1 - **Forks**: 1 - **Created**: 2021-07-16 - **Last Updated**: 2025-03-27 ## Categories & Tags **Categories**: Uncategorized **Tags**: None ## README # BoloPi_PCB ---------------------------- 注意:板子目前发现的问题: 1. V1-V3版本的板子的R1和R2都是没有改阻值的,默认10K。而F1C100s不能贴10K,需要200K。有可能贴了10K会导致芯片工作不正常! 2. 版本1和版本2的EA3036QDR输入端电源没有加电容,在某些电源纹波大的情况下可能会烧EA3036QDR ---------------------------- Attention: flaws found at present: 1. R1 and R2 in V1 -V3 of boards was 10K by default. But f1c100s can't be 10K, it needs 200K. It is possible that 10K will lead to abnormal operation of the chip! 2. The ea3036qdr input power supply of version 1 and version 2 is not equipped with capacitor, which may burn ea3036qdr in case of large power ripple ![bolopi_F1 3d view](https://raw.githubusercontent.com/VeiLiang/BoloPi_PCB/master/BoloPi-F1_V4_3D.png) --- ![bolopi_F1 in kind](https://raw.githubusercontent.com/VeiLiang/BoloPi_PCB/master/BoLoPi-F1_V4_Real.jpg) --- ![bolopi_F1 2d view](https://raw.githubusercontent.com/VeiLiang/BoloPi_PCB/master/BoloPi-F1_V4_2D.png) --- ![bolopi_F1 top_layer](https://raw.githubusercontent.com/VeiLiang/BoloPi_PCB/master/BoloPi-F1_V4_Top.png) --- ![bolopi_F1 buttom_layer](https://raw.githubusercontent.com/VeiLiang/BoloPi_PCB/master/BoloPi-F1_V4_Buttom.png) ---