From 9bbcd95153df5169c2396a3af7c3f8e533ad1407 Mon Sep 17 00:00:00 2001 From: Rory Li <736729045@qq.com> Date: Sun, 20 Oct 2024 13:55:59 +0000 Subject: [PATCH] update news/README.md. Signed-off-by: Rory Li <736729045@qq.com> --- news/README.md | 849 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 849 insertions(+) diff --git a/news/README.md b/news/README.md index ba7b909..9867dee 100644 --- a/news/README.md +++ b/news/README.md @@ -8,6 +8,855 @@ * [2024 年 - 上半年](2024-1st-half.md) +## 20241020：第 114 期 + +### 内核动态 + +#### RISC-V 架构支持 + +**[v4: Add DeepComputing FML13V01 board dts](http://lore.kernel.org/linux-riscv/20241019162605.308475-1-guodong@riscstar.com/)** + +> This series updates Device Tree related files to introduce the +> FML13V10 board from DeepComputing, which incorporates a StarFive +> JH7110 SoC. + +**[v10: RISC-V: Detect and report speed of unaligned vector accesses](http://lore.kernel.org/linux-riscv/20241017-jesse_unaligned_vector-v10-0-5b33500160f8@rivosinc.com/)** + +> Adds support for detecting and reporting the speed of unaligned vector +> accesses on RISC-V CPUs. + +**[v1: riscv, bpf: Make BPF_CMPXCHG fully ordered](http://lore.kernel.org/linux-riscv/20241017143628.2673894-1-parri.andrea@gmail.com/)** + +> According to the prototype formal BPF memory consistency model +> discussed e.g. in [1] and following the ordering properties of +> the C/in-kernel macro atomic_cmpxchg(), a BPF atomic operation +> with the BPF_CMPXCHG modifier is fully ordered. + +**[v1: RISC-V: KVM: SBI system suspend support](http://lore.kernel.org/linux-riscv/20241017074538.18867-4-ajones@ventanamicro.com/)** + +> The SBI spec provides a specification for system suspend to RAM and Linux +> already supports invoking the SBI call for suspend to RAM when +> CONFIG_SUSPEND is selected. + +**[v1: riscv/entry: get correct syscall number from syscall_get_nr()](http://lore.kernel.org/linux-riscv/20241017-fix-riscv-syscall-nr-v1-1-4edb4ca07f07@gmail.com/)** + +> The return value of syscall_enter_from_user_mode() is always -1 when the +> syscall was filtered. We can't know whether syscall_nr is -1 when we get -1 +> from syscall_enter_from_user_mode(). + +**[v1: next: pinctrl: th1520: Dereference pointer only after NULL check](http://lore.kernel.org/linux-riscv/20241016134223.4079-1-everestkc@everestkc.com.np/)** + +> The pointer `func` is dereferenced before NULL check. +> Move the dereference after the NULL check. + +**[v3: Prevent dynamic relocations in vDSO](http://lore.kernel.org/linux-riscv/20241016083625.136311-1-alexghiti@rivosinc.com/)** + +**[v10: Linux RISC-V IOMMU Support](http://lore.kernel.org/linux-riscv/cover.1729059707.git.tjeznach@rivosinc.com/)** + +> This patch series introduces support for RISC-V IOMMU architected +> hardware into the Linux kernel. + +**[v5: riscv: spacemit: add pinctrl support to K1 SoC](http://lore.kernel.org/linux-riscv/20241016-02-k1-pinctrl-v5-0-03d395222e4f@gentoo.org/)** + +> This series adds pinctrl support to SpacemiT's K1 SoC, the controller +> uses a single register to describe all pin functions, including +> bias pull up/down, drive strength, schmitter trigger, slew rate, +> strong pull-up, mux mode. In patch #3, we add the pinctrl property of +> uart device for the Bananapi-F3 board. + +**[v4: pwm: Add pwm driver for Sophgo SG2042](http://lore.kernel.org/linux-riscv/cover.1729037302.git.unicorn_wang@outlook.com/)** + +> Add driver for pwm controller of Sophgo SG2042 SoC. + +**[v11: Tracepoints and static branch in Rust](http://lore.kernel.org/linux-riscv/20241015-tracepoint-v11-0-cceb65820089@google.com/)** + +> This series includes a patch that adds a user of tracepoits to the +> rust_print sample. Please see that sample for details on what is needed +> to use this feature in Rust code. + +**[v5: riscv: Add perf support to collect KVM guest statistics from host side](http://lore.kernel.org/linux-riscv/cover.1728980031.git.zhouquan@iscas.ac.cn/)** + +> Add basic guest support to RISC-V perf, enabling it to distinguish +> whether PMU interrupts occur in the host or the guest, and then +> collect some basic guest information from the host side +> (guest os callchain is not supported for now). + +**[v4: Introduce support for T-head TH1520 Mailbox](http://lore.kernel.org/linux-riscv/20241014123314.1231517-1-m.wilczynski@samsung.com/)** + +> The T-head TH1520 SoC supports a hardware mailbox that enables two cores +> within the SoC to communicate and coordinate [1]. + +**[v5: riscv: sophgo: add thermal sensor support for cv180x/sg200x SoCs](http://lore.kernel.org/linux-riscv/20241014073813.23984-1-heylenay@4d2.org/)** + +> This series implements driver for Sophgo cv180x/sg200x on-chip thermal +> sensor and adds thermal zones for CV1800B SoCs. + +**[v1: tty: hvc: riscv_sbi: instantiate the legcay console earlier](http://lore.kernel.org/linux-riscv/20241014000857.3032-1-jszhang@kernel.org/)** + +> The hvc_instantiate() is an early console discovery mechanism, it is +> usually called before allocating hvc terminal devices. + +#### LoongArch 架构支持 + +**[v1: LoongArch: Enable IRQ if do_ale() triggered in irq-enabled context](http://lore.kernel.org/loongarch/20241018035958.1060381-1-chenhuacai@loongson.cn/)** + +> Unaligned access exception can be triggered in irq-enabled context such +> as user mode, in this case do_ale() may call get_user() which may cause +> sleep. + +#### ARM 架构支持 + +**[v6: Implement vendor resets for PSCI SYSTEM_RESET2](http://lore.kernel.org/linux-arm-kernel/20241018-arm-psci-system_reset2-vendor-reboots-v6-0-50cbe88b0a24@quicinc.com/)** + +> The PSCI SYSTEM_RESET2 call allows vendor firmware to define additional +> reset types which could be mapped to the reboot argument. + +**[v8: Add mfd, pinctrl and pwm support to EN7581 SoC](http://lore.kernel.org/linux-arm-kernel/20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org/)** + +> Introduce airoha-mfd driver in order to load pinctrl and pwm drivers for +> EN7581 SoC. + +**[v1: Add support Boundary Device Nitrogen8MP Universal SMARC Carrier Board](http://lore.kernel.org/linux-arm-kernel/20241018091023.29286-1-bhavin.sharma@siliconsignals.io/)** + +> Add initial support for Nitrogen8MP Universal SMARC Carrier Board with +> Nitrogen8MP SMARC System on Module. + +**[v1: Expose SCMI Transport properties](http://lore.kernel.org/linux-arm-kernel/20241018080602.3952869-1-cristian.marussi@arm.com/)** + +> SCMI transports are characterized by a number of properties: the values +> assumed by some of them tightly depend on the choices taken at design +> time and on the overall archiecture of the specific platform: things like +> timeouts, maximum message size and number of in-flight messages are closely +> tied to the architecture of the platform like number of SCMI agents on the +> system, physical memory available to the SCMI server...so on and so forth. + +**[v5: coresight: Add static trace id support](http://lore.kernel.org/linux-arm-kernel/20241018032217.39728-1-quic_jinlmao@quicinc.com/)** + +> Some HW has static trace id which cannot be changed via +> software programming. + +**[v2: Add minimal Samsung Galaxy S20 Series board, SM-G981B and SM-G980F support](http://lore.kernel.org/linux-arm-kernel/20241017164328.17077-1-umer.uddin@mentallysanemainliners.org/)** + +> This series adds initial support for the Samsung Galaxy S20 Series, also +> initial board support for the Samsung Galaxy S20 5G (SM-G981B) +> codenamed x1s and the Samsung Galaxy S20 (SM-G980F) codenamed +> x1slte. + +**[v2: mailbox: add async request mechanism w/ a user](http://lore.kernel.org/linux-arm-kernel/20241017163649.3007062-1-tudor.ambarus@linaro.org/)** + +> This adds a simple mailbox async mechanism, similar to the one found in +> the crypto subsystem. It empowers mailbox controllers with hardware +> queue support. + +**[v1: Improve arm64 pkeys handling in signal delivery](http://lore.kernel.org/linux-arm-kernel/20241017133909.3837547-1-kevin.brodsky@arm.com/)** + +> This series is a follow-up to Joey's Permission Overlay Extension (POE) +> series that recently landed on mainline. + +**[v7: arm64: Support for running as a guest in Arm CCA](http://lore.kernel.org/linux-arm-kernel/20241017131434.40935-1-steven.price@arm.com/)** + +> This series adds support for running Linux in a protected VM under the +> Arm Confidential Compute Architecture (CCA). + +**[v4: Add minimal boot support for IPQ5424](http://lore.kernel.org/linux-arm-kernel/20241017123626.204421-1-quic_srichara@quicinc.com/)** + +> The IPQ5424 is Qualcomm's 802.11be SoC for Routers, Gateways and +> Access Points. + +**[v2: arm64: stacktrace: improve unwind reporting](http://lore.kernel.org/linux-arm-kernel/20241017092538.1859841-1-mark.rutland@arm.com/)** + +> This series improves arm64's unwinder to explicitly identify exception +> boundaries, reporting both pt_regs::pc and pt_regs::lr and explicitly +> identifying the source of elements in the stacktrace. + +**[v1: KVM: arm64: Make L1Ip feature in CTR_EL0 writable from userspace](http://lore.kernel.org/linux-arm-kernel/20241017085925.40532-1-shameerali.kolothum.thodi@huawei.com/)** + +> Only allow userspace to set VIPT(0b10) or PIPT(0b11) for L1Ip based on +> what hardware reports as both AIVIVT (0b01) and VPIPT (0b00) are +> documented as reserved. + +**[v9: Marvell Odyssey uncore performance monitor support](http://lore.kernel.org/linux-arm-kernel/20241016080153.3546353-1-gthiagarajan@marvell.com/)** + +> This series of patches introduces support for uncore performance monitor +> units (PMUs) on the Marvell Odyssey platform. The PMUs covered in this +> series include the DDR PMU and LLC-TAD PMU. + +**[v2: Add minimal Exynos990 SoC and SM-N981B support](http://lore.kernel.org/linux-arm-kernel/20241015210205.963931-1-igor.belwon@mentallysanemainliners.org/)** + +> This series adds initial support for the Exynos 990 SoC and also +> initial board support for the Samsung Galaxy Note20 5G (SM-N981B) +> codenamed c1s. + +#### X86 架构支持 + +**[v10: block atomic writes for xfs](http://lore.kernel.org/lkml/20241019125113.369994-1-john.g.garry@oracle.com/)** + +> This series expands atomic write support to filesystems, specifically +> XFS. + +**[v1: perf vendor events amd: Add more Zen 5 events and metrics](http://lore.kernel.org/lkml/cover.1729242778.git.sandipan.das@amd.com/)** + +> Add data fabric events and metrics taken from the now released Processor +> Programming Reference (PPR) for AMD Family 1Ah Model 02h Revision C1 +> Processors document available at the link below. + +**[v2: KVM: SVM: Inhibit AVIC on SNP-enabled system without HvInUseWrAllowed feature](http://lore.kernel.org/lkml/20241018085037.14131-1-suravee.suthikulpanit@amd.com/)** + +> On SNP-enabled system, VMRUN marks AVIC Backing Page as in-use while +> the guest is running for both secure and non-secure guest. Any hypervisor +> write to the in-use vCPU's AVIC backing page (e.g. to inject an interrupt) +> will generate unexpected #PF in the host. + +**[GIT PULL: LOCKDEP changes for v6.13](http://lore.kernel.org/lkml/ZxHq7-o8vV07M36J@Boquns-Mac-mini.local/)** + +**[v1: x86/mm: Make memremap(MEMREMAP_WB) map memory as encrypted by default](http://lore.kernel.org/lkml/20241017155642.1942514-1-kirill.shutemov@linux.intel.com/)** + +> Make memremap(MEMREMAP_WB) produce encrypted/private mapping by default +> unless MEMREMAP_DEC is specified. + +**[v3: Clavis LSM](http://lore.kernel.org/lkml/20241017155516.2582369-1-eric.snowberg@oracle.com/)** + +> Each end-user has their own security threat model. What is important to one +> end-user may not be important to another. There is not a right or wrong threat +> model. + +**[v1: Introduce initial support for the AMD I3C (non-HCI) to DW driver](http://lore.kernel.org/lkml/20241017150330.3035568-1-Shyam-sundar.S-k@amd.com/)** + +> The AMD EPYC platform design has DIMMs connected over the I3C bus, with +> each DIMM containing three components: SPD, PMIC, and RCD. + +**[v6: Dell AWCC platform_profile support](http://lore.kernel.org/lkml/20241017081211.126214-2-kuurtb@gmail.com/)** + +> This patch adds platform_profile support for Dell devices which implement +> User Selectable Thermal Tables (USTT) that are meant to be controlled by +> Alienware Command Center (AWCC). + +**[v1: acpi: zero-initialize acpi_object union structure](http://lore.kernel.org/lkml/20241017035940.4067922-1-payamm@google.com/)** + +> The way in which acpi_object union is being initialized varies based on +> compiler type, version and flags used. + +**[v2: mm/memblock,x86,acpi: hotplug memory alignment advisement](http://lore.kernel.org/lkml/20241016192445.3118-1-gourry@gourry.net/)** + +> When physical address regions are not aligned to memory block size, +> the misaligned portion is lost (stranded capacity). + +**[v1: x86/mtrr: Rename mtrr_overwrite_state() to guest_force_mtrr_state()](http://lore.kernel.org/lkml/20241016105048.757081-1-kirill.shutemov@linux.intel.com/)** + +> Rename the helper to better reflect its function. + +**[v6: MCE wrapper and support for new SMCA syndrome MSRs](http://lore.kernel.org/lkml/20241016064021.2773618-1-avadhut.naik@amd.com/)** + +> This patchset adds a new wrapper for struct mce to prevent its bloating +> and export vendor specific error information. + +**[v17: tracing: fprobe: function_graph: Multi-function graph and fprobe on fgraph](http://lore.kernel.org/lkml/172904026427.36809.516716204730117800.stgit@devnote2/)** + +> Here is the 17th version of the series to re-implement the fprobe on +> function-graph tracer. + +**[v3: Add support for AMD hardware feedback interface](http://lore.kernel.org/lkml/20241015213645.1476-1-mario.limonciello@amd.com/)** + +> The AMD Heterogeneous core design and Hardware Feedback Interface (HFI) +> provide behavioral classification and a dynamically updated ranking table +> for the scheduler to use when choosing cores for tasks. + +**[v4: x86/apic: Always explicitly disarm TSC-deadline timer](http://lore.kernel.org/lkml/20241015061522.25288-1-rui.zhang@intel.com/)** + +> New processors have become pickier about the local APIC timer state +> before entering low power modes. + +**[v6: Support SMT control on arm64](http://lore.kernel.org/lkml/20241015021841.35713-1-yangyicong@huawei.com/)** + +> The core CPU control framework supports runtime SMT control which +> is not yet supported on arm64. + +**[v16: tracing: fprobe: function_graph: Multi-function graph and fprobe on fgraph](http://lore.kernel.org/lkml/172895571278.107311.14000164546881236558.stgit@devnote2/)** + +> Here is the 16th version of the series to re-implement the fprobe on +> function-graph tracer. The previous version is; + +**[v1: platform/x86: dell-wmi: Ignore suspend notifications](http://lore.kernel.org/lkml/20241014220529.397390-1-W_Armin@gmx.de/)** + +> Some machines like the Dell G15 5155 emit WMI events when +> suspending/resuming. Ignore those WMI events. + +#### 进程调度 + +**[v1: net-next: net/sched: act_api: unexport tcf_action_dump_1()](http://lore.kernel.org/lkml/20241017161934.3599046-1-vladimir.oltean@nxp.com/)** + +> This isn't used outside act_api.c, but is called by tcf_dump_walker() +> prior to its definition. So move it upwards and make it static. + +**[v1: net: net/sched: act_api: deny mismatched skip_sw/skip_hw flags for actions created by classifiers](http://lore.kernel.org/lkml/20241017161049.3570037-1-vladimir.oltean@nxp.com/)** + +> tcf_action_init() has logic for checking mismatches between action and +> filter offload flags (skip_sw/skip_hw). + +**[v1: sched/cpuacct: show only present CPUs to userspace](http://lore.kernel.org/lkml/20241017102138.92504-1-aleksandr.mikhalitsyn@canonical.com/)** + +> After commit b0c69e1214bc ("drivers: base: Use present CPUs in GENERIC_CPU_DEVICES") +> changed which CPUs are shown in /sys/devices/system/cpu/ (only "present" ones) +> it also makes sense to change cpuacct cgroupv1 code not to report CPUs +> which are not present in the system as it confuses userspace. + +**[v1: perf tools: sched-pipe bench: add (-n) nonblocking benchmark](http://lore.kernel.org/lkml/20241016190009.866615-1-bgeffon@google.com/)** + +> The -n mode will benchmark pipes in a non-blocking mode using +> epoll_wait. + +**[v1: sched/fair: Rename vruntime_gt() to field_gt()](http://lore.kernel.org/lkml/3a0c974c-41d4-4203-9ffd-f2ec4da898aa@gmail.com/)** + +> Since commit aef6987d8954 ("sched/eevdf: Propagate min_slice up the cgroup +> hierarchy") introduced min_slice, we can update min_slice just like we do +> in __min_vruntime_update(). Rename vruntime_gt() to field_gt(). + +#### 内存管理 + +**[v1: mm-unstable: mm/page_alloc: try not to overestimate free highatomic](http://lore.kernel.org/linux-mm/20241020051315.356103-1-yuzhao@google.com/)** + +> OOM kills due to vastly overestimated free highatomic reserves were +> observed. + +**[v1: mm-unstable: mm: allow set/clear page_type again](http://lore.kernel.org/linux-mm/20241020042212.296781-1-yuzhao@google.com/)** + +> Some page flags (page->flags) were converted to page types +> (page->page_types). A recent example is PG_hugetlb. + +**[v1: maple_tree: current split may result in deficient node](http://lore.kernel.org/linux-mm/20241020024628.22469-1-richard.weiyang@gmail.com/)** + +> Here are 4 patches related to correctly split node. + +**[v1: mm: multi-gen LRU: Have secondary MMUs participate in MM_WALK](http://lore.kernel.org/linux-mm/20241019012940.3656292-1-jthoughton@google.com/)** + +> This series replaces the final non-selftest patchs from this series[1], +> which introduced a similar change (and a new MMU notifier) with KVM +> optimizations. + +**[v3: mm/gup: stop leaking pinned pages in low memory conditions](http://lore.kernel.org/linux-mm/20241018223411.310331-1-jhubbard@nvidia.com/)** + +> If a driver tries to call any of the pin_user_pages*(FOLL_LONGTERM) +> family of functions, and requests "too many" pages, then the call will +> erroneously leave pages pinned. + +**[v1: mm, zswap: don't touch the XArray lock if there is no entry to free](http://lore.kernel.org/linux-mm/20241018192525.95862-1-ryncsn@gmail.com/)** + +> This commit takes it further by optimizing the case where zswap is +> enabled. + +**[v3: powerpc/kfence: Improve kfence support (mainly Hash)](http://lore.kernel.org/linux-mm/cover.1729271995.git.ritesh.list@gmail.com/)** + +> This patch series addresses following to improve kfence support on Powerpc. + +**[v2: mm: Split critical region in remap_file_pages() and invoke LSMs in between](http://lore.kernel.org/linux-mm/20241018161415.3845146-1-roberto.sassu@huaweicloud.com/)** + +> Commit ea7e2d5e49c0 ("mm: call the security_mmap_file() LSM hook in +> remap_file_pages()") fixed a security issue, it added an LSM check when +> trying to remap file pages, so that LSMs have the opportunity to evaluate +> such action like for other memory operations such as mmap() and mprotect(). + +**[v1: mm: Split locks in remap_file_pages()](http://lore.kernel.org/linux-mm/20241018144710.3800385-1-roberto.sassu@huaweicloud.com/)** + +> Commit ea7e2d5e49c0 ("mm: call the security_mmap_file() LSM hook in +> remap_file_pages()") fixed a security issue, it added an LSM check when +> trying to remap file pages, so that LSMs have the opportunity to evaluate +> such action like for other memory operations such as mmap() and mprotect(). + +**[v1: mm: zswap: add support for zswapin of large folios](http://lore.kernel.org/linux-mm/20241018105026.2521366-1-usamaarif642@gmail.com/)** + +> This series makes sure that the benefits of large folios (fewer +> page faults, batched PTE and rmap manipulation, reduced lru list, +> TLB coalescing (for arm64 and amd)) are not lost at swap out when +> using zswap. + +**[v2: linux-mm: make pcp_decay_high working better with NOHZ full](http://lore.kernel.org/linux-mm/1729238277-26683-1-git-send-email-mengensun@tencent.com/)** + +> When a cpu entring NOHZ full, quiet_vmstat may flush percpu +> zonestats and nodestats. + +**[v1: zswap IAA decompress batching](http://lore.kernel.org/linux-mm/20241018064805.336490-1-kanchana.p.sridhar@intel.com/)** + +> This patch-series applies over [1], the IAA compress batching patch-series. + +**[v1: zswap IAA compress batching](http://lore.kernel.org/linux-mm/20241018064101.336232-1-kanchana.p.sridhar@intel.com/)** + +> This RFC patch-series introduces the use of the Intel Analytics Accelerator +> (IAA) for parallel compression of pages in a folio, and for batched reclaim +> of hybrid any-order batches of folios in shrink_folio_list(). + +**[v1: mm: make pcp decay work with onhz](http://lore.kernel.org/linux-mm/1729231600-19607-1-git-send-email-mengensun@tencent.com/)** + +**[v2: Improve the tmpfs large folio read performance](http://lore.kernel.org/linux-mm/cover.1729218573.git.baolin.wang@linux.alibaba.com/)** + +> The tmpfs has already supported the PMD-sized large folios, but the tmpfs +> read operation still performs copying at the PAGE SIZE granularity, which +> is not perfect. This patch changes to copy data at the folio granularity, +> which can improve the read performance. + +**[v7: tmpfs: Add case-insensitive support for tmpfs](http://lore.kernel.org/linux-mm/20241017-tonyk-tmpfs-v7-0-a9c056f8391f@igalia.com/)** + +> This patchset adds support for case-insensitive file names lookups in +> tmpfs. + +**[v4: introduce PIDFD_SELF* sentinels](http://lore.kernel.org/linux-mm/cover.1729198898.git.lorenzo.stoakes@oracle.com/)** + +> This series introduces sentinels for this purposes which can be passed as +> the pidfd in this instance rather than having to establish a dummy fd for +> this purpose. + +**[v1: implement lightweight guard pages](http://lore.kernel.org/linux-mm/cover.1729196871.git.lorenzo.stoakes@oracle.com/)** + +> Userland library functions such as allocators and threading implementations +> often require regions of memory to act as 'guard pages' - mappings which, +> when accessed, result in a fatal signal being sent to the accessing +> process. + +**[v2: mm/mglru: reset page lru tier bits when activating](http://lore.kernel.org/linux-mm/20241017181528.3358821-1-weixugc@google.com/)** + +> When a folio is activated, lru_gen_add_folio() moves the folio to the +> youngest generation. + +**[v3: bpf: lib/buildid: handle memfd_secret() files in build_id_parse()](http://lore.kernel.org/linux-mm/20241017174713.2157873-1-andrii@kernel.org/)** + +> We need to handle this special case gracefully in build ID fetching +> code. Return -EFAULT whenever secretmem file is passed to build_id_parse() +> family of APIs. + +**[v1: memcg/hugetlb: Adding hugeTLB counters to memory controller](http://lore.kernel.org/linux-mm/20241017160438.3893293-1-joshua.hahnjy@gmail.com/)** + +> HugeTLB usage is a metric that can provide utility for monitors hoping +> to get more insight into the memory usage patterns in cgroups. + +**[v4: tmpfs: don't enable large folios if not supported](http://lore.kernel.org/linux-mm/20241017141742.1169404-1-wangkefeng.wang@huawei.com/)** + +> The tmpfs could support large folio, but there is some configurable +> options(mount options and runtime deny/force) to enable/disable large +> folio allocation, so there is a performance issue when perform write +> without large folio, the issue is similar to commit 4e527d5841e2 +> ("iomap: fault in smaller chunks for non-large folio mappings"). + +**[v1: memblock: Uniform initialization all reserved pages to MIGRATE_MOVABLE](http://lore.kernel.org/linux-mm/20241017064449.5235-1-suhua1@kingsoft.com/)** + +> Currently when CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set, the reserved +> pages are initialized to MIGRATE_MOVABLE by default in memmap_init. + +**[v1: munmap sealed memory cause memory to split (bug)](http://lore.kernel.org/linux-mm/20241017022627.3112811-1-jeffxu@chromium.org/)** + +> It appears there is a regression on the latest mm, +> when munmap sealed memory, it can cause unexpected VMA split. + +**[v3: mm/slub: Improve data handling of krealloc() when orig_size is enabled](http://lore.kernel.org/linux-mm/20241016154152.1376492-1-feng.tang@intel.com/)** + +> Danilo Krummrich's patch [1] raised one problem about krealloc() that +> its caller doesn't pass the old request size, say the object is 64 +> bytes kmalloc one, but caller originally only requested 48 bytes. Then +> when krealloc() shrinks or grows in the same object, or allocate a new +> bigger object, it lacks this 'original size' information to do accurate +> data preserving or zeroing (when __GFP_ZERO is set). + +**[v3: vmscan: add a vmscan event for reclaim_pages](http://lore.kernel.org/linux-mm/20241016143227.961162-1-jaewon31.kim@samsung.com/)** + +> The reclaim_folio_list uses a dummy reclaim_stat and is not being +> used. To know the memory stat, add a new trace event. This is useful how +> how many pages are not reclaimed or why. + +**[v1: mm: swap: Use str_true_false() helper function](http://lore.kernel.org/linux-mm/20241016141040.79168-2-thorsten.blum@linux.dev/)** + +> Remove hard-coded strings by using the helper function str_true_false(). + +#### 文件系统 + +**[v4: introduce PIDFD_SELF* sentinels](http://lore.kernel.org/linux-fsdevel/cover.1729198898.git.lorenzo.stoakes@oracle.com/)** + +> This series introduces sentinels for this purposes which can be passed as +> the pidfd in this instance rather than having to establish a dummy fd for +> this purpose. + +**[v1: rust: task: adjust safety comments in Task methods](http://lore.kernel.org/linux-fsdevel/20241015-task-safety-cmnts-v1-1-46ee92c82768@google.com/)** + +> The `Task` struct has several safety comments that aren't so great. For +> example, the reason that it's okay to read the `pid` is that the field +> is immutable, so there is no data race, which is not what the safety +> comment says. + +**[v1: iomap: turn iomap_want_unshare_iter into an inline function](http://lore.kernel.org/linux-fsdevel/20241015041350.118403-1-hch@lst.de/)** + +> iomap_want_unshare_iter currently sits in fs/iomap/buffered-io.c, which +> depends on CONFIG_BLOCK. It is also in used in fs/dax.c whіch has no +> such dependency. Given that it is a trivial check turn it into an inline +> in include/linux/iomap.h to fix the DAX && !BLOCK build. + +**[v3: ovl: file descriptors based layer setup](http://lore.kernel.org/linux-fsdevel/20241014-work-overlayfs-v3-0-32b3fed1286e@kernel.org/)** + +> Currently overlayfs only allows specifying layers through path names. +> This is inconvenient for users such as systemd that want to assemble an +> overlayfs mount purely based on file descriptors. + +**[v2: fsnotify, lsm: Decouple fsnotify from lsm](http://lore.kernel.org/linux-fsdevel/20241013002248.3984442-1-song@kernel.org/)** + +> Currently, fsnotify_open_perm() is called from security_file_open(). This +> is not right for CONFIG_SECURITY=n and CONFIG_FSNOTIFY=y case, as +> security_file_open() in this combination will be a no-op and not call +> fsnotify_open_perm(). Fix this by calling fsnotify_open_perm() directly. + +**[v1: blk: optimization for classic polling](http://lore.kernel.org/linux-fsdevel/3578876466-3733-1-git-send-email-nj.shetty@samsung.com/)** + +> This removes the dependency on interrupts to wake up task. Set task +> state as TASK_RUNNING, if need_resched() returns true, +> while polling for IO completion. + +#### 网络设备 + +**[v1: drivers/net/usb: Lenovo Mini Dock, add support for new USB device ID 0x17EF:0x3098 for the r8152 driver](http://lore.kernel.org/netdev/CAPvBWb=L6FVwSk7iZX21Awez+dwhLMAoGe39f__VC=g7g6H2+g@mail.gmail.com/)** + +> From 7a75dea5721225f4280be53996421962af430c8b Mon Sep 17 00:00:00 2001 + +**[v3: net-next: AccECN protocol preparation patch series](http://lore.kernel.org/netdev/20241018232017.46833-1-chia-yu.chang@nokia-bell-labs.com/)** + +> This updated patch series is grouped in preparation for the AccECN protocol, +> and is part of the full AccECN patch series. + +**[v3: net-next: DualPI2 patch](http://lore.kernel.org/netdev/20241018231419.46523-1-chia-yu.chang@nokia-bell-labs.com/)** + +> Please find the updated patch for DualPI2 +> (IETF RFC9332 https://datatracker.ietf.org/doc/html/rfc9332). + +**[v1: net: stmmac: Disable PCS Link and AN interrupt when PCS AN is disabled](http://lore.kernel.org/netdev/20241018222407.1139697-1-quic_abchauha@quicinc.com/)** + +> Currently we disable PCS ANE when the link speed is 2.5Gbps. +> mac_link_up callback internally calls the fix_mac_speed which internally +> calls stmmac_pcs_ctrl_ane to disable the ANE for 2.5Gbps. + +**[v1: net: usb: qmi_wwan: add Fibocom FG132 0x0112 composition](http://lore.kernel.org/netdev/ZxLKp5YZDy-OM0-e@arcor.de/)** + +> Add Fibocom FG132 0x0112 composition. + +**[[net-next PATCH 0/6] CN20K silicon with mbox support](http://lore.kernel.org/netdev/20241018203058.3641959-1-saikrishnag@marvell.com/)** + +> This patch series add basic mbox support for AF (PF0) <=> PFs and +> PF <=> VFs. AF <=> VFs communication and variable mbox size support will +> come in later. + +**[v1: net-next: net: mv643xx: use ethtool_puts](http://lore.kernel.org/netdev/20241018200522.12506-1-rosenp@gmail.com/)** + +> Allows simplifying get_strings and avoids manual pointer manipulation. + +**[v1: wifi: wilc1000: Add proper error handling for remaining CMD52](http://lore.kernel.org/netdev/20241018194244.280322-1-marex@denx.de/)** + +> A few of the CMD52 calls did not have any error handling, add it. +> This prevents odd errors like "Unexpected interrupt (1) int=nnn" +> when the CMD52 fails just above in the IRQ handler and the CMD52 +> error code is ignored by the driver. Fill the error handling in. + +**[v1: QRTR Multi-endpoint support](http://lore.kernel.org/netdev/20241018181842.1368394-1-denkenz@gmail.com/)** + +> The current implementation of QRTR assumes that each entity on the QRTR +> IPC bus is uniquely identifiable by its node/port combination, with +> node/port combinations being used to route messages between entities. + +**[v3: net-next: net: atlantic: support reading SFP module info](http://lore.kernel.org/netdev/20241018171721.2577386-1-lorenz@brun.one/)** + +> Add support for reading SFP module info and digital diagnostic +> monitoring data if supported by the module. The only Aquantia +> controller without an integrated PHY is the AQC100 which belongs to +> the B0 revision, that's why it's only implemented there. + +**[v4: net: dsa: microchip: disable EEE for KSZ879x/KSZ877x/KSZ876x](http://lore.kernel.org/netdev/20241018160658.781564-1-tharvey@gateworks.com/)** + +> Disable EEE for additional switches with this errata and provide +> additional comments referring to the public errata document. + +**[v3: net: atlantic: support reading SFP module info](http://lore.kernel.org/netdev/20241018154741.2565618-1-lorenz@brun.one/)** + +> Add support for reading SFP module info and digital diagnostic +> monitoring data if supported by the module. The only Aquantia +> controller without an integrated PHY is the AQC100 which belongs to +> the B0 revision, that's why it's only implemented there. + +**[v2: Enable Ethernet on the Genio 700 EVK board](http://lore.kernel.org/netdev/20241018-genio700-eth-v2-0-f3c73b85507b@collabora.com/)** + +> The patches in this series add the ethernet node on mt8188 and enable it +> on the Genio 700 EVK board. + +**[v1: ipmr: Don't mark ip6mr_rtnl_msg_handlers as __initconst](http://lore.kernel.org/netdev/20241018151217.3558216-1-arnd@kernel.org/)** + +> This gets referenced by the ip6_mr_cleanup function, so it must not be +> discarded early. + +**[v3: iwl-next: Refactor sending DDP + E830 support](http://lore.kernel.org/netdev/20241018141823.178918-4-przemyslaw.kitszel@intel.com/)** + +> This series refactors sending DDP segments in accordance to computing +> "last" bit of AQ request (1st patch), then adds support for extended +> format ("valid" + "last" bits in a new "flags" field) of DDP that was +> changed to support Multi-Segment DDP packages needed by E830. + +**[v5: net-next: udp: Add 4-tuple hash for connected sockets](http://lore.kernel.org/netdev/20241018114535.35712-1-lulie@linux.alibaba.com/)** + +> This patchset introduces 4-tuple hash for connected udp sockets, to make +> connected udp lookup faster. + +**[v1: nf-next: netfilter: bpf: Pass string literal as format argument of request_module()](http://lore.kernel.org/netdev/20241018-nf-mod-fmt-v1-1-b5a275d6861c@kernel.org/)** + +> Both gcc-14 and clang-18 report that passing a non-string literal as the +> format argument of request_module() is potentially insecure. + +**[v2: bpf-next: XDP metadata: Rx checksum/GSO hint; Tx GSO offload](http://lore.kernel.org/netdev/20241018091502.411513-1-tianmuyang@huawei.com/)** + +> This series introduce XDP metadata functionality, including Rx checksum/GSO hint +> and Tx GSO offload. This is aimed to transfer control fields when processing jumbo +> frames between VMs. + +**[v1: net-next: netlink: specs: Add missing bitset attrs to ethtool spec](http://lore.kernel.org/netdev/20241018090630.22212-1-donald.hunter@gmail.com/)** + +> There are a couple of attributes missing from the 'bitset' attribute-set +> in the ethtool netlink spec. + +**[v9: iwl-next: igb: Add support for AF_XDP zero-copy](http://lore.kernel.org/netdev/20241018-b4-igb_zero_copy-v9-0-da139d78d796@linutronix.de/)** + +> This is version v8 of the AF_XDP zero-copy support for igb. Since Sriram's +> duties changed I am sending this instead. Additionally, I've tested this on +> real hardware, Intel i210. + +**[v2: net-next: net: stmmac: Refactor FPE as a separate module](http://lore.kernel.org/netdev/cover.1729233020.git.0x1207@gmail.com/)** + +> Refactor FPE implementation by moving common code for DWMAC4 and +> DWXGMAC into a separate FPE module. + +**[v1: net-next: net: netdev_tx_sent_queue() small optimization](http://lore.kernel.org/netdev/20241018052310.2612084-1-edumazet@google.com/)** + +> Change smp_mb() imediately following a set_bit() +> with smp_mb__after_atomic(). + +**[v3: pinctrl: qcom: Introduce Pinctrl for QCS8300](http://lore.kernel.org/netdev/20241018-qcs8300_tlmm-v3-0-8b8d3957cf1a@quicinc.com/)** + +> Introduce Top Level Mode Multiplexer dt-binding and driver for Qualcomm +> QCS8300 SoC. + +**[v1: net: mctp i2c: handle NULL header address](http://lore.kernel.org/netdev/20241018-mctp-i2c-null-dest-v1-1-ba1ab52966e9@codeconstruct.com.au/)** + +> daddr can be NULL if there is no neighbour table entry present, +> in that case the tx packet should be dropped. + +**[v1: net-next: ipv4: Switch inet_addr_hash() to less predictable hash.](http://lore.kernel.org/netdev/20241018014100.93776-1-kuniyu@amazon.com/)** + +> Recently, commit 4a0ec2aa0704 ("ipv6: switch inet6_addr_hash() +> to less predictable hash") and commit 4daf4dc275f1 ("ipv6: switch +> inet6_acaddr_hash() to less predictable hash") hardened IPv6 +> address hash functions. + +**[v1: net-next: r8169: enable EEE at 2.5G per default on RTL8125B](http://lore.kernel.org/netdev/95dd5a0c-09ea-4847-94d9-b7aa3063e8ff@gmail.com/)** + +> Register a6d/12 is shadowing register MDIO_AN_EEE_ADV2. So this line +> disables advertisement of EEE at 2.5G. + +#### 安全增强 + +**[v1: next: powerpc/ps3: replace open-coded sysfs_emit function](http://lore.kernel.org/linux-hardening/ZxMV3YvSulJFZ8rk@mail.google.com/)** + +> This patch replaces open-coded sysfs_emit() in sysfs .show() callbacks + +**[v1: next: net: dev: Introduce struct sockaddr_legacy](http://lore.kernel.org/linux-hardening/1c12601bea3e9c18da6adc106bfcf5b7569e5dfb.1729037131.git.gustavoars@kernel.org/)** + +> We are currently working on enabling the -Wflex-array-member-not-at-end +> compiler option. This option has helped us detect several objects of +> the type `struct sockaddr` that appear in the middle of composite +> structures like `struct rtentry`, `struct compat_rtentry`, and others: + +**[v2: seal system mappings](http://lore.kernel.org/linux-hardening/20241014215022.68530-1-jeffxu@google.com/)** + +> Those mappings are readonly or executable only, sealing can protect +> them from ever changing during the life time of the process. + +#### 异步 IO + +**[v1: for-next: io_uring: static_key for !IORING_SETUP_NO_SQARRAY](http://lore.kernel.org/io-uring/c164a48542fbb080115e2377ecf160c758562742.1729264988.git.asml.silence@gmail.com/)** + +> IORING_SETUP_NO_SQARRAY should be preferred and used by default by +> liburing, optimise flag checking in io_get_sqe() with a static key. + +**[v1: for-next: io_uring: kill io_llist_xchg](http://lore.kernel.org/io-uring/d6765112680d2e86a58b76166b7513391ff4e5d7.1729264960.git.asml.silence@gmail.com/)** + +> io_llist_xchg is only used to set the list to NULL, which can also be +> done with llist_del_all(). Use the latter and kill io_llist_xchg. + +**[v1: io_uring/sqpoll: ensure task state is TASK_RUNNING when running task_work](http://lore.kernel.org/io-uring/0e178150-2eeb-4205-a2c3-3f026fc8e81c@kernel.dk/)** + +> Ensure that the task state is set appropriately for that, just like what +> is done for the other cases in io_run_task_work(). + +**[v1: io_uring/rsrc: ignore dummy_ubuf for buffer cloning](http://lore.kernel.org/io-uring/45120dbb-beee-4718-a8b8-ef5755909c0a@kernel.dk/)** + +> For placeholder buffers, &dummy_ubuf is assigned which is a static +> value. + +**[v1: io_uring/sqpoll: close race on waiting for sqring entries](http://lore.kernel.org/io-uring/78b04485-ad25-448a-88d4-1649f446883c@kernel.dk/)** + +> When an application uses SQPOLL, it must wait for the SQPOLL thread to +> consume SQE entries, if it fails to get an sqe when calling +> io_uring_get_sqe(). + +**[v1: liburing: support for discard block commands](http://lore.kernel.org/io-uring/cover.1728851862.git.asml.silence@gmail.com/)** + +> Add helpers for the block layer discard commands, as well as +> some tests and man pages. + +**[v4: napi tracking strategy](http://lore.kernel.org/io-uring/cover.1728828877.git.olivier@trillion01.com/)** + +> the patch serie consist of very minor fixes followed by the core of the changes +> to implement the new feature. + +**[v7: io_uring: support sqe group and leased group kbuf](http://lore.kernel.org/io-uring/20241012085330.2540955-1-ming.lei@redhat.com/)** + +> The 4th patch supports generic sqe group which is like link chain, but +> allows each sqe in group to be issued in parallel and the group shares +> same IO_LINK & IO_DRAIN boundary, so N:M dependency can be supported with +> sqe group & io link together. + +#### Rust For Linux + +**[v8: rust: Add local_irq abstraction, SpinLockIrq](http://lore.kernel.org/rust-for-linux/20241018232306.476664-1-lyude@redhat.com/)** + +> This adds a token for annotating contexts where IRQs may be disabled on +> non-PREEMPT_RT kernels, a way to use these tokens with Lock types, and +> introduces bindings for spin_lock_irqsave() and +> spin_unlock_irqrestore(). + +**[v2: rust: add PROCMACROLDFLAGS](http://lore.kernel.org/rust-for-linux/20241017210430.2401398-2-elsk@google.com/)** + +> This is needed because the list of flags to link hostprogs is not +> necessarily the same as the list of flags used to link libmacros.so. + +**[v3: hrtimer Rust API](http://lore.kernel.org/rust-for-linux/20241017-hrtimer-v3-v6-12-rc2-v3-0-59a75cbb44da@kernel.org/)** + +> This series adds support for using the `hrtimer` subsystem from Rust code. + +**[v2: rust: page: add Rust version of PAGE_ALIGN](http://lore.kernel.org/rust-for-linux/20241016-page-align-v2-1-e0afe85fc4b4@google.com/)** + +> This is a useful for helper for working with indices into buffers that +> consist of several pages. + +**[v6: Extended MODVERSIONS Support](http://lore.kernel.org/rust-for-linux/20241015231925.3854230-1-mmaurer@google.com/)** + +> This patch series is intended for use alongside the Implement +> MODVERSIONS for RUST series as a replacement for the symbol name +> hashing approach used there to enable RUST and MODVERSIONS at the same +> time. + +#### BPF + +**[v6: net-next: net: stmmac: Add PCI driver support for BCM8958x](http://lore.kernel.org/bpf/20241018205332.525595-1-jitendra.vegiraju@broadcom.com/)** + +> This patchset adds basic PCI ethernet device driver support for Broadcom +> BCM8958x Automotive Ethernet switch SoC devices. + +**[v6: powerpc: Core ftrace rework, support for ftrace direct and bpf trampolines](http://lore.kernel.org/bpf/20241018173632.277333-1-hbathini@linux.ibm.com/)** + +> This series reworks core ftrace support on powerpc to have the function +> profiling sequence moved out of line. This enables us to have a single +> nop at kernel function entry virtually eliminating effect of the +> function tracer when it is not enabled. The function profile sequence is +> moved out of line and is allocated at two separate places depending on a +> new config option. + +**[v1: Only cgroup v2 can be attached by bpf programs](http://lore.kernel.org/bpf/20241018081520.694139-1-chenridong@huaweicloud.com/)** + +> Only cgroup v2 can be attached by bpf programs. + +**[v5: bpf-next: bpf: Support private stack for bpf progs](http://lore.kernel.org/bpf/20241017223138.3175885-1-yonghong.song@linux.dev/)** + +> This patch set implemented a percpu private stack based approach for x86 +> arch. Please see each individual patch for details. + +**[v1: XDP metadata: Rx checksum/GSO hint; Tx GSO offload](http://lore.kernel.org/bpf/20241017135430.51655-1-tianmuyang@huawei.com/)** + +> This series introduce XDP metadata functionality, including Rx checksum/GSO hint +> and Tx GSO offload. This is aimed to transfer control fields when processing jumbo +> frames between VMs. + +**[v2: sched_ext: Use btf_ids to resolve task_struct](http://lore.kernel.org/bpf/20241017024412.16914-1-dtcccc@linux.alibaba.com/)** + +> Save the searching time during bpf_scx_init. + +**[v5: bpf-next: Implement mechanism to signal other threads](http://lore.kernel.org/bpf/20241016084136.10305-1-puranjay@kernel.org/)** + +> This set implements a kfunc called bpf_send_signal_task() that is similar +> to sigqueue() as it can send a signal along with a cookie to a thread or +> thread group. + +**[v1: net-next: Bonding: return detailed error about XDP failures](http://lore.kernel.org/bpf/20241016031649.880-1-liuhangbin@gmail.com/)** + +> This patch set return detailed error about XDP failures. And update +> bonding document about XDP supports. + +**[v1: sched_ext: Use BTF_ID to resolve task_struct](http://lore.kernel.org/bpf/20241016024100.7409-1-dtcccc@linux.alibaba.com/)** + +> Save the searching time during bpf_scx_init. + +**[v2: net-next: idpf: XDP chapter III: core XDP changes (+libeth_xdp)](http://lore.kernel.org/bpf/20241015145350.4077765-1-aleksander.lobakin@intel.com/)** + +> They are implemented mostly as inlines with inline callback arguments. +> They will be then uninlined in the drivers with sane function sizes, +> but without any indirect calls. + +**[v1: Add jump table support for objtool on LoongArch](http://lore.kernel.org/bpf/20241015113915.12623-1-yangtiezhu@loongson.cn/)** + +> This series is based on 6.12-rc3, tested with the latest (20241012) +> upstream mainline binutils and gcc. + +**[v1: bpftool: optimize if statement code](http://lore.kernel.org/bpf/20241015110944.6975-1-liujing@cmss.chinamobile.com/)** + +> Since both conditions are used to check whether len is valid, we can combine the two conditions into a single if statement + +### 周边技术动态 + +#### Qemu + +**[v4: target/riscv: Add support for Smdbltrp and Ssdbltrp extensions](http://lore.kernel.org/qemu-devel/20241017145226.365825-1-cleger@rivosinc.com/)** + +> This series adds support for Ssdbltrp and Smdbltrp ratified ISA +> extensions [1]. It is based on the Smrnmi series [6]. + +**[v2: hw/riscv: Add Microblaze V 32bit virt board](http://lore.kernel.org/qemu-devel/20241017072507.4033413-1-sai.pavan.boddu@amd.com/)** + +> Add a basic board with interrupt controller (intc), timer, serial +> (uartlite), small memory called LMB@0 (128kB) and DDR@0x80000000 +> (configured via command line eg. -m 2g). + +**[v10: riscv: QEMU RISC-V IOMMU support](http://lore.kernel.org/qemu-devel/20241016204038.649340-1-dbarboza@ventanamicro.com/)** + +> In this new version we fixed address alignment issues in some command +> queue commands, pointed out by Jason in v9. + +**[v6: tcg/riscv: Add support for vector](http://lore.kernel.org/qemu-devel/20241016193140.2206352-1-richard.henderson@linaro.org/)** + +> Introduce support for the RISC-V vector extension in the TCG backend. + +**[Host riscv disas is broken](http://lore.kernel.org/qemu-devel/95383723-cc27-4986-8dc3-827962120f8f@linaro.org/)** + +> This structure comes from RISCVCPU, a target structure. +> There is no such structure for the host, causing null pointer dereferences. + +**[v3: target/riscv: add endianness checks and atomicity guarantees.](http://lore.kernel.org/qemu-devel/20241014220153.196183-1-paolo.savini@embecosm.com/)** + +> This version 3 of the patch adds endianness safety to both the optimizations +> brought by the patch set. + +#### U-Boot + +**[v1: PolarFire SoC clock devicetree rework](http://lore.kernel.org/u-boot/20241018145444.1660219-1-conor@kernel.org/)** + +> I've implemented things here in a backwards compatible manner, so that +> these changes can be applied now without the relevant devicetree +> patches (since the dust has not settled on all aspects of the rework) +> and the revised devicetree can make its way into U-Boot via a regular +> OF_UPSTREAM update once merged "upstream". + +**[risc-v - efi_free_pool: illegal free](http://lore.kernel.org/u-boot/CANAwSgRJO1=w40ybTHkq-BD78rPyf13JdWp_yL1qpu=xmO2V8Q@mail.gmail.com/)** + +> I am trying to create a RISC-V Archlinux image for the StarFive +> VisionFive 2 v1.3B SBC. + + ## 20241013：第 113 期 ### 内核动态 -- Gitee