From f9c75523cd313ca059f14e93cf410530aa77bb97 Mon Sep 17 00:00:00 2001 From: Rory Li <736729045@qq.com> Date: Sun, 10 Nov 2024 11:51:36 +0000 Subject: [PATCH] update news/README.md. Signed-off-by: Rory Li <736729045@qq.com> --- news/README.md | 812 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 812 insertions(+) diff --git a/news/README.md b/news/README.md index c516949..aaf83f8 100644 --- a/news/README.md +++ b/news/README.md @@ -8,6 +8,818 @@ * [2024 年 - 上半年](2024-1st-half.md) +## 20241110：第 117 期 + +### 内核动态 + +#### RISC-V 架构支持 + +**[GIT PULL: KVM/riscv changes for 6.13](http://lore.kernel.org/linux-riscv/CAAhSdy1iTNc5QG34ceebMzA137-pNGzTva33VQ83j-yMoaw8Fg@mail.gmail.com/)** + +> Accelerate KVM RISC-V when running as a guest. Perf support to collect KVM guest statistics from host side + +**[GIT PULL: RISC-V Devicetrees for v6.13](http://lore.kernel.org/linux-riscv/20241108-washboard-material-6b9ff196063d@spud/)** + +**[v2: Refactor cpuid and metric table lookup code](http://lore.kernel.org/linux-riscv/20241107162035.52206-1-irogers@google.com/)** + +> These patches remove a lot of the logic relating CPUIDs to PMUs so +> that the PMU isn't part of the question when finding a metric table. + +**[v6: PCI: microchip: support using either instance 1 or 2](http://lore.kernel.org/linux-riscv/20241107-aqueduct-petroleum-c002480ba291@spud/)** + +> The current driver and binding for PolarFire SoC's PCI controller assume +> that the root port instance in use is instance 1. + +**[v1: iommu/riscv: Add platform msi support](http://lore.kernel.org/linux-riscv/20241106175102.219923-4-ajones@ventanamicro.com/)** + +> The first patch is fix for an issue found while preparing the second. +> The second patch adds MSI support for a platform IOMMU. The patches +> may be tested with QEMU when including [1]. + +**[[for 6.11 PATCH] RISC-V: disallow gcc + rust builds](http://lore.kernel.org/linux-riscv/20241106-happily-unknotted-9984b07a414e@spud/)** + +> During the discussion before supporting rust on riscv, it was decided +> not to support gcc yet, due to differences in extension handling +> compared to llvm (only the version of libclang matching the c compiler +> is supported). + +**[FAILED: Patch "riscv: vdso: Prevent the compiler from inserting calls to memset()" failed to apply to v4.19-stable tree](http://lore.kernel.org/linux-riscv/20241106021412.184114-1-sashal@kernel.org/)** + +> The patch below does not apply to the v4.19-stable tree. + +**[FAILED: Patch "riscv: vdso: Prevent the compiler from inserting calls to memset()" failed to apply to v5.4-stable tree](http://lore.kernel.org/linux-riscv/20241106021323.183560-1-sashal@kernel.org/)** + +> The patch below does not apply to the v5.4-stable tree. + +**[FAILED: Patch "RISC-V: disallow gcc + rust builds" failed to apply to v6.11-stable tree](http://lore.kernel.org/linux-riscv/20241106020840.164364-1-sashal@kernel.org/)** + +> The patch below does not apply to the v6.11-stable tree. + +**[GIT PULL: RISC-V Sophgo Devicetrees for v6.13](http://lore.kernel.org/linux-riscv/MA0P287MB2822DC23E1EE47A5C7D41476FE532@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM/)** + +**[v1: kvmtool: riscv: Pass correct size to snprintf()](http://lore.kernel.org/linux-riscv/20241104192120.75841-1-bjorn@kernel.org/)** + +> The snprintf() function does not get the correct size argument passed, +> when the FDT ISA string is built. Instead of adjusting the size for +> each extension, the full size is passed for every iteration. Doing so +> will make __snprinf_chk() bail out on glibc. + +**[v6: Introduce support for T-head TH1520 Mailbox](http://lore.kernel.org/linux-riscv/20241104100734.1276116-1-m.wilczynski@samsung.com/)** + +> The T-head TH1520 SoC supports a hardware mailbox that enables two cores +> within the SoC to communicate and coordinate. + +**[v3: Wire up CRC32 library functions to arch-optimized code](http://lore.kernel.org/linux-riscv/20241103223154.136127-1-ebiggers@kernel.org/)** + +> This patchset fixes that so that the CRC32 library functions use the +> optimized code. + +**[v7: net-next: Add the dwmac driver support for T-HEAD TH1520 SoC](http://lore.kernel.org/linux-riscv/20241103-th1520-gmac-v7-0-ef094a30169c@tenstorrent.com/)** + +> This series adds support for dwmac gigabit ethernet in the T-Head TH1520 +> RISC-V SoC used on boards like BeagleV Ahead and the LicheePi 4A. + +**[v6: Zacas/Zabha support and qspinlocks](http://lore.kernel.org/linux-riscv/20241103145153.105097-1-alexghiti@rivosinc.com/)** + +> This implements [cmp]xchgXX() macros using Zacas and Zabha extensions +> and finally uses those newly introduced macros to add support for +> qspinlocks: note that this implementation of qspinlocks satisfies the +> forward progress guarantee. + +**[v2: riscv: Add bfloat16 instruction support](http://lore.kernel.org/linux-riscv/20241103074959.1135240-1-inochiama@gmail.com/)** + +> Add description for the BFloat16 precision Floating-Point ISA extension, +> (Zfbfmin, Zvfbfmin, Zvfbfwma). which was ratified in commit 4dc23d62 +> ("Added Chapter title to BF16") of the riscv-isa-manual. + +#### LoongArch 架构支持 + +**[v1: LoongArch: Add PREEMPT_RT support](http://lore.kernel.org/loongarch/20241108091545.4182229-1-chenhuacai@loongson.cn/)** + +> This series add PREEMPT_RT support for LoongArch. + +**[v2: LoongArch: Disable KASAN if PGDIR_SIZE is too large for cpu_vabits](http://lore.kernel.org/loongarch/20241108062556.4138380-1-chenhuacai@loongson.cn/)** + +> If PGDIR_SIZE is too large for cpu_vabits, KASAN_SHADOW_END will +> overflow UINTPTR_MAX because KASAN_SHADOW_START/KASAN_SHADOW_END are +> aligned up by PGDIR_SIZE. + +**[v4: Added Interrupt controller emulation for loongarch kvm](http://lore.kernel.org/loongarch/20241108033437.2727574-1-lixianglai@loongson.cn/)** + +> Before this, the interrupt controller simulation has been completed +> in the user mode program. + +**[v2: Add jump table support for objtool on LoongArch](http://lore.kernel.org/loongarch/20241105123906.26072-1-yangtiezhu@loongson.cn/)** + +> This series is based on 6.12-rc6, tested with the upstream mainline +> binutils, GCC and Clang, all the changes are under tools/objtool and +> arch/loongarch. + +**[v1: LoongArch: Add DMW2 shadow mapping in KASAN](http://lore.kernel.org/loongarch/20241105122945.21886-1-wangkanglong@loongson.cn/)** + +> Currently,the kernel couldn't boot when both CONFIG_ARCH_IOREMAP, +> CONFIG_ARCH_WRITECOMBINE and KASAN are enabled. + +**[v1: loongarch/crc32: add missing dependency on 64BIT](http://lore.kernel.org/loongarch/20241103224752.190742-1-ebiggers@kernel.org/)** + +> The LoongArch CRC32 instructions are only specified for LA64 (64-bit) +> and cannot be assembled in 32-bit mode. + +#### ARM 架构支持 + +**[v1: Add support for Samsung Galaxy S20 FE (SM-G780F/r8s) [SoC Exynos990]](http://lore.kernel.org/linux-arm-kernel/20241109230402.831-1-wachiturroxd150@gmail.com/)** + +> That Samsung Galaxy S20 FE device is part of the Exynos990 SoC family, +> I saw that Igor supported that processor, +> I took advantage of it. + +**[v1: clk: sunxi-ng: a100: enable MMC clock reparenting](http://lore.kernel.org/linux-arm-kernel/20241109003739.3440904-1-masterr3c0rd@epochal.quest/)** + +> While testing the MMC nodes proposed in [1], it was noted that mmc0/1 +> would fail to initialize, with "mmc: fatal err update clk timeout" in +> the kernel logs. + +**[v8: Add Arm Mali-C55 Image Signal Processor Driver](http://lore.kernel.org/linux-arm-kernel/20241106100534.768400-1-dan.scally@ideasonboard.com/)** + +> This patchset introduces a driver for Arm's Mali-C55 Image Signal Processor. + +**[v5: MIPI DSI Controller support for SAM9X75 series](http://lore.kernel.org/linux-arm-kernel/20241106093429.157131-1-manikandan.m@microchip.com/)** + +> This patch series adds support for the Microchip's MIPI DSI Controller +> wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller +> bridge for SAM9X75 SoC series. + +**[v1: irqchip/gic-v3: Force propagation of the active state with a read-back](http://lore.kernel.org/linux-arm-kernel/20241106084418.3794612-1-maz@kernel.org/)** + +> Christoffer reports that on some implementations, writing to +> GICR_ISACTIVER0 (and similar GICD registers) can race badly +> with a guest issuing a deactivation of that interrupt via the +> system register interface. + +**[v8: Support SMT control on arm64](http://lore.kernel.org/linux-arm-kernel/20241105093237.63565-1-yangyicong@huawei.com/)** + +> The core CPU control framework supports runtime SMT control which +> is not yet supported on arm64. + +**[v2: Add device tree for MT8188-based Chromebook "Ciri"](http://lore.kernel.org/linux-arm-kernel/20241105093222.4055774-1-fshao@chromium.org/)** + +> This is the v2 series to introduce the device trees for Ciri, a +> MT8188-based Chromebook, commercially known as the Lenovo Chromebook +> Duet (11", 9). + +#### X86 架构支持 + +**[v6: Add support for binding ACPI platform profile to multiple drivers](http://lore.kernel.org/lkml/20241109044151.29804-1-mario.limonciello@amd.com/)** + +> This series also adds a new concept of a "custom" profile. This allows +> userspace to discover that there are multiple driver handlers that are +> configured differently. +> This series also allows dropping all of the PMF quirks from amd-pmf. + +**[[PATCh 0/3] x86,tlb: context switch optimizations](http://lore.kernel.org/lkml/20241109003727.3958374-1-riel@surriel.com/)** + +> This warning never ever seems to fire, even on a very large +> fleet, so it may be best to hide that behind CONFIG_DEBUG_VM. +> With the web server workload, this is also about 17% of +> switch_mm_irqs_off. + +**[v1: KVM/x86: add comment to kvm_mmu_do_page_fault()](http://lore.kernel.org/lkml/20241108161416.28552-1-jgross@suse.com/)** + +> On a first glance it isn't obvious why calling kvm_tdp_page_fault() in +> kvm_mmu_do_page_fault() is special cased, as the general case of using +> an indirect case would result in calling of kvm_tdp_page_fault() +> anyway. +> Add a comment to explain the reason. + +**[v3: Introduce initial support for the AMD I3C (non-HCI) to DW driver](http://lore.kernel.org/lkml/20241108073323.523805-1-Shyam-sundar.S-k@amd.com/)** + +> The AMD EPYC platform design has DIMMs connected over the I3C bus, with +> each DIMM containing three components: SPD, PMIC, and RCD. + +**[v1: netfs: If didn't read new data then abandon retry](http://lore.kernel.org/lkml/20241108034020.3695718-1-lizhi.xu@windriver.com/)** + +> syzkaller reported a three-level circle calls (netfs_rreq_assess, +> netfs_retry_reads, netfs_rreq_terminated), during an unbuffered or direct +> I/O read. + +**[v1: x86/cpufeatures: Free up unused feature bits](http://lore.kernel.org/lkml/20241107233000.2742619-1-sohil.mehta@intel.com/)** + +> Linux defined feature bits X86_FEATURE_P3 and X86_FEATURE_P4 are not +> used anywhere, neither are they visible to userspace. + +**[v5: Add SEV firmware hotloading](http://lore.kernel.org/lkml/20241107232457.4059785-1-dionnaglaze@google.com/)** + +> The SEV-SNP API specifies a command for hotloading the SEV firmware. +> when no SEV or SEV-ES guests are running. + +**[v2: Add new headers for Hyper-V Dom0](http://lore.kernel.org/lkml/1731018746-25914-1-git-send-email-nunodasneves@linux.microsoft.com/)** + +> This patch series introduces new headers (hvhdk.h, hvgdk.h, etc, +> see patch #3) derived directly from Hyper-V code. hyperv-tlfs.h is +> replaced with hvhdk.h (which includes the other new headers) +> everywhere. + + +**[v7: Correct perf sampling with Guest VMs](http://lore.kernel.org/lkml/20241107190336.2963882-1-coltonlewis@google.com/)** + +**[v1: x86/cpu/bugs: Consider having old Intel microcode to be a vulnerability](http://lore.kernel.org/lkml/20241107170630.2A92B8D3@davehans-spike.ostc.intel.com/)** + +> You can't practically run old microcode and consider a system secure +> these days. So, let's call old microcode what it is: a vulnerability. + +**[v1: A mechanism for efficient support for per-function metrics](http://lore.kernel.org/lkml/20241107160721.1401614-1-deepak.surti@arm.com/)** + +> This patch introduces the concept on an alternating sample rate to perf +> core and provides the necessary basic changes in the tools to activate +> that option. + +**[v1: 6.11: 6.11.7-rc2 review](http://lore.kernel.org/lkml/20241107064547.006019150@linuxfoundation.org/)** + +> This is the start of the stable review cycle for the 6.11.7 release. +> There are 249 patches in this series, all will be posted as a response +> to this one. If anyone has any issues with these being applied, please +> let me know. + +**[v1: 5.4: 5.4.285-rc2 review](http://lore.kernel.org/lkml/20241107063341.146657755@linuxfoundation.org/)** + +> This is the start of the stable review cycle for the 5.4.285 release. +> There are 461 patches in this series, all will be posted as a response +> to this one. If anyone has any issues with these being applied, please +> let me know. + +**[v1: 4.19: 4.19.323-rc2 review](http://lore.kernel.org/lkml/20241107063342.964868073@linuxfoundation.org/)** + +> This is the start of the stable review cycle for the 4.19.323 release. +> There are 349 patches in this series, all will be posted as a response +> to this one. If anyone has any issues with these being applied, please +> let me know. + +**[v1: module: Strict per-modname namespaces](http://lore.kernel.org/lkml/20241106190240.GR10375@noisy.programming.kicks-ass.net/)** + +> I've been wanting $topic for a while, and having just stumbled into the +> whole namespace thing by accident, I figured I'd give it a go, most if +> the hard parts seem to have already been done. + +**[v2: x86/bugs: Attack vector controls](http://lore.kernel.org/lkml/20241105215455.359471-1-david.kaplan@amd.com/)** + +> This series restructures arch/x86/kernel/cpu/bugs.c and proposes new +> command line options to make it easier to control which CPU mitigations +> are applied. + +**[v8: KVM: x86/mmu: Age sptes locklessly](http://lore.kernel.org/lkml/20241105184333.2305744-1-jthoughton@google.com/)** + +> Andrew has queued patches to make MGLRU consult KVM when doing aging[8]. +> Now, make aging lockless for the shadow MMU and the TDP MMU. This allows +> us to reduce the time/CPU it takes to do aging and the performance +> impact on the vCPUs while we are aging. + +**[v1: exec: NULL out bprm->argv0 when it is an ERR_PTR](http://lore.kernel.org/lkml/20241105181905.work.462-kees@kernel.org/)** + +> Attempting to free an ERR_PTR will not work. ;) +> process 'syz-executor210' launched '/dev/fd/3' with NULL argv: empty string added + +**[v5: x86-64: Stack protector and percpu improvements](http://lore.kernel.org/lkml/20241105155801.1779119-1-brgerst@gmail.com/)** + +> Currently, x86-64 uses an unusual percpu layout, where the percpu section +> is linked at absolute address 0. The reason behind this is that older GCC +> versions placed the stack protector (if enabled) at a fixed offset from the +> GS segment base. + +#### 进程调度 + +**[v1: sched/topology: Correctly propagate NUMA flag to scheduling domains](http://lore.kernel.org/lkml/20241109145628.112617-1-arighi@nvidia.com/)** + +> A scheduling domain can degenerate a parent NUMA domain if the CPUs +> perfectly overlap, without inheriting the SD_NUMA flag. + +**[v1: sched/cpufreq: Ensure sd is rebuilt for EAS check](http://lore.kernel.org/lkml/35e572d9-1152-406a-9e34-2525f7548af9@arm.com/)** + +> Ensure sugov_eas_rebuild_sd() is always called when sugov_init() +> succeeds. The out goto initialized sugov without forcing the rebuild. + +**[v1: sched/smt: Call sched_core_cpu_deactivate() after error is handled](http://lore.kernel.org/lkml/20241108121120.3912918-1-ciprietti@google.com/)** + +> In sched_cpu_deactivate(), the error path restores most of the initial +> state before returning, but, if CONFIG_SCHED_SMT is defined, it does not +> undo the previous call to sched_core_cpu_deactivate(). + +**[v1: sched/deadline: Skip overflow check if 0 capacity](http://lore.kernel.org/lkml/20241108042924.520458-1-longman@redhat.com/)** + +> By properly setting up a 1-cpu sched domain (partition) with no +> task, it was found that offlining that particular CPU failed because +> dl_bw_check_overflow() in cpuset_cpu_inactive() returned -EBUSY. + +**[v1: sched/fair: Dequeue sched_delayed tasks when waking to a busy CPU](http://lore.kernel.org/lkml/750542452c4f852831e601e1b8de40df4b108d9a.camel@gmx.de/)** + +> Phil Auld (Redhat) reported an fio benchmark regression having been found +> to have been caused by addition of the DELAY_DEQUEUE feature, suggested it +> may be related to wakees losing the ability to migrate, and confirmed that +> restoration of same indeed did restore previous performance. + +**[[GIT pull] sched/urgent for v6.12-rc6](http://lore.kernel.org/lkml/173062983173.1467946.7303190211154698526.tglx@xen13/)** + +#### 内存管理 + +**[v2: simplify split calculation](http://lore.kernel.org/linux-mm/20241109134410.31792-1-richard.weiyang@gmail.com/)** + +> By discussion, current implementation would lead to jitter problem. Since this +> is a rare case in real world, we decide to simplify the split calculation. + +**[v1: nommu: pass NULL argument to vma_iter_prealloc()](http://lore.kernel.org/linux-mm/20241108222834.3625217-1-thehajime@gmail.com/)** + +> This commit fixes this issue by passing a right argument to the +> preallocation call. + +**[v1: memcg/hugetlb: Rework memcg hugetlb charging](http://lore.kernel.org/linux-mm/20241108212946.2642085-1-joshua.hahnjy@gmail.com/)** + +> This series cleans up memcg's hugetlb charging logic by deprecating the +> current memcg hugetlb try-charge + {commit, cancel} logic present in +> alloc_hugetlb_folio. + +**[v4: netfs: Read performance improvements and "single-blob" support](http://lore.kernel.org/linux-mm/20241108173236.1382366-1-dhowells@redhat.com/)** + +> This set of patches is primarily about two things: improving read +> performance and supporting monolithic single-blob objects that have to be +> read/written as such (e.g. AFS directory contents). + +**[v1: mm: Introduce and use folio_owner_ops](http://lore.kernel.org/linux-mm/20241108162040.159038-1-tabba@google.com/)** + +> This patch series introduces struct folio_owner_ops and uses it +> as a generic way to handle callbacks on freeing a folio. It also +> applies the callbacks to hugetlb and zone device folios. + +**[v1: Support large folios for tmpfs](http://lore.kernel.org/linux-mm/cover.1731038280.git.baolin.wang@linux.alibaba.com/)** + +> Traditionally, tmpfs only supported PMD-sized huge folios. However nowadays +> with other file systems supporting any sized large folios, and extending +> anonymous to support mTHP, we should not restrict tmpfs to allocating only +> PMD-sized huge folios, making it more special. Instead, we should allow +> tmpfs can allocate any sized large folios. + +**[v2: mTHP-friendly compression in zsmalloc and zram based on multi-pages](http://lore.kernel.org/linux-mm/20241107101005.69121-1-21cnbao@gmail.com/)** + +> This patchset enhances zsmalloc and zram by adding support for dividing +> large folios into multi-page blocks, typically configured with a +> 2-order granularity. Without this patchset, a large folio is always +> divided into `nr_pages` 4KiB blocks. + +**[v4: mm: count zeromap read and set for swapout and swapin](http://lore.kernel.org/linux-mm/20241107011246.59137-1-21cnbao@gmail.com/)** + +> This patch does not address any specific zeromap bug, but the missing +> swpout and swpin counts for zero-filled pages can be highly confusing and +> may mislead user-space agents that rely on changes in these counters as +> indicators. + +**[v3: zswap IAA compress batching](http://lore.kernel.org/linux-mm/20241106192105.6731-1-kanchana.p.sridhar@intel.com/)** + +> This patch-series introduces the use of the Intel Analytics Accelerator +> (IAA) for parallel compression of pages in large folios. + +**[v6: memory,x86,acpi: hotplug memory alignment advisement](http://lore.kernel.org/linux-mm/20241106155847.7985-1-gourry@gourry.net/)** + +> When physical address regions are not aligned to memory block size, +> the misaligned portion is lost (stranded capacity). + +**[v2: Provide a new two step DMA mapping API](http://lore.kernel.org/linux-mm/cover.1730892663.git.leon@kernel.org/)** + +> This uniqueness has been a long standing pain point as the scatterlist API +> is mandatory, but expensive to use. It prevents any kind of optimization or +> feature improvement (such as avoiding struct page for P2P) due to the impossibility +> of improving the scatterlist. + +**[FAILED: Patch "mm/page_alloc: let GFP_ATOMIC order-0 allocs access highatomic reserves" failed to apply to v5.10-stable tree](http://lore.kernel.org/linux-mm/20241106021244.183133-1-sashal@kernel.org/)** + +> The patch below does not apply to the v5.10-stable tree. + +**[FAILED: Patch "mm: multi-gen LRU: use {ptep,pmdp}_clear_young_notify()" failed to apply to v6.1-stable tree](http://lore.kernel.org/linux-mm/20241106021114.182124-1-sashal@kernel.org/)** + +> The patch below does not apply to the v6.1-stable tree. + +**[FAILED: Patch "mm: multi-gen LRU: use {ptep,pmdp}_clear_young_notify()" failed to apply to v6.6-stable tree](http://lore.kernel.org/linux-mm/20241106021001.176509-1-sashal@kernel.org/)** + +> The patch below does not apply to the v6.6-stable tree. + +#### 文件系统 + +**[v9: net-next: Suspend IRQs during application busy periods](http://lore.kernel.org/linux-fsdevel/20241109050245.191288-1-jdamato@fastly.com/)** + +> This revision addresses feedback Willem gave on the selftests. No +> functional or code changes to the implementation were made and +> performance tests were not re-run. + +**[v1: proc/kcore: performance optimizations](http://lore.kernel.org/linux-fsdevel/cover.1731115587.git.osandov@fb.com/)** + +> The performance of /proc/kcore reads has been showing up as a bottleneck +> for drgn. drgn scripts often spend +> 25% of their time in the kernel +> reading from /proc/kcore. + +**[v1: fuse: support large folios](http://lore.kernel.org/linux-fsdevel/20241109001258.2216604-1-joannelkoong@gmail.com/)** + +> This patchset adds support for folios larger than one page size in FUSE. + +**[v3: implement PROCFS_SET_GROUPS ioctl](http://lore.kernel.org/linux-fsdevel/20241108204102.1752206-1-stsp2@yandex.ru/)** + +**[v1: proc/softirqs: change softirqs info from possile_cpu to online_cpu](http://lore.kernel.org/linux-fsdevel/20241108162225.19401-1-18001123162@163.com/)** + +> like /proc/interrupts,/proc/softirqs which shows +> the number of softirq for each online CPU + +**[v3: fs: allow statmount to fetch the subtype and devname](http://lore.kernel.org/linux-fsdevel/20241107-statmount-v3-0-da5b9744c121@kernel.org/)** + +> Meta has some internal logging that scrapes /proc/self/mountinfo today. +> I'd like to convert it to use listmount()/statmount(), so we can do a +> better job of monitoring with containers. We're missing some fields +> though. + +**[v1: Add iomem helpers for use from debugfs](http://lore.kernel.org/linux-fsdevel/20241107163448.2123-1-michal.wajdeczko@intel.com/)** + +> This series attempts to promote helpers used by Xe [1] to libfs. +> Earlier attempt [2] with similar helper was unnoticed. + +**[v1: hfsplus: don't query the device logical block size multiple times](http://lore.kernel.org/linux-fsdevel/20241107114109.839253-1-cascardo@igalia.com/)** + +> Devices block sizes may change. One of these cases is a loop device by +> using ioctl LOOP_SET_BLOCK_SIZE. + +**[v1: jfs: reject on-disk inodes of an unsupported type](http://lore.kernel.org/linux-fsdevel/20241107054228.26540-1-dmantipov@yandex.ru/)** + +> Syzbot has reported the following BUG: + +**[v2: fs: allow statmount to fetch the sb->s_subtype field](http://lore.kernel.org/linux-fsdevel/20241106-statmount-v2-0-93ba2aad38d1@kernel.org/)** + +> Meta has some internal logging that scrapes /proc/self/mountinfo today. +> I'd like to convert it to use listmount()/statmount(), so we can do a +> better job of monitoring with containers. We're missing some fields +> though. This patchset adds them. + +**[v3: bpf-next: bpf/crib: Add open-coded style process file iterator and file related CRIB kfuncs](http://lore.kernel.org/linux-fsdevel/AM6PR03MB58488FD29EB0D0B89D52AABB99532@AM6PR03MB5848.eurprd03.prod.outlook.com/)** + +> This patch series adds open-coded style process file iterator +> bpf_iter_task_file and file related kfuncs bpf_fget_task(), +> bpf_get_file_ops_type(), and corresponding selftests test cases. + +**[v8: Read/Write with meta/integrity](http://lore.kernel.org/linux-fsdevel/20241106121842.5004-1-anuj20.g@samsung.com/)** + +> This adds a new io_uring interface to exchange additional integrity/pi +> metadata with read/write. + +**[v1: fs: add the ability for statmount() to report the fs_subtype](http://lore.kernel.org/linux-fsdevel/20241106-statmount-v1-1-b93bafd97621@kernel.org/)** + +> Add STATMOUNT_FS_SUBTYPE and claim one of the __spare2 fields to point +> to the offset into the str[] array. The STATMOUNT_FS_SUBTYPE will only +> be set in the return mask if there is a subtype associated with the +> mount. + +#### 网络设备 + +**[v1: net-next: netlink: add igmp join/leave notifications](http://lore.kernel.org/netdev/20241110081953.121682-1-yuyanghuang@google.com/)** + +> This change introduces netlink notifications for multicast address +> changes, enabling components like the Android Packet Filter to implement +> IGMP offload solutions. + +**[v1: net-next: net/unix: Stylistic changes in diag.c](http://lore.kernel.org/netdev/20241110005927.30688-1-wmokhlef@gmail.com/)** + +> Changes based on the script scripts/checkpatch.pl +> Remove space after cast, blank line after declaration, +> fixed brace style + +**[v1: net: modernize ioremap in probe](http://lore.kernel.org/netdev/20241109233641.8313-1-rosenp@gmail.com/)** + +> resource aquisition and ioremap can be performed in one step. + +**[v1: ixgbe: Correct BASE-BX10 compliance code](http://lore.kernel.org/netdev/20241109232557.189035-1-tore@amundsen.org/)** + +> This patch corrects the value of IXGBE_SFF_BASEBX10_CAPABLE to 0x40. + +**[v3: net-next: net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX](http://lore.kernel.org/netdev/20241109-am65-cpsw-multi-rx-dscp-v3-0-1cfb76928490@kernel.org/)** + +> Configure DSCP to Priority mapping registers so that IP precedence +> field (top 3 bits of DSCP) map it to one of the 8 priority queues +> for RX traffic. + +**[v4: net-next: eth: fbnic: Add PCIe hardware statistics](http://lore.kernel.org/netdev/20241109025905.1531196-1-sanman.p211993@gmail.com/)** + +> Add PCIe hardware statistics support to the fbnic driver. These stats +> provide insight into PCIe transaction performance and error conditions. + +**[v1: net-next: net: page_pool: do not count normal frag allocation in stats](http://lore.kernel.org/netdev/20241109023303.3366500-1-kuba@kernel.org/)** + +> Commit 0f6deac3a079 ("net: page_pool: add page allocation stats for +> two fast page allocate path") added increments for "fast path" +> allocation to page frag alloc. + +**[v1: net-next: net: dsa: microchip: Add LAN9646 switch support](http://lore.kernel.org/netdev/20241109015705.82685-1-Tristram.Ha@microchip.com/)** + +> This series of patches is to add LAN9646 switch support to the KSZ DSA +> driver. + +**[v1: net-next: net: dsa: microchip: Add SGMII port support to KSZ9477 switch](http://lore.kernel.org/netdev/20241109015633.82638-1-Tristram.Ha@microchip.com/)** + +> This series of patches is to add SGMII port support to KSZ9477 switch. + +**[v4: net-next: lib: packing: introduce and use (un)pack_fields](http://lore.kernel.org/netdev/20241108-packing-pack-fields-and-ice-implementation-v4-0-81a9f42c30e5@intel.com/)** + +> This series improves the packing library with a new API for packing or +> unpacking a large number of fields at once with minimal code footprint. + +**[v1: iwl-net: idpf: Preserve IRQ affinity and sync IRQ](http://lore.kernel.org/netdev/20241109001206.213581-1-ahmed.zaki@intel.com/)** + +> Currently the IRQ affinity settings fallback to defaults when interface +> goes through a soft reset. Use irq_set_affinity_notifier() callbacks to +> fix it. + +**[v4: net: dsa: microchip: disable EEE for KSZ879x/KSZ877x/KSZ876x](http://lore.kernel.org/netdev/20241108214815.3874964-1-vtpieter@gmail.com/)** + +> For the KSZ8 devices, the EEE errata is handled from the DSA switch +> driver ksz8.c, ksz8_handle_global_errata. + +**[[net-next PATCH] net: dsa: add devm_dsa_register_switch()](http://lore.kernel.org/netdev/20241108200217.2761-1-ansuelsmth@gmail.com/)** + +> Some DSA driver can be simplified if devres takes care of unregistering +> the DSA switch. This permits to effectively drop the remove OP from +> driver that just execute the dsa_unregister_switch() and nothing else. + +**[v1: ethtool-next: rxclass: Make output for RSS context action explicit](http://lore.kernel.org/netdev/890cd515345f7c1ed6fba4bf0e43c53b34ccefaa.1731094323.git.dxu@dxuuu.xyz/)** + +> Currently, if the action for an ntuple rule is to redirect to an RSS +> context, the RSS context is printed as an attribute. At the same time, +> a wrong action is printed. + +**[v1: net-next: bnxt_en: ethtool: Supply ntuple rss context action](http://lore.kernel.org/netdev/384c034c23d63dec14e0cc333b8b0b2a778edcf1.1731092818.git.dxu@dxuuu.xyz/)** + +> Commit 2f4f9fe5bf5f ("bnxt_en: Support adding ntuple rules on RSS +> contexts") added support for redirecting to an RSS context as an ntuple +> rule action. + +**[v1: net-next: ipv4: Prepare bpf helpers to .flowi4_tos conversion.](http://lore.kernel.org/netdev/cover.1731064982.git.gnault@redhat.com/)** + +> Continue the process of making a dscp_t variable available when setting +> .flowi4_tos. This series focuses on the BPF helpers that initialise a +> struct flowi4 manually. + +**[v1: bpf-next/net: bpf: Add mptcp_subflow bpf_iter support](http://lore.kernel.org/netdev/20241108-bpf-next-net-mptcp-bpf_iter-subflows-v1-0-cf16953035c1@kernel.org/)** + +> Here is a series from Geliang, adding mptcp_subflow bpf_iter support. + +**[v1: net-next: tools/net/ynl: rework async notification handling](http://lore.kernel.org/netdev/20241108123816.59521-1-donald.hunter@gmail.com/)** + +> Revert patch 1bf70e6c3a53 which modified check_ntf() and instead add a +> new poll_ntf() with async notification semantics. + +**[v1: net-next: mctp i2c: notify user space on TX failure](http://lore.kernel.org/netdev/20241108094206.2808293-1-zhangjian.3032@bytedance.com/)** + +> Currently, there is no error handling mechanism for TX failures, causing +> user space to remain unaware of these failures until a timeout occurs. + +**[v10: net-next: net: ipv4: Cache pmtu for all packet paths if multipath enabled](http://lore.kernel.org/netdev/20241108093427.317942-1-deliran@verdict.gg/)** + +> Check number of paths by fib_info_num_path(), +> and update_or_create_fnhe() for every path. + +**[v1: net-next: net: phy: switch eee_broken_modes to linkmode bitmap and add accessor](http://lore.kernel.org/netdev/405734c5-0ed4-40e4-9ac9-91084b9536d6@gmail.com/)** + +> Add an accessor for the bitmap and use it in r8169. + +**[v8: net-next: udp: Add 4-tuple hash for connected sockets](http://lore.kernel.org/netdev/20241108054836.123484-1-lulie@linux.alibaba.com/)** + +> This patchset introduces 4-tuple hash for connected udp sockets, to make +> connected udp lookup faster. + +**[[RFC net-next (resend) 0/4] Send notifications for roaming hosts](http://lore.kernel.org/netdev/20241108035546.2055996-1-elliot.ayrey@alliedtelesis.co.nz/)** + +> Apologies, this is a resend as the first version didn't have the correct CCs. + +#### 安全增强 + +**[v3: Initial support for Samsung Galaxy Tab 2 series](http://lore.kernel.org/linux-hardening/20241108200440.7562-1-bavishimithil@gmail.com/)** + +> This series adds initial support for the Samsung Galaxy Tab 2 +> (samsung-espresso7/10) series of devices. + +**[v7: DCD: Add support for Dynamic Capacity Devices (DCD)](http://lore.kernel.org/linux-hardening/20241107-dcd-type2-upstream-v7-0-56a84e66bc36@intel.com/)** + +> This is a quick spin with minor clean ups Dave was going to apply as +> well as a couple of clean ups I had slated for after V4 landed. + +**[v1: TQ-Systems TQMa62xx SoM and MBa62xx board](http://lore.kernel.org/linux-hardening/cover.1730299760.git.matthias.schiffer@ew.tq-group.com/)** + +> This adds Device Trees for out AM62x-based SoM TQMa62xx and its +> reference carrier board MBa62xx. + +#### 异步 IO + +**[v10: io_uring: support group buffer & ublk zc](http://lore.kernel.org/io-uring/20241107110149.890530-1-ming.lei@redhat.com/)** + +**[v1: io_uring/cmd: let cmds to know about dying task](http://lore.kernel.org/io-uring/55888b6a644b4fc490849832fd5c5e5bfed523ef.1730687879.git.asml.silence@gmail.com/)** + +> When the taks that submitted a request is dying, a task work for that +> request might get run by a kernel thread or even worse by a half +> dismantled task. + +**[v1: io_uring: prevent speculating sq_array indexing](http://lore.kernel.org/io-uring/c6c7a25962924a55869e317e4fdb682dfdc6b279.1730687889.git.asml.silence@gmail.com/)** + +> The SQ index array consists of user provided indexes, which io_uring +> then uses to index the SQ, and so it's susceptible to speculation. + +#### Rust For Linux + +**[v2: kbuild: support building external modules in a separate build directory](http://lore.kernel.org/rust-for-linux/20241110013649.34903-1-masahiroy@kernel.org/)** + +> There has been a long-standing request to support building external +> modules in a separate build directory. + +**[v3: rust: Add pr_*_once macros](http://lore.kernel.org/rust-for-linux/20241109-pr_once_macros-v3-0-6beb24e0cac8@tuta.io/)** + +> Add Rust version of pr_[emerg|alert|crit|err|warn|notic|info]_once +> functions, which print a message only once. + +**[v3: rust: transmute: Add implementation for FromBytes trait](http://lore.kernel.org/rust-for-linux/20241109055442.85190-1-christiansantoslima21@gmail.com/)** + +> Add implementation and documentation for FromBytes trait. + +**[v3: rust: add improved version of `ForeignOwnable::borrow_mut`](http://lore.kernel.org/rust-for-linux/20241108-borrow-mut-v3-0-b7144945714e@gmail.com/)** + +> This is a re-submission of Alice's patch[0]. The leading commits are +> intended to improve the consistency and ergonomics of `ForeignOwnable`, +> and to split out the code movement originally included in the patch. + +**[v2: rust: bindings: Auto-generate inline static functions](http://lore.kernel.org/rust-for-linux/20241108031012.335203-1-alistair.francis@wdc.com/)** + +> This series adds support for bindgen generating wrappers for inline statics and +> then converts the existing helper functions to this new method. + +**[v2: rust: sync: document `PhantomData` in `Arc`](http://lore.kernel.org/rust-for-linux/20241107-simplify-arc-v2-1-7256e638aac1@gmail.com/)** + +> Add a comment explaining the relevant semantics of `PhantomData`. + +**[v2: rust: Add pr_*_once macros](http://lore.kernel.org/rust-for-linux/20241107-pr_once_macros-v2-0-dc0317ff301e@tuta.io/)** + +> Add Rust version of pr_[emerg|alert|crit|err|warn|notic|info]_once +> functions, which print a message only once. + +**[FAILED: Patch "RISC-V: disallow gcc + rust builds" failed to apply to v6.11-stable tree](http://lore.kernel.org/rust-for-linux/20241106020840.164364-1-sashal@kernel.org/)** + +> The patch below does not apply to the v6.11-stable tree. + +**[v1: rust-next: make from_errno use try_from_errno](http://lore.kernel.org/rust-for-linux/20241105114819.14051-1-guilhermev2huehue@gmail.com/)** + +> Modified the from_errno function to use try_from_errno to reduce code duplication while still maintaning all existing behavior and error handling and also reduces unsafe code. + +**[v1: rust: bindings: Support some inline static functions](http://lore.kernel.org/rust-for-linux/20241105022143.1087112-1-alistair.francis@wdc.com/)** + +> The kernel includes a large number of static inline functions that are +> defined in header files. + +**[v4: rust: Implement Display and align Debug for Box](http://lore.kernel.org/rust-for-linux/tencent_7158FA617BA03510E9D525B54613DD9E7906@qq.com/)** + +> This patch series introduces a `Display` implementation for `Box` and updates +> the `Debug` implementation to align its style with `Display` for consistency. + +**[v3: Add dma coherent allocator abstraction](http://lore.kernel.org/rust-for-linux/20241104090711.3000818-1-abdiel.janulgue@gmail.com/)** + +> This series adds support for the dma coherent allocator. + +**[v1: rust: Add pr_*_once macros](http://lore.kernel.org/rust-for-linux/20241103030530.76756-1-fujita.tomonori@gmail.com/)** + +> Add Rust version of pr_[emerg|alert|crit|err|warn|notic|info]_once +> functions, which print a message only once. + +#### BPF + +**[v6: bpf-next: Refactor lock management](http://lore.kernel.org/bpf/20241109231430.2475236-1-memxor@gmail.com/)** + +> This set refactors lock management in the verifier in preparation for +> spin locks that can be acquired multiple times. + +**[v4: bpf-next: bpf: Refactor active lock management](http://lore.kernel.org/bpf/20241109074347.1434011-1-memxor@gmail.com/)** + +> When bpf_spin_lock was introduced originally, there was deliberation on +> whether to use an array of lock IDs, but since bpf_spin_lock is limited +> to holding a single lock at any given time, we've been using a single ID +> to identify the held lock. + +**[v11: bpf-next: bpf: Support private stack for bpf progs](http://lore.kernel.org/bpf/20241109025312.148539-1-yonghong.song@linux.dev/)** + +> The main motivation for private stack comes from nested scheduler in +> sched-ext from Tejun. + +**[v1: dwarves: Check DW_OP_[GNU_]entry_value for possible parameter matching](http://lore.kernel.org/bpf/20241108180508.1196431-1-yonghong.song@linux.dev/)** + +> Currently, pahole relies on dwarf to find whether a particular func +> has its parameter mismatched with standard or optimized away. + +**[v2: perf lock contention: Symbolize locks using slab cache names](http://lore.kernel.org/bpf/20241108061500.2698340-1-namhyung@kernel.org/)** + +> This is to support symbolization of dynamic locks using slab +> allocator's metadata. The kernel support is in the bpf-next tree now. + +**[v1: bpf-next: bpf: range_tree for bpf arena](http://lore.kernel.org/bpf/20241108025616.17625-1-alexei.starovoitov@gmail.com/)** + +> Introduce range_tree (internval tree plus rbtree) to track +> unallocated ranges in bpf arena and replace maple_tree with it. + +**[v1: Check the types of iter arguments](http://lore.kernel.org/bpf/20241107214736.347630-1-tao.lyu@epfl.ch/)** + +> The verifier misses the type checking on iter arguments, +> so any pointer types (e.g., map value pointers) can be +> passed as iter arguments. + +**[v1: bpf-next: bpf: inlinable kfuncs for BPF](http://lore.kernel.org/bpf/20241107175040.1659341-1-eddyz87@gmail.com/)** + +> Some time ago, in an off-list discussion, Alexei Starovoitov suggested +> compiling certain kfuncs to BPF to allow inlining calls to such kfuncs +> during verification. This RFC explores the idea. + +**[v4: net-next: xdp: a fistful of generic changes (+libeth_xdp)](http://lore.kernel.org/bpf/20241107161026.2903044-1-aleksander.lobakin@intel.com/)** + +> They are implemented mostly as inlines with inline callback arguments. +> They will be then uninlined in the drivers with sane function sizes, +> but without any indirect calls. + +**[v3: bpf-next: bpf, x64: Introduce two tailcall enhancements](http://lore.kernel.org/bpf/20241107134529.8602-1-leon.hwang@linux.dev/)** + +> This patch set introduces two enhancements aimed at improving tailcall +> handling in the x64 JIT. + +**[v3: net-next: virtio-net: support AF_XDP zero copy (tx)](http://lore.kernel.org/bpf/20241107085504.63131-1-xuanzhuo@linux.alibaba.com/)** + +**[v10: bpf-next: bpf: Support private stack for bpf progs](http://lore.kernel.org/bpf/20241107024138.3355687-1-yonghong.song@linux.dev/)** + +> The main motivation for private stack comes from nested scheduler in +> sched-ext from Tejun. + +**[FAILED: Patch "mm/page_alloc: let GFP_ATOMIC order-0 allocs access highatomic reserves" failed to apply to v5.10-stable tree](http://lore.kernel.org/bpf/20241106021244.183133-1-sashal@kernel.org/)** + +> The patch below does not apply to the v5.10-stable tree. + +**[v3: bpf: Add sk_is_inet and IS_ICSK check in tls_sw_has_ctx_tx/rx](http://lore.kernel.org/bpf/20241106003742.399240-1-zijianzhang@bytedance.com/)** + +> As the introduction of the support for vsock and unix sockets in sockmap, +> tls_sw_has_ctx_tx/rx cannot presume the socket passed in must be IS_ICSK. + +**[v1: uprobes: Add support to optimize usdt probes on x86_64](http://lore.kernel.org/bpf/20241105133405.2703607-1-jolsa@kernel.org/)** + +> The generic approach (optimize all uprobes) is hard due to emulating +> possible multiple original instructions and its related issues. + +**[[Bpf] RFC 9669: The BPF Instruction Set Architecture](http://lore.kernel.org/bpf/20241105035101.KkqnJ2Jlkjj040rZKGD9-vqB_J4-I86IVf82633NBe0@z/)** + +> We have some exciting news to share: The IETF BPF Instruction Set Architecture +> document has officially been published as RFC 9669 [0]. + +### 周边技术动态 + +#### Qemu + +**[v1: target/riscv: Add Tenstorrent Ascalon CPU](http://lore.kernel.org/qemu-devel/20241108230709.1466634-1-antonb@tenstorrent.com/)** + +> Add a CPU entry for the Tenstorrent Ascalon CPU, a series of 2 wide to +> 8 wide RV64 cores. + +**[v1: hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache](http://lore.kernel.org/qemu-devel/20241108110147.11178-1-jason.chien@sifive.com/)** + +> This commit introduces a translation tag to avoid invalidating an entry +> that should not be invalidated when IOMMU executes invalidation commands. + +**[v1: riscv-to-apply queue](http://lore.kernel.org/qemu-devel/20241107041016.40800-1-alistair.francis@wdc.com/)** + +> The following changes since commit 63dc36944383f70f1c7a20f6104966d8560300fa: +> are available in the Git repository at: + +**[v1: for-10.0: hw/riscv: riscv-iommu-sys device](http://lore.kernel.org/qemu-devel/20241106133407.604587-1-dbarboza@ventanamicro.com/)** + +> Now that we have merged the base IOMMU support we can re-introduce +> the riscv-iommu-sys platform device that was taken away from the initial +> posting. + +**[v5: Support RISC-V CSR read/write in Qtest environment](http://lore.kernel.org/qemu-devel/20241105142840.59617-1-ivan.klokov@syntacore.com/)** + +> These patches add functionality for unit testing RISC-V-specific registers. +> The first patch adds a Qtest backend, and the second implements a simple test. + +**[v3: target/riscv: Add support for Control Transfer Records Ext.](http://lore.kernel.org/qemu-devel/20241104-b4-ctr_upstream_v3-v3-0-32fd3c48205f@rivosinc.com/)** + +> This series enables Control Transfer Records extension support on riscv +> platform. This extension is similar to Arch LBR in x86 and BRBE in ARM. +> The Extension has been stable and this series is based on v1.0_rc6 [0] + +**[v3: hw/riscv: Add Microblaze V generic board](http://lore.kernel.org/qemu-devel/20241104174328.383212-1-sai.pavan.boddu@amd.com/)** + +> Add a basic board with interrupt controller (intc), timer, serial +> (uartlite), small memory called LMB@0 (128kB) and DDR@0x80000000 +> (configured via command line eg. -m 2g). + +#### U-Boot + +**[Pull request efi-2025-01-rc2-2](http://lore.kernel.org/u-boot/efa929c9-b8a8-4264-8bd2-8e98bd61c5c6@gmx.de/)** + +**[v3: Support OF_UPSTREAM for StarFive JH7110](http://lore.kernel.org/u-boot/20241105034328.56439-1-hal.feng@starfivetech.com/)** + +> This patchset add OF_UPSTREAM support for StarFive JH7110 based boards. + + ## 20241103：第 116 期 ### 内核动态 -- Gitee