@versemonger
兰大在读研究僧
兰州大学2021毕业论文LaTex模板
a simple electron Pomoroclock
A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
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Cartpole with PID and Kalman Filter
A template project for beginning new Chisel work
