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From 194c3cadc1879ff4c3d2fc6c5f962ad751c83d9c Mon Sep 17 00:00:00 2001
From: Huang Tao <eric.huang@linux.alibaba.com>
Date: Mon, 25 Mar 2024 10:16:54 +0800
Subject: [PATCH] target/riscv: Fix the element agnostic function problem
In RVV and vcrypto instructions, the masked and tail elements are set to 1s
using vext_set_elems_1s function if the vma/vta bit is set. It is the element
agnostic policy.
However, this function can't deal the big endian situation. This patch fixes
the problem by adding handling of such case.
Signed-off-by: Huang Tao <eric.huang@linux.alibaba.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240325021654.6594-1-eric.huang@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit 75115d880c6d396f8a2d56aab8c12236d85a90e0)
Signed-off-by: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
---
target/riscv/vector_internals.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/target/riscv/vector_internals.c b/target/riscv/vector_internals.c
index 9cf5c17cde..be6eb040d2 100644
--- a/target/riscv/vector_internals.c
+++ b/target/riscv/vector_internals.c
@@ -29,6 +29,28 @@ void vext_set_elems_1s(void *base, uint32_t is_agnostic, uint32_t cnt,
if (tot - cnt == 0) {
return ;
}
+
+ if (HOST_BIG_ENDIAN) {
+ /*
+ * Deal the situation when the elements are insdie
+ * only one uint64 block including setting the
+ * masked-off element.
+ */
+ if (((tot - 1) ^ cnt) < 8) {
+ memset(base + H1(tot - 1), -1, tot - cnt);
+ return;
+ }
+ /*
+ * Otherwise, at least cross two uint64_t blocks.
+ * Set first unaligned block.
+ */
+ if (cnt % 8 != 0) {
+ uint32_t j = ROUND_UP(cnt, 8);
+ memset(base + H1(j - 1), -1, j - cnt);
+ cnt = j;
+ }
+ /* Set other 64bit aligend blocks */
+ }
memset(base + cnt, -1, tot - cnt);
}
--
2.41.0.windows.1
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