# AD9361-FM-Radio-Verilog-LVDS **Repository Path**: zdevt/AD9361-FM-Radio-Verilog-LVDS ## Basic Information - **Project Name**: AD9361-FM-Radio-Verilog-LVDS - **Description**: https://github.com/briansune/AD9361-FM-Radio-Verilog-LVDS.git - **Primary Language**: Verilog - **License**: MIT - **Default Branch**: main - **Homepage**: None - **GVP Project**: No ## Statistics - **Stars**: 0 - **Forks**: 1 - **Created**: 2024-06-12 - **Last Updated**: 2024-11-11 ## Categories & Tags **Categories**: Uncategorized **Tags**: None ## README # AD9361 FM Radio Verilog (Interface LVDS 6bit) This project demonstrate a simplest mono-FM demodulation. In this example, we will forward the audio to the HDMI. Make sure a correct antenna is attached to the FMComms2/3, while the bulan is designed in the same FOI (frequnecy of interest). Well FM antenna is really long as lightsaber but put your lightsaber back and bright up the long wire. # Resources Usage | Res | Usage | Total | % | |--------|-------|--------|------------| | LUT | 2861 | 277400 | 1.0313627 | | LUTRAM | 149 | 108200 | 0.13770795 | | FF | 2765 | 554800 | 0.4983778 | | DSP | 28 | 2020 | 1.3861386 | | IO | 67 | 362 | 18.508287 | | BUFG | 3 | 32 | 9.375 | | MMCM | 1 | 8 | 12.5 | # Demodulation Flow ## !! LVDS input clock is doubled !! ![image](https://user-images.githubusercontent.com/29487339/195495382-54e40ec4-d6ff-439c-8a40-add5b0d469f0.png) # Vivado Block Design # How to change the default FM channel LO: ![image](https://user-images.githubusercontent.com/29487339/195495976-98b5e455-007b-4d53-97e0-c24f7c4876c7.png) After changing the FM RX LO freq, you can go to the ini and update the lut.v accordingly. Enjoy~ =]