@zdevt
zdevt 暂无简介
https://github.com/Xilinx/Vivado-Design-Tutorials.git
pytorch 学习。
basic_verilog
https://github.com/EttusResearch/uhd.git
https://github.com/briansune/AD9361-FM-Radio-Verilog-LVDS.git
https://github.com/briansune/AD9361-FM-Radio-Verilog-CMOS.git
https://github.com/Xilinx/Vitis_Model_Composer.git
https://github.com/analogdevicesinc/plutosdr-fw.git